重卡项目丰都优化测试

Project_Settings/Linker_Files/linker_flash_s32k146.ld

@@ -31,13 +31,18 @@
 
 MEMORY
 {         
-    int_flash_interrupts    : ORIGIN = 0x00000000, LENGTH = 0x00000400    /* 1K */    /* Do not change this section */
-    int_flash_config        : ORIGIN = 0x00000400, LENGTH = 0x00000010    /* 16bytes */ /* Do not change this section */
-    int_flash               : ORIGIN = 0x00000410, LENGTH = 0x000FFBF0    /* ~1.0MB */ 
+    int_flash_interrupts    : ORIGIN = 0x00014200, LENGTH = 0x00000400    /* 1K */    /* Do not change this section */
+   /* int_flash_config        : ORIGIN = 0x00000400, LENGTH = 0x00000010    /* 16bytes */ /* Do not change this section */
+     int_flash               : ORIGIN = 0x00014600, LENGTH = 0x000EBA00    /* ~1.0MB */ 
+/*	int_flash_interrupts    : ORIGIN = 0x00080200, LENGTH = 0x00000400	/**/
+/*	int_flash               : ORIGIN = 0x00080600, LENGTH = 0x0007FA00	/**/
+	
+	m_flexram				: ORIGIN = 0x14000000, LENGTH = 0x00001000	
     int_sram_results        : ORIGIN = 0x1FFF0000, LENGTH = 0x00000100    /* 256bytes */
     int_sram                : ORIGIN = 0x1FFF0100, LENGTH = 0x0001DF00    /* ~120K */
-    int_sram_stack_c0       : ORIGIN = 0x2000E000, LENGTH = 0x00001000    /* 4K  */
-    ram_rsvd2               : ORIGIN = 0x2000F000, LENGTH = 0             /* End of SRAM */
+    int_sram_stack_c0       : ORIGIN = 0x2000E000, LENGTH = 0x00001000 - 0x10    /* 4K  */
+    ram_rsvd2               : ORIGIN = 0x2000EFF0, LENGTH = 0             /* End of SRAM */
+    ExchangeInfo            : ORIGIN = 0x2000EFF0, LENGTH = 0x10          
 }
 
 
@@ -51,20 +56,19 @@ SECTIONS
    {						
     	*(.eeprom)			
     } >m_flexram			
-    
 	.flash_interrupts :
 	{
-		. = ALIGN(4096);
+		. = ALIGN(512);
         __interrupts_rom_start = .;
         KEEP(*(.intc_vector))    
-        . = ALIGN(4);
+        . = ALIGN(512);
         __interrupts_rom_end = .;
 	} > int_flash_interrupts
 	
-	.flash_config :
-	{
-		KEEP(*(.flash_config))
-	} > int_flash_config
+/*	.flash_config :				*/
+/*	{							*/
+/*		KEEP(*(.flash_config))	*/
+/*	} > int_flash_config		*/
 	
 	.flash :
 	{
@@ -111,6 +115,7 @@ SECTIONS
 		__DATA_ROM = .;
 	} > int_flash
     
+    
     . = ALIGN(4);
     PROVIDE(__exidx_start = .);
     .ARM.exidx :

Project_Settings/Linker_Files/linker_flash_s32k146.ldota → Project_Settings/Linker_Files/linker_flash_s32k146.ldfls

@@ -31,26 +31,13 @@
 
 MEMORY
 {         
-    int_flash_interrupts    : ORIGIN = 0x00014200, LENGTH = 0x00000400    /* 1K */    /* Do not change this section */
-   /* int_flash_config        : ORIGIN = 0x00000400, LENGTH = 0x00000010    /* 16bytes */ /* Do not change this section */
-<<<<<<<< HEAD:Project_Settings/Linker_Files/linker_flash_s32k146.ldota
-     int_flash               : ORIGIN = 0x00014600, LENGTH = 0x000EBA00    /* ~1.0MB */ 
-/*	int_flash_interrupts    : ORIGIN = 0x00080200, LENGTH = 0x00000400	/**/
-/*	int_flash               : ORIGIN = 0x00080600, LENGTH = 0x0007FA00	/**/
-	
-	m_flexram				: ORIGIN = 0x14000000, LENGTH = 0x00001000	
-	
-========
-    int_flash               : ORIGIN = 0x00014600, LENGTH = 0x000EBA00    /* ~1.0MB */ 
-    
-    m_flexram        		: ORIGIN = 0x10000000, LENGTH = 0x00001000
-    
->>>>>>>> 4G_PingFeng:Project_Settings/Linker_Files/linker_flash_s32k146.ld.bak2
+    int_flash_interrupts    : ORIGIN = 0x00000000, LENGTH = 0x00000400    /* 1K */    /* Do not change this section */
+    int_flash_config        : ORIGIN = 0x00000400, LENGTH = 0x00000010    /* 16bytes */ /* Do not change this section */
+    int_flash               : ORIGIN = 0x00000410, LENGTH = 0x000FFBF0    /* ~1.0MB */ 
     int_sram_results        : ORIGIN = 0x1FFF0000, LENGTH = 0x00000100    /* 256bytes */
     int_sram                : ORIGIN = 0x1FFF0100, LENGTH = 0x0001DF00    /* ~120K */
-    int_sram_stack_c0       : ORIGIN = 0x2000E000, LENGTH = 0x00001000 - 0x10    /* 4K  */
-    ram_rsvd2               : ORIGIN = 0x2000EFF0, LENGTH = 0             /* End of SRAM */
-    ExchangeInfo            : ORIGIN = 0x2000EFF0, LENGTH = 0x10          
+    int_sram_stack_c0       : ORIGIN = 0x2000E000, LENGTH = 0x00001000    /* 4K  */
+    ram_rsvd2               : ORIGIN = 0x2000F000, LENGTH = 0             /* End of SRAM */
 }
 
 
@@ -60,31 +47,24 @@ ENTRY(Reset_Handler)
 
 SECTIONS
 {
-<<<<<<<< HEAD:Project_Settings/Linker_Files/linker_flash_s32k146.ldota
    .eeeprom (NOLOAD):		
    {						
     	*(.eeprom)			
     } >m_flexram			
-========
-	.eeeprom (NOLOAD):  
-    {      
-     	*(.eeprom)   
-    } >m_flexram 
->>>>>>>> 4G_PingFeng:Project_Settings/Linker_Files/linker_flash_s32k146.ld.bak2
     
 	.flash_interrupts :
 	{
-		. = ALIGN(512);
+		. = ALIGN(4096);
         __interrupts_rom_start = .;
         KEEP(*(.intc_vector))    
-        . = ALIGN(512);
+        . = ALIGN(4);
         __interrupts_rom_end = .;
 	} > int_flash_interrupts
 	
-/*	.flash_config :				*/
-/*	{							*/
-/*		KEEP(*(.flash_config))	*/
-/*	} > int_flash_config		*/
+	.flash_config :
+	{
+		KEEP(*(.flash_config))
+	} > int_flash_config
 	
 	.flash :
 	{
@@ -131,7 +111,6 @@ SECTIONS
 		__DATA_ROM = .;
 	} > int_flash
     
-    
     . = ALIGN(4);
     PROVIDE(__exidx_start = .);
     .ARM.exidx :

code/app/AppGlobalVar.c

@@ -24,6 +24,8 @@ AppConfigBody AppConfigInfo = {false, true, {defaultSn}, {0}};
 #define EEP_STOP_SEC_VAR_INIT_8_NO_CACHEABLE
 #include "Eep_MemMap.h"
 
+#define APP_RELEASE
+
 #ifdef APP_RELEASE
 const char WebSiteName[] = "\"iotp.fast-fun.cn\"";
 uint16 WebSitePort = 8712;
@@ -33,11 +35,11 @@ uint16 WebSitePort = 8812;
 #endif
 
 //*全局变量*//
-const uint32 AppSwVersion = 0x00000105;
+const uint32 AppSwVersion = 0x00010003;
 const uint8 DataModuleType = 0x02; // 01=NB,02-4G
-const uint16 HwVersion = 0x001;
+const uint16 HwVersion = 0x0101;
 const uint32 BlSwVersion = 0x00000001;
-const uint32 DrvSwVersion = 0x00000001;
+const uint32 DrvSwVersion = 0x00000004;
 const uint8 BmsManuFacture = 0xff;
 const uint8 BmsInfo = 0xff;
 uint8 TcpbattSN[BATT_SN_LEN] = {0x31};

code/app/AppTaskCan.c

@@ -28,6 +28,7 @@ void CanTask(void *pvParameters)
 	GsensorInit();
 	while (1)
 	{
+		Can_MainFunction_Read();
 		do
 		{
 			memset(&CanRxMsg, 0, sizeof(CanRxMsg));
@@ -55,7 +56,7 @@ void CanTask(void *pvParameters)
 		} while (ret == pdPASS);
 		if ((TimerCounter - timerCounterNow) >= 100)
 		{
-//			timerCANIdle = timerCANIdle + 100;
+			timerCANIdle = timerCANIdle + 100;
 			BcuRxDiagnose();
 			timerCounterNow = TimerCounter;
 		}

code/app/AppTaskUart1.c

@@ -119,20 +119,6 @@ void Uart_4G_Task(void *pvParameters)
 			}
 			break;
 		}
-		case PROCESS_TCP_ATSYS:
-		{
-			sint8 ATRet = -1;
-			AtcmdTransmit(AT_CMD_TEST, NULL, 0, &ATRet, 100);
-			if (ATRet == 0)
-			{
-				PROC_TCP_STATE_SWITCH(PROCESS_TCP_IDLE);
-			}
-			else
-			{
-				PROC_TCP_STATE_SWITCH(PROCESS_TCP_ERROR);
-			}
-			break;
-		}
 		case PROCESS_TCP_REGCHK: // 驻网检查，包括SIM，CPIN检查,ICCID获取
 		{
 			RegChkRet = TcpRegisterChkFunc();
@@ -155,6 +141,7 @@ void Uart_4G_Task(void *pvParameters)
 				if (ConnectRet > 0)
 				{
 					PROC_TCP_STATE_SWITCH(PROCESS_TCP_IDLE);
+					TcpSendTimeCounter = 0;
 				}
 				else
 				{
@@ -181,8 +168,6 @@ void Uart_4G_Task(void *pvParameters)
 		}
 		case PROCESS_TCP_RECV: // 网络数据接收,100ms空闲状态下即可接收
 		{
-			//			Dio_FlipChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1);
-
 			if (pReadLen > 0 && SocketId >= 0)
 			{
 				TcpDataInfoRecvHandle(UartRecvPtr, pReadLen);
@@ -771,7 +756,7 @@ void TcpDataEncode(uint32 *PtrSendAddr, uint16 *SendLen)
 	static UTC8TimeType UTC8TimeTcp;
 	uint8 *SendBuffer = NULL;
 	uint8 DataIdx = 0;
-	if ((TcpSendTimeCounter) % (10 * 60) == 1)
+	if ((TcpSendTimeCounter) % (60 * 60) == 1)
 	{
 		DataIdx = VerMsg; // 版本信息发送
 	}
@@ -1072,18 +1057,6 @@ void TcpDataEncode(uint32 *PtrSendAddr, uint16 *SendLen)
 	case 0x91:
 	{
 		GetCSQValue(&CSQValue);
-		if (BMS_Mode == 1)
-		{
-			BMS_Mode = 2;
-		}
-		else if (BMS_Mode == 2)
-		{
-			BMS_Mode = 3;
-		}
-		else
-		{
-			BMS_Mode = 1;
-		}
 		*SendLen = 0x54 + min(BMS_CellTotal, BMS_CELL_MAX_NUM) * 2 + min(BMS_TempTotal, BMS_TEMP_MAX_NUM);
 		SendBuffer = pvPortMalloc(*SendLen);
 		*(SendBuffer + 0) = TCP_START_SYM1;