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@@ -61,14 +61,14 @@ extern "C" {
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/* List of configurations for interrupts */
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/* List of configurations for interrupts */
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static const IntCtrl_Ip_IrqConfigType aIrqConfiguration[] = {
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static const IntCtrl_Ip_IrqConfigType aIrqConfiguration[] = {
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- {DMA0_IRQn, (boolean)TRUE, 0U},
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- {DMA1_IRQn, (boolean)TRUE, 0U},
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- {DMA2_IRQn, (boolean)TRUE, 0U},
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- {DMA3_IRQn, (boolean)TRUE, 3U},
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- {DMA4_IRQn, (boolean)TRUE, 3U},
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- {DMA5_IRQn, (boolean)TRUE, 3U},
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- {DMA6_IRQn, (boolean)TRUE, 3U},
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- {DMA7_IRQn, (boolean)TRUE, 3U},
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+ {DMA0_IRQn, (boolean)TRUE, 6U},
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+ {DMA1_IRQn, (boolean)TRUE, 6U},
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+ {DMA2_IRQn, (boolean)TRUE, 6U},
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+ {DMA3_IRQn, (boolean)TRUE, 7U},
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+ {DMA4_IRQn, (boolean)TRUE, 7U},
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+ {DMA5_IRQn, (boolean)TRUE, 7U},
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+ {DMA6_IRQn, (boolean)TRUE, 7U},
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+ {DMA7_IRQn, (boolean)TRUE, 7U},
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{DMA8_IRQn, (boolean)FALSE, 0U},
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{DMA8_IRQn, (boolean)FALSE, 0U},
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{DMA9_IRQn, (boolean)FALSE, 0U},
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{DMA9_IRQn, (boolean)FALSE, 0U},
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{DMA10_IRQn, (boolean)FALSE, 0U},
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{DMA10_IRQn, (boolean)FALSE, 0U},
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@@ -89,10 +89,10 @@ static const IntCtrl_Ip_IrqConfigType aIrqConfiguration[] = {
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{LPI2C0_Slave_IRQn, (boolean)TRUE, 0U},
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{LPI2C0_Slave_IRQn, (boolean)TRUE, 0U},
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{LPSPI0_IRQn, (boolean)FALSE, 0U},
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{LPSPI0_IRQn, (boolean)FALSE, 0U},
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{LPSPI1_IRQn, (boolean)FALSE, 0U},
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{LPSPI1_IRQn, (boolean)FALSE, 0U},
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- {LPSPI2_IRQn, (boolean)TRUE, 3U},
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- {LPUART0_RxTx_IRQn, (boolean)TRUE, 3U},
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- {LPUART1_RxTx_IRQn, (boolean)TRUE, 3U},
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- {LPUART2_RxTx_IRQn, (boolean)TRUE, 3U},
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+ {LPSPI2_IRQn, (boolean)TRUE, 7U},
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+ {LPUART0_RxTx_IRQn, (boolean)TRUE, 7U},
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+ {LPUART1_RxTx_IRQn, (boolean)TRUE, 7U},
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+ {LPUART2_RxTx_IRQn, (boolean)TRUE, 7U},
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{ADC0_IRQn, (boolean)FALSE, 0U},
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{ADC0_IRQn, (boolean)FALSE, 0U},
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{ADC1_IRQn, (boolean)TRUE, 0U},
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{ADC1_IRQn, (boolean)TRUE, 0U},
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{CMP0_IRQn, (boolean)FALSE, 0U},
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{CMP0_IRQn, (boolean)FALSE, 0U},
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@@ -120,10 +120,10 @@ static const IntCtrl_Ip_IrqConfigType aIrqConfiguration[] = {
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{CAN0_Wake_Up_IRQn, (boolean)TRUE, 0U},
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{CAN0_Wake_Up_IRQn, (boolean)TRUE, 0U},
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{CAN0_ORed_0_15_MB_IRQn, (boolean)TRUE, 0U},
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{CAN0_ORed_0_15_MB_IRQn, (boolean)TRUE, 0U},
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{CAN0_ORed_16_31_MB_IRQn, (boolean)TRUE, 0U},
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{CAN0_ORed_16_31_MB_IRQn, (boolean)TRUE, 0U},
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- {CAN1_ORed_IRQn, (boolean)TRUE, 0U},
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- {CAN1_Error_IRQn, (boolean)TRUE, 0U},
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- {CAN1_ORed_0_15_MB_IRQn, (boolean)TRUE, 0U},
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- {CAN1_ORed_16_31_MB_IRQn, (boolean)TRUE, 0U},
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+ {CAN1_ORed_IRQn, (boolean)TRUE, 7U},
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+ {CAN1_Error_IRQn, (boolean)TRUE, 7U},
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+ {CAN1_ORed_0_15_MB_IRQn, (boolean)TRUE, 7U},
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+ {CAN1_ORed_16_31_MB_IRQn, (boolean)TRUE, 7U},
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{CAN2_ORed_IRQn, (boolean)FALSE, 0U},
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{CAN2_ORed_IRQn, (boolean)FALSE, 0U},
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{CAN2_Error_IRQn, (boolean)FALSE, 0U},
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{CAN2_Error_IRQn, (boolean)FALSE, 0U},
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{CAN2_ORed_0_15_MB_IRQn, (boolean)FALSE, 0U},
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{CAN2_ORed_0_15_MB_IRQn, (boolean)FALSE, 0U},
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