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@@ -1,7 +1,7 @@
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/*==================================================================================================
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* Project : RTD AUTOSAR 4.4
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* Platform : CORTEXM
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-* Peripheral :
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+* Peripheral :
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* Dependencies : none
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*
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* Autosar Version : 4.4.0
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@@ -22,9 +22,9 @@
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* activate or otherwise use the software.
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==================================================================================================*/
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-
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#ifdef __cplusplus
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-extern "C" {
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+extern "C"
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+{
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#endif
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/*==================================================================================================
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@@ -34,24 +34,23 @@ extern "C" {
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/*==================================================================================================
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* SOURCE FILE VERSION INFORMATION
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==================================================================================================*/
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-#define PLATFORM_INTCTRL_IP_CFG_VENDOR_ID_C 43
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-#define PLATFORM_INTCTRL_IP_CFG_SW_MAJOR_VERSION_C 1
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-#define PLATFORM_INTCTRL_IP_CFG_SW_MINOR_VERSION_C 0
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-#define PLATFORM_INTCTRL_IP_CFG_SW_PATCH_VERSION_C 0
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+#define PLATFORM_INTCTRL_IP_CFG_VENDOR_ID_C 43
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+#define PLATFORM_INTCTRL_IP_CFG_SW_MAJOR_VERSION_C 1
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+#define PLATFORM_INTCTRL_IP_CFG_SW_MINOR_VERSION_C 0
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+#define PLATFORM_INTCTRL_IP_CFG_SW_PATCH_VERSION_C 0
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/*==================================================================================================
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FILE VERSION CHECKS
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==================================================================================================*/
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/* Check if current file and IntCtrl_Ip_Cfg header file are of the same vendor */
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#if (PLATFORM_INTCTRL_IP_CFG_VENDOR_ID_C != PLATFORM_INTCTRL_IP_CFG_VENDOR_ID)
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- #error "IntCtrl_Ip_Cfg.c and IntCtrl_Ip_Cfg.h have different vendor ids"
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+#error "IntCtrl_Ip_Cfg.c and IntCtrl_Ip_Cfg.h have different vendor ids"
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#endif
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/* Check if current file and IntCtrl_Ip_Cfg header file are of the same Software version */
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#if ((PLATFORM_INTCTRL_IP_CFG_SW_MAJOR_VERSION_C != PLATFORM_INTCTRL_IP_CFG_SW_MAJOR_VERSION) || \
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(PLATFORM_INTCTRL_IP_CFG_SW_MINOR_VERSION_C != PLATFORM_INTCTRL_IP_CFG_SW_MINOR_VERSION) || \
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- (PLATFORM_INTCTRL_IP_CFG_SW_PATCH_VERSION_C != PLATFORM_INTCTRL_IP_CFG_SW_PATCH_VERSION) \
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- )
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- #error "Software Version Numbers of IntCtrl_Ip_Cfg.c and IntCtrl_Ip_Cfg.h are different"
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+ (PLATFORM_INTCTRL_IP_CFG_SW_PATCH_VERSION_C != PLATFORM_INTCTRL_IP_CFG_SW_PATCH_VERSION))
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+#error "Software Version Numbers of IntCtrl_Ip_Cfg.c and IntCtrl_Ip_Cfg.h are different"
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#endif
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/*==================================================================================================
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GLOBAL VARIABLES
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@@ -59,120 +58,119 @@ extern "C" {
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#define PLATFORM_START_SEC_CONFIG_DATA_UNSPECIFIED
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#include "Platform_MemMap.h"
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-/* List of configurations for interrupts */
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-static const IntCtrl_Ip_IrqConfigType aIrqConfiguration[] = {
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- {DMA0_IRQn, (boolean)TRUE, 6U},
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- {DMA1_IRQn, (boolean)TRUE, 6U},
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- {DMA2_IRQn, (boolean)TRUE, 6U},
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- {DMA3_IRQn, (boolean)TRUE, 7U},
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- {DMA4_IRQn, (boolean)TRUE, 7U},
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- {DMA5_IRQn, (boolean)TRUE, 7U},
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- {DMA6_IRQn, (boolean)FALSE, 0U},
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- {DMA7_IRQn, (boolean)FALSE, 0U},
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- {DMA8_IRQn, (boolean)FALSE, 0U},
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- {DMA9_IRQn, (boolean)FALSE, 0U},
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- {DMA10_IRQn, (boolean)FALSE, 0U},
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- {DMA11_IRQn, (boolean)FALSE, 0U},
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- {DMA12_IRQn, (boolean)FALSE, 0U},
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- {DMA13_IRQn, (boolean)FALSE, 0U},
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- {DMA14_IRQn, (boolean)FALSE, 0U},
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- {DMA15_IRQn, (boolean)FALSE, 0U},
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- {DMA_Error_IRQn, (boolean)FALSE, 0U},
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- {MCM_IRQn, (boolean)FALSE, 0U},
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- {FTFC_CMD_IRQn, (boolean)FALSE, 0U},
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- {FTFC_Read_Collision_IRQn, (boolean)FALSE, 0U},
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- {LVD_LVW_IRQn, (boolean)FALSE, 0U},
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- {FTFC_Fault_IRQn, (boolean)FALSE, 0U},
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- {WDOG_EWM_IRQn, (boolean)TRUE, 5U},
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- {RCM_IRQn, (boolean)FALSE, 0U},
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- {LPI2C0_Master_IRQn, (boolean)FALSE, 0U},
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- {LPI2C0_Slave_IRQn, (boolean)FALSE, 0U},
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- {LPSPI0_IRQn, (boolean)FALSE, 0U},
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- {LPSPI1_IRQn, (boolean)FALSE, 0U},
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- {LPSPI2_IRQn, (boolean)TRUE, 6U},
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- {LPUART0_RxTx_IRQn, (boolean)TRUE, 6U},
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- {LPUART1_RxTx_IRQn, (boolean)TRUE, 6U},
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- {LPUART2_RxTx_IRQn, (boolean)TRUE, 6U},
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- {ADC0_IRQn, (boolean)FALSE, 0U},
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- {ADC1_IRQn, (boolean)TRUE, 7U},
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- {CMP0_IRQn, (boolean)FALSE, 0U},
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- {ERM_single_fault_IRQn, (boolean)FALSE, 0U},
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- {ERM_double_fault_IRQn, (boolean)FALSE, 0U},
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- {RTC_IRQn, (boolean)FALSE, 0U},
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- {RTC_Seconds_IRQn, (boolean)FALSE, 0U},
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- {LPIT0_Ch0_IRQn, (boolean)TRUE, 5U},
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- {LPIT0_Ch1_IRQn, (boolean)FALSE, 0U},
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- {LPIT0_Ch2_IRQn, (boolean)FALSE, 0U},
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- {LPIT0_Ch3_IRQn, (boolean)FALSE, 0U},
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- {PDB0_IRQn, (boolean)FALSE, 0U},
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- {SCG_IRQn, (boolean)FALSE, 0U},
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- {LPTMR0_IRQn, (boolean)FALSE, 0U},
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- {PORTA_IRQn, (boolean)FALSE, 0U},
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- {PORTB_IRQn, (boolean)FALSE, 0U},
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- {PORTC_IRQn, (boolean)FALSE, 0U},
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- {PORTD_IRQn, (boolean)FALSE, 0U},
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- {PORTE_IRQn, (boolean)FALSE, 0U},
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- {SWI_IRQn, (boolean)FALSE, 0U},
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- {PDB1_IRQn, (boolean)FALSE, 0U},
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- {FLEXIO_IRQn, (boolean)FALSE, 0U},
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- {CAN0_ORed_IRQn, (boolean)TRUE, 7U},
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- {CAN0_Error_IRQn, (boolean)TRUE, 7U},
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- {CAN0_Wake_Up_IRQn, (boolean)TRUE, 7U},
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- {CAN0_ORed_0_15_MB_IRQn, (boolean)TRUE, 7U},
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- {CAN0_ORed_16_31_MB_IRQn, (boolean)TRUE, 7U},
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- {CAN1_ORed_IRQn, (boolean)TRUE, 7U},
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- {CAN1_Error_IRQn, (boolean)TRUE, 7U},
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- {CAN1_ORed_0_15_MB_IRQn, (boolean)TRUE, 7U},
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- {CAN1_ORed_16_31_MB_IRQn, (boolean)TRUE, 7U},
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- {CAN2_ORed_IRQn, (boolean)FALSE, 0U},
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- {CAN2_Error_IRQn, (boolean)FALSE, 0U},
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- {CAN2_ORed_0_15_MB_IRQn, (boolean)FALSE, 0U},
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- {FTM0_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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- {FTM0_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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- {FTM0_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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- {FTM0_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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- {FTM0_Fault_IRQn, (boolean)FALSE, 0U},
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- {FTM0_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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- {FTM1_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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- {FTM1_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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- {FTM1_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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- {FTM1_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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- {FTM1_Fault_IRQn, (boolean)FALSE, 0U},
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- {FTM1_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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- {FTM2_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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- {FTM2_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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- {FTM2_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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- {FTM2_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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- {FTM2_Fault_IRQn, (boolean)FALSE, 0U},
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- {FTM2_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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- {FTM3_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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- {FTM3_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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- {FTM3_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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- {FTM3_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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- {FTM3_Fault_IRQn, (boolean)FALSE, 0U},
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- {FTM3_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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- {FTM4_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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- {FTM4_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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- {FTM4_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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- {FTM4_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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- {FTM4_Fault_IRQn, (boolean)FALSE, 0U},
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- {FTM4_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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- {FTM5_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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- {FTM5_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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- {FTM5_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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- {FTM5_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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- {FTM5_Fault_IRQn, (boolean)FALSE, 0U},
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- {FTM5_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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-};
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+ /* List of configurations for interrupts */
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+ static const IntCtrl_Ip_IrqConfigType aIrqConfiguration[] = {
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+ {DMA0_IRQn, (boolean)TRUE, 6U},
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+ {DMA1_IRQn, (boolean)TRUE, 6U},
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+ {DMA2_IRQn, (boolean)TRUE, 6U},
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+ {DMA3_IRQn, (boolean)TRUE, 7U},
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+ {DMA4_IRQn, (boolean)TRUE, 7U},
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+ {DMA5_IRQn, (boolean)TRUE, 7U},
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+ {DMA6_IRQn, (boolean)FALSE, 0U},
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+ {DMA7_IRQn, (boolean)FALSE, 0U},
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+ {DMA8_IRQn, (boolean)FALSE, 0U},
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+ {DMA9_IRQn, (boolean)FALSE, 0U},
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+ {DMA10_IRQn, (boolean)FALSE, 0U},
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+ {DMA11_IRQn, (boolean)FALSE, 0U},
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+ {DMA12_IRQn, (boolean)FALSE, 0U},
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+ {DMA13_IRQn, (boolean)FALSE, 0U},
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+ {DMA14_IRQn, (boolean)FALSE, 0U},
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+ {DMA15_IRQn, (boolean)FALSE, 0U},
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+ {DMA_Error_IRQn, (boolean)FALSE, 0U},
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+ {MCM_IRQn, (boolean)FALSE, 0U},
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+ {FTFC_CMD_IRQn, (boolean)FALSE, 0U},
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+ {FTFC_Read_Collision_IRQn, (boolean)FALSE, 0U},
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+ {LVD_LVW_IRQn, (boolean)FALSE, 0U},
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+ {FTFC_Fault_IRQn, (boolean)FALSE, 0U},
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+ {WDOG_EWM_IRQn, (boolean)TRUE, 5U},
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+ {RCM_IRQn, (boolean)FALSE, 0U},
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+ {LPI2C0_Master_IRQn, (boolean)FALSE, 0U},
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+ {LPI2C0_Slave_IRQn, (boolean)FALSE, 0U},
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+ {LPSPI0_IRQn, (boolean)FALSE, 0U},
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+ {LPSPI1_IRQn, (boolean)FALSE, 0U},
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+ {LPSPI2_IRQn, (boolean)TRUE, 6U},
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+ {LPUART0_RxTx_IRQn, (boolean)TRUE, 6U},
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+ {LPUART1_RxTx_IRQn, (boolean)TRUE, 6U},
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+ {LPUART2_RxTx_IRQn, (boolean)TRUE, 6U},
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+ {ADC0_IRQn, (boolean)FALSE, 0U},
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+ {ADC1_IRQn, (boolean)TRUE, 7U},
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+ {CMP0_IRQn, (boolean)FALSE, 0U},
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+ {ERM_single_fault_IRQn, (boolean)FALSE, 0U},
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+ {ERM_double_fault_IRQn, (boolean)FALSE, 0U},
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+ {RTC_IRQn, (boolean)FALSE, 0U},
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+ {RTC_Seconds_IRQn, (boolean)FALSE, 0U},
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+ {LPIT0_Ch0_IRQn, (boolean)TRUE, 5U},
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+ {LPIT0_Ch1_IRQn, (boolean)FALSE, 0U},
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+ {LPIT0_Ch2_IRQn, (boolean)FALSE, 0U},
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+ {LPIT0_Ch3_IRQn, (boolean)FALSE, 0U},
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+ {PDB0_IRQn, (boolean)FALSE, 0U},
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+ {SCG_IRQn, (boolean)FALSE, 0U},
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+ {LPTMR0_IRQn, (boolean)FALSE, 0U},
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+ {PORTA_IRQn, (boolean)FALSE, 0U},
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+ {PORTB_IRQn, (boolean)FALSE, 0U},
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+ {PORTC_IRQn, (boolean)FALSE, 0U},
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+ {PORTD_IRQn, (boolean)FALSE, 0U},
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+ {PORTE_IRQn, (boolean)FALSE, 0U},
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+ {SWI_IRQn, (boolean)FALSE, 0U},
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+ {PDB1_IRQn, (boolean)FALSE, 0U},
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+ {FLEXIO_IRQn, (boolean)FALSE, 0U},
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+ {CAN0_ORed_IRQn, (boolean)TRUE, 7U},
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+ {CAN0_Error_IRQn, (boolean)TRUE, 7U},
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+ {CAN0_Wake_Up_IRQn, (boolean)TRUE, 7U},
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+ {CAN0_ORed_0_15_MB_IRQn, (boolean)TRUE, 7U},
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+ {CAN0_ORed_16_31_MB_IRQn, (boolean)TRUE, 7U},
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+ {CAN1_ORed_IRQn, (boolean)TRUE, 7U},
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+ {CAN1_Error_IRQn, (boolean)TRUE, 7U},
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+ {CAN1_ORed_0_15_MB_IRQn, (boolean)TRUE, 7U},
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+ {CAN1_ORed_16_31_MB_IRQn, (boolean)TRUE, 7U},
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+ {CAN2_ORed_IRQn, (boolean)FALSE, 0U},
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+ {CAN2_Error_IRQn, (boolean)FALSE, 0U},
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+ {CAN2_ORed_0_15_MB_IRQn, (boolean)FALSE, 0U},
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+ {FTM0_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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+ {FTM0_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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+ {FTM0_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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+ {FTM0_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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+ {FTM0_Fault_IRQn, (boolean)FALSE, 0U},
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+ {FTM0_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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+ {FTM1_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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+ {FTM1_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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+ {FTM1_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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+ {FTM1_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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+ {FTM1_Fault_IRQn, (boolean)FALSE, 0U},
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+ {FTM1_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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+ {FTM2_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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+ {FTM2_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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+ {FTM2_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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+ {FTM2_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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+ {FTM2_Fault_IRQn, (boolean)FALSE, 0U},
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+ {FTM2_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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+ {FTM3_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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+ {FTM3_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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+ {FTM3_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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+ {FTM3_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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+ {FTM3_Fault_IRQn, (boolean)FALSE, 0U},
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+ {FTM3_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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+ {FTM4_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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+ {FTM4_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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+ {FTM4_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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+ {FTM4_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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+ {FTM4_Fault_IRQn, (boolean)FALSE, 0U},
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+ {FTM4_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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+ {FTM5_Ch0_Ch1_IRQn, (boolean)FALSE, 0U},
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+ {FTM5_Ch2_Ch3_IRQn, (boolean)FALSE, 0U},
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+ {FTM5_Ch4_Ch5_IRQn, (boolean)FALSE, 0U},
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+ {FTM5_Ch6_Ch7_IRQn, (boolean)FALSE, 0U},
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+ {FTM5_Fault_IRQn, (boolean)FALSE, 0U},
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+ {FTM5_Ovf_Reload_IRQn, (boolean)FALSE, 0U},
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+ };
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+
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+ /* Configuration structure for interrupt controller */
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+ const IntCtrl_Ip_CtrlConfigType intCtrlConfig = {
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+ 102U,
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+ aIrqConfiguration};
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-/* Configuration structure for interrupt controller */
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-const IntCtrl_Ip_CtrlConfigType intCtrlConfig = {
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- 102U,
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- aIrqConfiguration
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-};
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-
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-/* List of configurations for routing interrupts */
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-static const IntCtrl_Ip_IrqRouteConfigType aIrqRouteConfig[] = {
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+ /* List of configurations for routing interrupts */
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+ static const IntCtrl_Ip_IrqRouteConfigType aIrqRouteConfig[] = {
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{DMA0_IRQn, 0U, Dma0_Ch0_IRQHandler},
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{DMA1_IRQn, 0U, Dma0_Ch1_IRQHandler},
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{DMA2_IRQn, 0U, Dma0_Ch2_IRQHandler},
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@@ -276,12 +274,10 @@ static const IntCtrl_Ip_IrqRouteConfigType aIrqRouteConfig[] = {
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{FTM5_Fault_IRQn, 0U, undefined_handler},
|
|
|
{FTM5_Ovf_Reload_IRQn, 0U, undefined_handler},
|
|
|
};
|
|
|
-/* Configuration structure for routing interrupt */
|
|
|
-const IntCtrl_Ip_GlobalRouteConfigType intRouteConfig = {
|
|
|
- 102U,
|
|
|
- aIrqRouteConfig
|
|
|
-};
|
|
|
-
|
|
|
+ /* Configuration structure for routing interrupt */
|
|
|
+ const IntCtrl_Ip_GlobalRouteConfigType intRouteConfig = {
|
|
|
+ 102U,
|
|
|
+ aIrqRouteConfig};
|
|
|
|
|
|
#define PLATFORM_STOP_SEC_CONFIG_DATA_UNSPECIFIED
|
|
|
#include "Platform_MemMap.h"
|