加入BootLoader，看门狗，CAN刷写

Project_Settings/Linker_Files/linker_flash_s32k146.ld

@@ -31,13 +31,14 @@
 
 MEMORY
 {         
-    int_flash_interrupts    : ORIGIN = 0x00000000, LENGTH = 0x00000400    /* 1K */    /* Do not change this section */
-    int_flash_config        : ORIGIN = 0x00000400, LENGTH = 0x00000010    /* 16bytes */ /* Do not change this section */
-    int_flash               : ORIGIN = 0x00000410, LENGTH = 0x000FFBF0    /* ~1.0MB */ 
+    int_flash_interrupts    : ORIGIN = 0x00014200, LENGTH = 0x00000400    /* 1K */    /* Do not change this section */
+   /* int_flash_config        : ORIGIN = 0x00000400, LENGTH = 0x00000010    /* 16bytes */ /* Do not change this section */
+    int_flash               : ORIGIN = 0x00014600, LENGTH = 0x000EBA00    /* ~1.0MB */ 
     int_sram_results        : ORIGIN = 0x1FFF0000, LENGTH = 0x00000100    /* 256bytes */
     int_sram                : ORIGIN = 0x1FFF0100, LENGTH = 0x0001DF00    /* ~120K */
-    int_sram_stack_c0       : ORIGIN = 0x2000E000, LENGTH = 0x00001000    /* 4K  */
-    ram_rsvd2               : ORIGIN = 0x2000F000, LENGTH = 0             /* End of SRAM */
+    int_sram_stack_c0       : ORIGIN = 0x2000E000, LENGTH = 0x00001000 - 0x10    /* 4K  */
+    ram_rsvd2               : ORIGIN = 0x2000EFF0, LENGTH = 0             /* End of SRAM */
+    ExchangeInfo            : ORIGIN = 0x2000EFF0, LENGTH = 0x10          
 }
 
 
@@ -50,17 +51,17 @@ SECTIONS
     
 	.flash_interrupts :
 	{
-		. = ALIGN(4096);
+		. = ALIGN(512);
         __interrupts_rom_start = .;
         KEEP(*(.intc_vector))    
-        . = ALIGN(4);
+        . = ALIGN(512);
         __interrupts_rom_end = .;
 	} > int_flash_interrupts
 	
-	.flash_config :
-	{
-		KEEP(*(.flash_config))
-	} > int_flash_config
+/*	.flash_config :				*/
+/*	{							*/
+/*		KEEP(*(.flash_config))	*/
+/*	} > int_flash_config		*/
 	
 	.flash :
 	{

Project_Settings/Linker_Files/linker_flash_s32k147.ld.bak

@@ -0,0 +1,230 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+/*
+* GCC Linker Command File:
+* 0x00000000    0x000FFFFF  1024KB   Flash
+* 0x1FFF0000    0x1FFFFFFF  65536  SRAM_L
+* 0x20000000    0x2000EFFF  61440  SRAM_U
+*/
+
+
+MEMORY
+{         
+    int_flash_interrupts    : ORIGIN = 0x00000000, LENGTH = 0x00000400    /* 1K */    /* Do not change this section */
+    int_flash_config        : ORIGIN = 0x00000400, LENGTH = 0x00000010    /* 16bytes */ /* Do not change this section */
+    int_flash               : ORIGIN = 0x00000410, LENGTH = 0x000FFBF0    /* ~1.0MB */ 
+    int_sram_results        : ORIGIN = 0x1FFF0000, LENGTH = 0x00000100    /* 256bytes */
+    int_sram                : ORIGIN = 0x1FFF0100, LENGTH = 0x0001DF00    /* ~120K */
+    int_sram_stack_c0       : ORIGIN = 0x2000E000, LENGTH = 0x00001000    /* 4K  */
+    ram_rsvd2               : ORIGIN = 0x2000F000, LENGTH = 0             /* End of SRAM */
+}
+
+
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x00000200;
+
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+    
+	.flash_interrupts :
+	{
+		. = ALIGN(4096);
+        __interrupts_rom_start = .;
+        KEEP(*(.intc_vector))    
+        . = ALIGN(4);
+        __interrupts_rom_end = .;
+	} > int_flash_interrupts
+	
+	.flash_config :
+	{
+		KEEP(*(.flash_config))
+	} > int_flash_config
+	
+	.flash :
+	{
+        . = ALIGN(4);
+        *(.startup) 
+        . = ALIGN(4);
+        *(.systeminit) 
+        . = ALIGN(4);
+        *(.text.startup) 
+        . = ALIGN(4);
+        *(.text)
+        *(.text*) 
+        . = ALIGN(4);
+        *(.mcal_text) 
+        . = ALIGN(4);
+        acfls_code_rom_start = .;
+        . = ALIGN(0x4);
+        *(.acfls_code_rom)
+        acfls_code_rom_end = .;
+        KEEP(*(.init))
+        . = ALIGN(4);
+        KEEP(*(.fini)) 
+         
+        . = ALIGN(4);
+        *(.rodata)  
+        *(.rodata*)  
+        . = ALIGN(4);
+        *(.mcal_const_cfg)  
+        . = ALIGN(4);
+        *(.mcal_const)
+        . = ALIGN(4);
+        *(.mcal_const_no_cacheable)		
+        . = ALIGN(4);
+        __init_table = .;
+        KEEP(*(.init_table))  
+        . = ALIGN(4);
+        __zero_table = .;
+        KEEP(*(.zero_table))
+
+        . = ALIGN(4);
+        *(.acmcu_code_rom) 	
+		. = ALIGN(4);
+		_etext = .;
+		__DATA_ROM = .;
+	} > int_flash
+    
+    . = ALIGN(4);
+    PROVIDE(__exidx_start = .);
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    }> int_sram
+    . = ALIGN(4);
+    PROVIDE(__exidx_end = .);
+    
+    .ARM.extab :
+    {
+        *(.ARM.extab*)
+        . = ALIGN(4);
+    } > int_sram
+    
+	.sram_interrupts :
+    {
+		. = ALIGN(4096);
+		__interrupts_ram_start = .;
+		. += (__interrupts_rom_end - __interrupts_rom_start);
+		. = ALIGN(4);
+		__interrupts_ram_end = .;
+	} > int_sram
+       
+    .sram_data :  AT(__DATA_ROM)
+    {
+        . = ALIGN(4);
+		__data_ram_start = .;
+        *(.ramcode)    
+        . = ALIGN(4);
+        *(.data)  
+        *(.data*)
+        . = ALIGN(4);
+        *(.mcal_data)  
+		. = ALIGN(4);
+        *(.mcal_data_no_cacheable)     
+		. = ALIGN(4);
+		__data_ram_end = .;
+	} > int_sram
+	
+	__DATA_ROM_END = __DATA_ROM + (__data_ram_end - __data_ram_start);
+	
+	.sram_bss (NOLOAD) :
+	{
+        . = ALIGN(16);
+        __sram_bss_start = .;
+        *(.bss)
+        *(.bss*)
+        . = ALIGN(16);
+        *(.mcal_bss)
+		. = ALIGN(16);
+        __non_cacheable_bss_start = .;
+        *(.mcal_bss_no_cacheable)      
+        . = ALIGN(4);
+        __non_cacheable_bss_end = .;   
+        __sram_bss_end = .;
+    } > int_sram
+
+    
+    .acfls_code_ram :
+    {
+        . += (acfls_code_rom_end - acfls_code_rom_start );
+    } > int_sram
+	
+    /* heap section */
+    .heap (NOLOAD):
+    {
+    	.  = ALIGN(4);
+	    _end = .;
+	    end = .;
+        _heap_start = .;
+        . += HEAP_SIZE;
+        _heap_end = .;
+    } > int_sram
+    
+
+	int_results (NOLOAD):
+	{
+		. = ALIGN(4);
+        KEEP(*(.int_results))  
+        . += 0x100;
+	} > int_sram_results
+
+    __Stack_end_c0           = ORIGIN(int_sram_stack_c0);
+    __Stack_start_c0         = ORIGIN(int_sram_stack_c0) + LENGTH(int_sram_stack_c0);
+
+    __INT_SRAM_START         = ORIGIN(int_sram_results);
+    __INT_SRAM_END           = ORIGIN(ram_rsvd2);
+    
+    __RAM_INIT_START    = __data_ram_start;
+    __RAM_INIT_END      = __data_ram_end;
+    __ROM_INIT_START    = __DATA_ROM;
+    __ROM_INIT_END      = __DATA_ROM_END;
+    
+    __BSS_SRAM_START         = __sram_bss_start;
+    __BSS_SRAM_END           = __sram_bss_end;
+    __BSS_SRAM_SIZE          = __sram_bss_end - __sram_bss_start;
+
+    __RAM_INTERRUPT_START    = __interrupts_ram_start;
+    __ROM_INTERRUPT_START    = __interrupts_rom_start;
+    __ROM_INTERRUPT_END      = __interrupts_rom_end;
+
+    __INIT_TABLE             = __init_table;
+    __ZERO_TABLE             = __zero_table;
+    
+    __RAM_INIT               = 1;
+	
+    /* Fls module access code support */    
+    Fls_ACEraseRomStart         = acfls_code_rom_start;
+    Fls_ACEraseRomEnd           = acfls_code_rom_end;
+    Fls_ACEraseSize             = acfls_code_rom_end - acfls_code_rom_start;
+
+    Fls_ACWriteRomStart         = acfls_code_rom_start;
+    Fls_ACWriteRomEnd           = acfls_code_rom_end;
+    Fls_ACWriteSize             = acfls_code_rom_end - acfls_code_rom_start;
+    
+    _ERASE_FUNC_ADDRESS_        = ADDR(.acfls_code_ram);
+    _WRITE_FUNC_ADDRESS_        = ADDR(.acfls_code_ram);
+	
+    __ENTRY_VTABLE              = __RAM_INTERRUPT_START;
+}

RTD/include/Adc.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Adc_Ip.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Adc_Ip_HeaderWrapper_S32K14x_Extended.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Adc_Ip_HeaderWrapper_S32K1xx.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Adc_Ip_HwAccess.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Adc_Ip_Types.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Adc_Ipw.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Adc_Ipw_Irq.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Adc_Ipw_Types.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Adc_Types.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Det.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Det_stub.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Eep.h

@@ -0,0 +1,420 @@
+
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : IPV_FTFC
+* Dependencies : 
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef EEP_H
+#define EEP_H
+
+/**
+* @file
+*
+* @addtogroup EEP_DRIVER Eeprom Driver
+* @{
+*/
+/* implements Eep.h_Artifact */
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+                                         INCLUDE FILES
+ 1) system and project includes
+ 2) needed interfaces from external units
+ 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Eep_Cfg.h"
+#include "SchM_Eep.h"
+#include "StandardTypes.h"
+#if (STD_ON == EEP_MCORE_ENABLED)
+#include "CDD_Rm.h"
+#endif /* EEP_MCORE_ENABLED */
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define EEP_VENDOR_ID            43
+#define EEP_MODULE_ID            90
+#define EEP_INSTANCE_ID          0U
+#define EEP_AR_RELEASE_MAJOR_VERSION     4
+#define EEP_AR_RELEASE_MINOR_VERSION     4
+#define EEP_AR_RELEASE_REVISION_VERSION  0
+#define EEP_SW_MAJOR_VERSION             1
+#define EEP_SW_MINOR_VERSION             0
+#define EEP_SW_PATCH_VERSION             0
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+
+/* Check if header file and Eep_Cfg.h header file are of the same vendor */
+#if (EEP_VENDOR_ID != EEP_VENDOR_ID_CFG)
+    #error "Eep.h and Eep_Cfg.h have different vendor ids"
+#endif
+/* Check if header file and Eep_Cfg.h header file are of the same Autosar version */
+#if ((EEP_AR_RELEASE_MAJOR_VERSION    != EEP_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (EEP_AR_RELEASE_MINOR_VERSION    != EEP_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (EEP_AR_RELEASE_REVISION_VERSION != EEP_AR_RELEASE_REVISION_VERSION_CFG) \
+    )
+    #error "AutoSar Version Numbers of Eep.h and Eep_Cfg.h are different"
+#endif
+/* Check if header file and Eep_Cfg.h header file are of the same software version */
+#if ((EEP_SW_MAJOR_VERSION != EEP_SW_MAJOR_VERSION_CFG) || \
+     (EEP_SW_MINOR_VERSION != EEP_SW_MINOR_VERSION_CFG) || \
+     (EEP_SW_PATCH_VERSION != EEP_SW_PATCH_VERSION_CFG) \
+    )
+    #error "Software Version Numbers of Eep.h and Eep_Cfg.h are different"
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and StandardTypes.h file are of the same version */
+    #if ((EEP_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
+         (EEP_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION)\
+        )
+        #error "AutoSar Version Numbers of Eep.h and StandardTypes.h are different"
+    #endif
+    /* Check if current file and SchM_Eep.h file are of the same version */
+    #if ((EEP_AR_RELEASE_MAJOR_VERSION != SCHM_EEP_AR_RELEASE_MAJOR_VERSION) || \
+         (EEP_AR_RELEASE_MINOR_VERSION != SCHM_EEP_AR_RELEASE_MINOR_VERSION)\
+        )
+        #error "AutoSar Version Numbers of Eep.h and SchM_Eep.h are different"
+    #endif
+#endif
+
+#if (STD_ON == EEP_MCORE_ENABLED)
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and CDD_Rm header file are of the same Autosar version */
+    #if ((EEP_AR_RELEASE_MAJOR_VERSION != RM_AR_RELEASE_MAJOR_VERSION) || \
+         (EEP_AR_RELEASE_MINOR_VERSION != RM_AR_RELEASE_MINOR_VERSION) \
+        )
+        #error "AutoSar Version Numbers of Eep.c and CDD_Rm.h are different"
+    #endif
+#endif
+#endif /* EEP_MCORE_ENABLED */
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+#define EEP_START_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Eep_MemMap.h"
+
+EEP_CONFIG_EXT
+
+#define EEP_STOP_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Eep_MemMap.h"
+
+/**
+* @brief          Development error codes (passed to DET).
+*
+*/
+
+/**
+*   @brief service ID of function: Eep_Init. (passed to DET)
+*/
+#define EEP_E_INIT_FAILED            0x10U
+/**
+*   @brief service ID of error: TargetAddress is not in range and aligned to first byte of eeprom sector. (passed to DET)
+*/
+#define EEP_E_PARAM_ADDRESS          0x11U
+/**
+*   @brief service ID of error: NULL_PTR == SourceAddressPtr. (passed to DET)
+*/
+#define EEP_E_PARAM_DATA             0x12U
+/**
+*   @brief service ID of error: TargetAddress is not in range and aligned to last byte of eeprom sector. (passed to DET)
+*/
+#define EEP_E_PARAM_LENGTH           0x13U
+/**
+*   @brief service ID of error: API service called without module initialization. (passed to DET)
+*/
+#define EEP_E_UNINIT                 0x20U
+/**
+*   @brief service ID of error: API service called while driver still busy. (passed to DET)
+*/
+#define EEP_E_BUSY                   0x21U
+/**
+*   @brief service ID of error: The hardware operation did not finish before timeout expired. (passed to DET)
+*/
+#define EEP_E_TIMEOUT                0x22U
+/**
+*   @brief service ID of error:  NULL_PTR passed. (passed to DET)
+*/
+#define EEP_E_PARAM_POINTER          0x23U
+
+/**
+* @brief          All service IDs (passed to DET).
+*
+*/
+#define EEP_INIT_ID                  0x00U
+#define EEP_SETMODE_ID               0x01U
+#define EEP_READ_ID                  0x02U
+#define EEP_WRITE_ID                 0x03U
+#define EEP_ERASE_ID                 0x04U
+#define EEP_COMPARE_ID               0x05U
+#define EEP_CANCEL_ID                0x06U
+#define EEP_GETJOBRESULT_ID          0x08U
+#define EEP_MAINFUNCTION_ID          0x09U
+#define EEP_GETVERSIONINFO_ID        0x0AU
+#define EEP_QUICK_WRITE_ID           0x0BU
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+/**
+* @brief    Start of Eep section CODE
+*/
+#define EEP_START_SEC_CODE
+#include "Eep_MemMap.h"
+
+/**
+* @brief        The function initializes Eep module.
+* @details      The function sets the internal module variables according to given
+*               configuration set.
+*
+* @param[in]    pConfigPtr        Pointer to eeprom driver configuration set.
+*
+* @api
+*
+* @pre          @p pConfigPtr must not be @p NULL_PTR and the module status must not
+*               be @p MEMIF_BUSY.
+**
+*/
+void Eep_Init (const Eep_ConfigType * pConfigPtr);
+
+/**
+* @brief            Write one or more complete eeprom pages to the eeprom device.
+* @details          Starts a write job asynchronously. The actual job is performed by
+*                   Eep_MainFunction.
+*
+* @param[in]        TargetAddress        Target address in eeprom memory.
+* @param[in]        SourceAddressPtr     Pointer to source data buffer.
+* @param[in]        Length               Number of bytes to write.
+*
+* @return           Std_ReturnType
+* @retval           E_OK                 Write command has been accepted.
+* @retval           E_NOT_OK             Write command has not been accepted.
+*
+* @api
+*
+* @pre              The module has to be initialized and not busy.
+**
+*/
+Std_ReturnType Eep_Write (Eep_AddressType u32TargetAddress,
+                          const uint8 * pSourceAddressPtr,
+                          Eep_LengthType u32Length
+                         );
+
+#if (EEP_QUICK_WRITES_API == STD_ON)
+
+/**
+* @brief            Write one or more complete eeprom pages to the eeprom device in quick write mode.
+* @details          Starts a write job asynchronously. The actual job is performed by
+*                   Eep_MainFunction.
+*
+* @param[in]        TargetAddress               Target address in eeprom memory.
+* @param[in]        SourceAddressPtr            Pointer to source data buffer.
+* @param[in]        Length                      Number of bytes to write.
+* @param[in]        u16QuickWritesLength        Number of bytes to allocated for quick write
+*
+* @return           Std_ReturnType
+* @retval           E_OK                 Write command has been accepted.
+* @retval           E_NOT_OK             Write command has not been accepted.
+*
+* @api
+*
+* @pre              The module has to be initialized and not busy.*/
+Std_ReturnType Eep_QuickWrite (Eep_AddressType u32TargetAddress,
+                               uint8 const * pSourceAddressPtr,
+                               Eep_LengthType u32Length,
+                               uint16 u16QuickWritesLength
+                              );
+
+#endif /* EEP_QUICK_WRITES_API */
+
+/**
+* @brief            Erase memory by writing erase value.
+* @details          Starts an erase job asynchronously. The actual job is performed
+ *                  by the Eep_MainFunction.
+*
+* @param[in]        TargetAddress        Target address in eeprom memory.
+* @param[in]        Length               Number of bytes to erase by writing the erased value.
+*
+* @return           Std_ReturnType
+* @retval           E_OK                    Erase command has been accepted.
+* @retval           E_NOT_OK                Erase command has not been accepted.
+*
+* @api
+*
+* @pre              The module has to be initialized and not busy.
+* @post
+**
+*/
+Std_ReturnType Eep_Erase (Eep_AddressType u32TargetAddress,
+                          Eep_LengthType u32Length
+                         );
+
+#if (EEP_CANCEL_API == STD_ON)
+/**
+* @brief            Cancel an ongoing eeprom read, write, erase or compare job.
+* @details          Abort a running job synchronously so that directly after returning
+*                   from this function a new job can be started.
+*
+* @api
+*
+* @pre              The module must be initialized.
+* @post             @p Eep_Cancel changes module status and @p Eep_eJobResult
+*                   internal variable.
+**/
+void Eep_Cancel (void);
+#endif
+
+#if (EEP_GET_STATUS_API == STD_ON)
+/**
+* @brief            Returns the EEP module status.
+* @details          Returns the EEP module status synchronously.
+*
+* @return           MemIf_StatusType
+* @retval           MEMIF_UNINIT        Module has not been initialized (yet).
+* @retval           MEMIF_IDLE          Module is currently idle.
+* @retval           MEMIF_BUSY          Module is currently busy.
+*
+* @api
+**/
+MemIf_StatusType Eep_GetStatus (void);
+#endif
+
+#if (EEP_GET_JOB_RESULT_API == STD_ON)
+/**
+* @brief            Returns the result of the last job.
+* @details          Returns synchronously the result of the last job.
+*
+* @return           MemIf_JobResultType
+* @retval           MEMIF_JOB_OK              Successfully completed job.
+* @retval           MEMIF_JOB_FAILED          Not successfully completed job.
+* @retval           MEMIF_JOB_PENDING         Still pending job (not yet completed).
+* @retval           MEMIF_JOB_CANCELED        Job has been canceled.
+* @retval           MEMIF_BLOCK_INCONSISTENT  Inconsistent block requested, it may
+*                                             contains corrupted data.
+* @retval           MEMIF_BLOCK_INVALID       Invalid block requested.
+*
+* @api
+**/
+MemIf_JobResultType Eep_GetJobResult (void);
+#endif
+
+/**
+* @brief            Reads from eeprom memory.
+* @details          Starts a read job asynchronously. The actual job is performed by
+*                   @p Eep_MainFunction.
+*
+* @param[in]        SourceAddress        Source address in eeprom memory.
+* @param[in]        Length               Number of bytes to read.
+* @param[out]       TargetAddressPtr    Pointer to target data buffer.
+*
+* @return           MemIf_JobResultType
+* @retval           MEMIF_JOB_OK              Successfully completed job.
+* @retval           MEMIF_JOB_FAILED          Not successfully completed job.
+* @retval           MEMIF_JOB_PENDING         Still pending job (not yet completed).
+* @retval           MEMIF_JOB_CANCELED        Job has been canceled.
+* @retval           MEMIF_BLOCK_INCONSISTENT  Inconsistent block requested, it may
+*                                             contains corrupted data.
+* @retval           MEMIF_BLOCK_INVALID       Invalid block requested.
+*
+* @api
+*
+* @pre            The module has to be initialized and not busy.
+* @post
+**
+*/
+Std_ReturnType Eep_Read (Eep_AddressType u32SourceAddress,
+                         uint8 * pTargetAddressPtr,
+                         Eep_LengthType u32Length
+                        );
+
+#if (EEP_COMPARE_API == STD_ON)
+/**
+* @brief           Compares a eeprom memory area with an application data buffer.
+* @details         Starts a compare job asynchronously. The actual job is performed by
+*                  Eep_MainFunction.
+*
+* @param[in]        SourceAddress          Source address in eeprom memory.
+* @param[in]        TargetAddressPtr       Pointer to source data buffer.
+* @param[in]        Length                 Number of bytes to compare.
+*
+* @return           Std_ReturnType
+* @retval           E_OK                      Compare command has been accepted.
+* @retval           E_NOT_OK                   Compare command has not been accepted.
+*
+* @api
+*
+* @pre            The module has to be initialized and not busy.
+**/
+Std_ReturnType Eep_Compare (Eep_AddressType u32SourceAddress,
+                            const uint8 * pTargetAddressPtr,
+                            Eep_LengthType u32Length
+                           );
+#endif
+
+#if (EEP_SET_MODE_API == STD_ON)
+/**
+* @brief           Sets the EEP module's operation mode to the given Mode.
+* @details         Every given mode determinates maximum bytes for read-write
+ *                 operations. Every mode has a set of pre-configured values.
+*
+* @param[in]        Mode        MEMIF_MODE_FAST or MEMIF_MODE_SLOW.
+*
+* @api
+*
+* @pre            The module has to be initialized and not busy.
+* @post           @p Eep_SetMode changes internal variables @p Eep_u32MaxRead and
+*                 @p Eep_u32MaxWrite.
+**/
+void Eep_SetMode (MemIf_ModeType eMode);
+#endif
+
+#if (EEP_VERSION_INFO_API == STD_ON)
+/**
+* @brief        Returns version information about EEP module.
+* @details      Version information includes:
+*               - Module Id
+*               - Vendor Id
+*               - Vendor specific version numbers (BSW00407).
+*
+* @param[in,out] pVersionInfoPtr  Pointer to where to store the version information of this module.
+*
+* @api
+**
+*/
+void Eep_GetVersionInfo (Std_VersionInfoType * pVersionInfoPtr);
+#endif
+
+/**
+* @brief    Stop of Eep section CODE
+*/
+#define EEP_STOP_SEC_CODE
+#include "Eep_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* EEP_H */
+
+/** @} */

RTD/include/Eep_IPW.h

@@ -0,0 +1,185 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : IPV_FTFC
+*   Dependencies         : 
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef EEP_IPW_H
+#define EEP_IPW_H
+
+/**
+*  @file Eep_IPW.h
+*
+*  @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*==================================================================================================
+                                         INCLUDE FILES
+ 1) system and project includes
+ 2) needed interfaces from external units
+ 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Eep_InternalTypes.h"
+#include "Ftfc_Eep_Ip.h"
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define EEP_IPW_VENDOR_ID_H                    43
+#define EEP_IPW_AR_RELEASE_MAJOR_VERSION_H     4
+#define EEP_IPW_AR_RELEASE_MINOR_VERSION_H     4
+#define EEP_IPW_AR_RELEASE_REVISION_VERSION_H  0
+#define EEP_IPW_SW_MAJOR_VERSION_H             1
+#define EEP_IPW_SW_MINOR_VERSION_H             0
+#define EEP_IPW_SW_PATCH_VERSION_H             0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+
+/* Version checks for Eep_InternalTypes.h */
+#if (EEP_IPW_VENDOR_ID_H != EEP_INTERNALTYPES_VENDOR_ID)
+    #error "Eep_IPW.h and Eep_InternalTypes.h have different vendor ids"
+#endif
+#if ((EEP_IPW_AR_RELEASE_MAJOR_VERSION_H    != EEP_INTERNALTYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (EEP_IPW_AR_RELEASE_MINOR_VERSION_H    != EEP_INTERNALTYPES_AR_RELEASE_MINOR_VERSION) || \
+     (EEP_IPW_AR_RELEASE_REVISION_VERSION_H != EEP_INTERNALTYPES_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Eep_IPW.h and Eep_InternalTypes.h are different"
+#endif
+#if ((EEP_IPW_SW_MAJOR_VERSION_H != EEP_INTERNALTYPES_SW_MAJOR_VERSION) || \
+     (EEP_IPW_SW_MINOR_VERSION_H != EEP_INTERNALTYPES_SW_MINOR_VERSION) || \
+     (EEP_IPW_SW_PATCH_VERSION_H != EEP_INTERNALTYPES_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Eep_IPW.h and Eep_InternalTypes.h are different"
+#endif
+
+/* Version checks for Ftfc_Eep_Ip.h */
+#if (EEP_IPW_VENDOR_ID_H != FTFC_EEP_IP_VENDOR_ID_H)
+    #error "Eep_IPW.h and Ftfc_Eep_Ip.h have different vendor IDs!"
+#endif
+#if ((EEP_IPW_AR_RELEASE_MAJOR_VERSION_H    != FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_H) || \
+     (EEP_IPW_AR_RELEASE_MINOR_VERSION_H    != FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_H) || \
+     (EEP_IPW_AR_RELEASE_REVISION_VERSION_H != FTFC_EEP_IP_AR_RELEASE_REVISION_VERSION_H) \
+    )
+    #error "Eep_IPW.h and Ftfc_Eep_Ip.h are for different AUTOSAR versions!"
+#endif
+#if ((EEP_IPW_SW_MAJOR_VERSION_H != FTFC_EEP_IP_SW_MAJOR_VERSION_H) || \
+     (EEP_IPW_SW_MINOR_VERSION_H != FTFC_EEP_IP_SW_MINOR_VERSION_H) || \
+     (EEP_IPW_SW_PATCH_VERSION_H != FTFC_EEP_IP_SW_PATCH_VERSION_H) \
+    )
+    #error "Eep_IPW.h and Ftfc_Eep_Ip.h have different SW versions!"
+#endif
+
+/*==================================================================================================
+*                                            CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                              ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION PROTOTYPES
+==================================================================================================*/
+#define EEP_START_SEC_CODE
+#include "Eep_MemMap.h"
+
+Eep_ReturnType Eep_Ipw_Init (Eep_ConfigType const * pxEepConfig);
+
+Std_ReturnType Eep_Ipw_CheckReadParams (Eep_AddressType SrcAddress,
+                                        uint8 const * pu8DestAddress,
+                                        Eep_LengthType Length
+                                       );
+Eep_ReturnType Eep_Ipw_Read (Eep_AddressType SrcAddress,
+                             uint8 * pu8DestAddress,
+                             Eep_LengthType Length
+                            );
+
+#if (EEP_COMPARE_API == STD_ON)
+Std_ReturnType Eep_Ipw_CheckCompareParams (Eep_AddressType SrcAddress,
+                                           uint8 const * pu8DestAddress,
+                                           Eep_LengthType Length
+                                          );
+Eep_ReturnType Eep_Ipw_CompareSync (Eep_AddressType SrcAddress,
+                                    uint8 const * pu8DestAddress,
+                                    Eep_LengthType Length
+                                   );
+#endif
+
+Std_ReturnType Eep_Ipw_CheckEraseParams (Eep_AddressType Address,
+                                         Eep_LengthType Length
+                                        );
+Eep_ReturnType Eep_Ipw_Erase (Eep_AddressType Address,
+                              Eep_LengthType Length
+                             );
+
+Std_ReturnType Eep_Ipw_CheckWriteParams (Eep_AddressType DestAddress,
+                                         uint8 const * pu8SrcAddress,
+                                         Eep_LengthType Length
+                                        );
+Eep_ReturnType Eep_Ipw_Write (Eep_AddressType DestAddress,
+                              uint8 const * pu8SrcAddress,
+                              Eep_LengthType Length
+                             );
+
+#if (EEP_QUICK_WRITES_API == STD_ON)
+Std_ReturnType Eep_Ipw_CheckQuickWriteParams (Eep_AddressType DestAddress,
+                                              uint8 const * pu8SrcAddress,
+                                              Eep_LengthType Length,
+                                              Eep_LengthType QuickWritesLength
+                                             );
+Eep_ReturnType Eep_Ipw_QuickWrite (Eep_AddressType DestAddress,
+                                   uint8 const * pu8SrcAddress,
+                                   Eep_LengthType Length
+                                  );
+#endif
+
+#if (EEP_CANCEL_API == STD_ON)
+Eep_ReturnType Eep_Ipw_Cancel (void);
+#endif
+
+#define EEP_STOP_SEC_CODE
+#include "Eep_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @}*/
+
+#endif /* EEP_IPW_H */

RTD/include/Eep_InternalTypes.h

@@ -0,0 +1,179 @@
+
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : IPV_FTFC
+* Dependencies : 
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef EEP_INTERNALTYPES_H
+#define EEP_INTERNALTYPES_H
+
+/**
+* @file
+*
+* @addtogroup EEP_DRIVER Eeprom Driver
+* @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+#include "Eep_Cfg.h"
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define EEP_INTERNALTYPES_VENDOR_ID                    43
+#define EEP_INTERNALTYPES_AR_RELEASE_MAJOR_VERSION     4
+#define EEP_INTERNALTYPES_AR_RELEASE_MINOR_VERSION     4
+#define EEP_INTERNALTYPES_AR_RELEASE_REVISION_VERSION  0
+#define EEP_INTERNALTYPES_SW_MAJOR_VERSION             1
+#define EEP_INTERNALTYPES_SW_MINOR_VERSION             0
+#define EEP_INTERNALTYPES_SW_PATCH_VERSION             0
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if current file and Eep configuration header file are of the same vendor */
+#if (EEP_INTERNALTYPES_VENDOR_ID != EEP_VENDOR_ID_CFG)
+    #error "Eep_InternalTypes.h and Eep_Cfg.h have different vendor ids"
+#endif
+/* Check if current file and Eep configuration header file are of the same Autosar version */
+#if ((EEP_INTERNALTYPES_AR_RELEASE_MAJOR_VERSION    != EEP_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (EEP_INTERNALTYPES_AR_RELEASE_MINOR_VERSION    != EEP_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (EEP_INTERNALTYPES_AR_RELEASE_REVISION_VERSION != EEP_AR_RELEASE_REVISION_VERSION_CFG) \
+    )
+    #error "AutoSar Version Numbers of Eep_InternalTypes.h and Eep_Cfg.h are different"
+#endif
+/* Check if current file and Eep configuration header file are of the same software version */
+#if ((EEP_INTERNALTYPES_SW_MAJOR_VERSION != EEP_SW_MAJOR_VERSION_CFG) || \
+     (EEP_INTERNALTYPES_SW_MINOR_VERSION != EEP_SW_MINOR_VERSION_CFG) || \
+     (EEP_INTERNALTYPES_SW_PATCH_VERSION != EEP_SW_PATCH_VERSION_CFG) \
+    )
+    #error "Software Version Numbers of Eep_InternalTypes.h and Eep_Cfg.h are different"
+#endif
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+/**
+* @brief          Type of job currently executed by Eep_MainFunction.
+*/
+
+typedef enum
+{
+    /**
+    * @brief erase one or more complete eeprom sectors
+    */
+    EEP_JOB_ERASE = 0,
+    /**
+    * @brief write one or more complete eeprom pages
+    */
+    EEP_JOB_WRITE,
+    /**
+    * @brief read one or more bytes from eeprom memory
+    */
+    EEP_JOB_READ,
+    /**
+    * @brief compare data buffer with content of eeprom memory
+    */
+    EEP_JOB_COMPARE
+
+    
+#if (EEP_QUICK_WRITES_API == STD_ON)
+
+    /**
+    * @brief write a certain number of bytes in quick write mode
+    */
+    , EEP_JOB_QUICK_WRITE
+    
+#endif /* EEP_QUICK_WRITES_API */
+
+} Eep_JobType;
+
+/**
+* @brief          Result of low-level eeprom operation.
+*/
+typedef enum
+{
+    EEP_E_OK = 0,                 /**< @brief operation succeeded */
+    EEP_E_FAILED,                 /**< @brief operation failed due to hardware error */
+    EEP_E_BLOCK_INCONSISTENT,     /**< @brief data buffer doesn't match with content of eeprom memory */
+    EEP_E_PENDING                 /**< @brief operation is pending */
+} Eep_ReturnType;
+
+/**
+* @brief          Size of data to be processeed by CRC.
+*
+*
+*/
+typedef enum
+{
+    EEP_CRC_8_BITS = 0,
+    EEP_CRC_16_BITS
+} Eep_CrcDataSizeType;
+
+#if (EEP_MCORE_ENABLED == STD_ON)
+/* Muticore feature */
+/**
+* @brief          Eep Multi Core Request Return Type.
+* @details        The return value for the function requesting multi core access.
+*
+*/
+typedef enum
+{
+    EEP_MCORE_ERROR = 0,
+    EEP_MCORE_TIMEOUT,
+    EEP_MCORE_PENDING,
+    EEP_MCORE_GRANTED,
+    EEP_MCORE_CANCELLED
+} Eep_MCoreReqReturnType;
+
+
+/**
+* @brief          Eep Multi Core hardware job status
+* @details        The status of a multicore core flash job, in hardware. Used to determine
+*                 if a flash job subject to multicore arbitration was started/suspended/aborted
+*                 in hardware, in the flash controller. This can be used for example, to
+*                 clear a semaphore granted for erase directly, if the job was not actually started
+*                 in hardware, instead of attempting to suspend it.
+*
+*/
+typedef enum
+{
+    EEP_MCORE_HW_JOB_IDLE = 0,
+    EEP_MCORE_HW_JOB_MAINF_STARTED,
+    EEP_MCORE_HW_JOB_STARTED,
+    EEP_MCORE_HW_JOB_CANCELLED
+} Eep_MCoreHwJobStatusType;
+#endif /* #if (EEP_MCORE_ENABLED == STD_ON) */
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* EEP_INTERNALTYPES_H */
+
+/** @}*/

RTD/include/Eep_Types.h

@@ -0,0 +1,129 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : IPV_FTFC
+* Dependencies : 
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef EEP_TYPES_H
+#define EEP_TYPES_H
+
+/**
+* @file
+*
+* @addtogroup EEP_DRIVER Eeprom Driver
+* @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "StandardTypes.h"
+#include "MemIf_Types.h"
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define EEP_TYPES_VENDOR_ID                    43
+#define EEP_TYPES_AR_RELEASE_MAJOR_VERSION     4
+#define EEP_TYPES_AR_RELEASE_MINOR_VERSION     4
+#define EEP_TYPES_AR_RELEASE_REVISION_VERSION  0
+#define EEP_TYPES_SW_MAJOR_VERSION             1
+#define EEP_TYPES_SW_MINOR_VERSION             0
+#define EEP_TYPES_SW_PATCH_VERSION             0
+/*==================================================================================================
+                                      FILE VERSION CHECKS
+==================================================================================================*/
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and Std_Types.h file are of the same version */
+    #if ((EEP_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
+         (EEP_TYPES_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION)\
+        )
+        #error "AutoSar Version Numbers of Eep_Types.h and Std_Types.h are different"
+    #endif
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and MemIf_Types.h file are of the same version */
+    #if ((EEP_TYPES_AR_RELEASE_MAJOR_VERSION != MEMIF_AR_RELEASE_MAJOR_VERSION) || \
+         (EEP_TYPES_AR_RELEASE_MINOR_VERSION != MEMIF_AR_RELEASE_MINOR_VERSION)\
+        )
+        #error "AutoSar Version Numbers of Eep_Types.h and MemIf_Types.h are different"
+    #endif
+#endif
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+
+/*==================================================================================================
+                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/**
+* @brief          Eep Address Type.
+* @details        Address offset from the configured eeprom base address to access a certain eeprom
+*                 memory area.
+* @implements Eep_AddressType_typedef
+*/
+typedef uint32 Eep_AddressType;
+
+/**
+* @brief          Eep Length Type.
+* @details        Number of bytes to read,write,erase,compare
+* @implements Eep_LengthType_typedef
+*/
+typedef uint32 Eep_LengthType;
+
+/**
+* @brief          Eep Job End Notification Pointer Type
+* @details        Pointer type of Eep_JobEndNotification function
+*
+*/
+typedef void (*Eep_JobEndNotificationPtrType)(void);
+
+/**
+* @brief          Eep Job Error Notification Pointer Type
+* @details        Pointer type of Eep_JobErrorNotification function
+*
+*/
+typedef void (*Eep_JobErrorNotificationPtrType)(void);
+
+/**
+* @brief          Eep CRC Type.
+* @details        CRC computed over config set.
+*
+*/
+typedef uint16 Eep_CrcType;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* EEP_TYPES_H */
+
+/** @}*/

RTD/include/Ewm_Ip.h

@@ -0,0 +1,204 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef EWM_IP_H
+#define EWM_IP_H
+
+/**
+*   @file
+*
+*   @addtogroup Ewm_Ip
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "Ewm_Ip_Types.h"
+#include "Ewm_Ip_DeviceRegisters.h"
+
+/*==================================================================================================
+*                                 SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define EWM_IP_VENDOR_ID                    43
+#define EWM_IP_MODULE_ID                    102
+#define EWM_IP_AR_RELEASE_MAJOR_VERSION     4
+#define EWM_IP_AR_RELEASE_MINOR_VERSION     4
+#define EWM_IP_AR_RELEASE_REVISION_VERSION  0
+#define EWM_IP_SW_MAJOR_VERSION             1
+#define EWM_IP_SW_MINOR_VERSION             0
+#define EWM_IP_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                       FILE VERSION CHECKS
+==================================================================================================*/
+
+/* Check if current file and Ewm_Ip_Types header file are of the same vendor */
+#if (EWM_IP_VENDOR_ID != EWM_IP_TYPES_VENDOR_ID)
+#error "Ewm_Ip.h and Ewm_Ip_Types.h have different vendor ids"
+#endif
+
+#if ((EWM_IP_AR_RELEASE_MAJOR_VERSION    != EWM_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (EWM_IP_AR_RELEASE_MINOR_VERSION    != EWM_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (EWM_IP_AR_RELEASE_REVISION_VERSION != EWM_IP_TYPES_AR_RELEASE_REVISION_VERSION))
+#error "AutoSar Version Numbers of Ewm_Ip.h and Ewm_Ip_Types.h are different"
+#endif
+
+#if ((EWM_IP_SW_MAJOR_VERSION != EWM_IP_TYPES_SW_MAJOR_VERSION) || \
+     (EWM_IP_SW_MINOR_VERSION != EWM_IP_TYPES_SW_MINOR_VERSION) || \
+     (EWM_IP_SW_PATCH_VERSION != EWM_IP_TYPES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Ewm_Ip.h and Ewm_Ip_Types.h are different"
+#endif
+
+/* Check if current file and Ewm_Ip_DeviceRegisters header file are of the same vendor */
+#if (EWM_IP_VENDOR_ID != EWM_IP_DEVICE_REGISTERS_VENDOR_ID)
+#error "Ewm_Ip.h and Ewm_Ip_DeviceRegisters.h have different vendor ids"
+#endif
+
+#if ((EWM_IP_AR_RELEASE_MAJOR_VERSION    != EWM_IP_DEVICE_REGISTERS_AR_RELEASE_MAJOR_VERSION) || \
+     (EWM_IP_AR_RELEASE_MINOR_VERSION    != EWM_IP_DEVICE_REGISTERS_AR_RELEASE_MINOR_VERSION) || \
+     (EWM_IP_AR_RELEASE_REVISION_VERSION != EWM_IP_DEVICE_REGISTERS_AR_RELEASE_REVISION_VERSION))
+#error "AutoSar Version Numbers of Ewm_Ip.h and Ewm_Ip_DeviceRegisters.h are different"
+#endif
+
+#if ((EWM_IP_SW_MAJOR_VERSION != EWM_IP_DEVICE_REGISTERS_SW_MAJOR_VERSION) || \
+     (EWM_IP_SW_MINOR_VERSION != EWM_IP_DEVICE_REGISTERS_SW_MINOR_VERSION) || \
+     (EWM_IP_SW_PATCH_VERSION != EWM_IP_DEVICE_REGISTERS_SW_PATCH_VERSION))
+#error "Software Version Numbers of Ewm_Ip.h and Ewm_Ip_DeviceRegisters.h are different"
+#endif
+
+/*==================================================================================================
+*                                            CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                              ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#if (EWM_IP_ENABLE == STD_ON)
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_START_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_START_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+/*!
+ * @brief Init EWM. This method initializes EWM instance to the configuration
+ * from the passed structure. The user must make sure that the clock is
+ * enabled. This is the only method needed to be called to start the module.
+ *
+ *  Example configuration structure:
+ *  @code
+ *      Ewm_Ip_ConfigType ewmUserCfg = {
+ *          .assertLogic        = EWM_IN_ASSERT_ON_LOGIC_ZERO,
+ *          .interruptEnable    = true,
+ *          .prescaler          = 128,
+ *          .compareLow         = 0,
+ *          .compareHigh        = 254
+ *      };
+ *  @endcode
+ *      This configuration will enable the peripheral, with input pin configured
+ *      to assert on logic low, interrupt enabled, prescaler 128 and maximum
+ *      refresh window.
+ *
+ *      The EWM can be initialized only once per CPU reset as the registers
+ *      are write once.
+ *
+ * @param[in] u8Instance EWM instance number
+ * @param[in] config  Pointer to the module configuration structure.
+ *
+ * @return Ewm_Ip_StatusType Will return the status of the operation:
+ *          - STATUS_SUCCESS            if the operation is successful
+ *          - STATUS_ERROR              if the windows values are not
+ *                                        correct or if the instance is
+ *                                        already enabled
+ *
+ */
+Ewm_Ip_StatusType Ewm_Ip_Init(const uint8 Instance, const Ewm_Ip_ConfigType * const ConfigPtr);
+
+/*!
+ * @brief Refresh EWM. This method needs to be called within the window period
+ * specified by the Compare Low and Compare High registers.
+ *
+ * @param[in] u8Instance EWM instance number
+ *
+ * @return None
+ *
+ */
+void Ewm_Ip_Service(const uint8 Instance);
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_STOP_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_STOP_SEC_RAMCODE
+    #endif
+#endif
+
+
+#include "Wdg_MemMap.h"
+
+#endif /* (EWM_IP_ENABLE == STD_ON) */
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* EWM_IP_H */

RTD/include/Ewm_Ip_FeatureDefines.h

@@ -0,0 +1,111 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef EWM_IP_FEATUREDEFINES_H
+#define EWM_IP_FEATUREDEFINES_H
+
+/**
+*   @file
+*
+*   @addtogroup Wdg
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "StandardTypes.h"
+
+/*==================================================================================================
+*                                 SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define EWM_IP_FEATURE_DEFINES_VENDOR_ID                    43
+#define EWM_IP_FEATURE_DEFINES_MODULE_ID                    102
+#define EWM_IP_FEATURE_DEFINES_AR_RELEASE_MAJOR_VERSION     4
+#define EWM_IP_FEATURE_DEFINES_AR_RELEASE_MINOR_VERSION     4
+#define EWM_IP_FEATURE_DEFINES_AR_RELEASE_REVISION_VERSION  0
+#define EWM_IP_FEATURE_DEFINES_SW_MAJOR_VERSION             1
+#define EWM_IP_FEATURE_DEFINES_SW_MINOR_VERSION             0
+#define EWM_IP_FEATURE_DEFINES_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                       FILE VERSION CHECKS
+==================================================================================================*/
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and StandardTypes header file are of the same Autosar version */
+    #if ((EWM_IP_FEATURE_DEFINES_AR_RELEASE_MAJOR_VERSION    != STD_AR_RELEASE_MAJOR_VERSION) || \
+        (EWM_IP_FEATURE_DEFINES_AR_RELEASE_MINOR_VERSION     != STD_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Ewm_Ip_FeatureDefines.h and StandardTypes.h are different"
+    #endif
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
+
+/*==================================================================================================
+*                                            CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/* @brief First byte of the EWM Service key        */
+#define EWM_IP_FEATURE_KEY_FIRST_BYTE      (0xB4U)
+/* @brief Second byte of the EWM Service key       */
+#define EWM_IP_FEATURE_KEY_SECOND_BYTE     (0x2CU)
+/* @brief EWM Compare High register maximum value  */
+#define EWM_IP_FEATURE_CMPH_MAX_VALUE      (0xFEU)
+
+/*==================================================================================================
+*                                              ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* EWM_IP_FEATUREDEFINES_H */

RTD/include/Ewm_Ip_Types.h

@@ -0,0 +1,167 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef EWM_IP_TYPES_H
+#define EWM_IP_TYPES_H
+
+/**
+*   @file
+*
+*   @addtogroup Ewm_Ip
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "StandardTypes.h"
+#include "Ewm_Ip_Cfg_Defines.h"
+
+/*==================================================================================================
+*                                 SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define EWM_IP_TYPES_VENDOR_ID                    43
+#define EWM_IP_TYPES_MODULE_ID                    102
+#define EWM_IP_TYPES_AR_RELEASE_MAJOR_VERSION     4
+#define EWM_IP_TYPES_AR_RELEASE_MINOR_VERSION     4
+#define EWM_IP_TYPES_AR_RELEASE_REVISION_VERSION  0
+#define EWM_IP_TYPES_SW_MAJOR_VERSION             1
+#define EWM_IP_TYPES_SW_MINOR_VERSION             0
+#define EWM_IP_TYPES_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                       FILE VERSION CHECKS
+==================================================================================================*/
+
+/* Check if current file and Ewm_Ip_Cfg_Defines configuration header file are of the same vendor */
+#if (EWM_IP_TYPES_VENDOR_ID != EWM_IP_CFG_DEFINES_VENDOR_ID)
+#error "Ewm_Ip_Types.h and Ewm_Ip_Cfg_Defines.h have different vendor ids"
+#endif
+
+#if ((EWM_IP_TYPES_AR_RELEASE_MAJOR_VERSION    != EWM_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \
+     (EWM_IP_TYPES_AR_RELEASE_MINOR_VERSION    != EWM_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \
+     (EWM_IP_TYPES_AR_RELEASE_REVISION_VERSION != EWM_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION))
+#error "AutoSar Version Numbers of Ewm_Ip_Types.h and Ewm_Ip_Cfg_Defines.h are different"
+#endif
+
+#if ((EWM_IP_TYPES_SW_MAJOR_VERSION != EWM_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \
+     (EWM_IP_TYPES_SW_MINOR_VERSION != EWM_IP_CFG_DEFINES_SW_MINOR_VERSION) || \
+     (EWM_IP_TYPES_SW_PATCH_VERSION != EWM_IP_CFG_DEFINES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Ewm_Ip_Types.h and Ewm_Ip_Cfg_Defines.h are different"
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and StandardTypes header file are of the same Autosar version */
+    #if ((EWM_IP_TYPES_AR_RELEASE_MAJOR_VERSION    != STD_AR_RELEASE_MAJOR_VERSION) || \
+        (EWM_IP_TYPES_AR_RELEASE_MINOR_VERSION     != STD_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Ewm_Ip_Types.h and StandardTypes.h are different"
+    #endif
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
+
+/*==================================================================================================
+*                                            CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                              ENUMS
+==================================================================================================*/
+
+/** @brief       Enum defining the possible type values for EWM API
+* @Implements    Ewm_Ip_StatusType_enumeration
+*/
+typedef enum
+{
+    EWM_IP_STATUS_SUCCESS   = 0x00,
+    EWM_IP_STATUS_ERROR     = 0x01
+} Ewm_Ip_StatusType;
+
+/*!
+ * @brief EWM input pin configuration
+ * Configures if the input pin is enabled and when is asserted
+ * Implements : Ewm_Ip_Assert_LogicType_Class
+ */
+typedef enum
+{
+    EWM_IN_ASSERT_DISABLED      = 0x00U,    /*!< Input pin disabled                    */
+    EWM_IN_ASSERT_ON_LOGIC_ZERO = 0x01U,    /*!< Input pin asserts EWM when on logic 0 */
+    EWM_IN_ASSERT_ON_LOGIC_ONE  = 0x02U     /*!< Input pin asserts EWM when on logic 1 */
+} Ewm_Ip_Assert_LogicType;
+
+/*==================================================================================================
+*                                  STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*!
+ * @brief EWM callback type
+ * Implements : Ewm_Ip_CallbackPtrType_Class
+ */
+
+typedef void (*Ewm_Ip_CallbackPtrType)(void);
+
+/*!
+ * @brief EWM configuration structure
+ * This structure is used to configure the EWM prescaler, window, interrupt
+ * and input pin.
+ *
+ * Implements : ewm_init_config_t_Class
+ */
+typedef struct
+{
+    Ewm_Ip_Assert_LogicType assertLogic;      /*!< Assert logic for EWM input pin */
+    boolean                 InterruptEnable; /*!< Enable EWM interrupt           */
+    uint8                   Prescaler;      /*!< EWM clock prescaler            */
+    uint8                   CompareLow;     /*!< Compare low value              */
+    uint8                   CompareHigh;    /*!< Compare high value             */
+    Ewm_Ip_CallbackPtrType  pfEwmCallback;    /*!< Interrupt callback             */
+} Ewm_Ip_ConfigType;
+
+/*==================================================================================================
+*                                  GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION PROTOTYPES
+==================================================================================================*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* EWM_IP_TYPES_H */

RTD/include/Ftfc_Eep_Ip.h

@@ -0,0 +1,292 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : IPV_FTFC
+*   Dependencies         : 
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef FTFC_EEP_IP_H
+#define FTFC_EEP_IP_H
+
+/**
+*   @file Ftfc_Eep_Ip.h
+*
+*   @addtogroup FTFC_EEP_IP
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Ftfc_Eep_Ip_Cfg.h"
+#include "Ftfc_Eep_Ip_Types.h"
+
+/*==================================================================================================
+*                                 SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define FTFC_EEP_IP_VENDOR_ID_H                    43
+#define FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_H     4
+#define FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_H     4
+#define FTFC_EEP_IP_AR_RELEASE_REVISION_VERSION_H  0
+#define FTFC_EEP_IP_SW_MAJOR_VERSION_H             1
+#define FTFC_EEP_IP_SW_MINOR_VERSION_H             0
+#define FTFC_EEP_IP_SW_PATCH_VERSION_H             0
+
+/*==================================================================================================
+*                                       FILE VERSION CHECKS
+==================================================================================================*/
+
+/* Version checks for Ftfc_Eep_Ip_Cfg.h */
+#if (FTFC_EEP_IP_VENDOR_ID_H != FTFC_EEP_IP_CFG_VENDOR_ID_H)
+    #error "Ftfc_Eep_Ip.h and Ftfc_Eep_Ip_Cfg.h have different vendor IDs!"
+#endif
+#if ((FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_H    != FTFC_EEP_IP_CFG_AR_RELEASE_MAJOR_VERSION_H) || \
+     (FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_H    != FTFC_EEP_IP_CFG_AR_RELEASE_MINOR_VERSION_H) || \
+     (FTFC_EEP_IP_AR_RELEASE_REVISION_VERSION_H != FTFC_EEP_IP_CFG_AR_RELEASE_REVISION_VERSION_H) \
+    )
+    #error "Ftfc_Eep_Ip.h and Ftfc_Eep_Ip_Cfg.h are for different AUTOSAR versions!"
+#endif
+#if ((FTFC_EEP_IP_SW_MAJOR_VERSION_H != FTFC_EEP_IP_CFG_SW_MAJOR_VERSION_H) || \
+     (FTFC_EEP_IP_SW_MINOR_VERSION_H != FTFC_EEP_IP_CFG_SW_MINOR_VERSION_H) || \
+     (FTFC_EEP_IP_SW_PATCH_VERSION_H != FTFC_EEP_IP_CFG_SW_PATCH_VERSION_H)    \
+    )
+    #error "Ftfc_Eep_Ip.h and Ftfc_Eep_Ip_Cfg.h have different SW versions!"
+#endif
+
+/* Version checks for Ftfc_Eep_Ip_Types.h */
+#if (FTFC_EEP_IP_VENDOR_ID_H != FTFC_EEP_IP_TYPES_VENDOR_ID_H)
+    #error "Ftfc_Eep_Ip.h and Ftfc_Eep_Ip_Types.h have different vendor IDs!"
+#endif
+#if ((FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_H    != FTFC_EEP_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
+     (FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_H    != FTFC_EEP_IP_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
+     (FTFC_EEP_IP_AR_RELEASE_REVISION_VERSION_H != FTFC_EEP_IP_TYPES_AR_RELEASE_REVISION_VERSION_H) \
+    )
+    #error "Ftfc_Eep_Ip.h and Ftfc_Eep_Ip_Types.h are for different AUTOSAR versions!"
+#endif
+#if ((FTFC_EEP_IP_SW_MAJOR_VERSION_H != FTFC_EEP_IP_TYPES_SW_MAJOR_VERSION_H) || \
+     (FTFC_EEP_IP_SW_MINOR_VERSION_H != FTFC_EEP_IP_TYPES_SW_MINOR_VERSION_H) || \
+     (FTFC_EEP_IP_SW_PATCH_VERSION_H != FTFC_EEP_IP_TYPES_SW_PATCH_VERSION_H)    \
+    )
+    #error "Ftfc_Eep_Ip.h and Ftfc_Eep_Ip_Types.h have different SW versions!"
+#endif
+
+/*==================================================================================================
+*                                            CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                              ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION PROTOTYPES
+==================================================================================================*/
+#define EEP_START_SEC_CODE
+#include "Eep_MemMap.h"
+
+/**
+ * @brief   Initialize the module.
+ * @details Set FlexRAM to work as EEERAM.
+ *          Query EEPROM quick write status and complete the maintenance, if needed.
+ *
+ * Out of reset with the FSTAT[CCIF] bit clear, the partition settings (EEESIZE, DEPART)
+ * are read from the data flash IFR and the emulated EEPROM file system is initialized
+ * accordingly. The emulated EEPROM file system locates all valid EEPROM data records
+ * in EEPROM backup and copies the newest data to FlexRAM.
+ *
+ * CCIF is cleared throughout the reset sequence. Completion of the reset sequence is marked by
+ * setting CCIF which enables flash user commands.
+ *
+ * @param[in]  pConfig pointer stored in Ftfc_Eep_Ip_pxConfiguration
+ *
+ * @return the initialization result
+ * @retval FTFC_EEP_IP_STATUS_OK             initialization successful
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        a flash cmd timeout has occurred
+ * @retval FTFC_EEP_IP_STATUS_FAILED         a flash command failed to execute
+ * @retval FTFC_EEP_IP_STATUS_FAILED_MGSTAT  one or more MGSTAT 1/2/3 bits were set
+ *  
+**/
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_Init (Ftfc_Eep_Ip_ConfigType const * pConfig);
+
+/**
+ * @brief  Read @p Length bytes from EEPROM @p SrcAddress to @p pu8DestAddress.
+ *
+ * @param[in]  SrcAddress EEPROM address to read from
+ * @param[out] pu8DestAddress buffer to store the read data
+ * @param[in]  Length how many bytes to read
+ *
+ * @return the read operation status
+ * @retval FTFC_EEP_IP_STATUS_OK      the requested bytes were copied into the destination buffer
+ * @retval FTFC_EEP_IP_STATUS_FAILED  FTFC not ready
+ * @retval FTFC_EEP_IP_STATUS_FAILED  a read was attempted on an invalid page size
+ *  
+**/
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_Read (Ftfc_Eep_Ip_AddressType SrcAddress,
+                                         uint8 * pu8DestAddress,
+                                         Ftfc_Eep_Ip_LengthType Length
+                                        );
+
+#if (FTFC_EEP_IP_COMPARE_API == STD_ON)
+/**
+ * @brief   Compare the first @p Length bytes of @p pu8DestAddress to the contents found at @p SrcAddress.
+ *
+ * @param[in] pu8DestAddress pointer to the data buffer
+ * @param[in] SrcAddress where the contents in EEPROM are stored
+ * @param[in] Length how many bytes to compare
+ *
+ * @return the comparison result
+ * @retval FTFC_EEP_IP_STATUS_OK                  the contents match
+ * @retval FTFC_EEP_IP_STATUS_BLOCK_INCONSISTENT  the contents do not match
+ * @retval FTFC_EEP_IP_STATUS_FAILED              FTFC not ready
+ * @retval FTFC_EEP_IP_STATUS_FAILED              a read was attempted on an invalid page size
+ *  
+**/
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_Compare (Ftfc_Eep_Ip_AddressType SrcAddress,
+                                            uint8 const * pu8DestAddress,
+                                            Ftfc_Eep_Ip_LengthType Length
+                                           );
+#endif
+
+/**
+ * @brief   Write @p PageSize bytes from @p pu8SrcAddress buffer to EEPROM at @p offset DestAddress.
+ *
+ * @param[out] DestAddress EEPROM offset
+ * @param[in]  pu8SrcAddress buffer containing the data to be written
+ * @param[in]  PageSize must be a valid PageSize: 1, 2 or 4 bytes for FTFC and only 4 bytes for FTFM
+ * @param[in]  Async choose between a synchronous and an asynchronous job
+ *
+ * @return the write operation result
+ * @retval FTFC_EEP_IP_STATUS_FAILED         FTFC not ready
+ * @retval FTFC_EEP_IP_STATUS_FAILED         an invalid page alignment was given
+ * @retval FTFC_EEP_IP_STATUS_FAILED         sync: some of the FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        sync: timeout occurred while waiting for CCIF
+ * @retval FTFC_EEP_IP_STATUS_OK             sync: page successfully written to EFLASH
+ * @retval FTFC_EEP_IP_STATUS_PENDING        async: the page was written to FlexRAM, but the status of
+ *                                           the EFLASH record shall be interrogated with GetJobResult
+ *  
+**/
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_Write (Ftfc_Eep_Ip_AddressType DestAddress,
+                                          uint8 const * pu8SrcAddress,
+                                          Ftfc_Eep_Ip_PageSizeType PageSize,
+                                          boolean Async
+                                         );
+    
+#if (FTFC_EEP_IP_QUICK_WRITES_API == STD_ON)
+/**
+ * @brief   QuickWrite API
+ * @details
+ *
+ * For configurations with interleaved flash blocks for EEPROM backup, quick writes
+ * should be restricted to either within the first half of EEERAM or within the second half
+ * of EEERAM. Otherwise, FSTAT[ACCERR] will be returned.
+ *
+ * Once a quick write is started, user must finish the entire quick write activity prior to
+ * starting another FTFC or CSE command.
+ *
+ * @param[out] DestAddress EEPROM offset needs to be 4-bytes aligned
+ * @param[in]  pu8SrcAddress
+ * @param[in]  Length
+ *
+ * @return quick write status
+ * @retval FTFC_EEP_IP_STATUS_FAILED         FTFC not ready
+ * @retval FTFC_EEP_IP_STATUS_OK             everything ok
+ * @retval FTFC_EEP_IP_STATUS_FAILED         invalid page size/alignment
+ * @retval FTFC_EEP_IP_STATUS_FAILED         some of the FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_FAILED_MGSTAT  one or more MGSTAT 1/2/3 bits were set
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        timeout occurred while waiting for CCIF
+ *  
+**/
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_QuickWrite (Ftfc_Eep_Ip_AddressType DestAddress,
+                                               uint8 const * pu8SrcAddress,
+                                               Ftfc_Eep_Ip_LengthType Length
+                                              );
+#endif
+
+/**
+ * @brief   Erase API
+ * @details Invokes a write with ERASED_CELL_VALUE.
+ *
+ * @return the erase operation result
+ * @retval FTFC_EEP_IP_STATUS_FAILED         FTFC not ready
+ * @retval FTFC_EEP_IP_STATUS_FAILED         an invalid page size/alignment was given
+ * @retval FTFC_EEP_IP_STATUS_FAILED         sync: some of the FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        sync: timeout occurred while waiting for CCIF
+ * @retval FTFC_EEP_IP_STATUS_OK             sync: page successfully written to EFLASH
+ * @retval FTFC_EEP_IP_STATUS_PENDING        async: the page was written to FlexRAM, but the status of
+ *                                           the EFLASH record shall be interrogated with GetJobResult
+ *  
+**/
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_Erase (Ftfc_Eep_Ip_AddressType Address,
+                                          Ftfc_Eep_Ip_PageSizeType PageSize,
+                                          boolean Async
+                                         );
+
+/**
+ * @brief  Interrogate the result of the last async job, considering the timeout and FSTAT errors.
+ *
+ * @return the result of the last async job
+ * @retval FTFC_EEP_IP_STATUS_OK            the job finished successfully
+ * @retval FTFC_EEP_IP_STATUS_FAILED        FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_PENDING       the job is still waiting for CCIF
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT       a timeout has occurred while waiting for CCIF
+ *  
+**/
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_GetJobResult (void);
+
+/**
+ * @brief  Getter for Ftfc_Eep_Ip_eBrownOutCode.
+ *
+ * @return the brownout code read after reset
+ * @retval 0x04 normal write was interrupted
+ * @retval 0x02 quick write was interrupted before writing all bytes to flash
+ * @retval 0x01 quick write was interrupted before maintenance completed
+ *  
+**/
+Ftfc_Eep_Ip_BrownOutCodeType Ftfc_Eep_Ip_GetBrownOutCode (void);
+
+#define EEP_STOP_SEC_CODE
+#include "Eep_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* FTFC_EEP_IP_H */

RTD/include/Ftfc_Eep_Ip_Types.h

@@ -0,0 +1,146 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : IPV_FTFC
+*   Dependencies         : 
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+#ifndef FTFC_EEP_IP_TYPES_H
+#define FTFC_EEP_IP_TYPES_H
+
+/**
+*   @file Ftfc_Eep_Ip_Types.h
+*
+*   @addtogroup FTFC_EEP_IP
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "StandardTypes.h"
+
+/*==================================================================================================
+*                                 SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define FTFC_EEP_IP_TYPES_VENDOR_ID_H                    43
+#define FTFC_EEP_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H     4
+#define FTFC_EEP_IP_TYPES_AR_RELEASE_MINOR_VERSION_H     4
+#define FTFC_EEP_IP_TYPES_AR_RELEASE_REVISION_VERSION_H  0
+#define FTFC_EEP_IP_TYPES_SW_MAJOR_VERSION_H             1
+#define FTFC_EEP_IP_TYPES_SW_MINOR_VERSION_H             0
+#define FTFC_EEP_IP_TYPES_SW_PATCH_VERSION_H             0
+
+/*==================================================================================================
+*                                       FILE VERSION CHECKS
+==================================================================================================*/
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Version checks for StandardTypes.h */
+    #if ((FTFC_EEP_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H != STD_AR_RELEASE_MAJOR_VERSION) || \
+         (FTFC_EEP_IP_TYPES_AR_RELEASE_MINOR_VERSION_H != STD_AR_RELEASE_MINOR_VERSION) \
+        )
+        #error "Ftfc_Eep_Ip_Types.h and StandardTypes.h are for different AUTOSAR versions!"
+    #endif
+#endif
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                              ENUMS
+==================================================================================================*/
+
+/** Return values for a FTFC operation. */
+typedef enum
+{
+    FTFC_EEP_IP_STATUS_OK,                      /**< success */
+    FTFC_EEP_IP_STATUS_FAILED,                  /**< failure */
+    FTFC_EEP_IP_STATUS_BLOCK_INCONSISTENT,      /**< the Compare API found a difference in the memory contents */
+    FTFC_EEP_IP_STATUS_PENDING,                 /**< the async job is pending */
+    FTFC_EEP_IP_STATUS_TIMEOUT,                 /**< a timeout has occured */
+    FTFC_EEP_IP_STATUS_FAILED_MGSTAT            /**< MGSTAT errors need to be reported separately */
+} Ftfc_Eep_Ip_StatusType;
+
+/** Brown-out detection code found after a reset */
+typedef enum
+{
+    FTFC_EEP_IP_NO_BO_DETECTED          = 0x00,     /**< No EEPROM issues detected */
+    FTFC_EEP_IP_BO_DURING_MAINTENANCE   = 0x01,     /**< Quick write maintenance has to be completed. */
+    FTFC_EEP_IP_BO_DURING_QUICK_WRITES  = 0x02,     /**< Quick writes were discarded due to a reset. */
+    FTFC_EEP_IP_BO_DURING_NORMAL_WRITES = 0x04      /**< A normal write was interrupted by reset. */
+} Ftfc_Eep_Ip_BrownOutCodeType;
+
+/** Accepted values for an operation's page size */
+typedef enum
+{
+    FTFC_EEP_IP_PAGE_BYTE       = 1,    /**< 8-bit  unaligned operation */
+    FTFC_EEP_IP_PAGE_WORD       = 2,    /**< 16-bit aligned   operation */
+    FTFC_EEP_IP_PAGE_LONGWORD   = 4,    /**< 32-bit aligned   operation */
+} Ftfc_Eep_Ip_PageSizeType;
+
+/*==================================================================================================
+*                                       FUNCTION PROTOTYPES
+==================================================================================================*/
+
+/** Mapped to the Access Code Callback provided by some upper layer module. */
+typedef void (*Ftfc_Eep_Ip_Ac_Callback_Type)                  (void);
+
+/** pointer to start eeprom access notification */
+typedef void (*Ftfc_Eep_Ip_StartEepromAccessNotif_Type)       (void);
+
+/** pointer to finished eeprom access notification */
+typedef void (*Ftfc_Eep_Ip_FinishedEepromAccessNotif_Type)    (void);
+
+/*==================================================================================================
+*                                  STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/** Configuration structure for the FTFC IP driver. */
+typedef struct
+{
+    Ftfc_Eep_Ip_Ac_Callback_Type                  acCallBackPtr;
+    Ftfc_Eep_Ip_StartEepromAccessNotif_Type       startEepromAccessNotifPtr;
+    Ftfc_Eep_Ip_FinishedEepromAccessNotif_Type    finishedEepromAccessNotifPtr;
+} Ftfc_Eep_Ip_ConfigType;
+
+/** The module's address type. */
+typedef uint32 Ftfc_Eep_Ip_AddressType;
+
+/** Type mainly used for storing offsets from a given address. */
+typedef uint32 Ftfc_Eep_Ip_LengthType;
+
+/*==================================================================================================
+*                                       
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* FTFC_EEP_IP_TYPES_H */

RTD/include/Ftm_Gpt_Ip.h

@@ -0,0 +1,387 @@
+/*==================================================================================================
+* Project :             RTD AUTOSAR 4.4
+* Platform :            CORTEXM
+* Peripheral :          Ftm_Srtc_Lptmr_LPit
+* Dependencies :        none
+*
+* Autosar Version :     4.4.0
+* Autosar Revision :    ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version :          1.0.0
+* Build Version :       S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef FTM_GPT_IP_H
+#define FTM_GPT_IP_H
+
+/**
+*   @file       Ftm_Gpt_Ip.h
+*
+*   @addtogroup ftm_ip FTM IPL
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Ftm_Gpt_Ip_Types.h"
+#include "Ftm_Gpt_Ip_Cfg.h"
+#include "OsIf.h"
+#include "Mcal.h"
+#include "SchM_Gpt.h"
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+#include "Devassert.h"
+#endif
+#if (FTM_GPT_IP_ENABLE_USER_MODE_SUPPORT == STD_ON)
+#include "Reg_eSys.h"
+#endif
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+/**
+* @internal
+* @brief Defines used for file version checks
+*/
+#define FTM_GPT_IP_VENDOR_ID                       43
+#define FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION        4
+#define FTM_GPT_IP_AR_RELEASE_MINOR_VERSION        4
+#define FTM_GPT_IP_AR_RELEASE_REVISION_VERSION     0
+#define FTM_GPT_IP_SW_MAJOR_VERSION                1
+#define FTM_GPT_IP_SW_MINOR_VERSION                0
+#define FTM_GPT_IP_SW_PATCH_VERSION                0
+
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+#if (FTM_GPT_IP_VENDOR_ID != FTM_GPT_IP_TYPES_VENDOR_ID)
+    #error "Ftm_Gpt_Ip.h and Ftm_Gpt_Ip_Types.h have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION != FTM_GPT_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (FTM_GPT_IP_AR_RELEASE_MINOR_VERSION != FTM_GPT_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (FTM_GPT_IP_AR_RELEASE_REVISION_VERSION != FTM_GPT_IP_TYPES_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Ftm_Gpt_Ip.h and Ftm_Gpt_Ip_Types.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((FTM_GPT_IP_SW_MAJOR_VERSION != FTM_GPT_IP_TYPES_SW_MAJOR_VERSION) || \
+     (FTM_GPT_IP_SW_MINOR_VERSION != FTM_GPT_IP_TYPES_SW_MINOR_VERSION) || \
+     (FTM_GPT_IP_SW_PATCH_VERSION != FTM_GPT_IP_TYPES_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Ftm_Gpt_Ip.h and Ftm_Gpt_Ip_Types.h are different"
+#endif
+
+
+#if (FTM_GPT_IP_VENDOR_ID != FTM_GPT_IP_VENDOR_ID_CFG)
+    #error "Ftm_Gpt_Ip.h and Ftm_Gpt_Ip_Cfg.h have different vendor ids"
+#endif
+/* Check if Ftm_Gpt_Ip header file and Ftm_Gpt_Ip_Cfg header file are of the same Autosar version */
+#if ((FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION != FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (FTM_GPT_IP_AR_RELEASE_MINOR_VERSION != FTM_GPT_IP_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (FTM_GPT_IP_AR_RELEASE_REVISION_VERSION != FTM_GPT_IP_AR_RELEASE_REVISION_VERSION_CFG) \
+    )
+    #error "AutoSar Version Numbers of Ftm_Gpt_Ip.h and Ftm_Gpt_Ip_Cfg.h are different"
+#endif
+/* Check if Ftm_Gpt_Ip file and Ftm_Gpt_Ip_Cfg header file are of the same Software version */
+#if ((FTM_GPT_IP_SW_MAJOR_VERSION != FTM_GPT_IP_SW_MAJOR_VERSION_CFG) || \
+     (FTM_GPT_IP_SW_MINOR_VERSION != FTM_GPT_IP_SW_MINOR_VERSION_CFG) || \
+     (FTM_GPT_IP_SW_PATCH_VERSION != FTM_GPT_IP_SW_PATCH_VERSION_CFG) \
+    )
+    #error "Software Version Numbers of Ftm_Gpt_Ip.h and Ftm_Gpt_Ip_Cfg.h are different"
+#endif
+
+
+#if (FTM_GPT_IP_ENABLE_USER_MODE_SUPPORT == STD_ON)
+    /* Check if header file and StandardTypes.h file are of the same Autosar version */
+    #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+        #if ((FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION != REG_ESYS_AR_RELEASE_MAJOR_VERSION) || \
+             (FTM_GPT_IP_AR_RELEASE_MINOR_VERSION != REG_ESYS_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Ftm_Gpt_Ip.h and Reg_eSys.h are different"
+        #endif
+    #endif
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION != SCHM_GPT_AR_RELEASE_MAJOR_VERSION) || \
+         (FTM_GPT_IP_AR_RELEASE_MINOR_VERSION != SCHM_GPT_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Ftm_Gpt_Ip.h and SchM_Gpt.h are different"
+    #endif
+    /* Check if this header file and OsIf.h file are of the same Autosar version */
+    #if ((FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION != OSIF_AR_RELEASE_MAJOR_VERSION) || \
+        (FTM_GPT_IP_AR_RELEASE_MINOR_VERSION != OSIF_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Ftm_Gpt_Ip.h and OsIf.h are different"
+    #endif
+#endif
+
+/* Checks against Devassert.h */
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
+         (FTM_GPT_IP_AR_RELEASE_MINOR_VERSION != DEVASSERT_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Ftm_Gpt_Ip.h and Devassert.h are different"
+    #endif
+#endif
+#endif /* STD_ON == FTM_GPT_IP_DEV_ERROR_DETECT */
+/*==================================================================================================
+*                                           CONSTANT-LIKE DEFINES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION-LIKE DEFINES(MACROS)
+==================================================================================================*/
+#if (FTM_GPT_IP_USED == STD_ON)
+
+/**
+* @internal
+* @brief The total FTM timer channel
+*/
+#define FTM_CHANNEL_COUNT   FTM_CONTROLS_COUNT
+
+/**
+* @internal
+* @brief Counter max value
+*/
+#define FTM_CNT_MAX_VALUE   0x0000FFFFU
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+/**
+* @internal
+* @brief MemMap section
+*/
+#define GPT_START_SEC_VAR_CLEARED_32
+#include "Gpt_MemMap.h"
+
+/**
+* @internal
+* @brief Global array variable used to store the runtime target time value.
+*/
+extern uint32 Ftm_Gpt_Ip_u32TargetValue[FTM_INSTANCE_COUNT][FTM_CONTROLS_COUNT];
+
+/**
+* @internal
+* @brief MemMap section
+*/
+#define GPT_STOP_SEC_VAR_CLEARED_32
+#include "Gpt_MemMap.h"
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+/**
+* @internal
+* @brief MemMap section
+*/
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+
+uint32 Ftm_Gpt_Ip_GetCounter(uint8 instance);
+uint32 Ftm_Gpt_Ip_GetCompareValue(uint8 instance, uint8 channel);
+uint32 Ftm_Gpt_Ip_GetInterruptFlag(uint8 instance, uint8 channel);
+extern FTM_Type * const ftmGptBase[FTM_INSTANCE_COUNT];
+/*================================================================================================*/
+/*================================================================================================*/
+/**
+* @brief         Function Name : Ftm_Gpt_Ip_Init
+* @details       Initializes the FTM instance. This functions is called for each FTM hardware Instance.
+*
+* @param[in]     instance     FTM hardware instance number
+* @param[in]     configPtr    Pointer to a selected configuration structure
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+*/
+void Ftm_Gpt_Ip_Init(uint8 instance, const Ftm_Gpt_Ip_InstanceConfigType *configPtr);
+/*================================================================================================*/
+/**
+* @brief         Function Name : Ftm_Gpt_Ip_InitChannel
+* @details       Initializes the FTM channels. This functions is called for each FTM hardware channel and:
+*
+* @param[in]     instance     FTM hardware instance number
+* @param[in]     configPtr    Pointer to a selected configuration structure
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+*/
+void Ftm_Gpt_Ip_InitChannel(uint8 instance, const Ftm_Gpt_Ip_ChannelConfigType *configPtr);
+/*================================================================================================*/
+/**
+* @brief        Function Name : Ftm_Gpt_Ip_Deinit
+* @details      De-Initializes the FTM module. This functions is called for each FTM hardware instance and:
+*                    - resets all channels to default
+*                    - disables the timer compare interrupts corresponding to Ftm channel
+*                    - clears the timer compare interrupt flags corresponding to Ftm channel
+*                    - resets the counter register and the counter initial value register.
+*                    - resets the channel value register and the modulo register
+*                    - disables the freeze mode
+*
+* @param[in]     instance     FTM hardware instance number
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver.
+*/
+void Ftm_Gpt_Ip_Deinit(uint8 instance);
+/*================================================================================================*/
+/**
+* @brief        Function Name : Ftm_Gpt_Ip_StartCounting
+* @details      This function is called for starting the Ftm timer channel
+*
+* @param[in]     instance        FTM hardware instance number
+* @param[in]     channel         Ftm channel
+* @param[in]     compareValue    Compare value
+* @return        void
+* @pre           The driver needs to be initialized. This function is called for starting the FTM timer channel.
+*/
+void Ftm_Gpt_Ip_StartCounting(uint8 instance, uint8 channel, uint16 compareValue);
+/*================================================================================================*/
+/**
+* @brief             Function Name : Ftm_Gpt_Ip_StartTimer
+* @details           This function is called for setting a new start counter value and enables the FTM counter and
+*                           - sets the new counter value
+*                           - enables the FTM counter
+*/
+void Ftm_Gpt_Ip_StartTimer(uint8 instance, uint16 counterValue);
+/*================================================================================================*/
+/**
+* @brief        Function Name : Ftm_Gpt_Ip_StopTimer
+* @details      This function is callded for stopping the Ftm counter.
+*                   - disables the FTM counter
+*
+* @param[in]     instance       FTM hardware instance
+* @return        void
+* @pre           The driver needs to be initialized. This function is called for stoping the FTM timer channel.
+*/
+void Ftm_Gpt_Ip_StopTimer(uint8 instance);
+/*================================================================================================*/
+/**
+* @brief        Function Name : Ftm_Gpt_Ip_EnableChannelInterrupt
+* @details      This function allows enabling interrupt generation of timer channel
+*               when timeout occurs
+*
+* @param[in]    instance        FTM hardware instance
+* @param[in]    channel         FTM hardware channel
+* @return       void
+* @pre          The driver needs to be initialized.
+*/
+void Ftm_Gpt_Ip_EnableChannelInterrupt(uint8 instance, uint8 channel);
+/*================================================================================================*/
+/**
+* @brief        Function Name : Ftm_Gpt_Ip_DisableChannelInterrupt
+* @details      This function allows disabling interrupt generation of timer channel
+*               when timeout occurs
+*
+* @param[in]     instance        FTM hardware instance
+* @param[in]     channel         FTM hardware channel
+* @return        void
+* @pre           The driver needs to be initialized.
+*/
+void Ftm_Gpt_Ip_DisableChannelInterrupt(uint8 instance, uint8 channel);
+/*================================================================================================*/
+/**
+* @brief         Function Name : Ftm_Gpt_Ip_SetHalfCycleReloadPoint
+* @details       Configures the value of the counter with half cycle of reload point.
+*
+* @param[in]     instance                  FTM hardware instance
+* @param[in]     reloadPoint               Reload value
+
+* @return
+* @pre           The driver needs to be initialized.
+*/
+void Ftm_Gpt_Ip_SetHalfCycleReloadPoint(uint8 instance, uint16 reloadPoint);
+/*================================================================================================*/
+#if (FTM_GPT_IP_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
+/**
+* @brief      The function changes the Ftm compare register value.
+* @details This function:
+*          - Write next timeout to local variable
+*
+* @param[in]     instance        FTM hardware instance
+* @param[in]     channel         Channel
+* @param[in]     value           Channel timeout value
+* @return        void
+* @pre           The driver needs to be initialized.
+*/
+void Ftm_Gpt_Ip_ChangeNextTimeoutValue(uint8 instance, uint8 channel, uint16 value);
+#endif/*FTM_GPT_IP_CHANGE_NEXT_TIMEOUT_VALUE*/
+/*================================================================================================*/
+#if (FTM_GPT_IP_SET_CLOCK_MODE == STD_ON)
+/**
+* @brief        The function changes the FTM prescaler value.
+* @details      This function sets the FTM prescaler based on the input mode.
+*
+* @param[in]    instance     FTM hardware instance
+* @param[in]    prescalerMode    FTM_GPT_IP_CLOCKMODE_NORMAL or FTM_GPT_IP_CLOCKMODE_ALTERNATE
+*
+* @return       void
+* @pre          The driver needs to be initialized.On/Off by the configuration parameter: GPT_DUAL_CLOCK_MODE
+* @implements   Ftm_Gpt_Ip_SetClockMode_Activity
+*/
+void Ftm_Gpt_Ip_SetClockMode(uint8 instance, Ftm_Gpt_Ip_ClockModeType prescalerMode);
+#endif/*FTM_GPT_IP_SET_CLOCK_MODE*/
+/*================================================================================================*/
+#if(FTM_GPT_IP_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+/**
+* @brief      The function start the FTM channel.
+* @details    This function start the FTM channel the input mode.
+*
+* @param[in]  instance        FTM hardware instance
+* @param[in]  uPrescaler      Prescaler
+* @param[in]  bFreezeEnable   Freezebit
+* @return     void
+* @pre        The driver needs to be initialized
+*/
+void Ftm_Gpt_Ip_StartPredefTimer (uint8 instance,uint8 channel, uint8 uPrescaler, uint8 clocksource, boolean bFreezeEnable);
+/*================================================================================================*/
+/**
+* @brief      The function stop the FTM channel.
+* @details    This function stop the FTM channel.
+*
+* @param[in]  channel      FTM hardware channel
+* @param[in]  instance     FTM hardware instance
+*
+*
+* @return     void
+* @pre        The driver needs to be initialized
+*/
+void Ftm_Gpt_Ip_StopPredefTimer (uint8 instance, uint8 channel);
+#endif/*FTM_GPT_IP_PREDEFTIMER_FUNCTIONALITY_API*/
+
+/**
+* @internal
+* @brief MemMap section
+*/
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#endif/*FTM_GPT_IP_USED*/
+
+#ifdef __cplusplus
+}
+#endif
+/** @} */
+#endif/*FTM_GPT_IP_H*/

RTD/include/Ftm_Gpt_Ip_Types.h

@@ -0,0 +1,206 @@
+/*==================================================================================================
+* Project :             RTD AUTOSAR 4.4
+* Platform :            CORTEXM
+* Peripheral :          Ftm_Srtc_Lptmr_LPit
+* Dependencies :        none
+*
+* Autosar Version :     4.4.0
+* Autosar Revision :    ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version :          1.0.0
+* Build Version :       S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef FTM_GPT_IP_TYPES_H
+#define FTM_GPT_IP_TYPES_H
+
+/**
+*   @file       Ftm_Gpt_Ip_Types.h
+*
+*   @addtogroup ftm_ip Ftm IPL
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Ftm_Gpt_Ip_Cfg_Defines.h"
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+/**
+* @internal
+* @brief Defines used for file version checks
+*/
+#define FTM_GPT_IP_TYPES_VENDOR_ID                       43
+#define FTM_GPT_IP_TYPES_AR_RELEASE_MAJOR_VERSION        4
+#define FTM_GPT_IP_TYPES_AR_RELEASE_MINOR_VERSION        4
+#define FTM_GPT_IP_TYPES_AR_RELEASE_REVISION_VERSION     0
+#define FTM_GPT_IP_TYPES_SW_MAJOR_VERSION                1
+#define FTM_GPT_IP_TYPES_SW_MINOR_VERSION                0
+#define FTM_GPT_IP_TYPES_SW_PATCH_VERSION                0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+#if (FTM_GPT_IP_DEFINES_VENDOR_ID_CFG != FTM_GPT_IP_TYPES_VENDOR_ID)
+    #error "Ftm_Gpt_Ip_Cfg_Defines.h and Ftm_Gpt_Types.h have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((FTM_GPT_IP_DEFINES_AR_RELEASE_MAJOR_VERSION_CFG != FTM_GPT_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (FTM_GPT_IP_DEFINES_AR_RELEASE_MINOR_VERSION_CFG != FTM_GPT_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (FTM_GPT_IP_DEFINES_AR_RELEASE_REVISION_VERSION_CFG != FTM_GPT_IP_TYPES_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Ftm_Gpt_Ip_Cfg_Defines.h and Ftm_Gpt_Ip_Types.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((FTM_GPT_IP_DEFINES_SW_MAJOR_VERSION_CFG != FTM_GPT_IP_TYPES_SW_MAJOR_VERSION) || \
+     (FTM_GPT_IP_DEFINES_SW_MINOR_VERSION_CFG != FTM_GPT_IP_TYPES_SW_MINOR_VERSION) || \
+     (FTM_GPT_IP_DEFINES_SW_PATCH_VERSION_CFG != FTM_GPT_IP_TYPES_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Ftm_Gpt_Ip_Cfg_Defines.h and Ftm_Gpt_Ip_Types.h are different"
+#endif
+/*==================================================================================================
+*                                      CONSTANT-LIKE DEFINES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      FUNCTION-LIKE DEFINES(MACROS)
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/**
+* @brief      Unit options for counting mode
+* @details    This is used to choose how the timer is counting
+*
+* @implements
+*/
+typedef enum
+{
+    FTM_GPT_IP_MODE_UP_TIMER           = 0x01U,    /**< @brief Timer with up counter */
+    FTM_GPT_IP_MODE_UP_DOWN_TIMER      = 0x02U     /**< @brief timer with up-down counter */
+}
+Ftm_Gpt_Ip_CountingMode;
+
+/**
+ * @brief     Enum containing the FTM module clock sources
+ * @details   This is used to choose the FTM clock sources.
+ */
+typedef enum
+{
+    FTM_GPT_IP_CLOCK_SOURCE_NONE                 = 0x00U,    /**< @brief None use clock for FTM  */
+    FTM_GPT_IP_CLOCK_SOURCE_SYSTEMCLK            = 0x01U,    /**< @brief System clock            */
+    FTM_GPT_IP_CLOCK_SOURCE_FIXED_FREQUENCY      = 0x02U,    /**< @brief Fixed frequency         */
+    FTM_GPT_IP_CLOCK_SOURCE_EXTERNALCLK          = 0x03U     /**< @brief External clock          */
+}
+Ftm_Gpt_Ip_ClockSource;
+
+/**
+* @brief    Prescaler type. Indicates of whether the clock channel mode is "NORMAL" or "ALTERNATE".
+* @details  This enumeration specifies the possible types of prescalers used to configure base-clock timers
+*/
+#if (FTM_GPT_IP_SET_CLOCK_MODE == STD_ON)
+typedef enum
+{
+FTM_GPT_IP_CLOCKMODE_NORMAL    = 0x0U,  /**< @brief Selected value is the NORMAL configured prescaler */
+FTM_GPT_IP_CLOCKMODE_ALTERNATE = 0x1U   /**< @brief Selected value is the ALTERNATE configured prescaler */
+} Ftm_Gpt_Ip_ClockModeType;
+#endif /* FTM_GPT_IP_SET_CLOCK_MODE */
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+/**
+* @brief    Callback type for each channel
+* @details  Ftm_Gpt_Ip_CallbackType
+*
+*/
+typedef void (*Ftm_Gpt_Ip_CallbackType)(uint8 callbackParam);
+
+/**
+* @brief       Structure to configure the FTM instance
+* @details     This structure holds the configuration settings for InstanceConfigType
+*
+* Implements   Ftm_Gpt_Ip_InstanceConfigType
+*/
+typedef struct
+{
+    boolean                       freezeBit;                /**< @brief Enable/Disable freezeBit */
+    Ftm_Gpt_Ip_ClockSource        clocksource;              /**< @brief Select FTM clocksource */
+#if (FTM_GPT_IP_SET_CLOCK_MODE == STD_ON)
+    uint8                         clockAlternatePrescaler;  /**< @brief Select AlternatePrescaler */
+#endif
+    uint8                         clockPrescaler;           /**< @brief Select prescalerValue */
+    Ftm_Gpt_Ip_CountingMode       mode;                     /**< @brief Select mode */
+} Ftm_Gpt_Ip_InstanceConfigType;
+
+/**
+* @brief       Structure to configure the FTM channels
+* @details     This structure holds the configuration settings for the ChannelConfigType
+*
+* Implements   Ftm_Gpt_Ip_ChannelConfigType
+*/
+typedef struct
+{
+    uint8                                    hwChannel;        /**< @brief hwChannel */
+    Ftm_Gpt_Ip_CallbackType                  callback;         /**< @brief callback */
+    uint8                                    callbackParam;    /**< @brief callbackParam */
+} Ftm_Gpt_Ip_ChannelConfigType;
+
+/**
+* @brief       internal context structure
+* @details     This structure is used by the IPL driver for internal logic.
+*              The content is populated on InitChannel
+*
+*/
+typedef struct
+{
+    boolean                       chInit;               /**< @brief chInit */
+    Ftm_Gpt_Ip_CallbackType       callback;             /**< @brief callback */
+    uint8                         callbackParam;        /**< @brief callbackParam */
+} Ftm_Gpt_Ip_ChState;
+
+/**
+* @brief       internal context structure
+* @details     This structure is used by the IPL driver for internal logic.
+*              The content is populated on Init
+*
+*/
+typedef struct
+{
+    uint8       clockPrescaler;              /**< @brief Clock divide value for the NormalPrescaler */
+    uint8       clockAlternatePrescaler;     /**< @brief Clock divide value for the AlternatePrescaler */
+} Ftm_Gpt_Ip_InstanceState;
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+#endif/*FTM_GPT_IP_TYPES_H*/

RTD/include/Gpt.h

@@ -0,0 +1,1036 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef GPT_H
+#define GPT_H
+
+/**
+*   @file       Gpt.h
+*
+*   @addtogroup gpt Gpt Driver
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "StandardTypes.h"
+#include "Gpt_Ipw_Types.h"
+#include "Gpt_Cfg.h"
+#include "Gpt_EnvCfg.h"
+#include "Mcal.h"
+#if (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON)
+    #include "EcuM_Externals.h"
+#endif
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+/**
+* @internal
+* @brief Defines used for file version checks
+*/
+#define GPT_VENDOR_ID                       43
+#define GPT_MODULE_ID                       100
+#define GPT_AR_RELEASE_MAJOR_VERSION        4
+#define GPT_AR_RELEASE_MINOR_VERSION        4
+#define GPT_AR_RELEASE_REVISION_VERSION     0
+#define GPT_SW_MAJOR_VERSION                1
+#define GPT_SW_MINOR_VERSION                0
+#define GPT_SW_PATCH_VERSION                0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if header file and Std_Types.h file are of the same Autosar version */
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((GPT_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
+         (GPT_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Gpt.h and Std_Types.h are different"
+    #endif
+    /* Check if Gpt.h file and Mcal.h header file are of the same Autosar version */
+    #if ((GPT_AR_RELEASE_MAJOR_VERSION    != MCAL_AR_RELEASE_MAJOR_VERSION) || \
+         (GPT_AR_RELEASE_MINOR_VERSION    != MCAL_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Gpt.h and Mcal.h are different"
+    #endif
+#endif
+/* Check if header file and EcuM_Cbk.h file are of the same Autosar version */
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON)
+        #if ((GPT_AR_RELEASE_MAJOR_VERSION != ECUM_CBK_AR_RELEASE_MAJOR_VERSION) || \
+             (GPT_AR_RELEASE_MINOR_VERSION != ECUM_CBK_AR_RELEASE_MINOR_VERSION) \
+            )
+            #error "AutoSar Version Numbers of Gpt.h and EcuM_Externals.h are different"
+        #endif
+    #endif
+#endif
+
+#if (GPT_VENDOR_ID != GPT_IPW_TYPES_VENDOR_ID)
+    #error "Gpt.h and Gpt_Ipw_Types.h have different vendor ids"
+#endif
+/* Check if this header file and GPT IPW header file are of the same Autosar version */
+#if ((GPT_AR_RELEASE_MAJOR_VERSION != GPT_IPW_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_AR_RELEASE_MINOR_VERSION != GPT_IPW_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_AR_RELEASE_REVISION_VERSION != GPT_IPW_TYPES_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt.h and Gpt_Ipw_Types.h are different"
+#endif
+/* Check if this header file and GPT IPW header file are of the same Software version */
+#if ((GPT_SW_MAJOR_VERSION != GPT_IPW_TYPES_SW_MAJOR_VERSION) || \
+     (GPT_SW_MINOR_VERSION != GPT_IPW_TYPES_SW_MINOR_VERSION) || \
+     (GPT_SW_PATCH_VERSION != GPT_IPW_TYPES_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt.h and Gpt_Ipw_Types.h are different"
+#endif
+
+#if ( GPT_VENDOR_ID!= GPT_ENVCFG_VENDOR_ID)
+    #error "Gpt.h and Gpt_EnvCfg.h have different vendor ids"
+#endif
+/* Check if the header files are of the same Autosar version */
+#if ((GPT_AR_RELEASE_MAJOR_VERSION != GPT_ENVCFG_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_AR_RELEASE_MINOR_VERSION != GPT_ENVCFG_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_AR_RELEASE_REVISION_VERSION != GPT_ENVCFG_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt.h and Gpt_EnvCfg.h are different"
+#endif
+/* Check if the header files are of the same Software version */
+#if ((GPT_SW_MAJOR_VERSION != GPT_ENVCFG_SW_MAJOR_VERSION) || \
+     (GPT_SW_MINOR_VERSION != GPT_ENVCFG_SW_MINOR_VERSION) || \
+     (GPT_SW_PATCH_VERSION != GPT_ENVCFG_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt.h and Gpt_EnvCfg.h are different"
+#endif
+
+#if ( GPT_VENDOR_ID!= GPT_VENDOR_ID_CFG)
+    #error "Gpt.h and Gpt_Cfg.h have different vendor ids"
+#endif
+/* Check if the header files are of the same Autosar version */
+#if ((GPT_AR_RELEASE_MAJOR_VERSION != GPT_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (GPT_AR_RELEASE_MINOR_VERSION != GPT_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (GPT_AR_RELEASE_REVISION_VERSION != GPT_AR_RELEASE_REVISION_VERSION_CFG) \
+    )
+    #error "AutoSar Version Numbers of Gpt.h and Gpt_Cfg.h are different"
+#endif
+/* Check if the header files are of the same Software version */
+#if ((GPT_SW_MAJOR_VERSION != GPT_SW_MAJOR_VERSION_CFG) || \
+     (GPT_SW_MINOR_VERSION != GPT_SW_MINOR_VERSION_CFG) || \
+     (GPT_SW_PATCH_VERSION != GPT_SW_PATCH_VERSION_CFG) \
+    )
+    #error "Software Version Numbers of Gpt.h and Gpt_Cfg.h are different"
+#endif
+
+/*==================================================================================================
+*                                          CONSTANT-LIKE DEFINES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      FUNCTION-LIKE DEFINES(MACROS)
+==================================================================================================*/
+
+/*==================================================================================================*/
+/**
+* @brief        Function Gpt_StartTimer is called when the driver is in sleep mode for a channel which is not wakeup enabled.
+* @details      Errors and exceptions that will be detected by the GPT driver.
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+#if(GPT_VALIDATE_STATE == STD_ON)
+    #if(((GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON)) || (GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON))
+        #define GPT_E_INVALID_CALL    ((uint8)0xA0U)
+    #endif
+#endif
+
+/**
+* @brief        Function called without module initialization.
+* @details      Errors and exceptions that will be detected by the GPT driver.
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+#if((GPT_VALIDATE_CHANNEL_CALL == STD_ON) || (GPT_VALIDATE_GLOBAL_CALL == STD_ON))
+    #define GPT_E_UNINIT        ((uint8)0x0AU)
+#endif
+
+/**
+* @brief        Initialization called when already initialized.
+* @details      Errors and exceptions that will be detected by the GPT driver.
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+#if(GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    #define GPT_E_ALREADY_INITIALIZED   ((uint8)0x0DU)
+#endif
+
+/**
+* @brief        Function called for invalid channel.
+* @details      Errors and exceptions that will be detected by the GPT driver.
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+#define GPT_E_PARAM_CHANNEL ((uint8)0x14U)
+
+/**
+* @brief        Function called with parameter value out of range
+* @details      Errors and exceptions that will be detected by the GPT driver
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+#if (GPT_VALIDATE_PARAM == STD_ON)
+    #define GPT_E_PARAM_VALUE   ((uint8)0x15U)
+#endif
+
+#if(((GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON) && (GPT_VALIDATE_PARAM == STD_ON)) ||\
+    ((GPT_VERSION_INFO_API == STD_ON) && (GPT_DEV_ERROR_DETECT == STD_ON)))
+/**
+* @brief        Function called with NULL pointer
+* @details      Errors and exceptions that will be detected by the GPT driver
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+#define GPT_E_PARAM_POINTER  ((uint8)0x16U)
+#endif
+
+#if((GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON) && (GPT_VALIDATE_PARAM == STD_ON))
+/**
+* @brief        Function called with invalid the parameter in function Gpt_GetPredefTimerValue
+* @details      Errors and exceptions that will be detected by the GPT driver
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+#define GPT_E_PARAM_PREDEF_TIMER                  ((uint8)0x17)
+#endif /* (GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON) && (GPT_VALIDATE_PARAM == STD_ON) */
+
+/**
+* @brief        Function called when timer channel is still running.
+* @details      Errors and exceptions that will be detected by the GPT driver.
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+    #define GPT_E_BUSY          ((uint8)0x0BU)
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+/**
+* @brief        Function called with invalid the parameter in function Gpt_GetPredefTimerValue
+* @details      Errors and exceptions that will be detected by the GPT driver
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+    #define GPT_E_MODE                          ((uint8)0x0C)
+
+#endif /* (GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON) */
+/**
+* @brief        Function called when a timeout is occurred.
+* @details      Errors and exceptions that will be detected by the GPT driver.
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+    #define GPT_E_TIMEOUT         ((uint8)0x2BU)
+/**
+* @brief        Function called with invalid the parameter in function Gpt_Init
+* @details      Errors and exceptions that will be detected by the GPT driver
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+#if((GPT_VALIDATE_PARAM == STD_ON) && (GPT_DEV_ERROR_DETECT == STD_ON))
+    #define GPT_E_INIT_FAILED                  ((uint8)0x0E)
+#endif
+
+/**
+* @brief        API Gpt_SetClockMode service called with wrong parameter.
+* @details      Parameters used when raising an error/exception
+* @implements
+*/
+#if((GPT_SET_CLOCK_MODE == STD_ON) && (GPT_VALIDATE_PARAM == STD_ON))
+    #define GPT_E_PARAM_CLOCK_MODE                    ((uint8)0x17U)
+#endif
+
+/**
+* @brief        Function  called with invalid mode param.
+* @details      Errors and exceptions that will be detected by the GPT driver
+*
+* @implements   Gpt_Det_ErrorCodes_define
+*/
+#if ((GPT_VALIDATE_PARAM == STD_ON) &&(GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON))
+    #define GPT_E_PARAM_MODE    ((uint8)0x1FU)
+#endif
+
+/**
+* @brief function called for invalid channel on the current core
+* @details Errors and exceptions that will be detected by the GPT driver
+*
+* @implements     Gpt_Det_ErrorCodes_define
+*/
+#define GPT_E_PARAM_CONFIG  ((uint8)0x18U)
+
+/** API SERVICE IDs */
+
+/**
+* @brief        API service ID for Gpt_GetVersionInfo  function
+* @details      Parameters used when raising an error/exception
+*/
+#if ((GPT_VERSION_INFO_API == STD_ON) && (GPT_DEV_ERROR_DETECT == STD_ON))
+    #define GPT_GETVERSIONINFO_ID       ((uint8)0x00U)
+#endif
+/**
+* @brief        API service ID for Gpt_Init function
+* @details      Parameters used when raising an error/exception
+*/
+#if ((GPT_VALIDATE_GLOBAL_CALL == STD_ON) || ((GPT_VALIDATE_PARAM == STD_ON) && (GPT_DEV_ERROR_DETECT == STD_ON)))
+    #define GPT_INIT_ID                 ((uint8)0x01U)
+#endif
+
+/**
+* @brief        API service ID for Gpt_DeInit function
+* @details      Parameters used when raising an error/exception
+*/
+#if (GPT_DEINIT_API == STD_ON)
+        #define GPT_DEINIT_ID               ((uint8)0x02U)
+#endif
+
+/**
+* @brief        API service ID for Gpt_GetTimeElapsed function
+* @details      Parameters used when raising an error/exception
+*/
+#if ((GPT_TIME_ELAPSED_API == STD_ON) && (GPT_VALIDATE_CHANNEL_CALL == STD_ON))
+    #define GPT_TIMEELAPSED_ID          ((uint8)0x03U)
+#endif
+
+/**
+* @brief        API service ID for Gpt_GetTimeRemaining function
+* @details      Parameters used when raising an error/exception
+*/
+#if ((GPT_TIME_REMAINING_API == STD_ON) && (GPT_VALIDATE_CHANNEL_CALL == STD_ON))
+    #define GPT_TIMEREMAINING_ID        ((uint8)0x04U)
+#endif
+
+/**
+* @brief        API service ID for Gpt_StartTimer function
+* @details      Parameters used when raising an error/exception
+*/
+#define GPT_STARTTIMER_ID           ((uint8)0x05U)
+
+/**
+* @brief        API service ID for Gpt_StopTimer function
+* @details      Parameters used when raising an error/exception
+*/
+#if(GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    #define GPT_STOPTIMER_ID            ((uint8)0x06U)
+#endif
+
+#if((GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON) && ((GPT_VALIDATE_CHANNEL_CALL == STD_ON) || (GPT_VALIDATE_PARAM == STD_ON)))
+/**
+* @brief        API service ID for Gpt_EnableNotification function
+* @details      Parameters used when raising an error/exception
+*/
+#define GPT_ENABLENOTIFICATION_ID   ((uint8)0x07U)
+
+/**
+* @brief        API service ID for Gpt_DisableNotification function
+* @details      Parameters used when raising an error/exception
+*/
+#define GPT_DISABLENOTIFICATION_ID  ((uint8)0x08U)
+#endif
+
+/**
+* @brief        API service ID for Gpt_SetMode function
+* @details      Parameters used when raising an error/exception
+*/
+#if(((GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_VALIDATE_GLOBAL_CALL == STD_ON)) ||\
+    ((GPT_VALIDATE_PARAM == STD_ON) &&(GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON)))
+    #define GPT_SETMODE_ID              ((uint8)0x09U)
+#endif
+
+#if ((GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON))
+
+#if((GPT_VALIDATE_CHANNEL_CALL == STD_ON) || (GPT_VALIDATE_PARAM == STD_ON))
+/**
+* @brief        API service ID for Gpt_DisableWakeup function
+* @details      Parameters used when raising an error/exception
+*/
+#define GPT_DISABLEWAKEUP_ID        ((uint8)0x0AU)
+
+/**
+* @brief        API service ID for Gpt_EnableWakeup function
+* @details      Parameters used when raising an error/exception
+*/
+#define GPT_ENABLEWAKEUP_ID         ((uint8)0x0BU)
+#endif
+
+/**
+* @brief        API service ID for Gpt_CheckWakeup function
+* @details      Parameters used when raising an error/exception
+*/
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    #define GPT_CHECKWAKEUP_ID          ((uint8)0x0CU)
+#endif
+#endif /* ((GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON)) */
+/**
+* @brief        API service ID for Gpt_ProcessCommonInterrupt generic ISR handler
+* @details      Parameters used when raising an error/exception
+*/
+#define GPT_PROCESSCOMMONINTERRUPT_ID          ((uint8)0x11U)
+
+/**
+* @brief        API service ID for Gpt_ChangeNextTimeoutValue function
+* @details      Parameters used when raising an error/exception
+*/
+#if (GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
+        #define GPT_CHANGE_NEXT_TIMEOUT_VALUE_ID         ((uint8)0x0FU)
+#endif
+
+/**
+* @brief        API service ID for Gpt_SetClockMode function
+* @details      Parameters used when raising an error/exception
+*/
+#if((GPT_VALIDATE_GLOBAL_CALL == STD_ON) && (GPT_SET_CLOCK_MODE == STD_ON))
+    #define GPT_SET_CLOCK_MODE_ID                       ((uint8)0x10U)
+#endif
+
+/**
+* @brief        API service ID for Gpt_GetPredefTimerValue function
+* @details      Parameters used when raising an error/exception
+*/
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+    #define GPT_GET_PREDEF_TIMERVALUE_ID                ((uint8)0x0DU)
+#endif
+
+/**
+* @brief        API service ID for Gpt_Channel_EnableChainMode function
+* @details      Parameters used when raising an error/exception
+*/
+#if(GPT_CHAIN_MODE == STD_ON)
+    #define GPT_ENABLE_CHAIN_MODE_ID               ((uint8)0x21U)
+    #define GPT_DISABLE_CHAIN_MODE_ID              ((uint8)0x22U)
+#endif
+
+/**
+* @brief Instance ID of this GPT driver.
+*
+*/
+#define GPT_INSTANCE_ID   ((uint8)0U)
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+/**
+* @brief   This enumerated type allows the selection of different power modes.
+* @details Modes of the GPT driver.
+*
+* @implements Gpt_ModeType_enumeration
+*/
+typedef enum
+{
+    GPT_MODE_NORMAL = 0U,             /**< @brief GPT Normal operation mode of the GPT */
+    GPT_MODE_SLEEP = 1U               /**< @brief GPT Sleep mode */
+} Gpt_ModeType;
+
+/**
+* @brief    Gpt channel mode type. Indicates of whether the channel mode is "CONTINUOUS" or "ONE SHOT".
+* @details  ChannelModeType of channel.
+*/
+typedef enum
+{
+    GPT_CH_MODE_CONTINUOUS = 0U,      /**< @brief GPT channel mode -  continuous mode */
+    GPT_CH_MODE_ONESHOT    = 1U       /**< @brief GPT channel mode -  one-shot mode. */
+} Gpt_ChannelModeType;
+
+/**
+* @brief    Prescaler type. Indicates of whether the clock channel mode is "GPT_NORMAL" or "GPT_ALTERNATE".
+* @details  This enumeration specifies the possible types of prescalers used to configure base-clock timers
+*/
+#if (GPT_SET_CLOCK_MODE == STD_ON)
+typedef enum
+{
+    GPT_CLOCKMODE_NORMAL    = 0x0U,  /**< @brief Selected value is the NORMAL configured prescaler */
+    GPT_CLOCKMODE_ALTERNATE = 0x1U   /**< @brief Selected value is the ALTERNATE configured prescaler */
+} Gpt_ClockModeType;
+#endif /* GPT_SET_CLOCK_MODE */
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+/**
+* @internal
+* @brief    Gpt channel ID data type
+* @details  Gpt channel type
+* @implements Gpt_ChannelType_typedef
+*/
+typedef uint8 Gpt_ChannelType;
+
+/**
+* @internal
+* @brief    Used for reading and setting the timer value in number of ticks.
+* @details  Gpt timeout value type
+* @implements Gpt_ValueType_typedef
+*/
+typedef uint32 Gpt_ValueType;
+
+/**
+* @internal
+* @brief    The callback notifications shall be configurable as pointers to
+*           user defined functions within the configuration structure.
+* @details  Gpt channel notification type.
+*
+*/
+typedef void (*Gpt_NotificationType)(void);
+
+/**
+* @internal
+* @brief    Gpt channel configuration type.
+* @details  Configuration structure
+*
+*/
+typedef struct
+{
+    /** @brief GPT ch WakeUp enable */
+    boolean Gpt_bEnableWakeup;
+    /** @brief Pointer to external callback */
+    Gpt_NotificationType Gpt_pfNotification;
+
+#if ((GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON))
+    /** @brief EcuM wake up source Id */
+    EcuM_WakeupSourceType Gpt_uWakeupSource;
+#endif
+    /** @brief Channel max tick value */
+    Gpt_ValueType Gpt_uChannelTickValueMax;
+    /** @brief GPT channel mode */
+    Gpt_ChannelModeType Gpt_eChannelMode;
+    /** @brief Hardware dependent channel configuration */
+    Gpt_Ipw_HwChannelConfigType *Gpt_Ipw_HwChannelConfig;
+} Gpt_ChannelConfigType;
+
+/**
+* @internal
+* @brief        Gpt configuration type.
+* @details      This is the type of the data structure including the configuration
+*               set required for initializing the GPT driver.
+*
+* @implements   Gpt_ConfigType_structure
+*/
+typedef struct
+{
+    /** @brief Number of GPT channels (configured in tresos plugin builder) */
+    Gpt_ChannelType              channelCount;
+    /** @brief Pointer to the GPT channel configuration */
+    const Gpt_ChannelConfigType        (*Gpt_pChannelConfig)[];
+    /** @brief Number of GPT instances (configured in tresos plugin builder) */
+    uint8 instanceCount;
+    /** @brief Pointer to the GPT instance configuration */
+    Gpt_Ipw_HwInstanceConfigType (*Gpt_Ipw_HwInstanceConfig)[];
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+    /** @brief Pointer to the GPT channel predef timer configuration */
+    const Gpt_HwPredefChannelConfigType * const (*Gpt_pChannelPredefConfigType);
+#endif
+    /** @brief channel index in each partition map table*/
+    const uint8                  (*u8GptChannelIdToIndexMap)[];
+} Gpt_ConfigType;
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+#if (GPT_PRECOMPILE_SUPPORT == STD_OFF)
+/**
+* @internal
+* @brief MemMap section
+*/
+#define GPT_START_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Gpt_MemMap.h"
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+ /* Check if header file and MemMap.h file are of the same Autosar version */
+ #if ((GPT_AR_RELEASE_MAJOR_VERSION != GPT_MEMMAP_AR_RELEASE_MAJOR_VERSION) || \
+      (GPT_AR_RELEASE_MINOR_VERSION != GPT_MEMMAP_AR_RELEASE_MINOR_VERSION))
+     #error "AutoSar Version Numbers of Gpt.h and Gpt_MemMap.h are different"
+ #endif
+#endif
+
+GPT_CONFIG_EXT
+
+/**
+* @internal
+* @brief MemMap section
+*/
+#define GPT_STOP_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Gpt_MemMap.h"
+
+#else
+
+/**
+* @internal
+* @brief MemMap section
+*/
+#define GPT_START_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Gpt_MemMap.h"
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+ /* Check if header file and MemMap.h file are of the same Autosar version */
+ #if ((GPT_AR_RELEASE_MAJOR_VERSION != GPT_MEMMAP_AR_RELEASE_MAJOR_VERSION) || \
+      (GPT_AR_RELEASE_MINOR_VERSION != GPT_MEMMAP_AR_RELEASE_MINOR_VERSION))
+     #error "AutoSar Version Numbers of Gpt.h and Gpt_MemMap.h are different"
+ #endif
+#endif
+/* Extern declarations of GPT Pre compile configuration from Gpt_PBCfg.c */
+#if (GPT_PRECOMPILE_SUPPORT == STD_ON)
+    #if(GPT_MULTICORE_ENABLED == STD_ON)
+extern const Gpt_ConfigType* const Gpt_Config[GPT_MAX_PARTITIONS];
+    #else
+extern const Gpt_ConfigType Gpt_Config;
+    #endif
+#endif
+
+/**
+* @internal
+* @brief MemMap section
+*/
+#define GPT_STOP_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Gpt_MemMap.h"
+
+#endif
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+/**
+* @internal
+* @brief MemMap section
+*/
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+
+/*================================================================================================*/
+#if (GPT_VERSION_INFO_API == STD_ON)
+/**
+* @brief       This function returns the version information of this module.
+* @details     This service returns the version information of this module. The version information
+*              includes:
+*                    - Module Id
+*                    - Vendor Id
+*                    - Vendor specific version numbers
+*              If source code for caller and callee of this function is available this function should
+*              be realized as a macro. The macro should be defined in the modules header file.
+* @param[out]  versioninfo - pointer to location to store version info
+*
+* @return       void
+* @api
+*
+* @pre          Gpt_Init must be called before.
+* @implements   Gpt_GetVersionInfo_Activity
+*/
+void Gpt_GetVersionInfo(Std_VersionInfoType * VersionInfoPtr);
+#endif
+
+/*================================================================================================*/
+/**
+* @brief        GPT driver initialization function.
+* @details      This service is a non reentrant function used for driver initialization.
+*               The Initialization function shall initialize all relevant registers of
+*               the configured hardware with the values of the structure referenced by the parameter ConfigPtr.
+*               All time units used within the API services of the GPT driver shall be of the unit ticks.
+*               This function shall only initialize the configured resources. Resources that are
+*               not configured in the configuration file shall not be touched.
+*               The following rules regarding initialization of controller registers shall apply
+*               to the GPT Driver implementation:
+*           [1] If the hardware allows for only one usage of the register, the driver
+*               module implementing that functionality is responsible for initializing the register
+*           [2] If the register can affect several hardware modules and if it is an IO register it
+*               shall be initialized by the PORT driver
+*           [3] If the register can affect several hardware modules and if it is not an IO register
+*               it shall be initialized by the MCU driver
+*           [4] One-time writable registers that require initialization directly after reset shall be
+*               initialized by the startup code
+*           [5] All other registers shall be initialized by the startup code
+*
+* @param[in]    configPtr    Pointer to a selected configuration structure
+*
+* @return       void
+* @api
+*
+* @pre          The data structure including the configuration set required for initializing the GPT driver..
+* @implements   Gpt_Init_Activity
+*/
+void Gpt_Init (const Gpt_ConfigType * configPtr);
+
+/*================================================================================================*/
+#if (GPT_DEINIT_API == STD_ON)
+/**
+* @brief        GPT driver de-initialization function.
+* @details      Service for de initializing all hardware timer channels to their power on reset state.
+*               The state of the peripheral after DeInit shall be the same as after power on reset.
+*               The service influences only the peripherals, which are allocated by static
+*               configuration and the runtime configuration set passed by the previous call of Gpt_Init()
+*               The driver needs to be initialized before calling Gpt_DeInit(). Otherwise, the
+*               function Gpt_DeInit shall raise the development error GPT_E_UNINIT and leave the desired
+*               de initialization functionality without any action.
+*
+* @api
+* @return       void
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_DeInit_Activity
+*/
+void Gpt_DeInit(void);
+#endif
+
+/*================================================================================================*/
+#if (GPT_TIME_ELAPSED_API == STD_ON)
+/**
+* @brief        GPT driver function for fetching the elapsed timer value.
+* @details      Service for querying the time already elapsed.
+*               In one shot mode, this is the value relative to the point in time, the channel has been
+*               started with Gpt_StartTimer (calculated by the normal operation function by subtracting
+*               the current minus the initial timer value and returning the absolute value).
+*               In continuous mode, the function returns the timer value relative to the last timeout or
+*               the start of the channel.
+*               All time units used within the API services of the GPT driver shall be of the unit ticks.
+*               Usage of re-entrant capability is only allowed if the callers take care that
+*               there is no simultaneous usage of the same channel.
+*               To get times out of register values it is necessary to know the oscillator frequency, pre
+*               prescalers and so on. Since these settings are made in MCU and(or) in other modules it is
+*               not possible to calculate such times. Hence the conversions between time and ticks shall
+*               be part of an upper layer.
+*               The driver needs to be initialized before calling Gpt_GetTimeElapsed(). Otherwise, the
+*               function shall raise the development error GPT_E_UNINIT and return 0.
+*
+* @param[in]    channel - channel id
+*
+* @return       Gpt_ValueType - Elapsed Time in number of ticks
+*
+* @api
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_GetTimeElapsed_Activity
+*/
+Gpt_ValueType Gpt_GetTimeElapsed(Gpt_ChannelType channel);
+#endif
+
+/*================================================================================================*/
+#if (GPT_TIME_REMAINING_API == STD_ON)
+/**
+* @brief        GPT driver function for fetching the remaining timer value.
+* @details      This function returns the timer value remaining until the next timeout period will
+*               expire (calculated by the normal operation function by subtracting the timeout minus
+*               the current timer value and returning the absolute value)
+*               All time units used within the API services of the GPT driver shall be of the unit ticks.
+*               Usage of re-entrant capability is only allowed if the callers take care that there is no
+*               simultaneous usage of the same channel.
+*               To get times out of register values it is necessary to know the oscillator frequency,
+*               pre-scalers and so on. Since these settings are made in MCU and(or) in other modules it is
+*               not possible to calculate such times. Hence the conversions between time and ticks shall
+*               be part of an upper layer.
+*               The driver needs to be initialized before calling Gpt_GetTimeRemaining(). Otherwise, the
+*               function shall raise the development error GPT_E_UNINIT and return 0.
+*
+*
+* @param[in]    channel - channel id
+*
+* @return       Gpt_ValueType - Returns the time remaining until the target time is reached in number of ticks.
+*
+* @api
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_GetTimeRemaining_Activity
+*/
+Gpt_ValueType Gpt_GetTimeRemaining(Gpt_ChannelType channel);
+#endif
+/*================================================================================================*/
+/**
+* @brief        GPT driver function for starting a timer channel.
+* @details      The function Gpt_StartTimer shall start the selected timer channel with a defined
+*               time-out period.
+*               The function Gpt_StartTimer shall invoke the configured notification for that channel
+*               (see also GPT292) after the time-out period referenced via the parameter value (if
+*               enabled).
+*               All time units used within the API services of the GPT driver shall be of the unit ticks.
+*               In production mode no error is generated. The rational is that it adds no
+*               additional functionality to the driver. In this case the timer will be restarted with the
+*               time-out value, given as a parameter to the service.
+*               Usage of re-entrant capability is only allowed if the callers take care that
+*               there is no simultaneous usage of the same channel.
+*               To get times out of register values it is necessary to know the oscillator
+*               frequency, pre-scalers and so on. Since these settings are made in MCU and(or) in other
+*               modules it is not possible to calculate such times. Hence the conversions between time
+*               and ticks shall be part of an upper layer.
+*               The driver needs to be initialized before calling Gpt_StartTimer(). Otherwise, the
+*               function Gpt_StartTimer shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    channel channel id
+* @param[in]    value   time-out period (in number of ticks) after a notification or a wakeup event shall occur.
+*
+* @return       void
+* @api
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_StartTimer_Activity
+*/
+void Gpt_StartTimer(Gpt_ChannelType channel,Gpt_ValueType value);
+
+/*================================================================================================*/
+/**
+* @brief        GPT driver function for stopping a timer channel.
+* @details      Service for stopping the selected timer channel
+*               Stopping a timer channel, not been started before will not return a development error
+*               Timer channels configured in one shot mode are stopped automatically, when the
+*               time-out period has expired.
+*               Usage of re-entrant capability is only allowed if the callers take care that
+*               there is no simultaneous usage of the same channel.
+*               The driver needs to be initialized before calling Gpt_StopTimer(). Otherwise,
+*               the function shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    channel   channel id
+* @return       void
+*
+* @api
+* @pre          The driver needs to be initialized. Gpt_StartTimer must be called before.
+* @implements   Gpt_StopTimer_Activity
+*/
+void Gpt_StopTimer(Gpt_ChannelType channel);
+
+/*================================================================================================*/
+#if (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON)
+/**
+* @brief        GPT driver function for enabling the notification for a timer channel.
+* @details      Service for enabling the notification for a channel during runtime.
+*               This function can be called, while the timer is already running.
+*               Usage of re-entrant capability is only allowed if the callers take care that
+*               there is no simultaneous usage of the same channel.
+*               The driver needs to be initialized before calling Gpt_EnableNotification(). Otherwise,
+*               the function Gpt_EnableNotification shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    channel     channel id
+* @return       void
+* @api
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_EnableNotification_Activity
+*/
+void Gpt_EnableNotification(Gpt_ChannelType channel);
+/*================================================================================================*/
+/**
+* @brief        GPT driver function for disabling the notification for a timer channel.
+* @details      Service for disabling the notification for a channel during runtime.
+*               This function can be called, while the timer is already running
+*               When disabled, no notification will be sent. When re-enabled again, the user
+*               will not be notified of events, occurred while notifications have been disabled.
+*               Usage of re-entrant capability is only allowed if the callers take care that
+*               there is no simultaneous usage of the same channel.
+*               The driver needs to be initialized before calling Gpt_DisableNotification().
+*               Otherwise, the function shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    channel        channel id
+* @return       void
+* @api
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_DisableNotification_Activity
+*/
+void Gpt_DisableNotification(Gpt_ChannelType channel);
+#endif
+
+#if (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON)
+/*================================================================================================*/
+/**
+* @brief        GPT driver function for setting the operation mode.
+* @details      Service for GPT mode selection. This service shall set the operation mode to the given
+*               mode parameter .
+*               When sleep mode is requested, the ECU State Manager calls Gpt_SetMode with mode
+*               parameter "GPT_MODE_SLEEP" and prepares the GPT for sleep mode. The MCU Driver is then
+*               putting the controller into SLEEP mode
+*               The driver needs to be initialized before calling Gpt_SetMode(). Otherwise, the
+*               function Gpt_SetMode shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    eMode        operation mode :
+*                           - GPT_MODE_NORMAL: Normal operation mode of the GPT driver.
+*                           - GPT_MODE_SLEEP: Sleep mode of the GPT driver (wakeup capable)
+* @return       void
+* @api
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_SetMode_Activity
+*/
+void Gpt_SetMode(Gpt_ModeType eMode);
+/*================================================================================================*/
+/**
+* @brief        GPT driver function for disabling the wakeup interrupt invocation for a timer channel.
+* @details      This service shall disable the wakeup interrupt invocation of a single GPT
+*               channel.
+*               Usage of re-entrant capability is only allowed if the callers take care that
+*               there is no simultaneous usage of the same channel.
+*               The driver needs to be initialized before calling Gpt_DisableWakeup(). Otherwise, the
+*               function Gpt_DisableWakeup shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    channel        channel id
+* @return       void
+* @api
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_DisableWakeup_Activity
+*/
+void Gpt_DisableWakeup(Gpt_ChannelType channel);
+
+/*================================================================================================*/
+/**
+* @brief        GPT driver function for enabling the wakeup interrupt invocation for a timer channel.
+* @details      This service shall re-enable the wakeup interrupt invocation of a single GPT
+*               channel.
+*               If supported by hardware and enabled, an internal hardware timer can serve as a
+*               wakeup source
+*               Usage of re-entrant capability is only allowed if the callers take care that
+*               there is no simultaneous usage of the same channel.
+*
+* @param[in]    channel        channel id
+* @return       void
+* @api
+*
+* @pre          The driver needs to be initialized. The channel must be configured as wakeup capable.
+* @implements   Gpt_EnableWakeup_Activity
+*/
+void Gpt_EnableWakeup(Gpt_ChannelType channel);
+
+/*================================================================================================*/
+/**
+* @brief        GPT driver function for checking if a wakeup capable GPT channel is the source for a
+*               wakeup event.
+* @details      Checks if a wakeup capable GPT channel is the source for a wakeup event and calls the ECU
+*               state manager service EcuM_SetWakeupEvent in case of a valid GPT channel wakeup event.
+*               The driver needs to be initialized before calling Gpt_CheckWakeup(). Otherwise, the
+*               function Gpt_CheckWakeup shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    wakeupSource        wakeup source
+* @return       void
+* @api
+*
+* @pre          The driver needs to be initialized. The channel must be configured as wakeup capable.
+* @implements   Gpt_CheckWakeup_Activity
+*/
+void Gpt_CheckWakeup(EcuM_WakeupSourceType wakeupSource);
+#endif
+
+/*================================================================================================*/
+#if (GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
+/**
+* @brief        The function changes the time out period value of the requested running channel.
+* @details      The function changes the time out period (in number of ticks) of the channel is
+*               running which will be used after the first compare matching.
+*               This is a non-autosar function.
+* @param[in]    channel        channel id
+* @param[in]    value          time out period (in number of ticks) after a notification shall occur
+* @return       void
+* @pre          Gpt_Init and Gpt_StartTimer must be called before.
+* @implements
+*/
+void Gpt_ChangeNextTimeoutValue
+(
+    Gpt_ChannelType channel,
+    Gpt_ValueType value
+);
+#endif
+
+/*================================================================================================*/
+#if (GPT_SET_CLOCK_MODE == STD_ON)
+/**
+* @brief        This function changes the channel pre scaler.
+* @details      This function sets all channels pre scalers based on the input mode.
+*
+* @param[in]    eClkMode   pre scaler setting ( NORMAL or ALTERNATE )
+* @return       void
+* @pre          Gpt_Init must be called before.
+*
+*
+*
+* @implements   Gpt_SetClockMode_Activity
+*/
+void Gpt_SetClockMode(Gpt_ClockModeType eClkMode);
+#endif
+
+/*================================================================================================*/
+#if (GPT_CHAIN_MODE == STD_ON)
+/**
+* @brief        The function enables the chain functionality for timer.
+* @details      The function enables the chain functionality for timer. Timer will be chained with timer n-1.
+                Channel 0 cannot be chained.
+*               This is a non-autosar function.
+* @param[in]    channel        channel id
+* @return       void
+* @pre          Gpt_Init must be called before.
+*
+* @implements   Gpt_Channel_EnableChainMode_Activity
+*/
+void Gpt_Channel_EnableChainMode(Gpt_ChannelType channel);
+
+/*================================================================================================*/
+/**
+* @brief        The function disables the chain functionality for timer.
+* @details      The function disables the chain functionality for timer. Timer will not be chained with timer n-1.
+                Channel 0 cannot be chained or unchained.
+*               This is a non-autosar function.
+* @param[in]    channel        channel id
+* @return       void
+* @pre          Gpt_Init must be called before.
+*
+* @implements   Gpt_Channel_DisableChainMode_Activity
+*/
+void Gpt_Channel_DisableChainMode(Gpt_ChannelType channel);
+#endif
+
+/*================================================================================================*/
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+/**
+* @brief        Provides the current value of the given predefined free-running timer
+* @details      This function provides the current value of the given predefined free-running timer.
+*
+* @param[in]    PredefTimer: Gpt_PredefTimerType ( GPT_PREDEF_TIMER_1US_16BIT,
+*                                               GPT_PREDEF_TIMER_1US_24BIT,
+*                                               GPT_PREDEF_TIMER_1US_32BIT
+*                                               GPT_PREDEF_TIMER_100US_32BIT)
+* @param[out]   TimeValuePtr: Pointer to time value destination data in RAM
+* @pre          Gpt_Init must be called before.
+* @return       returnValue  - E_OK: no error has been detected.
+*                            - E_NOT_OK: aborted due to errors.
+*
+*
+* @implements   Gpt_GetPredefTimerValue_Activity
+*/
+Std_ReturnType Gpt_GetPredefTimerValue
+(
+    Gpt_PredefTimerType PredefTimer,
+    uint32 * TimeValuePtr
+);
+#endif
+
+/**
+* @internal
+* @brief MemMap section
+*/
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+/** @} */
+#endif /* GPT_H */

RTD/include/Gpt_EnvCfg.h

@@ -0,0 +1,113 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef GPT_ENVCFG_H
+#define GPT_ENVCFG_H
+
+/**
+*   @file       Gpt_EnvCfg.h
+*
+*   @addtogroup gpt Gpt Driver
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define GPT_ENVCFG_VENDOR_ID                      43
+#define GPT_ENVCFG_AR_RELEASE_MAJOR_VERSION       4
+#define GPT_ENVCFG_AR_RELEASE_MINOR_VERSION       4
+#define GPT_ENVCFG_AR_RELEASE_REVISION_VERSION    0
+#define GPT_ENVCFG_SW_MAJOR_VERSION               1
+#define GPT_ENVCFG_SW_MINOR_VERSION               0
+#define GPT_ENVCFG_SW_PATCH_VERSION               0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                           CONSTANT-LIKE DEFINES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION-LIKE DEFINES(MACROS)
+==================================================================================================*/
+/**
+* @brief    GPT_VALIDATE_GLOBAL_CALL 
+* @details  Validates the global call uses all the channels - Gpt_Init, Gpt_DeInit, Gpt_SetMode.
+*/
+#define GPT_VALIDATE_GLOBAL_CALL    (GPT_DEV_ERROR_DETECT)
+/*================================================================================================*/
+/**
+* @brief    GPT_VALIDATE_CHANNEL_CALL
+* @details  Validates the call for a specific channel.
+*/
+#define GPT_VALIDATE_CHANNEL_CALL   (GPT_DEV_ERROR_DETECT)
+/*================================================================================================*/
+/**
+* @brief    GPT_VALIDATE_STATE 
+* @details  Validates the channel status.
+*/ 
+#define GPT_VALIDATE_STATE          (GPT_DEV_ERROR_DETECT)
+/*================================================================================================*/
+/**
+* @brief    GPT_VALIDATE_PARAM 
+* @details  Validates the time value parameter.
+*/
+#define GPT_VALIDATE_PARAM          (GPT_DEV_ERROR_DETECT)
+
+/*==================================================================================================
+                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+/** @} */
+#endif /* GPT_ENVCFG_H */

RTD/include/Gpt_Ipw.h

@@ -0,0 +1,372 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef GPT_IPW_H
+#define GPT_IPW_H
+
+/**
+*   @file       Gpt_Ipw.h
+*
+*   @internal
+*   @addtogroup gpt gpt_ipw
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Gpt.h"
+#include "Gpt_Ipw_Types.h"
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define GPT_IPW_VENDOR_ID                      43
+#define GPT_IPW_AR_RELEASE_MAJOR_VERSION       4
+#define GPT_IPW_AR_RELEASE_MINOR_VERSION       4
+#define GPT_IPW_AR_RELEASE_REVISION_VERSION    0
+#define GPT_IPW_SW_MAJOR_VERSION               1
+#define GPT_IPW_SW_MINOR_VERSION               0
+#define GPT_IPW_SW_PATCH_VERSION               0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+#if ( GPT_VENDOR_ID != GPT_IPW_VENDOR_ID)
+    #error "Gpt.h and Gpt_Ipw.h have different vendor ids"
+#endif
+/* Check if the header files are of the same Autosar version */
+#if ((GPT_AR_RELEASE_MAJOR_VERSION != GPT_IPW_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_AR_RELEASE_MINOR_VERSION != GPT_IPW_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_AR_RELEASE_REVISION_VERSION != GPT_IPW_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt.h and Gpt_Ipw.h are different"
+#endif
+/* Check if the header files are of the same Software version */
+#if ((GPT_SW_MAJOR_VERSION != GPT_IPW_SW_MAJOR_VERSION) || \
+     (GPT_SW_MINOR_VERSION != GPT_IPW_SW_MINOR_VERSION) || \
+     (GPT_SW_PATCH_VERSION != GPT_IPW_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt.h and Gpt_Ipw.h are different"
+#endif
+
+#if (GPT_IPW_TYPES_VENDOR_ID != GPT_IPW_VENDOR_ID)
+    #error "Gpt_Ipw_Types.h and Gpt_Ipw.h have different vendor ids"
+#endif
+/* Check if the header files are of the same Autosar version */
+#if ((GPT_IPW_TYPES_AR_RELEASE_MAJOR_VERSION != GPT_IPW_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_IPW_TYPES_AR_RELEASE_MINOR_VERSION != GPT_IPW_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_IPW_TYPES_AR_RELEASE_REVISION_VERSION != GPT_IPW_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt_Ipw_Types.h and Gpt_Ipw.h are different"
+#endif
+/* Check if the header files are of the same Software version */
+#if ((GPT_IPW_TYPES_SW_MAJOR_VERSION != GPT_IPW_SW_MAJOR_VERSION) || \
+     (GPT_IPW_TYPES_SW_MINOR_VERSION != GPT_IPW_SW_MINOR_VERSION) || \
+     (GPT_IPW_TYPES_SW_PATCH_VERSION != GPT_IPW_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt_Ipw_Types.h and Gpt_Ipw.h are different"
+#endif
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+#define GPT_START_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Gpt_MemMap.h"
+/**
+* @internal
+* @brief    Gpt channel hardware runtime information.
+* @details  This is the type of the data structure used by the Autosar layer to
+*           receive runtime information specific to hardware IP
+*/
+typedef struct
+{
+    boolean bChannelRollover;                 /**< @brief GPT channel rollover information*/
+    Gpt_ValueType uTargetTime;                /**< @brief GPT channel target value*/
+} Gpt_HwChannelInfoType;
+#define GPT_STOP_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Gpt_MemMap.h"
+/*==================================================================================================
+                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+/*================================================================================================*/
+/**
+* @internal
+* @brief        Gpt driver Autosar independent and IP dependent initialization function.
+* @details      This function Gpt_Ipw_Init is called once for each channel in the used configuration.
+*               It determines the type of the HW channel and calls the
+*               appropriate IP function in order to initializes the hardware timer.
+* @param[in]    pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return       void
+* @pre          The driver needs to be initialized.
+*/
+void Gpt_Ipw_Init(const Gpt_Ipw_HwChannelConfigType *pHwChannelConfig);
+/*================================================================================================*/
+/**
+* @internal
+* @brief        Gpt driver Autosar independent and IP dependent initialization function.
+* @details      This Gpt_Ipw_InitInstances is called once for each channel in the used configuration.
+*               It determines the type of the HW channel and calls the
+*               appropriate IP function in order to initializes the hardware timer.
+* @param[in]    configPtr    Pointer to the channel configuration structure dependent by platform
+*
+* @return       void
+* @pre          The driver needs to be initialized.
+*/
+void Gpt_Ipw_InitInstances(const Gpt_ConfigType * configPtr);
+/*================================================================================================*/
+/**
+* @internal
+* @brief         Gpt driver Autosar independent and IP dependent function for fetching the elapsed timer value.
+* @details       It determines the type of the HW channel and calls the
+*                appropriate IP function for reading the elapsed timer value from the HW.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @param[in]     uTargetTime         Target time value
+* @param[out]    pReturnHwChannelInfo  Rollover status flag value of the hardware timer channel
+* @return        returnValue         The elapsed time
+* @pre           The driver needs to be initialized.Call GetTimeElapsed before.
+*
+*/
+Gpt_ValueType Gpt_Ipw_GetTimeElapsed
+(
+    const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig,
+    Gpt_HwChannelInfoType * pReturnHwChannelInfo
+);
+/*================================================================================================*/
+/**
+* @internal
+* @brief         Gpt driver Autosar independent and platform dependent function for starting the timer channel.
+* @details       It checks the type of the HW module and calls the appropriate
+*                IP function for starting the timer channel.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @param[in]     uValue              Timeout period (in ticks) after which a notification shall occur (if enabled).
+* @return        void
+* @pre           The driver needs to be initialized.Call Gpt_StartTimer before.
+*/
+Std_ReturnType Gpt_Ipw_StartTimer(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig, Gpt_ValueType uValue);
+/*================================================================================================*/
+/**
+* @internal
+* @brief         Gpt driver Autosar independent and platform dependent function for stopping the timer channel.
+* @details       It checks the type of the HW module, and calls the appropriate
+*                IP function for stopping the timer channel.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return        void
+* @pre           The driver needs to be initialized.Call StopTimer before.
+*/
+void Gpt_Ipw_StopTimer(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig);
+/*================================================================================================*/
+/**
+* @internal
+* @brief         Gpt driver Autosar independent and platform dependent function for enabling hardware timer interrupts.
+* @details       It checks the type of the HW module and calls the appropriate
+*                IP function for enabling hardware timer interrupts.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return        void
+* @pre           The driver needs to be initialized.
+*/
+void Gpt_Ipw_EnableInterrupt(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig);
+/*================================================================================================*/
+#if (GPT_DEINIT_API == STD_ON)
+/**
+* @internal
+* @brief         Gpt driver Autosar independent and IP dependent de-initialization function.
+* @details       This function is called for each  channel from the current configuration.
+*                It determines the type of the HW channel and calls the
+*                appropriate IP function in order to de-initializes the hardware timer.
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return        void
+* @pre           The driver needs to be initialized. On/Off by the configuration parameter: GPT_DEINIT_API
+*/
+void Gpt_Ipw_DeInit(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig);
+#endif
+/*================================================================================================*/
+#if (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON)|| (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON)
+/**
+* @internal
+* @brief         Gpt driver Autosar independent and platform dependent function for disabling hardware timer interrupts.
+* @details       It checks the type of the HW module and calls the appropriate
+*                IP function for disabling hardware timer interrupts.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return        void
+* @pre           The driver needs to be initialized.On/Off by the configuration parameter: GPT_ENABLE_DISABLE_NOTIFICATION_API
+*/
+void Gpt_Ipw_DisableInterrupt(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig);
+#endif
+/*================================================================================================*/
+#if (GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
+/**
+* @internal
+* @brief        Gpt driver Autosar independent and IP dependent function to change compare register value.
+* @details      This function:
+*                - Write next timeout to local variable
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent
+*                                       by platform
+* @param[in]     value               New Timeout period (in ticks) after which a notification
+*                                       shall occur (if enabled).
+* @return        void
+* @pre           The driver needs to be initialized.On/Off by the configuration parameter: GPT_CHANGE_NEXT_TIMEOUT_VALUE
+*
+*/
+Std_ReturnType Gpt_Ipw_ChangeNextTimeoutValue
+(
+    const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig,
+    Gpt_ValueType value
+);
+#endif
+/*================================================================================================*/
+#if (GPT_SET_CLOCK_MODE == STD_ON)
+/**
+* @internal
+* @brief         Gpt driver Autosar independent and IP dependent function to change FTM prescaler value.
+* @details       Calls the FTM function to change the FTM prescaler.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @param[in]     clkMode             Clock mode for configuration channel
+*
+* @return        void
+* @pre           The driver needs to be initialized.On/Off by the configuration parameter: GPT_SET_CLOCK_MODE
+*/
+void Gpt_Ipw_SetClockModeInStance(const Gpt_Ipw_HwInstanceConfigType * pHwInstanceConfig,
+                                            Gpt_ClockModeType clkMode);
+#endif
+/*================================================================================================*/
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+/**
+* @internal
+* @brief        Gpt driver Autosar start predeftimer hw.
+* @details      This function to start channel, which using predeftimer feature in the used configuration.
+*               It determines the type of the HW channel and calls the
+*               appropriate IP function in order to initializes the hardware timer.
+* @param[in]    pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return       void
+* @pre          The driver needs to be initialized. On/Off GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON
+*
+*/
+void Gpt_Ipw_StartPredefTimer
+(
+    const Gpt_ConfigType * configPtr
+);
+/**
+* @internal
+* @brief        Gpt driver Autosar get value of predeftimer hw.
+* @details      This function to start channel, which using predeftimer feature in the used configuration.
+*               It determines the type of the HW channel and calls the
+*               appropriate IP function in order to initializes the hardware timer.
+* @param[in]    pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @param[in]    TimeValuePtr        The pointer using for save current value of hardware channel
+* @param[in]    PredefTimer         Gpt_PredefTimerType
+* @return       void
+* @pre          The driver needs to be initialized. On/Off GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON
+*
+*/
+void Gpt_Ipw_GetPredefTimerValue
+(
+    const Gpt_HwPredefChannelConfigType * pHwChannelConfig,
+    Gpt_PredefTimerType PredefTimer,
+    uint32 * TimeValuePtr
+);
+/**
+* @internal
+* @brief        Gpt driver Autosar stop predeftimer hw.
+* @details      This function to start channel, which using predeftimer feature in the used configuration.
+*               It determines the type of the HW channel and calls the
+*               appropriate IP function in order to initializes the hardware timer.
+* @param[in]    pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return       void
+* @pre          The driver needs to be initialized. GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON
+*/
+void Gpt_Ipw_StopPredefTimer
+(
+    const Gpt_ConfigType * configPtr
+);
+#endif
+/*================================================================================================*/
+#if (GPT_CHAIN_MODE == STD_ON)
+/**
+* @internal
+* @brief         The function Gpt_Ipw_EnableChainMode.
+* @details       This function:
+*               - Chain the timer.
+*
+* @param[in]     pHwChannelConfig        Pointer to the channel configuration structure dependent by platform
+* @return        returnValue
+* @pre           The driver needs to be initialized. CHAIN_MODE == STD_ON
+*/
+Std_ReturnType Gpt_Ipw_EnableChainMode(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig);
+/**
+* @internal
+* @brief         The function Gpt_Ipw_DisableChainMode.
+* @details       This function:
+*               - Chain the timer.
+*
+* @param[in]     pHwChannelConfig        Pointer to the channel configuration structure dependent by platform
+* @return        returnValue
+* @pre           The driver needs to be initialized. CHAIN_MODE == STD_ON
+*/
+Std_ReturnType Gpt_Ipw_DisableChainMode(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig);
+#endif
+/*================================================================================================*/
+
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+/** @} */
+#endif /*GPT_IPW_H*/
+

RTD/include/Gpt_Ipw_Irq.h

@@ -0,0 +1,111 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef GPT_IPW_IRQ_H
+#define GPT_IPW_IRQ_H
+
+/**
+*   @file       Gpt_Ipw_Irq.h
+*
+*   @internal
+*   @addtogroup gpt gpt_ipw
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Gpt_Irq.h"
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define GPT_IPW_IRQ_VENDOR_ID                      43
+#define GPT_IPW_IRQ_AR_RELEASE_MAJOR_VERSION       4
+#define GPT_IPW_IRQ_AR_RELEASE_MINOR_VERSION       4
+#define GPT_IPW_IRQ_AR_RELEASE_REVISION_VERSION    0
+#define GPT_IPW_IRQ_SW_MAJOR_VERSION               1
+#define GPT_IPW_IRQ_SW_MINOR_VERSION               0
+#define GPT_IPW_IRQ_SW_PATCH_VERSION               0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if source file and GPT header file are of the same vendor */
+#if (GPT_IPW_IRQ_VENDOR_ID != GPT_IRQ_VENDOR_ID)
+    #error "Gpt_Ipw_Irq.h and Gpt_Irq.h have different vendor ids"
+#endif
+/* Check if source file and GPT header file are of the same Autosar version */
+#if ((GPT_IPW_IRQ_AR_RELEASE_MAJOR_VERSION != GPT_IRQ_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_IPW_IRQ_AR_RELEASE_MINOR_VERSION != GPT_IRQ_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_IPW_IRQ_AR_RELEASE_REVISION_VERSION != GPT_IRQ_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt_Ipw_Irq.h and Gpt_Irq.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((GPT_IPW_IRQ_SW_MAJOR_VERSION != GPT_IRQ_SW_MAJOR_VERSION) || \
+     (GPT_IPW_IRQ_SW_MINOR_VERSION != GPT_IRQ_SW_MINOR_VERSION) || \
+     (GPT_IPW_IRQ_SW_PATCH_VERSION != GPT_IRQ_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt_Ipw_Irq.h and Gpt_Irq.h are different"
+#endif
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+/** @} */
+#endif /*GPT_IPW_IRQ_H*/

RTD/include/Gpt_Ipw_Types.h

@@ -0,0 +1,292 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef GPT_IPW_TYPES_H
+#define GPT_IPW_TYPES_H
+
+/**
+*   @file       Gpt_Ipw_Types.h
+*
+*   @internal
+*   @addtogroup gpt gpt_ipw
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "StandardTypes.h"
+#include "Gpt_Cfg.h"
+#include "Ftm_Gpt_Ip.h"
+#include "SRtc_Ip.h"
+#include "Lptmr_Gpt_Ip.h"
+#include "LPit_Gpt_Ip.h"
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define GPT_IPW_TYPES_VENDOR_ID                      43
+#define GPT_IPW_TYPES_AR_RELEASE_MAJOR_VERSION       4
+#define GPT_IPW_TYPES_AR_RELEASE_MINOR_VERSION       4
+#define GPT_IPW_TYPES_AR_RELEASE_REVISION_VERSION    0
+#define GPT_IPW_TYPES_SW_MAJOR_VERSION               1
+#define GPT_IPW_TYPES_SW_MINOR_VERSION               0
+#define GPT_IPW_TYPES_SW_PATCH_VERSION               0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((GPT_IPW_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
+         (GPT_IPW_TYPES_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Gpt_Ipw_Types.h and Std_Types.h are different"
+    #endif
+#endif
+
+#if (GPT_IPW_TYPES_VENDOR_ID != GPT_VENDOR_ID_CFG)
+    #error "Gpt_Ipw_Types.h and Gpt_Cfg.h have different vendor ids"
+#endif
+/* Check if the header files are of the same Autosar version */
+#if ((GPT_IPW_TYPES_AR_RELEASE_MAJOR_VERSION != GPT_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (GPT_IPW_TYPES_AR_RELEASE_MINOR_VERSION != GPT_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (GPT_IPW_TYPES_AR_RELEASE_REVISION_VERSION != GPT_AR_RELEASE_REVISION_VERSION_CFG) \
+    )
+    #error "AutoSar Version Numbers of Gpt_Ipw_Types.h and Gpt_Cfg.h are different"
+#endif
+/* Check if the header files are of the same Software version */
+#if ((GPT_IPW_TYPES_SW_MAJOR_VERSION != GPT_SW_MAJOR_VERSION_CFG) || \
+     (GPT_IPW_TYPES_SW_MINOR_VERSION != GPT_SW_MINOR_VERSION_CFG) || \
+     (GPT_IPW_TYPES_SW_PATCH_VERSION != GPT_SW_PATCH_VERSION_CFG) \
+    )
+    #error "Software Version Numbers of Gpt_Ipw_Types.h and Gpt_Cfg.h are different"
+#endif
+
+#if (GPT_IPW_TYPES_VENDOR_ID != FTM_GPT_IP_VENDOR_ID)
+    #error "Gpt_Ipw_Types.h and Ftm_Gpt_Ip.h have different vendor ids"
+#endif
+/* Check if the header files are of the same Autosar version */
+#if ((GPT_IPW_TYPES_AR_RELEASE_MAJOR_VERSION != FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_IPW_TYPES_AR_RELEASE_MINOR_VERSION != FTM_GPT_IP_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_IPW_TYPES_AR_RELEASE_REVISION_VERSION != FTM_GPT_IP_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt_Ipw_Types.h and Ftm_Gpt_Ip.h are different"
+#endif
+/* Check if the header files are of the same Software version */
+#if ((GPT_IPW_TYPES_SW_MAJOR_VERSION != FTM_GPT_IP_SW_MAJOR_VERSION) || \
+     (GPT_IPW_TYPES_SW_MINOR_VERSION != FTM_GPT_IP_SW_MINOR_VERSION) || \
+     (GPT_IPW_TYPES_SW_PATCH_VERSION != FTM_GPT_IP_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt_Ipw_Types.h and Ftm_Gpt_Ip.h are different"
+#endif
+
+#if (GPT_IPW_TYPES_VENDOR_ID != LPTMR_GPT_IP_VENDOR_ID)
+    #error "Gpt_Ipw_Types.h and Lptmr_Gpt_Ip.h have different vendor ids"
+#endif
+/* Check if the header files are of the same Autosar version */
+#if ((GPT_IPW_TYPES_AR_RELEASE_MAJOR_VERSION != LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_IPW_TYPES_AR_RELEASE_MINOR_VERSION != LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_IPW_TYPES_AR_RELEASE_REVISION_VERSION != LPTMR_GPT_IP_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt_Ipw_Types.h and Lptmr_Gpt_Ip.h are different"
+#endif
+/* Check if the header files are of the same Software version */
+#if ((GPT_IPW_TYPES_SW_MAJOR_VERSION != LPTMR_GPT_IP_SW_MAJOR_VERSION) || \
+     (GPT_IPW_TYPES_SW_MINOR_VERSION != LPTMR_GPT_IP_SW_MINOR_VERSION) || \
+     (GPT_IPW_TYPES_SW_PATCH_VERSION != LPTMR_GPT_IP_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt_Ipw_Types.h and Lptmr_Gpt_Ip.h are different"
+#endif
+
+#if (GPT_IPW_TYPES_VENDOR_ID != LPIT_GPT_IP_VENDOR_ID)
+    #error "Gpt_Ipw_Types.h and LPit_Gpt_Ip.h have different vendor ids"
+#endif
+/* Check if the header files are of the same Autosar version */
+#if ((GPT_IPW_TYPES_AR_RELEASE_MAJOR_VERSION != LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_IPW_TYPES_AR_RELEASE_MINOR_VERSION != LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_IPW_TYPES_AR_RELEASE_REVISION_VERSION != LPIT_GPT_IP_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt_Ipw_Types.h and LPit_Gpt_Ip.h are different"
+#endif
+/* Check if the header files are of the same Software version */
+#if ((GPT_IPW_TYPES_SW_MAJOR_VERSION != LPIT_GPT_IP_SW_MAJOR_VERSION) || \
+     (GPT_IPW_TYPES_SW_MINOR_VERSION != LPIT_GPT_IP_SW_MINOR_VERSION) || \
+     (GPT_IPW_TYPES_SW_PATCH_VERSION != LPIT_GPT_IP_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt_Ipw_Types.h and LPit_Gpt_Ip.h are different"
+#endif
+
+#if (GPT_IPW_TYPES_VENDOR_ID != SRTC_IP_VENDOR_ID)
+    #error "Gpt_Ipw_Types.h and SRtc_Ip.h have different vendor ids"
+#endif
+/* Check if the header files are of the same Autosar version */
+#if ((GPT_IPW_TYPES_AR_RELEASE_MAJOR_VERSION != SRTC_IP_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_IPW_TYPES_AR_RELEASE_MINOR_VERSION != SRTC_IP_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_IPW_TYPES_AR_RELEASE_REVISION_VERSION != SRTC_IP_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt_Ipw_Types.h and SRtc_Ip.h are different"
+#endif
+/* Check if the header files are of the same Software version */
+#if ((GPT_IPW_TYPES_SW_MAJOR_VERSION != SRTC_IP_SW_MAJOR_VERSION) || \
+     (GPT_IPW_TYPES_SW_MINOR_VERSION != SRTC_IP_SW_MINOR_VERSION) || \
+     (GPT_IPW_TYPES_SW_PATCH_VERSION != SRTC_IP_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt_Ipw_Types.h and SRtc_Ip.h are different"
+#endif
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+/**
+* @internal
+* @brief    Gpt_PrescalerType
+* @details  Gpt prescaler data type
+*/
+
+typedef uint8 Gpt_PrescalerType;
+
+/**
+* @internal
+* @brief    Gpt_ClockSourceType
+* @details  Gpt clock source data type
+*/
+typedef uint8 Gpt_ClockSourceType;
+/**
+* @internal
+* @brief      SupportedIpTypes
+* @details    This enumeration specifies HW support
+*
+*/
+typedef enum
+{
+    GPT_FTM_MODULE   = 0,      /**< @brief Support FTM_MODULE   - 0 */
+    GPT_SRTC_MODULE  = 1,      /**< @brief Support SRTC_MODULE  - 1 */
+    GPT_LPTMR_MODULE = 2,      /**< @brief Support LPTMR_MODULE - 2 */
+    GPT_LPIT_MODULE  = 3       /**< @brief Support LPIT_MODULE  - 3 */
+}Gpt_Ipw_SupportedIpTypes;
+
+/**
+* @internal
+* @brief      ChannelConfigType
+* @details    This union specifies channel config type
+*
+*/
+typedef struct
+{
+    const Ftm_Gpt_Ip_ChannelConfigType *Ftm_Gpt_Ip_ChannelConfig;       /**< @brief pointer to configuration Ftm_Gpt_Ip_ChannelConfig */
+    const Srtc_Ip_ConfigType *Srtc_Ip_ChannelConfig;                    /**< @brief pointer to configuration SRtc_Ip_ChannelConfig    */
+    const Lptmr_Gpt_Ip_ConfigType *Lptmr_Gpt_Ip_ChannelConfig;          /**< @brief pointer to configuration Lptmr_Ip_ChannelConfig   */
+    const Lpit_Gpt_Ip_ChannelConfigType *Lpit_Gpt_Ip_ChannelConfig;     /**< @brief pointer to configuration LPit_Ip_ChannelConfig    */
+}Gpt_Ipw_ChannelConfigType;
+
+/**
+* @internal
+* @brief      InstanceConfigType
+* @details    This union specifies InstanceConfigType
+*
+*/
+typedef struct
+{
+    const Ftm_Gpt_Ip_InstanceConfigType *Ftm_Gpt_Ip_InstanceConfig;      /**< @brief pointer to configuration Ftm_Gpt_Ip_InstanceConfig */
+    const Lpit_Gpt_Ip_InstanceConfigType *Lpit_Gpt_Ip_InstanceConfig;    /**< @brief pointer to configuration LPit_Gpt_Ip_InstanceConfig */
+}Gpt_Ipw_InstanceConfigType;
+/**
+* @internal
+* @brief    HwChannelConfigType  - this is the type of the data structure including the
+*           informations of a channel.
+* @details  It contains the information like instance, channel , channelconfig.
+*
+* @implements
+*/
+typedef struct
+{
+    Gpt_Ipw_SupportedIpTypes instanceType;              /**< @brief IP type */
+    uint8 instance;                                     /**< @brief IP instance  */
+    uint8 channel;                                      /**< @brief IP channel */
+    Gpt_Ipw_ChannelConfigType Gpt_Ipw_ChannelConfig;    /**< @brief IP instance config pointer */
+}Gpt_Ipw_HwChannelConfigType;
+/**
+* @internal
+* @brief    HwInstanceConfigType  - this is the type of the data structure including the
+*           informations of a channel.
+* @details  It contains the information like instance, channel , channelconfig.
+*
+* @implements
+*/
+typedef struct
+{
+    Gpt_Ipw_SupportedIpTypes instanceType;              /**< @brief Gpt_Ipw_SupportedIpTypes */
+    uint8 instance;                                     /**< @brief uint8 instance  */
+    Gpt_Ipw_InstanceConfigType Gpt_Ipw_InstanceConfig;  /**< @brief Gpt_Ipw_InstanceConfigType */
+}Gpt_Ipw_HwInstanceConfigType;
+
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+/**
+* @internal
+* @brief    Low level configuration for channel specific parameters
+* @details  It contains the information like ip type, Channel freeze enable , channel , Channel prescaler value , hw module used .
+*
+* @implements
+*/
+typedef struct
+{
+    Gpt_Ipw_SupportedIpTypes instanceType;    /**< @brief IP type */
+    uint8 instance;                           /**< @brief IP instance */
+    uint8 channel;                            /**< @brief GPT hw channel ID */
+    Gpt_ClockSourceType Gpt_uClockSource;     /**< @brief Clock source FTM */
+    boolean Gpt_bFreezeEnable;                /**< @brief freeze enable */
+    Gpt_PrescalerType Gpt_uPrescaler;         /**< @brief prescaler value*/
+} Gpt_HwPredefChannelConfigType;
+#endif
+
+/*==================================================================================================
+                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+/** @} */
+#endif /*GPT_IPW_TYPES_H*/

RTD/include/Gpt_Irq.h

@@ -0,0 +1,111 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef GPT_IRQ_H
+#define GPT_IRQ_H
+
+/**
+*   @file       Gpt_Irq.h
+*
+*   @addtogroup gpt Gpt Driver
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define GPT_IRQ_VENDOR_ID                      43
+#define GPT_IRQ_AR_RELEASE_MAJOR_VERSION       4
+#define GPT_IRQ_AR_RELEASE_MINOR_VERSION       4
+#define GPT_IRQ_AR_RELEASE_REVISION_VERSION    0
+#define GPT_IRQ_SW_MAJOR_VERSION               1
+#define GPT_IRQ_SW_MINOR_VERSION               0
+#define GPT_IRQ_SW_PATCH_VERSION               0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     CONSTANT-LIKE DEFINES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION-LIKE DEFINES(MACROS)
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define GPT_START_SEC_CODE
+
+#include "Gpt_MemMap.h"
+
+/*==================================================================================================*/
+/**
+* @brief        Gpt common handler to implements generic part of the ISR.
+* @details      Generic function used by all interrupt service routines to call notification
+*               functions  and wakeup the EcuM
+*
+* @param[in]    channel     logic channel number
+* @return       void
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_ProcessCommonInterrupt_Activity
+*/
+void Gpt_ProcessCommonInterrupt(uint8 channel);
+
+/*==================================================================================================*/
+#define GPT_STOP_SEC_CODE
+
+#include "Gpt_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+/** @} */
+#endif /*GPT_IRQ_H*/

RTD/include/LPit_Gpt_Ip.h

@@ -0,0 +1,287 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef LPIT_GPT_IP_H
+#define LPIT_GPT_IP_H
+/**
+*   @file       LPit_Gpt_Ip.h
+*
+*   @addtogroup lpit_ip LPit IPL
+*
+*   @{
+*/
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "LPit_Gpt_Ip_Types.h"
+#include "LPit_Gpt_Ip_Cfg.h"
+#include "OsIf.h"
+#include "Mcal.h"
+#include "SchM_Gpt.h"
+#if LPIT_GPT_IP_DEV_ERROR_DETECT == STD_ON
+#include "Devassert.h"
+#endif
+#if (LPIT_GPT_IP_ENABLE_USER_MODE_SUPPORT == STD_ON)
+#include "Reg_eSys.h"
+#endif
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define LPIT_GPT_IP_VENDOR_ID                       43
+#define LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION        4
+#define LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION        4
+#define LPIT_GPT_IP_AR_RELEASE_REVISION_VERSION     0
+#define LPIT_GPT_IP_SW_MAJOR_VERSION                1
+#define LPIT_GPT_IP_SW_MINOR_VERSION                0
+#define LPIT_GPT_IP_SW_PATCH_VERSION                0
+
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+#if (LPIT_GPT_IP_VENDOR_ID != LPIT_GPT_IP_TYPES_VENDOR_ID)
+    #error "LPit_Gpt_Ip.h and LPit_Gpt_Ip_Types.h have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION != LPIT_GPT_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION != LPIT_GPT_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (LPIT_GPT_IP_AR_RELEASE_REVISION_VERSION != LPIT_GPT_IP_TYPES_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of LPit_Gpt_Ip.h and LPit_Gpt_Ip_Types.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((LPIT_GPT_IP_SW_MAJOR_VERSION != LPIT_GPT_IP_TYPES_SW_MAJOR_VERSION) || \
+     (LPIT_GPT_IP_SW_MINOR_VERSION != LPIT_GPT_IP_TYPES_SW_MINOR_VERSION) || \
+     (LPIT_GPT_IP_SW_PATCH_VERSION != LPIT_GPT_IP_TYPES_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of LPit_Gpt_Ip.h and LPit_Gpt_Ip_Types.h are different"
+#endif
+
+#if (LPIT_GPT_IP_VENDOR_ID != LPIT_GPT_IP_VENDOR_ID_CFG)
+    #error "LPit_Gpt_ip.h and LPit_Gpt_Ip_Cfg.h have different vendor ids"
+#endif
+/* Check if Pit_ip header file and LPit_Gpt_Ip_Cfg header file are of the same Autosar version */
+#if ((LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION != LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION != LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (LPIT_GPT_IP_AR_RELEASE_REVISION_VERSION != LPIT_GPT_IP_AR_RELEASE_REVISION_VERSION_CFG) \
+    )
+    #error "AutoSar Version Numbers of LPit_Gpt_Ip.h and LPit_Gpt_Ip_Cfg.h are different"
+#endif
+/* Check if Pit_ip file and LPit_Gpt_Ip_Cfg header file are of the same Software version */
+#if ((LPIT_GPT_IP_SW_MAJOR_VERSION != LPIT_GPT_IP_SW_MAJOR_VERSION_CFG) || \
+     (LPIT_GPT_IP_SW_MINOR_VERSION != LPIT_GPT_IP_SW_MINOR_VERSION_CFG) || \
+     (LPIT_GPT_IP_SW_PATCH_VERSION != LPIT_GPT_IP_SW_PATCH_VERSION_CFG) \
+    )
+    #error "Software Version Numbers of LPit_Gpt_Ip.h and LPit_Gpt_Ip_Cfg.h are different"
+#endif
+
+#if (LPIT_GPT_IP_ENABLE_USER_MODE_SUPPORT == STD_ON)
+/* Check if header file and StandardTypes.h file are of the same Autosar version */
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION != REG_ESYS_AR_RELEASE_MAJOR_VERSION) || \
+         (LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION != REG_ESYS_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of LPit_Gpt_Ip.h and Reg_eSys.h are different"
+    #endif
+#endif
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION != SCHM_GPT_AR_RELEASE_MAJOR_VERSION) || \
+         (LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION != SCHM_GPT_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of LPit_Gpt_Ip.h and SchM_Gpt.h are different"
+    #endif
+    /* Check if this header file and OsIf.h file are of the same Autosar version */
+    #if ((LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION != OSIF_AR_RELEASE_MAJOR_VERSION) || \
+        (LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION != OSIF_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of LPit_Gpt_Ip.h and OsIf.h are different"
+    #endif
+#endif
+
+#if LPIT_GPT_IP_DEV_ERROR_DETECT == STD_ON
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
+         (LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION != DEVASSERT_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of LPit_Gpt_Ip.h and Devassert.h are different"
+    #endif
+#endif
+#endif
+/*==================================================================================================
+*                                           CONSTANT-LIKE DEFINES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION-LIKE DEFINES(MACROS)
+==================================================================================================*/
+#if (LPIT_GPT_IP_USED == STD_ON)
+#define LPIT_MAX_VALUE         (uint32)(0xFFFFFFFFuL)
+#define LPIT_MSR_TIF_GPT_MASK  (uint32)0x1U
+#define LPIT_MIER_TIE_GPT_MASK (uint32)0x1U
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+uint32 Lpit_Gpt_Ip_GetCurrentTimervalue(uint8 instance, uint8 channel);
+uint32 Lpit_Gpt_Ip_GetTimerValue(uint8 instance, uint8 channel);
+uint32 Lpit_Gpt_Ip_GetInterruptFlagTimerChannels(uint8 instance, uint8 channel);
+uint32 Lpit_Gpt_Ip_GetTimerInterruptEnable(uint8 instance, uint8 channel);
+extern LPIT_Type * const LPitGptBase[LPIT_INSTANCE_COUNT];
+
+/**
+* @brief         Function Name : Lpit_Gpt_Ip_Init
+* @details       Driver initialization function for LPit instance.
+*
+*
+* @param[in]     instance     LPIT hw instance number
+* @param[in]     config       Pointer to a selected configuration structure
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the driver
+*
+*/
+void Lpit_Gpt_Ip_Init(uint8 instance, const Lpit_Gpt_Ip_InstanceConfigType *config);
+/*================================================================================================*/
+/**
+* @brief         Function Name : Lpit_Gpt_Ip_InitChannel
+* @details       Initializes the LPIT channels. This functions is called for each PIT hw channel and:
+*
+*
+* @param[in]     instance        PIT hw instance number
+* @param[in]     configChannel   Pointer to a selected configuration structure.
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the driver.
+*
+*/
+void Lpit_Gpt_Ip_InitChannel(uint8 instance, const Lpit_Gpt_Ip_ChannelConfigType *configChannel);
+/*================================================================================================*/
+/**
+* @brief         Function Name: Lpit_Gpt_Ip_Deinit
+* @details       De-Initializes the LPIT instances. This functions is called and
+*
+*
+* @param[in]     instance        LPit hw instance
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver.
+*
+*
+*/
+void Lpit_Gpt_Ip_Deinit(uint8 instance);
+/*================================================================================================*/
+/**
+* @brief        Function Name : Lpit_Gpt_Ip_StartTimer
+* @details      This function is called for starting the LPit timer channel.
+*                    - sets the timeout value into the LPIT timer channel register
+*                    - enables the LPIT channel
+*
+* @param[in]     instance        LPit hw instance
+* @param[in]     channel         LPit hw channel
+* @param[in]     countValue      channel timeout value
+* @return        void
+* @pre           The driver needs to be initialized. This function is called for starting the Pit timer channel.
+*
+*/
+void Lpit_Gpt_Ip_StartTimer(uint8 instance, uint8 channel, uint32 countValue);
+/*================================================================================================*/
+/**
+* @brief         Function Name : Lpit_Gpt_Ip_StopTimer
+* @details       This function is called for stopping the Pit counter. This function disables the LPIT channel and:
+*
+*
+* @param[in]     instance        LPit hw instance
+* @param[in]     channel         LPit hw channel
+* @return        void
+* @pre           The driver needs to be initialized. LPit_Gpt_Ip_StartTimer must be call before.
+*
+*/
+void Lpit_Gpt_Ip_StopTimer(uint8 instance, uint8 channel);
+/*================================================================================================*/
+/**
+* @brief        Function Name : Lpit_Gpt_Ip_EnableChInterrupt
+* @details      This function allows enabling interrupt generation of timer channel
+*               when timeout occurs
+*
+* @param[in]    instance        LPit hw instance
+* @param[in]    channel         LPit hw channel
+* @return       void
+* @pre          The driver needs to be initialized.
+*
+*/
+void Lpit_Gpt_Ip_EnableChInterrupt(uint8 instance, uint8 channel);
+/*================================================================================================*/
+/**
+* @brief        Function Name : Lpit_Gpt_Ip_DisableChInterrupt
+* @details      This function allows disabling interrupt of a timer channel
+*
+* @param[in]    instance        LPit hw instance
+* @param[in]    channel         LPit hw channel
+* @return       void
+* @pre          The driver needs to be initialized.
+*
+*/
+void Lpit_Gpt_Ip_DisableChInterrupt(uint8 instance, uint8 channel);
+/*================================================================================================*/
+#if (LPIT_GPT_IP_CHAIN_MODE == STD_ON)
+/**
+* @brief      Function Name : Lpit_Gpt_Ip_ChainMode.
+* @details    This function:
+*               - Chain/Unchain LPit channels.
+* @param[in]     instance        LPit hw channel ID
+* @param[in]     channel         channel timeout value
+* @param[in]     enable          enable/disable chain mode
+* @return        returnValue
+* @pre           The driver needs to be initialized. LPIT_GPT_IP_CHAIN_MODE == STD_ON
+*
+*/
+Lpit_Gpt_Ip_StatusType Lpit_Gpt_Ip_ChainMode(uint8 instance, uint8 channel, boolean enable);
+#endif /* LPIT_GPT_IP_CHAIN_MODE == STD_ON */
+
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#endif /* LPIT_GPT_IP_USED == STD_ON */
+
+#ifdef __cplusplus
+}
+#endif
+/** @} */
+#endif  /* LPIT_GPT_IP_H */

RTD/include/LPit_Gpt_Ip_Types.h

@@ -0,0 +1,167 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef LPIT_GPT_IP_TYPES_H
+#define LPIT_GPT_IP_TYPES_H
+/**
+*   @file        LPit_Gpt_Ip_Types.h
+*
+*   @addtogroup  lpit_ip LPit IPL
+*
+*   @{
+*/
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "LPit_Gpt_Ip_Cfg_Defines.h"
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define LPIT_GPT_IP_TYPES_VENDOR_ID                       43
+#define LPIT_GPT_IP_TYPES_AR_RELEASE_MAJOR_VERSION        4
+#define LPIT_GPT_IP_TYPES_AR_RELEASE_MINOR_VERSION        4
+#define LPIT_GPT_IP_TYPES_AR_RELEASE_REVISION_VERSION     0
+#define LPIT_GPT_IP_TYPES_SW_MAJOR_VERSION                1
+#define LPIT_GPT_IP_TYPES_SW_MINOR_VERSION                0
+#define LPIT_GPT_IP_TYPES_SW_PATCH_VERSION                0
+
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+#if (LPIT_GPT_IP_DEFINES_VENDOR_ID_CFG != LPIT_GPT_IP_TYPES_VENDOR_ID)
+    #error "LPit_Gpt_Ip_Cfg_Defines.h and LPit_Gpt_Ip_Types.h have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((LPIT_GPT_IP_DEFINES_AR_RELEASE_MAJOR_VERSION_CFG != LPIT_GPT_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (LPIT_GPT_IP_DEFINES_AR_RELEASE_MINOR_VERSION_CFG != LPIT_GPT_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (LPIT_GPT_IP_DEFINES_AR_RELEASE_REVISION_VERSION_CFG != LPIT_GPT_IP_TYPES_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of LPit_Ip_Cfg_Defines.h and LPit_Ip_Types.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((LPIT_GPT_IP_DEFINES_SW_MAJOR_VERSION_CFG != LPIT_GPT_IP_TYPES_SW_MAJOR_VERSION) || \
+     (LPIT_GPT_IP_DEFINES_SW_MINOR_VERSION_CFG != LPIT_GPT_IP_TYPES_SW_MINOR_VERSION) || \
+     (LPIT_GPT_IP_DEFINES_SW_PATCH_VERSION_CFG != LPIT_GPT_IP_TYPES_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of LPit_Gpt_Ip_Cfg_Defines.h and LPit_Gpt_Ip_Types.h are different"
+#endif
+/*==================================================================================================
+*                                          CONSTANT-LIKE DEFINES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      FUNCTION-LIKE DEFINES(MACROS)
+==================================================================================================*/
+
+
+
+/*==================================================================================================
+*                                            ENUMS
+==================================================================================================*/
+/**
+ * @brief     LPit Status error
+ * @details   Status error
+ */
+typedef enum
+{
+    LPIT_GPT_IP_SUCCESS = E_OK,      /**< @brief Status value is SUCCESS */
+    LPIT_GPT_IP_ERROR = E_NOT_OK     /**< @brief Status value is ERROR */
+} Lpit_Gpt_Ip_StatusType;
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+/**
+ * @brief    Callback type for each channel
+ * @details  Pit_Ip_CallbackType
+ *
+ */
+typedef void (*Lpit_Gpt_Ip_CallbackType)(uint8 callbackParam);
+
+/**
+ * @brief       Structure to configure the LPIT
+ *
+ * @details     This structure holds the configuration settings for the LPIT
+ * Implements :
+ */
+typedef struct
+{   
+    boolean runInDozeMode;          /**< @brief DOZE Mode Enable Bit */
+    boolean stopRunInDebug;         /**< @brief Stop timer running in debug mode */
+} Lpit_Gpt_Ip_InstanceConfigType;
+
+/**
+ * @brief       Structure to configure the LPIT timer channel
+ *
+ * @details     This structure holds the configuration settings for the LPIT timer channel
+ * Implements :
+ */
+typedef struct
+{
+    uint8                       hwChannel;           /**< @brief Timer channel number */
+    Lpit_Gpt_Ip_CallbackType    callback;            /**< @brief callback             */
+    uint8                       callbackParam;       /**< @brief callbackParam        */
+#if (LPIT_GPT_IP_ENABLE_EXT_TRIGGERS == STD_ON)
+    uint32                      triggerConfig;       /**<@brief Trigger source configure for LPIT Timer */
+#endif    
+} Lpit_Gpt_Ip_ChannelConfigType;
+
+/** 
+ * @brief       internal context structure
+ *
+ * @details     This structure is used by the IPL driver for internal logic.
+ *              The content is populated on Init
+ */
+typedef struct
+{
+    boolean                    chInit;               /**< @brief chInit */
+    Lpit_Gpt_Ip_CallbackType   callback;             /**< @brief callback */
+    uint8                      callbackParam;        /**< @brief callbackParam */
+} Lpit_Gpt_Ip_State;
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+#endif /* LPIT_GPT_IP_TYPES_H*/
+

RTD/include/Lptmr_Gpt_Ip.h

@@ -0,0 +1,315 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef LPTMR_GPT_IP_H
+#define LPTMR_GPT_IP_H
+
+/**
+*   @file       Lptmr_Gpt_Ip.h
+*
+*   @addtogroup Lptmr_Gpt_Ip Lptmr IPL
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Lptmr_Gpt_Ip_Types.h"
+#include "Lptmr_Gpt_Ip_Cfg.h"
+#include "OsIf.h"
+#include "Mcal.h"
+#include "SchM_Gpt.h"
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+#include "Devassert.h"
+#endif
+#if (LPTMR_GPT_IP_ENABLE_USER_MODE_SUPPORT == STD_ON)
+#include "Reg_eSys.h"
+#endif
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define LPTMR_GPT_IP_VENDOR_ID                       43
+#define LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION        4
+#define LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION        4
+#define LPTMR_GPT_IP_AR_RELEASE_REVISION_VERSION     0
+#define LPTMR_GPT_IP_SW_MAJOR_VERSION                1
+#define LPTMR_GPT_IP_SW_MINOR_VERSION                0
+#define LPTMR_GPT_IP_SW_PATCH_VERSION                0
+
+/*==================================================================================================
+*                                    FILE VERSION CHECKS
+==================================================================================================*/
+#if (LPTMR_GPT_IP_VENDOR_ID != LPTMR_GPT_IP_TYPES_VENDOR_ID)
+    #error "Lptmr_Gpt_Ip.h and Lptmr_Gpt_Ip_Types.h have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION != LPTMR_GPT_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION != LPTMR_GPT_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (LPTMR_GPT_IP_AR_RELEASE_REVISION_VERSION != LPTMR_GPT_IP_TYPES_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Lptmr_Gpt_Ip.h and Lptmr_Gpt_Ip_Types.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((LPTMR_GPT_IP_SW_MAJOR_VERSION != LPTMR_GPT_IP_TYPES_SW_MAJOR_VERSION) || \
+     (LPTMR_GPT_IP_SW_MINOR_VERSION != LPTMR_GPT_IP_TYPES_SW_MINOR_VERSION) || \
+     (LPTMR_GPT_IP_SW_PATCH_VERSION != LPTMR_GPT_IP_TYPES_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Lptmr_Gpt_Ip.h and Lptmr_Gpt_Ip_Types.h are different"
+#endif
+
+#if (LPTMR_GPT_IP_VENDOR_ID != LPTMR_GPT_IP_VENDOR_ID_CFG)
+    #error "Lptmr_Gpt_Ip.h and Lptmr_Gpt_Ip_Cfg.h have different vendor ids"
+#endif
+/* Check if LPTMR_GPT_IP header file and LPTMR_GPT_IP_Cfg header file are of the same Autosar version */
+#if ((LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION != LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION != LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (LPTMR_GPT_IP_AR_RELEASE_REVISION_VERSION != LPTMR_GPT_IP_AR_RELEASE_REVISION_VERSION_CFG) \
+    )
+    #error "AutoSar Version Numbers of Lptmr_Gpt_Ip.h and Lptmr_Gpt_Ip_Cfg.h are different"
+#endif
+/* Check if LPTMR_GPT_IP file and LPTMR_GPT_IP_Cfg header file are of the same Software version */
+#if ((LPTMR_GPT_IP_SW_MAJOR_VERSION != LPTMR_GPT_IP_SW_MAJOR_VERSION_CFG) || \
+     (LPTMR_GPT_IP_SW_MINOR_VERSION != LPTMR_GPT_IP_SW_MINOR_VERSION_CFG) || \
+     (LPTMR_GPT_IP_SW_PATCH_VERSION != LPTMR_GPT_IP_SW_PATCH_VERSION_CFG) \
+    )
+    #error "Software Version Numbers of Lptmr_Gpt_Ip.h and Lptmr_Gpt_Ip_Cfg.h are different"
+#endif
+
+#if (LPTMR_GPT_IP_ENABLE_USER_MODE_SUPPORT == STD_ON)
+/* Check if header file and StandardTypes.h file are of the same Autosar version */
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION != REG_ESYS_AR_RELEASE_MAJOR_VERSION) || \
+         (LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION != REG_ESYS_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Lptmr_Gpt_Ip.h and Reg_eSys.h are different"
+    #endif
+#endif
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION != SCHM_GPT_AR_RELEASE_MAJOR_VERSION) || \
+         (LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION != SCHM_GPT_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Lptmr_Gpt_Ip.h and SchM_Gpt.h are different"
+    #endif
+    /* Check if this header file and OsIf.h file are of the same Autosar version */
+    #if ((LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION != OSIF_AR_RELEASE_MAJOR_VERSION) || \
+        (LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION != OSIF_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Lptmr_Gpt_Ip.h and OsIf.h are different"
+    #endif
+#endif
+
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
+         (LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION != DEVASSERT_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Lptmr_Gpt_Ip.h and Devassert.h are different"
+    #endif
+#endif
+#endif
+/*==================================================================================================
+*                                            CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+#if (LPTMR_GPT_IP_USED == STD_ON)
+/**
+ * @brief     Define Mode
+ * @details   Mode type (TMS)
+ */
+#define    LPTMR_GPT_IP_TM_MODE                 ((uint32)(0x00))          /**< @brief Time Counter mode */
+
+extern LPTMR_Type * const lptmrGptBase[LPTMR_INSTANCE_COUNT];
+uint32 Lptmr_Gpt_Ip_GetCompareValue(uint8 instance);
+boolean Lptmr_Gpt_Ip_GetCmpFlagState(uint8 instance);
+uint32 Lptmr_Gpt_Ip_GetCntValue(uint8 instance);
+void Lptmr_Gpt_Ip_WriteCounterValue(uint8 instance, uint16 value);
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+
+
+/*================================================================================================*/
+/**
+* @brief          LPTMR Driver initialization function
+* @details        This function is called separately for each LPTMR hw channel corresponding to the configured
+*
+*               - enables the LPTMR module
+*               - configures the freeze mode (enabled or disabled)
+*               - disables the IRQ corresponding to the LPTMR channel
+*               - clears the (pending) interrupt flag corresponding to Lptmr channel
+*               - disables the LPTMR timer channel
+*               - clears the Load Value register corresponding to the Lptmr channel.
+*
+* @param[in]     instance     hw instance
+* @param[in]     *config      pointer to configuration
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+*/
+void Lptmr_Gpt_Ip_Init(uint8 instance, const Lptmr_Gpt_Ip_ConfigType *config);
+
+/*================================================================================================*/
+/**
+* @brief          de-initialization function for Lptmr module.
+* @details        This function is called separately for each LPTMR hw channel corresponding to the configured
+*                 timer channels, and:
+*               - disables the LPTMR channel
+*               - disables the freeze mode
+*               - disables IRQ corresponding to Lptmr channel
+*               - clears the (pending) interrupt flag corresponding to Lptmr channel
+*
+*
+*
+* @param[in]     instance        LPTMR hw instance
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+*
+*/
+void Lptmr_Gpt_Ip_DeInit(uint8 instance);
+/*================================================================================================*/
+/**
+* @brief        Function for starting the Lptmr timer channel.
+* @details      This function:
+*               - clears the (pending) interrupt flag corresponding to Lptmr channel
+*               - disables the LPTMR timer channel
+*               - sets the timeout value into the LPTMR timer channel register
+*               - enables the LPTMR timer channel
+*               - enables the IRQ corresponding to the LPTMR timer channel,if channel configured in One Shot mode.
+*
+*
+*
+* @param[in]     value            channel timeout value
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+*
+*/
+void Lptmr_Gpt_Ip_StartTimer(uint8 instance, uint16 value);
+
+/*================================================================================================*/
+/**
+* @brief        Function for stopping the Lptmr timer channel.
+* @details      This function disables the LPTMR channel
+*
+*
+* @param[in]     instance        LPTMR hw instance
+* @return        void
+* @pre           The driver needs to be initialized.
+*/
+void Lptmr_Gpt_Ip_StopTimer(uint8 instance);
+
+
+/*================================================================================================*/
+/**
+* @brief         Driver function for Enable Interrupt for LPTMR channel
+* @details       This function:
+*                        - Enable Interrupt for LPTMR channel
+*
+* @param[in]     instance        LPTMR hw instance
+* @return        void
+* @pre           The driver needs to be initialized.
+*
+*/
+void Lptmr_Gpt_Ip_EnableInterrupt(uint8 instance);
+/*================================================================================================*/
+/**
+* @brief         Lptmr_Gpt_Ip_SetCompareValue
+* @details       This function:
+*                        - Set the compare value in counter tick units, for a LPTMR instance.
+*                   Possible return values:
+*                  - STATUS_SUCCESS: completed successfully
+*                  - STATUS_ERROR: cannot reconfigure compare value (TCF not set)
+*                  - STATUS_TIMEOUT: compare value is smaller than current counter value
+*
+* @param[in]     instance        LPTMR hw instance
+* @param[in]     compareValue    Compare value in counter tick units
+* @return        void
+* @pre           The driver needs to be initialized.
+*
+*
+*
+*/
+Lptmr_Gpt_Ip_StatusType Lptmr_Gpt_Ip_SetCompareValue(uint8 instance,
+                                           uint16 compareValue);
+
+/*================================================================================================*/
+/**
+* @brief         Gpt driver function for Disable Interrupt for LPTMR channel
+* @details       This function:
+*                        - Disable Interrupt for LPTMR channel
+* @param[in]     instance        LPTMR hw instance
+* @return        void
+* @pre           The driver needs to be initialized.
+*
+*/
+void Lptmr_Gpt_Ip_DisableInterrupt(uint8 instance);
+
+/*================================================================================================*/
+#if (LPTMR_GPT_IP_SET_CLOCK_MODE == STD_ON)
+/**
+* @brief        The function changes the LPtimer prescaler value.
+* @details      This function sets the LPtimer prescaler based on the input mode.
+*
+* @param[in]    instance     LPtimer hardware instance
+* @param[in]    clockMode    LPTMR_GPT_IP_CLOCKMODE_NORMAL or LPTMR_GPT_IP_CLOCKMODE_ALTERNATE
+*
+* @return       void
+* @pre          The driver needs to be initialized.On/Off by the configuration parameter: GPT_DUAL_CLOCK_MODE
+* @implements   Lptmr_Gpt_Ip_SetClockMode_Activity
+*/
+void Lptmr_Gpt_Ip_SetClockMode(uint8 instance, Lptmr_Gpt_Ip_ClockModeType clockMode);
+/*================================================================================================*/
+#endif
+
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif /* LPTMR_GPT_IP_USED == STD_ON */
+
+/** @} */
+#endif /* LPTMR_GPT_IP_H*/
+#endif /* LPTMR_GPT_IP_H*/

RTD/include/Lptmr_Gpt_Ip_Types.h

@@ -0,0 +1,195 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef LPTMR_GPT_IP_TYPES_H
+#define LPTMR_GPT_IP_TYPES_H
+
+/**
+*   @file       Lptmr_Gpt_Ip_Types.h
+*
+*   @addtogroup Lptmr_Gpt_Ip Lptmr IPL
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Lptmr_Gpt_Ip_Cfg_Defines.h"
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define LPTMR_GPT_IP_TYPES_VENDOR_ID                       43
+#define LPTMR_GPT_IP_TYPES_AR_RELEASE_MAJOR_VERSION        4
+#define LPTMR_GPT_IP_TYPES_AR_RELEASE_MINOR_VERSION        4
+#define LPTMR_GPT_IP_TYPES_AR_RELEASE_REVISION_VERSION     0
+#define LPTMR_GPT_IP_TYPES_SW_MAJOR_VERSION                1
+#define LPTMR_GPT_IP_TYPES_SW_MINOR_VERSION                0
+#define LPTMR_GPT_IP_TYPES_SW_PATCH_VERSION                0
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+#if (LPTMR_GPT_IP_TYPES_VENDOR_ID != LPTMR_GPT_IP_DEFINES_VENDOR_ID_CFG)
+    #error "Lptmr_Gpt_Ip_Types.h and Lptmr_Gpt_Ip_Cfg_Defines.h have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((LPTMR_GPT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != LPTMR_GPT_IP_DEFINES_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (LPTMR_GPT_IP_TYPES_AR_RELEASE_MINOR_VERSION != LPTMR_GPT_IP_DEFINES_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (LPTMR_GPT_IP_TYPES_AR_RELEASE_REVISION_VERSION != LPTMR_GPT_IP_DEFINES_AR_RELEASE_REVISION_VERSION_CFG) \
+    )
+    #error "AutoSar Version Numbers of Lptmr_Gpt_Ip_Types.h and Lptmr_Gpt_Ip_Cfg_Defines.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((LPTMR_GPT_IP_TYPES_SW_MAJOR_VERSION != LPTMR_GPT_IP_DEFINES_SW_MAJOR_VERSION_CFG) || \
+     (LPTMR_GPT_IP_TYPES_SW_MINOR_VERSION != LPTMR_GPT_IP_DEFINES_SW_MINOR_VERSION_CFG) || \
+     (LPTMR_GPT_IP_TYPES_SW_PATCH_VERSION != LPTMR_GPT_IP_DEFINES_SW_PATCH_VERSION_CFG) \
+    )
+    #error "Software Version Numbers of Lptmr_Gpt_Ip_Types.h and Lptmr_Gpt_Ip_Cfg_Defines.h are different"
+#endif
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+/**
+* @brief LPTMR E_TIMEOUT
+*/
+#define E_TIMEOUT    0x03
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+
+/**
+ * @brief     Enum containing the LPTMR module clock sources
+ * @details   Lptmr_Gpt_Ip_ClockSelectType
+ */
+typedef enum
+{
+    LPTMR_GPT_IP_CLOCK_SIRCDIV2     = 0x00U,      /**< @brief LPTMR clock source SIRCDIV2_CLK */
+    LPTMR_GPT_IP_CLOCK_LPO1K        = 0x01U,      /**< @brief LPTMR clock source LPO1K */
+    LPTMR_GPT_IP_CLOCK_RTC_CLK      = 0x02U,      /**< @brief LPTMR clock source RTC_CLK */
+    LPTMR_GPT_IP_CLOCK_PCC_LPTMR0   = 0x03U       /**< @brief LPTMR clock source PCC_LPTMR0 */
+} Lptmr_Gpt_Ip_ClockSelectType;
+
+/**
+ * @brief     LPTMR Status error
+ * @details   Status error
+ */
+typedef enum
+{ 
+    LPTMR_GPT_IP_SUCCESS = E_OK,            /**< @brief Status value is SUCCESS */
+    LPTMR_GPT_IP_ERROR   = E_NOT_OK,        /**< @brief Status value is ERROR */
+    LPTMR_GPT_IP_TIMEOUT = E_TIMEOUT        /**< @brief Status value is TIMEOUT */
+} Lptmr_Gpt_Ip_StatusType;
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+/**
+* @brief    Callback type for each channel 
+* @details  Lptmr_Gpt_Ip_CallbackType
+* 
+*/
+typedef void (*Lptmr_Gpt_Ip_CallbackType)(uint8 callbackParam);
+/**
+ * @internal
+ * @brief       Structure to configure the LPTMR
+ * @details     This structure holds the configuration settings for the LPTMR
+ */
+typedef struct
+{
+    boolean                            prescalerEnable;         /**< @brief On/Off prescalerEnable */
+#if(LPTMR_GPT_IP_SET_CLOCK_MODE == STD_ON)
+    uint8                              clockAlternatePrescaler; /**< @brief Clock divide value for the AlternatePrescaler */
+#endif
+    uint8                              clockPrescaler;          /**< @brief Clock divide value for the clockPrescaler */
+    Lptmr_Gpt_Ip_ClockSelectType       clocksource;             /**< @brief LPTMR Clock Select                        */
+    Lptmr_Gpt_Ip_CallbackType          callback;                /**< @brief Periodic interrupt callback               */
+    uint8                              callbackParam;           /**< @brief Pointer to callback parameters            */
+} Lptmr_Gpt_Ip_ConfigType;
+
+
+/**
+ * @brief       Internal context structure Lptmr_Gpt_Ip_State
+ * @details     This structure is used by the IPL driver for internal logic. 
+ *              The content is populated on Init.
+ */
+typedef struct
+{
+    boolean                     chInit;              /**< @brief chInit                                                                */
+    Lptmr_Gpt_Ip_CallbackType   callback;            /**< @brief callback                                                              */
+    uint8                       callbackParam;       /**< @brief callbackParam                                                         */
+} Lptmr_Gpt_Ip_State;
+
+/**
+* @brief    Prescaler type. Indicates of whether the clock channel mode is "NORMAL" or "ALTERNATE".
+* @details  This enumeration specifies the possible types of prescalers used to configure base-clock timers
+*/
+#if (LPTMR_GPT_IP_SET_CLOCK_MODE == STD_ON)
+typedef enum
+{
+    LPTMR_GPT_IP_CLOCKMODE_NORMAL    = 0x0U,  /**< @brief Selected value is the NORMAL configured prescaler */
+    LPTMR_GPT_IP_CLOCKMODE_ALTERNATE = 0x1U   /**< @brief Selected value is the ALTERNATE configured prescaler */
+} Lptmr_Gpt_Ip_ClockModeType;
+#endif /* LPTMR_GPT_IP_SET_CLOCK_MODE */
+
+
+/**
+ * @brief       internal context structure
+ *
+ * @details     This structure is used by the IPL driver for internal logic. 
+ *              The content is populated on Init
+ */
+typedef struct
+{
+    uint8       clockPrescaler;              /**< @brief Clock divide value for the NormalPrescaler */
+    uint8       clockAlternatePrescaler;     /**< @brief Clock divide value for the AlternatePrescaler */    
+} Lptmr_Gpt_Ip_InstanceState;
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+#endif /* LPTMR_GPT_IP_TYPES_H */

RTD/include/Lpuart_Uart_Ip_HwAccess.h

@@ -32,8 +32,7 @@
 *   @addtogroup  lpuart_ip Lpuart  IPL
 *   @{
 */
-#include "Port.h"
-#include "Dio.h"//zhengchao
+
 #ifdef __cplusplus
 extern "C"{
 #endif
@@ -695,15 +694,11 @@ static inline void Lpuart_Uart_Ip_StartTimeout(uint32 *StartTimeOut, uint32 *Tim
  * @return  TRUE     Timeout occurs
  *          FALSE    Timeout does not occur
  */
-
 static inline boolean Lpuart_Uart_Ip_CheckTimeout(uint32 * StartTime, uint32 * ElapsedTicks, uint32 TimeoutTicks, OsIf_CounterType OsifCounter)
 {
-//	Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2,STD_OFF);
     uint32 CurrentElapsedTicks = OsIf_GetElapsed(StartTime, OsifCounter);
     *ElapsedTicks += CurrentElapsedTicks;
-//    Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2,STD_ON);
     return ((*ElapsedTicks >= TimeoutTicks) ? TRUE : FALSE);
-
 }
 
 /**

RTD/include/MemIf_Types.h

@@ -0,0 +1,170 @@
+/**
+*    @file        MemIf_Types.h
+*    @version     1.0.0
+*
+*    @brief       AUTOSAR MemIf - module interface.
+*    @details     Stub for MemIf module - contains some typedefs needed by other components.
+*                 This file contains sample code only. It is not part of the production code deliverables.
+*
+*   @addtogroup   MEMIF_TYPES
+*   @{
+*/
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : S32K14X
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+/*==================================================================================================
+==================================================================================================*/
+
+#ifndef MEMIF_TYPES_H
+#define MEMIF_TYPES_H
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+                                         INCLUDE FILES
+ 1) system and project includes
+ 2) needed interfaces from external units
+ 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+/**
+* @file           MemIf_Types.h
+* @requirements   BSW00374, BSW00379, BSW00318
+* @implements     DESIGN001, DESIGN002
+*/
+#define MEMIF_VENDOR_ID                          43
+#define MEMIF_MODULE_ID                          22
+#define MEMIF_AR_RELEASE_MAJOR_VERSION           4
+#define MEMIF_AR_RELEASE_MINOR_VERSION           4
+#define MEMIF_AR_RELEASE_REVISION_VERSION        0
+#define MEMIF_SW_MAJOR_VERSION                   1
+#define MEMIF_SW_MINOR_VERSION                   0
+#define MEMIF_SW_PATCH_VERSION                   0
+
+
+/*==================================================================================================
+                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+/*==================================================================================================
+                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+                                             ENUMS
+==================================================================================================*/
+/** 
+* @brief            This type denotes the current status of the underlying abstraction module and device driver. 
+* @details          It shall be used as the return value of the corresponding driver's "GetStatus" function. 
+*
+* @pre
+* @post
+*
+* @requirements     MemIf015
+* @implements
+* @note
+*
+* @violates 
+*/
+typedef enum
+{
+    MEMIF_UNINIT = 0,           /**< @brief The underlying abstraction module or device driver has not been initialized (yet)*/
+    MEMIF_IDLE,                 /**< @brief The underlying abstraction module or device driver is currently idle */
+    MEMIF_BUSY,                 /**< @brief The underlying abstraction module or device driver is currently busy */
+    MEMIF_BUSY_INTERNAL         /**< @brief The underlying abstraction module is busy with internal management operations.
+                                            The underlying device driver can be busy or idle */
+}MemIf_StatusType;
+
+
+/** 
+* @brief            This type denotes the result of the last job.
+* @details          It shall be used as the return value of the job. 
+*
+* @pre
+* @post
+*
+* @requirements     MemIf016
+* @implements
+* @note
+*
+* @violates 
+*/
+typedef enum
+{
+    MEMIF_JOB_OK = 0,               /**< @brief The job has been finished succesfully */
+    MEMIF_JOB_FAILED,               /**< @brief The job has not been finished succesfully */
+    MEMIF_JOB_PENDING,              /**< @brief The job has not yet been finished */
+    MEMIF_JOB_CANCELED,             /**< @brief The job has been canceled */
+    MEMIF_BLOCK_INCONSISTENT,       /**< @brief The requested block is inconsistent, it may contain corrupted data */
+    MEMIF_BLOCK_INVALID             /**< @brief The requested block has been marked as invalid, the requested operation can not be performed */
+}MemIf_JobResultType;
+
+
+/** 
+* @brief            This type denotes the operation mode.
+* @details          This type denotes the operation mode of the underlying abstraction modules and device drivers. 
+*
+* @pre
+* @post
+*
+* @requirements     MemIf021
+* @implements
+* @note
+*
+* @violates 
+*/
+typedef enum
+{
+    MEMIF_MODE_SLOW = 0,        /**< @brief The underlying memory abstraction modules and drivers are working in slow mode */
+    MEMIF_MODE_FAST             /**< @brief The underlying memory abstraction modules and drivers are working in fast mode */
+}MemIf_ModeType;
+
+/*==================================================================================================
+                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MEMIF_TYPES_H */
+
+/** @} */
+

RTD/include/OsIf.h

@@ -8,7 +8,7 @@
 * Autosar Revision : ASR_REL_4_4_REV_0000
 * Autosar Conf.Variant :
 * SW Version : 1.0.0
-* Build Version : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 * (c) Copyright 2020-2021 NXP Semiconductors
 * All Rights Reserved.

RTD/include/OsIf_Cfg_TypesDef.h

@@ -8,7 +8,7 @@
 * Autosar Revision : ASR_REL_4_4_REV_0000
 * Autosar Conf.Variant :
 * SW Version : 1.0.0
-* Build Version : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 * (c) Copyright 2020-2021 NXP Semiconductors
 * All Rights Reserved.

RTD/include/OsIf_DeviceRegisters.h

@@ -8,7 +8,7 @@
 * Autosar Revision : ASR_REL_4_4_REV_0000
 * Autosar Conf.Variant :
 * SW Version : 1.0.0
-* Build Version : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 * (c) Copyright 2020-2021 NXP Semiconductors
 * All Rights Reserved.

RTD/include/OsIf_Internal.h

@@ -8,7 +8,7 @@
 * Autosar Revision : ASR_REL_4_4_REV_0000
 * Autosar Conf.Variant :
 * SW Version : 1.0.0
-* Build Version : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 * (c) Copyright 2020-2021 NXP Semiconductors
 * All Rights Reserved.

RTD/include/OsIf_Timer_Custom.h

@@ -8,7 +8,7 @@
 * Autosar Revision : ASR_REL_4_4_REV_0000
 * Autosar Conf.Variant :
 * SW Version : 1.0.0
-* Build Version : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 * (c) Copyright 2020-2021 NXP Semiconductors
 * All Rights Reserved.

RTD/include/OsIf_Timer_System.h

@@ -8,7 +8,7 @@
 * Autosar Revision : ASR_REL_4_4_REV_0000
 * Autosar Conf.Variant :
 * SW Version : 1.0.0
-* Build Version : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 * (c) Copyright 2020-2021 NXP Semiconductors
 * All Rights Reserved.

RTD/include/OsIf_Timer_System_Internal_Systick.h

@@ -8,7 +8,7 @@
 * Autosar Revision : ASR_REL_4_4_REV_0000
 * Autosar Conf.Variant :
 * SW Version : 1.0.0
-* Build Version : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 * (c) Copyright 2020-2021 NXP Semiconductors
 * All Rights Reserved.

RTD/include/Pdb_Adc_Ip.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Pdb_Adc_Ip_HwAccess.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Pdb_Adc_Ip_Types.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/Rte_Os_Type.h

@@ -0,0 +1,94 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef RTE_OS_TYPE_H
+#define RTE_OS_TYPE_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define RTE_OS_TYPE_VENDOR_ID                     43
+#define RTE_OS_TYPE_MODULE_ID                     002
+
+#define RTE_OS_TYPE_AR_RELEASE_MAJOR_VERSION      4
+#define RTE_OS_TYPE_AR_RELEASE_MINOR_VERSION      4
+#define RTE_OS_TYPE_AR_RELEASE_REVISION_VERSION   0
+#define RTE_OS_TYPE_SW_MAJOR_VERSION              1
+#define RTE_OS_TYPE_SW_MINOR_VERSION              0
+#define RTE_OS_TYPE_SW_PATCH_VERSION              0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+typedef uint32 CounterType;
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* RTE_OS_TYPE_H */

RTD/include/SRtc_Ip.h

@@ -0,0 +1,380 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SRTC_IP_H
+#define SRTC_IP_H
+
+/**
+*   @file       SRtc_Ip.h
+*
+*   @addtogroup srtc_ip Rtc IPL
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "SRtc_Ip_Types.h"
+#include "SRtc_Ip_Cfg.h"
+#include "OsIf.h"
+#include "Mcal.h"
+#if SRTC_IP_DEV_ERROR_DETECT == STD_ON
+#include "Devassert.h"
+#endif
+#include "SchM_Gpt.h"
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SRTC_IP_VENDOR_ID                       43
+#define SRTC_IP_AR_RELEASE_MAJOR_VERSION        4
+#define SRTC_IP_AR_RELEASE_MINOR_VERSION        4
+#define SRTC_IP_AR_RELEASE_REVISION_VERSION     0
+#define SRTC_IP_SW_MAJOR_VERSION                1
+#define SRTC_IP_SW_MINOR_VERSION                0
+#define SRTC_IP_SW_PATCH_VERSION                0
+
+/*==================================================================================================
+*                                    FILE VERSION CHECKS
+==================================================================================================*/
+#if (SRTC_IP_VENDOR_ID != SRTC_IP_TYPES_VENDOR_ID)
+    #error "SRtc_Ip.h and SRtc_Ip_Types.h have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((SRTC_IP_AR_RELEASE_MAJOR_VERSION != SRTC_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (SRTC_IP_AR_RELEASE_MINOR_VERSION != SRTC_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (SRTC_IP_AR_RELEASE_REVISION_VERSION != SRTC_IP_TYPES_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of SRtc_Ip.h and SRtc_Ip_Types.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((SRTC_IP_SW_MAJOR_VERSION != SRTC_IP_TYPES_SW_MAJOR_VERSION) || \
+     (SRTC_IP_SW_MINOR_VERSION != SRTC_IP_TYPES_SW_MINOR_VERSION) || \
+     (SRTC_IP_SW_PATCH_VERSION != SRTC_IP_TYPES_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of SRtc_Ip.h and SRtc_Ip_Types.h are different"
+#endif
+
+#if (SRTC_IP_VENDOR_ID != SRTC_IP_VENDOR_ID_CFG)
+    #error "SRtc_Ip.h and SRtc_Ip_Cfg.h have different vendor ids"
+#endif
+/* Check if RTC_IP header file and RTC_IP_Cfg header file are of the same Autosar version */
+#if ((SRTC_IP_AR_RELEASE_MAJOR_VERSION != SRTC_IP_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (SRTC_IP_AR_RELEASE_MINOR_VERSION != SRTC_IP_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (SRTC_IP_AR_RELEASE_REVISION_VERSION != SRTC_IP_AR_RELEASE_REVISION_VERSION_CFG) \
+    )
+    #error "AutoSar Version Numbers of SRtc_Ip.h and SRtc_Ip_Cfg.h are different"
+#endif
+/* Check if RTC_IP file and RTC_IP_Cfg header file are of the same Software version */
+#if ((SRTC_IP_SW_MAJOR_VERSION != SRTC_IP_SW_MAJOR_VERSION_CFG) || \
+     (SRTC_IP_SW_MINOR_VERSION != SRTC_IP_SW_MINOR_VERSION_CFG) || \
+     (SRTC_IP_SW_PATCH_VERSION != SRTC_IP_SW_PATCH_VERSION_CFG) \
+    )
+    #error "Software Version Numbers of SRtc_Ip.h and SRtc_Ip_Cfg.h are different"
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((SRTC_IP_AR_RELEASE_MAJOR_VERSION != SCHM_GPT_AR_RELEASE_MAJOR_VERSION) || \
+         (SRTC_IP_AR_RELEASE_MINOR_VERSION != SCHM_GPT_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of SRtc_Ip.h and SchM_Gpt.h are different"
+    #endif
+    /* Check if this header file and OsIf.h file are of the same Autosar version */
+    #if ((SRTC_IP_AR_RELEASE_MAJOR_VERSION != OSIF_AR_RELEASE_MAJOR_VERSION) || \
+        (SRTC_IP_AR_RELEASE_MINOR_VERSION != OSIF_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of SRtc_Ip.h and OsIf.h are different"
+    #endif
+#endif
+
+#if SRTC_IP_DEV_ERROR_DETECT == STD_ON
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((SRTC_IP_AR_RELEASE_MAJOR_VERSION != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
+         (SRTC_IP_AR_RELEASE_MINOR_VERSION != DEVASSERT_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of SRtc_Ip.h and Devassert.h are different"
+    #endif
+#endif
+#endif
+/*==================================================================================================
+*                                            CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+#if (SRTC_IP_USED == STD_ON)
+
+extern uint32 Srtc_Ip_u32TargetValue;
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+
+uint32 Srtc_Ip_GetStatusFlags(uint8 instance, Srtc_Ip_InterruptType interruptMode);
+uint32 Srtc_Ip_GetTimeSecondsRegister(uint8 instance);
+uint32 Srtc_Ip_GetTimeAlarmRegister(uint8 instance);
+/*================================================================================================*/
+/**
+*
+* @brief         SRtc Driver function
+* @details       This function:
+*                        - will convert seconds into time-date format.
+*
+* @param[in]     seconds         number of seconds
+* @param[in]     *timeDate       pointer to configuration
+* @return        void
+* @pre           The driver needs to be initialized.
+*
+*/
+void Srtc_Ip_ConvertSecondsToTimeDate(const uint32 *seconds,
+                                      Srtc_Ip_TimedateType * const timeDate);
+/*================================================================================================*/
+/**
+*
+* @brief         SRtc Driver function
+* @details       This function:
+*                        - will convert time-date into seconds.
+*
+* @param[in]     seconds         number of seconds
+* @param[in]     *timeDate       pointer to configuration
+* @return        void
+* @pre           The driver needs to be initialized.
+*
+*/
+void Srtc_Ip_ConvertTimeDateToSeconds(const Srtc_Ip_TimedateType *timeDate,
+                                      uint32 * const seconds);
+/*================================================================================================*/
+/**
+* @brief   SRtc driver initialization function for SRtc module.
+* @details This function:
+*          - Disables the time counter
+*          - Disables all interupt modes
+*          - Clears Time Invalid Flag
+*          - Selects source Clock
+*          - If compensation support is enabled sets the configured values
+*          - Sets channel state variables
+*
+* @param[in]     instance     hw instance
+* @param[in]     *config      pointer to configuration
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the driver
+*
+*/
+void Srtc_Ip_Init(uint8 instance, const Srtc_Ip_ConfigType *config);
+/*================================================================================================*/
+/**
+* @brief         SRtc driver de-initialization function
+* @details       This function:
+*                       - Performs a software reset
+*                       - Clears global variables
+* @param[in]     instance        Rtc hw instance
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+*
+*/
+void Srtc_Ip_DeInit(uint8 instance);
+/*================================================================================================*/
+/**
+* @brief         SRtc Driver function for starting the Rtc counter.
+* @details       This function:
+*                           - Enables the counter
+* @param[in]     instance            Rtc hw instance
+* @return        Srtc_Ip_StatusType  status error
+* @pre           The driver needs to be initialized.
+*
+*/
+Srtc_Ip_StatusType Srtc_Ip_StartCounter(uint8 instance);
+/*================================================================================================*/
+/**
+* @brief         SRtc Driver function for stopping the Rtc counter.
+* @details       This function:
+*                           - Disables Time Alaram Interrupt
+*                           - Clears interrupt flag
+*                           - Disables the counter
+* @param[in]     instance            Rtc hw instance
+* @return        Srtc_Ip_StatusType  status error
+* @pre           The driver needs to be initialized.
+*
+*/
+Srtc_Ip_StatusType Srtc_Ip_StopCounter(uint8 instance);
+/*================================================================================================*/
+/**
+* @brief         SRtc Driver function for starting the Rtc timer channel with a timeout value.
+* @details       This function:
+*                       - Disables counter
+*                       - Disables Time Alaram Interrupt
+*                       - Gets Time Seconds Register value
+*                       - Calcutates new compare value
+*                       - Sets Time Alarm Register
+*                       - Enables Time Alaram Interrupt
+*                       - Enables counter
+*
+* @param[in]     instance         Rtc hw instance
+*                value            channel timeout value
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+*
+*/
+void Srtc_Ip_StartTimer(uint8 instance, uint32 value);
+/*================================================================================================*/
+/**
+* @brief         SRtc Driver function for enabling interrupt for RTC channel
+* @details       This function:
+*                        - Enables Interrupt for RTC channel based on selected mode
+*
+* @param[in]     instance        Rtc hw instance
+*                interruptMode   Rtc hw interrupt mode
+* @return        void
+* @pre           The driver needs to be initialized.
+*
+*/
+void Srtc_Ip_EnableInterrupt(uint8 instance, Srtc_Ip_InterruptType interruptMode);
+/*================================================================================================*/
+/**
+*
+* @brief         SRtc Driver function for Disable Interrupt for RTC channel
+* @details       This function:
+*                        - Disable Interrupt for RTC channel based on selected mode
+*
+* @param[in]     instance        Rtc hw instance
+* @return        void
+* @pre           The driver needs to be initialized.
+*
+*/
+void Srtc_Ip_DisableInterrupt(uint8 instance, Srtc_Ip_InterruptType interruptMode);
+/*================================================================================================*/
+/**
+*
+* @brief         SRtc Driver function
+* @details       This function:
+*                        - Sets the date passed by the user.
+*
+* @param[in]     instance           SRtc hw instance
+* @param[in]     *timeDate          pointer to configuration
+* @return        Srtc_Ip_StatusType  status error
+* @pre           The driver needs to be initialized.
+*
+*/
+Srtc_Ip_StatusType Srtc_Ip_SetTimeDate(uint8 instance,
+                                       const Srtc_Ip_TimedateType *timeDate);
+/*================================================================================================*/
+/**
+*
+* @brief         SRtc Driver function
+* @details       This function:
+*                        - Gets the current time and date and it will
+*                               store in the state structure.
+*
+* @param[in]     instance           sRtc hw instance
+* @param[in]     *timeDate          pointer to configuration
+* @return        Srtc_Ip_StatusType  status error
+* @pre           The driver needs to be initialized.
+*
+*/
+Srtc_Ip_StatusType Srtc_Ip_GetTimeDate(uint8 instance,
+                         Srtc_Ip_TimedateType * const timeDate);
+
+
+/*================================================================================================*/
+/**
+*
+* @brief         SRtc Driver function
+* @details       This function:
+*                        - Configures the alarm based on the
+*                               configuration structure passed by the user.
+*                               When using alarm that are configured to be repetitive,
+*                               enable the interrupt. Otherwise the repeat function will
+*                               not work.
+*
+* @param[in]     instance           Rtc hw instance
+* @param[in]     *alarmConfig       pointer to configuration
+* @return        Srtc_Ip_StatusType  status error
+* @pre           The driver needs to be initialized.
+*
+*/
+Srtc_Ip_StatusType Srtc_Ip_ConfigureAlarm(uint8 instance,
+                                          const Srtc_Ip_AlarmConfigType *alarmConfig);
+
+/*================================================================================================*/
+/**
+*
+* @brief         SRtc Driver function
+* @details       This function:
+*                - Configures the Time Seconds Interrupt with the Seconds interrupt Configuration Type.
+* @param[in]     instance            Rtc hw instance
+* @param[in]     occursFrequency     how often seconds interrupt occurs
+* @return        Srtc_Ip_StatusType  status error
+* @pre           The driver needs to be initialized.
+*
+*/
+Srtc_Ip_StatusType Srtc_Ip_ConfigureSecondsInterrupt(uint8 instance,
+                                                     Srtc_Ip_SecIntFreqType occursFrequency);
+
+/*================================================================================================*/
+#if (STD_ON == SRTC_IP_ENABLE_LOCK_REGISTER_API)
+/**
+*
+* @brief         SRtc Driver function
+* @details       This function:
+*                   - Configures register lock for the corresponding
+*                     RTC instance. Remember that all the registers are unlocked
+*                     only by software reset or power on reset.
+*                     (Except for CR that is unlocked only by POR).
+* @param[in]     instance            Rtc hw instance
+* @param[in]     lockRegister        register that will be locked
+* @return        Srtc_Ip_StatusType  status error
+*
+*/
+Srtc_Ip_StatusType Srtc_Ip_ConfigureLockRegister(uint8 instance,
+                                                     Srtc_Ip_LockRegConfigType * const lockRegister);
+#endif
+
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#endif /* SRTC_IP_USED == STD_ON */
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+#endif /* SRTC_IP_H*/

RTD/include/SRtc_Ip_Types.h

@@ -0,0 +1,273 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SRTC_IP_TYPES_H
+#define SRTC_IP_TYPES_H
+
+/**
+*   @file       SRtc_Ip_Types.h
+*
+*   @addtogroup srtc_ip Rtc IPL
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "SRtc_Ip_Cfg_Defines.h"
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SRTC_IP_TYPES_VENDOR_ID                       43
+#define SRTC_IP_TYPES_AR_RELEASE_MAJOR_VERSION        4
+#define SRTC_IP_TYPES_AR_RELEASE_MINOR_VERSION        4
+#define SRTC_IP_TYPES_AR_RELEASE_REVISION_VERSION     0
+#define SRTC_IP_TYPES_SW_MAJOR_VERSION                1
+#define SRTC_IP_TYPES_SW_MINOR_VERSION                0
+#define SRTC_IP_TYPES_SW_PATCH_VERSION                0
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+#if (SRTC_IP_TYPES_VENDOR_ID != SRTC_IP_DEFINES_VENDOR_ID_CFG)
+    #error "SRtc_Ip_Types.h and SRtc_Ip_Cfg_Defines.h have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((SRTC_IP_TYPES_AR_RELEASE_MAJOR_VERSION != SRTC_IP_DEFINES_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (SRTC_IP_TYPES_AR_RELEASE_MINOR_VERSION != SRTC_IP_DEFINES_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (SRTC_IP_TYPES_AR_RELEASE_REVISION_VERSION != SRTC_IP_DEFINES_AR_RELEASE_REVISION_VERSION_CFG) \
+    )
+    #error "AutoSar Version Numbers of SRtc_Ip_Types.h and SRtc_Ip_Cfg_Defines.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((SRTC_IP_TYPES_SW_MAJOR_VERSION != SRTC_IP_DEFINES_SW_MAJOR_VERSION_CFG) || \
+     (SRTC_IP_TYPES_SW_MINOR_VERSION != SRTC_IP_DEFINES_SW_MINOR_VERSION_CFG) || \
+     (SRTC_IP_TYPES_SW_PATCH_VERSION != SRTC_IP_DEFINES_SW_PATCH_VERSION_CFG) \
+    )
+    #error "Software Version Numbers of SRtc_Ip_Types.h and SRtc_Ip_Cfg_Defines.h are different"
+#endif
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+#if (SRTC_IP_USED == STD_ON)
+/**
+* @brief SRTC Channels defines
+*/
+#define     SECONDS_IN_A_DAY           (86400UL)
+#define     SECONDS_IN_A_HOUR          (3600U)
+#define     SECONDS_IN_A_MIN           (60U)
+#define     MINS_IN_A_HOUR             (60U)
+#define     HOURS_IN_A_DAY             (24U)
+#define     DAYS_IN_A_YEAR             (365U)
+#define     DAYS_IN_A_LEAP_YEAR        (366U)
+#define     YEAR_RANGE_START           (1970U)
+#define     YEAR_RANGE_END             (2099U)
+#define     MAX_32BIT                  (0xFFFFFFFFUL)
+
+#endif
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+/**
+ * @brief     Enum containing the SRTC module clock sources
+ * @details   Srtc_Ip_ClockSelectType
+ */
+typedef enum
+{
+    SRTC_IP_CLK_SRC_OSC_32KHZ = 0x00U,  /**< SRTC Prescaler increments using 32 KHz crystal  */
+    SRTC_IP_CLK_SRC_LPO_1KHZ  = 0x01U   /**< SRTC Prescaler increments using 1KHz LPO        */
+} Srtc_Ip_ClockSelectType;
+
+/**
+ * @brief SRTC CLKOUT pin configuration
+ */
+typedef enum
+{
+    SRTC_IP_CLKOUT_DISABLED  = 0x00U,   /**< Clock out pin is disabled                                    */
+    SRTC_IP_CLKOUT_SRC_TSIC  = 0x01U,   /**< Output on RTC_CLKOUT as configured on Time seconds interrupt */
+    SRTC_IP_CLKOUT_SRC_32KHZ = 0x02U    /**< Output on RTC_CLKOUT of the 32KHz clock                      */
+} Srtc_Ip_ClockOutType;
+
+/**
+ * @brief     Enum containing SRTC interrupt flags
+ * @details   SRtc_Ip_InterruptType
+ */
+typedef enum
+{
+    SRTC_IP_INVALID_INTERRUPT  = 0x00U,     /**< @brief RTC_TIME_INVALID_INTERRUPT  */
+    SRTC_IP_OVERFLOW_INTERRUPT = 0x01U,     /**< @brief RTC_TIME_OVERFLOW_INTERRUPT */
+    SRTC_IP_ALARM_INTERRUPT    = 0x02U,     /**< @brief RTC_TIME_ALARM_INTERRUPT    */
+    SRTC_IP_SECONDS_INTERRUPT  = 0x03U      /**< @brief RTC_TIME_SECONDS_INTERRUPT  */
+} Srtc_Ip_InterruptType;
+
+/**
+ * @brief     SRtc Status error
+ * @details   Status error
+ */
+typedef enum
+{
+SRTC_IP_SUCCESS = E_OK,      /**< @brief Status value is SUCCESS */
+SRTC_IP_ERROR = E_NOT_OK     /**< @brief Status value is ERROR */
+} Srtc_Ip_StatusType;
+
+/**
+ * @brief SRTC Seconds interrupt configuration
+ */
+typedef enum
+{
+    SRTC_IP_INT_1HZ   = 0x00U,     /**< SRTC seconds interrupt occurs at 1 Hz      */
+    SRTC_IP_INT_2HZ   = 0x01U,     /**< SRTC seconds interrupt occurs at 2 Hz      */
+    SRTC_IP_INT_4HZ   = 0x02U,     /**< SRTC seconds interrupt occurs at 4 Hz      */
+    SRTC_IP_INT_8HZ   = 0x03U,     /**< SRTC seconds interrupt occurs at 8 Hz      */
+    SRTC_IP_INT_16HZ  = 0x04U,     /**< SRTC seconds interrupt occurs at 16 Hz     */
+    SRTC_IP_INT_32HZ  = 0x05U,     /**< SRTC seconds interrupt occurs at 32 Hz     */
+    SRTC_IP_INT_64HZ  = 0x06U,     /**< SRTC seconds interrupt occurs at 64 Hz     */
+    SRTC_IP_INT_128HZ = 0x07U      /**< SRTC seconds interrupt occurs at 128 Hz    */
+} Srtc_Ip_SecIntFreqType;
+
+#if (STD_ON == SRTC_IP_ENABLE_LOCK_REGISTER_API)
+/**
+ * @brief SRTC register lock
+ */
+typedef enum
+{
+    SRTC_IP_LOCK_REG_LOCK   = 0x00U,   /**< SRTC Lock Register lock         */
+    SRTC_IP_STATUS_REG_LOCK = 0x01U,   /**< SRTC Status Register lock       */
+    SRTC_IP_CTRL_REG_LOCK   = 0x02U,   /**< SRTC Control Register lock      */
+    SRTC_IP_TCL_REG_LOCK    = 0x03U    /**< SRTC Time Compensation Reg lock */
+} Srtc_Ip_LockRegSelectType;
+#endif
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+/**
+* @brief    Callback type for each channel
+* @details  Srtc_Ip_CallbackType
+*
+*/
+typedef void (*Srtc_Ip_CallbackType)(uint8 callbackParam);
+
+/**
+ * @brief       Structure to configure the SRTC
+ * @details     This structure holds the configuration settings for the SRTC
+ */
+typedef struct
+{
+    Srtc_Ip_ClockSelectType     clockSelect;                /**< @brief SRTC Clock Select                   */
+    Srtc_Ip_ClockOutType        clockOutSelect;             /**< @brief SRTC Clock Pin select - RTC_CLKOUT  */
+#if (defined (SRTC_IP_ENABLE_COMPENSATION_SUPPORT) && (SRTC_IP_ENABLE_COMPENSATION_SUPPORT == STD_ON))
+    uint8                       compensationInterval;       /**< @brief SRTC Compensation Interval          */
+    uint8                       compensation;               /**< @brief SRTC Compensation Value             */
+#endif
+    Srtc_Ip_CallbackType        callback;                   /**< @brief Periodic interrupt callback         */
+    uint8                       callbackParam;              /**< @brief Pointer to callback parameters      */
+} Srtc_Ip_ConfigType;
+
+/**
+ * @brief   SRTC Time Date structure
+ * @details Srtc_Ip_TimedateType
+ */
+typedef struct
+{
+    uint16                  year;           /**< @brief Year       */
+    uint16                  month;          /**< @brief Month      */
+    uint16                  day;            /**< @brief Day        */
+    uint16                  hour;           /**< @brief Hour       */
+    uint16                  minutes;        /**< @brief Minutes    */
+    uint8                   seconds;        /**< @brief Seconds    */
+} Srtc_Ip_TimedateType;
+
+/**
+ * @brief   SRTC alarm configuration
+ * @details Srtc_Ip_AlarmConfigType
+ */
+typedef struct
+{
+    Srtc_Ip_TimedateType    alarmTime;              /**< @brief Alarm time                                       */
+    uint32                  repetitionInterval;     /**< @brief Interval of repetition in seconds                */
+    uint32                  numberOfRepeats;        /**< @brief Number of alarm repeats                          */
+    boolean                 repeatForever;          /**< @brief Repeat forever if set, discard number of repeats */
+    boolean                 alarmIntEnable;         /**< @brief Enable alarm interrupt                           */
+    Srtc_Ip_CallbackType    alarmCallback;          /**< @brief Pointer to the user callback method.             */
+    uint8                   callbackParams;         /**< @brief Pointer to the callback parameters.              */
+} Srtc_Ip_AlarmConfigType;
+
+#if (STD_ON == SRTC_IP_ENABLE_LOCK_REGISTER_API)
+/**
+ * @brief SRTC Register Lock Configuration
+ */
+typedef struct
+{
+    boolean     lockRegisterLock;                   /**< Lock state of the Lock Register              */
+    boolean     statusRegisterLock;                 /**< Lock state of the Status Register            */
+    boolean     controlRegisterLock;                /**< Lock state of the Control Register           */
+    boolean     timeCompensationRegisterLock;       /**< Lock state of the Time Compensation Register */
+} Srtc_Ip_LockRegConfigType;
+#endif
+/**
+ * @brief       Internal context structure Srtc_Ip_State
+ * @details     This structure is used by the IPL driver for internal logic.
+ *              The content is populated on Init.
+ */
+typedef struct
+{
+    boolean                 alarmInit;           /**< @brief alarmInit                                                             */
+    uint32                  repetitionInterval;  /**< @brief Interval of repetition in seconds                                     */
+    volatile uint32         numberOfRepeats;     /**< @brief Number of alarm repeats                                               */
+    boolean                 repeatForever;       /**< @brief Repeat forever if set, discard number of repeats                      */
+    boolean                 alarmIntEnable;      /**< @brief Enable alarm interrupt                                                */
+    Srtc_Ip_CallbackType    alarmCallback;       /**< @brief Pointer to the user callback method.                                  */
+    uint8                   callbackParams;      /**< @brief Pointer to the callback parameters.                                   */
+    volatile boolean        isAlarmTimeNew;      /**< @brief Check if there is a new alarm                                         */
+    boolean                 chInit;              /**< @brief chInit                                                                */
+    Srtc_Ip_CallbackType    callback;            /**< @brief callback                                                              */
+    uint8                   callbackParam;       /**< @brief callbackParam                                                         */
+} Srtc_Ip_State;
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+#endif /* SRTC_IP_TYPES_H */

RTD/include/SchM_Adc.h

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/include/SchM_Crc.h

@@ -0,0 +1,130 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_CRC_H
+#define SCHM_CRC_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_CRC_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_CRC_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_CRC_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_CRC_SW_MAJOR_VERSION             1
+#define SCHM_CRC_SW_MINOR_VERSION             0
+#define SCHM_CRC_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_crc(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Crc_CRC_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Crc_CRC_EXCLUSIVE_AREA_00(void);
+
+
+
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_CRC_H */

RTD/include/SchM_Crypto.h

@@ -0,0 +1,150 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_CRYPTO_H
+#define SCHM_CRYPTO_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_CRYPTO_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_CRYPTO_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_CRYPTO_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_CRYPTO_SW_MAJOR_VERSION             1
+#define SCHM_CRYPTO_SW_MINOR_VERSION             0
+#define SCHM_CRYPTO_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_crypto(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Crypto_CRYPTO_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Crypto_CRYPTO_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_Crypto_CRYPTO_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Crypto_CRYPTO_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Crypto_CRYPTO_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Crypto_CRYPTO_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Crypto_CRYPTO_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Crypto_CRYPTO_EXCLUSIVE_AREA_03(void);
+
+extern void SchM_Enter_Crypto_CRYPTO_EXCLUSIVE_AREA_04(void);
+extern void SchM_Exit_Crypto_CRYPTO_EXCLUSIVE_AREA_04(void);
+
+extern void SchM_Enter_Crypto_CRYPTO_EXCLUSIVE_AREA_10(void);
+extern void SchM_Exit_Crypto_CRYPTO_EXCLUSIVE_AREA_10(void);
+
+extern void SchM_Enter_Crypto_CRYPTO_EXCLUSIVE_AREA_11(void);
+extern void SchM_Exit_Crypto_CRYPTO_EXCLUSIVE_AREA_11(void);
+
+extern void SchM_Enter_Crypto_CRYPTO_EXCLUSIVE_AREA_12(void);
+extern void SchM_Exit_Crypto_CRYPTO_EXCLUSIVE_AREA_12(void);
+
+
+/**
+* @brief   This function processes queued jobs.
+* @details If asynchronous job processing is configured and there are job queues, this function is called cyclically to process queued jobs.
+*          [SWS_Crypto_91012] Crypto_MainFunction available via SchM_Crypto.h
+* @param   None.
+* @return  Void.
+* @pre     Crypto driver must be initialized.
+**/
+void Crypto_MainFunction (void);
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_CRYPTO_H */

RTD/include/SchM_Eep.h

@@ -0,0 +1,163 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_EEP_H
+#define SCHM_EEP_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_EEP_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_EEP_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_EEP_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_EEP_SW_MAJOR_VERSION             1
+#define SCHM_EEP_SW_MINOR_VERSION             0
+#define SCHM_EEP_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_eep(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_03(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_04(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_04(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_05(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_05(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_06(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_06(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_10(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_10(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_11(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_11(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_12(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_12(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_13(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_13(void);
+
+extern void SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_14(void);
+extern void SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_14(void);
+
+
+void Eep_MainFunction(void);
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_EEP_H */

RTD/include/SchM_Eth.h

@@ -0,0 +1,134 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_ETH_H
+#define SCHM_ETH_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_ETH_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_ETH_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_ETH_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_ETH_SW_MAJOR_VERSION             1
+#define SCHM_ETH_SW_MINOR_VERSION             0
+#define SCHM_ETH_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_eth(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+
+/**
+* @brief         The function checks for controller errors and lost frames. Used for polling state 
+*                changes. Calls EthIf_CtrlModeIndication when the controller mode changed.
+* @api
+* @violates @ref Eth_c_REF_3 For API functions (Eth.c): These functions represent the API of the driver. External linkage is needed to "export" the API.
+* @implements    Eth_MainFunction_Activity
+*/
+extern void Eth_MainFunction(void);
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_ETH_H */

RTD/include/SchM_Fee.h

@@ -0,0 +1,139 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_FEE_H
+#define SCHM_FEE_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_FEE_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_FEE_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_FEE_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_FEE_SW_MAJOR_VERSION             1
+#define SCHM_FEE_SW_MINOR_VERSION             0
+#define SCHM_FEE_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_fee(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Fee_FEE_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Fee_FEE_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_Fee_FEE_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Fee_FEE_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Fee_FEE_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Fee_FEE_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Fee_FEE_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Fee_FEE_EXCLUSIVE_AREA_03(void);
+
+
+void Fee_MainFunction(void);
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_FEE_H */

RTD/include/SchM_Fls.h

@@ -0,0 +1,142 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_FLS_H
+#define SCHM_FLS_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_FLS_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_FLS_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_FLS_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_FLS_SW_MAJOR_VERSION             1
+#define SCHM_FLS_SW_MINOR_VERSION             0
+#define SCHM_FLS_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_fls(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_10(void);
+extern void SchM_Exit_Fls_FLS_EXCLUSIVE_AREA_10(void);
+
+extern void SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_11(void);
+extern void SchM_Exit_Fls_FLS_EXCLUSIVE_AREA_11(void);
+
+extern void SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_12(void);
+extern void SchM_Exit_Fls_FLS_EXCLUSIVE_AREA_12(void);
+
+extern void SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_13(void);
+extern void SchM_Exit_Fls_FLS_EXCLUSIVE_AREA_13(void);
+
+extern void SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_14(void);
+extern void SchM_Exit_Fls_FLS_EXCLUSIVE_AREA_14(void);
+
+
+void Fls_MainFunction(void);
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_FLS_H */

RTD/include/SchM_Gpt.h

@@ -0,0 +1,277 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_GPT_H
+#define SCHM_GPT_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_GPT_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_GPT_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_GPT_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_GPT_SW_MAJOR_VERSION             1
+#define SCHM_GPT_SW_MINOR_VERSION             0
+#define SCHM_GPT_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_gpt(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_03(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_04(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_04(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_05(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_05(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_06(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_06(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_07(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_07(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_10(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_10(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_11(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_11(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_17(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_17(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_18(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_18(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_20(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_20(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_21(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_21(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_22(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_22(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_23(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_23(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_24(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_24(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_25(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_25(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_26(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_26(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_27(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_27(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_28(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_28(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_29(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_29(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_30(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_30(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_31(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_31(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_35(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_35(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_36(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_36(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_38(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_38(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_39(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_39(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_40(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_40(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_41(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_41(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_42(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_42(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_43(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_43(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_44(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_44(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_45(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_45(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_46(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_46(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_50(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_50(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_51(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_51(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_52(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_52(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_53(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_53(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_54(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_54(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_55(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_55(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_56(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_56(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_60(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_60(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_61(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_61(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_62(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_62(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_63(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_63(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_64(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_64(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_65(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_65(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_66(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_66(void);
+
+extern void SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_67(void);
+extern void SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_67(void);
+
+
+
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_GPT_H */

RTD/include/SchM_I2c.h

@@ -0,0 +1,133 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_I2C_H
+#define SCHM_I2C_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_I2C_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_I2C_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_I2C_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_I2C_SW_MAJOR_VERSION             1
+#define SCHM_I2C_SW_MINOR_VERSION             0
+#define SCHM_I2C_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_i2c(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_I2c_I2C_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_I2c_I2C_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_I2c_I2C_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_I2c_I2C_EXCLUSIVE_AREA_01(void);
+
+
+
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_I2C_H */

RTD/include/SchM_Icu.h

@@ -0,0 +1,256 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_ICU_H
+#define SCHM_ICU_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_ICU_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_ICU_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_ICU_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_ICU_SW_MAJOR_VERSION             1
+#define SCHM_ICU_SW_MINOR_VERSION             0
+#define SCHM_ICU_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_icu(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_03(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_04(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_04(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_05(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_05(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_06(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_06(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_07(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_07(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_08(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_08(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_09(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_09(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_11(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_11(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_15(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_15(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_16(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_16(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_17(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_17(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_18(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_18(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_19(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_19(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_20(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_20(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_21(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_21(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_22(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_22(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_23(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_23(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_24(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_24(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_25(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_25(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_26(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_26(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_27(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_27(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_28(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_28(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_29(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_29(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_30(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_30(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_31(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_31(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_32(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_32(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_33(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_33(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_44(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_44(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_45(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_45(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_46(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_46(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_47(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_47(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_48(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_48(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_49(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_49(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_50(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_50(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_51(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_51(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_52(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_52(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_53(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_53(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_57(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_57(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_58(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_58(void);
+
+extern void SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_59(void);
+extern void SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_59(void);
+
+
+
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_ICU_H */

RTD/include/SchM_Lin.h

@@ -0,0 +1,202 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_LIN_H
+#define SCHM_LIN_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_LIN_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_LIN_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_LIN_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_LIN_SW_MAJOR_VERSION             1
+#define SCHM_LIN_SW_MINOR_VERSION             0
+#define SCHM_LIN_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_lin(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_03(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_04(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_04(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_05(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_05(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_06(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_06(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_07(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_07(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_08(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_08(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_09(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_09(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_10(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_10(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_11(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_11(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_12(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_12(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_13(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_13(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_14(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_14(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_15(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_15(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_16(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_16(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_17(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_17(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_18(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_18(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_19(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_19(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_20(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_20(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_21(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_21(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_22(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_22(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_23(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_23(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_24(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_24(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_25(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_25(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_26(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_26(void);
+
+extern void SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_27(void);
+extern void SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_27(void);
+
+
+
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_LIN_H */

RTD/include/SchM_Ocu.h

@@ -0,0 +1,184 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_OCU_H
+#define SCHM_OCU_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_OCU_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_OCU_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_OCU_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_OCU_SW_MAJOR_VERSION             1
+#define SCHM_OCU_SW_MINOR_VERSION             0
+#define SCHM_OCU_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_ocu(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_03(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_04(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_04(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_05(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_05(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_06(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_06(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_07(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_07(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_10(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_10(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_11(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_11(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_12(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_12(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_13(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_13(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_14(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_14(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_15(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_15(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_16(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_16(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_20(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_20(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_21(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_21(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_22(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_22(void);
+
+extern void SchM_Enter_Ocu_OCU_EXCLUSIVE_AREA_23(void);
+extern void SchM_Exit_Ocu_OCU_EXCLUSIVE_AREA_23(void);
+
+
+
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_OCU_H */

RTD/include/SchM_Pwm.h

@@ -0,0 +1,232 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_PWM_H
+#define SCHM_PWM_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_PWM_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_PWM_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_PWM_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_PWM_SW_MAJOR_VERSION             1
+#define SCHM_PWM_SW_MINOR_VERSION             0
+#define SCHM_PWM_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_pwm(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_03(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_04(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_04(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_05(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_05(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_06(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_06(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_07(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_07(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_08(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_08(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_09(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_09(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_10(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_10(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_11(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_11(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_12(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_12(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_13(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_13(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_14(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_14(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_15(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_15(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_16(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_16(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_17(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_17(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_18(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_18(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_19(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_19(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_20(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_20(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_21(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_21(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_22(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_22(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_23(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_23(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_25(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_25(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_26(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_26(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_27(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_27(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_28(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_28(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_29(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_29(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_30(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_30(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_31(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_31(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_32(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_32(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_33(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_33(void);
+
+extern void SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_34(void);
+extern void SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_34(void);
+
+
+
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_PWM_H */

RTD/include/SchM_Qdec.h

@@ -0,0 +1,151 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_QDEC_H
+#define SCHM_QDEC_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_QDEC_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_QDEC_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_QDEC_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_QDEC_SW_MAJOR_VERSION             1
+#define SCHM_QDEC_SW_MINOR_VERSION             0
+#define SCHM_QDEC_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_qdec(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Qdec_QDEC_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Qdec_QDEC_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Qdec_QDEC_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Qdec_QDEC_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Qdec_QDEC_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Qdec_QDEC_EXCLUSIVE_AREA_03(void);
+
+extern void SchM_Enter_Qdec_QDEC_EXCLUSIVE_AREA_04(void);
+extern void SchM_Exit_Qdec_QDEC_EXCLUSIVE_AREA_04(void);
+
+extern void SchM_Enter_Qdec_QDEC_EXCLUSIVE_AREA_05(void);
+extern void SchM_Exit_Qdec_QDEC_EXCLUSIVE_AREA_05(void);
+
+extern void SchM_Enter_Qdec_QDEC_EXCLUSIVE_AREA_06(void);
+extern void SchM_Exit_Qdec_QDEC_EXCLUSIVE_AREA_06(void);
+
+extern void SchM_Enter_Qdec_QDEC_EXCLUSIVE_AREA_07(void);
+extern void SchM_Exit_Qdec_QDEC_EXCLUSIVE_AREA_07(void);
+
+extern void SchM_Enter_Qdec_QDEC_EXCLUSIVE_AREA_08(void);
+extern void SchM_Exit_Qdec_QDEC_EXCLUSIVE_AREA_08(void);
+
+
+
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_QDEC_H */

RTD/include/SchM_Rm.h

@@ -0,0 +1,164 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_RM_H
+#define SCHM_RM_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_RM_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_RM_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_RM_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_RM_SW_MAJOR_VERSION             1
+#define SCHM_RM_SW_MINOR_VERSION             0
+#define SCHM_RM_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+/* Number of cores id */
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_rm(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_03(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_04(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_04(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_05(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_05(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_06(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_06(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_07(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_07(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_08(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_08(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_09(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_09(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_10(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_10(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_11(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_11(void);
+
+extern void SchM_Enter_Rm_RM_EXCLUSIVE_AREA_12(void);
+extern void SchM_Exit_Rm_RM_EXCLUSIVE_AREA_12(void);
+
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_RM_H */

RTD/include/SchM_Wdg.h

@@ -0,0 +1,163 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : 
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef SCHM_WDG_H
+#define SCHM_WDG_H
+
+/**
+*   @file
+*
+*   @addtogroup RTE_MODULE
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define SCHM_WDG_AR_RELEASE_MAJOR_VERSION     4
+#define SCHM_WDG_AR_RELEASE_MINOR_VERSION     4
+#define SCHM_WDG_AR_RELEASE_REVISION_VERSION  0
+#define SCHM_WDG_SW_MAJOR_VERSION             1
+#define SCHM_WDG_SW_MINOR_VERSION             0
+#define SCHM_WDG_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+#define NUMBER_OF_CORES         (uint8)(1U)
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+#define RTE_START_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef MCAL_TESTING_ENVIRONMENT
+/** 
+@brief   This function checks that all entered exclusive areas were also exited. 
+@details This function checks that all entered exclusive areas were also exited. The check
+         is done by verifying that all reentry_guard_* static variables are back to the
+         zero value.
+    
+@param[in]     void       No input parameters
+@return        void       This function does not return a value. Test asserts are used instead. 
+
+@pre  None
+@post None
+
+@remarks Covers 
+@remarks Implements 
+*/
+void SchM_Check_wdg(void);
+#endif /*MCAL_TESTING_ENVIRONMENT*/
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_00(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_01(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_01(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_02(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_02(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_03(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_03(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_04(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_04(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_05(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_05(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_06(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_06(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_07(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_07(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_08(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_08(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_09(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_09(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_10(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_10(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_11(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_11(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_12(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_12(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_13(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_13(void);
+
+extern void SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_14(void);
+extern void SchM_Exit_Wdg_WDG_EXCLUSIVE_AREA_14(void);
+
+
+
+
+#define RTE_STOP_SEC_CODE
+#include "Rte_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* SCHM_WDG_H */

RTD/include/WdgIf.h

@@ -0,0 +1,182 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : generic
+*   Dependencies         : 
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef WDGIF_H
+#define WDGIF_H
+
+/**
+*   @file WdgIf.h
+*
+*   @addtogroup  WdgIf
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "StandardTypes.h"
+#include "WdgIf_Cfg.h"
+#include "WdgIf_Types.h"
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define WDGIF_VENDOR_ID                    43
+#define WDGIF_MODULE_ID                    43
+#define WDGIF_AR_RELEASE_MAJOR_VERSION     4
+#define WDGIF_AR_RELEASE_MINOR_VERSION     4
+#define WDGIF_AR_RELEASE_REVISION_VERSION  0
+#define WDGIF_SW_MAJOR_VERSION             1
+#define WDGIF_SW_MINOR_VERSION             0
+#define WDGIF_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if current file and WdgIf_Cfg header file are of the same vendor */
+#if ((WDGIF_VENDOR_ID != WDGIF_VENDOR_ID_CFG) \
+    )
+    #error "WdgIf.h and WdgIf_Cfg.h have different vendor ids"
+#endif
+/* Check if current file and WDGIF configuration header file are of the same Autosar version */
+#if ((WDGIF_AR_RELEASE_MAJOR_VERSION    != WDGIF_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (WDGIF_AR_RELEASE_MINOR_VERSION    != WDGIF_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (WDGIF_AR_RELEASE_REVISION_VERSION != WDGIF_AR_RELEASE_REVISION_VERSION_CFG))
+    #error "AutoSar Version Numbers of WdgIf.h and WdgIf_Cfg.h are different"
+#endif
+/* Check if current file and WDGIF configuration header file are of the same software version */
+#if ((WDGIF_SW_MAJOR_VERSION != WDGIF_SW_MAJOR_VERSION_CFG) || \
+     (WDGIF_SW_MINOR_VERSION != WDGIF_SW_MINOR_VERSION_CFG) || \
+     (WDGIF_SW_PATCH_VERSION != WDGIF_SW_PATCH_VERSION_CFG))
+#error "Software Version Numbers of WdgIf.h and WdgIf_Cfg.h are different"
+#endif
+/* Check if current file and StandardTypes header file are of the same Autosar version */
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((WDGIF_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
+         (WDGIF_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of WdgIf.h and StandardTypes.h are different"
+    #endif
+#endif
+
+/* Check if current file and WdgIf_Types header file are of the same vendor.*/
+#if (WDGIF_VENDOR_ID != WDGIF_TYPES_VENDOR_ID)
+    #error "WdgIf.h and WdgIf_Types.h have different vendor ids"
+#endif
+/* Check if current file and WDGIF configuration header file are of the same Autosar version */
+#if ((WDGIF_AR_RELEASE_MAJOR_VERSION    != WDGIF_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (WDGIF_AR_RELEASE_MINOR_VERSION    != WDGIF_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (WDGIF_AR_RELEASE_REVISION_VERSION != WDGIF_TYPES_AR_RELEASE_REVISION_VERSION))
+    #error "AutoSar Version Numbers of WdgIf.h and WdgIf_Types.h are different"
+#endif
+/* Check if current file and WDGIF configuration header file are of the same software version */
+#if ((WDGIF_SW_MAJOR_VERSION != WDGIF_TYPES_SW_MAJOR_VERSION) || \
+     (WDGIF_SW_MINOR_VERSION != WDGIF_TYPES_SW_MINOR_VERSION) || \
+     (WDGIF_SW_PATCH_VERSION != WDGIF_TYPES_SW_PATCH_VERSION))
+#error "Software Version Numbers of WdgIf.h and WdgIf_Types.h are different"
+#endif
+/*==================================================================================================
+*                                           CONSTANTS
+==================================================================================================*/
+
+extern const WdgIf_SetModeFctPtrType WdgIf_SetModeFctPtr[];
+
+#if (WDG_DIRECT_SERVICE == STD_OFF)
+extern const WdgIf_SetTriggerFctPtrType WdgIf_SetTriggerConditionFctPtr[];
+#endif
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+/**
+*   @brief  This define indicates the error detectable by the Watchdog Driver Interface
+*/
+#define WDGIF_E_PARAM_DEVICE    (uint8)0x01
+
+/**
+*    @brief  Service id for the setmode function
+*/
+#define WDGIF_SETMODE_ID   (uint8)0x01
+
+/**
+*   @brief  Service id for the trigger function
+*/
+#define WDGIF_TRIGGER_ID   (uint8)0x02
+
+/**
+*   @brief  Define the setmode function
+*/
+#define WdgIf_SetMode(DeviceIndex, WdgMode)    WdgIf_SetModeFctPtr[DeviceIndex](WdgMode)
+
+/**
+*   @brief  Define the setmode function
+*/
+#define WdgIf_SetTriggerCondition(DeviceIndex, Timeout) WdgIf_SetTriggerConditionFctPtr[DeviceIndex](Timeout)
+
+#if (WDGIF_VERSION_INFO_API==STD_ON)
+
+/**
+*   @brief  Service id for the trigger function
+*/
+#define WDGIF_VERSION_ID   (uint8)0x03
+
+/**
+*   @brief  WdgIf_GetVersionInfo function
+*/
+#define WdgIf_GetVersionInfo(versioninfo) { (versioninfo)->vendorID = WDGIF_VENDOR_ID; \
+                                            (versioninfo)->moduleID = WDGIF_MODULE_ID; \
+                                            (versioninfo)->sw_major_version = WDGIF_SW_MAJOR_VERSION; \
+                                            (versioninfo)->sw_minor_version = WDGIF_SW_MINOR_VERSION; \
+                                            (versioninfo)->sw_patch_version = WDGIF_SW_PATCH_VERSION; \
+                                          }
+#endif /* WDGIF_VERSION_INFO_API==STD_ON */
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* WDGIF_H */

RTD/include/WdgIf_Cfg.h

@@ -0,0 +1,126 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : generic
+*   Dependencies         : 
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef WDGIF_CFG_H
+#define WDGIF_CFG_H
+
+/**
+*   @file WdgIf_Cfg.h
+*
+*   @addtogroup  WdgIf
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "modules.h"
+
+#if (USE_WDG_MODULE == STD_ON)
+#include "Wdg_Cfg.h"
+#endif
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define WDGIF_VENDOR_ID_CFG                   43
+#define WDGIF_MODULE_ID_CFG                   43
+#define WDGIF_AR_RELEASE_MAJOR_VERSION_CFG    4
+#define WDGIF_AR_RELEASE_MINOR_VERSION_CFG    4
+#define WDGIF_AR_RELEASE_REVISION_VERSION_CFG 0
+#define WDGIF_SW_MAJOR_VERSION_CFG            1
+#define WDGIF_SW_MINOR_VERSION_CFG            0
+#define WDGIF_SW_PATCH_VERSION_CFG            0
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+#if (USE_WDG_MODULE == STD_ON)
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+     /* Check if source file and Wdg instance4 header file are of the same Autosar version */
+     #if (( WDGIF_AR_RELEASE_MAJOR_VERSION_CFG != WDG_AR_RELEASE_MAJOR_VERSION_CFG) || \
+          ( WDGIF_AR_RELEASE_MINOR_VERSION_CFG != WDG_AR_RELEASE_MINOR_VERSION_CFG))
+         #error "AutoSar Version Numbers of WdgIf_Cfg.h and Wdg_Cfg.h are different"
+     #endif
+#endif
+#endif
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+/**
+*   @brief  Compile switch to enable/disable development error detection for this module
+*/
+#define WDGIF_DEV_ERROR_DETECT   (STD_ON)
+
+#if (USE_WDG_MODULE == STD_ON)
+/**
+*   @brief  Constant specifying the number of controlled watchdog drivers
+*/
+#define WDGIF_NUMBER_OF_DEVICES   WDG_NO_OF_INSTANCES
+#endif
+
+/**
+*   @brief  Compile switch to enable/disable the version information
+*/
+#define WDGIF_VERSION_INFO_API   (STD_ON)
+
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /*WDGIF_CFG_H*/

RTD/include/WdgIf_Types.h

@@ -0,0 +1,121 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : generic
+*   Dependencies         : 
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef WDGIF_TYPES_H
+#define WDGIF_TYPES_H
+
+/**
+*   @file WdgIf_Types.h
+*
+*   @addtogroup  WdgIf
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "StandardTypes.h"
+
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define WDGIF_TYPES_VENDOR_ID                    43
+#define WDGIF_TYPES_MODULE_ID                    43
+#define WDGIF_TYPES_AR_RELEASE_MAJOR_VERSION     4
+#define WDGIF_TYPES_AR_RELEASE_MINOR_VERSION     4
+#define WDGIF_TYPES_AR_RELEASE_REVISION_VERSION  0
+#define WDGIF_TYPES_SW_MAJOR_VERSION             1
+#define WDGIF_TYPES_SW_MINOR_VERSION             0
+#define WDGIF_TYPES_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if source file and WDGIF_TYPES configuration header file are of the same Autosar version */
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((WDGIF_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
+         (WDGIF_TYPES_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of WdgIf.h and StandardTypes.h are different"
+    #endif
+#endif
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/**
+*   @brief  This enumerated type will contain the watchdog driver's possible states
+*/
+typedef enum
+{
+    WDGIF_UNINIT         = 0x01U,  /**< @brief = 0x01 The watchdog driver is not uninitialized.  This shall be the default value after reset */
+    WDGIF_IDLE           = 0x02U,  /**< @brief = 0x02 The watchdog driver is currently idle, i.e not beeing triggered or mode changed */
+    WDGIF_BUSY           = 0x03U   /**< @brief = 0x03 The watchdog driver is currently busy, i.e triggered or switchd between modes */
+}WdgIf_StatusType;
+
+/**
+*   @brief  This enumerated type will contain the watchdog driver's possible modes
+*/
+typedef enum {
+    WDGIF_OFF_MODE      = 0x00U,  /**< @brief  = 0x00 In this mode, the watchdog driver is disabled (switched off). */
+    WDGIF_SLOW_MODE     = 0x01U,  /**< @brief  = 0x01 In this mode, the watchdog driver is set up for a long timeout period (slow triggering).*/
+    WDGIF_FAST_MODE     = 0x02U   /**< @brief  = 0x02 In this mode, the watchdog driver is set up for a short timeout period (fast triggering).*/
+} WdgIf_ModeType;
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+typedef Std_ReturnType (*WdgIf_SetModeFctPtrType)(WdgIf_ModeType);
+typedef void (*WdgIf_SetTriggerFctPtrType)(uint16);
+/*==================================================================================================
+*                                 GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                     FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /*WDGIF_TYPES_H*/

RTD/include/Wdg_43_Instance0.h

@@ -0,0 +1,273 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef Wdg_43_Instance0_H
+#define Wdg_43_Instance0_H
+
+/**
+*   @file
+*
+*   @addtogroup  Wdg
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Wdg_ChannelTypes.h"
+#include "Mcal.h"
+#include "Wdg_Cfg.h"
+
+#ifdef WDG_INSTANCE0
+#if (WDG_INSTANCE0 == STD_ON)
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define WDG_43_INSTANCE0_VENDOR_ID                    43
+#define WDG_43_INSTANCE0_MODULE_ID                    102
+#define WDG_43_INSTANCE0_AR_RELEASE_MAJOR_VERSION     4
+#define WDG_43_INSTANCE0_AR_RELEASE_MINOR_VERSION     4
+#define WDG_43_INSTANCE0_AR_RELEASE_REVISION_VERSION 0
+#define WDG_43_INSTANCE0_SW_MAJOR_VERSION                         1
+#define WDG_43_INSTANCE0_SW_MINOR_VERSION                         0
+#define WDG_43_INSTANCE0_SW_PATCH_VERSION                         0
+
+/*==================================================================================================
+                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+/* Check if current file and WDG configuration header file are of the same vendor */
+#if (WDG_43_INSTANCE0_VENDOR_ID != WDG_VENDOR_ID_CFG)
+    #error "Wdg.h and Wdg_Cfg.h have different vendor ids"
+#endif
+
+/* Check if current file and Wdg_Cfg header file are of the same Autosar version */
+#if ((WDG_43_INSTANCE0_AR_RELEASE_MAJOR_VERSION    != WDG_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (WDG_43_INSTANCE0_AR_RELEASE_MINOR_VERSION    != WDG_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (WDG_43_INSTANCE0_AR_RELEASE_REVISION_VERSION != WDG_AR_RELEASE_REVISION_VERSION_CFG))
+#error "AutoSar Version Numbers of Wdg.h and Wdg_Cfg.h are different"
+#endif
+
+/* Check if current file and Wdg_Cfg header file are of the same software version */
+#if ((WDG_43_INSTANCE0_SW_MAJOR_VERSION != WDG_SW_MAJOR_VERSION_CFG) || \
+     (WDG_43_INSTANCE0_SW_MINOR_VERSION != WDG_SW_MINOR_VERSION_CFG) || \
+     (WDG_43_INSTANCE0_SW_PATCH_VERSION != WDG_SW_PATCH_VERSION_CFG))
+#error "Software Version Numbers of Wdg.h and Wdg_Cfg.h are different"
+#endif
+
+/* Check if current file and Wdg_ChannelTypes header file are of the same vendor */
+#if (WDG_43_INSTANCE0_VENDOR_ID != WDG_CHANNEL_TYPES_VENDOR_ID)
+    #error "Wdg.h and Wdg_ChannelTypes.h have different vendor ids"
+#endif
+
+#if ((WDG_43_INSTANCE0_AR_RELEASE_MAJOR_VERSION    != WDG_CHANNEL_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (WDG_43_INSTANCE0_AR_RELEASE_MINOR_VERSION    != WDG_CHANNEL_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (WDG_43_INSTANCE0_AR_RELEASE_REVISION_VERSION != WDG_CHANNEL_TYPES_AR_RELEASE_REVISION_VERSION))
+    #error "AutoSar Version Numbers of Wdg.h and Wdg_ChannelTypes.h are different"
+#endif
+
+/* Check if current file and Wdg_Cfg header file are of the same software version */
+#if ((WDG_43_INSTANCE0_SW_MAJOR_VERSION != WDG_CHANNEL_TYPES_SW_MAJOR_VERSION) || \
+     (WDG_43_INSTANCE0_SW_MINOR_VERSION != WDG_CHANNEL_TYPES_SW_MINOR_VERSION) || \
+     (WDG_43_INSTANCE0_SW_PATCH_VERSION != WDG_CHANNEL_TYPES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Wdg.h and Wdg_ChannelTypes.h are different"
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and Mcal header file are of the same version */
+    #if ((WDG_43_INSTANCE0_AR_RELEASE_MAJOR_VERSION != MCAL_AR_RELEASE_MAJOR_VERSION) || \
+        (WDG_43_INSTANCE0_AR_RELEASE_MINOR_VERSION != MCAL_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Wdg.h and Mcal.h are different"
+    #endif
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
+
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+#define WDG_START_SEC_CONFIG_DATA_UNSPECIFIED
+
+#include "Wdg_MemMap.h"
+
+WDG_43_INSTANCE0_CONFIG_EXT
+
+#define WDG_STOP_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Wdg_MemMap.h"
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_START_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_START_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+
+/**
+* @brief   This function initializes the WDG module.
+* @details The @p Wdg_43_Instance0_Init function shall initialize the Wdg module and the
+*          watchdog hardware, i.e. it shall set the default watchdog mode and
+*          timeout period as provided in the configuration set.
+*
+* @param[in] ConfigPtr     Pointer to configuration set.
+*
+* 
+*
+* @api
+*/
+void Wdg_43_Instance0_Init(const Wdg_ConfigType *ConfigPtr);
+
+
+/**
+* @brief   Switches the watchdog into the mode Mode.
+* @details By choosing one of a limited number of statically configured
+*          settings (e.g. toggle or window watchdog, different timeout periods)
+*          the Wdg module and the watchdog hardware can be switched between the
+*          following three different watchdog modes using the @p  Wdg_43_Instance0_SetMode
+*          function:<br>
+*          - WDGIF_OFF_MODE,
+*          - WDGIF_SLOW_MODE,
+*          - WDGIF_FAST_MODE.
+*          .
+*
+* @param[in] Mode      One of the following statically configured modes:<br>
+*                      -# WDGIF_OFF_MODE,
+*                      -# WDGIF_SLOW_MODE,
+*                      -# WDGIF_FAST_MODE.
+*                      .
+*
+* @return              Std_ReturnType.
+* @retval  E_OK        Mode switch executed completely and successfully.
+* @retval  E_NOT_OK    The mode switch encountered errors.
+*
+* 
+*
+* @api
+*/
+Std_ReturnType Wdg_43_Instance0_SetMode(WdgIf_ModeType Mode);
+
+#if (WDG_DIRECT_SERVICE == STD_OFF)
+/**
+ * @brief   Reset the watchdog timeout counter according to the timeout value passed.
+ * @details
+ *
+ * @param[in] timeout   Timeout value (milliseconds) for setting the trigger counter.
+ *   
+ *
+ * @api
+ */
+void Wdg_43_Instance0_SetTriggerCondition(uint16 timeout);
+#endif
+
+#if (WDG_DIRECT_SERVICE_INSTANCE0 == STD_ON)
+    /**
+    * @brief   Service the Watchdog directly without using an external trigger.
+    * @details
+    *
+    * @param
+    *
+    * 
+    *
+    * @api
+    */
+    void Wdg_43_Instance0_Service(void);
+#endif
+
+#if (WDG_43_INSTANCE0_VERSION_INFO_API == STD_ON)
+/**
+* @brief   Returns the version information of the module.
+* @details The Wdg_43_Instance0_ChannelGetVersionInfo function shall return the version
+*          information of this module. The version information includes:
+*          - Module Id,
+*          - Vendor Id,
+*          - Vendor specific version numbers.
+*          .
+*
+* @pre    This function is only required if the WDG_VERSION_INFO_API has to be
+*         equal STD_ON.
+*
+* @param[in,out] versioninfo   Pointer to where to store the version
+*                              information of this module.
+*
+* @api
+*
+* @implements     Wdg_InstanceNo_GetVersionInfo_Activity
+*
+*/
+void Wdg_43_Instance0_GetVersionInfo(Std_VersionInfoType *versioninfo);
+
+#endif /* WDG_VERSION_INFO_API == STD_ON */
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_STOP_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_STOP_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+
+#endif /*#if (WDG_INSTANCE0 == STD_ON)*/
+#endif
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* Wdg_43_Instance0_H*/

RTD/include/Wdg_43_Instance1.h

@@ -0,0 +1,273 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef Wdg_43_Instance1_H
+#define Wdg_43_Instance1_H
+
+/**
+*   @file
+*
+*   @addtogroup  Wdg
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Wdg_ChannelTypes.h"
+#include "Mcal.h"
+#include "Wdg_Cfg.h"
+
+#ifdef WDG_INSTANCE1
+#if (WDG_INSTANCE1 == STD_ON)
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define WDG_43_INSTANCE1_VENDOR_ID                    43
+#define WDG_43_INSTANCE1_MODULE_ID                    102
+#define WDG_43_INSTANCE1_AR_RELEASE_MAJOR_VERSION     4
+#define WDG_43_INSTANCE1_AR_RELEASE_MINOR_VERSION     4
+#define WDG_43_INSTANCE1_AR_RELEASE_REVISION_VERSION 0
+#define WDG_43_INSTANCE1_SW_MAJOR_VERSION                         1
+#define WDG_43_INSTANCE1_SW_MINOR_VERSION                         0
+#define WDG_43_INSTANCE1_SW_PATCH_VERSION                         0
+
+/*==================================================================================================
+                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+/* Check if current file and WDG configuration header file are of the same vendor */
+#if (WDG_43_INSTANCE1_VENDOR_ID != WDG_VENDOR_ID_CFG)
+    #error "Wdg.h and Wdg_Cfg.h have different vendor ids"
+#endif
+
+/* Check if current file and Wdg_Cfg header file are of the same Autosar version */
+#if ((WDG_43_INSTANCE1_AR_RELEASE_MAJOR_VERSION    != WDG_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (WDG_43_INSTANCE1_AR_RELEASE_MINOR_VERSION    != WDG_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (WDG_43_INSTANCE1_AR_RELEASE_REVISION_VERSION != WDG_AR_RELEASE_REVISION_VERSION_CFG))
+#error "AutoSar Version Numbers of Wdg.h and Wdg_Cfg.h are different"
+#endif
+
+/* Check if current file and Wdg_Cfg header file are of the same software version */
+#if ((WDG_43_INSTANCE1_SW_MAJOR_VERSION != WDG_SW_MAJOR_VERSION_CFG) || \
+     (WDG_43_INSTANCE1_SW_MINOR_VERSION != WDG_SW_MINOR_VERSION_CFG) || \
+     (WDG_43_INSTANCE1_SW_PATCH_VERSION != WDG_SW_PATCH_VERSION_CFG))
+#error "Software Version Numbers of Wdg.h and Wdg_Cfg.h are different"
+#endif
+
+/* Check if current file and Wdg_ChannelTypes header file are of the same vendor */
+#if (WDG_43_INSTANCE1_VENDOR_ID != WDG_CHANNEL_TYPES_VENDOR_ID)
+    #error "Wdg.h and Wdg_ChannelTypes.h have different vendor ids"
+#endif
+
+#if ((WDG_43_INSTANCE1_AR_RELEASE_MAJOR_VERSION    != WDG_CHANNEL_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (WDG_43_INSTANCE1_AR_RELEASE_MINOR_VERSION    != WDG_CHANNEL_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (WDG_43_INSTANCE1_AR_RELEASE_REVISION_VERSION != WDG_CHANNEL_TYPES_AR_RELEASE_REVISION_VERSION))
+    #error "AutoSar Version Numbers of Wdg.h and Wdg_ChannelTypes.h are different"
+#endif
+
+/* Check if current file and Wdg_Cfg header file are of the same software version */
+#if ((WDG_43_INSTANCE1_SW_MAJOR_VERSION != WDG_CHANNEL_TYPES_SW_MAJOR_VERSION) || \
+     (WDG_43_INSTANCE1_SW_MINOR_VERSION != WDG_CHANNEL_TYPES_SW_MINOR_VERSION) || \
+     (WDG_43_INSTANCE1_SW_PATCH_VERSION != WDG_CHANNEL_TYPES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Wdg.h and Wdg_ChannelTypes.h are different"
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and Mcal header file are of the same version */
+    #if ((WDG_43_INSTANCE1_AR_RELEASE_MAJOR_VERSION != MCAL_AR_RELEASE_MAJOR_VERSION) || \
+        (WDG_43_INSTANCE1_AR_RELEASE_MINOR_VERSION != MCAL_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Wdg.h and Mcal.h are different"
+    #endif
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
+
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+#define WDG_START_SEC_CONFIG_DATA_UNSPECIFIED
+
+#include "Wdg_MemMap.h"
+
+WDG_43_INSTANCE1_CONFIG_EXT
+
+#define WDG_STOP_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Wdg_MemMap.h"
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_START_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_START_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+
+/**
+* @brief   This function initializes the WDG module.
+* @details The @p Wdg_43_Instance1_Init function shall initialize the Wdg module and the
+*          watchdog hardware, i.e. it shall set the default watchdog mode and
+*          timeout period as provided in the configuration set.
+*
+* @param[in] ConfigPtr     Pointer to configuration set.
+*
+* 
+*
+* @api
+*/
+void Wdg_43_Instance1_Init(const Wdg_ConfigType *ConfigPtr);
+
+
+/**
+* @brief   Switches the watchdog into the mode Mode.
+* @details By choosing one of a limited number of statically configured
+*          settings (e.g. toggle or window watchdog, different timeout periods)
+*          the Wdg module and the watchdog hardware can be switched between the
+*          following three different watchdog modes using the @p  Wdg_43_Instance1_SetMode
+*          function:<br>
+*          - WDGIF_OFF_MODE,
+*          - WDGIF_SLOW_MODE,
+*          - WDGIF_FAST_MODE.
+*          .
+*
+* @param[in] Mode      One of the following statically configured modes:<br>
+*                      -# WDGIF_OFF_MODE,
+*                      -# WDGIF_SLOW_MODE,
+*                      -# WDGIF_FAST_MODE.
+*                      .
+*
+* @return              Std_ReturnType.
+* @retval  E_OK        Mode switch executed completely and successfully.
+* @retval  E_NOT_OK    The mode switch encountered errors.
+*
+* 
+*
+* @api
+*/
+Std_ReturnType Wdg_43_Instance1_SetMode(WdgIf_ModeType Mode);
+
+#if (WDG_DIRECT_SERVICE == STD_OFF)
+/**
+ * @brief   Reset the watchdog timeout counter according to the timeout value passed.
+ * @details
+ *
+ * @param[in] timeout   Timeout value (milliseconds) for setting the trigger counter.
+ *   
+ *
+ * @api
+ */
+void Wdg_43_Instance1_SetTriggerCondition(uint16 timeout);
+#endif
+
+#if (WDG_DIRECT_SERVICE_INSTANCE1 == STD_ON)
+    /**
+    * @brief   Service the Watchdog directly without using an external trigger.
+    * @details
+    *
+    * @param
+    *
+    * 
+    *
+    * @api
+    */
+    void Wdg_43_Instance1_Service(void);
+#endif
+
+#if (WDG_43_INSTANCE1_VERSION_INFO_API == STD_ON)
+/**
+* @brief   Returns the version information of the module.
+* @details The Wdg_43_Instance1_ChannelGetVersionInfo function shall return the version
+*          information of this module. The version information includes:
+*          - Module Id,
+*          - Vendor Id,
+*          - Vendor specific version numbers.
+*          .
+*
+* @pre    This function is only required if the WDG_VERSION_INFO_API has to be
+*         equal STD_ON.
+*
+* @param[in,out] versioninfo   Pointer to where to store the version
+*                              information of this module.
+*
+* @api
+*
+* @implements     Wdg_InstanceNo_GetVersionInfo_Activity
+*
+*/
+void Wdg_43_Instance1_GetVersionInfo(Std_VersionInfoType *versioninfo);
+
+#endif /* WDG_VERSION_INFO_API == STD_ON */
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_STOP_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_STOP_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+
+#endif /*#if (WDG_INSTANCE1 == STD_ON)*/
+#endif
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* Wdg_43_Instance1_H*/

RTD/include/Wdg_Channel.h

@@ -0,0 +1,330 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef WDG_CHANNEL_H
+#define WDG_CHANNEL_H
+
+/**
+*   @file
+*
+*   @addtogroup  Wdg
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Mcal.h"
+#include "Wdg_ChannelTypes.h"
+#include "Wdg_Cfg.h"
+
+#if (WDG_DIRECT_SERVICE == STD_OFF)
+    #include "Gpt.h"
+#endif
+
+#include "Wdg_Ipw_Types.h"
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define WDG_CHANNEL_VENDOR_ID                    43
+#define WDG_CHANNEL_MODULE_ID                    102
+#define WDG_CHANNEL_AR_RELEASE_MAJOR_VERSION     4
+#define WDG_CHANNEL_AR_RELEASE_MINOR_VERSION     4
+
+#define WDG_CHANNEL_AR_RELEASE_REVISION_VERSION  0
+#define WDG_CHANNEL_SW_MAJOR_VERSION             1
+#define WDG_CHANNEL_SW_MINOR_VERSION             0
+#define WDG_CHANNEL_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+                                      FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if current file and WDG configuration header file are of the same vendor */
+#if (WDG_CHANNEL_VENDOR_ID != WDG_VENDOR_ID_CFG)
+#error "Wdg_Channel.h and Wdg_Cfg.h have different vendor ids"
+#endif
+
+/* Check if current file and Wdg_Cfg header file are of the same Autosar version */
+#if ((WDG_CHANNEL_AR_RELEASE_MAJOR_VERSION     != WDG_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (WDG_CHANNEL_AR_RELEASE_MINOR_VERSION     != WDG_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (WDG_CHANNEL_AR_RELEASE_REVISION_VERSION  != WDG_AR_RELEASE_REVISION_VERSION_CFG))
+#error "AutoSar Version Numbers of Wdg_Channel.h and Wdg_Cfg.h are different"
+#endif
+
+/* Check if current file and Wdg_Cfg header file are of the same software version */
+#if ((WDG_CHANNEL_SW_MAJOR_VERSION != WDG_SW_MAJOR_VERSION_CFG) || \
+     (WDG_CHANNEL_SW_MINOR_VERSION != WDG_SW_MINOR_VERSION_CFG) || \
+     (WDG_CHANNEL_SW_PATCH_VERSION != WDG_SW_PATCH_VERSION_CFG))
+#error "Software Version Numbers of Wdg_Channel.h and Wdg_Cfg.h are different"
+#endif
+
+/* Check if current file and Wdg_ChannelTypes header file are of the same vendor */
+#if (WDG_CHANNEL_VENDOR_ID != WDG_CHANNEL_TYPES_VENDOR_ID)
+#error "Wdg_Channel.h and Wdg_ChannelTypes.h have different vendor ids"
+#endif
+
+#if ((WDG_CHANNEL_AR_RELEASE_MAJOR_VERSION     != WDG_CHANNEL_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (WDG_CHANNEL_AR_RELEASE_MINOR_VERSION     != WDG_CHANNEL_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (WDG_CHANNEL_AR_RELEASE_REVISION_VERSION  != WDG_CHANNEL_TYPES_AR_RELEASE_REVISION_VERSION))
+    #error "AutoSar Version Numbers of Wdg_Channel.h and Wdg_ChannelTypes.h are different"
+#endif
+
+#if ((WDG_CHANNEL_SW_MAJOR_VERSION != WDG_CHANNEL_TYPES_SW_MAJOR_VERSION) || \
+     (WDG_CHANNEL_SW_MINOR_VERSION != WDG_CHANNEL_TYPES_SW_MINOR_VERSION) || \
+     (WDG_CHANNEL_SW_PATCH_VERSION != WDG_CHANNEL_TYPES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Wdg_Channel.h and Wdg_ChannelTypes.h are different"
+#endif
+
+
+/* Check if current file and Wdg_Ipw_Types header file are of the same vendor */
+#if (WDG_CHANNEL_VENDOR_ID != WDG_IPW_TYPES_VENDOR_ID)
+#error "Wdg_Channel.h and Wdg_Ipw_Types.h have different vendor ids"
+#endif
+
+#if ((WDG_CHANNEL_AR_RELEASE_MAJOR_VERSION     != WDG_IPW_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (WDG_CHANNEL_AR_RELEASE_MINOR_VERSION     != WDG_IPW_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (WDG_CHANNEL_AR_RELEASE_REVISION_VERSION  != WDG_IPW_TYPES_AR_RELEASE_REVISION_VERSION))
+    #error "AutoSar Version Numbers of Wdg_Channel.h and Wdg_Ipw_Types.h are different"
+#endif
+
+#if ((WDG_CHANNEL_SW_MAJOR_VERSION != WDG_IPW_TYPES_SW_MAJOR_VERSION) || \
+     (WDG_CHANNEL_SW_MINOR_VERSION != WDG_IPW_TYPES_SW_MINOR_VERSION) || \
+     (WDG_CHANNEL_SW_PATCH_VERSION != WDG_IPW_TYPES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Wdg_Channel.h and Wdg_Ipw_Types.h are different"
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and Mcal header file are of the same version */
+    #if ((WDG_CHANNEL_AR_RELEASE_MAJOR_VERSION != MCAL_AR_RELEASE_MAJOR_VERSION) || \
+        (WDG_CHANNEL_AR_RELEASE_MINOR_VERSION != MCAL_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Wdg_Channel.h and Mcal.h are different"
+    #endif
+
+    /* Check if source file and Gpt header file are of the same Autosar version */
+    #if (WDG_DIRECT_SERVICE == STD_OFF)
+        #if ((WDG_CHANNEL_AR_RELEASE_MAJOR_VERSION != GPT_AR_RELEASE_MAJOR_VERSION) || \
+            (WDG_CHANNEL_AR_RELEASE_MINOR_VERSION != GPT_AR_RELEASE_MINOR_VERSION))
+            #error "AutoSar Version Numbers of Wdg_Channel.h and Gpt.h are different"
+        #endif
+    #endif
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
+
+
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+#if (WDG_MULTICORE_ENABLED == STD_ON)
+    #define Wdg_GetCoreID() OsIf_GetCoreID()
+#endif /* (WDG_MULTICORE_ENABLED == STD_ON) */
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+#define WDG_START_SEC_CONFIG_DATA_UNSPECIFIED
+
+#include "Wdg_MemMap.h"
+
+#define WDG_STOP_SEC_CONFIG_DATA_UNSPECIFIED
+#include "Wdg_MemMap.h"
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_START_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_START_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+/**
+* @brief   This function initializes the WDG module.
+* @details The @p Wdg_Init function shall initialize the Wdg module and the
+*          watchdog hardware, i.e. it shall set the default watchdog mode and
+*          timeout period as provided in the configuration set.
+*
+* @param[in]   pConfigPtr     Pointer to configuration set.
+* @param[in]   Wdg_Instance  Harwdware instance.
+*
+* @return         void
+*
+* @implements      Wdg_ChannelInit_Activity
+*/
+void Wdg_ChannelInit(const Wdg_Ipw_InstanceType Wdg_Instance,
+                     const Wdg_ConfigType *pConfigPtr);
+
+/**
+* @brief   Switches the watchdog into the mode Mode.
+* @details By choosing one of a limited number of statically configured
+*          settings (e.g. toggle or window watchdog, different timeout periods)
+*          the Wdg module and the watchdog hardware can be switched between the
+*          following three different watchdog modes using the @p Wdg_SetMode
+*          function:<br>
+*          - WDGIF_OFF_MODE,
+*          - WDGIF_SLOW_MODE,
+*          - WDGIF_FAST_MODE.
+*          .
+*
+* @param[in] Mode      One of the following statically configured modes:<br>
+*                      -# WDGIF_OFF_MODE,
+*                      -# WDGIF_SLOW_MODE,
+*                      -# WDGIF_FAST_MODE.
+*
+* @param[in]   Wdg_Instance  Harwdware instance.
+*
+* @return              Std_ReturnType.
+* @retval  E_OK        Mode switch executed completely and successfully.
+* @retval  E_NOT_OK    The mode switch encountered errors.
+*
+* @implements      Wdg_ChannelSetMode_Activity
+*/
+Std_ReturnType Wdg_ChannelSetMode(const Wdg_Ipw_InstanceType Wdg_Instance,
+                                  WdgIf_ModeType Mode);
+
+#if (WDG_DIRECT_SERVICE == STD_OFF)
+/**
+* @brief   Reset the watchdog timeout counter according to the timeout value passed.
+* @details
+*
+* @param[in]   u16Timeout value (milliseconds) for setting the trigger counter.
+* @param[in]   Wdg_Instance  Harwdware instance.
+*
+* @implements      Wdg_ChannelSetTriggerCondition_Activity
+*/
+void Wdg_ChannelSetTriggerCondition(const Wdg_Ipw_InstanceType Wdg_Instance,
+                                    uint16 u16Timeout);
+#endif
+
+/*Returns the version information of the module.*/
+#if (WDG_VERSION_INFO_API == STD_ON)
+/**
+* @brief   Returns the version information of the module.
+* @details The  Wdg_ChannelGetVersionInfo function shall return the version
+*          information of this module. The version information includes:
+*          - Module Id,
+*          - Vendor Id,
+*          - Vendor specific version numbers.
+*          .
+*
+* @pre    This function is available if the WDG_VERSION_INFO_API must be
+*         equal STD_ON.
+*
+* @param[in,out] pVersioninfo   Pointer to where to store the version
+*                              information of this module.
+*
+*
+*
+* @implements      Wdg_ChannelGetVersionInfo_Activity
+*/
+void Wdg_ChannelGetVersionInfo(const Wdg_Ipw_InstanceType Wdg_Instance,
+                                Std_VersionInfoType *pVersioninfo);
+
+#endif /* WDG_VERSION_INFO_API == STD_ON */
+
+#if (WDG_DIRECT_SERVICE == STD_ON)
+    /**
+    * @brief   Perform a wdg channel service.
+    * @details 
+    *
+    * @pre    This this function is availble if the WDG_DIRECT_SERVICE must be
+    *         equal STD_ON.
+    * @param[in]   Wdg_Instance  Harwdware instance.
+    * 
+    * @implements      Wdg_ChannelService_Activity
+    *
+    * @return void
+    */
+    void Wdg_ChannelService(const Wdg_Ipw_InstanceType Wdg_Instance);
+#endif /* WDG_DIRECT_SERVICE == STD_ON */
+
+#if (WDG_DISABLE_ALLOWED == STD_ON)
+#if (WDG_CLEAR_RESET_REQUEST == STD_ON)
+    /**
+    * @brief   Clear a reset request occurring after Watchdog timeout is reached.
+    * @details 
+    *
+    * @pre    This this function is availble if the WDG_DISABLE_ALLOWED and WDG_CLEAR_RESET_REQUEST must be
+    *         equal STD_ON.
+    * @param[in]   Wdg_Instance  Harwdware instance.
+    * 
+    * @implements      Wdg_ChannelClearResetRequest_Activity
+    *
+    * @return void
+    * @retval  E_OK        Clear reset request successfully.
+    * @retval  E_NOT_OK    returned if watchdog instance unlocks sequence failed
+    *                      or it has not requested a reset.
+    *
+    */
+void Wdg_ChannelClearResetRequest(const Wdg_Ipw_InstanceType Wdg_Instance);
+#endif /* WDG_CLEAR_RESET_REQUEST == STD_ON */
+#endif /* WDG_DISABLE_ALLOWED == STD_ON */
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_STOP_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_STOP_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* WDG_CHANNEL_H */

RTD/include/Wdg_ChannelTypes.h

@@ -0,0 +1,251 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef WDG_CHANNEL_TYPES_H
+#define WDG_CHANNEL_TYPES_H
+
+/**
+*   @file
+*
+*   @addtogroup Wdg
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "StandardTypes.h"
+#include "Wdg_Cfg_Defines.h"
+#include "WdgIf_Types.h"
+#include "Wdg_Ipw_Types.h"
+
+#if (WDG_DIRECT_SERVICE == STD_OFF)
+    #include "Gpt.h"
+#endif
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define WDG_CHANNEL_TYPES_VENDOR_ID                    43
+#define WDG_CHANNEL_TYPES_AR_RELEASE_MAJOR_VERSION     4
+#define WDG_CHANNEL_TYPES_AR_RELEASE_MINOR_VERSION     4
+#define WDG_CHANNEL_TYPES_AR_RELEASE_REVISION_VERSION  0
+#define WDG_CHANNEL_TYPES_SW_MAJOR_VERSION             1
+#define WDG_CHANNEL_TYPES_SW_MINOR_VERSION             0
+#define WDG_CHANNEL_TYPES_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if current file and WDG configuration header file are of the same vendor */
+#if (WDG_CHANNEL_TYPES_VENDOR_ID != WDG_VENDOR_ID_CFG)
+#error "Wdg_ChannelType.h and Wdg_Cfg_Defines.h have different vendor ids"
+#endif
+
+/* Check if current file and Wdg_Cfg_Defines header file are of the same Autosar version */
+#if ((WDG_CHANNEL_TYPES_AR_RELEASE_MAJOR_VERSION     != WDG_AR_RELEASE_MAJOR_VERSION_CFG) || \
+     (WDG_CHANNEL_TYPES_AR_RELEASE_MINOR_VERSION     != WDG_AR_RELEASE_MINOR_VERSION_CFG) || \
+     (WDG_CHANNEL_TYPES_AR_RELEASE_REVISION_VERSION  != WDG_AR_RELEASE_REVISION_VERSION_CFG))
+#error "AutoSar Version Numbers of Wdg_ChannelType.h and Wdg_Cfg_Defines.h are different"
+#endif
+
+/* Check if current file and Wdg_Cfg_Defines header file are of the same software version */
+#if ((WDG_CHANNEL_TYPES_SW_MAJOR_VERSION != WDG_SW_MAJOR_VERSION_CFG) || \
+     (WDG_CHANNEL_TYPES_SW_MINOR_VERSION != WDG_SW_MINOR_VERSION_CFG) || \
+     (WDG_CHANNEL_TYPES_SW_PATCH_VERSION != WDG_SW_PATCH_VERSION_CFG))
+#error "Software Version Numbers of Wdg_ChannelType.h and Wdg_Cfg_Defines.h are different"
+#endif
+
+/* Check if current file and Wdg_Ipw_Types header file are of the same vendor */
+#if (WDG_CHANNEL_TYPES_VENDOR_ID != WDG_IPW_TYPES_VENDOR_ID)
+    #error "Wdg_ChannelType.h and Wdg_Ipw_Types.h have different vendor ids"
+#endif
+
+#if ((WDG_CHANNEL_TYPES_AR_RELEASE_MAJOR_VERSION     != WDG_IPW_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (WDG_CHANNEL_TYPES_AR_RELEASE_MINOR_VERSION     != WDG_IPW_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (WDG_CHANNEL_TYPES_AR_RELEASE_REVISION_VERSION  != WDG_IPW_TYPES_AR_RELEASE_REVISION_VERSION))
+    #error "AutoSar Version Numbers of Wdg_ChannelType.h and Wdg_Ipw_Types.h are different"
+#endif
+
+#if ((WDG_CHANNEL_TYPES_SW_MAJOR_VERSION != WDG_IPW_TYPES_SW_MAJOR_VERSION) || \
+     (WDG_CHANNEL_TYPES_SW_MINOR_VERSION != WDG_IPW_TYPES_SW_MINOR_VERSION) || \
+     (WDG_CHANNEL_TYPES_SW_PATCH_VERSION != WDG_IPW_TYPES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Wdg_ChannelType.h and Wdg_Ipw_Types.h are different"
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if source file and WdgIf_Types header file are of the same Autosar version */
+    #if ((WDG_CHANNEL_TYPES_AR_RELEASE_MAJOR_VERSION    != WDGIF_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+        (WDG_CHANNEL_TYPES_AR_RELEASE_MINOR_VERSION     != WDGIF_TYPES_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Wdg_ChannelType.h and WdgIf_Types.h are different"
+    #endif
+
+    /* Check if source file and Gpt header file are of the same Autosar version */
+    #if (WDG_DIRECT_SERVICE == STD_OFF)
+        #if (( WDG_CHANNEL_TYPES_AR_RELEASE_MAJOR_VERSION != GPT_AR_RELEASE_MAJOR_VERSION) || \
+            ( WDG_CHANNEL_TYPES_AR_RELEASE_MINOR_VERSION  != GPT_AR_RELEASE_MINOR_VERSION))
+            #error "AutoSar Version Numbers of Wdg_ChannelType.h and Gpt.h are different"
+        #endif
+    #endif
+
+    /* Check if source file and Gpt header file are of the same Autosar version */
+    #if (WDG_DIRECT_SERVICE == STD_OFF)
+        #if (( WDG_CHANNEL_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
+            ( WDG_CHANNEL_TYPES_AR_RELEASE_MINOR_VERSION  != STD_AR_RELEASE_MINOR_VERSION))
+            #error "AutoSar Version Numbers of Wdg_ChannelType.h and StandardTypes.h are different"
+        #endif
+    #endif
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+/**
+* @brief  This enumerated type will contain the service ids for the watchodg functions
+*
+* @pre To define WDG_GETVERSION_ID, WDG_VERSION_INFO_API has to be equal to STD_ON
+*
+*/
+typedef enum
+{
+#if (WDG_VERSION_INFO_API == STD_ON)
+    WDG_GETVERSION_ID   = 0x04, /*< @brief The service id for the Wdg_GetVersion function,
+                                            used when using DET */
+#endif
+#if (WDG_DIRECT_SERVICE == STD_ON)
+    WDG_SERVICE_ID              = 0x05, /*< @brief The service id for the Wdg_Service function, used
+                                            when using DET */
+#endif
+#if (WDG_DISABLE_ALLOWED == STD_ON)
+#if (WDG_CLEAR_RESET_REQUEST == STD_ON)
+    WDG_CLEARRESETREQUEST_ID    = 0x06, /*< @brief The service id for the Wdg_ClearResetRequest function, used
+                                            when using DET */
+#endif
+#endif
+    WDG_INIT_ID                 = 0x00, /*< @brief The service id for the Wdg_Init function, used
+                                            when using DET */
+    WDG_SETMODE_ID              = 0x01, /*< @brief The service id for the Wdg_SetMode function, used
+                                            when using DET */
+    WDG_SETTRIGGERCONDITION_ID  = 0x02, /*< @brief The service id for the Wdg_SetTriggerCondition function, used
+                                            when using DET */
+    WDG_TRIGGER_ID              = 0x03  /*< @brief The service id for the Wdg_Cbk_GptNotification function, used
+                                            when using DET */
+} Wdg_ServiceIdType;
+
+/**
+* @brief  Indicates the aditional det errors used by the watchdog driver
+* @implements     Wdg_ErrorIdType_enum
+*/
+typedef enum
+{
+    WDG_E_DRIVER_STATE  = 0x10, /*< @brief API service used in wrong context (e.g. driver not
+                                            initialized) */
+    WDG_E_PARAM_MODE,           /*< @brief = 0x11 API service called with wrong/inconsistent
+                                                   parameter(s) */
+    WDG_E_PARAM_CONFIG,         /*< @brief = 0x12 API service called with wrong/inconsistent
+                                                   parameter(s) */
+    WDG_E_PARAM_TIMEOUT,        /*< @brief = 0x13 API service called with wrong/inconsistent
+                                                   parameter(s) */
+    WDG_E_PARAM_POINTER,        /*< @brief = 0x14 Wdg_GetVersionInfo service called with
+                                                   NULL_PTR */
+    WDG_E_INIT_FAILED,           /*< @brief = 0x15 Invalid configuration set selection */
+} Wdg_ErrorIdType;
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+typedef struct
+{
+    uint32 Wdg_u32TimerTriggeringPeriod;
+
+    const Wdg_Ipw_ConfigType *Wdg_Ipw_pConfig;
+} Wdg_ModeType;
+
+/**
+* @brief  Defines the configuration structure
+* @implements     Wdg_ConfigType_struct
+*/
+typedef struct
+{
+    /**
+    @brief The number of configured channels
+    */
+    const WdgIf_ModeType Wdg_DefaultMode;
+    /**
+    @brief The instance id
+    */
+    const Wdg_Ipw_InstanceType Wdg_Instance;
+
+#if (WDG_DIRECT_SERVICE == STD_OFF)
+    /**
+    @brief Gpt Channel configured
+    */
+    const Gpt_ChannelType Wdg_TimerChannel;
+
+    /**
+    @brief The frequency of the configured timer channel
+    */
+    const uint32 Wdg_u32TriggerSourceClock;
+#endif
+
+    /**
+    @brief Pointer to Watchdog Specific implementation details
+    */
+    const Wdg_ModeType *const Wdg_ModeSettings[3];
+
+} Wdg_ConfigType;
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /*WDG_CHANNEL_TYPES_H*/

RTD/include/Wdg_EnvCfg.h

@@ -0,0 +1,93 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef WDG_ENVCFG_H
+#define WDG_ENVCFG_H
+
+/**
+*   @file
+*
+*   @addtogroup Wdg
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif 
+
+/*==================================================================================================
+                                         INCLUDE FILES
+ 1) system and project includes
+ 2) needed interfaces from external units
+ 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+/*==================================================================================================
+                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define WDG_ENVCFG_VENDOR_ID                        43
+
+#define WDG_ENVCFG_AR_RELEASE_MAJOR_VERSION         4
+#define WDG_ENVCFG_AR_RELEASE_MINOR_VERSION         4
+#define WDG_ENVCFG_AR_RELEASE_REVISION_VERSION      0
+
+#define WDG_ENVCFG_SW_MAJOR_VERSION                 1
+#define WDG_ENVCFG_SW_MINOR_VERSION                 0
+#define WDG_ENVCFG_SW_PATCH_VERSION                 0
+/*==================================================================================================
+                                      FILE VERSION CHECKS
+==================================================================================================*/
+
+
+/*==================================================================================================
+                                           CONSTANTS
+==================================================================================================*/
+
+
+/*==================================================================================================
+                                       DEFINES AND MACROS
+==================================================================================================*/
+
+#define WDG_VALIDATE_GLOBAL_CALL         (WDG_DEV_ERROR_DETECT)
+#define WDG_VALIDATE_PARAMS              (WDG_DEV_ERROR_DETECT)
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+/** @} */
+
+#endif /* WDG_ENVCFG_H */

RTD/include/Wdg_Ipw.h

@@ -0,0 +1,208 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef WDG_IPW_H
+#define WDG_IPW_H
+
+/**
+* @file
+*
+* @addtogroup  Wdg
+* @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Wdg_Ipw_Types.h"
+#include "StandardTypes.h"
+#if(WDOG_IP_USED == STD_ON)
+    #include "Wdog_Ip.h"
+#endif /*(WDOG_IP_USED == STD_ON)*/
+#if(EWM_IP_USED == STD_ON)
+    #include "Ewm_Ip.h"
+#endif /*(EWM_IP_USED == STD_ON)*/
+/*==================================================================================================
+*                               SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define WDG_IPW_VENDOR_ID                    43
+#define WDG_IPW_MODULE_ID                    102
+#define WDG_IPW_AR_RELEASE_MAJOR_VERSION     4
+#define WDG_IPW_AR_RELEASE_MINOR_VERSION     4
+#define WDG_IPW_AR_RELEASE_REVISION_VERSION  0
+#define WDG_IPW_SW_MAJOR_VERSION             1
+#define WDG_IPW_SW_MINOR_VERSION             0
+#define WDG_IPW_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+                                      FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if current file and Wdg_Ipw_Types header file are of the same vendor */
+#if (WDG_IPW_VENDOR_ID != WDG_IPW_TYPES_VENDOR_ID)
+#error "Wdg_Ipw.h and Wdg_Ipw_Types.h have different vendor ids"
+#endif
+
+/* Check if current file and Wdg_Ipw_Types header file are of the same Autosar version */
+#if ((WDG_IPW_AR_RELEASE_MAJOR_VERSION     != WDG_IPW_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (WDG_IPW_AR_RELEASE_MINOR_VERSION     != WDG_IPW_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (WDG_IPW_AR_RELEASE_REVISION_VERSION  != WDG_IPW_TYPES_AR_RELEASE_REVISION_VERSION))
+#error "AutoSar Version Numbers of Wdg_Ipw.h and Wdg_Ipw_Types.h are different"
+#endif
+
+/* Check if current file and Wdg_Ipw_Types header file are of the same software version */
+#if ((WDG_IPW_SW_MAJOR_VERSION != WDG_IPW_TYPES_SW_MAJOR_VERSION) || \
+     (WDG_IPW_SW_MINOR_VERSION != WDG_IPW_TYPES_SW_MINOR_VERSION) || \
+     (WDG_IPW_SW_PATCH_VERSION != WDG_IPW_TYPES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Wdg_Ipw.h and Wdg_Ipw_Types.h are different"
+#endif
+
+#if(WDOG_IP_USED == STD_ON)
+    /* Check if current file and Wdog_Ip header file are of the same vendor */
+    #if (WDG_IPW_VENDOR_ID != WDOG_IP_VENDOR_ID)
+    #error "Wdg_Ipw.h and Wdog_Ip.h have different vendor ids"
+    #endif
+
+    /* Check if current file and Wdog_Ip header file are of the same Autosar version */
+    #if ((WDG_IPW_AR_RELEASE_MAJOR_VERSION     != WDOG_IP_AR_RELEASE_MAJOR_VERSION) || \
+         (WDG_IPW_AR_RELEASE_MINOR_VERSION     != WDOG_IP_AR_RELEASE_MINOR_VERSION) || \
+         (WDG_IPW_AR_RELEASE_REVISION_VERSION  != WDOG_IP_AR_RELEASE_REVISION_VERSION))
+    #error "AutoSar Version Numbers of Wdg_Ipw.h and Wdog_Ip.h are different"
+    #endif
+
+    /* Check if current file and Wdog_Ip header file are of the same software version */
+    #if ((WDG_IPW_SW_MAJOR_VERSION != WDOG_IP_SW_MAJOR_VERSION) || \
+         (WDG_IPW_SW_MINOR_VERSION != WDOG_IP_SW_MINOR_VERSION) || \
+         (WDG_IPW_SW_PATCH_VERSION != WDOG_IP_SW_PATCH_VERSION))
+    #error "Software Version Numbers of Wdg_Ipw.h and Wdog_Ip.h are different"
+    #endif
+#endif /*(WDOG_IP_USED == STD_ON)*/
+
+#if(EWM_IP_USED == STD_ON)
+    /* Check if current file and Ewm_Ip header file are of the same vendor */
+    #if (WDG_IPW_VENDOR_ID != EWM_IP_VENDOR_ID)
+    #error "Wdg_Ipw.h and Ewm_Ip.h have different vendor ids"
+    #endif
+
+    /* Check if current file and Ewm_Ip header file are of the same Autosar version */
+    #if ((WDG_IPW_AR_RELEASE_MAJOR_VERSION     != EWM_IP_AR_RELEASE_MAJOR_VERSION) || \
+         (WDG_IPW_AR_RELEASE_MINOR_VERSION     != EWM_IP_AR_RELEASE_MINOR_VERSION) || \
+         (WDG_IPW_AR_RELEASE_REVISION_VERSION  != EWM_IP_AR_RELEASE_REVISION_VERSION))
+    #error "AutoSar Version Numbers of Wdg_Ipw.h and Ewm_Ip.h are different"
+    #endif
+
+    /* Check if current file and Ewm_Ip header file are of the same software version */
+    #if ((WDG_IPW_SW_MAJOR_VERSION != EWM_IP_SW_MAJOR_VERSION) || \
+         (WDG_IPW_SW_MINOR_VERSION != EWM_IP_SW_MINOR_VERSION) || \
+         (WDG_IPW_SW_PATCH_VERSION != EWM_IP_SW_PATCH_VERSION))
+    #error "Software Version Numbers of Wdg_Ipw.h and Ewm_Ip.h are different"
+    #endif
+#endif /*(EWM_IP_USED == STD_ON)*/
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and StandardTypes header file are of the same Autosar version */
+    #if ((WDG_IPW_AR_RELEASE_MAJOR_VERSION    != STD_AR_RELEASE_MAJOR_VERSION) || \
+        (WDG_IPW_AR_RELEASE_MINOR_VERSION     != STD_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Wdg_Ipw.h and StandardTypes.h are different"
+    #endif
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
+
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                            ENUMS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_START_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_START_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+Std_ReturnType Wdg_Ipw_Init(Wdg_Ipw_InstanceType Wdg_Instance, const Wdg_Ipw_ConfigType * const pIpwConfig);
+
+Std_ReturnType Wdg_Ipw_SetMode(Wdg_Ipw_InstanceType Wdg_Instance, const Wdg_Ipw_ConfigType * const pIpwConfig);
+
+Std_ReturnType Wdg_Ipw_StartTimer(Wdg_Ipw_InstanceType Wdg_Instance);
+
+#if (WDG_IPW_DEINIT == STD_ON)
+    Std_ReturnType Wdg_Ipw_StopTimer(Wdg_Ipw_InstanceType Wdg_Instance);
+#endif
+
+void Wdg_Ipw_Service(Wdg_Ipw_InstanceType Wdg_Instance);
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_STOP_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_STOP_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /*WDG_IPW_H*/

RTD/include/Wdg_Ipw_Types.h

@@ -0,0 +1,203 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+
+#ifndef WDG_IPW_TYPES_H
+#define WDG_IPW_TYPES_H
+
+/**
+*   @file
+*
+*   @addtogroup Wdg
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+/**
+* @page misra_violations MISRA-C:2012 violations
+*/
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Wdg_Ipw_Cfg_Defines.h"
+#if(WDOG_IP_USED == STD_ON)
+     #include "Wdog_Ip_Types.h"
+#endif /*(WDOG_IP_USED == STD_ON)*/
+
+#if(EWM_IP_USED == STD_ON)
+     #include "Ewm_Ip_Types.h"
+#endif /*(EWM_IP_USED == STD_ON)*/
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define WDG_IPW_TYPES_VENDOR_ID                    43
+#define WDG_IPW_TYPES_AR_RELEASE_MAJOR_VERSION     4
+#define WDG_IPW_TYPES_AR_RELEASE_MINOR_VERSION     4
+#define WDG_IPW_TYPES_AR_RELEASE_REVISION_VERSION  0
+#define WDG_IPW_TYPES_SW_MAJOR_VERSION             1
+#define WDG_IPW_TYPES_SW_MINOR_VERSION             0
+#define WDG_IPW_TYPES_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if current file and Wdg_Ipw_Cfg_Defines header file are of the same vendor */
+#if (WDG_IPW_TYPES_VENDOR_ID != WDG_IPW_CFG_DEFINES_VENDOR_ID)
+#error "Wdg_Ipw_Types.h and Wdg_Ipw_Cfg_Defines.h have different vendor ids"
+#endif
+
+/* Check if current file and Wdg_Ipw_Cfg_Defines header file are of the same Autosar version */
+#if ((WDG_IPW_TYPES_AR_RELEASE_MAJOR_VERSION     != WDG_IPW_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \
+     (WDG_IPW_TYPES_AR_RELEASE_MINOR_VERSION     != WDG_IPW_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \
+     (WDG_IPW_TYPES_AR_RELEASE_REVISION_VERSION  != WDG_IPW_CFG_DEFINES_AR_RELEASE_REVISION_VERSION))
+#error "AutoSar Version Numbers of Wdg_Ipw_Types.h and Wdg_Ipw_Cfg_Defines.h are different"
+#endif
+
+/* Check if current file and Wdg_Ipw_Cfg_Defines header file are of the same software version */
+#if ((WDG_IPW_TYPES_SW_MAJOR_VERSION != WDG_IPW_CFG_DEFINES_SW_MAJOR_VERSION) || \
+     (WDG_IPW_TYPES_SW_MINOR_VERSION != WDG_IPW_CFG_DEFINES_SW_MINOR_VERSION) || \
+     (WDG_IPW_TYPES_SW_PATCH_VERSION != WDG_IPW_CFG_DEFINES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Wdg_Ipw_Types.h and Wdg_Ipw_Cfg_Defines.h are different"
+#endif
+
+#if(WDOG_IP_USED == STD_ON)
+     /* Check if current file and Wdog_Ip_Types header file are of the same vendor */
+     #if (WDG_IPW_TYPES_VENDOR_ID != WDOG_IP_TYPES_VENDOR_ID)
+     #error "Wdg_Ipw_Types.h and Wdog_Ip_Types.h have different vendor ids"
+     #endif
+
+     /* Check if current file and Wdog_Ip_Types header file are of the same Autosar version */
+     #if ((WDG_IPW_TYPES_AR_RELEASE_MAJOR_VERSION     != WDOG_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+          (WDG_IPW_TYPES_AR_RELEASE_MINOR_VERSION     != WDOG_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
+          (WDG_IPW_TYPES_AR_RELEASE_REVISION_VERSION  != WDOG_IP_TYPES_AR_RELEASE_REVISION_VERSION))
+     #error "AutoSar Version Numbers of Wdg_Ipw_Types.h and Wdog_Ip_Types.h are different"
+     #endif
+
+     /* Check if current file and Wdog_Ip_Types header file are of the same software version */
+     #if ((WDG_IPW_TYPES_SW_MAJOR_VERSION != WDOG_IP_TYPES_SW_MAJOR_VERSION) || \
+          (WDG_IPW_TYPES_SW_MINOR_VERSION != WDOG_IP_TYPES_SW_MINOR_VERSION) || \
+          (WDG_IPW_TYPES_SW_PATCH_VERSION != WDOG_IP_TYPES_SW_PATCH_VERSION))
+     #error "Software Version Numbers of Wdg_Ipw_Types.h and Wdog_Ip_Types.h are different"
+     #endif
+#endif /*(WDOG_IP_USED == STD_ON)*/
+
+#if(EWM_IP_USED == STD_ON)
+     /* Check if current file and Ewm_Ip_Types header file are of the same vendor */
+     #if (WDG_IPW_TYPES_VENDOR_ID != EWM_IP_TYPES_VENDOR_ID)
+     #error "Wdg_Ipw_Types.h and Ewm_Ip_Types.h have different vendor ids"
+     #endif
+
+     /* Check if current file and Ewm_Ip_Types header file are of the same Autosar version */
+     #if ((WDG_IPW_TYPES_AR_RELEASE_MAJOR_VERSION     != EWM_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+          (WDG_IPW_TYPES_AR_RELEASE_MINOR_VERSION     != EWM_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
+          (WDG_IPW_TYPES_AR_RELEASE_REVISION_VERSION  != EWM_IP_TYPES_AR_RELEASE_REVISION_VERSION))
+     #error "AutoSar Version Numbers of Wdg_Ipw_Types.h and Ewm_Ip_Types.h are different"
+     #endif
+
+     /* Check if current file and Ewm_Ip_Types header file are of the same software version */
+     #if ((WDG_IPW_TYPES_SW_MAJOR_VERSION != EWM_IP_TYPES_SW_MAJOR_VERSION) || \
+          (WDG_IPW_TYPES_SW_MINOR_VERSION != EWM_IP_TYPES_SW_MINOR_VERSION) || \
+          (WDG_IPW_TYPES_SW_PATCH_VERSION != EWM_IP_TYPES_SW_PATCH_VERSION))
+     #error "Software Version Numbers of Wdg_Ipw_Types.h and Ewm_Ip_Types.h are different"
+     #endif
+#endif /*(EWM_IP_USED == STD_ON)*/
+/*==================================================================================================
+*                                          CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      DEFINES AND MACROS
+==================================================================================================*/
+
+/*< @brief The service id for the Wdg_Init function, used when using DET */
+#define WDG_IPW_INIT_ID       0x00
+/*< @brief Te service id for the Wdg_SetMode function, used when using DET */
+#define WDG_IPW_SETMODE_ID    0x01
+
+/*< @brief API service did not complete in time */
+#define WDG_IPW_E_PARAM_TIMEOUT    0x13
+
+/*==================================================================================================
+*                                             ENUMS
+==================================================================================================*/
+/**
+* @brief          Wdg_Ipw_InstanceType.
+* @details        Contains the information related to available Wdg Instances.
+*/
+typedef enum
+{
+    WDG_IPW_INSTANCE0 = 0x0U,
+    WDG_IPW_INSTANCE1 = 0x1U
+} Wdg_Ipw_InstanceType;
+
+/**
+* @brief          Wdg_Ipw_IpType.
+* @details        Contains the Ip types available for Wdg.
+*/
+typedef enum
+{
+    WDG_IPW_WDOG_IP = 0x00,
+    WDG_IPW_EWM_IP  = 0x01,
+    WDG_IPW_UNINIT_IP = 0x02
+} Wdg_Ipw_IpType;
+
+/*==================================================================================================
+*                                STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+typedef struct 
+{
+    const Wdg_Ipw_IpType eWdgIp;
+#if(WDOG_IP_USED == STD_ON)
+    const Wdog_Ip_ConfigType *pWdogConfig;
+#endif /*(WDOG_IP_USED == STD_ON)*/
+#if(EWM_IP_USED == STD_ON)
+    const Ewm_Ip_ConfigType *pEwmConfig;
+#endif /*(EWM_IP_USED == STD_ON)*/
+} Wdg_Ipw_ConfigType;
+
+/*==================================================================================================
+*                                GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                    FUNCTION PROTOTYPES
+==================================================================================================*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /*WDG_IPW_TYPES_H*/

RTD/include/Wdog_Ip.h

@@ -0,0 +1,274 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef WDOG_IP_H
+#define WDOG_IP_H
+
+/**
+*   @file
+*
+*   @addtogroup Wdog_Ip
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "Wdog_Ip_Types.h"
+#include "Wdog_Ip_DeviceRegisters.h"
+
+/*==================================================================================================
+*                                 SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define WDOG_IP_VENDOR_ID                    43
+#define WDOG_IP_MODULE_ID                    102
+#define WDOG_IP_AR_RELEASE_MAJOR_VERSION     4
+#define WDOG_IP_AR_RELEASE_MINOR_VERSION     4
+#define WDOG_IP_AR_RELEASE_REVISION_VERSION  0
+#define WDOG_IP_SW_MAJOR_VERSION             1
+#define WDOG_IP_SW_MINOR_VERSION             0
+#define WDOG_IP_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                       FILE VERSION CHECKS
+==================================================================================================*/
+
+/* Check if current file and Wdog_Ip_Types header file are of the same vendor */
+#if (WDOG_IP_VENDOR_ID != WDOG_IP_TYPES_VENDOR_ID)
+#error "Wdog_Ip.h and Wdog_Ip_Types.h have different vendor ids"
+#endif
+
+#if ((WDOG_IP_AR_RELEASE_MAJOR_VERSION    != WDOG_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
+     (WDOG_IP_AR_RELEASE_MINOR_VERSION    != WDOG_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
+     (WDOG_IP_AR_RELEASE_REVISION_VERSION != WDOG_IP_TYPES_AR_RELEASE_REVISION_VERSION))
+#error "AutoSar Version Numbers of Wdog_Ip.h and Wdog_Ip_Types.h are different"
+#endif
+
+#if ((WDOG_IP_SW_MAJOR_VERSION != WDOG_IP_TYPES_SW_MAJOR_VERSION) || \
+     (WDOG_IP_SW_MINOR_VERSION != WDOG_IP_TYPES_SW_MINOR_VERSION) || \
+     (WDOG_IP_SW_PATCH_VERSION != WDOG_IP_TYPES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Wdog_Ip.h and Wdog_Ip_Types.h are different"
+#endif
+
+/* Check if current file and Wdog_Ip_DeviceRegisters header file are of the same vendor */
+#if (WDOG_IP_VENDOR_ID != WDOG_IP_DEVICE_REGISTERS_VENDOR_ID)
+#error "Wdog_Ip.h and Wdog_Ip_DeviceRegisters.h have different vendor ids"
+#endif
+
+#if ((WDOG_IP_AR_RELEASE_MAJOR_VERSION    != WDOG_IP_DEVICE_REGISTERS_AR_RELEASE_MAJOR_VERSION) || \
+     (WDOG_IP_AR_RELEASE_MINOR_VERSION    != WDOG_IP_DEVICE_REGISTERS_AR_RELEASE_MINOR_VERSION) || \
+     (WDOG_IP_AR_RELEASE_REVISION_VERSION != WDOG_IP_DEVICE_REGISTERS_AR_RELEASE_REVISION_VERSION))
+#error "AutoSar Version Numbers of Wdog_Ip.h and Wdog_Ip_DeviceRegisters.h are different"
+#endif
+
+#if ((WDOG_IP_SW_MAJOR_VERSION != WDOG_IP_DEVICE_REGISTERS_SW_MAJOR_VERSION) || \
+     (WDOG_IP_SW_MINOR_VERSION != WDOG_IP_DEVICE_REGISTERS_SW_MINOR_VERSION) || \
+     (WDOG_IP_SW_PATCH_VERSION != WDOG_IP_DEVICE_REGISTERS_SW_PATCH_VERSION))
+#error "Software Version Numbers of Wdog_Ip.h and Wdog_Ip_DeviceRegisters.h are different"
+#endif
+
+/*==================================================================================================
+*                                            CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                              ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#if (WDOG_IP_ENABLE == STD_ON)
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_START_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_START_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+/*!
+ * @brief Initializes the WDOG driver.
+ *
+ * @param[in] Instance WDOG peripheral instance number
+ * @param[in] ConfigPtr pointer to the WDOG user configuration structure
+ * @return operation status
+ *        - WDOG_IP_STATUS_SUCCESS: WDOG initialization was successful.
+ *        - WDOG_IP_STATUS_ERROR: Operation failed. Possible causes: WDOG configuration updates are not allowed;
+ *          If window mode enabled and window value greater than or equal to the timeout value.
+ *        - WDOG_IP_STATUS_TIMEOUT: The unlock operation was unsuccesful and has timed out.
+ */
+Wdog_Ip_StatusType Wdog_Ip_Init(const uint8 Instance,
+                            const Wdog_Ip_ConfigType * const ConfigPtr);
+
+#if (WDOG_IP_DEINIT == STD_ON)
+/*!
+ * @brief De-initializes the WDOG driver
+ *
+ * @param[in] Instance  WDOG peripheral instance number
+ * @return operation status
+ *        - WDOG_IP_STATUS_SUCCESS: If the WDOG module is de-initialized successfulully.
+ *        - WDOG_IP_STATUS_ERROR: Operation failed. Possible causes: WDOG updates are not allowed.
+ *        - WDOG_IP_STATUS_TIMEOUT: The unlock operation was unsuccesful and has timed out.
+ */
+Wdog_Ip_StatusType Wdog_Ip_DeInit(const uint8 Instance);
+#endif
+
+/*!
+ * @brief Refreshes the WDOG counter.
+ *
+ * @param[in] Instance WDOG peripheral instance number
+ */
+void Wdog_Ip_Service(const uint8 Instance);
+
+/*!
+ * @brief Sets the value of the WDOG timeout.
+ *
+ * This function sets the value of the WDOG timeout and enables the window mode if WindowValue is greater than 0.
+ *
+ * @param[in] Instance WDOG peripheral instance number.
+ * @param[in] Timeout the value of the WDOG timeout.
+ * @param[in] WindowValue the value of the WDOG window.
+ * @return operation status
+ *        - WDOG_IP_STATUS_SUCCESS: The WDOG timeout and window are configured succesfully.
+ *        - WDOG_IP_STATUS_ERROR: Operation failed. Possible causes: WDOG updates are not allowed.
+ *        - WDOG_IP_STATUS_TIMEOUT: The unlock operation was unsuccesful and has timed out.
+ */
+Wdog_Ip_StatusType Wdog_Ip_SetTimeout(const uint8 Instance,
+                            uint16 Timeout, uint16 WindowValue);
+
+#if (WDOG_IP_ENABLE_TEST_MODE == STD_ON)
+/*!
+ * @brief Changes the WDOG test mode.
+ *
+ * This function changes the test mode of the WDOG. If the WDOG is tested in
+ * mode, software should set this field to 0x01U in order to indicate that the
+ * WDOG is functioning normally.
+ *
+ * @param[in] Instance WDOG peripheral instance number
+ * @param[in] testMode Test modes for the WDOG.
+ * @return operation status
+ *        - WDOG_IP_STATUS_SUCCESS: The WDOG test mode is configured succesfully.
+ *        - WDOG_IP_STATUS_ERROR: Operation failed. Possible causes: WDOG updates are not allowed.
+ *        - WDOG_IP_STATUS_TIMEOUT: The unlock operation was unsuccesful and has timed out.
+ */
+Wdog_Ip_StatusType Wdog_Ip_SetTestMode(const uint8 Instance,
+                            Wdog_Ip_TestModeType TestMode);
+
+/*!
+ * @brief Returns the current WDOG test mode.
+ *
+ * This function returns the test mode of the WDOG. 
+ *
+ * @param[in] Instance WDOG peripheral instance number
+ * @return Wdog_Ip_TestModeType the current WDOG test mode.
+ */
+Wdog_Ip_TestModeType Wdog_Ip_GetTestMode(const uint8 Instance);
+#endif /* WDOG_IP_ENABLE_TEST_MODE == STD_ON */
+
+/*!
+ * @brief Configures the WDOG driver, but does not enable or disable it.
+ *
+ * @param[in] Instance WDOG peripheral instance number
+ * @param[in] ConfigPtr pointer to the WDOG user configuration structure
+ * @return operation status
+ *        - WDOG_IP_STATUS_SUCCESS: WDOG configuration was successful.
+ *        - WDOG_IP_STATUS_ERROR: Operation failed. Possible causes: WDOG configuration updates are not allowed;
+ *          If window mode enabled and window value greater than or equal to the timeout value.
+ *        - WDOG_IP_STATUS_TIMEOUT: The unlock operation was unsuccesful and has timed out.
+ */
+Wdog_Ip_StatusType Wdog_Ip_Config(const uint8 Instance,  
+                            const Wdog_Ip_ConfigType * const ConfigPtr);
+
+/*!
+ * @brief Starts the WDOG counter.
+ *
+ * @param[in] Instance WDOG peripheral instance number
+ * @return operation status
+ *        - WDOG_IP_STATUS_SUCCESS: WDOG timer was started successfully.
+ *        - WDOG_IP_STATUS_ERROR: Operation failed. Possible causes: WDOG updates are not allowed.
+ *        - WDOG_IP_STATUS_TIMEOUT: The unlock operation was unsuccesful and has timed out.
+ */
+Wdog_Ip_StatusType Wdog_Ip_StartTimer(const uint8 Instance);
+
+/*!
+ * @brief Stops the WDOG counter.
+ *
+ * @param[in] Instance WDOG peripheral instance number
+ * @return operation status
+ *        - WDOG_IP_STATUS_SUCCESS: WDOG timer was stopped successfully.
+ *        - WDOG_IP_STATUS_ERROR: Operation failed. Possible causes: WDOG updates are not allowed.
+ *        - WDOG_IP_STATUS_TIMEOUT: The unlock operation was unsuccesful and has timed out.
+ */
+Wdog_Ip_StatusType Wdog_Ip_StopTimer(const uint8 Instance);
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_STOP_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_STOP_SEC_RAMCODE
+    #endif
+#endif
+
+
+#include "Wdg_MemMap.h"
+
+#endif /* (WDOG_IP_ENABLE == STD_ON) */
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* WDOG_IP_H */

RTD/include/Wdog_Ip_FeatureDefines.h

@@ -0,0 +1,124 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef WDOG_IP_FEATUREDEFINES_H
+#define WDOG_IP_FEATUREDEFINES_H
+
+/**
+*   @file
+*
+*   @addtogroup Wdg
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "StandardTypes.h"
+
+/*==================================================================================================
+*                                 SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define WDOG_IP_FEATURE_DEFINES_VENDOR_ID                    43
+#define WDOG_IP_FEATURE_DEFINES_MODULE_ID                    102
+#define WDOG_IP_FEATURE_DEFINES_AR_RELEASE_MAJOR_VERSION     4
+#define WDOG_IP_FEATURE_DEFINES_AR_RELEASE_MINOR_VERSION     4
+#define WDOG_IP_FEATURE_DEFINES_AR_RELEASE_REVISION_VERSION  0
+#define WDOG_IP_FEATURE_DEFINES_SW_MAJOR_VERSION             1
+#define WDOG_IP_FEATURE_DEFINES_SW_MINOR_VERSION             0
+#define WDOG_IP_FEATURE_DEFINES_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                       FILE VERSION CHECKS
+==================================================================================================*/
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and StandardTypes header file are of the same Autosar version */
+    #if ((WDOG_IP_FEATURE_DEFINES_AR_RELEASE_MAJOR_VERSION    != STD_AR_RELEASE_MAJOR_VERSION) || \
+        (WDOG_IP_FEATURE_DEFINES_AR_RELEASE_MINOR_VERSION     != STD_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Wdog_Ip_FeatureDefines.h and StandardTypes.h are different"
+    #endif
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
+
+/*==================================================================================================
+*                                            CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/* @brief The 32-bit value used for unlocking the WDOG. */
+#define WDOG_IP_FEATURE_UNLOCK_VALUE                       (0xD928C520U)
+/* @brief The 32-bit value used for resetting the WDOG counter. */
+#define WDOG_IP_FEATURE_TRIGGER_VALUE                      (0xB480A602U)
+/* @brief The reset value of the timeout register. */
+#define WDOG_IP_FEATURE_TO_RESET_VALUE                     (0x400U)
+/* @brief The value minimum of the timeout register. */
+#define WDOG_IP_FEATURE_MINIMUM_TIMEOUT_VALUE              (0x0U)
+/* @brief The reset value of the window register. */
+#define WDOG_IP_FEATURE_WIN_RESET_VALUE                    (0x0U)
+/* @brief The first 16-bit value used for unlocking the WDOG. */
+#define WDOG_IP_FEATURE_UNLOCK16_FIRST_VALUE               (0xC520U)
+/* @brief The second 16-bit value used for unlocking the WDOG. */
+#define WDOG_IP_FEATURE_UNLOCK16_SECOND_VALUE              (0xD928U)
+/* @brief The first 16-bit value used for resetting the WDOG counter. */
+#define WDOG_IP_FEATURE_TRIGGER16_FIRST_VALUE              (0xA602U)
+/* @brief The second 16-bit value used for resetting the WDOG counter. */
+#define WDOG_IP_FEATURE_TRIGGER16_SECOND_VALUE             (0xB480U)
+/* @brief Default reset value of the CS register. */
+#define WDOG_IP_FEATURE_CS_RESET_VALUE                     (0x2520U)
+
+/*==================================================================================================
+*                                              ENUMS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                  GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* WDOG_IP_FEATUREDEFINES_H */

RTD/include/Wdog_Ip_Types.h

@@ -0,0 +1,193 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+#ifndef WDOG_IP_TYPES_H
+#define WDOG_IP_TYPES_H
+
+/**
+*   @file
+*
+*   @addtogroup Wdog_Ip
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "StandardTypes.h"
+#include "Wdog_Ip_Cfg_Defines.h"
+
+/*==================================================================================================
+*                                 SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define WDOG_IP_TYPES_VENDOR_ID                    43
+#define WDOG_IP_TYPES_MODULE_ID                    102
+#define WDOG_IP_TYPES_AR_RELEASE_MAJOR_VERSION     4
+#define WDOG_IP_TYPES_AR_RELEASE_MINOR_VERSION     4
+#define WDOG_IP_TYPES_AR_RELEASE_REVISION_VERSION  0
+#define WDOG_IP_TYPES_SW_MAJOR_VERSION             1
+#define WDOG_IP_TYPES_SW_MINOR_VERSION             0
+#define WDOG_IP_TYPES_SW_PATCH_VERSION             0
+
+/*==================================================================================================
+*                                       FILE VERSION CHECKS
+==================================================================================================*/
+
+/* Check if current file and Wdog_Ip_Cfg_Defines configuration header file are of the same vendor */
+#if (WDOG_IP_TYPES_VENDOR_ID != WDOG_IP_CFG_DEFINES_VENDOR_ID)
+#error "Wdog_Ip_Types.h and Wdog_Ip_Cfg_Defines.h have different vendor ids"
+#endif
+
+#if ((WDOG_IP_TYPES_AR_RELEASE_MAJOR_VERSION    != WDOG_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \
+     (WDOG_IP_TYPES_AR_RELEASE_MINOR_VERSION    != WDOG_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \
+     (WDOG_IP_TYPES_AR_RELEASE_REVISION_VERSION != WDOG_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION))
+#error "AutoSar Version Numbers of Wdog_Ip_Types.h and Wdog_Ip_Cfg_Defines.h are different"
+#endif
+
+#if ((WDOG_IP_TYPES_SW_MAJOR_VERSION != WDOG_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \
+     (WDOG_IP_TYPES_SW_MINOR_VERSION != WDOG_IP_CFG_DEFINES_SW_MINOR_VERSION) || \
+     (WDOG_IP_TYPES_SW_PATCH_VERSION != WDOG_IP_CFG_DEFINES_SW_PATCH_VERSION))
+#error "Software Version Numbers of Wdog_Ip_Types.h and Wdog_Ip_Cfg_Defines.h are different"
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and StandardTypes header file are of the same Autosar version */
+    #if ((WDOG_IP_TYPES_AR_RELEASE_MAJOR_VERSION    != STD_AR_RELEASE_MAJOR_VERSION) || \
+        (WDOG_IP_TYPES_AR_RELEASE_MINOR_VERSION     != STD_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Wdog_Ip_Types.h and StandardTypes.h are different"
+    #endif
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
+
+/*==================================================================================================
+*                                            CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       DEFINES AND MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                              ENUMS
+==================================================================================================*/
+
+/** @brief       Enum defining the possible type values for WDOG API
+* @Implements    Wdog_Ip_StatusType_enumeration
+*/
+typedef enum
+{
+    WDOG_IP_STATUS_SUCCESS = 0x00,
+    WDOG_IP_STATUS_ERROR   = 0x01,
+    WDOG_IP_STATUS_TIMEOUT = 0x02
+} Wdog_Ip_StatusType;
+
+/*!
+ * @brief Clock sources for the WDOG.
+ * Implements : Wdog_Ip_ClkSourceType_Class
+ */
+typedef enum
+{
+    WDOG_IP_BUS_CLOCK                        = 0x00U, /*!< Bus clock */
+    WDOG_IP_LPO_CLOCK                        = 0x01U, /*!< LPO clock */
+    WDOG_IP_SOSC_CLOCK                       = 0x02U, /*!< SOSC clock */
+    WDOG_IP_SIRC_CLOCK                       = 0x03U  /*!< SIRC clock */
+} Wdog_Ip_ClkSourceType;
+
+#if (WDOG_IP_ENABLE_TEST_MODE == STD_ON)
+/*!
+ * @brief Test modes for the WDOG.
+ * Implements : Wdog_Ip_TestModeType_Class
+ */
+typedef enum
+{
+    WDOG_IP_TST_DISABLED                     = 0x00U, /*!< Test mode disabled */
+    WDOG_IP_TST_USER                         = 0x01U, /*!< User mode enabled. (Test mode disabled.) */
+    WDOG_IP_TST_LOW                          = 0x02U, /*!< Test mode enabled, only the low byte is used. */
+    WDOG_IP_TST_HIGH                         = 0x03U  /*!< Test mode enabled, only the high byte is used. */
+} Wdog_Ip_TestModeType;
+#endif /* WDOG_IP_ENABLE_TEST_MODE == STD_ON */
+
+/*==================================================================================================
+*                                  STRUCTURES AND OTHER TYPEDEFS
+==================================================================================================*/
+
+/*!
+ * @brief WDOG callback type
+ * Implements : Wdog_Ip_CallbackPtrType_Class
+ */
+
+typedef void (*Wdog_Ip_CallbackPtrType)(void);
+
+/*!
+ * @brief WDOG option mode configuration structure
+ * Implements : Wdog_Ip_OpModeType_Class
+ */
+typedef struct
+{
+    boolean bWait;  /*!< Wait mode */
+    boolean bStop;  /*!< Stop mode */
+    boolean bDebug; /*!< Debug mode */
+} Wdog_Ip_OpModeType;
+
+/*!
+ * @brief WDOG user configuration structure
+ * Implements : Wdog_Ip_ConfigType_Class
+ */
+typedef struct
+{
+    Wdog_Ip_ClkSourceType    clkSource;        /*!< The clock source of the WDOG */
+    Wdog_Ip_OpModeType       opMode;           /*!< The modes in which the WDOG is functional */
+    boolean                  UpdateEnable;    /*!< If true, further updates of the WDOG are enabled */
+    boolean                  IntEnable;       /*!< If true, an interrupt request is generated before reset */
+    boolean                  WinEnable;       /*!< If true, window mode is enabled */
+    uint16                   WindowValue;   /*!< The window value */
+    uint16                   TimeoutValue;  /*!< The timeout value */
+    boolean                  PrescalerEnable; /*!< If true, a fixed 256 prescaling of the counter reference clock is enabled */
+    Wdog_Ip_CallbackPtrType  pfWdogCallback;   /*!< Interrupt callback */
+} Wdog_Ip_ConfigType;
+
+/*==================================================================================================
+*                                  GLOBAL VARIABLE DECLARATIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       FUNCTION PROTOTYPES
+==================================================================================================*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+#endif /* WDOG_IP_TYPES_H */

RTD/src/Adc.c

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/src/Adc_Ip.c

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/src/Adc_Ip_Isr.c

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/src/Adc_Ipw.c

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/src/Adc_Ipw_Irq.c

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/src/Det.c

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/src/Det_stub.c

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/src/Eep.c

@@ -0,0 +1,2015 @@
+
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : IPV_FTFC
+* Dependencies : 
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+
+/**
+* @file
+*
+* @addtogroup EEP_DRIVER Eeprom Driver
+* @{
+*/
+/* implements Eep.c_Artifact */
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/* Compiler warning eep_c_REF_CW_01: explicit cast discards volatile qualifier.
+   The cast is explicit, intended and the casted value is treated properly.
+   Sizes of the pointers and integral types for all the supported platforms/compilers are well known
+   and the volatile keyword is not needed when using the pointer value as a eeprom address counter,
+   as the pointer value is not updated in the DSI interrupt context or by other hardware means.
+*/
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "Eep.h"
+#if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+#include "Dem.h"
+#endif
+
+#include "Det.h"
+
+#include "Eep_IPW.h"
+
+#if (EEP_MCORE_ENABLED == STD_ON)
+#include "CDD_Rm.h"
+#endif /* #if (EEP_MCORE_ENABLED == STD_ON) */
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define EEP_VENDOR_ID_C                      43
+#define EEP_AR_RELEASE_MAJOR_VERSION_C       4
+#define EEP_AR_RELEASE_MINOR_VERSION_C       4
+#define EEP_AR_RELEASE_REVISION_VERSION_C    0
+#define EEP_SW_MAJOR_VERSION_C               1
+#define EEP_SW_MINOR_VERSION_C               0
+#define EEP_SW_PATCH_VERSION_C               0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if current file and Eep header file are of the same vendor */
+#if (EEP_VENDOR_ID_C != EEP_VENDOR_ID)
+    #error "Eep.c and Eep.h have different vendor ids"
+#endif
+/* Check if current file and Eep header file are of the same Autosar version */
+#if ((EEP_AR_RELEASE_MAJOR_VERSION_C    != EEP_AR_RELEASE_MAJOR_VERSION) || \
+     (EEP_AR_RELEASE_MINOR_VERSION_C    != EEP_AR_RELEASE_MINOR_VERSION) || \
+     (EEP_AR_RELEASE_REVISION_VERSION_C != EEP_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Eep.c and Eep.h are different"
+#endif
+/* Check if current file and Eep header file are of the same Software version */
+#if ((EEP_SW_MAJOR_VERSION_C != EEP_SW_MAJOR_VERSION) || \
+     (EEP_SW_MINOR_VERSION_C != EEP_SW_MINOR_VERSION) || \
+     (EEP_SW_PATCH_VERSION_C != EEP_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Eep.c and Eep.h are different"
+#endif
+
+/* Check if current file and Eep_IPW header file are of the same vendor */
+#if (EEP_VENDOR_ID_C != EEP_IPW_VENDOR_ID_H)
+    #error "Eep.c and Eep_IPW.h have different vendor ids"
+#endif
+/* Check if current file and Eep_IPW header file are of the same Autosar version */
+#if ((EEP_AR_RELEASE_MAJOR_VERSION_C    != EEP_IPW_AR_RELEASE_MAJOR_VERSION_H) || \
+     (EEP_AR_RELEASE_MINOR_VERSION_C    != EEP_IPW_AR_RELEASE_MINOR_VERSION_H) || \
+     (EEP_AR_RELEASE_REVISION_VERSION_C != EEP_IPW_AR_RELEASE_REVISION_VERSION_H) \
+    )
+    #error "AutoSar Version Numbers of Eep.c and Eep_IPW.h are different"
+#endif
+/* Check if current file and Eep_IPW header file are of the same Software version */
+#if ((EEP_SW_MAJOR_VERSION_C != EEP_IPW_SW_MAJOR_VERSION_H) || \
+     (EEP_SW_MINOR_VERSION_C != EEP_IPW_SW_MINOR_VERSION_H) || \
+     (EEP_SW_PATCH_VERSION_C != EEP_IPW_SW_PATCH_VERSION_H) \
+    )
+    #error "Software Version Numbers of Eep.c and Eep_IPW.h are different"
+#endif
+
+#if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and Dem header file are of the same Autosar version */
+    #if ((EEP_AR_RELEASE_MAJOR_VERSION_C != DEM_AR_RELEASE_MAJOR_VERSION) || \
+         (EEP_AR_RELEASE_MINOR_VERSION_C != DEM_AR_RELEASE_MINOR_VERSION) \
+        )
+        #error "AutoSar Version Numbers of Eep.c and Dem.h are different"
+    #endif
+#endif
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and Det header file are of the same Autosar version */
+    #if ((EEP_AR_RELEASE_MAJOR_VERSION_C != DET_AR_RELEASE_MAJOR_VERSION) || \
+         (EEP_AR_RELEASE_MINOR_VERSION_C != DET_AR_RELEASE_MINOR_VERSION) \
+        )
+        #error "AutoSar Version Numbers of Eep.c and Det.h are different"
+    #endif
+#endif
+
+#if (EEP_MCORE_ENABLED == STD_ON)
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and CDD_Rm header file are of the same Autosar version */
+    #if ((EEP_AR_RELEASE_MAJOR_VERSION_C != RM_AR_RELEASE_MAJOR_VERSION) || \
+         (EEP_AR_RELEASE_MINOR_VERSION_C != RM_AR_RELEASE_MINOR_VERSION) \
+        )
+        #error "AutoSar Version Numbers of Eep.c and CDD_Rm.h are different"
+    #endif
+#endif
+#endif /* #if (EEP_MCORE_ENABLED == STD_ON) */
+
+/*==================================================================================================
+*                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
+==================================================================================================*/
+
+/*==================================================================================================
+                                        LOCAL MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+                                       LOCAL CONSTANTS
+==================================================================================================*/
+
+
+/*==================================================================================================
+                                       LOCAL VARIABLES
+==================================================================================================*/
+
+#define EEP_START_SEC_VAR_CLEARED_UNSPECIFIED
+#include "Eep_MemMap.h"
+
+/**
+* @brief Maximum number of bytes to read or compare in one cycle of Eep_MainFunction
+*/
+static Eep_LengthType Eep_u32MaxRead;
+/**
+* @brief Maximum number of bytes to write in one cycle of Eep_MainFunction
+*/
+static Eep_LengthType Eep_u32MaxWrite;
+/**
+* @brief Logical address of data block currently processed by Eep_MainFunction
+*/
+static Eep_AddressType Eep_u32EepromAddrIt;
+/**
+* @brief Remainin length to be transfered until the end of the job
+*/
+static  Eep_LengthType Eep_u32RemainingLength;
+/**
+* @brief Result of last eeprom module job
+*
+*/
+static MemIf_JobResultType Eep_eJobResult;
+/**
+* @brief Type of currently executed job (erase, write, read, or compare)
+*/
+static Eep_JobType Eep_eJob;
+/**
+* @brief Pointer to current eeprom module configuration set
+*/
+static const Eep_ConfigType * Eep_pConfigPtr;
+/**
+* @brief Pointer to current eeprom module configuration set
+*/
+#if (EEP_MCORE_ENABLED == STD_ON)
+Eep_MCoreHwJobStatusType Eep_MCoreHwJobStatus;
+#endif
+#define EEP_STOP_SEC_VAR_CLEARED_UNSPECIFIED
+#include "Eep_MemMap.h"
+
+#define EEP_START_SEC_VAR_CLEARED_8
+#include "Eep_MemMap.h"
+/**
+* @brief Pointer to current position in source data buffer
+* @details Used by both write and compare jobs
+*/
+static const uint8 * Eep_pu8JobSrcAddrPtr;
+/**
+* @brief Pointer to current position in target data buffer
+* @details Used only by read job
+*/
+static uint8 * Eep_pu8JobDataDestPtr;
+
+#define EEP_STOP_SEC_VAR_CLEARED_8
+#include "Eep_MemMap.h"
+#define EEP_START_SEC_VAR_CLEARED_16
+#include "Eep_MemMap.h"
+
+/* If FTFC IP is present on the platform */
+#if (EEP_QUICK_WRITES_API == STD_ON)
+/**
+* @brief Requested urgency length to set up number of bytes used for quick writes
+* @details Used only by the Eep_QuickWrite, Eep_MainFunction
+*/
+static uint16 Eep_u16QuickWritesLength;
+#endif /* EEP_QUICK_WRITES_API */
+
+
+#define EEP_STOP_SEC_VAR_CLEARED_16
+#include "Eep_MemMap.h"
+#define EEP_START_SEC_VAR_CLEARED_32
+#include "Eep_MemMap.h"
+/**
+* @brief Pointer to current eeprom module configuration set
+*
+*/
+static uint32 Eep_u32AccCRCremainder;
+#if (EEP_MCORE_ENABLED == STD_ON)
+static uint32 Eep_u32DoMainID;
+#endif /* #if (EEP_MCORE_ENABLED == STD_ON)  */
+#define EEP_STOP_SEC_VAR_CLEARED_32
+#include "Eep_MemMap.h"
+
+/*==================================================================================================
+                                       GLOBAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      GLOBAL VARIABLES
+==================================================================================================*/
+
+/*==================================================================================================
+                                   LOCAL FUNCTION PROTOTYPES
+==================================================================================================*/
+#define EEP_START_SEC_CODE
+#include "Eep_MemMap.h"
+
+static void Eep_InitAllVarriable (void);
+static void Eep_AccumulateCRC (uint32 u32InputData);
+static void Eep_ResetCRC (void);
+static uint32 Eep_FinalizeCRC (void);
+static void Eep_UpdateCRCreminder (Eep_CrcDataSizeType eDataSize);
+static Eep_CrcType Eep_CalcCfgCRC (void);
+
+#if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+static void Eep_ReportDemErrors(void);
+static void Eep_ReportDemPasses(void);
+#endif
+static MemIf_JobResultType Eep_ProcessWriteJob (void);
+#if (EEP_QUICK_WRITES_API == STD_ON)
+static MemIf_JobResultType Eep_ProcessQuickWriteJob (void);
+#endif
+static MemIf_JobResultType Eep_ProcessReadJob (void);
+#if (EEP_COMPARE_API == STD_ON)
+static MemIf_JobResultType Eep_ProcessCompareJob (void);
+#endif
+static MemIf_JobResultType Eep_ProcessRequestedJobs (Eep_JobType eJob);
+static void Eep_CallNotification (MemIf_JobResultType eJobResult);
+static void Eep_EndJobs (void);
+#if (EEP_MCORE_ENABLED == STD_ON)
+static Eep_MCoreReqReturnType Eep_ReqMCore (void);
+static Std_ReturnType Eep_MCoreInitSema4sLock (void);
+static Std_ReturnType Eep_MCoreJobSema4Release (void);
+#endif /* #if (EEP_MCORE_ENABLED == STD_ON) */
+
+#define EEP_STOP_SEC_CODE
+#include "Eep_MemMap.h"
+
+/*==================================================================================================
+                                       LOCAL FUNCTIONS
+==================================================================================================*/
+#define EEP_START_SEC_CODE
+#include "Eep_MemMap.h"
+
+/**
+* @brief         Eep_InitAllVarriable
+* @details       Initialize global variables to their default values
+*
+* @param[in]     void
+*
+* @return        void
+* @pre           N/A
+*/
+static void Eep_InitAllVarriable (void)
+{
+    /* Initialize all global variable */
+    Eep_u32MaxRead = 0UL;
+    Eep_u32MaxWrite = 0UL;
+    Eep_u32EepromAddrIt = 0UL;
+    Eep_u32RemainingLength = 0UL;
+    Eep_eJobResult = MEMIF_JOB_OK;
+    Eep_eJob = EEP_JOB_ERASE;
+    Eep_pConfigPtr = NULL_PTR;
+    Eep_pu8JobSrcAddrPtr = NULL_PTR;
+    Eep_pu8JobDataDestPtr = NULL_PTR;
+
+/* If FTFC IP is present on the platform */
+#if (EEP_QUICK_WRITES_API == STD_ON)
+    Eep_u16QuickWritesLength = 0U;
+#endif /* EEP_QUICK_WRITES_API */
+
+    /* Initialize CRC remainder */
+    Eep_u32AccCRCremainder = 0U;
+#if (EEP_MCORE_ENABLED == STD_ON)
+    Eep_u32DoMainID = 0;
+    Eep_MCoreHwJobStatus = EEP_MCORE_HW_JOB_IDLE;
+#endif /* #if (EEP_MCORE_ENABLED == STD_ON)  */
+}
+
+/**
+* @brief        Function to handle cumulative CRC calculation over input data.
+*
+* @details      Handles cumulative CRC calculation over input 32-bit data, .
+*
+* @param[in]    inputData ... data to be CRC-ed
+*
+* @return       void
+* @retval       None.
+*
+* @pre          Eep_ResetCRC() was executed before the first call of
+*               Eep_AccumulateCRC().
+*
+*
+*/
+static void Eep_AccumulateCRC (uint32 u32InputData)
+{
+
+    if (0xFFFFU < u32InputData)
+    {
+        /* preparation for accumulation of higher 16 bits of the u32InputData */
+        Eep_u32AccCRCremainder = (Eep_u32AccCRCremainder << 16U) | (u32InputData >> 16U);
+        /* make 16-bit accumulated result (in lower 16-bits of Eep_u32AccCRCremainder) */
+        Eep_UpdateCRCreminder(EEP_CRC_16_BITS);
+    }
+
+    if (0xFFU < u32InputData)
+    {
+        /* preparation for accumulation of lower 16 bits of the u32InputData */
+        Eep_u32AccCRCremainder = (Eep_u32AccCRCremainder << 16U) | (u32InputData & 0x0000FFFFU);
+        /* make 16-bit accumulated result (in lower 16-bits of Eep_u32AccCRCremainder) */
+        Eep_UpdateCRCreminder(EEP_CRC_16_BITS);
+    }
+    else
+    {
+        /* optimization: only 8 LSB bits are processed */
+        /* preparation for accumulation of lower 8 bits of the u32InputData */
+        Eep_u32AccCRCremainder = (Eep_u32AccCRCremainder << 8U) | u32InputData;
+        /* make 16-bit accumulated result (in lower 16-bits of Eep_u32AccCRCremainder) */
+        Eep_UpdateCRCreminder(EEP_CRC_8_BITS);
+    }
+
+    return;
+}
+
+
+/**
+* @brief        Function to reset CRC calculation.
+*
+* @details      Resets accumulated Eep_u32AccCRCremainder.
+*
+* @param[in]    void
+*
+* @return       void
+* @retval       None.
+*
+* @pre          None.
+*
+*
+*/
+static void Eep_ResetCRC (void)
+{
+    Eep_u32AccCRCremainder = 0U;
+}
+
+/**
+* @brief        Function to finalize CRC calculation.
+*
+* @details      Finalizes accumulated CRC computation and resturns the final
+*               CRC checksum.
+*
+* @param[in]    void
+*
+* @return       uint32
+* @retval       The final CRC checksum in the lower 16 bits.
+*
+* @pre          Eep_AccumulateCRC() was executed at least once before
+*               calling Eep_FinalizeCRC().
+*
+*/
+static uint32 Eep_FinalizeCRC (void)
+{
+    /* add the final 0x0000 to the remainder */
+    Eep_u32AccCRCremainder = (Eep_u32AccCRCremainder << 16U);
+    /* make the final 16-bit CRC */
+    Eep_UpdateCRCreminder(EEP_CRC_16_BITS);
+
+    return Eep_u32AccCRCremainder;
+}
+
+/**
+* @brief        Function to perfom CRC calculation over input 32-bit data.
+*
+* @details      Process 32-bit data to 16-bit reminder.
+*
+* @param[in]    accDataPtr ... ptr to data to be processed
+*
+* @return       void
+* @retval       None.
+*
+* @pre          Can be called only from Eep_AccumulateCRC().
+*
+*/
+
+static void Eep_UpdateCRCreminder (Eep_CrcDataSizeType eDataSize)
+{
+    uint32 u32CrcPolynomSft;
+    uint32 u32LeadingOne;
+    uint32 u32AccDataLoc;
+    uint32 u32LeadingOneInitial;
+
+    switch (eDataSize)
+    {
+        case EEP_CRC_8_BITS:
+            u32CrcPolynomSft = 0x11021U << 7U; /* shifted CRC-16-CCITT (x.25 protocol)*/
+            u32LeadingOneInitial = 0x10000U << 7U;
+            break;
+        case EEP_CRC_16_BITS:
+        default:
+            u32CrcPolynomSft = 0x11021U << 15U; /* shifted CRC-16-CCITT (x.25 protocol)*/
+            u32LeadingOneInitial = 0x10000U << 15U;
+            break;
+    }
+
+    /* copy static variable to auto (computation over static may be slow) */
+    u32AccDataLoc = Eep_u32AccCRCremainder;
+
+    /* CRC computation */
+    for (u32LeadingOne = u32LeadingOneInitial; u32LeadingOne >= 0x00010000U; u32LeadingOne >>= 1U)
+    {
+        if ((u32AccDataLoc & u32LeadingOne) != 0U)
+        {
+            u32AccDataLoc ^= u32CrcPolynomSft;
+        }
+        u32CrcPolynomSft >>= 1U;
+    }
+
+    /* copy back to static variable */
+    Eep_u32AccCRCremainder = u32AccDataLoc;
+
+    return;
+}
+
+/**
+* @brief        Calculates CRC over Eep configuration.
+*
+* @details      Calculates CRC over selected items of Eep configuration set
+*               pointed to by ConfigPtr.
+*
+* @param[in]    ConfigPtr        Pointer to eeprom driver configuration set.
+*
+* @return       uint32
+* @retval       0 .. 0xFFFF (16-bit CRC using CRC-16-CCITT polynomial)
+*
+* @pre          Eep_pConfigPtr must not be properly initialized.
+*
+*/
+
+static Eep_CrcType Eep_CalcCfgCRC (void)
+{
+    /* Reset the accumulated CRC value */
+    Eep_ResetCRC();
+
+    /* Accumulate the rest of the params (common for all sectors within a config set) */
+    /* CRC - Accumulate eDefaultMode */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->eDefaultMode);
+    /* CRC - Accumulate u32MaxReadFastMode */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->u32MaxReadFastMode);
+    /* CRC - Accumulate u32MaxReadNormalMode */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->u32MaxReadNormalMode);
+    /* CRC - Accumulate u32MaxWriteFastMode */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->u32MaxWriteFastMode);
+    /* CRC - Accumulate u32MaxWriteNormalMode */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->u32MaxWriteNormalMode);
+#if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+    /* CRC - Accumulate EEP_E_COMPARE_FAILED */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_CompareFailedCfg.state);
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_CompareFailedCfg.id);
+    /* CRC - Accumulate EEP_E_ERASE_FAILED */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_EraseFailedCfg.state);
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_EraseFailedCfg.id);
+    /* CRC - Accumulate EEP_E_READ_FAILED */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_ReadFailedCfg.state);
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_ReadFailedCfg.id);
+    /* CRC - Accumulate EEP_E_WRITE_FAILED */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_WriteFailedCfg.state);
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_WriteFailedCfg.id);
+    /* CRC - Accumulate EEP_E_BO_MAINTENANCE */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_BOMaintenanceCfg.state);
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_BOMaintenanceCfg.id);
+    /* CRC - Accumulate EEP_E_BO_QUICK_WRITES */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_BOQuickWritesCfg.state);
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_BOQuickWritesCfg.id);
+    /* CRC - Accumulate EEP_E_BO_NORMAL_WRITES */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_BONormalWritesCfg.state);
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_BONormalWritesCfg.id);
+#if (EEP_HIGH_TEMP_CHIP == STD_ON)
+    /* CRC - Accumulate EEP_E_MGSTAT_BLOCK */
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_MGSTAT_BlockCfg.state);
+    Eep_AccumulateCRC((uint32)Eep_pConfigPtr->Eep_E_MGSTAT_BlockCfg.id);
+#endif
+#endif
+
+
+    return ((Eep_CrcType)Eep_FinalizeCRC());
+}
+
+/**
+* @brief        Function to call notifications
+*
+* @details      The Eep module shall call the callback function defined in the configuration parameter
+*               - EepJobEndNotification when a job has been completed with a positive result:  Read or Write or Erase or
+*                Compare finished & data blocks are equal.
+*               - EepJobErrorNotification when a job has been canceled or aborted with negative result:read or write or earse or
+*                Compare aborted or data blocks are not equal
+*
+* @param[in]    eJobResult ... data
+*
+* @return       void
+* @retval       None.
+*
+*/
+static void Eep_CallNotification (MemIf_JobResultType eJobResult)
+{
+    if (MEMIF_JOB_OK == eJobResult)
+    {
+        if (NULL_PTR != Eep_pConfigPtr->jobEndNotificationPtr)
+        {
+            /* Call EepJobEndNotification function if configured */
+            Eep_pConfigPtr->jobEndNotificationPtr();
+        }
+        else
+        {
+            /* Callback notification configured as null pointer */
+        }
+    }
+    else if ((MEMIF_JOB_FAILED == eJobResult) || (MEMIF_BLOCK_INCONSISTENT == eJobResult) ||
+            (MEMIF_JOB_CANCELED == eJobResult) || (MEMIF_JOB_PENDING == eJobResult))
+    {
+        if (NULL_PTR != Eep_pConfigPtr->jobErrorNotificationPtr)
+        {
+            /* Call EepJobErrorNotification function if configured */
+            Eep_pConfigPtr->jobErrorNotificationPtr();
+        }
+        else
+        {
+            /* Callback notification configured as null pointer */
+        }
+    }
+    else
+    {
+        ;/* Not done yet. There is more data to transfer in following Eep_MainFunction call .*/
+    }
+}
+
+#if (EEP_COMPARE_API == STD_ON)
+/**
+* @brief        Pocess the compare job
+*
+* @details      Compares data from Eep_pu8JobSrcAddrPtr to data from Eep_u32EepromAddrIt
+*               of lenth equal to Eep_u32MaxRead or Eep_u32RemainingLength.
+*
+* @param[in]
+*
+* @pre          The module must be initialized
+*
+*
+*
+*/
+static MemIf_JobResultType Eep_ProcessCompareJob (void)
+{
+    MemIf_JobResultType eRetVal    = MEMIF_JOB_PENDING;
+    Eep_ReturnType eTransferRetVal = EEP_E_OK;
+    uint32 u32TempSource           = 0UL;
+    Eep_LengthType u32TransfLength = 0UL;
+
+    /* the function will compare Eep_u32MaxRead or the remaining length */
+    /* compute length of transfer */
+    if (Eep_u32RemainingLength > Eep_u32MaxRead)
+    {
+        /* Eep_u32MaxWrite must be transferred */
+        u32TransfLength = Eep_u32MaxRead;
+    }
+    else
+    {
+        /* Eep_u32RemainingLength must be transferred */
+        u32TransfLength = Eep_u32RemainingLength;
+    }
+
+    /* if there is something to transfer */
+    if (u32TransfLength > 0UL)
+    {
+        eTransferRetVal = Eep_Ipw_CompareSync(Eep_u32EepromAddrIt, Eep_pu8JobSrcAddrPtr, u32TransfLength);
+    }
+    
+    /* update variables to be used for the next iteration */
+    u32TempSource = (uint32)Eep_pu8JobSrcAddrPtr;
+    u32TempSource = u32TempSource + u32TransfLength;
+    Eep_pu8JobSrcAddrPtr = (uint8 *)u32TempSource;
+    Eep_u32EepromAddrIt = Eep_u32EepromAddrIt + u32TransfLength;
+    Eep_u32RemainingLength = Eep_u32RemainingLength - u32TransfLength;
+
+    /* check status */
+    if (EEP_E_FAILED == eTransferRetVal)
+    {
+        /* job has failed */
+        eRetVal = MEMIF_JOB_FAILED;
+    }
+
+    if (EEP_E_BLOCK_INCONSISTENT == eTransferRetVal)
+    {
+        /* comparison failed */
+        eRetVal = MEMIF_BLOCK_INCONSISTENT;
+    }
+    else if ((0UL == Eep_u32RemainingLength) && (EEP_E_OK == eTransferRetVal))
+    {
+        /* the job is finished successfully */
+        eRetVal = MEMIF_JOB_OK;
+    }
+    else
+    {
+        /* do nothing */
+    }
+
+    return eRetVal;
+}
+#endif
+/**
+* @brief        Pocess a read job
+*
+* @details      Reads data from Eep_u32EepromAddrIt to Eep_pu8JobDataDestPtr
+*               of lenth equal to Eep_u32MaxRead or Eep_u32RemainingLength.
+*
+* @param[in]
+*
+* @pre          The module must be initialized
+*
+*
+*
+*/
+static MemIf_JobResultType Eep_ProcessReadJob (void)
+{
+    MemIf_JobResultType eRetVal = MEMIF_JOB_PENDING;
+    Eep_ReturnType eTransferRetVal = EEP_E_OK;
+    uint32 u32TempSource = 0UL;
+    Eep_LengthType u32TransfLength = 0UL;
+
+    /* transfer information to low level driver */
+    /* the function will read Eep_u32MaxRead or the remaining length */
+    /* compute length of transfer */
+    if (Eep_u32RemainingLength > Eep_u32MaxRead)
+    {
+        /* Eep_u32MaxWrite must be transferred */
+        u32TransfLength = Eep_u32MaxRead;
+    }
+    else
+    {
+        /* Eep_u32RemainingLength must be transferred */
+        u32TransfLength = Eep_u32RemainingLength;
+    }
+
+    /* if there is something to transfer */
+    if (u32TransfLength > 0UL)
+    {
+        eTransferRetVal = Eep_Ipw_Read(Eep_u32EepromAddrIt, Eep_pu8JobDataDestPtr, u32TransfLength);
+    }
+    
+    /* update variables to be used for the next iteration */
+    u32TempSource = (uint32)Eep_pu8JobDataDestPtr;
+    u32TempSource = u32TempSource + u32TransfLength;
+    Eep_pu8JobDataDestPtr = (uint8 *)u32TempSource;
+    Eep_u32EepromAddrIt = Eep_u32EepromAddrIt + u32TransfLength;
+    Eep_u32RemainingLength = Eep_u32RemainingLength - u32TransfLength;
+
+    /* check status */
+    if (EEP_E_FAILED == eTransferRetVal)
+    {
+        /* job has failed */
+        eRetVal = MEMIF_JOB_FAILED;
+    }
+    else if ((0UL == Eep_u32RemainingLength) && (EEP_E_OK == eTransferRetVal))
+    {
+        /* the job is finished */
+        eRetVal = MEMIF_JOB_OK;
+    }
+    else
+    {
+        /* do nothing */
+    }
+
+    return eRetVal;
+}
+
+/**
+* @brief        Pocess a write job
+*
+* @details      Performs the write operation for a main function call.
+*                Calls low level drivers for async or snc behavior.
+*
+* @param[in]
+*
+* @pre          The module must be initialized
+*
+*
+*
+*/
+static MemIf_JobResultType Eep_ProcessWriteJob (void)
+{
+    MemIf_JobResultType eRetVal    = MEMIF_JOB_PENDING;
+    Eep_ReturnType eTransferRetVal = EEP_E_OK;
+
+#if (EEP_ASYNC_WRITE_OPERATIONS_ENABLED == STD_OFF)
+    uint32 u32TempSource = 0UL;
+    Eep_LengthType u32TransfLength = 0UL;
+
+    /* transfer information to low level driver */
+    /* the function will write Eep_u32MaxWrite or the remaining length */
+    /* compute length of transfer */
+    if (Eep_u32RemainingLength > Eep_u32MaxWrite)
+    {
+        /* Eep_u32MaxWrite must be transferred */
+        u32TransfLength = Eep_u32MaxWrite;
+    }
+    else
+    {
+        /* Eep_u32RemainingLength must be transferred */
+        u32TransfLength = Eep_u32RemainingLength;
+    }
+
+    /* if there is something to transfer */
+    if (u32TransfLength > 0UL)
+    {
+        eTransferRetVal = Eep_Ipw_Write(Eep_u32EepromAddrIt, Eep_pu8JobSrcAddrPtr, u32TransfLength);
+    }
+    
+    /* update variables to be used for the next iteration */
+    u32TempSource = (uint32)Eep_pu8JobSrcAddrPtr;
+    u32TempSource = u32TempSource + u32TransfLength;
+    Eep_pu8JobSrcAddrPtr = (uint8 *)u32TempSource;
+    Eep_u32EepromAddrIt = Eep_u32EepromAddrIt + u32TransfLength;
+    Eep_u32RemainingLength = Eep_u32RemainingLength - u32TransfLength;
+#else
+    /* in asynchronous mode in one main function call EEP
+    * will trigger a hardware write operation for a 1,2, or 4 bytes page and return,
+    * it will not wait for operation to finish */
+    eTransferRetVal = Eep_Ipw_Write(Eep_u32EepromAddrIt, Eep_pu8JobSrcAddrPtr, Eep_u32RemainingLength);
+    /* Clear unused variable */
+    (void)Eep_u32MaxWrite;
+
+#endif /*#if (EEP_ASYNC_WRITE_OPERATIONS_ENABLED == STD_OFF)  */
+
+    if (EEP_E_FAILED == eTransferRetVal)
+    {
+        /* job has failed */
+        eRetVal = MEMIF_JOB_FAILED;
+    }
+#if (EEP_ASYNC_WRITE_OPERATIONS_ENABLED == STD_OFF)
+    else if ((0UL == Eep_u32RemainingLength) && (EEP_E_OK == eTransferRetVal))
+#else
+    else if (EEP_E_OK == eTransferRetVal)
+#endif /*#if (EEP_ASYNC_WRITE_OPERATIONS_ENABLED == STD_OFF)  */
+    {
+        /* the job is finished */
+        eRetVal = MEMIF_JOB_OK;
+        /* job is done */
+        Eep_u32RemainingLength = 0UL;
+    }
+    else
+    {
+        /* do nothing */
+    }
+
+    return eRetVal;
+}
+
+/* If FTFC IP is present on the platform */
+#if (EEP_QUICK_WRITES_API == STD_ON)
+
+/**
+* @brief        Pocess a quick write job
+*
+* @details      Performs the quick write operation for a main function call.
+*               Calls low level drivers for async or snc behavior.
+*
+* @pre          The module must be initialized
+*/
+static MemIf_JobResultType Eep_ProcessQuickWriteJob (void)
+{
+    MemIf_JobResultType eRetVal     = MEMIF_JOB_FAILED;
+    Eep_ReturnType eTransferRetVal  = EEP_E_OK;
+    uint16 Length                   = Eep_u16QuickWritesLength;
+
+    /* if there is something to transfer */
+    if (Eep_u32RemainingLength > 0UL)
+    {
+        eTransferRetVal = Eep_Ipw_QuickWrite(Eep_u32EepromAddrIt, Eep_pu8JobSrcAddrPtr, Length);
+
+        Eep_pu8JobSrcAddrPtr = (uint8*)((uint32)Eep_pu8JobSrcAddrPtr + Length);
+        Eep_u32EepromAddrIt += Length;
+        Eep_u32RemainingLength -= Length;
+    }
+
+    if (EEP_E_OK == eTransferRetVal)
+    {
+        if (0UL == Eep_u32RemainingLength)
+        {
+            eRetVal = MEMIF_JOB_OK;
+        }
+        else
+        {
+            eRetVal = MEMIF_JOB_PENDING;
+        }
+    }
+
+    return eRetVal;
+}
+
+#endif /* EEP_QUICK_WRITES_API */
+
+/**
+* @brief        Pocess a erase job
+*
+* @details      Performs the erase operation for a main function call.
+*                Calls low level drivers for async or snc behavior.
+*
+* @param[in]
+*
+* @pre          The module must be initialized
+*/
+static MemIf_JobResultType Eep_ProcessEraseJob (void)
+{
+    MemIf_JobResultType eRetVal    = MEMIF_JOB_PENDING;
+    Eep_ReturnType eTransferRetVal = EEP_E_OK;
+
+#if (EEP_ASYNC_ERASE_OPERATIONS_ENABLED == STD_OFF)
+    Eep_LengthType u32TransfLength = 0UL;
+
+    /* transfer information to low level driver */
+    /* the function will write Eep_u32MaxWrite or the remaining length */
+    /* compute length of transfer */
+    if (Eep_u32RemainingLength > Eep_u32MaxWrite)
+    {
+        /* Eep_u32MaxWrite must be transferred */
+        u32TransfLength = Eep_u32MaxWrite;
+    }
+    else
+    {
+        /* Eep_u32RemainingLength must be transferred */
+        u32TransfLength = Eep_u32RemainingLength;
+    }
+    /* if there is something to transfer */
+    if (u32TransfLength > 0UL)
+    {
+        eTransferRetVal = Eep_Ipw_Erase(Eep_u32EepromAddrIt, u32TransfLength);
+    }
+    
+    /* update variables to be used for the next iteration */
+    Eep_u32EepromAddrIt = Eep_u32EepromAddrIt + u32TransfLength;
+    Eep_u32RemainingLength = Eep_u32RemainingLength - u32TransfLength;
+#else
+    eTransferRetVal = Eep_Ipw_Erase(Eep_u32EepromAddrIt, Eep_u32RemainingLength);
+    /* Clear unused variable */
+    (void)Eep_u32MaxWrite;
+
+#endif /*#if (EEP_ASYNC_ERASE_OPERATIONS_ENABLED == STD_OFF)  */
+
+    if (EEP_E_FAILED == eTransferRetVal)
+    {
+        /* job has failed */
+        eRetVal = MEMIF_JOB_FAILED;
+    }
+    #if (EEP_ASYNC_ERASE_OPERATIONS_ENABLED == STD_OFF)
+    else if ((0UL == Eep_u32RemainingLength) && (EEP_E_OK == eTransferRetVal))
+    #else
+    else if (EEP_E_OK == eTransferRetVal)
+    #endif /*#if (EEP_ASYNC_ERASE_OPERATIONS_ENABLED == STD_OFF)  */
+    {
+        /* the job is finished */
+        eRetVal = MEMIF_JOB_OK;
+        /* job is done */
+        Eep_u32RemainingLength = 0UL;
+    }
+    else
+    {
+        /* do nothing */
+    }
+
+    return eRetVal;
+}
+
+
+/*==================================================================================================
+                                       GLOBAL FUNCTIONS
+==================================================================================================*/
+
+/**
+* @brief        The function initializes Eep module.
+* @details      The function sets the internal module variables according to given
+*               configuration set.
+*
+* @param[in]    pConfigPtr        Pointer to eeprom driver configuration set.
+*
+* @api
+*
+* @pre          @p pConfigPtr must not be @p NULL_PTR and the module status must not
+*               be @p MEMIF_BUSY.
+*
+* @implements     Eep_Init_Activity
+*
+*/
+
+void Eep_Init (const Eep_ConfigType * pConfigPtr)
+{
+    Eep_ReturnType eRetVal = EEP_E_OK;
+
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    /* check DET error codes */
+#if defined(EEP_PRECOMPILE_SUPPORT)
+    if (NULL_PTR != pConfigPtr)
+#else
+    if (NULL_PTR == pConfigPtr)
+#endif
+    {
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_INIT_ID, EEP_E_INIT_FAILED);
+    }
+    else if (MEMIF_JOB_PENDING == Eep_eJobResult)
+    {
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_INIT_ID, EEP_E_BUSY);
+    }
+    else
+    {
+#endif /* EEP_DEV_ERROR_DETECT */
+
+        Eep_InitAllVarriable();
+        
+        /* set the configuration pointer according to the config variant */
+    #if defined(EEP_PRECOMPILE_SUPPORT)
+        Eep_pConfigPtr = &Eep_PBCfgVariantPredefined;
+    #if (EEP_DEV_ERROR_DETECT == STD_OFF)
+        (void)pConfigPtr;
+    #endif
+    #else
+        Eep_pConfigPtr = pConfigPtr;
+    #endif
+
+        /* check configuration CRC */
+        if (Eep_pConfigPtr->u16ConfigCrc != Eep_CalcCfgCRC())
+        {
+        #if (EEP_DEV_ERROR_DETECT == STD_ON)
+            (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_INIT_ID, EEP_E_INIT_FAILED);
+            Eep_pConfigPtr = NULL_PTR;
+        #endif
+            Eep_eJobResult = MEMIF_JOB_FAILED;
+        }
+        else
+        {
+            /* Set the max number of bytes to read/write
+                during Eep_MainFunction call */
+            if (MEMIF_MODE_SLOW == Eep_pConfigPtr->eDefaultMode)
+            {
+                Eep_u32MaxRead = Eep_pConfigPtr->u32MaxReadNormalMode;
+                Eep_u32MaxWrite = Eep_pConfigPtr->u32MaxWriteNormalMode;
+            }
+            else
+            {
+                Eep_u32MaxRead = Eep_pConfigPtr->u32MaxReadFastMode;
+                Eep_u32MaxWrite = Eep_pConfigPtr->u32MaxWriteFastMode;
+            }
+
+        #if (EEP_MCORE_ENABLED == STD_ON)
+            /* Get domain ID from Xrdc which configured by users */
+            Eep_u32DoMainID = (uint32)Rm_XrdcGetDomainID();
+
+            /* Lock gate */
+            if (E_OK == Eep_MCoreInitSema4sLock())
+            {
+                /* Initialize eeprom hardware */
+                eRetVal = Eep_Ipw_Init(Eep_pConfigPtr);
+            }
+            else
+            {
+                /* Lock is not successful */
+                eRetVal = EEP_E_FAILED;
+                (void) Det_ReportRuntimeError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_INIT_ID, EEP_E_TIMEOUT);
+            }
+
+            /* Release the taken SEMA4s. */
+            if (E_OK != Eep_MCoreJobSema4Release())
+            {
+                /* Unlock is not successful */
+                eRetVal = EEP_E_FAILED;
+            }
+        #else
+            eRetVal = Eep_Ipw_Init(Eep_pConfigPtr);
+        #endif /* EEP_MCORE_ENABLED */
+
+            if (EEP_E_FAILED == eRetVal)
+            {
+                Eep_eJobResult = MEMIF_JOB_FAILED;
+            #if (EEP_DEV_ERROR_DETECT == STD_ON)
+                Eep_pConfigPtr = NULL_PTR;
+            #endif
+            }
+            else
+            {
+                Eep_eJobResult = MEMIF_JOB_OK;
+            }
+        }
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    }
+#endif
+}
+
+/**
+* @brief            Erase memory by writing erase value.
+* @details          Starts an erase job asynchronously. The actual job is performed
+ *                  by the Eep_MainFunction.
+*
+* @param[in]        TargetAddress        Target address in eeprom memory.
+* @param[in]        Length               Number of bytes to erase by writing the erased value.
+*
+* @return           Std_ReturnType
+* @retval           E_OK                    Erase command has been accepted.
+* @retval           E_NOT_OK                Erase command has not been accepted.
+*
+* @api
+*
+* @pre              The module has to be initialized and not busy.
+* @post
+*
+* @implements       Eep_Erase_Activity
+*
+*/
+Std_ReturnType Eep_Erase (Eep_AddressType u32TargetAddress,
+                          Eep_LengthType u32Length
+                         )
+{
+    Std_ReturnType u8RetVal = E_NOT_OK;
+    /* Check driver was initialized */
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    if (NULL_PTR == Eep_pConfigPtr)
+    {
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_ERASE_ID, EEP_E_UNINIT);
+    }
+    else
+    {
+#endif
+    if ((Std_ReturnType)E_OK == Eep_Ipw_CheckEraseParams(u32TargetAddress, u32Length))
+    {
+        SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_01();
+        if (MEMIF_JOB_PENDING == Eep_eJobResult)
+        {
+        #if (EEP_DEV_ERROR_DETECT == STD_ON)
+            (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_ERASE_ID, EEP_E_BUSY);
+        #endif
+            SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_01();
+        }
+        else
+        {
+            /* Configure the erase job */
+            Eep_u32EepromAddrIt = u32TargetAddress;
+            Eep_u32RemainingLength = u32Length;
+            Eep_eJob = EEP_JOB_ERASE;
+            Eep_eJobResult = MEMIF_JOB_PENDING;
+            SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_01();
+            u8RetVal = E_OK;
+        }
+    }
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    }
+#endif
+    return u8RetVal;
+}
+
+/**
+* @brief            Write one or more complete eeprom pages to the eeprom device.
+* @details          Starts a write job asynchronously. The actual job is performed by
+*                   Eep_MainFunction.
+*
+* @param[in]        TargetAddress        Target address in eeprom memory.
+* @param[in]        SourceAddressPtr     Pointer to source data buffer.
+* @param[in]        Length               Number of bytes to write.
+*
+* @return           Std_ReturnType
+* @retval           E_OK                 Write command has been accepted.
+* @retval           E_NOT_OK             Write command has not been accepted.
+*
+* @api
+*
+* @pre              The module has to be initialized and not busy.
+*
+* @implements       Eep_Write_Activity
+*
+*/
+Std_ReturnType Eep_Write (Eep_AddressType u32TargetAddress,
+                          const uint8 * pSourceAddressPtr,
+                          Eep_LengthType u32Length
+                         )
+{
+    Std_ReturnType u8RetVal = E_NOT_OK;
+
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    if (NULL_PTR == Eep_pConfigPtr)
+    {
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_WRITE_ID, EEP_E_UNINIT);
+    }
+    else
+    {
+#endif
+    if ((Std_ReturnType)E_OK == Eep_Ipw_CheckWriteParams(u32TargetAddress, pSourceAddressPtr, u32Length))
+    {
+        /* enter EA to protect global variables */
+        SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_02();
+
+        if (MEMIF_JOB_PENDING == Eep_eJobResult)
+        {
+        #if (EEP_DEV_ERROR_DETECT == STD_ON)
+            (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_WRITE_ID, EEP_E_BUSY);
+        #endif
+            SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_02();
+        }
+        else
+        {
+            /* Configure the write job */
+            /* uint32 destination address which will be incremented during job processing */
+            Eep_u32EepromAddrIt = u32TargetAddress;
+            /* uint8 source pointer which will be incremented during job processing */
+            Eep_pu8JobSrcAddrPtr = pSourceAddressPtr;
+            /* remaining length to be transfered */
+            Eep_u32RemainingLength = u32Length;
+            Eep_eJob = EEP_JOB_WRITE;
+            Eep_eJobResult = MEMIF_JOB_PENDING;
+            SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_02();
+            u8RetVal = E_OK;
+        }
+    }
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    }
+#endif
+    return u8RetVal;
+}
+
+/* If FTFC IP is present on the platform */
+#if (EEP_QUICK_WRITES_API == STD_ON)
+
+/**
+* @brief            Write one or more complete eeprom pages to the eeprom device in quick write mode.
+* @details          Starts a write job asynchronously. The actual job is performed by
+*                   Eep_MainFunction.
+*
+* @param[in]        TargetAddress               Target address in eeprom memory.
+* @param[in]        SourceAddressPtr            Pointer to source data buffer.
+* @param[in]        Length                      Number of bytes to write.
+* @param[in]        u16QuickWritesLength        Number of bytes to allocated for quick write
+*
+* @return           Std_ReturnType
+* @retval           E_OK                 Write command has been accepted.
+* @retval           E_NOT_OK             Write command has not been accepted.
+*
+* @api
+*
+* @pre              The module has to be initialized and not busy.
+* @implements       Eep_QuickWrite_Activity
+*/
+Std_ReturnType Eep_QuickWrite (Eep_AddressType u32TargetAddress,
+                               uint8 const * pSourceAddressPtr,
+                               Eep_LengthType u32Length,
+                               uint16 u16QuickWritesLength
+                              )
+{
+    Std_ReturnType retVal = E_NOT_OK;
+    Eep_ReturnType EepIpwReturn = EEP_E_OK;
+    uint8 const * pSourceAdd = pSourceAddressPtr;
+    Eep_LengthType u32LengthRemaining = u32Length;
+    Eep_AddressType u32DestAdd = u32TargetAddress;
+
+    /* in the quick writes mode only 4 bytes alligned writes are allowed */
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    if (NULL_PTR == Eep_pConfigPtr)
+    {
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_QUICK_WRITE_ID, EEP_E_UNINIT);
+    }
+    else
+    {
+#endif
+    if ((Std_ReturnType)E_OK == Eep_Ipw_CheckQuickWriteParams(u32DestAdd, pSourceAdd, u32LengthRemaining, u16QuickWritesLength))
+    {
+        SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_05();
+        if (MEMIF_JOB_PENDING == Eep_eJobResult)
+        {
+            SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_05();
+        #if (EEP_DEV_ERROR_DETECT == STD_ON)
+            (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_QUICK_WRITE_ID, EEP_E_BUSY);
+        #endif
+        }
+        else
+        {
+            EepIpwReturn = Eep_Ipw_QuickWrite(u32DestAdd, pSourceAdd, u16QuickWritesLength);
+            pSourceAdd = (uint8*)((uint32)pSourceAdd + u16QuickWritesLength);
+            u32DestAdd += u16QuickWritesLength;
+            u32LengthRemaining -= u16QuickWritesLength;
+
+            if (u32LengthRemaining == 0U)
+            {
+                if (EEP_E_OK == EepIpwReturn)
+                {
+                    Eep_eJobResult = MEMIF_JOB_OK;
+                    retVal = E_OK;
+                }
+                else
+                {
+                    Eep_eJobResult = MEMIF_JOB_FAILED;
+                }
+            }
+            else
+            {
+                if (EEP_E_OK == EepIpwReturn)
+                {
+                    /* uint8 source pointer which will be incremented during job processing */
+                    Eep_pu8JobSrcAddrPtr = pSourceAdd;
+                    /* uint32 destination address which will be incremented during job processing */
+                    Eep_u32EepromAddrIt = u32DestAdd;
+                    Eep_u32RemainingLength = u32LengthRemaining;
+                    Eep_u16QuickWritesLength = u16QuickWritesLength;
+                    Eep_eJob = EEP_JOB_QUICK_WRITE;
+
+                    Eep_eJobResult = MEMIF_JOB_PENDING;
+                    retVal = E_OK;
+                }
+                else
+                {
+                    Eep_eJobResult = MEMIF_JOB_FAILED;
+                }
+            }
+
+            SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_05();
+        }
+    }
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    }
+#endif
+    return retVal;
+}
+
+#endif /* EEP_QUICK_WRITES_API */
+
+#if (EEP_CANCEL_API == STD_ON)
+/**
+* @brief            Cancel an ongoing eeprom read, write, erase or compare job.
+* @details          Abort a running job synchronously so that directly after returning
+*                   from this function a new job can be started.
+*
+* @api
+*
+* @pre              The module must be initialized.
+* @post             @p Eep_Cancel changes module status and @p Eep_eJobResult
+*                   internal variable.
+*
+* @implements       Eep_Cancel_Activity
+*/
+void Eep_Cancel (void)
+{
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    if (NULL_PTR == Eep_pConfigPtr)
+    {
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_CANCEL_ID, EEP_E_UNINIT);
+    }
+    else
+    {
+#endif
+        SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_06();
+        if (MEMIF_JOB_PENDING == Eep_eJobResult)
+        {
+        #if (EEP_MCORE_ENABLED == STD_ON)
+            /* Lock gate */
+            if (EEP_MCORE_HW_JOB_STARTED == Eep_MCoreHwJobStatus)
+            {
+        #endif /* #if (EEP_MCORE_ENABLED == STD_ON)*/
+                /* If underlying hardware job was successfully canceled */
+                if (EEP_E_OK == Eep_Ipw_Cancel())
+                {
+                    /* Update global job result status */
+                    Eep_eJobResult = MEMIF_JOB_CANCELED;
+                }
+        #if (EEP_MCORE_ENABLED == STD_ON)
+            }
+            else
+            {
+                /* Job is not started on hardware */
+                Eep_eJobResult = MEMIF_JOB_CANCELED;
+            }
+            if ((Std_ReturnType)E_OK != (Std_ReturnType)(Eep_MCoreJobSema4Release()))
+            {
+                /* Unlock is not successful */
+                Eep_eJobResult = MEMIF_JOB_FAILED;
+            }
+            Eep_MCoreHwJobStatus = EEP_MCORE_HW_JOB_IDLE;
+        #endif /* #if (EEP_MCORE_ENABLED == STD_ON)*/
+            /* Call the error notification function if configured */
+            Eep_CallNotification(Eep_eJobResult);
+        }
+        else
+        {
+            /* Leave the job result unchanged */
+        }
+        SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_06();
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+    }
+    #endif    /* EEP_DEV_ERROR_DETECT == STD_ON */
+}
+#endif    /* EEP_CANCEL_API == STD_ON */
+
+
+#if (EEP_GET_STATUS_API == STD_ON)
+/**
+* @brief            Returns the EEP module status.
+* @details          Returns the EEP module status synchronously.
+*
+* @return           MemIf_StatusType
+* @retval           MEMIF_UNINIT        Module has not been initialized (yet).
+* @retval           MEMIF_IDLE          Module is currently idle.
+* @retval           MEMIF_BUSY          Module is currently busy.
+*
+* @api
+*
+* @implements       Eep_GetStatus_Activity
+*/
+MemIf_StatusType Eep_GetStatus (void)
+{
+    MemIf_StatusType eRetVal = MEMIF_IDLE;
+    /* Check the driver was initialized */
+    if (NULL_PTR == Eep_pConfigPtr)
+    {
+        eRetVal = MEMIF_UNINIT;
+    }
+    /* There is a pending job */
+    else if (MEMIF_JOB_PENDING == Eep_eJobResult)
+    {
+        eRetVal = MEMIF_BUSY;
+    }
+    else
+    {
+        eRetVal = MEMIF_IDLE;
+    }
+
+    return eRetVal;
+}
+#endif    /* EEP_GET_STATUS_API == STD_ON */
+
+
+#if (EEP_GET_JOB_RESULT_API == STD_ON)
+/**
+* @brief            Returns the result of the last job.
+* @details          Returns synchronously the result of the last job.
+*
+* @return           MemIf_JobResultType
+* @retval           MEMIF_JOB_OK              Successfully completed job.
+* @retval           MEMIF_JOB_FAILED          Not successfully completed job.
+* @retval           MEMIF_JOB_PENDING         Still pending job (not yet completed).
+* @retval           MEMIF_JOB_CANCELED        Job has been canceled.
+* @retval           MEMIF_BLOCK_INCONSISTENT  Inconsistent block requested, it may
+*                                             contains corrupted data.
+* @retval           MEMIF_BLOCK_INVALID       Invalid block requested.
+*
+* @api
+*
+* @implements       Eep_GetJobResult_Activity
+*/
+MemIf_JobResultType Eep_GetJobResult (void)
+{
+    MemIf_JobResultType eRetVal = MEMIF_JOB_OK;
+    /* Check the driver was initialized */
+    if (NULL_PTR == Eep_pConfigPtr)
+    {
+        #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_GETJOBRESULT_ID, EEP_E_UNINIT);
+        #endif
+        eRetVal = (MemIf_JobResultType)MEMIF_JOB_FAILED;
+    }
+    else
+    {
+        /* Get the job result */
+        eRetVal = Eep_eJobResult;
+    }
+    return eRetVal;
+}
+#endif
+
+
+/**
+* @brief            Reads from eeprom memory.
+* @details          Starts a read job asynchronously. The actual job is performed by
+*                   @p Eep_MainFunction.
+*
+* @param[in]        SourceAddress        Source address in eeprom memory.
+* @param[in]        Length               Number of bytes to read.
+* @param[out]       TargetAddressPtr    Pointer to target data buffer.
+*
+* @return           MemIf_JobResultType
+* @retval           MEMIF_JOB_OK              Successfully completed job.
+* @retval           MEMIF_JOB_FAILED          Not successfully completed job.
+* @retval           MEMIF_JOB_PENDING         Still pending job (not yet completed).
+* @retval           MEMIF_JOB_CANCELED        Job has been canceled.
+* @retval           MEMIF_BLOCK_INCONSISTENT  Inconsistent block requested, it may
+*                                             contains corrupted data.
+* @retval           MEMIF_BLOCK_INVALID       Invalid block requested.
+*
+* @api
+*
+* @pre            The module has to be initialized and not busy.
+* @post
+*
+* @implements       Eep_Read_Activity
+*
+*/
+Std_ReturnType Eep_Read (Eep_AddressType u32SourceAddress,
+                         uint8 * pTargetAddressPtr,
+                         Eep_LengthType u32Length
+                        )
+{
+    Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
+    /* Check driver was initialized */
+    if (NULL_PTR == Eep_pConfigPtr)
+    {
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_READ_ID, EEP_E_UNINIT);
+#endif
+        u8RetVal = (Std_ReturnType)E_NOT_OK;
+    }
+    else if ((Std_ReturnType)E_NOT_OK == Eep_Ipw_CheckReadParams(u32SourceAddress, pTargetAddressPtr, u32Length))
+    {
+        u8RetVal = E_NOT_OK;
+    }
+    else
+    {
+        SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_03();
+
+        if (MEMIF_JOB_PENDING == Eep_eJobResult)
+        {
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_READ_ID, EEP_E_BUSY);
+#endif    /* EEP_DEV_ERROR_DETECT == STD_ON */
+            u8RetVal = (Std_ReturnType)E_NOT_OK;
+        }
+        else
+        {
+            /* Configure the read job */
+            Eep_u32EepromAddrIt = u32SourceAddress;
+            Eep_pu8JobDataDestPtr = pTargetAddressPtr;
+            Eep_u32RemainingLength = u32Length;
+            Eep_eJob = EEP_JOB_READ;
+            /* Execute the read job */
+            Eep_eJobResult = MEMIF_JOB_PENDING;
+
+        }
+        SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_03();
+    }
+
+    return u8RetVal;
+}
+
+
+#if (EEP_COMPARE_API == STD_ON)
+/**
+* @brief           Compares a eeprom memory area with an application data buffer.
+* @details         Starts a compare job asynchronously. The actual job is performed by
+*                  Eep_MainFunction.
+*
+* @param[in]        SourceAddress          Source address in eeprom memory.
+* @param[in]        TargetAddressPtr       Pointer to source data buffer.
+* @param[in]        Length                 Number of bytes to compare.
+*
+* @return           Std_ReturnType
+* @retval           E_OK                      Compare command has been accepted.
+* @retval           E_NOT_OK                   Compare command has not been accepted.
+*
+* @api
+*
+* @pre            The module has to be initialized and not busy.
+*
+* @implements       Eep_Compare_Activity
+*/
+Std_ReturnType Eep_Compare (Eep_AddressType u32SourceAddress,
+                            const uint8 * pTargetAddressPtr,
+                            Eep_LengthType u32Length
+                           )
+{
+    Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
+    /* Check driver was initialized */
+    if (NULL_PTR == Eep_pConfigPtr)
+    {
+        #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_COMPARE_ID, EEP_E_UNINIT);
+        #endif
+        u8RetVal = (Std_ReturnType)E_NOT_OK;
+    }
+    else if ((Std_ReturnType)E_NOT_OK == Eep_Ipw_CheckCompareParams(u32SourceAddress, pTargetAddressPtr, u32Length))
+    {
+        u8RetVal = E_NOT_OK;
+    }
+    else
+    {
+        SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_04();
+
+        if (MEMIF_JOB_PENDING == Eep_eJobResult)
+        {
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_COMPARE_ID, EEP_E_BUSY);
+#endif    /* EEP_DEV_ERROR_DETECT == STD_ON */
+            u8RetVal = (Std_ReturnType)E_NOT_OK;
+        }
+        else
+        {
+            /* Set job for compare operation */
+            Eep_u32EepromAddrIt = u32SourceAddress;
+            Eep_pu8JobSrcAddrPtr = pTargetAddressPtr;
+            Eep_u32RemainingLength = u32Length;
+            Eep_eJob = EEP_JOB_COMPARE;
+            Eep_eJobResult = MEMIF_JOB_PENDING;
+        }
+        SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_04();
+    }
+
+    return u8RetVal;
+}
+#endif /* EEP_COMPARE_API == STD_ON */
+
+#if (EEP_SET_MODE_API == STD_ON)
+/**
+* @brief           Sets the EEP module's operation mode to the given Mode.
+* @details         Every given mode determinates maximum bytes for read-write
+ *                 operations. Every mode has a set of pre-configured values.
+*
+* @param[in]        Mode        MEMIF_MODE_FAST or MEMIF_MODE_SLOW.
+*
+* @api
+*
+* @pre            The module has to be initialized and not busy.
+* @post           @p Eep_SetMode changes internal variables @p Eep_u32MaxRead and
+*                 @p Eep_u32MaxWrite.
+*
+* @implements       Eep_SetMode_Activity
+*/
+void Eep_SetMode (MemIf_ModeType eMode)
+{
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    if (NULL_PTR == Eep_pConfigPtr)
+    {
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_SETMODE_ID, EEP_E_UNINIT);
+    }
+    else if (MEMIF_JOB_PENDING == Eep_eJobResult)
+    {
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_SETMODE_ID, EEP_E_BUSY);
+    }
+    else
+    {
+#endif  /* EEP_DEV_ERROR_DETECT == STD_ON */
+        /* Set the max number of bytes to read/write
+            during Eep_MainFunction call */
+        switch (eMode)
+        {
+            case MEMIF_MODE_FAST:
+                Eep_u32MaxRead = Eep_pConfigPtr->u32MaxReadFastMode;
+                Eep_u32MaxWrite = Eep_pConfigPtr->u32MaxWriteFastMode;
+                break;
+
+            case MEMIF_MODE_SLOW:
+                Eep_u32MaxRead = Eep_pConfigPtr->u32MaxReadNormalMode;
+                Eep_u32MaxWrite = Eep_pConfigPtr->u32MaxWriteNormalMode;
+                break;
+
+            default:
+                /* Do nothing - should not happen in Fully Trusted Environment;
+                   'default' clause added to fulfill MISRA Rule 15.3 */
+                break;
+        }
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    }
+#endif    /* EEP_DEV_ERROR_DETECT == STD_ON */
+}
+#endif /* EEP_SET_MODE_API == STD_ON */
+
+#if (EEP_VERSION_INFO_API == STD_ON)
+/**
+* @brief        Returns version information about EEP module.
+* @details      Version information includes:
+*               - Module Id
+*               - Vendor Id
+*               - Vendor specific version numbers (BSW00407).
+*
+* @param[in,out] pVersionInfoPtr  Pointer to where to store the version information of this module.
+*
+* @api
+*
+* @implements       Eep_GetVersionInfo_Activity
+*
+*/
+void Eep_GetVersionInfo (Std_VersionInfoType * pVersionInfoPtr)
+{
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    if (NULL_PTR == pVersionInfoPtr)
+    {
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_GETVERSIONINFO_ID, EEP_E_PARAM_POINTER);
+    }
+    else
+    {
+#endif /* EEP_DEV_ERROR_DETECT == STD_ON */
+        pVersionInfoPtr->moduleID = (uint16)EEP_MODULE_ID;
+        pVersionInfoPtr->vendorID = (uint16)EEP_VENDOR_ID;
+        pVersionInfoPtr->sw_major_version = (uint8)EEP_SW_MAJOR_VERSION;
+        pVersionInfoPtr->sw_minor_version = (uint8)EEP_SW_MINOR_VERSION;
+        pVersionInfoPtr->sw_patch_version = (uint8)EEP_SW_PATCH_VERSION;
+#if (EEP_DEV_ERROR_DETECT == STD_ON)
+    }
+#endif /* EEP_DEV_ERROR_DETECT == STD_ON */
+}
+#endif
+
+#if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+ /**
+* @brief        Reports DEM errors
+* @details      Reports production errors.
+*
+* @param[in,out] -
+*
+* @api
+*
+*/
+static void Eep_ReportDemErrors (void)
+{
+    switch (Eep_eJob)
+    {
+        case EEP_JOB_ERASE:
+            if ((uint32)STD_ON == Eep_pConfigPtr->Eep_E_EraseFailedCfg.state)
+            {
+                (void)Dem_SetEventStatus((Dem_EventIdType)Eep_pConfigPtr->Eep_E_EraseFailedCfg.id, DEM_EVENT_STATUS_FAILED);
+            }
+            break;
+        case EEP_JOB_WRITE:
+            if ((uint32)STD_ON == Eep_pConfigPtr->Eep_E_WriteFailedCfg.state)
+            {
+                (void)Dem_SetEventStatus((Dem_EventIdType)Eep_pConfigPtr->Eep_E_WriteFailedCfg.id, DEM_EVENT_STATUS_FAILED);
+            }
+            break;
+        case EEP_JOB_READ:
+            if ((uint32)STD_ON == Eep_pConfigPtr->Eep_E_ReadFailedCfg.state)
+            {
+                (void)Dem_SetEventStatus((Dem_EventIdType)Eep_pConfigPtr->Eep_E_ReadFailedCfg.id, DEM_EVENT_STATUS_FAILED);
+            }
+            break;
+    #if (EEP_COMPARE_API == STD_ON)
+        case EEP_JOB_COMPARE:
+            if ((uint32)STD_ON == Eep_pConfigPtr->Eep_E_CompareFailedCfg.state)
+            {
+                (void)Dem_SetEventStatus((Dem_EventIdType)Eep_pConfigPtr->Eep_E_CompareFailedCfg.id, DEM_EVENT_STATUS_FAILED);
+            }
+            break;
+    #endif
+    
+    #if (EEP_QUICK_WRITES_API == STD_ON)
+        case EEP_JOB_QUICK_WRITE:
+            if ((uint32)STD_ON == Eep_pConfigPtr->Eep_E_BOQuickWritesCfg.state)
+            {
+                (void)Dem_SetEventStatus((Dem_EventIdType)Eep_pConfigPtr->Eep_E_BOQuickWritesCfg.id, DEM_EVENT_STATUS_FAILED);
+            }
+            break;
+    #endif
+
+        default:
+            /* Do nothing - should not happen in Fully Trusted Environment;
+               'default' clause added to fulfill MISRA Rule 15.3 */
+            break;
+    }
+}
+/**
+* @brief        Reports DEM passes
+* @details      Reports production passes.
+*
+* @param[in,out] -
+*
+* @api
+*
+*/
+static void Eep_ReportDemPasses (void)
+{
+    switch (Eep_eJob)
+    {
+        case EEP_JOB_ERASE:
+            if ((uint32)STD_ON == Eep_pConfigPtr->Eep_E_EraseFailedCfg.state)
+            {
+                (void)Dem_SetEventStatus((Dem_EventIdType)Eep_pConfigPtr->Eep_E_EraseFailedCfg.id, DEM_EVENT_STATUS_PASSED);
+            }
+            break;
+        case EEP_JOB_WRITE:
+            if ((uint32)STD_ON == Eep_pConfigPtr->Eep_E_WriteFailedCfg.state)
+            {
+                (void)Dem_SetEventStatus((Dem_EventIdType)Eep_pConfigPtr->Eep_E_WriteFailedCfg.id, DEM_EVENT_STATUS_PASSED);
+            }
+            break;
+        case EEP_JOB_READ:
+            if ((uint32)STD_ON == Eep_pConfigPtr->Eep_E_ReadFailedCfg.state)
+            {
+                (void)Dem_SetEventStatus((Dem_EventIdType)Eep_pConfigPtr->Eep_E_ReadFailedCfg.id, DEM_EVENT_STATUS_PASSED);
+            }
+            break;
+    #if (EEP_COMPARE_API == STD_ON)
+        case EEP_JOB_COMPARE:
+            if ((uint32)STD_ON == Eep_pConfigPtr->Eep_E_CompareFailedCfg.state)
+            {
+                (void)Dem_SetEventStatus((Dem_EventIdType)Eep_pConfigPtr->Eep_E_CompareFailedCfg.id, DEM_EVENT_STATUS_PASSED);
+            }
+            break;
+    #endif
+
+    #if (EEP_QUICK_WRITES_API == STD_ON)
+        case EEP_JOB_QUICK_WRITE:
+            if ((uint32)STD_ON == Eep_pConfigPtr->Eep_E_BOQuickWritesCfg.state)
+            {
+                (void)Dem_SetEventStatus((Dem_EventIdType)Eep_pConfigPtr->Eep_E_BOQuickWritesCfg.id, DEM_EVENT_STATUS_PASSED);
+            }
+            break;
+    #endif
+
+        default:
+            /* Do nothing - should not happen in Fully Trusted Environment;
+               default clause added to fulfill MISRA Rule 15.3 */
+            break;
+    }
+}
+#endif
+/**
+* @brief            Performs actual eeprom read, write, erase and compare jobs.
+* @pre              The module has to be initialized.
+* @param[in]        eJob  Currently executed job (erase, write, read, or compare)
+*
+* @return           MemIf_JobResultType
+* @retval           MEMIF_JOB_OK              Successfully completed job.
+* @retval           MEMIF_JOB_FAILED          Not successfully completed job.
+* @retval           MEMIF_JOB_PENDING         Still pending job (not yet completed).
+* @retval           MEMIF_JOB_CANCELED        Job has been canceled.
+* @retval           MEMIF_BLOCK_INCONSISTENT  Inconsistent block requested, it may
+*                                             contains corrupted data.
+* @retval           MEMIF_BLOCK_INVALID       Invalid block requested.
+
+*/
+static MemIf_JobResultType Eep_ProcessRequestedJobs (Eep_JobType eJob)
+{
+    MemIf_JobResultType eRetVal = MEMIF_JOB_FAILED;
+
+    switch (eJob)
+    {
+        case EEP_JOB_ERASE:
+            /* Process erase job */
+            eRetVal = Eep_ProcessEraseJob();
+            break;
+        case EEP_JOB_WRITE:
+            /* Process write job */
+            eRetVal = Eep_ProcessWriteJob();
+            break;
+        case EEP_JOB_READ:
+            /* Process read job */
+            eRetVal = Eep_ProcessReadJob();
+            break;
+    #if (EEP_COMPARE_API == STD_ON)
+        case EEP_JOB_COMPARE:
+            /* Process compare job */
+            eRetVal = Eep_ProcessCompareJob();
+            break;
+    #endif
+    #if (EEP_QUICK_WRITES_API == STD_ON)
+        case EEP_JOB_QUICK_WRITE:
+            eRetVal = Eep_ProcessQuickWriteJob();
+            break;
+    #endif
+        default:
+            /* Do nothing - should not happen in Fully Trusted Environment;
+               'default' clause added to fulfill MISRA Rule 15.3 */
+            break;
+    }
+    return eRetVal;
+}
+
+/**
+* @brief            Only executed at the end of a new job
+*
+* @param[in]        None
+*
+* @pre              The module has to be initialized.
+*
+*/
+static void Eep_EndJobs (void)
+{
+#if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+    /* if job failed report errors */
+    if (MEMIF_JOB_FAILED == Eep_eJobResult)
+    {
+        Eep_ReportDemErrors();
+    }
+    else if (MEMIF_JOB_OK == Eep_eJobResult)
+    {
+        Eep_ReportDemPasses();
+    }
+    else
+    {
+       /* Not report any dems */
+    }
+#endif
+
+    /* call notifications when job was finished */
+    if ((MEMIF_JOB_FAILED == Eep_eJobResult) || (MEMIF_BLOCK_INCONSISTENT == Eep_eJobResult) || (MEMIF_JOB_OK == Eep_eJobResult))
+    {
+        Eep_CallNotification(Eep_eJobResult);
+    }
+}
+
+/**
+* @brief            Performs actual eeprom read, write, erase and compare jobs.
+* @details          Bytes number processed per cycle depends by job type (erase, write, read, compare)
+*                   current EEP module's operating mode (normal, fast)
+*                   and write, erase Mode of Execution (sync, async).
+*
+* @api
+*
+* @pre              The module has to be initialized.
+*
+*
+* @note             This function have to be called ciclically by the Basic Software Module;
+*                   it will do nothing if there aren't pending job.
+* @implements       Eep_MainFunction_Activity
+*/
+void Eep_MainFunction (void)
+{
+#if (STD_ON == EEP_MCORE_ENABLED)
+    static uint32 u32TimeoutTicks = 0U;
+    static uint32 u32CurrentTicks = 0U;
+    static uint32 u32ElapsedTicks = 0U;
+    Eep_MCoreReqReturnType eMcoreStatus;
+#endif
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+    if (NULL_PTR == Eep_pConfigPtr)
+    {
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_MAINFUNCTION_ID, EEP_E_UNINIT);
+    }
+    else
+    {
+    #endif
+        if (MEMIF_JOB_PENDING == Eep_eJobResult)
+        {
+        #if (STD_ON == EEP_MCORE_ENABLED)
+            if (EEP_MCORE_HW_JOB_IDLE == Eep_MCoreHwJobStatus)
+            {
+                u32TimeoutTicks = OsIf_MicrosToTicks(EEP_MCORE_LOCK_GATES_TIMEOUT,(OsIf_CounterType)USDHC_IP_TIMEOUT_TYPE);
+                u32CurrentTicks = OsIf_GetCounter((OsIf_CounterType)USDHC_IP_TIMEOUT_TYPE);
+                u32ElapsedTicks = 0U;
+                Eep_MCoreHwJobStatus = EEP_MCORE_HW_JOB_MAINF_STARTED;
+            }
+            eMcoreStatus = Eep_ReqMCore();
+            if (EEP_MCORE_PENDING == eMcoreStatus)
+            {
+                u32ElapsedTicks += OsIf_GetElapsed(&u32CurrentTicks, (OsIf_CounterType)USDHC_IP_TIMEOUT_TYPE);
+                if (u32ElapsedTicks >= u32TimeoutTicks)
+                {
+                    Eep_eJobResult = MEMIF_JOB_FAILED;
+                    (void)Det_ReportRuntimeError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_MAINFUNCTION_ID, EEP_E_TIMEOUT);
+                }
+            }
+            else
+            {
+                /* Seme4 is granted */
+                Eep_MCoreHwJobStatus = EEP_MCORE_HW_JOB_STARTED;
+        #endif /* #if (EEP_MCORE_ENABLED == STD_ON) */
+
+                /* Process the requested jobs : write, compare, erase, read */
+                Eep_eJobResult = Eep_ProcessRequestedJobs(Eep_eJob);
+
+        #if (EEP_MCORE_ENABLED == STD_ON)
+            }
+        #endif /*#if (EEP_MCORE_ENABLED == STD_ON)*/
+
+            if (MEMIF_JOB_PENDING != Eep_eJobResult)
+            {
+            #if (EEP_MCORE_ENABLED == STD_ON)
+                Eep_MCoreHwJobStatus = EEP_MCORE_HW_JOB_IDLE;
+                /* Release any sema4 used for processing this job in multicore context, if any was used. */
+                if ((Std_ReturnType)E_OK != (Std_ReturnType)(Eep_MCoreJobSema4Release()))
+                {
+                    /* Release is not successful */
+                    Eep_eJobResult = MEMIF_JOB_FAILED;
+                }
+            #endif /*#if (EEP_MCORE_ENABLED == STD_ON)*/
+                /* only executed at the end of a new job */
+                Eep_EndJobs();
+            }
+        }
+        else
+        {
+            /* Nothing to do since no job is pending */
+        }
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+    }
+    #endif    /* EEP_DEV_ERROR_DETECT == STD_ON */
+}
+
+#if (EEP_MCORE_ENABLED == STD_ON)
+static Eep_MCoreReqReturnType Eep_ReqMCore(void)
+{
+    uint32 u32GetGateStatus;
+    Eep_MCoreReqReturnType eRetVal = EEP_MCORE_ERROR;
+
+    u32GetGateStatus = Rm_SemaphoreGetStatus(EEP_MCORE_SEMA4_JOB);
+    if (Eep_u32DoMainID == u32GetGateStatus)
+    {
+        eRetVal = EEP_MCORE_GRANTED;
+    }
+    else if (RM_SEMAPHORE_FREE == u32GetGateStatus)
+    {
+        if ((Std_ReturnType)E_OK == (Std_ReturnType)(Rm_SemaphoreLockGate(EEP_MCORE_SEMA4_JOB)))
+        {
+            /* EEP_MCORE_SEMA4_JOB taken. */
+            eRetVal = EEP_MCORE_GRANTED;
+        }
+        else
+        {
+            /* Due to race condition this core couldn't take the SEMA4. */
+            eRetVal = EEP_MCORE_PENDING;
+        }
+    }
+    else
+    {
+        /* Sema4 is taken by other core */
+        eRetVal = EEP_MCORE_PENDING;
+    }
+    return eRetVal;
+}
+
+/* Lock Gate */
+static Std_ReturnType Eep_MCoreInitSema4sLock (void)
+{
+    Std_ReturnType eRetVal = (Std_ReturnType)E_OK;
+    uint32 u32timeoutTicks = OsIf_MicrosToTicks(EEP_MCORE_LOCK_GATES_TIMEOUT, (OsIf_CounterType)USDHC_IP_TIMEOUT_TYPE);
+    uint32 u32currentTicks = OsIf_GetCounter((OsIf_CounterType)USDHC_IP_TIMEOUT_TYPE);
+    uint32 u32elapsedTicks = 0U;
+
+    while (((Std_ReturnType)E_OK != (Std_ReturnType)Rm_SemaphoreLockGate((uint8)EEP_MCORE_SEMA4_JOB)) && (u32elapsedTicks < u32timeoutTicks))
+    {
+        u32elapsedTicks += OsIf_GetElapsed(&u32currentTicks, USDHC_IP_TIMEOUT_TYPE);
+    }
+    if (u32elapsedTicks >= u32timeoutTicks)
+    {
+        /* Timeout errors */
+        eRetVal = E_NOT_OK;
+    }
+    return eRetVal;
+}
+/* Release Gate */
+static Std_ReturnType Eep_MCoreJobSema4Release (void)
+{
+    Std_ReturnType eRetVal = (Std_ReturnType)E_OK;
+
+    if (Eep_u32DoMainID == (uint32)Rm_SemaphoreGetStatus((uint8)EEP_MCORE_SEMA4_JOB))
+    {
+        if ((Std_ReturnType)E_OK != (Std_ReturnType)(Rm_SemaphoreUnlockGate((uint8)EEP_MCORE_SEMA4_JOB)))
+        {
+            eRetVal = E_NOT_OK;
+        }
+    }
+    else
+    {
+        /* Do nothing. */
+    }
+
+    return eRetVal;
+}
+#endif /* #if (EEP_MCORE_ENABLED == STD_ON) */
+
+#define EEP_STOP_SEC_CODE
+#include "Eep_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */

RTD/src/Eep_IPW.c

@@ -0,0 +1,974 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : IPV_FTFC
+*   Dependencies         : 
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+/**
+*   @file Eep_IPW.c
+*
+*   @addtogroup EEP_IPW
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "OsIf.h"
+#include "Eep.h"
+#include "Eep_IPW.h"
+#include "Det.h"
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define EEP_IPW_VENDOR_ID_C                      43
+#define EEP_IPW_AR_RELEASE_MAJOR_VERSION_C       4
+#define EEP_IPW_AR_RELEASE_MINOR_VERSION_C       4
+#define EEP_IPW_AR_RELEASE_REVISION_VERSION_C    0
+#define EEP_IPW_SW_MAJOR_VERSION_C               1
+#define EEP_IPW_SW_MINOR_VERSION_C               0
+#define EEP_IPW_SW_PATCH_VERSION_C               0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Version checks for OsIf.h */
+    #if ((EEP_IPW_AR_RELEASE_MAJOR_VERSION_C != OSIF_AR_RELEASE_MAJOR_VERSION) || \
+         (EEP_IPW_AR_RELEASE_MINOR_VERSION_C != OSIF_AR_RELEASE_MINOR_VERSION) \
+        )
+        #error "AutoSar Version Numbers of Eep_IPW.c and OsIf.h are different"
+    #endif
+#endif
+
+/* Version checks for Eep.h */
+#if (EEP_IPW_VENDOR_ID_C != EEP_VENDOR_ID)
+    #error "Eep_IPW.c and Eep.h have different vendor ids"
+#endif
+#if ((EEP_IPW_AR_RELEASE_MAJOR_VERSION_C    != EEP_AR_RELEASE_MAJOR_VERSION) || \
+     (EEP_IPW_AR_RELEASE_MINOR_VERSION_C    != EEP_AR_RELEASE_MINOR_VERSION) || \
+     (EEP_IPW_AR_RELEASE_REVISION_VERSION_C != EEP_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Eep_IPW.c and Eep.h are different"
+#endif
+#if ((EEP_IPW_SW_MAJOR_VERSION_C != EEP_SW_MAJOR_VERSION) || \
+     (EEP_IPW_SW_MINOR_VERSION_C != EEP_SW_MINOR_VERSION) || \
+     (EEP_IPW_SW_PATCH_VERSION_C != EEP_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Eep_IPW.c and Eep.h are different"
+#endif
+
+/* Version checks for Eep_IPW.h */
+#if (EEP_IPW_VENDOR_ID_C != EEP_IPW_VENDOR_ID_H)
+    #error "Eep_IPW.c and Eep_IPW.h have different vendor ids"
+#endif
+#if ((EEP_IPW_AR_RELEASE_MAJOR_VERSION_C    != EEP_IPW_AR_RELEASE_MAJOR_VERSION_H) || \
+     (EEP_IPW_AR_RELEASE_MINOR_VERSION_C    != EEP_IPW_AR_RELEASE_MINOR_VERSION_H) || \
+     (EEP_IPW_AR_RELEASE_REVISION_VERSION_C != EEP_IPW_AR_RELEASE_REVISION_VERSION_H) \
+    )
+    #error "AutoSar Version Numbers of Eep_IPW.c and Eep_IPW.h are different"
+#endif
+#if ((EEP_IPW_SW_MAJOR_VERSION_C != EEP_IPW_SW_MAJOR_VERSION_H) || \
+     (EEP_IPW_SW_MINOR_VERSION_C != EEP_IPW_SW_MINOR_VERSION_H) || \
+     (EEP_IPW_SW_PATCH_VERSION_C != EEP_IPW_SW_PATCH_VERSION_H) \
+    )
+    #error "Software Version Numbers of Eep_IPW.c and Eep_IPW.h are different"
+#endif
+
+/* Version checks for Det.h */
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((EEP_IPW_AR_RELEASE_MAJOR_VERSION_C != DET_AR_RELEASE_MAJOR_VERSION) || \
+         (EEP_IPW_AR_RELEASE_MINOR_VERSION_C != DET_AR_RELEASE_MINOR_VERSION) \
+        )
+        #error "AutoSar Version Numbers of Eep_IPW.c and Det.h are different"
+    #endif
+#endif
+
+/*==================================================================================================
+*                           LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
+==================================================================================================*/
+
+#if ((EEP_ASYNC_WRITE_OPERATIONS_ENABLED == STD_ON) || \
+     (EEP_ASYNC_ERASE_OPERATIONS_ENABLED == STD_ON))
+typedef struct
+{
+    Eep_AddressType DestAddress;
+    uint8 const * SrcAddress;
+    Eep_LengthType Length;
+    boolean InProgress;
+} Eep_Ipw_xAsyncJobType;
+#endif
+
+/*==================================================================================================
+*                                          LOCAL MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                        GLOBAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                        GLOBAL VARIABLES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                         LOCAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                         LOCAL VARIABLES
+==================================================================================================*/
+
+#define EEP_START_SEC_VAR_CLEARED_UNSPECIFIED
+#include "Eep_MemMap.h"
+
+#if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+    static Eep_ConfigType const * Eep_Ipw_pxEepConfig;
+#endif
+
+#if ((EEP_ASYNC_ERASE_OPERATIONS_ENABLED == STD_ON) || \
+     (EEP_ASYNC_WRITE_OPERATIONS_ENABLED == STD_ON))
+    static Eep_Ipw_xAsyncJobType Eep_Ipw_xAsyncJob;
+#endif
+
+#define EEP_STOP_SEC_VAR_CLEARED_UNSPECIFIED
+#include "Eep_MemMap.h"
+
+/*==================================================================================================
+*                                   LOCAL FUNCTION PROTOTYPES
+==================================================================================================*/
+#define EEP_START_SEC_CODE
+#include "Eep_MemMap.h"
+
+#if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+static void Eep_Ipw_ReportBrownOut (
+    void
+);
+#endif
+
+static void Eep_Ipw_ReportFailure (Ftfc_Eep_Ip_StatusType FtfcStatus);
+
+static Ftfc_Eep_Ip_PageSizeType Eep_Ipw_AlignedPageSize (Ftfc_Eep_Ip_AddressType FlexramAddress,
+                                                         Ftfc_Eep_Ip_AddressType RamAddress,
+                                                         Ftfc_Eep_Ip_LengthType Length
+                                                        );
+
+/*==================================================================================================
+*                                        GLOBAL FUNCTIONS
+==================================================================================================*/
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Initialize the FTFC IP
+ * @details FTFC is the only EEPROM available on this platform.
+ *
+ * @return  FTFC initialization status
+ * @retval  EEP_E_OK on success
+ * @retval  EEP_E_FAILED on failure
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Eep_ReturnType Eep_Ipw_Init (Eep_ConfigType const * pxEepConfig)
+{
+    Eep_ReturnType RetVal = EEP_E_OK;
+    Ftfc_Eep_Ip_StatusType FtfcStatus = FTFC_EEP_IP_STATUS_OK;
+
+    /* reinitialize the global variables */
+#if ((EEP_ASYNC_ERASE_OPERATIONS_ENABLED == STD_ON) || \
+     (EEP_ASYNC_WRITE_OPERATIONS_ENABLED == STD_ON))
+    Eep_Ipw_xAsyncJob.DestAddress = 0U;
+    Eep_Ipw_xAsyncJob.SrcAddress = NULL_PTR;
+    Eep_Ipw_xAsyncJob.Length = 0U;
+    Eep_Ipw_xAsyncJob.InProgress = FALSE;
+#endif
+
+    /* Call Ip init function */
+    FtfcStatus = Ftfc_Eep_Ip_Init(pxEepConfig->pxFtfcEepIpConfig);
+
+#if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+    Eep_Ipw_pxEepConfig = pxEepConfig;
+    Eep_Ipw_ReportBrownOut();
+#endif
+
+    /* Check the status after finishing */
+    if (FTFC_EEP_IP_STATUS_OK != FtfcStatus)
+    {
+        Eep_Ipw_ReportFailure(FtfcStatus);
+        RetVal = EEP_E_FAILED;
+    }
+
+    return RetVal;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief Check parameters for the Read job.
+ *
+ * @param[in] SrcAddress
+ * @param[in] pu8DestAddress
+ * @param[in] Length
+ *
+ * @return Ok / not ok to proceed with the read operation.
+ * @retval E_OK
+ * @retval E_NOT_OK
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Std_ReturnType Eep_Ipw_CheckReadParams (Eep_AddressType SrcAddress,
+                                        uint8 const * pu8DestAddress,
+                                        Eep_LengthType Length
+                                       )
+{
+    Std_ReturnType RetVal = E_NOT_OK;
+
+    /* Check the validity of Source Address */
+    if (SrcAddress >= FTFC_EEP_IP_EEP_SIZE)
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_READ_ID, EEP_E_PARAM_ADDRESS);
+    #endif
+    }
+    /* Check the validity of Length */
+    else if ((0U == Length) || ((SrcAddress + Length) > FTFC_EEP_IP_EEP_SIZE))
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_READ_ID, EEP_E_PARAM_LENGTH);
+    #endif
+    }
+    /* Check the validity of destination address */
+    else if (NULL_PTR == pu8DestAddress)
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_READ_ID, EEP_E_PARAM_DATA);
+    #endif
+    }
+    else
+    {
+        RetVal = E_OK;
+    }
+
+    return RetVal;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief Synchronous read.
+ *
+ * @param[out] pu8DestAddress
+ *
+ * @return Synchronous read op status.
+ * @retval EEP_E_OK
+ * @retval EEP_E_FAILED
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+
+Eep_ReturnType Eep_Ipw_Read (Eep_AddressType SrcAddress,
+                             uint8 * pu8DestAddress,
+                             Eep_LengthType Length
+                            )
+{
+    Eep_ReturnType RetVal = EEP_E_FAILED;
+    Ftfc_Eep_Ip_StatusType FtfcStatus = FTFC_EEP_IP_STATUS_OK;
+
+    /* Call Ip read function */
+    FtfcStatus = Ftfc_Eep_Ip_Read(SrcAddress, pu8DestAddress, Length);
+
+    /* Check status of read operation */
+    if (FTFC_EEP_IP_STATUS_OK == FtfcStatus)
+    {
+        RetVal = EEP_E_OK;
+    }
+
+    return RetVal;
+}
+
+#if (EEP_COMPARE_API == STD_ON)
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief  Check the params given for a Compare job.
+ *
+ * @param[in] SrcAddress
+ * @param[in] pu8DestAddress
+ * @param[in] Length
+ *
+ * @return Ok / not ok to proceed to the compare operation with the given params.
+ * @retval E_OK
+ * @retval E_NOT_OK
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Std_ReturnType Eep_Ipw_CheckCompareParams (Eep_AddressType SrcAddress,
+                                           uint8 const * pu8DestAddress,
+                                           Eep_LengthType Length
+                                          )
+{
+    Std_ReturnType retVal = E_NOT_OK;
+
+    /* Check the validity of source address */
+    if (SrcAddress >= FTFC_EEP_IP_EEP_SIZE)
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError ((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_COMPARE_ID, EEP_E_PARAM_ADDRESS);
+    #endif
+    }
+    /* Check the validity of length */
+    else if ((0U == Length) || ((SrcAddress + Length) > FTFC_EEP_IP_EEP_SIZE))
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError ((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_COMPARE_ID, EEP_E_PARAM_LENGTH);
+    #endif
+    }
+    /* Check the validity of destination address */
+    else if (NULL_PTR == pu8DestAddress)
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError ((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_COMPARE_ID, EEP_E_PARAM_DATA);
+    #endif
+    }
+    else
+    {
+        retVal = E_OK;
+    }
+
+    return retVal;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief Compare an EEPROM area with a given buffer.
+ *
+ * @param[in] SrcAddress
+ * @param[in] pu8DestAddress
+ * @param[in] Length
+ *
+ * @return the comparison result:
+ * @retval EEP_E_OK                 memory contents match
+ * @retval EEP_E_BLOCK_INCONSISTENT memory contents do not match
+ * @retval EEP_E_FAILED             compare operation failed
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Eep_ReturnType Eep_Ipw_CompareSync (Eep_AddressType SrcAddress,
+                                    uint8 const * pu8DestAddress,
+                                    Eep_LengthType Length
+                                   )
+{
+    Eep_ReturnType RetVal = EEP_E_OK;
+    Ftfc_Eep_Ip_StatusType FtfcStatus  = FTFC_EEP_IP_STATUS_OK;
+
+    /* Call Ip compare function */
+    FtfcStatus = Ftfc_Eep_Ip_Compare(SrcAddress, pu8DestAddress, Length);
+
+    /* Check the status after compare operation */
+    switch (FtfcStatus)
+    {
+        case FTFC_EEP_IP_STATUS_OK:
+            RetVal = EEP_E_OK;
+        break;
+
+        case FTFC_EEP_IP_STATUS_BLOCK_INCONSISTENT:
+            RetVal = EEP_E_BLOCK_INCONSISTENT;
+        break;
+
+        default:
+            RetVal = EEP_E_FAILED;
+        break;
+    }
+
+    return RetVal;
+}
+
+#endif /* EEP_COMPARE_API */
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief       Check if the parameters are ok and the HLD can start the erase job.
+ *
+ * @param[in]   Address
+ * @param[in]   Length
+ *
+ * @return      Ok / Not ok to start the erase job.
+ * @retval      E_OK
+ * @retval      E_NOT_OK
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Std_ReturnType Eep_Ipw_CheckEraseParams (Eep_AddressType Address,
+                                         Eep_LengthType Length
+                                        )
+{
+    Std_ReturnType retVal = E_NOT_OK;
+
+    /* Check the address */
+    if (Address >= FTFC_EEP_IP_EEP_SIZE)
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void)Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_ERASE_ID, EEP_E_PARAM_ADDRESS);
+    #endif
+    }
+    /* Check the length */
+    else if ((0U == Length) || ((Address + Length) > FTFC_EEP_IP_EEP_SIZE))
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void)Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_ERASE_ID, EEP_E_PARAM_LENGTH);
+    #endif
+    }
+    else
+    {
+        retVal = E_OK;
+    }
+
+    return retVal;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief Erase starting from @p Address up to Length bytes.
+ *
+ * @param[in] address
+ * @param[in] length
+ *
+ * @return Erase status
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Eep_ReturnType Eep_Ipw_Erase (Eep_AddressType Address,
+                              Eep_LengthType Length
+                             )
+{
+    Eep_AddressType EraseAdd = Address;
+    Eep_LengthType LengthRemaining = Length;
+
+    Eep_ReturnType RetVal = EEP_E_FAILED;
+    Ftfc_Eep_Ip_StatusType FtfcStatus = FTFC_EEP_IP_STATUS_OK;
+
+#if (EEP_ASYNC_ERASE_OPERATIONS_ENABLED == STD_ON)
+    Ftfc_Eep_Ip_PageSizeType PageSize = FTFC_EEP_IP_PAGE_BYTE;
+
+    if (FALSE == Eep_Ipw_xAsyncJob.InProgress)
+    {
+        Eep_Ipw_xAsyncJob.DestAddress = EraseAdd;
+        Eep_Ipw_xAsyncJob.SrcAddress = NULL_PTR;
+        Eep_Ipw_xAsyncJob.Length = LengthRemaining;
+
+        PageSize = Eep_Ipw_AlignedPageSize(Eep_Ipw_xAsyncJob.DestAddress, 0U, Eep_Ipw_xAsyncJob.Length);
+        FtfcStatus = Ftfc_Eep_Ip_Erase(Eep_Ipw_xAsyncJob.DestAddress, PageSize, TRUE);
+
+        if (FTFC_EEP_IP_STATUS_PENDING == FtfcStatus)
+        {
+            Eep_Ipw_xAsyncJob.DestAddress += (Ftfc_Eep_Ip_AddressType)PageSize;
+            Eep_Ipw_xAsyncJob.Length -= (Ftfc_Eep_Ip_LengthType)PageSize;
+
+            Eep_Ipw_xAsyncJob.InProgress = TRUE;
+            RetVal = EEP_E_PENDING;
+        }
+    }
+    else
+    {
+        FtfcStatus = Ftfc_Eep_Ip_GetJobResult();
+        switch (FtfcStatus)
+        {
+            case FTFC_EEP_IP_STATUS_PENDING:
+                RetVal = EEP_E_PENDING;
+            break;
+
+            case FTFC_EEP_IP_STATUS_OK:
+                if (Eep_Ipw_xAsyncJob.Length > 0U)
+                {
+                    PageSize = Eep_Ipw_AlignedPageSize(Eep_Ipw_xAsyncJob.DestAddress, 0U, Eep_Ipw_xAsyncJob.Length);
+                    FtfcStatus = Ftfc_Eep_Ip_Erase(Eep_Ipw_xAsyncJob.DestAddress, PageSize, TRUE);
+
+                    if (FTFC_EEP_IP_STATUS_PENDING == FtfcStatus)
+                    {
+                        Eep_Ipw_xAsyncJob.DestAddress += (Ftfc_Eep_Ip_AddressType)PageSize;
+                        Eep_Ipw_xAsyncJob.Length -= (Ftfc_Eep_Ip_LengthType)PageSize;
+                        RetVal = EEP_E_PENDING;
+                    }
+                    else
+                    {
+                        Eep_Ipw_xAsyncJob.InProgress = FALSE;
+                    }
+                }
+                else
+                {
+                    Eep_Ipw_xAsyncJob.InProgress = FALSE;
+                    RetVal = EEP_E_OK;
+                }
+            break;
+
+            default:
+                Eep_Ipw_xAsyncJob.InProgress = FALSE;
+            break;
+        }
+    }
+
+#else /* EEP_ASYNC_ERASE_OPERATIONS_ENABLED */
+
+    Ftfc_Eep_Ip_PageSizeType PageSize = FTFC_EEP_IP_PAGE_BYTE;
+
+    while ((LengthRemaining > 0U) && (FTFC_EEP_IP_STATUS_OK == FtfcStatus))
+    {
+        PageSize = Eep_Ipw_AlignedPageSize(EraseAdd, 0U, LengthRemaining);
+        FtfcStatus = Ftfc_Eep_Ip_Erase(EraseAdd, PageSize, FALSE);
+        LengthRemaining -= (Eep_LengthType)PageSize;
+        EraseAdd += (Eep_AddressType)PageSize;
+    }
+
+    if (FTFC_EEP_IP_STATUS_OK == FtfcStatus)
+    {
+        RetVal = EEP_E_OK;
+    }
+
+#endif /* EEP_ASYNC_ERASE_OPERATIONS_ENABLED */
+
+    /* Repor the status after finishing */
+    Eep_Ipw_ReportFailure(FtfcStatus);
+    return RetVal;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief       Check the parameters given for a Write job.
+ *
+ * @param[in]   DestAddress
+ * @param[in]   pu8SrcAddress
+ * @param[in]   Length
+ *
+ * @return Ok / not ok to start the write job with those parameters.
+ * @retval E_OK
+ * @retval E_NOT_OK
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Std_ReturnType Eep_Ipw_CheckWriteParams (Eep_AddressType DestAddress,
+                                         uint8 const * pu8SrcAddress,
+                                         Eep_LengthType Length
+                                        )
+{
+    Std_ReturnType retVal = E_NOT_OK;
+
+    /* Check the validity of destination address */
+    if (DestAddress >= FTFC_EEP_IP_EEP_SIZE)
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError ((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_WRITE_ID, EEP_E_PARAM_ADDRESS);
+    #endif
+    }
+    /* Check the validity of length */
+    else if ((0U == Length) || ((DestAddress + Length) > FTFC_EEP_IP_EEP_SIZE))
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError ((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_WRITE_ID, EEP_E_PARAM_LENGTH);
+    #endif
+    }
+    /* Check the validity of source address */
+    else if (NULL_PTR == pu8SrcAddress)
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError ((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_WRITE_ID, EEP_E_PARAM_DATA);
+    #endif
+    }
+    else
+    {
+        retVal = E_OK;
+    }
+
+    return retVal;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief Write operation.
+ *
+ * @param[in] DestAddress
+ * @param[in] pu8SrcAddress
+ * @param[in] Length
+ *
+ * @return The write call may end in one of the following states:
+ * @retval EEP_E_OK       job jas finished successfully
+ * @retval EEP_E_PENDING  async: the job is in progress
+ * @retval EEP_E_FAILED   an error has occurred
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Eep_ReturnType Eep_Ipw_Write (Eep_AddressType DestAddress,
+                              uint8 const * pu8SrcAddress,
+                              Eep_LengthType Length
+                             )
+{
+    Eep_ReturnType RetVal = EEP_E_FAILED;
+    Ftfc_Eep_Ip_StatusType FtfcStatus = FTFC_EEP_IP_STATUS_OK;
+    Eep_AddressType DestAdd = DestAddress;
+    uint8 const * pu8SrcAdd = pu8SrcAddress;
+    Eep_LengthType LengthRemaining = Length;
+
+#if (EEP_ASYNC_WRITE_OPERATIONS_ENABLED == STD_ON)
+    Ftfc_Eep_Ip_PageSizeType PageSize = FTFC_EEP_IP_PAGE_BYTE;
+
+    if (FALSE == Eep_Ipw_xAsyncJob.InProgress)
+    {
+        Eep_Ipw_xAsyncJob.DestAddress = DestAdd;
+        Eep_Ipw_xAsyncJob.SrcAddress = pu8SrcAdd;
+        Eep_Ipw_xAsyncJob.Length = LengthRemaining;
+
+        PageSize = Eep_Ipw_AlignedPageSize(Eep_Ipw_xAsyncJob.DestAddress, (Eep_AddressType)Eep_Ipw_xAsyncJob.SrcAddress, Eep_Ipw_xAsyncJob.Length);
+        FtfcStatus = Ftfc_Eep_Ip_Write(Eep_Ipw_xAsyncJob.DestAddress, Eep_Ipw_xAsyncJob.SrcAddress, PageSize, TRUE);
+
+        if (FTFC_EEP_IP_STATUS_PENDING == FtfcStatus)
+        {
+            Eep_Ipw_xAsyncJob.DestAddress += (Ftfc_Eep_Ip_AddressType)PageSize;
+            Eep_Ipw_xAsyncJob.SrcAddress = (uint8 const *)((Eep_AddressType)Eep_Ipw_xAsyncJob.SrcAddress + (uint8)PageSize);
+            Eep_Ipw_xAsyncJob.Length -= (Ftfc_Eep_Ip_LengthType)PageSize;
+
+            Eep_Ipw_xAsyncJob.InProgress = TRUE;
+            RetVal = EEP_E_PENDING;
+        }
+    }
+    else
+    {
+        FtfcStatus = Ftfc_Eep_Ip_GetJobResult();
+        switch (FtfcStatus)
+        {
+            case FTFC_EEP_IP_STATUS_PENDING:
+                RetVal = EEP_E_PENDING;
+            break;
+
+            case FTFC_EEP_IP_STATUS_OK:
+                if (Eep_Ipw_xAsyncJob.Length > 0U)
+                {
+                    PageSize = Eep_Ipw_AlignedPageSize(Eep_Ipw_xAsyncJob.DestAddress, (Eep_AddressType)Eep_Ipw_xAsyncJob.SrcAddress, Eep_Ipw_xAsyncJob.Length);
+                    FtfcStatus = Ftfc_Eep_Ip_Write(Eep_Ipw_xAsyncJob.DestAddress, Eep_Ipw_xAsyncJob.SrcAddress, PageSize, TRUE);
+
+                    if (FTFC_EEP_IP_STATUS_PENDING == FtfcStatus)
+                    {
+                        Eep_Ipw_xAsyncJob.DestAddress += (Ftfc_Eep_Ip_AddressType)PageSize;
+                        Eep_Ipw_xAsyncJob.SrcAddress = (uint8 const *)((Eep_AddressType)Eep_Ipw_xAsyncJob.SrcAddress + (uint8)PageSize);
+                        Eep_Ipw_xAsyncJob.Length -= (Ftfc_Eep_Ip_LengthType)PageSize;
+                        RetVal = EEP_E_PENDING;
+                    }
+                    else
+                    {
+                        Eep_Ipw_xAsyncJob.InProgress = FALSE;
+                    }
+                }
+                else
+                {
+                    Eep_Ipw_xAsyncJob.InProgress = FALSE;
+                    RetVal = EEP_E_OK;
+                }
+            break;
+
+            default:
+                Eep_Ipw_xAsyncJob.InProgress = FALSE;
+            break;
+        }
+    }
+
+#else /* EEP_ASYNC_WRITE_OPERATIONS_ENABLED */
+
+    Ftfc_Eep_Ip_PageSizeType PageSize = FTFC_EEP_IP_PAGE_BYTE;
+
+    while ((LengthRemaining > 0U) && (FTFC_EEP_IP_STATUS_OK == FtfcStatus))
+    {
+        PageSize = Eep_Ipw_AlignedPageSize(DestAdd, (Eep_AddressType)pu8SrcAdd, LengthRemaining);
+        FtfcStatus = Ftfc_Eep_Ip_Write(DestAdd, pu8SrcAdd, PageSize, FALSE);
+        LengthRemaining -= (Eep_LengthType)PageSize;
+        DestAdd += (Eep_AddressType)PageSize;
+        pu8SrcAdd = (uint8*)((Eep_AddressType)pu8SrcAdd + (Eep_AddressType)PageSize);
+    }
+
+    if (FTFC_EEP_IP_STATUS_OK == FtfcStatus)
+    {
+        RetVal = EEP_E_OK;
+    }
+
+#endif /* EEP_ASYNC_WRITE_OPERATIONS_ENABLED */
+
+    /* Report the status of write operation */
+    Eep_Ipw_ReportFailure(FtfcStatus);
+    return RetVal;
+}
+
+#if (EEP_QUICK_WRITES_API == STD_ON)
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief       Check the parameters given for a QuickWrite job.
+ *
+ * @param[in]   DestAddress
+ * @param[in]   pu8SrcAddress
+ * @param[in]   Length
+ * @param[in]   QuickWritesLength
+ *
+ * @return Ok / not ok to start the quick write job with those parameters.
+ * @retval E_OK
+ * @retval E_NOT_OK
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Std_ReturnType Eep_Ipw_CheckQuickWriteParams (Eep_AddressType DestAddress,
+                                              uint8 const * pu8SrcAddress,
+                                              Eep_LengthType Length,
+                                              Eep_LengthType QuickWritesLength
+                                             )
+{
+    Std_ReturnType retVal = E_NOT_OK;
+
+    /* Check the validity of destination address */
+    if ((DestAddress >= FTFC_EEP_IP_EEP_SIZE) ||
+        ((DestAddress % 4U) != 0U) ||
+        ((((uint32)pu8SrcAddress) % 4U) != 0U))
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_QUICK_WRITE_ID, EEP_E_PARAM_ADDRESS);
+    #endif
+    }
+    /* Check the validity of length */
+    else if ((0U == Length) || ((DestAddress + Length) > FTFC_EEP_IP_EEP_SIZE) ||
+        (QuickWritesLength < 16U) || (QuickWritesLength > 512U) ||
+        ((QuickWritesLength % 4U) != 0U) || ((Length % QuickWritesLength) != 0U))
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_QUICK_WRITE_ID, EEP_E_PARAM_LENGTH);
+    #endif
+    }
+    /* Check the validity of source add */
+    else if (NULL_PTR == pu8SrcAddress)
+    {
+    #if (EEP_DEV_ERROR_DETECT == STD_ON)
+        (void) Det_ReportError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_QUICK_WRITE_ID, EEP_E_PARAM_DATA);
+    #endif
+    }
+    else
+    {
+        retVal = E_OK;
+    }
+
+    return retVal;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief Quick Write operation.
+ *
+ * @param[in] DestAddress
+ * @param[in] pu8SrcAddress
+ * @param[in] Length
+ *
+ * @return The quick write call may end in one of the following states:
+ * @retval EEP_E_OK
+ * @retval EEP_E_FAILED
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Eep_ReturnType Eep_Ipw_QuickWrite (Eep_AddressType DestAddress,
+                                   uint8 const * pu8SrcAddress,
+                                   Eep_LengthType Length
+                                  )
+{
+    Eep_ReturnType RetVal = EEP_E_OK;
+    Ftfc_Eep_Ip_StatusType FtfcStatus = FTFC_EEP_IP_STATUS_OK;
+
+    FtfcStatus = Ftfc_Eep_Ip_QuickWrite(DestAddress, pu8SrcAddress, Length);
+
+    /* Check status after operation finish  */
+    if (FTFC_EEP_IP_STATUS_OK != FtfcStatus)
+    {
+        RetVal = EEP_E_FAILED;
+        Eep_Ipw_ReportFailure(FtfcStatus);
+    }
+
+    return RetVal;
+}
+
+#endif /* EEP_QUICK_WRITES_API */
+
+#if (EEP_CANCEL_API == STD_ON)
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief  Cancel the current operation.
+ *
+ * @return the status of the IP HW
+ * @retval EEP_E_OK       the FTFC operation finished
+ * @retval EEP_E_PENDING  a timeout has occured while waiting for the HW IP
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Eep_ReturnType Eep_Ipw_Cancel (
+    void)
+{
+    Eep_ReturnType Status = EEP_E_OK;
+    uint32 Timeout = OsIf_MicrosToTicks(FTFC_EEP_IP_ABORT_TIMEOUT, FTFC_EEP_IP_TIMEOUT_TYPE);
+    uint32 CurrentTicks = OsIf_GetCounter(FTFC_EEP_IP_TIMEOUT_TYPE);
+    uint32 ElapsedTicks = 0U;
+
+    /* wait until FlexRam is ready or abort if timeout is reached */
+    while (FTFC_EEP_IP_STATUS_PENDING == Ftfc_Eep_Ip_GetJobResult())
+    {
+        ElapsedTicks += OsIf_GetElapsed(&CurrentTicks, FTFC_EEP_IP_TIMEOUT_TYPE);
+        if (ElapsedTicks >= Timeout)
+        {
+            Status = EEP_E_PENDING;
+            break;
+        }
+    }
+
+#if ((EEP_ASYNC_ERASE_OPERATIONS_ENABLED == STD_ON) || \
+     (EEP_ASYNC_WRITE_OPERATIONS_ENABLED == STD_ON))
+    Eep_Ipw_xAsyncJob.InProgress = FALSE;
+#endif
+
+    return Status;
+}
+
+#endif /* EEP_CANCEL_API */
+
+/*==================================================================================================
+*                                        LOCAL FUNCTIONS
+==================================================================================================*/
+
+#if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Reports the brownout code to DEM.
+ * @details The brownout code is read at init.
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static void Eep_Ipw_ReportBrownOut (void)
+{
+    switch (Ftfc_Eep_Ip_GetBrownOutCode())
+    {
+        case FTFC_EEP_IP_BO_DURING_MAINTENANCE:
+            if (TRUE == Eep_Ipw_pxEepConfig->Eep_E_BOMaintenanceCfg.state)
+            {
+                (void) Dem_SetEventStatus((Dem_EventIdType)Eep_Ipw_pxEepConfig->Eep_E_BOMaintenanceCfg.id, DEM_EVENT_STATUS_FAILED);
+            }
+        break;
+
+        case FTFC_EEP_IP_BO_DURING_QUICK_WRITES:
+            if (TRUE == Eep_Ipw_pxEepConfig->Eep_E_BOQuickWritesCfg.state)
+            {
+                (void) Dem_SetEventStatus((Dem_EventIdType)Eep_Ipw_pxEepConfig->Eep_E_BOQuickWritesCfg.id, DEM_EVENT_STATUS_FAILED);
+            }
+        break;
+
+        case FTFC_EEP_IP_BO_DURING_NORMAL_WRITES:
+            if (TRUE == Eep_Ipw_pxEepConfig->Eep_E_BONormalWritesCfg.state)
+            {
+                (void) Dem_SetEventStatus((Dem_EventIdType)Eep_Ipw_pxEepConfig->Eep_E_BONormalWritesCfg.id, DEM_EVENT_STATUS_FAILED);
+            }
+        break;
+
+        case FTFC_EEP_IP_NO_BO_DETECTED:
+            /* Nothing to report */
+        break;
+
+        default:
+            /* corrupted value */
+        break;
+    }
+}
+
+#endif /* (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF) */
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief Report failures coming from IPL to DET / DEM.
+ *
+ * @param[in] FtfcStatus
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static void Eep_Ipw_ReportFailure (Ftfc_Eep_Ip_StatusType FtfcStatus)
+{
+    switch (FtfcStatus)
+    {
+        case FTFC_EEP_IP_STATUS_TIMEOUT:
+            (void) Det_ReportRuntimeError((uint16)EEP_MODULE_ID, EEP_INSTANCE_ID, EEP_WRITE_ID, EEP_E_TIMEOUT);
+        break;
+
+    #if (FTFC_EEP_IP_HIGH_TEMP_CHIP == STD_ON)
+        case FTFC_EEP_IP_STATUS_FAILED_MGSTAT:
+        #if (EEP_DISABLE_DEM_REPORT_ERROR_STATUS == STD_OFF)
+            if (TRUE == Eep_Ipw_pxEepConfig->Eep_E_MGSTAT_BlockCfg.state)
+            {
+                (void) Dem_SetEventStatus((Dem_EventIdType)Eep_Ipw_pxEepConfig->Eep_E_MGSTAT_BlockCfg.id, DEM_EVENT_STATUS_FAILED);
+            }
+        #endif
+        break;
+    #endif
+
+        default:
+            /* nothing to report */
+        break;
+    }
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief Compute the page size, considering the addresses alignment and the remaining bytes.
+ *
+ * @param[in]  FlexramAddress the FlexRAM address
+ * @param[in]  RamAddress the RAM address
+ * @param[in]  Length how many bytes are left to process
+ *
+ * @return the page size
+ * @retval FTFC_EEP_IP_PAGE_BYTE     for unaligned operations
+ * @retval FTFC_EEP_IP_PAGE_WORD     16-bit aligned operations
+ * @retval FTFC_EEP_IP_PAGE_LONGWORD 32-bit aligned operations
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static Ftfc_Eep_Ip_PageSizeType Eep_Ipw_AlignedPageSize (Ftfc_Eep_Ip_AddressType FlexramAddress,
+                                                         Ftfc_Eep_Ip_AddressType RamAddress,
+                                                         Ftfc_Eep_Ip_LengthType Length
+                                                        )
+{
+    Ftfc_Eep_Ip_PageSizeType PageSize = FTFC_EEP_IP_PAGE_BYTE;
+
+#if (FTFC_EEP_IP_ALIGNED_RAM_ACCESS == STD_OFF)
+    (void) RamAddress; /* avoid compiler warning */
+#endif
+
+    if ((0U == (FlexramAddress % (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_LONGWORD))
+    #if (FTFC_EEP_IP_ALIGNED_RAM_ACCESS == STD_ON)
+        && (0U == (RamAddress  % (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_LONGWORD))
+    #endif
+    )
+    {
+        if (Length >= (Ftfc_Eep_Ip_LengthType)FTFC_EEP_IP_PAGE_LONGWORD)
+        {
+            /* 4 bytes aligned and length >= 4 bytes: 4 bytes operation */
+            PageSize = FTFC_EEP_IP_PAGE_LONGWORD;
+        }
+        else if (Length >= (Ftfc_Eep_Ip_LengthType)FTFC_EEP_IP_PAGE_WORD)
+        {
+            /* 4 bytes aligned and 4bytes > length >= 2 bytes : 2 bytes operation */
+            PageSize = FTFC_EEP_IP_PAGE_WORD;
+        }
+        else
+        {
+            /* 4 bytes aligned and length < 2 bytes : 1 byte operation */
+            PageSize = FTFC_EEP_IP_PAGE_BYTE;
+        }
+    }
+    else if ((0U == (FlexramAddress % (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_WORD))
+        #if (FTFC_EEP_IP_ALIGNED_RAM_ACCESS == STD_ON)
+             && (0U == (RamAddress  % (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_WORD))
+        #endif
+            )
+    {
+        if (Length >= (Ftfc_Eep_Ip_LengthType)FTFC_EEP_IP_PAGE_WORD)
+        {
+            /* 2 bytes aligned and length >= 2 bytes : 2 bytes operation */
+            PageSize = FTFC_EEP_IP_PAGE_WORD;
+        }
+        else
+        {
+            /* 2 bytes aligned and length < 2 bytes : 1 byte operation */
+            PageSize = FTFC_EEP_IP_PAGE_BYTE;
+        }
+    }
+    else
+    {
+        /* unaligned operation */
+        PageSize = FTFC_EEP_IP_PAGE_BYTE;
+    }
+
+    return PageSize;
+}
+
+#define EEP_STOP_SEC_CODE
+#include "Eep_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @}*/

RTD/src/Ewm_Ip.c

@@ -0,0 +1,422 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : Wdog,Ewm
+*   Dependencies         : none
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+/**
+*   @file
+*
+*   @addtogroup Ewm_Ip
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "Ewm_Ip.h"
+#include "Devassert.h"
+#include "OsIf.h"
+#include "Mcal.h"
+
+/*==================================================================================================
+*                                 SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define EWM_IP_VENDOR_ID_C                      43
+#define EWM_IP_AR_RELEASE_MAJOR_VERSION_C       4
+#define EWM_IP_AR_RELEASE_MINOR_VERSION_C       4
+#define EWM_IP_AR_RELEASE_REVISION_VERSION_C    0
+#define EWM_IP_SW_MAJOR_VERSION_C               1
+#define EWM_IP_SW_MINOR_VERSION_C               0
+#define EWM_IP_SW_PATCH_VERSION_C               0
+
+/*==================================================================================================
+*                                       FILE VERSION CHECKS
+==================================================================================================*/
+
+/* Check if current file and Ewm_Ip header file are of the same vendor */
+#if (EWM_IP_VENDOR_ID_C != EWM_IP_VENDOR_ID)
+#error "Ewm_Ip.c and Ewm_Ip.h have different vendor ids"
+#endif
+
+/* Check if current file and Ewm_Ip header file are of the same Autosar version */
+#if ((EWM_IP_AR_RELEASE_MAJOR_VERSION_C     != EWM_IP_AR_RELEASE_MAJOR_VERSION) || \
+     (EWM_IP_AR_RELEASE_MINOR_VERSION_C     != EWM_IP_AR_RELEASE_MINOR_VERSION) || \
+     (EWM_IP_AR_RELEASE_REVISION_VERSION_C  != EWM_IP_AR_RELEASE_REVISION_VERSION))
+#error "AutoSar Version Numbers of Ewm_Ip.c and Ewm_Ip.h are different"
+#endif
+
+/* Check if current file and Ewm_Ip header file are of the same software version */
+#if ((EWM_IP_SW_MAJOR_VERSION_C != EWM_IP_SW_MAJOR_VERSION) || \
+     (EWM_IP_SW_MINOR_VERSION_C != EWM_IP_SW_MINOR_VERSION) || \
+     (EWM_IP_SW_PATCH_VERSION_C != EWM_IP_SW_PATCH_VERSION))
+#error "Software Version Numbers of Ewm_Ip.c and Ewm_Ip.h are different"
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if current file and Devassert header file are of the same Autosar version */
+    #if ((EWM_IP_AR_RELEASE_MAJOR_VERSION_C    != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
+        (EWM_IP_AR_RELEASE_MINOR_VERSION_C     != DEVASSERT_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Ewm_Ip.c and Devassert.h are different"
+    #endif
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
+
+/*==================================================================================================
+*                           LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
+==================================================================================================*/
+
+/*==================================================================================================
+*                                          LOCAL MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                         LOCAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                         LOCAL VARIABLES
+==================================================================================================*/
+#if (EWM_IP_ENABLE == STD_ON)
+
+#define WDG_START_SEC_CONST_UNSPECIFIED
+
+#include "Wdg_MemMap.h"
+
+/*! @brief Table of base addresses for EWM instances. */
+static EWM_Type * const s_ewmBase[] = IP_EWM_BASE_PTRS;
+
+#define WDG_STOP_SEC_CONST_UNSPECIFIED
+
+#include "Wdg_MemMap.h"
+
+#define WDG_START_SEC_VAR_CLEARED_UNSPECIFIED
+
+#include "Wdg_MemMap.h"
+
+static Ewm_Ip_CallbackPtrType Ewm_Ip_apCallbackPtr[EWM_INSTANCE_COUNT];
+
+#define WDG_STOP_SEC_VAR_CLEARED_UNSPECIFIED
+
+#include "Wdg_MemMap.h"
+
+/*==================================================================================================
+*                                        GLOBAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                        GLOBAL VARIABLES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                    LOCAL FUNCTION PROTOTYPES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                         LOCAL FUNCTIONS
+==================================================================================================*/
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_START_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_START_SEC_RAMCODE
+    #endif
+#endif
+
+#include "Wdg_MemMap.h"
+
+/*!
+ * @brief Refresh EWM
+ *
+ * This method needs to be called within the window period
+ * specified by the Compare Low and Compare High registers
+ *
+ * @param[in] base EWM base pointer
+ */
+static inline void Ewm_Ip_Refresh(EWM_Type * const base)
+{
+    OsIf_SuspendAllInterrupts();
+
+    /* Write first byte of the service key */
+    base->SERV = EWM_IP_FEATURE_KEY_FIRST_BYTE;
+    /* Write second byte of the service key */
+    base->SERV = EWM_IP_FEATURE_KEY_SECOND_BYTE;
+
+    OsIf_ResumeAllInterrupts();
+}
+
+/*!
+ * @brief Get the EWM enable bit.
+ *
+ * @param[in] base EWM base pointer
+ * @return The state of the device enable bit:
+ *      -   FALSE - EWM disabled
+ *      -   TRUE  - EWM enabled
+ */
+static inline boolean Ewm_Ip_IsEnabled(const EWM_Type * const base)
+{
+    return ((base->CTRL & EWM_CTRL_EWMEN_MASK) >> EWM_CTRL_EWMEN_SHIFT) != 0U;
+}
+
+/*!
+ * @brief Get the EWM interrupt enable bit.
+ *
+ * @param[in] base EWM base pointer
+ * @return The state of the interrupt enable bit:
+ *      -   FALSE - EWM interrupt disabled
+ *      -   TRUE  - EWM interrupt enabled
+ */
+static inline boolean Ewm_Ip_IsIntEnabled(const EWM_Type * const base)
+{
+    return ((base->CTRL & EWM_CTRL_INTEN_MASK) >> EWM_CTRL_INTEN_SHIFT) != 0U;
+}
+
+/*!
+ * @brief Clear the EWM interrupt enable bit.
+ *
+ * @param[in] base EWM base pointer
+ */
+static inline void Ewm_Ip_ClearIntenBit(EWM_Type * const base)
+{
+    base->CTRL &= ~(uint8)EWM_CTRL_INTEN_MASK;
+}
+
+/*!
+ * @brief Set the Control Value.
+ *
+ * This register can be only written once after a CPU reset.
+ *
+ * @param[in] base  EWM base pointer
+ * @param[in] value Value to write into Control register
+ */
+static inline void Ewm_Ip_SetControl(EWM_Type * const base, uint8_t value)
+{
+    base->CTRL = value;
+}
+
+/*!
+ * @brief Set the Compare Low Value.
+ *
+ * This register can be only written once after a CPU reset.
+ * The user must make sure that the Compare High is greater than Compare Low value
+ *
+ * @param[in] base  EWM base pointer
+ * @param[in] value Value to write into Compare Low register
+ */
+static inline void Ewm_Ip_SetCompareLow(EWM_Type * const base, uint8_t value)
+{
+    base->CMPL = value;
+}
+
+/*!
+ * @brief Set the Compare High Value.
+ *
+ * This register can be only written once after a CPU reset.
+ * The user must make sure that the Compare High is greater than Compare Low value
+ * Note: The maximum Compare High value is 0xFE
+ *
+ * @param[in] base  EWM base pointer
+ * @param[in] value Value to write into Compare High register
+ */
+static inline void Ewm_Ip_SetCompareHigh(EWM_Type * const base, uint8_t value)
+{
+    base->CMPH = value;
+}
+
+/*!
+ * @brief Set the Clock Prescaler Value.
+ *
+ * This register can be only written once after a CPU reset and
+ * it must be written before enabling the EWM
+ *
+ * @param[in] base  EWM base pointer
+ * @param[in] value Prescaler Value
+ */
+static inline void Ewm_Ip_SetPrescaler(EWM_Type * const base, uint8_t value)
+{
+    base->CLKPRESCALER = value;
+}
+
+/*==================================================================================================
+*                                 GLOBAL FUNCTIONS PROTOTYPES
+==================================================================================================*/
+
+void Ewm_Ip_IrqHandler(uint8 Instance);
+
+/*==================================================================================================
+*                                        GLOBAL FUNCTIONS
+==================================================================================================*/
+
+/*FUNCTION**********************************************************************
+ *
+ * Function Name : Ewm_Ip_Init
+ * Description   : This function initializes the EWM instance to a specified
+ * state
+ *
+ * @implements     Ewm_Ip_Init_Activity
+ *END**************************************************************************/
+Ewm_Ip_StatusType Ewm_Ip_Init(const uint8 Instance, const Ewm_Ip_ConfigType * const ConfigPtr)
+{
+#if (EWM_IP_DEV_ERROR_DETECT == STD_ON)
+    DevAssert(Instance < EWM_INSTANCE_COUNT);
+    DevAssert(ConfigPtr != NULL_PTR);
+#endif
+
+    /* Return status variable */
+    Ewm_Ip_StatusType statusCode = EWM_IP_STATUS_SUCCESS;
+    /* Flag to store if the module is enabled */
+    boolean isModuleEnabled;
+    uint8_t tempValue = 0U;
+    /* Base pointer */
+    EWM_Type * base = s_ewmBase[Instance];
+
+    /* Get the enablement status of the module */
+    isModuleEnabled = Ewm_Ip_IsEnabled(base);
+    /* Check if the EWM instance is already enabled or if the windows values are not correct */
+    if ((isModuleEnabled == TRUE) || (ConfigPtr->CompareHigh <= ConfigPtr->CompareLow) ||
+        (ConfigPtr->CompareHigh > EWM_IP_FEATURE_CMPH_MAX_VALUE))
+    {
+        /* If conditions are met change the status code to error */
+        statusCode = EWM_IP_STATUS_ERROR;
+    }
+    else
+    {
+        /* Set clock prescaler */
+        Ewm_Ip_SetPrescaler(base, ConfigPtr->Prescaler);
+        /* Set compare high and low values */
+        Ewm_Ip_SetCompareHigh(base, ConfigPtr->CompareHigh);
+        Ewm_Ip_SetCompareLow(base, ConfigPtr->CompareLow);
+
+        /* Configure the Control register and enable the instance.
+         * Set the values that are not affected by the input pin
+         */
+        tempValue = (uint8_t)((uint8_t)EWM_CTRL_EWMEN(1U) | EWM_CTRL_INTEN(ConfigPtr->InterruptEnable ? 1U : 0U));
+
+        /* Depending how the input pin is configured set the values into the
+         * temporary variable
+         */
+        switch (ConfigPtr->assertLogic)
+        {
+            case EWM_IN_ASSERT_ON_LOGIC_ZERO:
+                tempValue |= EWM_CTRL_INEN_MASK;    /* Input pin enabled, Input asserted on logic 0 */
+                break;
+            case EWM_IN_ASSERT_ON_LOGIC_ONE:
+                tempValue |= (uint8_t)(EWM_CTRL_INEN_MASK | EWM_CTRL_ASSIN_MASK);    /* Input pin enabled, Input asserted on logic 1 */
+                break;
+            case EWM_IN_ASSERT_DISABLED:
+            default:
+                /* Input pin disabled */
+                break;
+        }
+
+        if (ConfigPtr->InterruptEnable == TRUE)
+        {
+            Ewm_Ip_apCallbackPtr[Instance] = ConfigPtr->pfEwmCallback;
+        }
+        else
+        {
+            Ewm_Ip_apCallbackPtr[Instance] = NULL_PTR;
+        }
+
+        /* Write the configuration into the Control register */
+        Ewm_Ip_SetControl(base, tempValue);
+    }
+
+    /* Return the status code */
+    return statusCode;
+}
+
+/*FUNCTION**********************************************************************
+ *
+ * Function Name : Ewm_Ip_Service
+ * Description   : This function services the EWM instance counter
+ *
+ * @implements     Ewm_Ip_Service_Activity
+ *END**************************************************************************/
+void Ewm_Ip_Service(const uint8 Instance)
+{
+#if (EWM_IP_DEV_ERROR_DETECT == STD_ON)
+    DevAssert(Instance < EWM_INSTANCE_COUNT);
+#endif
+
+    /* Base pointer */
+    EWM_Type * base = s_ewmBase[Instance];
+
+    Ewm_Ip_Refresh(base);
+}
+
+/**
+* @Description    This function handles the EWM interrupt request.
+*
+* @implements     EWM_Ip_IrqHandler_Activity
+*/
+void Ewm_Ip_IrqHandler(uint8 Instance)
+{
+#if (EWM_IP_DEV_ERROR_DETECT == STD_ON)
+    DevAssert(Instance < EWM_INSTANCE_COUNT);
+#endif
+    
+    /* Base pointer */
+    EWM_Type * base = s_ewmBase[Instance];
+
+    if(Ewm_Ip_IsIntEnabled(base))
+    {
+        /* Clear the interrupt enable bit */
+        Ewm_Ip_ClearIntenBit(base);
+        
+        if (Ewm_Ip_apCallbackPtr[Instance] != ((void *)0))
+        {
+            Ewm_Ip_apCallbackPtr[Instance]();
+        }
+    }
+}
+
+#ifdef WDG_ROM
+    #if (WDG_ROM == 1U)
+        #define WDG_STOP_SEC_CODE
+    #endif
+#else
+    #if (WDG_RAM == 0U)
+        #define WDG_STOP_SEC_RAMCODE
+    #endif
+#endif
+
+
+#include "Wdg_MemMap.h"
+
+#endif /* (EWM_IP_ENABLE == STD_ON) */
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */

RTD/src/Ftfc_Eep_Ip.c

@@ -0,0 +1,1321 @@
+/*==================================================================================================
+*   Project              : RTD AUTOSAR 4.4
+*   Platform             : CORTEXM
+*   Peripheral           : IPV_FTFC
+*   Dependencies         : 
+*
+*   Autosar Version      : 4.4.0
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
+*   Autosar Conf.Variant :
+*   SW Version           : 1.0.0
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+*   (c) Copyright 2020-2021 NXP Semiconductors
+*   All Rights Reserved.
+*
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
+*   used strictly in accordance with the applicable license terms. By expressly
+*   accepting such terms or by downloading, installing, activating and/or otherwise
+*   using the software, you are agreeing that you have read, and that you agree to
+*   comply with and are bound by, such license terms. If you do not agree to be
+*   bound by the applicable license terms, then you may not retain, install,
+*   activate or otherwise use the software.
+==================================================================================================*/
+
+/**
+*   @file Ftfc_Eep_Ip.c
+*
+*   @addtogroup FTFC_EEP_IP
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                          INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+
+#include "OsIf.h"
+#include "Mcal.h"
+#include "SchM_Eep.h"
+#include "Ftfc_Eep_Ip.h"
+
+#if (FTFC_EEP_IP_DEV_ERROR_DETECT == STD_ON)
+#include "Devassert.h"
+#endif
+
+/*==================================================================================================
+*                                 SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define FTFC_EEP_IP_VENDOR_ID_C                      43
+#define FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_C       4
+#define FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_C       4
+#define FTFC_EEP_IP_AR_RELEASE_REVISION_VERSION_C    0
+#define FTFC_EEP_IP_SW_MAJOR_VERSION_C               1
+#define FTFC_EEP_IP_SW_MINOR_VERSION_C               0
+#define FTFC_EEP_IP_SW_PATCH_VERSION_C               0
+
+/*==================================================================================================
+*                                       FILE VERSION CHECKS
+==================================================================================================*/
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Version checks for OsIf.h */
+    #if ((FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_C != OSIF_AR_RELEASE_MAJOR_VERSION) || \
+        (FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_C != OSIF_AR_RELEASE_MINOR_VERSION) \
+        )
+        #error "Ftfc_Eep_Ip.c and OsIf.h are for different AUTOSAR versions!"
+    #endif
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Version checks for Mcal.h */
+    #if ((FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_C != MCAL_AR_RELEASE_MAJOR_VERSION) || \
+        (FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_C != MCAL_AR_RELEASE_MINOR_VERSION) \
+        )
+        #error "Ftfc_Eep_Ip.c and Mcal.h are for different AUTOSAR versions!"
+    #endif
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Version checks for SchM_Eep.h */
+    #if ((FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_C != SCHM_EEP_AR_RELEASE_MAJOR_VERSION) || \
+        (FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_C != SCHM_EEP_AR_RELEASE_MINOR_VERSION) \
+        )
+        #error "Ftfc_Eep_Ip.c and SchM_Eep.h are for different AUTOSAR versions!"
+    #endif
+#endif
+
+/* Version checks for Ftfc_Eep_Ip.h */
+#if (FTFC_EEP_IP_VENDOR_ID_C != FTFC_EEP_IP_VENDOR_ID_H)
+    #error "Ftfc_Eep_Ip.c and Ftfc_Eep_Ip.h have different vendor IDs!"
+#endif
+#if ((FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_C    != FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_H) || \
+     (FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_C    != FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_H) || \
+     (FTFC_EEP_IP_AR_RELEASE_REVISION_VERSION_C != FTFC_EEP_IP_AR_RELEASE_REVISION_VERSION_H) \
+    )
+    #error "Ftfc_Eep_Ip.c and Ftfc_Eep_Ip.h are for different AUTOSAR versions!"
+#endif
+#if ((FTFC_EEP_IP_SW_MAJOR_VERSION_C != FTFC_EEP_IP_SW_MAJOR_VERSION_H) || \
+     (FTFC_EEP_IP_SW_MINOR_VERSION_C != FTFC_EEP_IP_SW_MINOR_VERSION_H) || \
+     (FTFC_EEP_IP_SW_PATCH_VERSION_C != FTFC_EEP_IP_SW_PATCH_VERSION_H) \
+    )
+    #error "Ftfc_Eep_Ip.c and Ftfc_Eep_Ip.h have different SW versions!"
+#endif
+
+#if (FTFC_EEP_IP_DEV_ERROR_DETECT == STD_ON)
+    #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+        /* Version checks for Devassert.h */
+        #if ((FTFC_EEP_IP_AR_RELEASE_MAJOR_VERSION_C != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
+             (FTFC_EEP_IP_AR_RELEASE_MINOR_VERSION_C != DEVASSERT_AR_RELEASE_MINOR_VERSION) \
+            )
+            #error "Ftfc_Eep_Ip.c and Devassert.h are for different AUTOSAR versions!"
+        #endif
+    #endif
+#endif /* FTFC_EEP_IP_DEV_ERROR_DETECT == STD_ON */
+
+/*==================================================================================================
+*                                          LOCAL MACROS
+==================================================================================================*/
+
+/** Switch FlexRAM function between RAM and emulated EEPROM. */
+#define FTFC_EEP_IP_FLASH_CMD_SETRAM_U8         0x81U
+
+/** Minimum number of bytes allowed for a quick write. */
+#define FTFC_EEP_IP_QUICK_WRITES_LENGTH_MIN     16U
+
+/** Maximum number of bytes allowed for a quick write. */
+#define FTFC_EEP_IP_QUICK_WRITES_LENGTH_MAX     512U
+
+#if (FTFC_EEP_IP_HIGH_TEMP_CHIP == STD_ON)
+
+#define IP_EEPROM               IP_FTFM                     /**< ptr to the IP_FTFM structure                                               */
+#define FCNFG_EEERDY_MASK       FTFM_FCNFG_EEERDY_MASK      /**< set when FlexRAM is ready for emulated EEPROM operations                   */
+#define FSTAT_CCIF_MASK         FTFM_FSTAT_CCIF_MASK        /**< zero while a FTFC command or an EEPROM operation is in progress            */
+#define FSTAT_ACCERR_MASK       FTFM_FSTAT_ACCERR_MASK      /**< flash access error flag                                                    */
+#define FSTAT_FPVIOL_MASK       FTFM_FSTAT_FPVIOL_MASK      /**< a write was attempted to a protected area                                  */
+#define FSTAT_RDCOLERR_MASK     FTFM_FSTAT_RDCOLERR_MASK    /**< collision over a FTFC resource that was being manipulated by a command     */
+#define FSTAT_MGSTAT0_MASK      FTFM_FSTAT_MGSTAT0_MASK     /**< set if an error is detected during execution of an FTFC command            */
+#define FSTAT_MGSTAT1_MASK      FTFM_FSTAT_MGSTAT1_MASK     /**< uncorrectable ECC fault was detected during execution of a flash command   */
+#define FSTAT_MGSTAT2_MASK      FTFM_FSTAT_MGSTAT2_MASK     /**< uncorrectable ECC fault was detected during emulated EEPROM initialization */
+#define FSTAT_MGSTAT3_MASK      FTFM_FSTAT_MGSTAT3_MASK     /**< uncorrectable ECC fault was detected during the flash reset sequence       *
+                                                                 unless the error occurred while reading the flash configuration field,     *
+                                                                 the FlexNVM EEPROM partition field, or CSEc strict boot firmware.          */
+#else /* FTFC_EEP_IP_HIGH_TEMP_CHIP */
+
+#define IP_EEPROM               IP_FTFC                     /**< ptr to the IP_FTFC structure                                               */
+#define FCNFG_EEERDY_MASK       FTFC_FCNFG_EEERDY_MASK      /**< FlexRAM ready for emulated EEPROM operations                               */
+#define FSTAT_CCIF_MASK         FTFC_FSTAT_CCIF_MASK        /**< if zero, a FTFC command or an EEPROM operation is in progress              */
+#define FSTAT_ACCERR_MASK       FTFC_FSTAT_ACCERR_MASK      /**< flash access error flag                                                    */
+#define FSTAT_FPVIOL_MASK       FTFC_FSTAT_FPVIOL_MASK      /**< a write was attempted to a protected area                                  */
+#define FSTAT_RDCOLERR_MASK     FTFC_FSTAT_RDCOLERR_MASK    /**< collision over a FTFC resource that was being manipulated by a command     */
+#define FSTAT_MGSTAT0_MASK      FTFC_FSTAT_MGSTAT0_MASK     /**< set if an error is detected during execution of an FTFC command            */
+
+#endif /* FTFC_EEP_IP_HIGH_TEMP_CHIP */
+
+/** Toggle the development errors detection. */
+#if (FTFC_EEP_IP_DEV_ERROR_DETECT == STD_ON)
+#define FTFC_DEV_ASSERT(X)      DevAssert(X)
+#else
+#define FTFC_DEV_ASSERT(X)
+#endif
+
+#define FTFC_EEP_IP_NO_BO_DETECTED_U8               0x00    /**< No EEPROM issues detected */
+#define FTFC_EEP_IP_BO_DURING_MAINTENANCE_U8        0x01    /**< Quick write maintenance has to be completed. */
+#define FTFC_EEP_IP_BO_DURING_QUICK_WRITES_U8       0x02    /**< Quick writes were discarded due to a reset. */
+#define FTFC_EEP_IP_BO_DURING_NORMAL_WRITES_U8      0x04    /**< A normal write was interrupted by reset. */
+
+/*==================================================================================================
+*                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
+==================================================================================================*/
+
+/** FCCOB registers and their position in the IP_EEPROM->FCCOB[] array */
+enum
+{
+    FTFC_EEP_IP_FCCOB_3,    FTFC_EEP_IP_FCCOB_2,    FTFC_EEP_IP_FCCOB_1,    FTFC_EEP_IP_FCCOB_0,
+    FTFC_EEP_IP_FCCOB_7,    FTFC_EEP_IP_FCCOB_6,    FTFC_EEP_IP_FCCOB_5,    FTFC_EEP_IP_FCCOB_4,
+    FTFC_EEP_IP_FCCOB_B,    FTFC_EEP_IP_FCCOB_A,    FTFC_EEP_IP_FCCOB_9,    FTFC_EEP_IP_FCCOB_8
+};
+
+/** Input params written in the FCCOB registers for the flash command: Set FlexRAM Function */
+enum
+{
+    FTFC_EEP_IP_FCCOB_SETRAM_WRITE_CMD_SETRAM               = FTFC_EEP_IP_FCCOB_0,    /**< Flash command: SETRAM (0x81) */
+    FTFC_EEP_IP_FCCOB_SETRAM_WRITE_FR_FCC                   = FTFC_EEP_IP_FCCOB_1,    /**< FlexRAM Function Control Code */
+    FTFC_EEP_IP_FCCOB_SETRAM_WRITE_QUICKWRITES_LENGTH_MSB   = FTFC_EEP_IP_FCCOB_4,    /**< Number of FlexRAM bytes allocated for EEPROM quick writes [15:8] */
+    FTFC_EEP_IP_FCCOB_SETRAM_WRITE_QUICKWRITES_LENGTH_LSB   = FTFC_EEP_IP_FCCOB_5     /**< Number of FlexRAM bytes allocated for EEPROM quick writes [7:0] */
+};
+
+/** Returned values read from the FCCOB registers for the flash command: Set FlexRAM Function */
+enum
+{
+    FTFC_EEP_IP_FCCOB_SETRAM_READ_BROWNOUT_CODE             = FTFC_EEP_IP_FCCOB_5,    /**< Brown-out (BO) Detection Codes */
+    FTFC_EEP_IP_FCCOB_SETRAM_READ_QWRITES_MAINTENANCE_MSB   = FTFC_EEP_IP_FCCOB_6,    /**< Number of EEPROM quick write records requiring maintenance [15:8] */
+    FTFC_EEP_IP_FCCOB_SETRAM_READ_QWRITES_MAINTENANCE_LSB   = FTFC_EEP_IP_FCCOB_7,    /**< Number of EEPROM quick write records requiring maintenance [7:0] */
+    FTFC_EEP_IP_FCCOB_SETRAM_READ_SECTOR_ERASE_COUNT_MSB    = FTFC_EEP_IP_FCCOB_8,    /**< EEPROM sector erase count [15:8] */
+    FTFC_EEP_IP_FCCOB_SETRAM_READ_SECTOR_ERASE_COUNT_LSB    = FTFC_EEP_IP_FCCOB_9     /**< EEPROM sector erase count [7:0] */
+};
+
+/** FLEXRAM Function Control Codes */
+typedef enum
+{
+    FLEXRAM_FCC_MODE_EEERAM_NORMAL      = 0x00,     /**< Make FlexRAM available for emulated EEPROM */
+    FLEXRAM_FCC_MODE_EEERAM_QWRITES     = 0x55,     /**< Make FlexRAM available for EEPROM quick writes */
+    FLEXRAM_FCC_GET_FLEXRAM_STATUS      = 0x77,     /**< EEPROM quick write status query */
+    FLEXRAM_FCC_COMPLETE_MAINTENANCE    = 0xAA,     /**< Complete interrupted EEPROM quick write process */
+    FLEXRAM_FCC_MODE_RAM                = 0xFF      /**< Make FlexRAM available as RAM */
+} Ftfc_Eep_Ip_FlexramFccType;
+
+/** Data about the last asynchronous job */
+typedef struct
+{
+    /** updated at the beginning of a new async job with OsIf_GetCounter() and with each OsIf_GetElapsed() call */
+    uint32 TicksStarted;
+    /** here OsIf_GetElapsed() stores the time elapsed since TicksStarted */
+    uint32 TicksElapsed;
+    /** the status of the last asynchronous job may be: ok, pending or failed */
+    Ftfc_Eep_Ip_StatusType Result;
+} Ftfc_Eep_Ip_AsyncJobType;
+
+/*==================================================================================================
+*                                        GLOBAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                        GLOBAL VARIABLES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                         LOCAL CONSTANTS
+==================================================================================================*/
+
+#define EEP_START_SEC_CONST_32
+#include "Eep_MemMap.h"
+
+    /** The contents of an erased EEPROM record.
+     *  This variable needs to be aligned on LONGWORD bytes. */
+    static uint32 const Ftfc_Eep_Ip_u32EraseValue = 0xFFFFFFFFU;
+
+#define EEP_STOP_SEC_CONST_32
+#include "Eep_MemMap.h"
+
+/*==================================================================================================
+*                                         LOCAL VARIABLES
+==================================================================================================*/
+
+#define EEP_START_SEC_VAR_CLEARED_UNSPECIFIED
+#include "Eep_MemMap.h"
+
+    static Ftfc_Eep_Ip_ConfigType const * Ftfc_Eep_Ip_pxConfiguration;
+    static Ftfc_Eep_Ip_BrownOutCodeType Ftfc_Eep_Ip_eBrownOutCode;
+    static Ftfc_Eep_Ip_AsyncJobType Ftfc_Eep_Ip_xAsyncJob;
+
+#define EEP_STOP_SEC_VAR_CLEARED_UNSPECIFIED
+#include "Eep_MemMap.h"
+
+/*==================================================================================================
+*                                   LOCAL FUNCTION PROTOTYPES
+==================================================================================================*/
+
+#define EEP_START_SEC_CODE
+#include "Eep_MemMap.h"
+
+    static Ftfc_Eep_Ip_PageSizeType Ftfc_Eep_Ip_AlignedPageSize (Ftfc_Eep_Ip_AddressType FlexramAddress,
+                                                                 Ftfc_Eep_Ip_AddressType RamAddress,
+                                                                 Ftfc_Eep_Ip_LengthType Length
+                                                                );
+
+    static boolean Ftfc_Eep_Ip_IsFtfcReady (void);
+
+    static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_CmdSetFlexramFunction (Ftfc_Eep_Ip_FlexramFccType FlexramFuncControlCode,
+                                                                     uint16 QuickWritesLength
+                                                                    );
+
+    static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_CheckFstatErrors (void);
+
+    static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_AcEflashCmd (void);
+
+    static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_AcEflashWrite (Ftfc_Eep_Ip_AddressType DestAddress,
+                                                             uint8 const * pu8SrcAddress,
+                                                             Ftfc_Eep_Ip_PageSizeType PageSize,
+                                                             boolean Async
+                                                            );
+
+#define EEP_STOP_SEC_CODE
+#include "Eep_MemMap.h"
+
+
+#if (FTFC_EEP_IP_LOAD_AC_INTO_RAM == STD_ON)
+#define EEP_START_SEC_RAMCODE
+#else
+#define EEP_START_SEC_CODE
+#endif
+#include "Eep_MemMap.h"
+
+    static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_StartFlashCommand (void);
+
+    static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_WriteIntoFlexram (Ftfc_Eep_Ip_AddressType DestAddress,
+                                                                uint8 const * pu8SrcAddress,
+                                                                Ftfc_Eep_Ip_PageSizeType PageSize,
+                                                                boolean Async
+                                                               );
+
+    static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_WaitCcifTimeout (uint32 TimeoutCounter);
+
+#if (FTFC_EEP_IP_LOAD_AC_INTO_RAM == STD_ON)
+#define EEP_STOP_SEC_RAMCODE
+#else
+#define EEP_STOP_SEC_CODE
+#endif
+#include "Eep_MemMap.h"
+
+/*==================================================================================================
+*                                        GLOBAL FUNCTIONS
+==================================================================================================*/
+
+#define EEP_START_SEC_CODE
+#include "Eep_MemMap.h"
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Initialize the module.
+ * @details Set FlexRAM to work as EEERAM.
+ *          Query EEPROM quick write status and complete the maintenance, if needed.
+ *
+ * Out of reset with the FSTAT[CCIF] bit clear, the partition settings (EEESIZE, DEPART)
+ * are read from the data flash IFR and the emulated EEPROM file system is initialized
+ * accordingly. The emulated EEPROM file system locates all valid EEPROM data records
+ * in EEPROM backup and copies the newest data to FlexRAM.
+ *
+ * CCIF is cleared throughout the reset sequence. Completion of the reset sequence is marked by
+ * setting CCIF which enables flash user commands.
+ *
+ * @param[in]  pConfig pointer stored in Ftfc_Eep_Ip_pxConfiguration
+ *
+ * @return the initialization result
+ * @retval FTFC_EEP_IP_STATUS_OK             initialization successful
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        a flash cmd timeout has occurred
+ * @retval FTFC_EEP_IP_STATUS_FAILED         a flash command failed to execute
+ * @retval FTFC_EEP_IP_STATUS_FAILED_MGSTAT  one or more MGSTAT 1/2/3 bits were set
+ *
+ * @implements Ftfc_Eep_Ip_Init_Activity
+ *
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_Init (Ftfc_Eep_Ip_ConfigType const * pConfig)
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_OK;
+    uint8 BrownoutCode = 0U;
+
+    FTFC_DEV_ASSERT(NULL_PTR != pConfig);
+
+    /* Overwrite all global variables */
+    Ftfc_Eep_Ip_pxConfiguration = pConfig;
+    Ftfc_Eep_Ip_eBrownOutCode = FTFC_EEP_IP_NO_BO_DETECTED;
+    Ftfc_Eep_Ip_xAsyncJob.TicksStarted = 0U;
+    Ftfc_Eep_Ip_xAsyncJob.TicksElapsed = 0U;
+    Ftfc_Eep_Ip_xAsyncJob.Result = FTFC_EEP_IP_STATUS_OK;
+
+    if (0U == (IP_EEPROM->FCNFG & FCNFG_EEERDY_MASK))
+    {
+        /* When the memory partitioning is done without the option to load the EEPROM data
+         * to FLEXRAM at reset, a FLEXRAM_FCC_MODE_EEERAM_NORMAL command is needed (so EEERDy gets set).
+         * Also, the FLEXRAM_FCC_GET_FLEXRAM_STATUS cmd is not allowed unless the EEERDY bit is set. */
+        Status = Ftfc_Eep_Ip_CmdSetFlexramFunction(FLEXRAM_FCC_MODE_EEERAM_NORMAL, 0U);
+    }
+
+    if (FTFC_EEP_IP_STATUS_OK == Status)
+    {
+        Status = Ftfc_Eep_Ip_CmdSetFlexramFunction(FLEXRAM_FCC_GET_FLEXRAM_STATUS, 0U);
+        if (FTFC_EEP_IP_STATUS_OK == Status)
+        {
+            BrownoutCode = IP_EEPROM->FCCOB[FTFC_EEP_IP_FCCOB_SETRAM_READ_BROWNOUT_CODE];
+            switch (BrownoutCode)
+            {
+                case FTFC_EEP_IP_BO_DURING_MAINTENANCE_U8:
+                    Ftfc_Eep_Ip_eBrownOutCode = FTFC_EEP_IP_BO_DURING_MAINTENANCE;
+                break;
+
+                case FTFC_EEP_IP_BO_DURING_QUICK_WRITES_U8:
+                    Ftfc_Eep_Ip_eBrownOutCode = FTFC_EEP_IP_BO_DURING_QUICK_WRITES;
+                break;
+
+                case FTFC_EEP_IP_BO_DURING_NORMAL_WRITES_U8:
+                    Ftfc_Eep_Ip_eBrownOutCode = FTFC_EEP_IP_BO_DURING_NORMAL_WRITES;
+                break;
+
+                case FTFC_EEP_IP_NO_BO_DETECTED_U8:
+                    Ftfc_Eep_Ip_eBrownOutCode = FTFC_EEP_IP_NO_BO_DETECTED;
+                break;
+
+                default:
+                    Status = FTFC_EEP_IP_STATUS_FAILED;
+                break;
+            }
+
+            if (FTFC_EEP_IP_NO_BO_DETECTED != Ftfc_Eep_Ip_eBrownOutCode)
+            {
+                Status = Ftfc_Eep_Ip_CmdSetFlexramFunction(FLEXRAM_FCC_COMPLETE_MAINTENANCE, 0U);
+            }
+        }
+    }
+
+    return Status;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief  Read @p Length bytes from EEPROM @p SrcAddress to @p pu8DestAddress.
+ *
+ * @param[in]  SrcAddress EEPROM address to read from
+ * @param[out] pu8DestAddress buffer to store the read data
+ * @param[in]  Length how many bytes to read
+ *
+ * @return the read operation status
+ * @retval FTFC_EEP_IP_STATUS_OK      the requested bytes were copied into the destination buffer
+ * @retval FTFC_EEP_IP_STATUS_FAILED  FTFC not ready
+ * @retval FTFC_EEP_IP_STATUS_FAILED  a read was attempted on an invalid page size
+ *
+ * @implements Ftfc_Eep_Ip_Read_Activity
+ *
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_Read (Ftfc_Eep_Ip_AddressType SrcAddress,
+                                         uint8 * pu8DestAddress,
+                                         Ftfc_Eep_Ip_LengthType Length
+                                        )
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_OK;
+    Ftfc_Eep_Ip_AddressType FlexramAddress = FTFC_EEP_IP_FLEXRAM_ADDRESS + SrcAddress;
+    Ftfc_Eep_Ip_AddressType DestinationAddress = (Ftfc_Eep_Ip_AddressType)pu8DestAddress;
+    Ftfc_Eep_Ip_PageSizeType PageSize = FTFC_EEP_IP_PAGE_BYTE;
+    Ftfc_Eep_Ip_LengthType LengthRemaining = Length;
+
+    FTFC_DEV_ASSERT(pu8DestAddress != NULL_PTR);
+    FTFC_DEV_ASSERT(SrcAddress < FTFC_EEP_IP_EEP_SIZE);
+    FTFC_DEV_ASSERT((SrcAddress + LengthRemaining) <= FTFC_EEP_IP_EEP_SIZE);
+    FTFC_DEV_ASSERT(LengthRemaining > 0U);
+
+    MCAL_FAULT_INJECTION_POINT(EEP_FIP_01_EEP_AFTER_READ_SYNC);
+
+    if (Ftfc_Eep_Ip_IsFtfcReady())
+    {
+        while ((LengthRemaining > 0U) && (FTFC_EEP_IP_STATUS_OK == Status))
+        {
+            PageSize = Ftfc_Eep_Ip_AlignedPageSize(FlexramAddress, DestinationAddress, LengthRemaining);
+
+        #if (FTFC_EEP_IP_HIGH_TEMP_CHIP == STD_ON)
+            switch (PageSize)
+            {
+                case FTFC_EEP_IP_PAGE_LONGWORD:
+                    *((uint32 *)DestinationAddress) = *((uint32 *)FlexramAddress);
+                break;
+
+                case FTFC_EEP_IP_PAGE_WORD:
+                {
+                    uint32 Offset = FlexramAddress % FTFC_EEP_IP_PAGE_LONGWORD;
+                    uint32 PageContents = *(uint32 *)(FlexramAddress - Offset);
+                    *((uint16 *)DestinationAddress) = (uint16)(PageContents >> (Offset * 8U));
+                }
+                break;
+
+                case FTFC_EEP_IP_PAGE_BYTE:
+                {
+                    uint32 Offset = FlexramAddress % FTFC_EEP_IP_PAGE_LONGWORD;
+                    uint32 PageContents = *(uint32 *)(FlexramAddress - Offset);
+                    *((uint8 *)DestinationAddress) = (uint8)(PageContents >> (Offset * 8U));
+                }
+                break;
+
+                default:
+                    Status = FTFC_EEP_IP_STATUS_FAILED;
+                break;
+            }
+
+        #else /* FTFC_EEP_IP_HIGH_TEMP_CHIP */
+
+            switch (PageSize)
+            {
+                case FTFC_EEP_IP_PAGE_LONGWORD:
+                    *((uint32 *)DestinationAddress) = *((uint32 *)FlexramAddress);
+                break;
+
+                case FTFC_EEP_IP_PAGE_WORD:
+                    *((uint16 *)DestinationAddress) = *((uint16 *)FlexramAddress);
+                break;
+
+                case FTFC_EEP_IP_PAGE_BYTE:
+                    *((uint8 *)DestinationAddress) = *((uint8 *)FlexramAddress);
+                break;
+
+                default:
+                    Status = FTFC_EEP_IP_STATUS_FAILED;
+                break;
+            }
+        #endif /* FTFC_EEP_IP_HIGH_TEMP_CHIP */
+
+            FlexramAddress += (Ftfc_Eep_Ip_AddressType)PageSize;
+            DestinationAddress += (Ftfc_Eep_Ip_AddressType)PageSize;
+            LengthRemaining -= (Ftfc_Eep_Ip_LengthType)PageSize;
+        }
+    }
+    else
+    {
+        Status = FTFC_EEP_IP_STATUS_FAILED;
+    }
+
+    return Status;
+}
+
+#if (FTFC_EEP_IP_COMPARE_API == STD_ON)
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Compare the first @p Length bytes of @p pu8DestAddress to the contents found at @p SrcAddress.
+ *
+ * @param[in] pu8DestAddress pointer to the data buffer
+ * @param[in] SrcAddress where the contents in EEPROM are stored
+ * @param[in] Length how many bytes to compare
+ *
+ * @return the comparison result
+ * @retval FTFC_EEP_IP_STATUS_OK                  the contents match
+ * @retval FTFC_EEP_IP_STATUS_BLOCK_INCONSISTENT  the contents do not match
+ * @retval FTFC_EEP_IP_STATUS_FAILED              FTFC not ready
+ * @retval FTFC_EEP_IP_STATUS_FAILED              a read was attempted on an invalid page size
+ *
+ * @implements Ftfc_Eep_Ip_Compare_Activity
+ *
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_Compare (Ftfc_Eep_Ip_AddressType SrcAddress,
+                                            uint8 const * pu8DestAddress,
+                                            Ftfc_Eep_Ip_LengthType Length
+                                           )
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_OK;
+    Ftfc_Eep_Ip_AddressType FlexramAddress = FTFC_EEP_IP_FLEXRAM_ADDRESS + SrcAddress;
+    Ftfc_Eep_Ip_AddressType RamAddress = (Ftfc_Eep_Ip_AddressType)pu8DestAddress;
+    Ftfc_Eep_Ip_PageSizeType PageSize = FTFC_EEP_IP_PAGE_BYTE;
+    Ftfc_Eep_Ip_LengthType LengthRemaining = Length;
+
+    FTFC_DEV_ASSERT(pu8DestAddress != NULL_PTR);
+    FTFC_DEV_ASSERT(SrcAddress < FTFC_EEP_IP_EEP_SIZE);
+    FTFC_DEV_ASSERT((SrcAddress + LengthRemaining) <= FTFC_EEP_IP_EEP_SIZE);
+    FTFC_DEV_ASSERT(LengthRemaining > 0U);
+
+    MCAL_FAULT_INJECTION_POINT(EEP_FIP_02_EEP_AFTER_COMPARE_SYNC);
+
+    if (Ftfc_Eep_Ip_IsFtfcReady())
+    {
+        while ((LengthRemaining > 0U) && (FTFC_EEP_IP_STATUS_OK == Status))
+        {
+            PageSize = Ftfc_Eep_Ip_AlignedPageSize(FlexramAddress, RamAddress, LengthRemaining);
+
+        #if (FTFC_EEP_IP_HIGH_TEMP_CHIP == STD_ON)
+            switch (PageSize)
+            {
+                case FTFC_EEP_IP_PAGE_LONGWORD:
+                    if (*((uint32 *)RamAddress) != *((uint32 *)FlexramAddress))
+                    {
+                        Status = FTFC_EEP_IP_STATUS_BLOCK_INCONSISTENT;
+                    }
+                break;
+
+                case FTFC_EEP_IP_PAGE_WORD:
+                {
+                    uint32 Offset = FlexramAddress % FTFC_EEP_IP_PAGE_LONGWORD;
+                    uint32 PageContents = *(uint32 *)(FlexramAddress - Offset);
+                    if (*((uint16 *)RamAddress) != (uint16)(PageContents >> (Offset * 8U)))
+                    {
+                        Status = FTFC_EEP_IP_STATUS_BLOCK_INCONSISTENT;
+                    }
+                }
+                break;
+
+                case FTFC_EEP_IP_PAGE_BYTE:
+                {
+                    uint32 Offset = FlexramAddress % FTFC_EEP_IP_PAGE_LONGWORD;
+                    uint32 PageContents = *(uint32 *)(FlexramAddress - Offset);
+                    if (*((uint8 *)RamAddress) != (uint8)(PageContents >> (Offset * 8U)))
+                    {
+                        Status = FTFC_EEP_IP_STATUS_BLOCK_INCONSISTENT;
+                    }
+                }
+                break;
+
+                default:
+                    Status = FTFC_EEP_IP_STATUS_FAILED;
+                break;
+            }
+
+        #else /* FTFC_EEP_IP_HIGH_TEMP_CHIP */
+
+            switch (PageSize)
+            {
+                case FTFC_EEP_IP_PAGE_LONGWORD:
+                    if (*((uint32 *)RamAddress) != *((uint32 *)FlexramAddress))
+                    {
+                        Status = FTFC_EEP_IP_STATUS_BLOCK_INCONSISTENT;
+                    }
+                break;
+
+                case FTFC_EEP_IP_PAGE_WORD:
+                    if (*((uint16 *)RamAddress) != *((uint16 *)FlexramAddress))
+                    {
+                        Status = FTFC_EEP_IP_STATUS_BLOCK_INCONSISTENT;
+                    }
+                break;
+
+                case FTFC_EEP_IP_PAGE_BYTE:
+                    if (*((uint8 *)RamAddress) != *((uint8 *)FlexramAddress))
+                    {
+                        Status = FTFC_EEP_IP_STATUS_BLOCK_INCONSISTENT;
+                    }
+                break;
+
+                default:
+                    Status = FTFC_EEP_IP_STATUS_FAILED;
+                break;
+            }
+        #endif /* FTFC_EEP_IP_HIGH_TEMP_CHIP */
+
+            FlexramAddress += (Ftfc_Eep_Ip_AddressType)PageSize;
+            RamAddress += (Ftfc_Eep_Ip_AddressType)PageSize;
+            LengthRemaining -= (Ftfc_Eep_Ip_LengthType)PageSize;
+        }
+    }
+    else
+    {
+        Status = FTFC_EEP_IP_STATUS_FAILED;
+    }
+
+    return Status;
+}
+
+#endif /* FTFC_EEP_IP_COMPARE_API */
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Write @p PageSize bytes from @p pu8SrcAddress buffer to EEPROM at @p offset DestAddress.
+ *
+ * @param[out] DestAddress EEPROM offset
+ * @param[in]  pu8SrcAddress buffer containing the data to be written
+ * @param[in]  PageSize must be a valid PageSize: 1, 2 or 4 bytes for FTFC and only 4 bytes for FTFM
+ * @param[in]  Async choose between a synchronous and an asynchronous job
+ *
+ * @return the write operation result
+ * @retval FTFC_EEP_IP_STATUS_FAILED         FTFC not ready
+ * @retval FTFC_EEP_IP_STATUS_FAILED         an invalid page alignment was given
+ * @retval FTFC_EEP_IP_STATUS_FAILED         sync: some of the FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        sync: timeout occurred while waiting for CCIF
+ * @retval FTFC_EEP_IP_STATUS_OK             sync: page successfully written to EFLASH
+ * @retval FTFC_EEP_IP_STATUS_PENDING        async: the page was written to FlexRAM, but the status of
+ *                                           the EFLASH record shall be interrogated with GetJobResult
+ *
+ * @implements Ftfc_Eep_Ip_Write_Activity
+ *
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_Write (Ftfc_Eep_Ip_AddressType DestAddress,
+                                          uint8 const * pu8SrcAddress,
+                                          Ftfc_Eep_Ip_PageSizeType PageSize,
+                                          boolean Async
+                                         )
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_FAILED;
+    Ftfc_Eep_Ip_AddressType DestAddr = DestAddress;
+
+    FTFC_DEV_ASSERT(pu8SrcAddress != NULL_PTR);
+    FTFC_DEV_ASSERT(DestAddr < FTFC_EEP_IP_EEP_SIZE);
+    FTFC_DEV_ASSERT((DestAddr + (Ftfc_Eep_Ip_AddressType)PageSize) <= FTFC_EEP_IP_EEP_SIZE);
+    FTFC_DEV_ASSERT(PageSize == Ftfc_Eep_Ip_AlignedPageSize(DestAddr, \
+                                                            (Ftfc_Eep_Ip_AddressType)pu8SrcAddress, \
+                                                            (Ftfc_Eep_Ip_LengthType)PageSize));
+
+    /* Convert the EEPROM location to a FlexRAM address */
+    DestAddr += FTFC_EEP_IP_FLEXRAM_ADDRESS;
+
+    if (Ftfc_Eep_Ip_IsFtfcReady())
+    {
+    #if (FTFC_EEP_IP_HIGH_TEMP_CHIP == STD_ON)
+        if ((FTFC_EEP_IP_PAGE_BYTE == PageSize) ||
+            (FTFC_EEP_IP_PAGE_WORD == PageSize))
+        {
+            uint8 Offset = DestAddr % FTFC_EEP_IP_PAGE_LONGWORD;
+            uint32 * PageAddress = (uint32 *)(DestAddr - Offset);
+            uint32 PageContents = *PageAddress;
+
+            uint8 Position = 0U;
+            uint8 SrcByte = 0U;
+            uint32 Mask = 0U;
+
+            if (FTFC_EEP_IP_PAGE_LONGWORD - Offset >= PageSize)
+            {
+                for (Position = Offset; Position - Offset < PageSize; ++Position)
+                {
+                    Mask = 0xFFU << (8U * Position);                /* construct the mask */
+                    PageContents &= ~Mask;                          /* clear the targeted byte */
+                    SrcByte = *(pu8SrcAddress + Position - Offset); /* extract the new byte */
+                    PageContents |= SrcByte << (Position * 8U);     /* set the desired bits */
+                }
+                Status = Ftfc_Eep_Ip_AcEflashWrite((Ftfc_Eep_Ip_AddressType)PageAddress, (uint8 *)&PageContents, PageSize, Async);
+            }
+            else
+            {
+                /* the request crosses the 4-byte aligned page boundary */
+                Status = FTFC_EEP_IP_STATUS_FAILED;
+            }
+        }
+        else
+    #endif /* FTFC_EEP_IP_HIGH_TEMP_CHIP */
+        {
+            Status = Ftfc_Eep_Ip_AcEflashWrite(DestAddr, pu8SrcAddress, PageSize, Async);
+        }
+
+        if ((FTFC_EEP_IP_STATUS_PENDING == Status) && (TRUE == Async))
+        {
+            /* In async mode the user can skip the waiting part, but he must make sure that
+            * the DFLASH partition is not accessed (for r/w) until the CCIF flag is set. */
+            SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_10();
+            Ftfc_Eep_Ip_xAsyncJob.Result = FTFC_EEP_IP_STATUS_PENDING;
+            Ftfc_Eep_Ip_xAsyncJob.TicksStarted = OsIf_GetCounter(FTFC_EEP_IP_TIMEOUT_TYPE);
+            Ftfc_Eep_Ip_xAsyncJob.TicksElapsed = 0U;
+            SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_10();
+        }
+    }
+
+    return Status;
+}
+
+#if (FTFC_EEP_IP_QUICK_WRITES_API == STD_ON)
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   QuickWrite API
+ * @details
+ *
+ * For configurations with interleaved flash blocks for EEPROM backup, quick writes
+ * should be restricted to either within the first half of EEERAM or within the second half
+ * of EEERAM. Otherwise, FSTAT[ACCERR] will be returned.
+ *
+ * Once a quick write is started, user must finish the entire quick write activity prior to
+ * starting another FTFC or CSE command.
+ *
+ * @param[out] DestAddress EEPROM offset needs to be 4-bytes aligned
+ * @param[in]  pu8SrcAddress
+ * @param[in]  Length
+ *
+ * @return quick write status
+ * @retval FTFC_EEP_IP_STATUS_FAILED         FTFC not ready
+ * @retval FTFC_EEP_IP_STATUS_OK             everything ok
+ * @retval FTFC_EEP_IP_STATUS_FAILED         invalid page size/alignment
+ * @retval FTFC_EEP_IP_STATUS_FAILED         some of the FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_FAILED_MGSTAT  one or more MGSTAT 1/2/3 bits were set
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        timeout occurred while waiting for CCIF
+ *
+ * @implements Ftfc_Eep_Ip_QuickWrite_Activity
+ *
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_QuickWrite (Ftfc_Eep_Ip_AddressType DestAddress,
+                                               uint8 const * pu8SrcAddress,
+                                               Ftfc_Eep_Ip_LengthType Length
+                                              )
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_FAILED;
+    Ftfc_Eep_Ip_AddressType SrcAddress = (Ftfc_Eep_Ip_AddressType)pu8SrcAddress;
+    Ftfc_Eep_Ip_AddressType DestAddr = DestAddress;
+    Ftfc_Eep_Ip_LengthType LengthRemaining = Length;
+
+    /* Quick write mode only accepts 4-byte aligned writes */
+    FTFC_DEV_ASSERT((DestAddr % (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_LONGWORD) == 0U);
+    FTFC_DEV_ASSERT((SrcAddress % (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_LONGWORD) == 0U);
+
+    /* FSTAT[ACCERR] is Set if FlexRAM Function Control Code is set to make FlexRAM available for
+     * EEPROM quick writes but the number of bytes allocated for quick write is less than 16,
+     * more than 512, or not divisible by 4 (only 32-bit quick writes are allowed) */
+    FTFC_DEV_ASSERT(LengthRemaining >= FTFC_EEP_IP_QUICK_WRITES_LENGTH_MIN);
+    FTFC_DEV_ASSERT(LengthRemaining <= FTFC_EEP_IP_QUICK_WRITES_LENGTH_MAX);
+    FTFC_DEV_ASSERT((LengthRemaining % (Ftfc_Eep_Ip_LengthType)FTFC_EEP_IP_PAGE_LONGWORD) == 0U);
+
+    Status = Ftfc_Eep_Ip_CmdSetFlexramFunction(FLEXRAM_FCC_MODE_EEERAM_QWRITES, (uint16)LengthRemaining);
+    if (FTFC_EEP_IP_STATUS_OK == Status)
+    {
+        while ((LengthRemaining > 0U) && (FTFC_EEP_IP_STATUS_OK == Status))
+        {
+            Status = Ftfc_Eep_Ip_Write(DestAddr, (uint8 *)SrcAddress, FTFC_EEP_IP_PAGE_LONGWORD, FALSE);
+            LengthRemaining -= (Ftfc_Eep_Ip_LengthType)FTFC_EEP_IP_PAGE_LONGWORD;
+            DestAddr += (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_LONGWORD;
+            SrcAddress += (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_LONGWORD;
+        }
+
+        if (FTFC_EEP_IP_STATUS_OK == Status)
+        {
+            Status = Ftfc_Eep_Ip_CmdSetFlexramFunction(FLEXRAM_FCC_MODE_EEERAM_NORMAL, 0U);
+        }
+        else
+        {
+            (void) Ftfc_Eep_Ip_CmdSetFlexramFunction(FLEXRAM_FCC_MODE_EEERAM_NORMAL, 0U);
+        }
+    }
+
+    return Status;
+}
+
+#endif /* FTFC_EEP_IP_QUICK_WRITES_API */
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Erase API
+ * @details Invokes a write with ERASED_CELL_VALUE.
+ *
+ * @return the erase operation result
+ * @retval FTFC_EEP_IP_STATUS_FAILED         FTFC not ready
+ * @retval FTFC_EEP_IP_STATUS_FAILED         an invalid page size/alignment was given
+ * @retval FTFC_EEP_IP_STATUS_FAILED         sync: some of the FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        sync: timeout occurred while waiting for CCIF
+ * @retval FTFC_EEP_IP_STATUS_OK             sync: page successfully written to EFLASH
+ * @retval FTFC_EEP_IP_STATUS_PENDING        async: the page was written to FlexRAM, but the status of
+ *                                           the EFLASH record shall be interrogated with GetJobResult
+ *
+ * @implements Ftfc_Eep_Ip_Erase_Activity
+ *
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_Erase (Ftfc_Eep_Ip_AddressType Address,
+                                          Ftfc_Eep_Ip_PageSizeType PageSize,
+                                          boolean Async
+                                         )
+{
+    return Ftfc_Eep_Ip_Write(Address, (uint8 const *) &Ftfc_Eep_Ip_u32EraseValue, PageSize, Async);
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief  Interrogate the result of the last async job, considering the timeout and FSTAT errors.
+ *
+ * @return the result of the last async job
+ * @retval FTFC_EEP_IP_STATUS_OK            the job finished successfully
+ * @retval FTFC_EEP_IP_STATUS_FAILED        FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_PENDING       the job is still waiting for CCIF
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT       a timeout has occurred while waiting for CCIF
+ *
+ * @implements Ftfc_Eep_Ip_GetJobResult_Activity
+ *
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_GetJobResult (void)
+{
+    uint32 Timeout = 0U;
+
+    SchM_Enter_Eep_EEP_EXCLUSIVE_AREA_11();
+
+    if (FTFC_EEP_IP_STATUS_PENDING == Ftfc_Eep_Ip_xAsyncJob.Result)
+    {
+        if (Ftfc_Eep_Ip_IsFtfcReady())
+        {
+            Ftfc_Eep_Ip_xAsyncJob.Result = Ftfc_Eep_Ip_CheckFstatErrors();
+            Ftfc_Eep_Ip_xAsyncJob.TicksElapsed = 0U;
+        }
+        else
+        {
+            Timeout = OsIf_MicrosToTicks(FTFC_EEP_IP_ASYNC_WRITE_TIMEOUT, FTFC_EEP_IP_TIMEOUT_TYPE);
+            Ftfc_Eep_Ip_xAsyncJob.TicksElapsed += OsIf_GetElapsed(&Ftfc_Eep_Ip_xAsyncJob.TicksStarted, FTFC_EEP_IP_TIMEOUT_TYPE);
+            if (Ftfc_Eep_Ip_xAsyncJob.TicksElapsed >= Timeout)
+            {
+                Ftfc_Eep_Ip_xAsyncJob.Result = FTFC_EEP_IP_STATUS_TIMEOUT;
+                Ftfc_Eep_Ip_xAsyncJob.TicksElapsed = 0U;
+            }
+        }
+    }
+
+    SchM_Exit_Eep_EEP_EXCLUSIVE_AREA_11();
+
+    return Ftfc_Eep_Ip_xAsyncJob.Result;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief  Getter for Ftfc_Eep_Ip_eBrownOutCode.
+ *
+ * @return the brownout code read after reset
+ * @retval 0x04 normal write was interrupted
+ * @retval 0x02 quick write was interrupted before writing all bytes to flash
+ * @retval 0x01 quick write was interrupted before maintenance completed
+ *
+ * @implements Ftfc_Eep_Ip_GetBrownOutCode_Activity
+ *
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+Ftfc_Eep_Ip_BrownOutCodeType Ftfc_Eep_Ip_GetBrownOutCode (void)
+{
+    return Ftfc_Eep_Ip_eBrownOutCode;
+}
+
+#define EEP_STOP_SEC_CODE
+#include "Eep_MemMap.h"
+
+/*==================================================================================================
+*                                        LOCAL FUNCTIONS
+==================================================================================================*/
+
+#define EEP_START_SEC_CODE
+#include "Eep_MemMap.h"
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief Compute the page size, considering the addresses alignment and the remaining bytes.
+ *
+ * @param[in]  FlexramAddress the FlexRAM address
+ * @param[in]  RamAddress the RAM address
+ * @param[in]  Length how many bytes are left to process
+ *
+ * @return the page size that FlexRAM will accept given the address/buffer alignments
+ * @retval FTFC_EEP_IP_PAGE_BYTE     for unaligned operations
+ * @retval FTFC_EEP_IP_PAGE_WORD     16-bit aligned operations
+ * @retval FTFC_EEP_IP_PAGE_LONGWORD 32-bit aligned operations
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static Ftfc_Eep_Ip_PageSizeType Ftfc_Eep_Ip_AlignedPageSize (Ftfc_Eep_Ip_AddressType FlexramAddress,
+                                                             Ftfc_Eep_Ip_AddressType RamAddress,
+                                                             Ftfc_Eep_Ip_LengthType Length
+                                                            )
+{
+    Ftfc_Eep_Ip_PageSizeType PageSize = FTFC_EEP_IP_PAGE_BYTE;
+
+#if (FTFC_EEP_IP_ALIGNED_RAM_ACCESS == STD_OFF)
+    (void) RamAddress; /* avoid compiler warning */
+#endif
+
+    if ((0U == (FlexramAddress % (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_LONGWORD))
+    #if (FTFC_EEP_IP_ALIGNED_RAM_ACCESS == STD_ON)
+        && (0U == (RamAddress  % (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_LONGWORD))
+    #endif
+    )
+    {
+        if (Length >= (Ftfc_Eep_Ip_LengthType)FTFC_EEP_IP_PAGE_LONGWORD)
+        {
+            /* 4 bytes aligned and length >= 4 bytes: 4 bytes operation */
+            PageSize = FTFC_EEP_IP_PAGE_LONGWORD;
+        }
+        else if (Length >= (Ftfc_Eep_Ip_LengthType)FTFC_EEP_IP_PAGE_WORD)
+        {
+            /* 4 bytes aligned and 4bytes > length >= 2 bytes : 2 bytes operation */
+            PageSize = FTFC_EEP_IP_PAGE_WORD;
+        }
+        else
+        {
+            /* 4 bytes aligned and length < 2 bytes : 1 byte operation */
+            PageSize = FTFC_EEP_IP_PAGE_BYTE;
+        }
+    }
+    else if ((0U == (FlexramAddress % (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_WORD))
+        #if (FTFC_EEP_IP_ALIGNED_RAM_ACCESS == STD_ON)
+             && (0U == (RamAddress  % (Ftfc_Eep_Ip_AddressType)FTFC_EEP_IP_PAGE_WORD))
+        #endif
+            )
+    {
+        if (Length >= (Ftfc_Eep_Ip_LengthType)FTFC_EEP_IP_PAGE_WORD)
+        {
+            /* 2 bytes aligned and length >= 2 bytes : 2 bytes operation */
+            PageSize = FTFC_EEP_IP_PAGE_WORD;
+        }
+        else
+        {
+            /* 2 bytes aligned and length < 2 bytes : 1 byte operation */
+            PageSize = FTFC_EEP_IP_PAGE_BYTE;
+        }
+    }
+    else
+    {
+        /* unaligned operation */
+        PageSize = FTFC_EEP_IP_PAGE_BYTE;
+    }
+
+    return PageSize;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Interrogate the FTFC status.
+ *
+ * @details If CCIF is zero, the previous command execution is still active, a new command write
+ *          sequence cannot be started, and all writes to the FCCOB registers are ignored.
+ *
+ * @details The CCIF and EEERDY flag will remain negated until all EEPROM maintenance activities
+ *          have been completed.
+ *
+ * @return FTFC status
+ * @retval TRUE  FTFC ready
+ * @retval FALSE FTFC not ready
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static boolean Ftfc_Eep_Ip_IsFtfcReady (void)
+{
+    boolean Status = FALSE;
+
+    if (0U != (IP_EEPROM->FCNFG & FCNFG_EEERDY_MASK))
+    {
+        if (0U != (IP_EEPROM->FSTAT & FSTAT_CCIF_MASK))
+        {
+            Status = TRUE;
+        }
+    }
+
+    return Status;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Construct the SETRAM flash command (Set FlexRAM Function)
+ *
+ * @details First, set up all required FCCOB fields and then initiate the command's execution
+ * by writing a 1 to the FSTAT[CCIF] bit.
+ *
+ * @param[in] FlexramFuncControlCode the control code for the SETRAM command
+ * @param[in] QuickWritesLength only used for FLEXRAM_FCC_MODE_EEERAM_QWRITES
+ *
+ * @return flash command execution status
+ * @retval FTFC_EEP_IP_STATUS_OK             the command has completed successfully
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        a timeout has occurred
+ * @retval FTFC_EEP_IP_STATUS_FAILED         the flash command execution failed
+ * @retval FTFC_EEP_IP_STATUS_FAILED_MGSTAT  one or more MGSTAT 1/2/3 bits were set (FTFM only)
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_CmdSetFlexramFunction (Ftfc_Eep_Ip_FlexramFccType FlexramFuncControlCode,
+                                                                 uint16 QuickWritesLength
+                                                                )
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_FAILED;
+
+    /* If CCIF is zero:                                 *
+     * - the previous command execution is still active *
+     * - a new command write sequence cannot be started *
+     * - all writes to the FCCOB registers are ignored. */
+    if (0U != (IP_EEPROM->FSTAT & FSTAT_CCIF_MASK))
+    {
+        /* The individual registers that make up the FCCOB data set can be written in any order. */
+
+        IP_EEPROM->FCCOB[FTFC_EEP_IP_FCCOB_SETRAM_WRITE_CMD_SETRAM] = (uint8)FTFC_EEP_IP_FLASH_CMD_SETRAM_U8;
+        IP_EEPROM->FCCOB[FTFC_EEP_IP_FCCOB_SETRAM_WRITE_FR_FCC] = (uint8)FlexramFuncControlCode;
+
+        if (FLEXRAM_FCC_MODE_EEERAM_QWRITES == FlexramFuncControlCode)
+        {
+            IP_EEPROM->FCCOB[FTFC_EEP_IP_FCCOB_SETRAM_WRITE_QUICKWRITES_LENGTH_MSB] = (uint8)(QuickWritesLength >> 8U);
+            IP_EEPROM->FCCOB[FTFC_EEP_IP_FCCOB_SETRAM_WRITE_QUICKWRITES_LENGTH_LSB] = (uint8) QuickWritesLength;
+        }
+
+        /* This clears the CCIF bit, which locks all FCCOB parameter fields and
+         * they cannot be changed by the user until the command completes (CCIF returns to 1). */
+        Status = Ftfc_Eep_Ip_AcEflashCmd();
+    }
+
+    return Status;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Check the FSTAT error flags.
+ *
+ * @details If the parameter check fails, the FSTAT[ACCERR] (access error) flag is set.
+ * If the protection check fails, the FSTAT[FPVIOL] (protection error) flag is set.
+ * Run-time errors are reported in the FSTAT[MGSTAT0] bit.
+ *
+ * @return the kind of error detected:
+ * @retval FTFC_EEP_IP_STATUS_OK            no error flags were set
+ * @retval FTFC_EEP_IP_STATUS_FAILED        FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_FAILED_MGSTAT MGSTAT1/2/3 bits were set (FTFM only)
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_CheckFstatErrors (void)
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_OK;
+
+#if (FTFC_EEP_IP_HIGH_TEMP_CHIP == STD_ON)
+    uint8 ErrorFlagsHT = FSTAT_MGSTAT1_MASK | FSTAT_MGSTAT2_MASK | FSTAT_MGSTAT3_MASK;
+#endif
+    uint8 ErrorFlags = FSTAT_MGSTAT0_MASK | FSTAT_FPVIOL_MASK | FSTAT_ACCERR_MASK | FSTAT_RDCOLERR_MASK;
+    uint8 FlashStatus = IP_EEPROM->FSTAT;
+
+    if (0U != (FlashStatus & ErrorFlags))
+    {
+        Status = FTFC_EEP_IP_STATUS_FAILED;
+    }
+
+#if (FTFC_EEP_IP_HIGH_TEMP_CHIP == STD_ON)
+    if (0U != (FlashStatus & ErrorFlagsHT))
+    {
+        Status = FTFC_EEP_IP_STATUS_FAILED_MGSTAT;
+    }
+#endif
+
+    return Status;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Implements the steps needed to be followed when accessing the EFLASH.
+ *
+ * @details Clear the FSTAT errors, call the notification functions, run the AC and check for errors.
+ *
+ * Do not attempt to read a flash block while the FTFC is running a command (CCIF = 0)
+ * on that same block.
+ *
+ * @return the EFLASH operation result
+ * @retval FTFC_EEP_IP_STATUS_OK             cmd executed successfully
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        timeout occurred while waiting for CCIF to be set
+ * @retval FTFC_EEP_IP_STATUS_FAILED         some of the FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_FAILED_MGSTAT  one or more MGSTAT 1/2/3 bits were set (FTFM only)
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_AcEflashCmd (void)
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_OK;
+
+    /* When set, the Access Error (ACCERR) and Flash Protection Violation (FPVIOL) bits in this
+     * register prevent the launch of any more commands until the flag is cleared. */
+    IP_EEPROM->FSTAT = (FSTAT_ACCERR_MASK | FSTAT_FPVIOL_MASK); /* W1C */
+
+    if (Ftfc_Eep_Ip_pxConfiguration->startEepromAccessNotifPtr != NULL_PTR)
+    {
+        Ftfc_Eep_Ip_pxConfiguration->startEepromAccessNotifPtr();
+    }
+
+    Status = Ftfc_Eep_Ip_StartFlashCommand();
+
+    if (Ftfc_Eep_Ip_pxConfiguration->finishedEepromAccessNotifPtr != NULL_PTR)
+    {
+        Ftfc_Eep_Ip_pxConfiguration->finishedEepromAccessNotifPtr();
+    }
+
+    if (FTFC_EEP_IP_STATUS_OK == Status)
+    {
+        Status = Ftfc_Eep_Ip_CheckFstatErrors();
+    }
+
+    return Status;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Implements the steps needed to be followed when accessing the EFLASH.
+ *
+ * @details Clear the FSTAT errors, call the notification functions, run the AC and check for errors.
+ *
+ * @param[in] DestAddress
+ * @param[in] pu8SrcAddress
+ * @param[in] PageSize
+ * @param[in] Async
+ *
+ * @return the write operation result
+ * @retval FTFC_EEP_IP_STATUS_OK             sync: page successfully written to EFLASH
+ * @retval FTFC_EEP_IP_STATUS_FAILED         sync: some of the FSTAT error bits were set
+ * @retval FTFC_EEP_IP_STATUS_FAILED_MGSTAT  sync: one or more MGSTAT 1/2/3 bits were set
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT        sync: timeout occurred while waiting for CCIF
+ * @retval FTFC_EEP_IP_STATUS_PENDING        async: the page was written to FlexRAM, but the status of
+ *                                           the EFLASH record shall be interrogated with GetJobResult
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_AcEflashWrite (Ftfc_Eep_Ip_AddressType DestAddress,
+                                                         uint8 const * pu8SrcAddress,
+                                                         Ftfc_Eep_Ip_PageSizeType PageSize,
+                                                         boolean Async
+                                                        )
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_OK;
+
+    /* When set, the Access Error (ACCERR) and Flash Protection Violation (FPVIOL) bits in this
+     * register prevent writes to the FlexRAM (when EEERDY is set) until the flag is cleared */
+    IP_EEPROM->FSTAT = (FSTAT_ACCERR_MASK | FSTAT_FPVIOL_MASK); /* W1C */
+
+    if (Ftfc_Eep_Ip_pxConfiguration->startEepromAccessNotifPtr != NULL_PTR)
+    {
+        Ftfc_Eep_Ip_pxConfiguration->startEepromAccessNotifPtr();
+    }
+
+    /* When configured for emulated EEPROM use, writes to an unprotected location in FlexRAM invoke
+     * the emulated EEPROM file system to program a new EEPROM data record in the emulated EEPROM
+     * backup memory in a round-robin fashion. This is why we can't write into FlexRAM
+     * while fetching code from the DFLASH partition. */
+    Status = Ftfc_Eep_Ip_WriteIntoFlexram(DestAddress, pu8SrcAddress, PageSize, Async);
+
+    if (Ftfc_Eep_Ip_pxConfiguration->finishedEepromAccessNotifPtr != NULL_PTR)
+    {
+        Ftfc_Eep_Ip_pxConfiguration->finishedEepromAccessNotifPtr();
+    }
+
+    if ((FTFC_EEP_IP_STATUS_OK == Status) && (FALSE == Async))
+    {
+        /* the FSTAT register is ready to be interrogated only after
+        * the FlexRAM write has successfully completed */
+        Status = Ftfc_Eep_Ip_CheckFstatErrors();
+    }
+
+    return Status;
+}
+
+#define EEP_STOP_SEC_CODE
+#include "Eep_MemMap.h"
+
+#if (FTFC_EEP_IP_LOAD_AC_INTO_RAM == STD_ON)
+#define EEP_START_SEC_RAMCODE
+#else
+#define EEP_START_SEC_CODE
+#endif
+#include "Eep_MemMap.h"
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Start the previously constructed Flash Command and wait for it to complete.
+ *
+ * @details This function must not run from the DFLASH partition shared with EFLASH.
+ *
+ * Before launching a command, the ACCERR and FPVIOL bits in the FSTAT register  must be zero and
+ * the CCIF flag must read 1 to verify that any previous command has completed. If CCIF is zero,
+ * the previous command execution is still active, a new command write sequence cannot be started,
+ * and all writes to the FCCOB registers are ignored.
+ *
+ * Once all relevant command parameters have been loaded, the user launches the command
+ * by clearing the FSTAT[CCIF] bit by writing a '1' to it.
+ *
+ * Do not attempt to read a flash block while the FTFC is running a command (CCIF = 0)
+ * on that same block.
+
+ * @return the cmd execution result
+ * @retval FTFC_EEP_IP_STATUS_OK       successful cmd execution
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT  a timeout has occurred while waiting for the CCIF flag
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_StartFlashCommand (void)
+{
+    /* W1C the CCIF bit to start the command */
+    IP_EEPROM->FSTAT = FSTAT_CCIF_MASK;
+
+    /* The CCIF flag remains zero until the FTFC command completes */
+    return Ftfc_Eep_Ip_WaitCcifTimeout(FTFC_EEP_IP_ABORT_TIMEOUT);
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Write a page into FlexRAM.
+ * @details This function must not run from the DFLASH partition shared with EFLASH.
+ *
+ * @param[in] DestAddress
+ * @param[in] pu8SrcAddress
+ * @param[in] PageSize
+ * @param[in] Async
+ *
+ * @return the result of the write request
+ * @retval FTFC_EEP_IP_STATUS_PENDING  async: GetJobResult shall be used to check the FSTAT errors
+ * @retval FTFC_EEP_IP_STATUS_OK       sync: the write has succeeded
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT  sync: a timeout has occured while waiting for the CCIF flag
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_WriteIntoFlexram (Ftfc_Eep_Ip_AddressType DestAddress,
+                                                            uint8 const * pu8SrcAddress,
+                                                            Ftfc_Eep_Ip_PageSizeType PageSize,
+                                                            boolean Async
+                                                           )
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_PENDING;
+    Ftfc_Eep_Ip_AddressType SrcAdd = (Ftfc_Eep_Ip_AddressType)pu8SrcAddress;
+
+#if (FTFC_EEP_IP_HIGH_TEMP_CHIP == STD_ON)
+
+    *(uint32 *)DestAddress = *(uint32 const *)SrcAdd;
+    (void) PageSize; /* Page size is always LONGWORD for FTFM */
+
+#else /* FTFC_EEP_IP_HIGH_TEMP_CHIP */
+
+    switch (PageSize)
+    {
+        case FTFC_EEP_IP_PAGE_BYTE:
+            *(uint8 *)DestAddress = *(uint8 const *)SrcAdd;
+        break;
+
+        case FTFC_EEP_IP_PAGE_WORD:
+            *(uint16 *)DestAddress = *(uint16 const *)SrcAdd;
+        break;
+
+        case FTFC_EEP_IP_PAGE_LONGWORD:
+            *(uint32 *)DestAddress = *(uint32 const *)SrcAdd;
+        break;
+
+        default:
+            /* page size checked in the upper call stack */
+        break;
+    }
+
+#endif /* FTFC_EEP_IP_HIGH_TEMP_CHIP */
+
+    MCAL_FAULT_INJECTION_POINT(EEP_FIP_FTFx_CHECK_BO);
+
+    /* When a write occurs the FlexRAM is not accessible until the CCIF bit is set. */
+    if (FALSE == Async)
+    {
+        Status = Ftfc_Eep_Ip_WaitCcifTimeout(FTFC_EEP_IP_SYNC_WRITE_TIMEOUT);
+    }
+
+    return Status;
+}
+
+/** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+ * @brief   Wait for the CCIF flag to be set or exit with a given timeout.
+ *
+ * @details This function must not run from the DFLASH partition shared with EFLASH.
+ *
+ * @param[in] TimeoutCounter given as a dummy counter that is decremented in a while loop
+ *
+ * @return the status of the flash operation
+ * @retval FTFC_EEP_IP_STATUS_OK       the flash cmd/write has completed
+ * @retval FTFC_EEP_IP_STATUS_TIMEOUT  a timeout has occurred
+ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+static Ftfc_Eep_Ip_StatusType Ftfc_Eep_Ip_WaitCcifTimeout (uint32 TimeoutCounter)
+{
+    Ftfc_Eep_Ip_StatusType Status = FTFC_EEP_IP_STATUS_OK;
+    uint32 counter = TimeoutCounter;
+
+    while (0U == (IP_EEPROM->FSTAT & FSTAT_CCIF_MASK))
+    {
+        --counter;
+        if (0U == counter)
+        {
+            Status = FTFC_EEP_IP_STATUS_TIMEOUT;
+            break;
+        }
+
+        /* feed the watchdog */
+        if (NULL_PTR != Ftfc_Eep_Ip_pxConfiguration->acCallBackPtr)
+        {
+            Ftfc_Eep_Ip_pxConfiguration->acCallBackPtr();
+        }
+    }
+
+    return Status;
+}
+
+#if (FTFC_EEP_IP_LOAD_AC_INTO_RAM == STD_ON)
+#define EEP_STOP_SEC_RAMCODE
+#else
+#define EEP_STOP_SEC_CODE
+#endif
+#include "Eep_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */

RTD/src/Ftm_Gpt_Ip.c

@@ -0,0 +1,1814 @@
+/*==================================================================================================
+* Project :             RTD AUTOSAR 4.4
+* Platform :            CORTEXM
+* Peripheral :          Ftm_Srtc_Lptmr_LPit
+* Dependencies :        none
+*
+* Autosar Version :     4.4.0
+* Autosar Revision :    ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version :          1.0.0
+* Build Version :       S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+/**
+*   @file       Ftm_Gpt_Ip.c
+*
+*   @addtogroup ftm_ip Ftm IPL
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                         INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Ftm_Gpt_Ip.h"
+
+#if (STD_ON == FTM_GPT_IP_ENABLE_USER_MODE_SUPPORT)
+    #define USER_MODE_REG_PROT_ENABLED      (FTM_GPT_IP_ENABLE_USER_MODE_SUPPORT)
+    #include "RegLockMacros.h"
+#endif
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define FTM_GPT_IP_VENDOR_ID_C                    43
+#define FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION_C     4
+#define FTM_GPT_IP_AR_RELEASE_MINOR_VERSION_C     4
+#define FTM_GPT_IP_AR_RELEASE_REVISION_VERSION_C  0
+#define FTM_GPT_IP_SW_MAJOR_VERSION_C             1
+#define FTM_GPT_IP_SW_MINOR_VERSION_C             0
+#define FTM_GPT_IP_SW_PATCH_VERSION_C             0
+
+/*==================================================================================================
+*                                      FILE VERSION CHECKS
+==================================================================================================*/
+#if (FTM_GPT_IP_VENDOR_ID != FTM_GPT_IP_VENDOR_ID_C)
+    #error "Ftm_Gpt_Ip.h and Ftm_Gpt_Ip.c have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION != FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION_C) || \
+     (FTM_GPT_IP_AR_RELEASE_MINOR_VERSION != FTM_GPT_IP_AR_RELEASE_MINOR_VERSION_C) || \
+     (FTM_GPT_IP_AR_RELEASE_REVISION_VERSION != FTM_GPT_IP_AR_RELEASE_REVISION_VERSION_C) \
+    )
+    #error "AutoSar Version Numbers of Ftm_Gpt_Ip.h and Ftm_Gpt_Ip.c are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((FTM_GPT_IP_SW_MAJOR_VERSION != FTM_GPT_IP_SW_MAJOR_VERSION_C) || \
+     (FTM_GPT_IP_SW_MINOR_VERSION != FTM_GPT_IP_SW_MINOR_VERSION_C) || \
+     (FTM_GPT_IP_SW_PATCH_VERSION != FTM_GPT_IP_SW_PATCH_VERSION_C) \
+    )
+    #error "Software Version Numbers of Ftm_Gpt_Ip.h and Ftm_Gpt_Ip.c are different"
+#endif
+
+#if (STD_ON == FTM_GPT_IP_ENABLE_USER_MODE_SUPPORT)
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    /* Check if source file and Platform_Types.h header file are of the same Autosar version */
+    #if ((REGLOCKMACROS_AR_RELEASE_MAJOR_VERSION != FTM_GPT_IP_AR_RELEASE_MAJOR_VERSION_C) || \
+         (REGLOCKMACROS_AR_RELEASE_MINOR_VERSION != FTM_GPT_IP_AR_RELEASE_MINOR_VERSION_C))
+        #error "AutoSar Version Numbers of RegLockMacros.h and Ftm_Gpt_Ip.c are different"
+    #endif
+#endif
+#endif
+/*==================================================================================================
+*                                          LOCAL DEFINIES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       LOCAL MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       LOCAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       LOCAL VARIABLES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       GLOBAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       GLOBAL VARIABLES
+==================================================================================================*/
+#if (FTM_GPT_IP_USED == STD_ON)
+
+#define GPT_START_SEC_VAR_CLEARED_32
+#include "Gpt_MemMap.h"
+/** @brief Global array variable used to store the runtime target time value. */
+uint32 Ftm_Gpt_Ip_u32TargetValue[FTM_INSTANCE_COUNT][FTM_CONTROLS_COUNT];
+#define GPT_STOP_SEC_VAR_CLEARED_32
+#include "Gpt_MemMap.h"
+
+#define GPT_START_SEC_CONST_UNSPECIFIED
+#include "Gpt_MemMap.h"
+/* Table of base pointers for FTM instances. */
+FTM_Type * const ftmGptBase[FTM_INSTANCE_COUNT] = IP_FTM_BASE_PTRS;
+#define GPT_STOP_SEC_CONST_UNSPECIFIED
+#include "Gpt_MemMap.h"
+
+#define GPT_START_SEC_VAR_INIT_UNSPECIFIED
+#include "Gpt_MemMap.h"
+
+#if ((defined FTM_0_ISR_USED) || (defined FTM_1_ISR_USED) || (defined FTM_0_CH_0_CH_1_ISR_USED) || (defined FTM_0_CH_2_CH_3_ISR_USED) || (defined FTM_0_CH_4_CH_5_ISR_USED) || (defined FTM_0_CH_6_CH_7_ISR_USED) || (defined FTM_1_CH_0_CH_1_ISR_USED) || (defined FTM_1_CH_2_CH_3_ISR_USED) || (defined FTM_1_CH_4_CH_5_ISR_USED) || (defined FTM_1_CH_6_CH_7_ISR_USED) || (defined FTM_2_CH_0_CH_1_ISR_USED) || (defined FTM_2_CH_2_CH_3_ISR_USED) || (defined FTM_2_CH_4_CH_5_ISR_USED) || (defined FTM_2_CH_6_CH_7_ISR_USED) || (defined FTM_3_CH_0_CH_1_ISR_USED) || (defined FTM_3_CH_2_CH_3_ISR_USED) || (defined FTM_3_CH_4_CH_5_ISR_USED) || (defined FTM_3_CH_6_CH_7_ISR_USED) || (defined FTM_4_CH_0_CH_1_ISR_USED) || (defined FTM_4_CH_2_CH_3_ISR_USED) || (defined FTM_4_CH_4_CH_5_ISR_USED) || (defined FTM_4_CH_6_CH_7_ISR_USED) || (defined FTM_5_CH_0_CH_1_ISR_USED) || (defined FTM_5_CH_2_CH_3_ISR_USED) || (defined FTM_5_CH_4_CH_5_ISR_USED) || (defined FTM_5_CH_6_CH_7_ISR_USED) || (defined FTM_6_CH_0_CH_1_ISR_USED) || (defined FTM_6_CH_2_CH_3_ISR_USED) || (defined FTM_6_CH_4_CH_5_ISR_USED) || (defined FTM_6_CH_6_CH_7_ISR_USED) || (defined FTM_7_CH_0_CH_1_ISR_USED) || (defined FTM_7_CH_2_CH_3_ISR_USED) || (defined FTM_7_CH_4_CH_5_ISR_USED) || (defined FTM_7_CH_6_CH_7_ISR_USED))
+static Ftm_Gpt_Ip_ChState Ftm_Gpt_Ip_u32ChState[FTM_INSTANCE_COUNT][FTM_CONTROLS_COUNT] =   {
+                                                                                                {
+                                                                                                    {
+                                                                                                        (boolean)FALSE,
+                                                                                                        NULL_PTR,
+                                                                                                        0U
+                                                                                                    }
+                                                                                                }
+                                                                                            };
+#endif
+#if (FTM_GPT_IP_SET_CLOCK_MODE == STD_ON)
+static Ftm_Gpt_Ip_InstanceState Ftm_Gpt_Ip_u32InstanceState[FTM_INSTANCE_COUNT] =   {
+                                                                                        {
+                                                                                            0U,
+                                                                                            0U
+                                                                                        }
+                                                                                    };
+#endif
+#if (FTM_GPT_IP_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON) && ((defined FTM_0_ISR_USED) || (defined FTM_1_ISR_USED) || (defined FTM_0_CH_0_CH_1_ISR_USED) || (defined FTM_0_CH_2_CH_3_ISR_USED) || (defined FTM_0_CH_4_CH_5_ISR_USED) || (defined FTM_0_CH_6_CH_7_ISR_USED) || (defined FTM_1_CH_0_CH_1_ISR_USED) || (defined FTM_1_CH_2_CH_3_ISR_USED) || (defined FTM_1_CH_4_CH_5_ISR_USED) || (defined FTM_1_CH_6_CH_7_ISR_USED) || (defined FTM_2_CH_0_CH_1_ISR_USED) || (defined FTM_2_CH_2_CH_3_ISR_USED) || (defined FTM_2_CH_4_CH_5_ISR_USED) || (defined FTM_2_CH_6_CH_7_ISR_USED) || (defined FTM_3_CH_0_CH_1_ISR_USED) || (defined FTM_3_CH_2_CH_3_ISR_USED) || (defined FTM_3_CH_4_CH_5_ISR_USED) || (defined FTM_3_CH_6_CH_7_ISR_USED) || (defined FTM_4_CH_0_CH_1_ISR_USED) || (defined FTM_4_CH_2_CH_3_ISR_USED) || (defined FTM_4_CH_4_CH_5_ISR_USED) || (defined FTM_4_CH_6_CH_7_ISR_USED) || (defined FTM_5_CH_0_CH_1_ISR_USED) || (defined FTM_5_CH_2_CH_3_ISR_USED) || (defined FTM_5_CH_4_CH_5_ISR_USED) || (defined FTM_5_CH_6_CH_7_ISR_USED) || (defined FTM_6_CH_0_CH_1_ISR_USED) || (defined FTM_6_CH_2_CH_3_ISR_USED) || (defined FTM_6_CH_4_CH_5_ISR_USED) || (defined FTM_6_CH_6_CH_7_ISR_USED) || (defined FTM_7_CH_0_CH_1_ISR_USED) || (defined FTM_7_CH_2_CH_3_ISR_USED) || (defined FTM_7_CH_4_CH_5_ISR_USED) || (defined FTM_7_CH_6_CH_7_ISR_USED))
+static uint32 Ftm_Gpt_Ip_u32NextTargetValue[FTM_INSTANCE_COUNT][FTM_CONTROLS_COUNT] =   {{(uint32)0}};
+#endif
+#define GPT_STOP_SEC_VAR_INIT_UNSPECIFIED
+#include "Gpt_MemMap.h"
+/*==================================================================================================
+*                                   LOCAL FUNCTION PROTOTYPES
+==================================================================================================*/
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+
+static inline void Ftm_Gpt_Ip_SetFreezebit(uint8 instance, boolean freezeBit);
+static inline void Ftm_Gpt_Ip_SetClockSource(uint8 instance, Ftm_Gpt_Ip_ClockSource clocksource);
+#if (FTM_GPT_IP_SET_CLOCK_MODE == STD_ON)
+static inline void Ftm_Gpt_Ip_SetPrescaler(uint8 instance, uint8 prescalerValue);
+#endif
+static inline void Ftm_Gpt_Ip_ClearInterruptFlag(uint8 instance, uint8 channel);
+static inline void Ftm_Gpt_Ip_FTMEnable(uint8 instance, boolean enable);
+static inline void Ftm_Gpt_Ip_SetCompareValue(uint8 instance, uint8 channel, uint32 value);
+static inline uint32 Ftm_Gpt_Ip_GetCntValue(uint8 instance);
+
+uint32 Ftm_Gpt_Ip_GetInterruptBit(uint8 instance, uint8 channel);
+static inline void Ftm_Gpt_Ip_EnableInterrupt(uint8 instance, uint8 channel, boolean enable);
+
+static inline void Ftm_Gpt_Ip_SetHalfCycleValue(FTM_Type * const base, uint16 value);
+static inline void Ftm_Gpt_Ip_Configure(FTM_Type * const base,
+                                        Ftm_Gpt_Ip_ClockSource clocksource,
+                                        uint8 prescalerValue);
+static inline void Ftm_Gpt_Ip_SetCounter(uint8 instance, uint16 value);
+
+#if (defined (FTM_GPT_IP_MODULE_SINGLE_INTERRUPT) && (STD_ON == FTM_GPT_IP_MODULE_SINGLE_INTERRUPT))
+#ifdef FTM_0_ISR_USED
+ISR(FTM_0_ISR);
+#endif
+#ifdef FTM_1_ISR_USED
+ISR(FTM_1_ISR);
+#endif
+#else
+#ifdef FTM_0_CH_0_CH_1_ISR_USED
+ISR(FTM_0_CH_0_CH_1_ISR);
+#endif
+#ifdef FTM_0_CH_2_CH_3_ISR_USED
+ISR(FTM_0_CH_2_CH_3_ISR);
+#endif
+#ifdef FTM_0_CH_4_CH_5_ISR_USED
+ISR(FTM_0_CH_4_CH_5_ISR);
+#endif
+#ifdef FTM_0_CH_6_CH_7_ISR_USED
+ISR(FTM_0_CH_6_CH_7_ISR);
+#endif
+#ifdef FTM_1_CH_0_CH_1_ISR_USED
+ISR(FTM_1_CH_0_CH_1_ISR);
+#endif
+#ifdef FTM_1_CH_2_CH_3_ISR_USED
+ISR(FTM_1_CH_2_CH_3_ISR);
+#endif
+#ifdef FTM_1_CH_4_CH_5_ISR_USED
+ISR(FTM_1_CH_4_CH_5_ISR);
+#endif
+#ifdef FTM_1_CH_6_CH_7_ISR_USED
+ISR(FTM_1_CH_6_CH_7_ISR);
+#endif
+#ifdef FTM_2_CH_0_CH_1_ISR_USED
+ISR(FTM_2_CH_0_CH_1_ISR);
+#endif
+#ifdef FTM_2_CH_2_CH_3_ISR_USED
+ISR(FTM_2_CH_2_CH_3_ISR);
+#endif
+#ifdef FTM_2_CH_4_CH_5_ISR_USED
+ISR(FTM_2_CH_4_CH_5_ISR);
+#endif
+#ifdef FTM_2_CH_6_CH_7_ISR_USED
+ISR(FTM_2_CH_6_CH_7_ISR);
+#endif
+#ifdef FTM_3_CH_0_CH_1_ISR_USED
+ISR(FTM_3_CH_0_CH_1_ISR);
+#endif
+#ifdef FTM_3_CH_2_CH_3_ISR_USED
+ISR(FTM_3_CH_2_CH_3_ISR);
+#endif
+#ifdef FTM_3_CH_4_CH_5_ISR_USED
+ISR(FTM_3_CH_4_CH_5_ISR);
+#endif
+#ifdef FTM_3_CH_6_CH_7_ISR_USED
+ISR(FTM_3_CH_6_CH_7_ISR);
+#endif
+#ifdef FTM_4_CH_0_CH_1_ISR_USED
+ISR(FTM_4_CH_0_CH_1_ISR);
+#endif
+#ifdef FTM_4_CH_2_CH_3_ISR_USED
+ISR(FTM_4_CH_2_CH_3_ISR);
+#endif
+#ifdef FTM_4_CH_4_CH_5_ISR_USED
+ISR(FTM_4_CH_4_CH_5_ISR);
+#endif
+#ifdef FTM_4_CH_6_CH_7_ISR_USED
+ISR(FTM_4_CH_6_CH_7_ISR);
+#endif
+#ifdef FTM_5_CH_0_CH_1_ISR_USED
+ISR(FTM_5_CH_0_CH_1_ISR);
+#endif
+#ifdef FTM_5_CH_2_CH_3_ISR_USED
+ISR(FTM_5_CH_2_CH_3_ISR);
+#endif
+#ifdef FTM_5_CH_4_CH_5_ISR_USED
+ISR(FTM_5_CH_4_CH_5_ISR);
+#endif
+#ifdef FTM_5_CH_6_CH_7_ISR_USED
+ISR(FTM_5_CH_6_CH_7_ISR);
+#endif
+#ifdef FTM_6_CH_0_CH_1_ISR_USED
+ISR(FTM_6_CH_0_CH_1_ISR);
+#endif
+#ifdef FTM_6_CH_2_CH_3_ISR_USED
+ISR(FTM_6_CH_2_CH_3_ISR);
+#endif
+#ifdef FTM_6_CH_4_CH_5_ISR_USED
+ISR(FTM_6_CH_4_CH_5_ISR);
+#endif
+#ifdef FTM_6_CH_6_CH_7_ISR_USED
+ISR(FTM_6_CH_6_CH_7_ISR);
+#endif
+#ifdef FTM_7_CH_0_CH_1_ISR_USED
+ISR(FTM_7_CH_0_CH_1_ISR);
+#endif
+#ifdef FTM_7_CH_2_CH_3_ISR_USED
+ISR(FTM_7_CH_2_CH_3_ISR);
+#endif
+#ifdef FTM_7_CH_4_CH_5_ISR_USED
+ISR(FTM_7_CH_4_CH_5_ISR);
+#endif
+#ifdef FTM_7_CH_6_CH_7_ISR_USED
+ISR(FTM_7_CH_6_CH_7_ISR);
+#endif
+#endif /*FTM_GPT_IP_MODULE_SINGLE_INTERRUPT == STD_ON*/
+#if ((defined FTM_0_ISR_USED) || (defined FTM_1_ISR_USED) || (defined FTM_0_CH_0_CH_1_ISR_USED) || (defined FTM_0_CH_2_CH_3_ISR_USED) || (defined FTM_0_CH_4_CH_5_ISR_USED) || (defined FTM_0_CH_6_CH_7_ISR_USED) || (defined FTM_1_CH_0_CH_1_ISR_USED) || (defined FTM_1_CH_2_CH_3_ISR_USED) || (defined FTM_1_CH_4_CH_5_ISR_USED) || (defined FTM_1_CH_6_CH_7_ISR_USED) || (defined FTM_2_CH_0_CH_1_ISR_USED) || (defined FTM_2_CH_2_CH_3_ISR_USED) || (defined FTM_2_CH_4_CH_5_ISR_USED) || (defined FTM_2_CH_6_CH_7_ISR_USED) || (defined FTM_3_CH_0_CH_1_ISR_USED) || (defined FTM_3_CH_2_CH_3_ISR_USED) || (defined FTM_3_CH_4_CH_5_ISR_USED) || (defined FTM_3_CH_6_CH_7_ISR_USED) || (defined FTM_4_CH_0_CH_1_ISR_USED) || (defined FTM_4_CH_2_CH_3_ISR_USED) || (defined FTM_4_CH_4_CH_5_ISR_USED) || (defined FTM_4_CH_6_CH_7_ISR_USED) || (defined FTM_5_CH_0_CH_1_ISR_USED) || (defined FTM_5_CH_2_CH_3_ISR_USED) || (defined FTM_5_CH_4_CH_5_ISR_USED) || (defined FTM_5_CH_6_CH_7_ISR_USED) || (defined FTM_6_CH_0_CH_1_ISR_USED) || (defined FTM_6_CH_2_CH_3_ISR_USED) || (defined FTM_6_CH_4_CH_5_ISR_USED) || (defined FTM_6_CH_6_CH_7_ISR_USED) || (defined FTM_7_CH_0_CH_1_ISR_USED) || (defined FTM_7_CH_2_CH_3_ISR_USED) || (defined FTM_7_CH_4_CH_5_ISR_USED) || (defined FTM_7_CH_6_CH_7_ISR_USED))
+static void Ftm_Gpt_Ip_ProcessCommonInterrupt(uint8 instance, uint8 channel);
+#endif
+
+#if (STD_ON == FTM_GPT_IP_ENABLE_USER_MODE_SUPPORT)
+    void Ftm_Gpt_Ip_SetUserAccessAllowed(uint32 FtmBaseAddr);
+#endif
+
+#if (defined (MCAL_FTM_REG_PROT_AVAILABLE) && (STD_ON == FTM_GPT_IP_ENABLE_USER_MODE_SUPPORT))
+    #define Call_Ftm_Gpt_Ip_SetUserAccessAllowed(BaseAddr) OsIf_Trusted_Call1param(Ftm_Gpt_Ip_SetUserAccessAllowed,(BaseAddr))
+#else
+    #define Call_Ftm_Gpt_Ip_SetUserAccessAllowed(BaseAddr)
+#endif
+/*==================================================================================================
+*                                       LOCAL FUNCTIONS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       GLOBAL FUNCTIONS
+==================================================================================================*/
+#ifdef MCAL_FTM_REG_PROT_AVAILABLE
+/**
+ * @brief        Enables FTM registers writing in User Mode by configuring REG_PROT
+ * @details      Sets the UAA (User Access Allowed) bit of the FTM IP allowing FTM registers writing in User Mode
+ *
+ * @param[in]    FtmBaseAddr
+ *
+ * @return       none
+ *
+ * @pre          Should be executed in supervisor mode
+ */
+void Ftm_Gpt_Ip_SetUserAccessAllowed(uint32 FtmBaseAddr)
+{
+    SET_USER_ACCESS_ALLOWED(FtmBaseAddr, FTM_PROT_MEM_U32);
+}
+#endif /* MCAL_FTM_REG_PROT_AVAILABLE */
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_SetFreezebit
+* Description   : Configure the register CONF
+*
+* @param[in]     instance     FTM hardware instance number
+* @param[in]     freezeBit    true or false
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_SetFreezebit(uint8 instance, boolean freezeBit)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_17();
+    ftmGptBase[instance]->CONF &= ~((FTM_CONF_BDMMODE_MASK) << FTM_CONF_BDMMODE_SHIFT);
+if (TRUE == freezeBit)
+    {
+       ftmGptBase[instance]->CONF |= (0UL << FTM_CONF_BDMMODE_SHIFT);
+    }
+else
+    {
+       ftmGptBase[instance]->CONF |= (3UL << FTM_CONF_BDMMODE_SHIFT);
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_17();
+}
+
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_Configure
+* Description   : Configure the clock source and prescalerValue (SC register)
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     clocksource
+* @param[in]     prescalerValue
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_Configure(FTM_Type * const base,
+                                        Ftm_Gpt_Ip_ClockSource clocksource,
+                                        uint8 prescalerValue)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_21();
+    base->SC = (base->SC & ~FTM_SC_CLKS_MASK) | FTM_SC_CLKS(clocksource);
+    base->SC = (base->SC & ~FTM_SC_PS_MASK) | FTM_SC_PS(prescalerValue);
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_21();
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_SetCounterInitVal
+* Description   : Set the CounterInitVal
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     value
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_SetCounterInitVal(uint8 instance, uint16 value)
+{
+    ftmGptBase[instance]->CNTIN = (uint32)(((uint32)value << FTM_CNTIN_INIT_SHIFT) & FTM_CNTIN_INIT_MASK);
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_SetCounter
+* Description   : Set the Ftm_Gpt_Ip_SetCounter
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     value
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_SetCounter(uint8 instance, uint16 value)
+{
+    ftmGptBase[instance]->CNT = (uint32)(((uint32)value << FTM_CNT_COUNT_SHIFT) & FTM_CNT_COUNT_MASK);
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_ClearInterruptFlag
+* Description   : ClearInterruptFlag (CSC_CHF)
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     channel
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_ClearInterruptFlag(uint8 instance, uint8 channel)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_22();
+    ftmGptBase[instance]-> CONTROLS[channel].CSC &= (~(FTM_CSC_CHF_MASK));
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_22();
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_EnableInterrupt
+* Description   : Enable/Disable (CSC_CHIE)
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     channel
+* @param[in]     enable
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_EnableInterrupt(uint8 instance, uint8 channel, boolean enable)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_23();
+    if (TRUE == enable)
+    {
+    ftmGptBase[instance]-> CONTROLS[channel].CSC |= FTM_CSC_CHIE_MASK;
+    }
+    else
+    {
+    ftmGptBase[instance]-> CONTROLS[channel].CSC &= (~(FTM_CSC_CHIE_MASK));
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_23();
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_SetClockSource
+* Description   : SetClocksource (SC_Register)
+* @param[in]    : Clock The FTM peripheral clock selection
+*                               - 00: No clock
+*                               - 01: system clock
+*                               - 10: fixed clock
+*                               - 11: External clock
+* @param[in]     instance       FTM hardware instance number
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_SetClockSource(uint8 instance, Ftm_Gpt_Ip_ClockSource clocksource)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_24();
+    ftmGptBase[instance]->SC = (ftmGptBase[instance]->SC & ~FTM_SC_CLKS_MASK) | FTM_SC_CLKS(clocksource);
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_24();
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_FTMEnable
+* Description   : Enable/Disable FTMEN (MODE)
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     enable
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_FTMEnable(uint8 instance, boolean enable)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_25();
+    if (TRUE == enable)
+    {
+        ftmGptBase[instance]->MODE  |= FTM_MODE_FTMEN_MASK;
+    }
+    else
+    {
+        ftmGptBase[instance]->MODE  &= (~(FTM_MODE_FTMEN_MASK));
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_25();
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_SetCompareValue
+* Description   : Set compare value (CV)
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     channel
+* @param[in]     value
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_SetCompareValue(uint8 instance, uint8 channel, uint32 value)
+{
+    ftmGptBase[instance]-> CONTROLS[channel].CV = (uint32)((((uint32)value << FTM_CV_VAL_SHIFT) & FTM_CV_VAL_MASK));
+
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_WriteModulo
+* Description   : Set value (MOD)
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     channel
+* @param[in]     value
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_WriteModulo(uint8 instance, uint16 value)
+{
+    ftmGptBase[instance]-> MOD = value;
+
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_GetCounter
+* Description   : Get current counter value
+*
+* @param[in]     instance       FTM hardware instance number
+*
+* @return        currentCounterValue
+*
+*/
+uint32 Ftm_Gpt_Ip_GetCounter(uint8 instance)
+{
+    uint32 currentCounterValue;
+    currentCounterValue = 0;
+    currentCounterValue = Ftm_Gpt_Ip_GetCntValue(instance);
+    return currentCounterValue;
+
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_GetCntValue
+* Description   : Get current counter value (base->CNT)
+*
+* @param[in]     instance       FTM hardware instance number
+*
+* @return        currentCntValue
+*
+*/
+static inline uint32 Ftm_Gpt_Ip_GetCntValue(uint8 instance)
+{
+    uint32 currentCntValue;
+    currentCntValue = ftmGptBase[instance]->CNT;
+    return currentCntValue;
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_ModeSelectA
+* Description   : Select mode MSA
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     channel        FTM hardware channel number
+* @param[in]     enable
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_ModeSelectA(uint8 instance, uint8 channel, boolean enable)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_26();
+    if (TRUE == enable)
+    {
+        ftmGptBase[instance]->CONTROLS[channel].CSC |= FTM_CSC_MSA_MASK;
+    }
+    else
+    {
+        ftmGptBase[instance]->CONTROLS[channel].CSC &= (~(FTM_CSC_MSA_MASK));
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_26();
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_SetHalfCycleValue
+* Description   : Ftm_Gpt_Ip_SetHalfCycleValue
+*
+* @param[in]     value
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_SetHalfCycleValue(FTM_Type * const base, uint16 value)
+{
+    ((base)->HCR) = value;
+}
+/*================================================================================================*/
+#if (FTM_GPT_IP_SET_CLOCK_MODE == STD_ON)
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_SetPrescaler
+* Description   : SetPrescaler - (SC)
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     prescalerValue
+*
+* @return        void
+*
+*/
+static inline void Ftm_Gpt_Ip_SetPrescaler(uint8 instance, uint8 prescalerValue)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_27();
+    ftmGptBase[instance]->SC = (ftmGptBase[instance]->SC & ~FTM_SC_PS_MASK) | FTM_SC_PS(prescalerValue);
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_27();
+}
+#endif
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_GetCompareValue
+* Description   : SetPrescaler (SC)
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     channel
+*
+* @return        currentCmpValue
+*
+*/
+uint32 Ftm_Gpt_Ip_GetCompareValue(uint8 instance, uint8 channel)
+{
+    uint32 currentCmpValue;
+    currentCmpValue = ftmGptBase[instance]-> CONTROLS[channel].CV;
+    return currentCmpValue;
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_GetInterruptFlag
+* Description   : Get the status CSC_CHF (CSC)
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     channel
+*
+* @return        flag
+*
+*/
+uint32 Ftm_Gpt_Ip_GetInterruptFlag(uint8 instance, uint8 channel)
+{
+    uint32 flag = 0U;
+    flag = ((ftmGptBase[instance]->CONTROLS[channel].CSC) &FTM_CSC_CHF_MASK) >> FTM_CSC_CHF_SHIFT;
+    return flag;
+}
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Ftm_Gpt_Ip_GetInterruptBit
+* Description   : Get the bit CSC_CHIE (CSC)
+*
+* @param[in]     instance       FTM hardware instance number
+* @param[in]     channel
+*
+* @return        flag
+*
+*/
+uint32 Ftm_Gpt_Ip_GetInterruptBit(uint8 instance, uint8 channel)
+{
+    uint32 flag = 0U;
+    flag = ((ftmGptBase[instance]->CONTROLS[channel].CSC) &FTM_CSC_CHIE_MASK) >> FTM_CSC_CHIE_SHIFT;
+    return flag;
+}
+/*================================================================================================*/
+#if ((defined FTM_0_ISR_USED) || (defined FTM_1_ISR_USED) || (defined FTM_0_CH_0_CH_1_ISR_USED) || (defined FTM_0_CH_2_CH_3_ISR_USED) || (defined FTM_0_CH_4_CH_5_ISR_USED) || (defined FTM_0_CH_6_CH_7_ISR_USED) || (defined FTM_1_CH_0_CH_1_ISR_USED) || (defined FTM_1_CH_2_CH_3_ISR_USED) || (defined FTM_1_CH_4_CH_5_ISR_USED) || (defined FTM_1_CH_6_CH_7_ISR_USED) || (defined FTM_2_CH_0_CH_1_ISR_USED) || (defined FTM_2_CH_2_CH_3_ISR_USED) || (defined FTM_2_CH_4_CH_5_ISR_USED) || (defined FTM_2_CH_6_CH_7_ISR_USED) || (defined FTM_3_CH_0_CH_1_ISR_USED) || (defined FTM_3_CH_2_CH_3_ISR_USED) || (defined FTM_3_CH_4_CH_5_ISR_USED) || (defined FTM_3_CH_6_CH_7_ISR_USED) || (defined FTM_4_CH_0_CH_1_ISR_USED) || (defined FTM_4_CH_2_CH_3_ISR_USED) || (defined FTM_4_CH_4_CH_5_ISR_USED) || (defined FTM_4_CH_6_CH_7_ISR_USED) || (defined FTM_5_CH_0_CH_1_ISR_USED) || (defined FTM_5_CH_2_CH_3_ISR_USED) || (defined FTM_5_CH_4_CH_5_ISR_USED) || (defined FTM_5_CH_6_CH_7_ISR_USED) || (defined FTM_6_CH_0_CH_1_ISR_USED) || (defined FTM_6_CH_2_CH_3_ISR_USED) || (defined FTM_6_CH_4_CH_5_ISR_USED) || (defined FTM_6_CH_6_CH_7_ISR_USED) || (defined FTM_7_CH_0_CH_1_ISR_USED) || (defined FTM_7_CH_2_CH_3_ISR_USED) || (defined FTM_7_CH_4_CH_5_ISR_USED) || (defined FTM_7_CH_6_CH_7_ISR_USED))
+/**
+* @brief   Driver routine to process all the interrupts of FTM.
+* @details Support function used by interrupt service routines to implement FTM specific operations
+*          and call the upper layer handler to implement non-hardware specific operations.
+*
+* @param[in]     instance     FTM hardware instance number
+* @param[in]     channel      FTM hardware channel number
+* @implements    Ftm_Gpt_Ip_ProcessCommonInterrupt_Activity
+*/
+static void Ftm_Gpt_Ip_ProcessCommonInterrupt(uint8 instance, uint8 channel)
+{
+    uint32 flag;
+    uint32 interruptEnabled;
+    uint32 oldCmpValue = 0U;
+    uint32 targetValue = 0U;
+
+    /*Checks for spurious interrupts*/
+    flag = Ftm_Gpt_Ip_GetInterruptFlag(instance, channel);
+    interruptEnabled = Ftm_Gpt_Ip_GetInterruptBit(instance, channel);
+
+    /* Clear interrupt flag */
+    Ftm_Gpt_Ip_ClearInterruptFlag(instance,channel);
+
+    if ((1U == flag) && (1U == interruptEnabled))
+    {
+        oldCmpValue = Ftm_Gpt_Ip_GetCompareValue(instance, channel);
+
+#if (FTM_GPT_IP_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
+        if(Ftm_Gpt_Ip_u32NextTargetValue[instance][channel] != 0x0U)
+        {
+            Ftm_Gpt_Ip_u32TargetValue[instance][channel] = Ftm_Gpt_Ip_u32NextTargetValue[instance][channel];
+            Ftm_Gpt_Ip_u32NextTargetValue[instance][channel] = 0x0U;
+        }
+#endif
+        targetValue = Ftm_Gpt_Ip_u32TargetValue[instance][channel];
+
+        if ((uint32)(oldCmpValue + targetValue) > FTM_CNT_MAX_VALUE)
+        {
+            Ftm_Gpt_Ip_SetCompareValue(instance, channel,  (uint32)(targetValue - (FTM_CNT_MAX_VALUE - oldCmpValue)));
+        }
+        else
+        {
+            /*Set new CMP value*/
+            Ftm_Gpt_Ip_SetCompareValue(instance, channel, (uint32)(oldCmpValue + targetValue));
+        }
+
+
+        /* Call upper layer handler */
+        if((TRUE == Ftm_Gpt_Ip_u32ChState[instance][channel].chInit) && \
+                (NULL_PTR != Ftm_Gpt_Ip_u32ChState[instance][channel].callback))
+        {
+            Ftm_Gpt_Ip_u32ChState[instance][channel].callback(Ftm_Gpt_Ip_u32ChState[instance][channel].callbackParam);
+        }
+    }
+}
+#endif
+
+/*================================================================================================*/
+/**
+* @brief         Function Name : Ftm_Gpt_Ip_Init
+* @details       Initializes the FTM instance. This functions is called for each FTM hardware Instance and:
+*
+* @param[in]     instance     FTM hardware instance number
+* @param[in]     configPtr    Pointer to a selected configuration structure
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+* @implements    Ftm_Gpt_Ip_Init_Activity
+*/
+void Ftm_Gpt_Ip_Init(uint8 instance, const Ftm_Gpt_Ip_InstanceConfigType *configPtr)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(FTM_INSTANCE_COUNT > instance);
+    DevAssert(NULL_PTR != configPtr);
+#endif
+        /* Enable register access from user mode, if enabled from configuration file */
+        Call_Ftm_Gpt_Ip_SetUserAccessAllowed((uint32)ftmGptBase[instance]);
+
+         /* Check the FTM counter modes */
+    if (FTM_GPT_IP_MODE_UP_TIMER == configPtr->mode)
+    {
+        /* Set clock and prescalerValue FTM */
+        Ftm_Gpt_Ip_Configure(ftmGptBase[instance],
+                             configPtr->clocksource,
+                             configPtr->clockPrescaler);
+        /*Set freeze bit*/
+        Ftm_Gpt_Ip_SetFreezebit(instance, configPtr->freezeBit);
+
+        /*Set Counter register and Initial Counter Value*/
+        Ftm_Gpt_Ip_SetCounterInitVal(instance, 1U);
+
+        /* write the Ftm Modulo Register with 0xFFFF */
+        Ftm_Gpt_Ip_WriteModulo(instance, 0xFFFFU);
+
+        /*Enable FTMEnable*/
+        Ftm_Gpt_Ip_FTMEnable(instance, TRUE);
+    }
+    else
+    {
+        /* TODO: DO NOTHING */
+    }
+#if (FTM_GPT_IP_SET_CLOCK_MODE == STD_ON)
+    Ftm_Gpt_Ip_u32InstanceState[instance].clockPrescaler = configPtr->clockPrescaler;
+    Ftm_Gpt_Ip_u32InstanceState[instance].clockAlternatePrescaler = configPtr->clockAlternatePrescaler;
+#endif
+}
+
+/*================================================================================================*/
+/**
+* @brief         Function Name : Ftm_Gpt_Ip_InitChannel
+* @details       Initializes the FTM channels. This functions is called for each FTM hardware channel and:
+*
+* @param[in]     instance     FTM hardware instance number
+* @param[in]     configPtr    Pointer to a selected configuration structure
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+* @implements    Ftm_Gpt_Ip_InitChannel_Activity
+*/
+void Ftm_Gpt_Ip_InitChannel(uint8 instance, const Ftm_Gpt_Ip_ChannelConfigType *configPtr)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(NULL_PTR != configPtr);
+    DevAssert(FTM_INSTANCE_COUNT > instance);
+    DevAssert(FTM_CONTROLS_COUNT > configPtr->hwChannel);
+#endif
+
+    /* Disable channels interrupt bit */
+    Ftm_Gpt_Ip_EnableInterrupt(instance, configPtr->hwChannel, FALSE);
+    /* Clear ClearInterruptFlag */
+    Ftm_Gpt_Ip_ClearInterruptFlag(instance, configPtr->hwChannel);
+    /* Set Compare Value register to 0xFFFF */
+    Ftm_Gpt_Ip_SetCompareValue(instance, configPtr->hwChannel, 0xFFFFU);
+    /* Set bit MSA */
+    Ftm_Gpt_Ip_ModeSelectA(instance, configPtr->hwChannel, TRUE);
+#if ((defined FTM_0_ISR_USED) || (defined FTM_1_ISR_USED) || (defined FTM_0_CH_0_CH_1_ISR_USED) || (defined FTM_0_CH_2_CH_3_ISR_USED) || (defined FTM_0_CH_4_CH_5_ISR_USED) || (defined FTM_0_CH_6_CH_7_ISR_USED) || (defined FTM_1_CH_0_CH_1_ISR_USED) || (defined FTM_1_CH_2_CH_3_ISR_USED) || (defined FTM_1_CH_4_CH_5_ISR_USED) || (defined FTM_1_CH_6_CH_7_ISR_USED) || (defined FTM_2_CH_0_CH_1_ISR_USED) || (defined FTM_2_CH_2_CH_3_ISR_USED) || (defined FTM_2_CH_4_CH_5_ISR_USED) || (defined FTM_2_CH_6_CH_7_ISR_USED) || (defined FTM_3_CH_0_CH_1_ISR_USED) || (defined FTM_3_CH_2_CH_3_ISR_USED) || (defined FTM_3_CH_4_CH_5_ISR_USED) || (defined FTM_3_CH_6_CH_7_ISR_USED) || (defined FTM_4_CH_0_CH_1_ISR_USED) || (defined FTM_4_CH_2_CH_3_ISR_USED) || (defined FTM_4_CH_4_CH_5_ISR_USED) || (defined FTM_4_CH_6_CH_7_ISR_USED) || (defined FTM_5_CH_0_CH_1_ISR_USED) || (defined FTM_5_CH_2_CH_3_ISR_USED) || (defined FTM_5_CH_4_CH_5_ISR_USED) || (defined FTM_5_CH_6_CH_7_ISR_USED) || (defined FTM_6_CH_0_CH_1_ISR_USED) || (defined FTM_6_CH_2_CH_3_ISR_USED) || (defined FTM_6_CH_4_CH_5_ISR_USED) || (defined FTM_6_CH_6_CH_7_ISR_USED) || (defined FTM_7_CH_0_CH_1_ISR_USED) || (defined FTM_7_CH_2_CH_3_ISR_USED) || (defined FTM_7_CH_4_CH_5_ISR_USED) || (defined FTM_7_CH_6_CH_7_ISR_USED))
+    Ftm_Gpt_Ip_u32ChState[instance][configPtr->hwChannel].chInit = TRUE;
+    Ftm_Gpt_Ip_u32ChState[instance][configPtr->hwChannel].callback = configPtr->callback;
+    Ftm_Gpt_Ip_u32ChState[instance][configPtr->hwChannel].callbackParam = configPtr->callbackParam;
+#endif
+}
+
+/*================================================================================================*/
+/**
+* @brief        Function Name : Ftm_Gpt_Ip_Deinit
+* @details      De-Initializes the FTM module. This functions is called for each FTM hardware instance and:
+*                    - resets all channels to default
+*                    - disables the timer compare interrupts corresponding to Ftm channel
+*                    - clears the timer compare interrupt flags corresponding to Ftm channel
+*                    - resets the counter register and the counter initial value register.
+*                    - resets the channel value register and the modulo register
+*                    - disables the freeze mode
+*
+* @param[in]     instance     FTM hardware instance number
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver.
+* @implements    Ftm_Gpt_Ip_Deinit_Activity
+*/
+void Ftm_Gpt_Ip_Deinit(uint8 instance)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+DevAssert(FTM_INSTANCE_COUNT > instance);
+#endif
+
+    uint8 channelIndex;
+    /*Reset all channels to default*/
+    for (channelIndex = 0; channelIndex < FTM_CONTROLS_COUNT; channelIndex++)
+    {
+        /* Disable interrupts */
+        Ftm_Gpt_Ip_EnableInterrupt(instance, channelIndex, FALSE );
+        /*Clear interrupt flags*/
+        Ftm_Gpt_Ip_ClearInterruptFlag(instance, channelIndex);
+    }
+    /* Disable clockSoure */
+    Ftm_Gpt_Ip_SetClockSource(instance, FTM_GPT_IP_CLOCK_SOURCE_NONE);
+    /* Disable FTMEnable */
+    Ftm_Gpt_Ip_FTMEnable(instance, FALSE);
+    /* Disable freeze */
+    Ftm_Gpt_Ip_SetFreezebit(instance, FALSE);
+    /* Set Counter register to 0 and Initial Counter Value to 0 */
+    Ftm_Gpt_Ip_SetCounterInitVal(instance, 0U);
+    Ftm_Gpt_Ip_SetCounter(instance, 0U);
+
+}
+
+/*================================================================================================*/
+/**
+* @brief        Function Name : Ftm_Gpt_Ip_StartCounting
+* @details      This function is called for starting the Ftm timer channel
+*
+* @param[in]     instance        FTM hardware instance
+* @param[in]     channel         FTM hardware channel
+* @param[in]     compareValue    Compare value
+* @return        void
+* @pre           The driver needs to be initialized. This function is called for starting the FTM timer channel.
+* @implements    Ftm_Gpt_Ip_StartCounting_Activity
+*/
+void Ftm_Gpt_Ip_StartCounting(uint8 instance, uint8 channel, uint16 compareValue)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(FTM_INSTANCE_COUNT > instance);
+    DevAssert(FTM_CONTROLS_COUNT > channel);
+#endif
+
+uint32 currentCntValue;
+uint32 counterValue;
+
+    currentCntValue = Ftm_Gpt_Ip_GetCntValue(instance);
+
+    if ((uint32)(currentCntValue + compareValue) > FTM_CNT_MAX_VALUE)
+    {
+        counterValue = (uint32)(compareValue - (FTM_CNT_MAX_VALUE - currentCntValue));
+    }
+    else
+    {
+        counterValue = (uint32)(currentCntValue + compareValue);
+    }
+    /* Set new compare value */
+    Ftm_Gpt_Ip_SetCompareValue(instance, channel, counterValue);
+    /* Save compare value */
+    Ftm_Gpt_Ip_u32TargetValue[instance][channel] = compareValue;
+    /* Clear CHF flag */
+    Ftm_Gpt_Ip_ClearInterruptFlag(instance,channel);
+    /* Enable interrupt */
+    Ftm_Gpt_Ip_EnableInterrupt(instance, channel, TRUE);
+
+}
+
+/*================================================================================================*/
+/**
+* @brief             Function Name : Ftm_Gpt_Ip_StartTimer
+* @details           This function is called for setting a new start counter value and enables the FTM counter and
+*                           - sets the new counter value
+*                           - enables the FTM counter
+* @implements    Ftm_Gpt_Ip_StartTimer_Activity
+*/
+void Ftm_Gpt_Ip_StartTimer(uint8 instance, uint16 counterValue)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(FTM_INSTANCE_COUNT > instance);
+#endif
+
+    /* Enable Ftm counter */
+    Ftm_Gpt_Ip_SetClockSource(instance, FTM_GPT_IP_CLOCK_SOURCE_SYSTEMCLK);
+    /* Set the new value counter */
+    Ftm_Gpt_Ip_SetCounterInitVal(instance, counterValue);
+    /* Disable FTMEnable */
+    Ftm_Gpt_Ip_FTMEnable(instance, TRUE);
+
+}
+
+/*================================================================================================*/
+/**
+* @brief        Function Name : Ftm_Gpt_Ip_StopTimer
+* @details      This function is callded for stopping the Ftm counter.
+*                   - disables the FTM counter
+*
+* @param[in]     instance        FTM hardware instance
+* @return        void
+* @pre           The driver needs to be initialized. This function is called for stoping the FTM timer channel.
+* @implements    Ftm_Gpt_Ip_StopTimer_Activity
+*/
+void Ftm_Gpt_Ip_StopTimer(uint8 instance)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+DevAssert(FTM_INSTANCE_COUNT > instance);
+#endif
+    /* Disable FTMEnable */
+    Ftm_Gpt_Ip_FTMEnable(instance, FALSE);
+    /* Disable Ftm counter */
+    Ftm_Gpt_Ip_SetClockSource(instance, FTM_GPT_IP_CLOCK_SOURCE_NONE);
+}
+
+/*================================================================================================*/
+/**
+* @brief        Function Name : Ftm_Gpt_Ip_EnableChannelInterrupt
+* @details      This function allows enabling interrupt generation of timer channel
+*               when time-out occurs
+*
+* @param[in]    instance        FTM hardware instance
+* @param[in]    channel         FTM hardware channel
+* @return       void
+* @pre          The driver needs to be initialized.
+* @implements   Ftm_Gpt_Ip_EnableChannelInterrupt_Activity
+*/
+void Ftm_Gpt_Ip_EnableChannelInterrupt(uint8 instance, uint8 channel)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+DevAssert(FTM_INSTANCE_COUNT > instance);
+DevAssert(FTM_CONTROLS_COUNT > channel);
+#endif
+
+     /* Clear interrupt flag */
+    Ftm_Gpt_Ip_ClearInterruptFlag(instance, channel);
+    /* Enable channel interrupt */
+    Ftm_Gpt_Ip_EnableInterrupt(instance, channel, TRUE);
+}
+
+/*================================================================================================*/
+/**
+* @brief        Function Name : Ftm_Gpt_Ip_DisableChannelInterrupt
+* @details      This function allows disabling interrupt generation of timer channel
+*               when time-out occurs
+*
+* @param[in]     instance        FTM hardware instance
+* @param[in]     channel         FTM hardware channel
+* @return        void
+* @pre           The driver needs to be initialized.
+* @implements    Ftm_Gpt_Ip_DisableChannelInterrupt_Activity
+*/
+void Ftm_Gpt_Ip_DisableChannelInterrupt(uint8 instance, uint8 channel)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+DevAssert(FTM_INSTANCE_COUNT > instance);
+DevAssert(FTM_CONTROLS_COUNT > channel);
+#endif
+
+    /* Disable interrupt */
+    Ftm_Gpt_Ip_EnableInterrupt(instance, channel, FALSE);
+    /* Clear interrupt flag */
+    Ftm_Gpt_Ip_ClearInterruptFlag(instance, channel);
+}
+
+/*================================================================================================*/
+/**
+* @brief         Function Name : Ftm_Gpt_Ip_SetHalfCycleReloadPoint
+* @details       Configures the value of the counter with half cycle of reload point.
+*
+* @param[in]     instance                  FTM hardware instance
+* @param[in]     reloadPoint               Reload value
+
+* @return
+* @pre           The driver needs to be initialized.
+* @implements    Ftm_Gpt_Ip_SetHalfCycleReloadPoint_Activity
+*/
+void Ftm_Gpt_Ip_SetHalfCycleReloadPoint(uint8 instance, uint16 reloadPoint)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+DevAssert(FTM_INSTANCE_COUNT > instance);
+#endif
+    Ftm_Gpt_Ip_SetHalfCycleValue(ftmGptBase[instance], reloadPoint);
+}
+
+#if (FTM_GPT_IP_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
+/*================================================================================================*/
+/**
+* @brief      The function changes the Ftm compare register value.
+* @details This function:
+*          - Write next timeout to local variable
+*
+* @param[in]     instance        FTM hardware instance
+* @param[in]     channel         Channel
+* @param[in]     value           Channel timeout value
+* @return        void
+* @pre           The driver needs to be initialized.
+* @implements    Ftm_Gpt_Ip_ChangeNextTimeoutValue_Activity
+*/
+void Ftm_Gpt_Ip_ChangeNextTimeoutValue(uint8 instance, uint8 channel, uint16 value)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(FTM_INSTANCE_COUNT > instance);
+    DevAssert(FTM_CONTROLS_COUNT > channel);
+#endif
+#if ((defined FTM_0_ISR_USED) || (defined FTM_1_ISR_USED) || (defined FTM_0_CH_0_CH_1_ISR_USED) || (defined FTM_0_CH_2_CH_3_ISR_USED) || (defined FTM_0_CH_4_CH_5_ISR_USED) || (defined FTM_0_CH_6_CH_7_ISR_USED) || (defined FTM_1_CH_0_CH_1_ISR_USED) || (defined FTM_1_CH_2_CH_3_ISR_USED) || (defined FTM_1_CH_4_CH_5_ISR_USED) || (defined FTM_1_CH_6_CH_7_ISR_USED) || (defined FTM_2_CH_0_CH_1_ISR_USED) || (defined FTM_2_CH_2_CH_3_ISR_USED) || (defined FTM_2_CH_4_CH_5_ISR_USED) || (defined FTM_2_CH_6_CH_7_ISR_USED) || (defined FTM_3_CH_0_CH_1_ISR_USED) || (defined FTM_3_CH_2_CH_3_ISR_USED) || (defined FTM_3_CH_4_CH_5_ISR_USED) || (defined FTM_3_CH_6_CH_7_ISR_USED) || (defined FTM_4_CH_0_CH_1_ISR_USED) || (defined FTM_4_CH_2_CH_3_ISR_USED) || (defined FTM_4_CH_4_CH_5_ISR_USED) || (defined FTM_4_CH_6_CH_7_ISR_USED) || (defined FTM_5_CH_0_CH_1_ISR_USED) || (defined FTM_5_CH_2_CH_3_ISR_USED) || (defined FTM_5_CH_4_CH_5_ISR_USED) || (defined FTM_5_CH_6_CH_7_ISR_USED) || (defined FTM_6_CH_0_CH_1_ISR_USED) || (defined FTM_6_CH_2_CH_3_ISR_USED) || (defined FTM_6_CH_4_CH_5_ISR_USED) || (defined FTM_6_CH_6_CH_7_ISR_USED) || (defined FTM_7_CH_0_CH_1_ISR_USED) || (defined FTM_7_CH_2_CH_3_ISR_USED) || (defined FTM_7_CH_4_CH_5_ISR_USED) || (defined FTM_7_CH_6_CH_7_ISR_USED))
+
+    /* Update the target time value to be used on next cycle */
+    Ftm_Gpt_Ip_u32NextTargetValue[instance][channel] = (uint32)value;
+
+#endif
+}
+#endif /*FTM_GPT_IP_CHANGE_NEXT_TIMEOUT_VALUE*/
+
+#if (FTM_GPT_IP_SET_CLOCK_MODE == STD_ON)
+/*================================================================================================*/
+/**
+* @brief        The function changes the FTM prescaler value.
+* @details      This function sets the FTM prescaler based on the input mode.
+*
+* @param[in]    instance     FTM hardware instance
+* @param[in]    prescalerMode    FTM_GPT_IP_CLOCKMODE_NORMAL or FTM_GPT_IP_CLOCKMODE_ALTERNATE
+*
+* @return       void
+* @pre          The driver needs to be initialized.On/Off by the configuration parameter: GPT_DUAL_CLOCK_MODE
+* @implements   Ftm_Gpt_Ip_SetClockMode_Activity
+*/
+void Ftm_Gpt_Ip_SetClockMode(uint8 instance, Ftm_Gpt_Ip_ClockModeType prescalerMode)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+DevAssert(FTM_INSTANCE_COUNT > instance);
+#endif
+
+    /* Set Prescaler */
+    if(FTM_GPT_IP_CLOCKMODE_NORMAL == prescalerMode)
+    {
+        Ftm_Gpt_Ip_SetPrescaler(instance, Ftm_Gpt_Ip_u32InstanceState[instance].clockPrescaler);
+    }
+    else
+    {
+        Ftm_Gpt_Ip_SetPrescaler(instance, Ftm_Gpt_Ip_u32InstanceState[instance].clockAlternatePrescaler);
+    }
+
+}
+#endif/*FTM_GPT_IP_SET_CLOCK_MODE*/
+
+#if(FTM_GPT_IP_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+/*================================================================================================*/
+/**
+* @brief      The function starts the FTM channel.
+* @details
+*
+* @param[in]  instance        FTM hardware instance
+* @param[in]  channel         Channel
+* @return     void
+* @pre        The driver needs to be initialized
+*
+*/
+void Ftm_Gpt_Ip_StartPredefTimer (uint8 instance,uint8 channel, uint8 uPrescaler, uint8 clocksource, boolean bFreezeEnable)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(FTM_INSTANCE_COUNT > instance);
+    DevAssert(FTM_CONTROLS_COUNT > channel);
+#endif
+
+    /* Enable register access from user mode, if enabled from configuration file */
+    Call_Ftm_Gpt_Ip_SetUserAccessAllowed((uint32)ftmGptBase[instance]);
+    /* Disable the FTM timer */
+    Ftm_Gpt_Ip_SetClockSource(instance, FTM_GPT_IP_CLOCK_SOURCE_NONE);
+    /* Disable all interrupts on this channel */
+    Ftm_Gpt_Ip_EnableInterrupt(instance, channel, FALSE);
+    /* Clear interrupt flags */
+    Ftm_Gpt_Ip_ClearInterruptFlag(instance, channel);
+    /* Disable TOIE flags */
+    ftmGptBase[instance]-> SC &= (~(FTM_SC_TOIE_MASK));
+    /* Configure FTM as a Free-Running Timer by setting FTMEN=1, CTNIN=0, MOD=0xFFFF, QUADEN=0, CPWMS=0*/
+    Ftm_Gpt_Ip_FTMEnable(instance, TRUE);
+    /* Initial Counter Value to 0 */
+    Ftm_Gpt_Ip_SetCounterInitVal(instance, 0U);
+    /* write the Ftm Modulo Register with 0xFFFF */
+    Ftm_Gpt_Ip_WriteModulo(instance, 0xFFFFU);
+    /* Set Compare Value register to 0xFFFF */
+    Ftm_Gpt_Ip_SetCompareValue(instance, channel, 0xFFFFU);
+    /* Enter EA_28*/
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_28();
+    /* Clear bit QUADEN */
+    ftmGptBase[instance]->QDCTRL &= (~(FTM_QDCTRL_QUADEN_MASK));
+    /* Clear bit CPWMS */
+    ftmGptBase[instance]->SC &= (~(FTM_SC_CPWMS_MASK));
+    /*Configure Predef*/
+    ftmGptBase[instance]->SC = (ftmGptBase[instance]->SC & ~FTM_SC_CLKS_MASK) | FTM_SC_CLKS(clocksource);
+    ftmGptBase[instance]->SC = (ftmGptBase[instance]->SC & ~FTM_SC_PS_MASK) | FTM_SC_PS(uPrescaler);
+    ftmGptBase[instance]->CONF &= ~((FTM_CONF_BDMMODE_MASK) << FTM_CONF_BDMMODE_SHIFT);
+    if (TRUE == bFreezeEnable)
+    {
+       ftmGptBase[instance]->CONF |= (0UL << FTM_CONF_BDMMODE_SHIFT);
+    }
+    else
+    {
+       ftmGptBase[instance]->CONF |= (3UL << FTM_CONF_BDMMODE_SHIFT);
+    }
+    /* Exit EA_28*/
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_28();
+    /* Intialize FTM timer by writing any value to CNT register when CLKS not equal 0 */
+    ftmGptBase[instance]->CNT = (uint32)(((uint32)1U << FTM_CNT_COUNT_SHIFT) & FTM_CNT_COUNT_MASK);
+}
+/*================================================================================================*/
+/**
+* @brief      The function stops the FTM channel.
+* @details    This function stops the FTM channel.
+*
+* @param[in]  channel      hardware channel
+* @param[in]  instance     FTM hardware instance
+*
+*
+* @return     void
+* @pre        The driver needs to be initialized
+*
+*/
+void Ftm_Gpt_Ip_StopPredefTimer (uint8 instance, uint8 channel)
+{
+#if FTM_GPT_IP_DEV_ERROR_DETECT == STD_ON
+DevAssert(FTM_INSTANCE_COUNT > instance);
+DevAssert(FTM_CONTROLS_COUNT > channel);
+#endif
+    /* Disable the FTM timer */
+    Ftm_Gpt_Ip_SetClockSource(instance, FTM_GPT_IP_CLOCK_SOURCE_NONE);
+    /* Disable all interrupts on this channel */
+    Ftm_Gpt_Ip_EnableInterrupt(instance, channel, FALSE);
+    /* Clear interrupt flags */
+    Ftm_Gpt_Ip_ClearInterruptFlag(instance, channel);
+    Ftm_Gpt_Ip_FTMEnable(instance, FALSE);
+    /* Set Counter register to 0 and Initial Counter Value to 0 */
+    Ftm_Gpt_Ip_SetCounterInitVal(instance, 0U);
+    Ftm_Gpt_Ip_SetCounter(instance, 0U);
+    Ftm_Gpt_Ip_SetCompareValue(instance, channel, 0U);
+    Ftm_Gpt_Ip_WriteModulo(instance, 0U );
+    /* Set bit MSA */
+    Ftm_Gpt_Ip_ModeSelectA(instance, channel, FALSE);
+}
+#endif/* FTM_GPT_IP_PREDEFTIMER_FUNCTIONALITY_API */
+
+/*================================================================================================*/
+#if (defined (FTM_GPT_IP_MODULE_SINGLE_INTERRUPT) && (STD_ON == FTM_GPT_IP_MODULE_SINGLE_INTERRUPT))
+#ifdef FTM_0_ISR_USED
+/**
+* @brief   Interrupt handler for FTM channels.
+* @details Interrupt Service Routine corresponding to common FTM_0 module.
+* @param[in] none
+* @return  none
+* @isr
+* @pre      The driver needs to be initialized.
+*/
+ISR(FTM_0_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel < FTM_CONTROLS_COUNT; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(0U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+/*================================================================================================*/
+#ifdef FTM_1_ISR_USED
+/**
+* @brief   Interrupt handler for FTM channels.
+* @details Interrupt Service Routine corresponding to common FTM_1 module.
+* @param[in] none
+* @return  none
+* @isr
+* @pre      The driver needs to be initialized.
+*/
+ISR(FTM_1_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel < FTM_CONTROLS_COUNT; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(1U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+#else /*FTM_GPT_IP_MODULE_SINGLE_INTERRUPT*/
+/*================================================================================================*/
+#if (defined FTM_0_CH_0_CH_1_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 0 channel 0 - channel 1.
+ */
+ISR(FTM_0_CH_0_CH_1_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel <= 1U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(0U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_0_CH_2_CH_3_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 0 channel 2 - channel 3.
+ */
+ISR(FTM_0_CH_2_CH_3_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 2U; channel <= 3U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(0U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_0_CH_4_CH_5_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 0 channel 4 - channel 5.
+ */
+ISR(FTM_0_CH_4_CH_5_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 4U; channel <= 5U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(0U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_0_CH_6_CH_7_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 0 channel 6 - channel 7.
+ */
+ISR(FTM_0_CH_6_CH_7_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 6U; channel <= 7U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(0U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_1_CH_0_CH_1_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 1 channel 0 - channel 1.
+ */
+ISR(FTM_1_CH_0_CH_1_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel <= 1U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(1U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_1_CH_2_CH_3_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 1 channel 2 - channel 3.
+ */
+ISR(FTM_1_CH_2_CH_3_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 2U; channel <= 3U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(1U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_1_CH_4_CH_5_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 1 channel 4 - channel 5.
+ */
+ISR(FTM_1_CH_4_CH_5_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 4U; channel <= 5U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(1U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_1_CH_6_CH_7_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 1 channel 6 - channel 7.
+ */
+ISR(FTM_1_CH_6_CH_7_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 6U; channel <= 7U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(1U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_2_CH_0_CH_1_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 2 channel 0 - channel 1.
+ */
+ISR(FTM_2_CH_0_CH_1_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel <= 1U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(2U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_2_CH_2_CH_3_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 2 channel 2 - channel 3.
+ */
+ISR(FTM_2_CH_2_CH_3_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 2U; channel <= 3U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(2U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_2_CH_4_CH_5_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 2 channel 4 - channel 5.
+ */
+ISR(FTM_2_CH_4_CH_5_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 4U; channel <= 5U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(2U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_2_CH_6_CH_7_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 2 channel 6 - channel 7.
+ */
+ISR(FTM_2_CH_6_CH_7_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 6U; channel <= 7U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(2U, channel);
+    }
+}
+#endif
+
+#if (defined FTM_3_CH_0_CH_1_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 3 channel 0 - channel 1.
+ */
+ISR(FTM_3_CH_0_CH_1_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel <= 1U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(3U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_3_CH_2_CH_3_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 3 channel 2 - channel 3.
+ */
+ISR(FTM_3_CH_2_CH_3_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 2U; channel <= 3U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(3U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_3_CH_4_CH_5_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 3 channel 4 - channel 5.
+ */
+ISR(FTM_3_CH_4_CH_5_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 4U; channel <= 5U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(3U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_3_CH_6_CH_7_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 3 channel 6 - channel 7.
+ */
+ISR(FTM_3_CH_6_CH_7_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 6U; channel <= 7U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(3U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_4_CH_0_CH_1_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 4 channel 0 - channel 1.
+ */
+ISR(FTM_4_CH_0_CH_1_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel <= 1U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(4U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_4_CH_2_CH_3_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 4 channel 2 - channel 3.
+ */
+ISR(FTM_4_CH_2_CH_3_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 2U; channel <= 3U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(4U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_4_CH_4_CH_5_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 4 channel 4 - channel 5.
+ */
+ISR(FTM_4_CH_4_CH_5_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 4U; channel <= 5U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(4U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_4_CH_6_CH_7_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 4 channel 6 - channel 7.
+ */
+ISR(FTM_4_CH_6_CH_7_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 6U; channel <= 7U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(4U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_5_CH_0_CH_1_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 5 channel 0 - channel 1.
+ */
+ISR(FTM_5_CH_0_CH_1_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel <= 1U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(5U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_5_CH_2_CH_3_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 5 channel 2 - channel 3.
+ */
+ISR(FTM_5_CH_2_CH_3_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 2U; channel <= 3U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(5U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_5_CH_4_CH_5_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 5 channel 4 - channel 5.
+ */
+ISR(FTM_5_CH_4_CH_5_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 4U; channel <= 5U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(5U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_5_CH_6_CH_7_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 5 channel 6 - channel 7.
+ */
+ISR(FTM_5_CH_6_CH_7_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 6U; channel <= 7U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(5U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_6_CH_0_CH_1_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 6 channel 0 - channel 1.
+ */
+ISR(FTM_6_CH_0_CH_1_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel <= 1U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(6U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_6_CH_2_CH_3_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 6 channel 2 - channel 3.
+ */
+ISR(FTM_6_CH_2_CH_3_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 2U; channel <= 3U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(6U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_6_CH_4_CH_5_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 6 channel 4 - channel 5.
+ */
+ISR(FTM_6_CH_4_CH_5_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 4U; channel <= 5U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(6U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_6_CH_6_CH_7_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 6 channel 6 - channel 7.
+ */
+ISR(FTM_6_CH_6_CH_7_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 6U; channel <= 7U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(6U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_7_CH_0_CH_1_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 7 channel 0 - channel 1.
+ */
+ISR(FTM_7_CH_0_CH_1_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel <= 1U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(7U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_7_CH_2_CH_3_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 7 channel 2 - channel 3.
+ */
+ISR(FTM_7_CH_2_CH_3_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 2U; channel <= 3U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(7U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_7_CH_4_CH_5_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 7 channel 4 - channel 5.
+ */
+ISR(FTM_7_CH_4_CH_5_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 4U; channel <= 5U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(7U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+
+#if (defined FTM_7_CH_6_CH_7_ISR_USED)
+/**
+ * @brief          Independent interrupt handler.
+ * @details        Interrupt handler for FTM module 7 channel 6 - channel 7.
+ */
+ISR(FTM_7_CH_6_CH_7_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 6U; channel <= 7U; channel++)
+    {
+        Ftm_Gpt_Ip_ProcessCommonInterrupt(7U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+#endif
+
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#endif /* FTM_IP_USED == STD_ON */
+#ifdef __cplusplus
+}
+#endif  /*FTM_GPT_IP_C*/
+/** @} */
+

RTD/src/Gpt.c

@@ -0,0 +1,2487 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+/**
+*   @file           Gpt.c
+*   @implements     Gpt.c_Artifact
+*   @addtogroup     gpt Gpt Driver
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "OsIf.h"
+#include "Gpt.h"
+#include "Gpt_Irq.h"
+#include "Gpt_Ipw.h"
+#include "Det.h"
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define GPT_VENDOR_ID_C                      43
+#define GPT_AR_RELEASE_MAJOR_VERSION_C       4
+#define GPT_AR_RELEASE_MINOR_VERSION_C       4
+
+#define GPT_AR_RELEASE_REVISION_VERSION_C    0
+#define GPT_SW_MAJOR_VERSION_C               1
+#define GPT_SW_MINOR_VERSION_C               0
+#define GPT_SW_PATCH_VERSION_C               0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+/* Check if source file and GPT header file are of the same vendor */
+#if (GPT_VENDOR_ID_C != GPT_VENDOR_ID)
+    #error "Gpt.c and Gpt.h have different vendor ids"
+#endif
+/* Check if source file and GPT header file are of the same Autosar version */
+#if ((GPT_AR_RELEASE_MAJOR_VERSION_C != GPT_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_AR_RELEASE_MINOR_VERSION_C != GPT_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_AR_RELEASE_REVISION_VERSION_C != GPT_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt.c and Gpt.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((GPT_SW_MAJOR_VERSION_C != GPT_SW_MAJOR_VERSION) || \
+     (GPT_SW_MINOR_VERSION_C != GPT_SW_MINOR_VERSION) || \
+     (GPT_SW_PATCH_VERSION_C != GPT_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt.c and Gpt.h are different"
+#endif
+
+#if (GPT_VENDOR_ID_C != GPT_IPW_VENDOR_ID)
+    #error "Gpt.c and Gpt_Ipw.h have different vendor ids"
+#endif
+/* Check if source file and GPT Ipw header file are of the same Autosar version */
+#if ((GPT_AR_RELEASE_MAJOR_VERSION_C != GPT_IPW_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_AR_RELEASE_MINOR_VERSION_C != GPT_IPW_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_AR_RELEASE_REVISION_VERSION_C != GPT_IPW_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt.c and Gpt_Ipw.h are different"
+#endif
+/* Check if source file and GPT Ipw header file are of the same Software version */
+#if ((GPT_SW_MAJOR_VERSION_C != GPT_IPW_SW_MAJOR_VERSION) || \
+     (GPT_SW_MINOR_VERSION_C != GPT_IPW_SW_MINOR_VERSION) || \
+     (GPT_SW_PATCH_VERSION_C != GPT_IPW_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt.c and Gpt_Ipw.h are different"
+#endif
+
+/* Check if source file and GPT header file are of the same vendor */
+#if (GPT_VENDOR_ID_C != GPT_IRQ_VENDOR_ID)
+    #error "Gpt.c and Gpt_Irq.h have different vendor ids"
+#endif
+/* Check if source file and GPT header file are of the same Autosar version */
+#if ((GPT_AR_RELEASE_MAJOR_VERSION_C != GPT_IRQ_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_AR_RELEASE_MINOR_VERSION_C != GPT_IRQ_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_AR_RELEASE_REVISION_VERSION_C != GPT_IRQ_AR_RELEASE_REVISION_VERSION)\
+    )
+    #error "AutoSar Version Numbers of Gpt.c and Gpt_Irq.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((GPT_SW_MAJOR_VERSION_C != GPT_IRQ_SW_MAJOR_VERSION) || \
+     (GPT_SW_MINOR_VERSION_C != GPT_IRQ_SW_MINOR_VERSION) || \
+     (GPT_SW_PATCH_VERSION_C != GPT_IRQ_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt.c and Gpt_Irq.h are different"
+#endif
+
+/* Check if source file and DET header file are of the same version */
+    #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+        #if ((GPT_AR_RELEASE_MAJOR_VERSION_C != DET_AR_RELEASE_MAJOR_VERSION) || \
+             (GPT_AR_RELEASE_MINOR_VERSION_C != DET_AR_RELEASE_MINOR_VERSION) \
+            )
+            #error "AutoSar Version Numbers of Gpt.c and Det.h are different"
+        #endif
+        /* Check if this source file and OsIf.h file are of the same Autosar version */
+        #if ((GPT_AR_RELEASE_MAJOR_VERSION_C != OSIF_AR_RELEASE_MAJOR_VERSION) || \
+            (GPT_AR_RELEASE_MINOR_VERSION_C != OSIF_AR_RELEASE_MINOR_VERSION))
+            #error "AutoSar Version Numbers of Gpt.c and OsIf.h are different"
+        #endif
+    #endif
+
+/*==================================================================================================
+*                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
+==================================================================================================*/
+/**
+* @brief      This enumeration type allows the selection of channel status type.
+* @details    This enumeration specifies the return type of Gpt_ChannelStatusType
+*
+* @implements
+*/
+typedef enum
+{
+    GPT_STATUS_UNINITIALIZED = 0,               /**< @brief GPT channel status - uninitialized */
+    GPT_STATUS_INITIALIZED = 1,                 /**< @brief GPT channel status - initialized */
+    GPT_STATUS_STOPPED = 2,                     /**< @brief GPT channel status - stopped */
+    GPT_STATUS_EXPIRED = 3,                     /**< @brief GPT channel status - expired */
+    GPT_STATUS_RUNNING = 4                      /**< @brief GPT channel status - running */
+} Gpt_ChannelStatusType;
+
+/**
+* @brief    Gpt runtime status type - this is the type of the data structure including the
+*           runtime status informations of a channel.
+* @details  It contains the information like GPT channel runtime status, Channel has notification enabled at runtime,
+*           Channel has wakeup enabled at runtime,Channel executed wakeup.
+* @implements
+*/
+typedef struct
+{
+    Gpt_ChannelStatusType eChannelStatus;           /**< @brief GPT channel runtime status */
+#if (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON) /**< @brief GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON */
+    boolean bNotificationEnabled;                   /**< @brief GPT channel has notification enabled at runtime */
+#endif
+/** @brief (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON) */
+#if((GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON))
+    boolean bWakeupEnabled;                         /**< @brief GPT channel has wakeup enabled at runtime*/
+    boolean bWakeupGenerated;                       /**< @brief GPT channel executed wakeup */
+#endif
+} Gpt_ChannelInfoType;
+
+/*==================================================================================================
+*                                       LOCAL MACROS
+==================================================================================================*/
+#if (GPT_MULTICORE_ENABLED == STD_ON)
+    #define Gpt_GetCoreID()            (uint32)OsIf_GetCoreID()
+#else
+    #define Gpt_GetCoreID()            ((uint32)0UL)
+#endif
+/*==================================================================================================
+*                                      LOCAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      LOCAL VARIABLES
+==================================================================================================*/
+#define GPT_START_SEC_VAR_INIT_UNSPECIFIED
+#include "Gpt_MemMap.h"
+/**
+* @brief          Global variable used for indicating the current GPT driver mode.
+*/
+static volatile Gpt_ModeType Gpt_eMode = GPT_MODE_NORMAL;
+#define GPT_STOP_SEC_VAR_INIT_UNSPECIFIED
+#include "Gpt_MemMap.h"
+
+#define GPT_START_SEC_VAR_CLEARED_UNSPECIFIED
+#include "Gpt_MemMap.h"
+/**
+* @brief          Global variable (pointer) used for storing the GPT driver configuration data.
+*/
+#if (GPT_MULTICORE_ENABLED == STD_ON)
+const Gpt_ConfigType *Gpt_pConfig[GPT_MAX_PARTITIONS];
+#else
+const Gpt_ConfigType *Gpt_pConfig[1U];
+#endif
+
+/**
+* @brief         Global array variable used to store runtime internal context of each logic channel.
+*/
+static Gpt_ChannelInfoType Gpt_aChannelInfo[GPT_HW_CHANNEL_NUM];
+
+/**
+* @brief         Global array variable used to store for each channel the time value when it is
+*                stopped
+*/
+static volatile Gpt_ValueType Gpt_aStopTime[GPT_HW_CHANNEL_NUM];
+
+#define GPT_STOP_SEC_VAR_CLEARED_UNSPECIFIED
+#include "Gpt_MemMap.h"
+/*==================================================================================================
+*                                      GLOBAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      GLOBAL VARIABLES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                   LOCAL FUNCTION PROTOTYPES
+==================================================================================================*/
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+static inline Std_ReturnType Gpt_ValidateChannelCall
+(
+    uint8 u8ServiceId,
+    Gpt_ChannelType channel,
+    uint32 coreID
+);
+#endif
+
+#if(GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+static inline Std_ReturnType Gpt_ValidateGlobalCall
+(
+uint8 u8ServiceId,
+uint32 coreID
+);
+#endif
+
+#if ((GPT_VALIDATE_PARAM == STD_ON) && (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON))
+static inline Std_ReturnType Gpt_ValidateChannelNotification
+(
+    uint8 u8ServiceId,
+    Gpt_ChannelType channel,
+    uint32 coreID
+);
+#endif
+
+#if ((GPT_VALIDATE_PARAM == STD_ON) && (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON))
+static inline Std_ReturnType Gpt_ValidateChannelWakeup
+(
+    uint8 u8ServiceId,
+    Gpt_ChannelType channel,
+    uint32 coreID
+);
+#endif
+
+#if (GPT_VALIDATE_STATE == STD_ON)
+static inline Std_ReturnType Gpt_ValidateChannelStatus
+(
+    uint8 u8ServiceId,
+    Gpt_ChannelType channel,
+    uint32 coreID
+);
+#endif
+
+#if ((GPT_VALIDATE_PARAM == STD_ON) && (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON))
+static inline Std_ReturnType Gpt_ValidateParamMode(Gpt_ModeType eMode);
+#endif
+
+#if (GPT_VALIDATE_PARAM == STD_ON)
+static inline Std_ReturnType Gpt_ValidateParamValue
+(
+    uint8 u8ServiceId,
+    Gpt_ChannelType channel,
+    Gpt_ValueType value,
+    uint32 coreID
+);
+#endif
+
+#if (GPT_VALIDATE_PARAM == STD_ON)
+static inline Std_ReturnType Gpt_ValidateParamPtrInit
+(
+    const Gpt_ConfigType * configPtr
+);
+#endif
+
+#if (GPT_SET_CLOCK_MODE == STD_ON) && (GPT_VALIDATE_PARAM == STD_ON)
+static inline Std_ReturnType Gpt_ValidateParamSetClockMode
+(
+    Gpt_ClockModeType eClkMode
+);
+#endif
+
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+#if (GPT_VALIDATE_PARAM == STD_ON)
+static inline Std_ReturnType Gpt_ValidateParamTypePredefTimer
+(
+    Gpt_PredefTimerType u32PredefTimer,
+    uint32 coreID
+);
+
+static inline Std_ReturnType Gpt_ValidatePointerGetPredefTimer
+(
+    const uint32 * ParamPtr
+);
+#endif
+#if (GPT_VALIDATE_STATE == STD_ON)
+static inline Std_ReturnType Gpt_ValidateMode
+(
+    uint8 u8ServiceId
+);
+#endif
+#endif
+
+static inline Gpt_ChannelType Gpt_ConvertChannelIndexToChannel(Gpt_ChannelType ChannelIndex,
+                                                                              uint32 coreID
+                                                                              );
+/*==================================================================================================
+*                                       LOCAL FUNCTIONS
+==================================================================================================*/
+
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+/**
+ * @brief           This function validates the call for a specific channel
+ * @details         This service is a non re entrant function on channel used for validating the calls
+ *                  for functions that use one channel
+ *
+ * @param[in]       Channel          Numeric identifier of the GPT channel
+ * @param[in]       u8ServiceId      The service id of the caller function
+ * @return          The validity of the function call
+ * @returnValue     E_OK             The function call is valid
+ * @returnValue     E_NOT_OK         The function call is invalid
+ *
+ * @pre             Gpt_Init must be called before.
+ * @implements      Gpt_ValidateChannelCall_Activity
+ *
+ * */
+static inline Std_ReturnType Gpt_ValidateChannelCall
+(
+    uint8 u8ServiceId,
+    Gpt_ChannelType channel,
+    uint32 coreID
+)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+
+    /* If driver is not initialized report error */
+    if (NULL_PTR == Gpt_pConfig[coreID])
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)u8ServiceId,\
+            (uint8)GPT_E_UNINIT\
+        );
+    }
+    else
+    {
+        if (GPT_HW_CHANNEL_NUM <= channel)
+        {
+            /* Check if the configured channel is out of range */
+            (void)Det_ReportError\
+            (\
+                (uint16)GPT_MODULE_ID,\
+                (uint8)GPT_INSTANCE_ID,\
+                (uint8)u8ServiceId,\
+                (uint8)GPT_E_PARAM_CHANNEL\
+            );
+        }
+        else
+        {
+            /* Check if the channel is used on the current core */
+            if (255U != (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel])
+            {
+                returnValue = (Std_ReturnType)E_OK;
+            }
+            else
+            {
+                (void)Det_ReportError\
+                (\
+                    (uint16)GPT_MODULE_ID,\
+                    (uint8)GPT_INSTANCE_ID,\
+                    (uint8)u8ServiceId,\
+                    (uint8)GPT_E_PARAM_CONFIG\
+                );
+            }
+        }
+    }
+    return returnValue;
+}
+#endif
+
+#if(GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+/**
+ * @brief            This function validates the global call
+ * @details          This service is a non re-entrant function used for validating the calls for functions
+ *                   that uses all the channels - Gpt_Init, Gpt_DeInit, Gpt_SetMode.
+ *
+ * @param[in]        u8ServiceId The service id of the caller function
+ *
+ * @return           The validity of the function call
+ * @returnValue      E_OK     The function call is valid
+ * @returnValue      E_NOT_OK The function call is invalid
+ *
+ * @pre              Gpt_Init must be called before.
+ * @implements       Gpt_ValidateGlobalCall_Activity
+ * */
+static inline Std_ReturnType Gpt_ValidateGlobalCall
+(
+uint8 u8ServiceId,
+uint32 coreID
+)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+
+
+    /* If caller is the initialization function, error */
+    if (NULL_PTR == Gpt_pConfig[coreID])
+    {
+        /* If caller is the initialization function, OK */
+        if (GPT_INIT_ID == u8ServiceId)
+        {
+            returnValue = (Std_ReturnType)E_OK;
+        }
+        else
+        {
+            (void)Det_ReportError\
+            (\
+                (uint16)GPT_MODULE_ID,\
+                (uint8)GPT_INSTANCE_ID,\
+                (uint8)u8ServiceId,\
+                (uint8)GPT_E_UNINIT\
+            );
+        }
+    }
+    else
+    {
+        if (GPT_INIT_ID == u8ServiceId)
+        {
+            (void)Det_ReportError\
+            (\
+                (uint16)GPT_MODULE_ID,\
+                (uint8)GPT_INSTANCE_ID,\
+                (uint8)u8ServiceId,\
+                (uint8)GPT_E_ALREADY_INITIALIZED\
+            );
+        }
+        else
+        {
+            returnValue = (Std_ReturnType)E_OK;
+        }
+    }
+
+    return returnValue;
+}
+#endif
+
+#if ((GPT_VALIDATE_PARAM == STD_ON) && (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON))
+/**
+ * @brief           This function validate the channel notification capability for a
+ *                  specific channel.
+ * @details         Validate the notification handler of a GPT channel.
+ *                  In order to be valid, the notification handler should not be
+ *                  NULL_PTR. In case it is NULL_PTR, the function will report an error to
+ *                  DET or SERR, depending on the environment the driver is run in.
+ * @param[in]       u8ServiceId   The service id of the caller function
+ * @param[in]       channel     Numeric identifier of the GPT channel
+ *
+ * @return          The validity of the function call
+ * @returnValue     E_OK     The function call is valid
+ * @returnValue     E_NOT_OK The function call is invalid
+ *
+ * @pre             The driver needs to be initialized and GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON.
+ * @implements      Gpt_ValidateChannelNotification_Activity
+ *
+ * */
+static inline Std_ReturnType Gpt_ValidateChannelNotification
+(
+    uint8 u8ServiceId,
+    Gpt_ChannelType channel,
+    uint32 coreID
+)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+    uint8 ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+
+    if (NULL_PTR == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_pfNotification)
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)u8ServiceId,\
+            (uint8)GPT_E_PARAM_CHANNEL\
+        );
+    }
+    else
+    {
+        returnValue = (Std_ReturnType)E_OK;
+    }
+
+    return returnValue;
+
+}
+#endif
+
+#if ((GPT_VALIDATE_PARAM == STD_ON) && (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON))
+/**
+ * @brief           This function validate the channel wakeup capability for a specific channel.
+ * @details         Function validate the channel wakeup capability for a specific channel.
+ *                  In case Gpt_bEnableWakeup is FALSE, the function will report an error to
+ *                  DET or SERR, depending on the environment the driver is run in.
+ * @param[in]       u8ServiceId   The service id of the caller function
+ * @param[in]       channel       Numeric identifier of the GPT channel
+ *
+ * @return          The validity of the function call
+ * @returnValue     E_OK          The function call is valid
+ * @returnValue     E_NOT_OK      The function call is invalid
+ *
+ * @pre             The driver needs to be initialized.
+ * @implements      Gpt_ValidateChannelWakeup_Activity
+ *
+ * */
+static inline Std_ReturnType Gpt_ValidateChannelWakeup
+(
+    uint8 u8ServiceId,
+    Gpt_ChannelType channel,
+    uint32 coreID
+)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+    uint8 ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+
+    if (FALSE == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_bEnableWakeup)
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)u8ServiceId,\
+            (uint8)GPT_E_PARAM_CHANNEL\
+        );
+    }
+    else
+    {
+        returnValue = (Std_ReturnType)E_OK;
+    }
+
+    return returnValue;
+
+}
+#endif
+
+/**
+ * @brief           This function validate the channel status related to the caller function
+ *                  and to a specific channel.
+ * @details         Function validate the channel status for a specific channel.
+ *                  In case disabled wakeup channel in sleep mode ((bWakeupEnabled == False) && (GPT_MODE_SLEEP == Gpt_eMode)),
+ *                  In case channel status (GPT_STATUS_RUNNING != eChannelStatus) && GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON
+ *                  In case channel status (GPT_STATUS_RUNNING == eChannelStatus)
+ *                  In case channel mode (GPT_CH_MODE_ONESHOT == eChannelMode) && GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON
+ *                  the function will report an error to DET or SERR, depending on the environment the driver is run in.
+ * @param[in]       u8ServiceId   The service id of the caller function
+ * @param[in]       channel     Numeric identifier of the GPT channel
+ *
+ * @return          The validity of the function call
+ * @returnValue     E_OK     The function call is valid
+ * @returnValue     E_NOT_OK The function call is invalid
+ *
+ * @pre             The driver needs to be initialized.
+ * @implements
+ * */
+static inline Std_ReturnType Gpt_ValidateChannelStatus
+(
+    uint8 u8ServiceId,
+    Gpt_ChannelType channel,
+    uint32 coreID
+)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+#if ((GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON) && (GPT_VALIDATE_STATE == STD_ON))
+    uint8 ChannelIndex;
+#endif
+#if ((GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_VALIDATE_STATE == STD_ON))
+ #if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+    /* Do not start a not enabled wakeup channel in sleep mode */
+    if ((GPT_MODE_SLEEP == Gpt_eMode) && (FALSE == Gpt_aChannelInfo[channel].bWakeupEnabled) && (GPT_STARTTIMER_ID == u8ServiceId))
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)u8ServiceId,\
+            (uint8)GPT_E_INVALID_CALL\
+        );
+    }
+    else
+    {
+ #endif
+#endif /* (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_VALIDATE_STATE == STD_ON) */
+#if (GPT_VALIDATE_STATE == STD_OFF)
+    (void) coreID;
+#endif
+#if (GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
+    #if (GPT_VALIDATE_STATE == STD_ON)
+        ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+        if ((GPT_CHANGE_NEXT_TIMEOUT_VALUE_ID == u8ServiceId) && \
+            (GPT_STATUS_RUNNING != Gpt_aChannelInfo[channel].eChannelStatus)
+           )
+        {
+            (void)Det_ReportError\
+            (\
+                (uint16)GPT_MODULE_ID,\
+                (uint8)GPT_INSTANCE_ID,\
+                (uint8)u8ServiceId,\
+                (uint8)GPT_E_INVALID_CALL\
+            );
+        }
+        else if ((GPT_CHANGE_NEXT_TIMEOUT_VALUE_ID == u8ServiceId) && \
+                 (GPT_CH_MODE_ONESHOT == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_eChannelMode)
+                )
+        {
+            (void)Det_ReportError\
+            (\
+                (uint16)GPT_MODULE_ID,\
+                (uint8)GPT_INSTANCE_ID,\
+                (uint8)u8ServiceId,\
+                (uint8)GPT_E_PARAM_CHANNEL\
+            );
+        }
+        else
+    #endif /* (GPT_VALIDATE_STATE == STD_ON) */
+            if ((GPT_CHANGE_NEXT_TIMEOUT_VALUE_ID != u8ServiceId) && \
+                 (GPT_STATUS_RUNNING == Gpt_aChannelInfo[channel].eChannelStatus)
+                )
+        {
+            (void)Det_ReportRuntimeError\
+            (\
+                (uint16)GPT_MODULE_ID,\
+                (uint8)GPT_INSTANCE_ID,\
+                (uint8)u8ServiceId,\
+                (uint8)GPT_E_BUSY\
+            );
+        }
+        else
+        {
+#else
+            if (GPT_STATUS_RUNNING == Gpt_aChannelInfo[channel].eChannelStatus)
+            {
+                (void)Det_ReportRuntimeError\
+                (\
+                    (uint16)GPT_MODULE_ID,\
+                    (uint8)GPT_INSTANCE_ID,\
+                    (uint8)u8ServiceId,\
+                    (uint8)GPT_E_BUSY\
+                );
+            }
+            else
+            {
+#endif
+                returnValue = (Std_ReturnType)E_OK;
+#if (GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_OFF)
+            }
+#endif
+#if (GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
+        }
+#endif
+#if ((GPT_WAKEUP_FUNCTIONALITY_API == STD_ON)&& (GPT_VALIDATE_STATE == STD_ON))
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+    }
+#endif
+#endif
+#if ((GPT_VALIDATE_STATE == STD_OFF)||(GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_OFF))
+    /*variable coreID is not used in this case - this should be commented*/
+    (void) coreID;
+#endif
+    return returnValue;
+}
+
+
+#if ((GPT_VALIDATE_PARAM == STD_ON) && (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON))
+/**
+ * @brief           This function validate the mode that will be set in the driver.
+ * @details         Validate the mode that will be set in the driver.
+ *                  In case (GPT_MODE_SLEEP != eMode) && (GPT_MODE_NORMAL != eMode)
+ *                  the function will report an error to DET or SERR, depending on the environment the driver is run in.
+ * @param[in]       eMode        Specifies the operation mode
+ *
+ * @return          The validity of the function call
+ * @returnValue     E_OK     The function call is valid
+ * @returnValue     E_NOT_OK The function call is invalid
+ *
+ * @pre             The driver needs to be initialized.
+ * @implements      Gpt_ValidateParamMode_Activity
+ * */
+static inline Std_ReturnType Gpt_ValidateParamMode(Gpt_ModeType eMode)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+
+    if((GPT_MODE_SLEEP != eMode) && (GPT_MODE_NORMAL != eMode))
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)GPT_SETMODE_ID,\
+            (uint8)GPT_E_PARAM_MODE\
+        );
+    }
+    else
+    {
+        returnValue = (Std_ReturnType)E_OK;
+    }
+
+    return returnValue;
+}
+#endif
+
+#if (GPT_VALIDATE_PARAM == STD_ON)
+/**
+ * @brief           This function validate the time value parameter related to a specific GPT channel.
+ * @details         Function validate the time value parameter related to a specific GPT channel.
+ *                  In case ((Gpt_ValueType)0 == value) || (value > Gpt_uChannelTickValueMax)
+ *                  the function will report an error to DET or SERR, depending on the environment the driver is run in.
+ * @param[in]       u8ServiceId The service id of the caller function
+ * @param[in]       value       The time value which is verified
+ * @param[in]       channel     Numeric identifier of the GPT channel
+ *
+ * @return          The validity of the function call
+ * @returnValue     E_OK     The function call is valid
+ * @returnValue     E_NOT_OK The function call is invalid
+ *
+ * @pre             The driver needs to be initialized.
+ * @implements      Gpt_ValidateParamValue_Activity
+ *
+ * */
+static inline Std_ReturnType Gpt_ValidateParamValue
+(
+    uint8 u8ServiceId,
+    Gpt_ChannelType channel,
+    Gpt_ValueType value,
+    uint32 coreID
+)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+    uint8 ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+
+    if ((value > (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_uChannelTickValueMax) || \
+        ((Gpt_ValueType)0 == value )
+       )
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            u8ServiceId,\
+            (uint8)GPT_E_PARAM_VALUE\
+        );
+    }
+    else
+    {
+        returnValue = (Std_ReturnType)E_OK;
+    }
+
+    return returnValue;
+
+}
+#endif
+
+#if (GPT_VALIDATE_PARAM == STD_ON)
+/**
+ * @brief          This function validate the initialization pointer.
+ * @details        Validate the initialization pointer.
+ *                 In case NULL_PTR == configPtr and (GPT_PRECOMPILE_SUPPORT == STD_OFF)
+ *                 In case NULL_PTR != configPtr and (GPT_PRECOMPILE_SUPPORT == STD_ON)
+ *                 The function will report an error to DET or SERR, depending on the environment the driver is run in.
+ * @param[in]      configPtr        Pointer to a selected configuration structure.
+ *
+ * @return         The validity of the function call
+ * @returnValue    E_OK     The function call is valid
+ * @returnValue    E_NOT_OK The function call is invalid
+ *
+ * @pre            The data structure including the configuration set required for initializing the GPT driver.
+ * @implements     Gpt_ValidateParamPtrInit_Activity
+ *
+ * */
+static inline Std_ReturnType Gpt_ValidateParamPtrInit
+(
+    const Gpt_ConfigType * configPtr
+)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+
+#if (GPT_PRECOMPILE_SUPPORT == STD_OFF)
+#if (GPT_DEV_ERROR_DETECT == STD_ON)
+    if (NULL_PTR == configPtr)
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)GPT_INIT_ID,\
+            (uint8)GPT_E_INIT_FAILED \
+        );
+    }
+    else
+    {
+        returnValue = (Std_ReturnType)E_OK;
+    }
+#endif
+#elif (GPT_PRECOMPILE_SUPPORT == STD_ON)
+#if (GPT_DEV_ERROR_DETECT == STD_ON)
+    if (NULL_PTR != configPtr)
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)GPT_INIT_ID,\
+            (uint8)GPT_E_INIT_FAILED \
+        );
+    }
+    else
+    {
+        returnValue=(Std_ReturnType)E_OK;
+    }
+#endif
+#endif
+
+    return returnValue;
+}
+#endif
+#if (GPT_SET_CLOCK_MODE == STD_ON) && (GPT_VALIDATE_PARAM == STD_ON)
+/**
+ * @brief          This function validates the eClkMode parameter.
+ * @details        Validate the function ValidateParamSetClockMode.
+ *                 In case (GPT_CLOCKMODE_NORMAL != eClkMode) && (GPT_CLOCKMODE_ALTERNATE != eClkMode)
+ *                 The function will report an error to DET or SERR, depending on the environment the driver is run in.
+ * @param[in]      eClkMode   prescaler setting ( NORMAL or ALTERNATE )
+ *
+ * @return         The validity of the function call
+ * @returnValue    E_OK     The function call is valid
+ * @returnValue    E_NOT_OK The function call is invalid
+ *
+ * @pre            The driver needs to be initialized.
+ * @implements     Gpt_ValidateParamSetClockMode_Activity
+ *
+ * */
+static inline Std_ReturnType Gpt_ValidateParamSetClockMode
+(
+    Gpt_ClockModeType eClkMode
+)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+
+    if((GPT_CLOCKMODE_NORMAL != eClkMode) && (GPT_CLOCKMODE_ALTERNATE != eClkMode))
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)GPT_SET_CLOCK_MODE_ID,\
+            (uint8)GPT_E_PARAM_CLOCK_MODE\
+        );
+    }
+    else
+    {
+        returnValue=(Std_ReturnType)E_OK;
+    }
+
+    return returnValue;
+}
+#endif
+
+#if((GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON) && (GPT_VALIDATE_PARAM == STD_ON))
+/**
+ * @brief          This function validates parameter of PredefTimer
+ * @details        Validate the function Gpt_ValidateParamTypePredefTimer.
+ *                 In case (Gpt_PredefTimerType != u32PredefTimer)
+ *                 In case pointer to the GPT channel predeftimer configuration == NULL_PTR
+ *                 The function will report an error to DET or SERR, depending on the environment the driver is run in.
+ *
+ * @param[in]      u32PredefTimer Parameter of PredefTimer functionality
+ * @return         The validity of the function call
+ * @returnValue    E_OK     The function call is valid
+ * @returnValue    E_NOT_OK The function call is invalid
+ *
+ * @pre            The driver needs to be initialized.
+ *
+ * @implements     Gpt_ValidateParamTypePredefTimer_Activity
+ *
+ **/
+static inline Std_ReturnType Gpt_ValidateParamTypePredefTimer
+(
+    Gpt_PredefTimerType u32PredefTimer,
+    uint32 coreID
+)
+{
+    Std_ReturnType      returnValue = (Std_ReturnType)E_NOT_OK;
+    Gpt_ChannelType     channel;
+
+    if ((u32PredefTimer != GPT_PREDEF_TIMER_1US_16BIT) && \
+        (u32PredefTimer != GPT_PREDEF_TIMER_1US_24BIT) && \
+        (u32PredefTimer != GPT_PREDEF_TIMER_1US_32BIT) && \
+        (u32PredefTimer != GPT_PREDEF_TIMER_100US_32BIT))
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)GPT_GET_PREDEF_TIMERVALUE_ID,\
+            (uint8)GPT_E_PARAM_PREDEF_TIMER\
+        );
+    }
+    else
+    {
+       channel = (Gpt_ChannelType)u32PredefTimer;
+       if(NULL_PTR == ((Gpt_pConfig[coreID]->Gpt_pChannelPredefConfigType)[channel]))
+       {
+           (void)Det_ReportError\
+           (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)GPT_GET_PREDEF_TIMERVALUE_ID,\
+            (uint8)GPT_E_PARAM_PREDEF_TIMER\
+           );
+       }
+       else
+       {
+            returnValue = (Std_ReturnType)E_OK;
+       }
+
+    }
+    return returnValue;
+}
+/**
+ * @brief            This function validate the Pointer GetPredefTimer.
+ * @details          Validate the function Gpt_ValidatePointerGetPredefTimer.
+ *                   In case (NULL_PTR == ParamPtr)
+ *                   The function will report an error to DET or SERR, depending on the environment the driver is run in.
+ * @param[in]        ParamPtr        Pointer to a selected configuration structure.
+ * @return           The validity of the function call
+ * @returnValue      E_OK     The function call is valid
+ * @returnValue      E_NOT_OK The function call is invalid
+ *
+ * @pre              The driver needs to be initialized.
+ * @implements       Gpt_ValidatePointerGetPredefTimer_Activity
+ *
+ **/
+static inline Std_ReturnType Gpt_ValidatePointerGetPredefTimer
+(
+    const uint32 * ParamPtr
+)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+    if(NULL_PTR == ParamPtr)
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)GPT_GET_PREDEF_TIMERVALUE_ID,\
+            (uint8)GPT_E_PARAM_POINTER\
+        );
+    }
+    else
+    {
+        returnValue = (Std_ReturnType)E_OK;
+    }
+    return returnValue;
+}
+#endif
+#if (GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+/**
+ * @brief       This function validate the initialization mode.
+ * @details     Validate the function Gpt_ValidateMode.
+  *             In case (GPT_MODE_SLEEP == Gpt_eMode)
+ *              The function will report an error to DET or SERR, depending on the environment the driver is run in.
+ * @param[in]   u8ServiceId The service id of the caller function.
+ *
+ * @return      The validity of the function call.
+ * @returnValue E_OK     The function call is valid.
+ * @returnValue E_NOT_OK The function call is invalid.
+ *
+ * @pre         The driver needs to be initialized.
+ * @implements  Gpt_ValidateMode_Activity
+ *
+ **/
+static inline Std_ReturnType Gpt_ValidateMode
+(
+    uint8 u8ServiceId
+)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+    if (GPT_MODE_SLEEP == Gpt_eMode)
+    {
+        (void)Det_ReportRuntimeError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)u8ServiceId,\
+            (uint8)GPT_E_MODE\
+        );
+    }
+    else
+    {
+        returnValue = (Std_ReturnType)E_OK;
+    }
+    return returnValue;
+}
+#endif
+
+/**
+ * @brief       This function get the channel number corresponding to the index of channel
+ *
+ * @param[in]   ChannelIndex          Channel Index of the Gpt channel
+ * @param[in]   coreID                The number of current core ID
+ *
+ * @return      The channel number corresponds to the channel in the core
+ * @pre         Gpt_Init must be called before.
+ *
+ *
+ * */
+static inline Gpt_ChannelType Gpt_ConvertChannelIndexToChannel(Gpt_ChannelType ChannelIndex,
+                                                                              uint32 coreID
+                                                                              )
+{
+    Gpt_ChannelType Channel = GPT_HW_CHANNEL_NUM;
+
+    for (Channel = 0U; Channel < GPT_HW_CHANNEL_NUM; Channel++)
+    {
+        if(ChannelIndex == (*Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap)[Channel])
+        {
+            break;
+        }
+    }
+    return Channel;
+}
+/*==================================================================================================
+*                                       GLOBAL FUNCTIONS
+==================================================================================================*/
+
+/*================================================================================================*/
+#if (GPT_VERSION_INFO_API == STD_ON)
+/**
+* @brief   This function returns the version information of this module.
+* @details This service returns the version information of this module. The version information
+*          includes:
+*                    - Module Id
+*                    - Vendor Id
+*                    - Vendor specific version numbers
+*          If source code for caller and callee of this function is available this function should
+*          be realized as a macro. The macro should be defined in the modules header file.
+* @param[out]  VersionInfoPtr - pointer to location to store version info
+*
+* @return void
+* @api
+*
+* @pre            Gpt_Init must be called before.
+* @implements     Gpt_GetVersionInfo_Activity
+*/
+void Gpt_GetVersionInfo
+(
+    Std_VersionInfoType * VersionInfoPtr
+)
+{
+#if (GPT_DEV_ERROR_DETECT == STD_ON)
+    if (NULL_PTR == VersionInfoPtr)
+    {
+        (void)Det_ReportError\
+        (\
+            (uint16)GPT_MODULE_ID,\
+            (uint8)GPT_INSTANCE_ID,\
+            (uint8)GPT_GETVERSIONINFO_ID,\
+            (uint8)GPT_E_PARAM_POINTER\
+        );
+    }
+    else
+#endif
+    {
+        VersionInfoPtr->vendorID         = (uint16)GPT_VENDOR_ID;
+        VersionInfoPtr->moduleID         = (uint16)GPT_MODULE_ID;
+        VersionInfoPtr->sw_major_version = (uint8)GPT_SW_MAJOR_VERSION;
+        VersionInfoPtr->sw_minor_version = (uint8)GPT_SW_MINOR_VERSION;
+        VersionInfoPtr->sw_patch_version = (uint8)GPT_SW_PATCH_VERSION;
+    }
+}
+#endif
+
+/*================================================================================================*/
+/**
+* @brief   GPT driver initialization function.
+* @details This service is a non reentrant function used for driver initialization.
+*          The Initialization function shall initialize all relevant registers of
+*          the configured hardware with the values of the structure referenced by the parameter ConfigPtr.
+*          All time units used within the API services of the GPT driver shall be of the unit ticks.
+*          This function shall only initialize the configured resources. Resources that are
+*          not configured in the configuration file shall not be touched.
+*          The following rules regarding initialization of controller registers shall apply
+*          to the GPT Driver implementation:
+*          [1] If the hardware allows for only one usage of the register, the driver
+*              module implementing that functionality is responsible for initializing the register
+*          [2] If the register can affect several hardware modules and if it is an IO register it
+*              shall be initialized by the PORT driver
+*          [3] If the register can affect several hardware modules and if it is not an IO register
+*              it shall be initialized by the MCU driver
+*          [4] One-time writable registers that require initialization directly after reset shall be
+*              initialized by the startup code
+*          [5] All other registers shall be initialized by the startup code
+*
+* @param[in]     configPtr    Pointer to a selected configuration structure
+*
+* @return        void
+* @api
+*
+* @pre            The data structure including the configuration set required for initializing the GPT driver..
+* @implements     Gpt_Init_Activity
+*/
+void Gpt_Init(const Gpt_ConfigType * configPtr)
+{
+    uint32 coreID;
+    Gpt_ChannelType ChannelIndex;
+    Gpt_ChannelType channel;
+    coreID = (uint32)Gpt_GetCoreID();
+
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    /*Validate the calling context*/
+    if((Std_ReturnType)E_OK == Gpt_ValidateGlobalCall(GPT_INIT_ID, coreID))
+    {
+#endif
+#if (GPT_VALIDATE_PARAM  == STD_ON)
+        /*Validate configuration pointer parameter.*/
+        if((Std_ReturnType)E_OK == Gpt_ValidateParamPtrInit(configPtr))
+        {
+#endif
+
+    #if (GPT_PRECOMPILE_SUPPORT == STD_ON)
+        #if(GPT_MULTICORE_ENABLED == STD_ON)
+            Gpt_pConfig[coreID] = Gpt_Config[coreID];
+        #else
+            Gpt_pConfig[coreID] = &Gpt_Config;
+        #endif
+            (void)configPtr;
+    #else
+            Gpt_pConfig[coreID] = configPtr;
+    #endif
+
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+            /*Initialize and Start Predef Timers.*/
+            Gpt_Ipw_StartPredefTimer(Gpt_pConfig[coreID]);
+#endif
+            Gpt_Ipw_InitInstances(Gpt_pConfig[coreID]);
+
+            /*Initialize for each channel the runtime status informations.*/
+            for (ChannelIndex = 0U; ChannelIndex < Gpt_pConfig[coreID]->channelCount; ChannelIndex++)
+            {
+                channel = Gpt_ConvertChannelIndexToChannel(ChannelIndex, coreID);
+
+#if (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON)
+                /*Disable notification*/
+                Gpt_aChannelInfo[channel].bNotificationEnabled = FALSE;
+#endif
+
+#if ((GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON))
+                /*Disable wakeup*/
+                Gpt_aChannelInfo[channel].bWakeupEnabled = FALSE;
+                /*Clear wakeup generation status*/
+                Gpt_aChannelInfo[channel].bWakeupGenerated = FALSE;
+#endif
+
+                /* Initialize the running information of the channel*/
+                Gpt_aChannelInfo[channel].eChannelStatus = GPT_STATUS_INITIALIZED;
+                Gpt_aStopTime[channel] = 0U;
+
+                /*Initialize hardware timer channel.*/
+                Gpt_Ipw_Init(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig));
+            }
+
+            /*Set the driver to normal mode*/
+            Gpt_eMode = GPT_MODE_NORMAL;
+#if (GPT_VALIDATE_PARAM  == STD_ON)
+        }
+#endif
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    }
+#endif
+    return;
+}
+
+/*================================================================================================*/
+#if (GPT_DEINIT_API == STD_ON)
+/**
+* @brief   GPT driver de-initialization function.
+* @details Service for de initializing all hardware timer channels to their power on reset state.
+*          The state of the peripheral after DeInit shall be the same as after power on
+*          reset.
+*          The service influences only the peripherals, which are allocated by static
+*          configuration and the runtime configuration set passed by the previous call of Gpt_Init()
+*          The driver needs to be initialized before calling Gpt_DeInit(). Otherwise, the
+*          function Gpt_DeInit shall raise the development error GPT_E_UNINIT and leave the desired
+*          de initialization functionality without any action.
+*
+* @api
+* @return  void
+*
+* @implements   Gpt_DeInit_Activity
+*/
+void Gpt_DeInit(void)
+{
+
+    Gpt_ChannelType channel;
+    Gpt_ChannelType ChannelIndex;
+
+    Std_ReturnType allChannelStatus = (Std_ReturnType)E_OK;
+    uint32 coreID;
+    coreID = (uint32)Gpt_GetCoreID();
+
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    /*Validate if the calling context is valid*/
+    if((Std_ReturnType)E_OK == Gpt_ValidateGlobalCall(GPT_DEINIT_ID, coreID))
+    {
+#endif
+        /* Initialize for each channel the runtime status informations.*/
+        for (ChannelIndex = 0U; ChannelIndex < Gpt_pConfig[coreID]->channelCount; ChannelIndex++)
+            {
+                channel = Gpt_ConvertChannelIndexToChannel(ChannelIndex, coreID);
+                /*Check if the channel is not running.*/
+                if((Std_ReturnType)E_NOT_OK == Gpt_ValidateChannelStatus(GPT_DEINIT_ID, channel, coreID))
+                {
+                    allChannelStatus = (Std_ReturnType)E_NOT_OK;
+                    break;
+                }
+            }
+
+        if((Std_ReturnType)E_OK == allChannelStatus)
+        {
+            for (ChannelIndex = 0U; ChannelIndex < Gpt_pConfig[coreID]->channelCount; ChannelIndex++)
+            {
+                channel = Gpt_ConvertChannelIndexToChannel(ChannelIndex, coreID);
+
+#if (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON)
+                /*Disable notification*/
+                Gpt_aChannelInfo[channel].bNotificationEnabled = FALSE;
+#endif
+
+#if ((GPT_WAKEUP_FUNCTIONALITY_API == STD_ON) && (GPT_REPORT_WAKEUP_SOURCE == STD_ON))
+                /*Disable wakeup*/
+                Gpt_aChannelInfo[channel].bWakeupEnabled = FALSE;
+                /*Clear wakeup generation status*/
+                Gpt_aChannelInfo[channel].bWakeupGenerated = FALSE;
+#endif
+                /* De initialize the running information of the channel*/
+                Gpt_aChannelInfo[channel].eChannelStatus = GPT_STATUS_UNINITIALIZED;
+
+                Gpt_aStopTime[channel] = 0U;
+                /*Initialize hardware timer channel.*/
+                Gpt_Ipw_DeInit
+                (
+                    ((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)
+                );
+            }
+
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+            /* Deinitialize and stop Predef timers.*/
+            Gpt_Ipw_StopPredefTimer(Gpt_pConfig[coreID]);
+#endif
+            /* Writing NULL to configuration pointer is mandatory because that variable
+            is used to test the initialization of the driver */
+            Gpt_pConfig[coreID] = NULL_PTR;
+        }
+
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    }
+#endif
+    return;
+}
+#endif
+
+/*================================================================================================*/
+#if (GPT_TIME_ELAPSED_API == STD_ON)
+/**
+* @brief   GPT driver function for fetching the elapsed timer value.
+* @details Service for querying the time already elapsed.
+*          In one shot mode, this is the value relative to the point in time, the channel has been
+*          started with Gpt_StartTimer (calculated by the normal operation function by subtracting
+*          the current minus the initial timer value and returning the absolute value).
+*          In continuous mode, the function returns the timer value relative to the last timeout or
+*          the start of the channel.
+*          All time units used within the API services of the GPT driver shall be of the unit ticks.
+*          Usage of re-entrant capability is only allowed if the callers take care that
+*          there is no simultaneous usage of the same channel.
+*          To get times out of register values it is necessary to know the oscillator frequency, pre
+*          prescalers and so on. Since these settings are made in MCU and(or) in other modules it is
+*          not possible to calculate such times. Hence the conversions between time and ticks shall
+*          be part of an upper layer.
+*          The driver needs to be initialized before calling Gpt_GetTimeElapsed(). Otherwise, the
+*          function shall raise the development error GPT_E_UNINIT and return 0.
+*
+* @param[in]  channel - channel id
+*
+* @return  Gpt_ValueType - Elapsed Time in number of ticks
+*
+* @api
+*
+* @pre     The driver needs to be initialized.
+* @implements Gpt_GetTimeElapsed_Activity
+*/
+Gpt_ValueType Gpt_GetTimeElapsed(Gpt_ChannelType channel)
+{
+    static Gpt_HwChannelInfoType returnHwChannelInfo;
+    uint32 coreID;
+    uint8 ChannelIndex;
+    Gpt_ValueType returnValue = (Gpt_ValueType)0;
+
+    returnHwChannelInfo.bChannelRollover =FALSE;
+    returnHwChannelInfo.uTargetTime =(Gpt_ValueType)0;
+
+    coreID = (uint32)Gpt_GetCoreID();
+
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_TIMEELAPSED_ID, channel, coreID))
+    {
+#endif
+        ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+        /*Gpt_Ipw_GetTimeElapsed() shall be called first, because the occurred ISRs can change
+        the logical channel state between the checking of logical channel state and timestamp
+        retrieval*/
+        returnValue = Gpt_Ipw_GetTimeElapsed((((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)), &returnHwChannelInfo);
+
+        /*Check the channel status*/
+        switch(Gpt_aChannelInfo[channel].eChannelStatus)
+        {
+            case GPT_STATUS_RUNNING:
+            {
+                /*Check if channel counter has already rollover*/
+                if ((TRUE == returnHwChannelInfo.bChannelRollover) && \
+                    (GPT_CH_MODE_ONESHOT == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_eChannelMode)
+                   )
+                {
+                    /*The timer has already expired.The hardware timer status is not yet
+                    synchronized with the logical timer status*/
+                    returnValue = returnHwChannelInfo.uTargetTime;
+                }
+            }
+            break;
+            case GPT_STATUS_INITIALIZED:
+            {
+                returnValue = (Gpt_ValueType)0;
+            }
+            break;
+            case GPT_STATUS_STOPPED:
+            {
+                /*Return elapsed time at the when the channel was stopped*/
+                returnValue = Gpt_aStopTime[channel];
+            }
+            break;
+            case GPT_STATUS_EXPIRED:
+            {
+                returnValue = returnHwChannelInfo.uTargetTime;
+            }
+            break;
+            default:
+                /*Only the above four channel states are allowed when this function is called*/
+                break;
+        }
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+
+    return (returnValue);
+}
+#endif
+
+/*================================================================================================*/
+#if (GPT_TIME_REMAINING_API == STD_ON)
+/**
+* @brief   GPT driver function for fetching the remaining timer value.
+* @details This function returns the timer value remaining until the next timeout period will
+*          expire (calculated by the normal operation function by subtracting the timeout minus
+*          the current timer value and returning the absolute value)
+*          All time units used within the API services of the GPT driver shall be of the unit ticks.
+*          Usage of re-entrant capability is only allowed if the callers take care that there is no
+*          simultaneous usage of the same channel.
+*          To get times out of register values it is necessary to know the oscillator frequency,
+*          pre-scalers and so on. Since these settings are made in MCU and(or) in other modules it is
+*          not possible to calculate such times. Hence the conversions between time and ticks shall
+*          be part of an upper layer.
+*          The driver needs to be initialized before calling Gpt_GetTimeRemaining(). Otherwise, the
+*          function shall raise the development error GPT_E_UNINIT and return 0.
+*
+*
+* @param[in]     channel - channel id
+*
+* @return  Gpt_ValueType - Returns the time remaining until the target time is reached in number of ticks.
+*
+* @api
+*
+* @pre           The driver needs to be initialized.
+* @implements    Gpt_GetTimeRemaining_Activity
+*/
+Gpt_ValueType Gpt_GetTimeRemaining(Gpt_ChannelType channel)
+{
+    uint32 coreID;
+    uint8 ChannelIndex;
+    static Gpt_HwChannelInfoType returnHwChannelInfo;
+    Gpt_ValueType returnValue = (Gpt_ValueType)0;
+    returnHwChannelInfo.bChannelRollover =FALSE;
+    returnHwChannelInfo.uTargetTime =(Gpt_ValueType)0;
+
+    coreID = (uint32)Gpt_GetCoreID();
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_TIMEREMAINING_ID, channel, coreID))
+    {
+#endif
+        ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+        /* Calculate the remaining time from the elapsed time*/
+        /* Gpt_Ipw_GetTimeElapsed() shall be called first, because the occurred ISRs can
+        change the logical channel state between the checking of logical channel state
+        and timestamps retrieval*/
+        returnValue = Gpt_Ipw_GetTimeElapsed((((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)), &returnHwChannelInfo);
+
+        /*Check the channel status*/
+        switch(Gpt_aChannelInfo[channel].eChannelStatus)
+        {
+            case GPT_STATUS_RUNNING:
+            {
+                /*Check if channel counter has already roll-over*/
+                if((TRUE == returnHwChannelInfo.bChannelRollover) && \
+                   (GPT_CH_MODE_ONESHOT == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_eChannelMode)
+                  )
+                {
+                    /*The timer has already expired.The hardware timer status is not yet
+                    synchronized with the logical timer status*/
+                    returnValue = (Gpt_ValueType)0;
+                }
+                else
+                {
+                    /*Calculate remaining time from elapsed time*/
+                    returnValue = returnHwChannelInfo.uTargetTime - returnValue;
+                }
+            }
+            break;
+            case GPT_STATUS_INITIALIZED:
+            {
+                returnValue = (Gpt_ValueType)0;
+            }
+            break;
+            case GPT_STATUS_STOPPED:
+            {
+                returnValue = returnHwChannelInfo.uTargetTime-Gpt_aStopTime[channel];
+            }
+            break;
+            case GPT_STATUS_EXPIRED:
+            {
+                returnValue = (Gpt_ValueType)0;
+            }
+            break;
+            default:
+                /*Only the above four channel states are allowed when this function is called*/
+                break;
+        }
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+
+    return(returnValue);
+}
+#endif
+
+/*================================================================================================*/
+/**
+* @brief   GPT driver function for starting a timer channel.
+* @details The function Gpt_StartTimer shall start the selected timer channel with a defined
+*          time-out period.
+*          The function Gpt_StartTimer shall invoke the configured notification for that channel
+*          (see also GPT292) after the time-out period referenced via the parameter value (if
+*          enabled).
+*          All time units used within the API services of the GPT driver shall be of the unit ticks.
+*          In production mode no error is generated. The rational is that it adds no
+*          additional functionality to the driver. In this case the timer will be restarted with the
+*          time-out value, given as a parameter to the service.
+*          Usage of re-entrant capability is only allowed if the callers take care that
+*          there is no simultaneous usage of the same channel.
+*          To get times out of register values it is necessary to know the oscillator
+*          frequency, pre-scalers and so on. Since these settings are made in MCU and(or) in other
+*          modules it is not possible to calculate such times. Hence the conversions between time
+*          and ticks shall be part of an upper layer.
+*          The driver needs to be initialized before calling Gpt_StartTimer(). Otherwise, the
+*          function Gpt_StartTimer shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]     channel channel id
+* @param[in]     value   time-out period (in number of ticks) after a notification or a
+*                        wakeup event shall occur
+*
+* @api
+* @return void
+*
+* @pre     The driver needs to be initialized.
+* @implements    Gpt_StartTimer_Activity
+*/
+void Gpt_StartTimer
+(
+    Gpt_ChannelType channel,
+    Gpt_ValueType value
+)
+{
+    uint32 coreID;
+    uint8 ChannelIndex;
+    Std_ReturnType returnValue;
+    coreID = (uint32)Gpt_GetCoreID();
+
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_STARTTIMER_ID, channel, coreID))
+    {
+#endif
+        if ((Std_ReturnType)E_OK == Gpt_ValidateChannelStatus(GPT_STARTTIMER_ID, channel, coreID))
+        {
+#if (GPT_VALIDATE_PARAM  == STD_ON)
+            if ((Std_ReturnType)E_OK == Gpt_ValidateParamValue(GPT_STARTTIMER_ID, channel, value, coreID))
+            {
+#endif
+                ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+                /*Enable hardware interrupts for the one-shot mode to set the status of  channel*/
+                if (GPT_CH_MODE_ONESHOT == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_eChannelMode)
+                {
+                    Gpt_Ipw_EnableInterrupt
+                    (
+                        ((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)
+                    );
+                }
+
+                /* Change GPT channel status.Channel status change shall be made before to start
+                the hardware in order to not change the channel status from EXPIRED to RUNNING*/
+                Gpt_aChannelInfo[channel].eChannelStatus = GPT_STATUS_RUNNING;
+
+                /* Call low level API */
+                returnValue = Gpt_Ipw_StartTimer(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig),value);
+
+                if((Std_ReturnType)E_OK != returnValue)
+                {
+                    (void)Det_ReportRuntimeError\
+                    (\
+                        (uint16)GPT_MODULE_ID,\
+                        (uint8)GPT_INSTANCE_ID,\
+                        (uint8)GPT_STARTTIMER_ID,\
+                        (uint8)GPT_E_TIMEOUT\
+                    );
+                }
+#if (GPT_VALIDATE_PARAM  == STD_ON)
+            }
+#endif
+        }
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+    return;
+}
+/*================================================================================================*/
+/**
+* @brief   GPT driver function for stopping a timer channel.
+* @details Service for stopping the selected timer channel
+*          Stopping a timer channel, not been started before will not return a development error
+*          Timer channels configured in one shot mode are stopped automatically, when the
+*          time-out period has expired.
+*          Usage of re-entrant capability is only allowed if the callers take care that
+*          there is no simultaneous usage of the same channel.
+*          The driver needs to be initialized before calling Gpt_StopTimer(). Otherwise,
+*          the function shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    channel        channel id
+* @return       void
+*
+* @api
+*
+* @pre          The driver needs to be initialized. Gpt_StartTimer must be called before.
+* @implements   Gpt_StopTimer_Activity
+*/
+void Gpt_StopTimer(Gpt_ChannelType channel)
+{
+    uint32 coreID;
+    uint8 ChannelIndex;
+    static Gpt_HwChannelInfoType returnHwChannelInfo;
+    Gpt_ValueType uElapsedTime;
+
+    returnHwChannelInfo.bChannelRollover =FALSE;
+    returnHwChannelInfo.uTargetTime =(Gpt_ValueType)0;
+
+    coreID = (uint32)Gpt_GetCoreID();
+
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_STOPTIMER_ID, channel, coreID))
+    {
+#endif
+        ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+        /*Gpt_Ipw_GetTimeElapsed() shall be called first, because the occurred ISRs can change
+        the logical channel state between the checking of logical channel state and timestamps
+        retrieval*/
+        /* Get the elapsed  time  for later use by other API calls*/
+        uElapsedTime = Gpt_Ipw_GetTimeElapsed((((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)), &returnHwChannelInfo);
+
+        /*Check the logical channel status*/
+        if (GPT_STATUS_RUNNING == Gpt_aChannelInfo[channel].eChannelStatus)
+        {
+            /* Call low level stop timer */
+            Gpt_Ipw_StopTimer(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig));
+
+            if ((TRUE == returnHwChannelInfo.bChannelRollover) && \
+                (GPT_CH_MODE_ONESHOT == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_eChannelMode)
+            )
+            {
+                /*This action could be executed only when the function is called during a critical
+                section implemented by disabling all interrupts*/
+                /*Set channel status to EXPIRED*/
+                Gpt_aChannelInfo[channel].eChannelStatus = GPT_STATUS_EXPIRED;
+            }
+            else
+            {
+                /* Store the stopping time for later use by other API calls*/
+                Gpt_aStopTime[channel] = uElapsedTime;
+
+                /* Set GPT channel status to stopped*/
+                Gpt_aChannelInfo[channel].eChannelStatus = GPT_STATUS_STOPPED;
+            }
+        }
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+    return;
+}
+
+/*================================================================================================*/
+#if (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON)
+/**
+* @brief   GPT driver function for enabling the notification for a timer channel.
+* @details Service for enabling the notification for a channel during runtime.
+*          This function can be called, while the timer is already running.
+*          Usage of re-entrant capability is only allowed if the callers take care that
+*          there is no simultaneous usage of the same channel.
+*          The driver needs to be initialized before calling Gpt_EnableNotification(). Otherwise,
+*          the function Gpt_EnableNotification shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]     channel        channel id
+* @return void
+* @api
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_EnableNotification_Activity
+*/
+void Gpt_EnableNotification(Gpt_ChannelType channel)
+{
+    uint32 coreID;
+    uint8 ChannelIndex;
+
+    coreID = (uint32)Gpt_GetCoreID();
+
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_ENABLENOTIFICATION_ID, channel, coreID))
+    {
+#endif
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        if ((Std_ReturnType)E_OK == Gpt_ValidateChannelNotification(GPT_ENABLENOTIFICATION_ID, channel, coreID))
+        {
+#endif
+            ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+            /* Set the enable notification attribute */
+            Gpt_aChannelInfo[channel].bNotificationEnabled = TRUE;
+
+            if (GPT_MODE_NORMAL == Gpt_eMode)
+            {
+                /*Enable hardware interrupts*/
+                Gpt_Ipw_EnableInterrupt
+                (
+                    ((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)
+                );
+            }
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        }
+#endif
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+
+    return;
+}
+#endif
+/*================================================================================================*/
+#if (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON)
+/**
+* @brief   GPT driver function for disabling the notification for a timer channel.
+* @details Service for disabling the notification for a channel during runtime.
+*          This function can be called, while the timer is already running
+*          When disabled, no notification will be sent. When re-enabled again, the user
+*          will not be notified of events, occurred while notifications have been disabled.
+*          Usage of re-entrant capability is only allowed if the callers take care that
+*          there is no simultaneous usage of the same channel.
+*          The driver needs to be initialized before calling Gpt_DisableNotification().
+*          Otherwise, the function shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]     channel        channel id
+* @return void
+* @api
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_DisableNotification_Activity
+*/
+void Gpt_DisableNotification(Gpt_ChannelType channel)
+{
+    uint32 coreID;
+    uint8 ChannelIndex;
+
+    coreID = (uint32)Gpt_GetCoreID();
+
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_DISABLENOTIFICATION_ID, channel, coreID))
+    {
+#endif
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        if ((Std_ReturnType)E_OK == Gpt_ValidateChannelNotification(GPT_DISABLENOTIFICATION_ID, channel, coreID))
+        {
+#endif
+            ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+            /* Set the enable notification attribute */
+            Gpt_aChannelInfo[channel].bNotificationEnabled = FALSE;
+
+            /* Disable hardware interrupts if the channel is not running in the ONE-SHUT mode.
+            This is needed because the channel state is updated by ISR for ONE-SHOT mode */
+            if ((GPT_MODE_NORMAL == Gpt_eMode) && \
+                ((GPT_CH_MODE_CONTINUOUS == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_eChannelMode) \
+                 || (GPT_STATUS_RUNNING != Gpt_aChannelInfo[channel].eChannelStatus)
+                )
+               )
+            {
+                /*Disable hardware interrupts*/
+                Gpt_Ipw_DisableInterrupt
+                (
+                    ((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)
+                );
+            }
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        }
+#endif
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+    return;
+}
+#endif
+
+/*================================================================================================*/
+#if (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON)
+/**
+* @brief        GPT driver function for setting the operation mode.
+* @details      Service for GPT mode selection. This service shall set the operation mode to the given
+*               mode parameter .
+*               When sleep mode is requested, the ECU State Manager calls Gpt_SetMode with mode
+*               parameter "GPT_MODE_SLEEP" and prepares the GPT for sleep mode. The MCU Driver is then
+*               putting the controller into SLEEP mode
+*               The driver needs to be initialized before calling Gpt_SetMode(). Otherwise, the
+*               function Gpt_SetMode shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    eMode        operation mode
+*                           - GPT_MODE_NORMAL: Normal operation mode of the GPT driver.
+*                           - GPT_MODE_SLEEP: Sleep mode of the GPT driver (wakeup capable)
+* @return       void
+* @api
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_SetMode_Activity
+*/
+void Gpt_SetMode(Gpt_ModeType eMode)
+{
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+    uint32 coreID = (uint32)Gpt_GetCoreID();
+#endif
+
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_OFF)
+    (void)eMode;
+#endif
+
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+    static Gpt_HwChannelInfoType returnHwChannelInfo;
+    Gpt_ValueType uElapsedTime = 0U;
+    Gpt_ChannelType ChannelIndex;
+    Gpt_ChannelType channel;
+    returnHwChannelInfo.bChannelRollover =FALSE;
+    returnHwChannelInfo.uTargetTime =(Gpt_ValueType)0;
+
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    /*Validate the driver calling context*/
+    if((Std_ReturnType)E_OK == Gpt_ValidateGlobalCall(GPT_SETMODE_ID, coreID))
+    {
+#endif
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        if((Std_ReturnType)E_OK == Gpt_ValidateParamMode(eMode))
+        {
+#endif
+            /*Implements the behaviour for the sleep mode*/
+            if(GPT_MODE_SLEEP == eMode)
+            {
+
+                for (ChannelIndex = 0U; ChannelIndex < Gpt_pConfig[coreID]->channelCount; ChannelIndex++)
+                {
+                    channel = Gpt_ConvertChannelIndexToChannel(ChannelIndex, coreID);
+
+                        /* Check for wakeup enabled channel*/
+                        if (TRUE == Gpt_aChannelInfo[channel].bWakeupEnabled)
+                        {
+                            /*Enable hardware interrupts*/
+                            Gpt_Ipw_EnableInterrupt(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig));
+                        }
+                        /* Disable interrupts and stop the channel*/
+                        else
+                        {
+                            /*Disable hardware interrupts*/
+                            Gpt_Ipw_DisableInterrupt(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig));
+
+                            /*Gpt_Ipw_GetTimeElapsed() shall be called first, because the occurred ISRs
+                            can change the logical channel state between the checking of logical channel
+                            state and timestamp retrieval*/
+                            /* Get the elapsed  time  for later use by other API calls*/
+                            uElapsedTime = Gpt_Ipw_GetTimeElapsed((((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)), &returnHwChannelInfo);
+
+                        /*Stop  the running timer*/
+                        if (GPT_STATUS_RUNNING == Gpt_aChannelInfo[channel].eChannelStatus)
+                            {
+                                if ((TRUE == returnHwChannelInfo.bChannelRollover) && \
+                                (GPT_CH_MODE_ONESHOT == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_eChannelMode)
+                                )
+                                {
+                                /*This action could be executed only when the function is called
+                                during a critical section implemented by disabling all interrupts*/
+                                /*Set the channel status to EXPIRED*/
+                                Gpt_aChannelInfo[channel].eChannelStatus = GPT_STATUS_EXPIRED;
+                                }
+                                else
+                                {
+                                /* Store the stopping time for later use by other API calls*/
+                                Gpt_aStopTime[channel] = uElapsedTime;
+                                /* Set the channel status to STOPPED*/
+                                Gpt_aChannelInfo[channel].eChannelStatus = GPT_STATUS_STOPPED;
+                                }
+                                /* Call low level stop timer */
+                                Gpt_Ipw_StopTimer
+                                (
+                                    ((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)
+                                );
+                            }
+                        }
+                }
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+                /* Deinitialize and Stop Predef Timers. */
+                Gpt_Ipw_StopPredefTimer(Gpt_pConfig[coreID]);
+#endif
+                /*Set the driver mode to sleep */
+                Gpt_eMode = GPT_MODE_SLEEP;
+            }
+            else if (GPT_MODE_NORMAL == eMode)
+            {
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+                if ((Gpt_ModeType)GPT_MODE_SLEEP == Gpt_eMode)
+                {
+                    /* Start for each predef timer status informations. */
+                    Gpt_Ipw_StartPredefTimer(Gpt_pConfig[coreID]);
+                }
+#endif
+                /*Implements the behavior for normal mode*/
+                for (ChannelIndex = 0U; ChannelIndex < Gpt_pConfig[coreID]->channelCount; ChannelIndex++)
+                {
+                    channel = Gpt_ConvertChannelIndexToChannel(ChannelIndex, coreID);
+#if (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON)
+                    if (TRUE == Gpt_aChannelInfo[channel].bNotificationEnabled)
+                    {
+                        /*Enable hardware interrupts*/
+                        Gpt_Ipw_EnableInterrupt
+                        (
+                            ((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)
+                        );
+                    }
+                    else
+                    {
+#endif
+                        /* Disable hardware interrupts if the channel is not running in the ONE-SHUT mode.
+                        This is needed because the channel state is updated by ISR for ONE-SHOT mode */
+                        if((GPT_STATUS_RUNNING != Gpt_aChannelInfo[channel].eChannelStatus) || \
+                           (GPT_CH_MODE_CONTINUOUS == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_eChannelMode)
+                          )
+                        {
+                            /*Disable hardware interrupts*/
+                            Gpt_Ipw_DisableInterrupt
+                            (
+                                ((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)
+                            );
+                        }
+#if (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON)
+                    }
+#endif
+                }
+
+                /*Set the driver mode to normal mode*/
+                Gpt_eMode = GPT_MODE_NORMAL;
+            }
+            else
+            {
+                /* This else clause is required due to MISRA rules */
+            }
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        }
+#endif
+
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    }
+#endif
+
+#endif /*GPT_REPORT_WAKEUP_SOURCE*/
+    return;
+}
+#endif
+
+/*================================================================================================*/
+#if (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON)
+/**
+* @brief        GPT driver function for disabling the wakeup interrupt invocation for a timer channel.
+* @details      This service shall disable the wakeup interrupt invocation of a single GPT
+*               channel.
+*               Usage of re-entrant capability is only allowed if the callers take care that
+*               there is no simultaneous usage of the same channel.
+*               The driver needs to be initialized before calling Gpt_DisableWakeup(). Otherwise, the
+*               function Gpt_DisableWakeup shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    channel        channel id
+* @return       void
+* @api
+*
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_DisableWakeup_Activity
+*/
+void Gpt_DisableWakeup(Gpt_ChannelType channel)
+{
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+    uint32 coreID = (uint32)Gpt_GetCoreID();
+    uint8 ChannelIndex;
+#endif
+
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_OFF)
+    (void)channel;
+#endif
+
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_DISABLEWAKEUP_ID, channel, coreID))
+    {
+#endif
+
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        if((Std_ReturnType)E_OK == Gpt_ValidateChannelWakeup(GPT_DISABLEWAKEUP_ID, channel, coreID))
+        {
+#endif
+            ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+            /* Set the enable wakeup attribute */
+            Gpt_aChannelInfo[channel].bWakeupEnabled = FALSE;
+
+            /* Disable hardware interrupts if the channel is not running in the ONE-SHUT mode.
+            This is needed because the channel state is updated by ISR for ONE-SHOT mode */
+            if ((GPT_MODE_SLEEP == Gpt_eMode) && \
+                ((GPT_CH_MODE_CONTINUOUS == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_eChannelMode)
+                 || (GPT_STATUS_RUNNING != Gpt_aChannelInfo[channel].eChannelStatus)
+                )
+               )
+            {
+                /*Disable hardware interrupts*/
+                Gpt_Ipw_DisableInterrupt
+                (
+                    ((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)
+                );
+            }
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        }
+#endif
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+#endif /*GPT_REPORT_WAKEUP_SOURCE*/
+    return;
+}
+#endif
+
+/*================================================================================================*/
+#if (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON)
+/**
+* @brief        GPT driver function for enabling the wakeup interrupt invocation for a timer channel.
+* @details      This service shall re-enable the wakeup interrupt invocation of a single GPT
+*               channel.
+*               If supported by hardware and enabled, an internal hardware timer can serve as a
+*               wakeup source
+*               Usage of re-entrant capability is only allowed if the callers take care that
+*               there is no simultaneous usage of the same channel.
+*
+* @param[in]    channel        channel id
+* @return       void
+* @api
+*
+* @pre          The driver needs to be initialized. The channel must be configured as wakeup capable.
+* @implements   Gpt_EnableWakeup_Activity
+*/
+void Gpt_EnableWakeup(Gpt_ChannelType channel)
+{
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+    uint32 coreID = (uint32)Gpt_GetCoreID();
+    uint8 ChannelIndex;
+#endif
+
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_OFF)
+    (void)channel;
+#endif
+
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_ENABLEWAKEUP_ID, channel, coreID))
+    {
+#endif
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        if((Std_ReturnType)E_OK == Gpt_ValidateChannelWakeup(GPT_ENABLEWAKEUP_ID, channel, coreID))
+        {
+#endif
+            ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+            /* Functionality implementation */
+            /* Set the enable wakeup attribute */
+            Gpt_aChannelInfo[channel].bWakeupEnabled = TRUE;
+
+            if (GPT_MODE_SLEEP == Gpt_eMode)
+            {
+                /*Enable hardware interrupts*/
+                Gpt_Ipw_EnableInterrupt
+                (
+                    ((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig)
+                );
+            }
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        }
+#endif
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+#endif /*GPT_REPORT_WAKEUP_SOURCE*/
+    return;
+}
+#endif
+
+/*================================================================================================*/
+#if (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON)
+
+/**
+* @brief        GPT driver function for checking if a wakeup capable GPT channel is the source for a
+*               wakeup event.
+* @details      Checks if a wakeup capable GPT channel is the source for a wakeup event and calls the ECU
+*               state manager service EcuM_SetWakeupEvent in case of a valid GPT channel wakeup event.
+*               The driver needs to be initialized before calling Gpt_CheckWakeup(). Otherwise, the
+*               function Gpt_CheckWakeup shall raise the development error GPT_E_UNINIT.
+*
+* @param[in]    wakeupSource        wakeup source
+* @return       void
+* @api
+*
+* @pre          The driver needs to be initialized. The channel must be configured as wakeup capable.
+* @implements   Gpt_CheckWakeup_Activity
+*/
+void Gpt_CheckWakeup(EcuM_WakeupSourceType wakeupSource)
+{
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+    uint32 coreID = (uint32)Gpt_GetCoreID();
+#endif
+
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_OFF)
+    (void) wakeupSource;
+#endif
+
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+    Gpt_ChannelType channel;
+    uint32 ChannelIndex;
+
+
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    /*Validate the driver calling context*/
+    if((Std_ReturnType)E_OK == Gpt_ValidateGlobalCall(GPT_CHECKWAKEUP_ID, coreID))
+    {
+#endif
+        for (ChannelIndex = 0U; ChannelIndex < Gpt_pConfig[coreID]->channelCount; ChannelIndex++)
+        {
+                channel = Gpt_ConvertChannelIndexToChannel(ChannelIndex, coreID);
+
+
+                if ((((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_uWakeupSource) == wakeupSource) && \
+                    (TRUE == Gpt_aChannelInfo[channel].bWakeupGenerated)
+                    )
+                {
+                /*Reset the wakeup flag */
+                Gpt_aChannelInfo[channel].bWakeupGenerated = FALSE;
+
+                /* Calling EcuM_SetWakeupEvent and exit*/
+                EcuM_SetWakeupEvent(wakeupSource);
+
+                break;
+                }
+
+        }    /*for*/
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    }
+#endif
+#endif /* GPT_REPORT_WAKEUP_SOURCE */
+    return;
+}
+#endif /* GPT_WAKEUP_FUNCTIONALITY_API */
+
+/*================================================================================================*/
+/**
+* @brief        Gpt common handler to implements generic part of the ISR.
+* @details      Generic function used by all interrupt service routines to call notification
+*               functions  and wakeup the EcuM
+*
+* @param[in]    channel     logic channel number
+* @return       void
+* @pre          The driver needs to be initialized.
+* @implements   Gpt_ProcessCommonInterrupt_Activity
+*/
+void Gpt_ProcessCommonInterrupt(uint8 channel)
+{
+    uint32 coreID;
+    uint8 ChannelIndex;
+
+    coreID = (uint32)Gpt_GetCoreID();
+
+    if (Gpt_pConfig[coreID] != NULL_PTR)
+    {
+        /* Extract the logical channel from the hardware to logic map table */
+        ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+
+        /*Stop the timer for one-shot mode*/
+        if (GPT_CH_MODE_ONESHOT == (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_eChannelMode)
+        {
+            /*Stop channel*/
+            Gpt_Ipw_StopTimer(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig));
+            /* Change the channel status to expired */
+            Gpt_aChannelInfo[channel].eChannelStatus = GPT_STATUS_EXPIRED;
+        }
+#if (GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON)
+        if ((GPT_MODE_NORMAL == Gpt_eMode) && (TRUE == Gpt_aChannelInfo[channel].bNotificationEnabled))
+        {
+            (*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_pfNotification();
+        }
+#endif
+
+#if (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON)
+#if (GPT_REPORT_WAKEUP_SOURCE == STD_ON)
+        if ((GPT_MODE_SLEEP == Gpt_eMode) && (TRUE == Gpt_aChannelInfo[channel].bWakeupEnabled))
+        {
+            Gpt_aChannelInfo[channel].bWakeupGenerated =TRUE;
+            EcuM_CheckWakeup((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_uWakeupSource);
+        }
+#endif
+#endif
+    }
+    return;
+}
+/*================================================================================================*/
+#if (GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
+/**
+* @brief       The function changes the time out period value of the requested running channel.
+* @details     The function changes the time out period (in number of ticks) of the channel is
+*              running which will be used after the first compare matching.
+*              This is a non-autosar function.
+* @param[in]   channel        channel id
+* @param[in]   value          time out period (in number of ticks) after a notification shall occur
+* @return      void
+* @pre         Gpt_Init and Gpt_StartTimer must be called before.
+* @implements
+*/
+void Gpt_ChangeNextTimeoutValue(Gpt_ChannelType channel, Gpt_ValueType value)
+{
+    uint32 coreID;
+    uint8 ChannelIndex;
+
+#if (GPT_DEV_ERROR_DETECT == STD_ON)
+    Std_ReturnType returnValue;
+#endif
+
+    coreID = (uint32)Gpt_GetCoreID();
+
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_CHANGE_NEXT_TIMEOUT_VALUE_ID, channel, coreID))
+    {
+#endif
+        if ((Std_ReturnType)E_OK == Gpt_ValidateChannelStatus(GPT_CHANGE_NEXT_TIMEOUT_VALUE_ID, channel, coreID))
+        {
+#if (GPT_VALIDATE_PARAM  == STD_ON)
+            if ((Std_ReturnType)E_OK == Gpt_ValidateParamValue(GPT_CHANGE_NEXT_TIMEOUT_VALUE_ID, channel, value, coreID))
+            {
+#endif
+            ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+#if (GPT_DEV_ERROR_DETECT == STD_ON)
+                /* Call low level API */
+                returnValue = Gpt_Ipw_ChangeNextTimeoutValue(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig), value);
+
+                if((Std_ReturnType)E_OK != returnValue)
+                {
+                    (void)Det_ReportError\
+                    (\
+                        (uint16)GPT_MODULE_ID,\
+                        (uint8)GPT_INSTANCE_ID,\
+                        (uint8)GPT_CHANGE_NEXT_TIMEOUT_VALUE_ID,\
+                        (uint8)GPT_E_PARAM_CHANNEL\
+                    );
+                }
+#else
+                /* Call low level API */
+                (void)Gpt_Ipw_ChangeNextTimeoutValue(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig), value);
+#endif
+
+#if (GPT_VALIDATE_PARAM  == STD_ON)
+            }
+#endif
+        }
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+    return;
+}
+#endif /* GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON */
+
+/*================================================================================================*/
+#if (GPT_CHAIN_MODE == STD_ON)
+/**
+* @brief     The function enables the chain functionality for timer.
+* @details   The function enables the chain functionality for timer. Timer will be chained with timer n-1.
+             Channel 0 cannot be chained.
+*            This is a non-autosar function.
+* @param[in] channel        channel id
+* @return    void
+* @pre       Gpt_Init must be called before.
+*
+* @implements Gpt_Channel_EnableChainMode_Activity
+*/
+void Gpt_Channel_EnableChainMode(Gpt_ChannelType channel)
+{
+    uint32 coreID;
+    uint8 ChannelIndex;
+
+#if (GPT_DEV_ERROR_DETECT == STD_ON)
+    Std_ReturnType returnValue;
+#endif
+
+    coreID = (uint32)Gpt_GetCoreID();
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_ENABLE_CHAIN_MODE_ID, channel, coreID))
+    {
+#endif
+        if ((Std_ReturnType)E_OK == Gpt_ValidateChannelStatus(GPT_ENABLE_CHAIN_MODE_ID, channel, coreID))
+        {
+            ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+#if (GPT_DEV_ERROR_DETECT == STD_ON)
+            /* Call low level API */
+            returnValue = Gpt_Ipw_EnableChainMode(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig));
+
+            if((Std_ReturnType)E_OK != returnValue)
+            {
+                (void)Det_ReportError\
+                (\
+                    (uint16)GPT_MODULE_ID,\
+                    (uint8)GPT_INSTANCE_ID,\
+                    (uint8)GPT_ENABLE_CHAIN_MODE_ID,\
+                    (uint8)GPT_E_PARAM_CHANNEL\
+                );
+            }
+#else
+            /*Call low level API.*/
+            (void)Gpt_Ipw_EnableChainMode(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig));
+#endif
+        }
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+}
+#endif /*GPT_CHAIN_MODE == STD_ON*/
+/*================================================================================================*/
+#if (GPT_CHAIN_MODE == STD_ON)
+/**
+* @brief     The function disables the chain functionality for timer.
+* @details   The function disables the chain functionality for timer. Timer will not be chained with timer n-1.
+             Channel 0 cannot be chained or unchained.
+*            This is a non-autosar function.
+* @param[in] channel        channel id
+* @return    void
+* @pre       Gpt_Init must be called before.
+*
+* @implements Gpt_Channel_DisableChainMode_Activity
+*/
+void Gpt_Channel_DisableChainMode(Gpt_ChannelType channel)
+{
+    uint32 coreID;
+    uint8 ChannelIndex;
+
+#if (GPT_DEV_ERROR_DETECT == STD_ON)
+    Std_ReturnType returnValue;
+#endif
+
+    coreID = (uint32)Gpt_GetCoreID();
+
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    if((Std_ReturnType)E_OK == Gpt_ValidateChannelCall(GPT_DISABLE_CHAIN_MODE_ID, channel, coreID))
+    {
+#endif
+        if ((Std_ReturnType)E_OK == Gpt_ValidateChannelStatus(GPT_DISABLE_CHAIN_MODE_ID, channel, coreID))
+        {
+            ChannelIndex = (*(Gpt_pConfig[coreID]->u8GptChannelIdToIndexMap))[channel];
+#if (GPT_DEV_ERROR_DETECT == STD_ON)
+            /* Call low level API */
+            returnValue = Gpt_Ipw_DisableChainMode(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig));
+
+            if((Std_ReturnType)E_OK != returnValue)
+            {
+                (void)Det_ReportError\
+                (\
+                    (uint16)GPT_MODULE_ID,\
+                    (uint8)GPT_INSTANCE_ID,\
+                    (uint8)GPT_DISABLE_CHAIN_MODE_ID,\
+                    (uint8)GPT_E_PARAM_CHANNEL\
+                );
+            }
+#else
+            /*Call low level API.*/
+            (void)Gpt_Ipw_DisableChainMode(((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig));
+#endif
+        }
+#if (GPT_VALIDATE_CHANNEL_CALL == STD_ON)
+    }
+#endif
+}
+#endif /*GPT_CHAIN_MODE == STD_ON*/
+/*================================================================================================*/
+#if (GPT_SET_CLOCK_MODE == STD_ON)
+/**
+* @brief     This function changes the channel pre scaler.
+* @details   This function sets all channels pre scalers based on the input mode.
+*
+* @param[in] eClkMode   prescaler setting ( NORMAL or ALTERNATE )
+* @return    void
+* @pre       Gpt_Init must be called before.
+*
+* @implements     Gpt_SetClockMode_Activity
+*/
+void Gpt_SetClockMode(Gpt_ClockModeType eClkMode)
+{
+    uint32 coreID = (uint32)Gpt_GetCoreID();
+    Gpt_ChannelType ChannelIndex;
+
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    Std_ReturnType returnValue;
+
+    returnValue = Gpt_ValidateGlobalCall(GPT_SET_CLOCK_MODE_ID, coreID);
+    if((Std_ReturnType)E_OK == returnValue)
+    {
+#endif
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        if ((Std_ReturnType)E_OK == Gpt_ValidateParamSetClockMode(eClkMode))
+        {
+#endif
+            for (ChannelIndex = 0U; ChannelIndex < Gpt_pConfig[coreID]->instanceCount; ChannelIndex++)
+            {
+                    Gpt_Ipw_SetClockModeInStance
+                    (
+                        (&((*(Gpt_pConfig[coreID]->Gpt_Ipw_HwInstanceConfig))[ChannelIndex])), eClkMode
+                    );
+            }
+
+#if (GPT_HW_CHANNEL_USED == STD_ON)
+            for (ChannelIndex = 0U; ChannelIndex < Gpt_pConfig[coreID]->channelCount; ChannelIndex++)
+            {
+                    Gpt_Ipw_SetClockModeChannel
+                    (
+                        ((*(Gpt_pConfig[coreID]->Gpt_pChannelConfig))[ChannelIndex].Gpt_Ipw_HwChannelConfig),eClkMode
+                    );
+            }
+#endif
+
+#if (GPT_VALIDATE_PARAM  == STD_ON)
+        }
+#endif
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    }
+#endif
+}
+#endif /* GPT_SET_CLOCK_MODE */
+
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+/*================================================================================================*/
+/**
+* @brief     Provides the current value of the given predefined free-running timer
+* @details   This function provides the current value of the given predefined free-running timer.
+*
+* @param[in]  PredefTimer: Gpt_PredefTimerType ( GPT_PREDEF_TIMER_1US_16BIT,
+*                                               GPT_PREDEF_TIMER_1US_24BIT,
+*                                               GPT_PREDEF_TIMER_1US_32BIT
+*                                               GPT_PREDEF_TIMER_100US_32BIT)
+* @param[out] TimeValuePtr: Pointer to time value destination data in RAM
+* @pre        Gpt_Init must be called before.
+* @return     returnValue - E_OK: no error has been detected.
+*                         - E_NOT_OK: aborted due to errors.
+*
+* @implements     Gpt_GetPredefTimerValue_Activity
+*/
+Std_ReturnType Gpt_GetPredefTimerValue
+(
+    Gpt_PredefTimerType PredefTimer,
+    uint32 * TimeValuePtr
+)
+{
+    uint32 coreID;
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+    Gpt_ChannelType channel;
+
+    coreID = (uint32)Gpt_GetCoreID();
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    returnValue = Gpt_ValidateGlobalCall(GPT_GET_PREDEF_TIMERVALUE_ID, coreID);
+    if((Std_ReturnType)E_OK == returnValue)
+    {
+#endif
+#if (GPT_VALIDATE_PARAM == STD_ON)
+        returnValue = Gpt_ValidatePointerGetPredefTimer(TimeValuePtr);
+        if((Std_ReturnType)E_OK == returnValue)
+        {
+            returnValue = Gpt_ValidateParamTypePredefTimer(PredefTimer, coreID);
+            if((Std_ReturnType)E_OK == returnValue)
+            {
+#endif
+
+               returnValue = Gpt_ValidateMode(GPT_GET_PREDEF_TIMERVALUE_ID);
+               if((Std_ReturnType)E_OK ==returnValue)
+               {
+
+                        channel = (Gpt_ChannelType)PredefTimer;
+
+                        Gpt_Ipw_GetPredefTimerValue((Gpt_pConfig[coreID]->Gpt_pChannelPredefConfigType)[channel], PredefTimer, TimeValuePtr);
+
+               }
+               else
+               {
+                   *TimeValuePtr = 0U;
+               }
+
+#if (GPT_VALIDATE_PARAM == STD_ON)
+            }
+            else
+            {
+                *TimeValuePtr = 0U;
+            }
+
+        }
+        else
+        {
+            /* This else clause is required due to MISRA rules */
+        }
+#endif
+#if (GPT_VALIDATE_GLOBAL_CALL == STD_ON)
+    }
+#endif
+    return returnValue;
+}
+#endif
+
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#ifdef __cplusplus
+}
+#endif /* GPT_C */
+/** @} */
+

RTD/src/Gpt_Ipw.c

@@ -0,0 +1,1067 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+/**
+*   @file       Gpt_Ipw.c
+*
+*   @internal
+*   @addtogroup gpt gpt_ipw
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Gpt_Ipw.h"
+#include "StandardTypes.h"
+#include "Mcal.h"
+
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define GPT_IPW_VENDOR_ID_C                    43
+#define GPT_IPW_AR_RELEASE_MAJOR_VERSION_C     4
+#define GPT_IPW_AR_RELEASE_MINOR_VERSION_C     4
+#define GPT_IPW_AR_RELEASE_REVISION_VERSION_C  0
+#define GPT_IPW_SW_MAJOR_VERSION_C             1
+#define GPT_IPW_SW_MINOR_VERSION_C             0
+#define GPT_IPW_SW_PATCH_VERSION_C             0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+#if ( GPT_IPW_VENDOR_ID_C != GPT_IPW_VENDOR_ID)
+    #error "Gpt_Ipw.c and Gpt_Ipw.h have different vendor ids"
+#endif
+/* Check if the header files are of the same Autosar version */
+#if ((GPT_IPW_AR_RELEASE_MAJOR_VERSION_C != GPT_IPW_AR_RELEASE_MAJOR_VERSION) || \
+     (GPT_IPW_AR_RELEASE_MINOR_VERSION_C != GPT_IPW_AR_RELEASE_MINOR_VERSION) || \
+     (GPT_IPW_AR_RELEASE_REVISION_VERSION_C != GPT_IPW_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Gpt_Ipw.c and Gpt_Ipw.h are different"
+#endif
+/* Check if the header files are of the same Software version */
+#if ((GPT_IPW_SW_MAJOR_VERSION_C != GPT_IPW_SW_MAJOR_VERSION) || \
+     (GPT_IPW_SW_MINOR_VERSION_C != GPT_IPW_SW_MINOR_VERSION) || \
+     (GPT_IPW_SW_PATCH_VERSION_C != GPT_IPW_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Gpt_Ipw.c and Gpt_Ipw.h are different"
+#endif
+
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((GPT_IPW_AR_RELEASE_MAJOR_VERSION_C != STD_AR_RELEASE_MAJOR_VERSION) || \
+         (GPT_IPW_AR_RELEASE_MINOR_VERSION_C != STD_AR_RELEASE_MINOR_VERSION))
+    #error "AutoSar Version Numbers of Gpt_Ipw.c and Std_Types.h are different"
+    #endif
+
+    #if ((GPT_IPW_AR_RELEASE_MAJOR_VERSION_C != MCAL_AR_RELEASE_MAJOR_VERSION) || \
+         (GPT_IPW_AR_RELEASE_MINOR_VERSION_C != MCAL_AR_RELEASE_MINOR_VERSION))
+        #error "AutoSar Version Numbers of Mcal.h and Gpt_Ipw.c are different"
+    #endif
+#endif
+/*==================================================================================================
+*                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       LOCAL MACROS
+==================================================================================================*/
+
+#if (FTM_GPT_IP_USED == STD_ON)
+    #define FTM_CNT_MAX_VALUE_U32        ((uint32)0xFFFFuL)
+    #define FTM_OVERFLOW_PAD_U32         ((uint32)1U)
+#endif
+
+/*==================================================================================================
+*                                      LOCAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      LOCAL VARIABLES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      GLOBAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      GLOBAL VARIABLES
+==================================================================================================*/
+
+/*==================================================================================================
+*                                   LOCAL FUNCTION PROTOTYPES
+==================================================================================================*/
+#if (FTM_GPT_IP_USED == STD_ON)
+static inline Gpt_ValueType Gpt_Ipw_FtmGetTimeElapsed(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig, Gpt_HwChannelInfoType * pReturnHwChannelInfo);
+#endif
+#if (SRTC_IP_USED == STD_ON)
+static inline Gpt_ValueType Gpt_Ipw_SrtcGetTimeElapsed(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig, Gpt_HwChannelInfoType * pReturnHwChannelInfo);
+#endif
+#if (LPTMR_GPT_IP_USED == STD_ON)
+static inline Gpt_ValueType Gpt_Ipw_LptmrGetTimeElapsed(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig, Gpt_HwChannelInfoType * pReturnHwChannelInfo);
+#endif
+#if (LPIT_GPT_IP_USED == STD_ON)
+static inline Gpt_ValueType Gpt_Ipw_LpitGetTimeElapsed(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig, Gpt_HwChannelInfoType * pReturnHwChannelInfo);
+#endif
+/*==================================================================================================
+*                                       LOCAL FUNCTIONS
+==================================================================================================*/
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#if (FTM_GPT_IP_USED == STD_ON)
+static inline Gpt_ValueType Gpt_Ipw_FtmGetTimeElapsed(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig,
+                                                      Gpt_HwChannelInfoType * pReturnHwChannelInfo)
+{
+    uint32 returnValue = 0U;
+    uint32 tempValue = 0U;
+    uint32 compareValue = 0U;
+    uint32 counterValue = 0U;
+
+    pReturnHwChannelInfo->uTargetTime = Ftm_Gpt_Ip_u32TargetValue[pHwChannelConfig->instance][pHwChannelConfig->channel];
+
+    /* Read compare and counter registers */
+    counterValue = Ftm_Gpt_Ip_GetCounter(pHwChannelConfig->instance);
+    compareValue = Ftm_Gpt_Ip_GetCompareValue(pHwChannelConfig->instance, pHwChannelConfig->channel);
+
+    /* Calculate the elapsed time */
+    if (counterValue > compareValue)
+    {
+        /* Counter value passed the set-up Target value - might have roll-over */
+        if(((FTM_CNT_MAX_VALUE_U32 - counterValue) + compareValue) <= pReturnHwChannelInfo->uTargetTime)
+        {
+            /* New compare value was read by register read - isr served in time - we have roll-over */
+            returnValue = (pReturnHwChannelInfo->uTargetTime - \
+                            ((FTM_CNT_MAX_VALUE_U32 - counterValue) + compareValue)) + \
+                            FTM_OVERFLOW_PAD_U32;
+        }
+        else
+        {
+            /* There is an delay in serving ISR or updating u32CompareValue - report last timer time */
+            returnValue = pReturnHwChannelInfo->uTargetTime;
+        }
+    }
+    else
+    {
+    /* Timer in between ISRs period */
+    returnValue = pReturnHwChannelInfo->uTargetTime - (compareValue - counterValue);
+    }
+
+    tempValue = Ftm_Gpt_Ip_GetInterruptFlag(pHwChannelConfig->instance, pHwChannelConfig->channel);
+
+    /*Check interrupt status flag*/
+    if (0U != tempValue)
+    {
+        /* Channel counter was roll-over */
+        pReturnHwChannelInfo->bChannelRollover = TRUE;
+    }
+    else
+    {
+        /* Channel counter was not rollover */
+        pReturnHwChannelInfo->bChannelRollover = FALSE;
+    }
+
+
+    return((Gpt_ValueType)returnValue);
+}
+#endif
+
+#if (SRTC_IP_USED == STD_ON)
+static inline Gpt_ValueType Gpt_Ipw_SrtcGetTimeElapsed(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig,
+                                                      Gpt_HwChannelInfoType * pReturnHwChannelInfo)
+{
+    uint32 returnValue = 0U;
+    uint32 tempValue = 0U;    
+    uint32 compareValue = 0U;
+    uint32 counterValue = 0U;
+
+    pReturnHwChannelInfo->uTargetTime = Srtc_Ip_u32TargetValue;
+
+    /* Read Time Seconds Register and Time Alarm Register. Time Alarm was minus one at initial */
+    counterValue = Srtc_Ip_GetTimeSecondsRegister(pHwChannelConfig->instance);
+    compareValue = Srtc_Ip_GetTimeAlarmRegister(pHwChannelConfig->instance) + 1U;
+    /* Calculate the elapsed time */
+    if (counterValue > compareValue)
+    {
+        tempValue = (MAX_32BIT - counterValue) + compareValue + 1U;
+    }
+    else
+    {
+        tempValue = compareValue - counterValue;
+    }
+    if (tempValue > Srtc_Ip_u32TargetValue)
+    {
+        returnValue = Srtc_Ip_u32TargetValue;
+    }
+    else
+    {
+        returnValue = Srtc_Ip_u32TargetValue - tempValue;
+    }
+    tempValue = Srtc_Ip_GetStatusFlags(pHwChannelConfig->instance, SRTC_IP_ALARM_INTERRUPT);
+    /*Check interrupt status flag*/
+    if (0U != tempValue)
+    {
+        /* Channel counter was roll-over */
+        pReturnHwChannelInfo->bChannelRollover = TRUE;
+    }
+    else
+    {
+        /* Channel counter was not rollover */
+        pReturnHwChannelInfo->bChannelRollover = FALSE;
+    }
+    
+    return((Gpt_ValueType)returnValue);
+}
+#endif
+
+#if (LPTMR_GPT_IP_USED == STD_ON)
+static inline Gpt_ValueType Gpt_Ipw_LptmrGetTimeElapsed(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig,
+                                                      Gpt_HwChannelInfoType * pReturnHwChannelInfo)
+{
+    uint32 returnValue = 0U;
+
+    /* Read the LPTMR channel load register */
+    pReturnHwChannelInfo->uTargetTime = Lptmr_Gpt_Ip_GetCompareValue(pHwChannelConfig->instance);
+    /* The Counter Register returns the current value of the LPTMR at the time this register was last written. */
+    Lptmr_Gpt_Ip_WriteCounterValue(pHwChannelConfig->instance, 0U);
+
+    /* Read the LPTMR counter register*/
+    returnValue = Lptmr_Gpt_Ip_GetCntValue(pHwChannelConfig->instance);
+
+    /*Check interrupt status flag*/
+    if (TRUE == Lptmr_Gpt_Ip_GetCmpFlagState(pHwChannelConfig->instance))
+    {
+        /* Channel counter was roll-over */
+        pReturnHwChannelInfo->bChannelRollover = TRUE;
+    }
+    else
+    {
+        /* Channel counter was not roll-over */
+        pReturnHwChannelInfo->bChannelRollover = FALSE;
+    }
+
+    return((Gpt_ValueType)returnValue);
+}
+#endif
+
+#if (LPIT_GPT_IP_USED == STD_ON)
+static inline Gpt_ValueType Gpt_Ipw_LpitGetTimeElapsed(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig,
+                                                      Gpt_HwChannelInfoType * pReturnHwChannelInfo)
+{
+
+    uint32 returnValue = 0U;
+    uint32 tempValue = 0U;
+
+    pReturnHwChannelInfo->uTargetTime = Lpit_Gpt_Ip_GetTimerValue(pHwChannelConfig->instance,pHwChannelConfig->channel);
+    returnValue = (uint32)(pReturnHwChannelInfo->uTargetTime) - Lpit_Gpt_Ip_GetCurrentTimervalue(pHwChannelConfig->instance, pHwChannelConfig->channel);
+
+    /*Check interrupt status flag*/
+    tempValue = (uint32)(Lpit_Gpt_Ip_GetInterruptFlagTimerChannels(pHwChannelConfig->instance,(1U << (pHwChannelConfig->channel))) >> pHwChannelConfig->channel);
+
+    if (0U != tempValue)
+    {
+        /* Channel counter was roll-over */
+        pReturnHwChannelInfo->bChannelRollover = TRUE;
+    }
+    else
+    {
+        /* Channel counter was not roll-over */
+        pReturnHwChannelInfo->bChannelRollover = FALSE;
+    }
+
+    return((Gpt_ValueType)returnValue);
+}
+#endif
+/*==================================================================================================
+*                                       GLOBAL FUNCTIONS
+==================================================================================================*/
+/*================================================================================================*/
+/**
+* @brief        Gpt driver Autosar independent and IP dependent initialization function.
+* @details      This Gpt_Ipw_InitInstances is called once for each channel in the used configuration.
+*               It determines the type of the HW channel and calls the
+*               appropriate IP function in order to initializes the hardware timer.
+* @param[in]    configPtr    Pointer to the channel configuration structure dependent by platform
+*
+* @return       void
+* @pre          The driver needs to be initialized.
+*/
+void Gpt_Ipw_InitInstances(const Gpt_ConfigType * configPtr)
+{
+
+    uint8 index = 0U;
+
+    for(index = 0; index < configPtr->instanceCount; index++)
+    {
+        switch((*(configPtr->Gpt_Ipw_HwInstanceConfig))[index].instanceType)
+        {
+#if (FTM_GPT_IP_USED == STD_ON)
+            case(GPT_FTM_MODULE):
+            {
+                Ftm_Gpt_Ip_Init((*(configPtr->Gpt_Ipw_HwInstanceConfig))[index].instance,
+                                (*(configPtr->Gpt_Ipw_HwInstanceConfig))[index].Gpt_Ipw_InstanceConfig.Ftm_Gpt_Ip_InstanceConfig);
+            }
+            break;
+#endif
+
+#if (SRTC_IP_USED == STD_ON)
+            case(GPT_SRTC_MODULE):
+            {
+                /*Srtc is empty because it shall not be executed for InitInstances */
+            }
+            break;
+#endif
+
+#if (LPTMR_GPT_IP_USED == STD_ON)
+            case(GPT_LPTMR_MODULE):
+            {
+                /*LPtimer is empty because it shall not be executed for InitInstances */
+            }
+            break;
+#endif
+
+#if (LPIT_GPT_IP_USED == STD_ON)
+            case(GPT_LPIT_MODULE):
+            {
+                Lpit_Gpt_Ip_Init((*(configPtr->Gpt_Ipw_HwInstanceConfig))[index].instance,
+                                 (*(configPtr->Gpt_Ipw_HwInstanceConfig))[index].Gpt_Ipw_InstanceConfig.Lpit_Gpt_Ip_InstanceConfig);
+            }
+            break;
+#endif
+
+            default:
+                /*This switch branch is empty because it shall not be executed for normal behaviour*/
+            break;
+        }
+    }
+    return;
+}
+
+/**
+* @brief        Gpt driver Autosar independent and IP dependent initialization function.
+* @details      This function Gpt_Ipw_Init is called once for each channel in the used configuration.
+*               It determines the type of the HW channel and calls the
+*               appropriate IP function in order to initializes the hardware timer.
+* @param[in]    pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return       void
+* @pre          The driver needs to be initialized.
+*/
+void Gpt_Ipw_Init(const Gpt_Ipw_HwChannelConfigType *pHwChannelConfig)
+{
+
+    switch(pHwChannelConfig->instanceType)
+    {
+#if (FTM_GPT_IP_USED == STD_ON)
+        case(GPT_FTM_MODULE):
+        {
+            Ftm_Gpt_Ip_InitChannel(pHwChannelConfig->instance,
+                                   pHwChannelConfig->Gpt_Ipw_ChannelConfig.Ftm_Gpt_Ip_ChannelConfig);
+        }
+        break;
+#endif
+
+#if (SRTC_IP_USED == STD_ON)
+        case(GPT_SRTC_MODULE):
+        {
+            Srtc_Ip_Init(pHwChannelConfig->instance,
+                         pHwChannelConfig->Gpt_Ipw_ChannelConfig.Srtc_Ip_ChannelConfig);
+        }
+        break;
+#endif
+
+#if (LPTMR_GPT_IP_USED == STD_ON)
+        case(GPT_LPTMR_MODULE):
+        {
+            Lptmr_Gpt_Ip_Init(pHwChannelConfig->instance,
+                              pHwChannelConfig->Gpt_Ipw_ChannelConfig.Lptmr_Gpt_Ip_ChannelConfig);
+        }
+        break;
+#endif
+
+#if (LPIT_GPT_IP_USED == STD_ON)
+        case(GPT_LPIT_MODULE):
+        {
+             Lpit_Gpt_Ip_InitChannel(pHwChannelConfig->instance,
+                                     pHwChannelConfig->Gpt_Ipw_ChannelConfig.Lpit_Gpt_Ip_ChannelConfig);
+        }
+            break;
+#endif
+        default:
+            /* This switch branch is empty because it shall not be executed for normal behaviour */
+        break;
+    }
+    return;
+}
+/*================================================================================================*/
+/**
+* @brief         Gpt driver Autosar independent and platform dependent function for starting the timer channel.
+* @details       It checks the type of the HW module and calls the appropriate
+*                IP function for starting the timer channel.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @param[in]     uValue              Timeout period (in ticks) after which a notification shall occur (if enabled).
+* @return        void
+* @pre           The driver needs to be initialized.Call Gpt_StartTimer before.
+*/
+Std_ReturnType Gpt_Ipw_StartTimer(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig, Gpt_ValueType uValue)
+{
+
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+
+    switch(pHwChannelConfig->instanceType)
+    {
+#if (FTM_GPT_IP_USED == STD_ON)
+        case(GPT_FTM_MODULE):
+            {
+                Ftm_Gpt_Ip_StartCounting(pHwChannelConfig->instance,
+                                         pHwChannelConfig->channel,
+                                         (uint16)uValue);
+                returnValue = (Std_ReturnType)E_OK;
+            }
+        break;
+#endif
+#if (SRTC_IP_USED == STD_ON)
+        case(GPT_SRTC_MODULE):
+            {
+                Srtc_Ip_StartTimer(pHwChannelConfig->instance,
+                                   uValue);
+                returnValue = (Std_ReturnType)E_OK;
+            }
+        break;
+#endif
+
+#if (LPTMR_GPT_IP_USED == STD_ON)
+        case(GPT_LPTMR_MODULE):
+            {
+                Lptmr_Gpt_Ip_StartTimer(pHwChannelConfig->instance,
+                                        (uint16)uValue);
+                returnValue = (Std_ReturnType)E_OK;
+            }
+        break;
+#endif
+
+#if (LPIT_GPT_IP_USED == STD_ON)
+            case(GPT_LPIT_MODULE):
+            {
+                Lpit_Gpt_Ip_StartTimer(pHwChannelConfig->instance,
+                                       pHwChannelConfig->channel,
+                                         uValue);
+                returnValue = (Std_ReturnType)E_OK;
+            }
+            break;
+#endif
+        default:
+            /*This switch branch is empty because it shall not be executed for normal behaviour */
+        break;
+    }
+
+    return returnValue;
+}
+
+/*================================================================================================*/
+/**
+* @brief         Gpt driver Autosar independent and IP dependent function for fetching the elapsed timer value.
+* @details       It determines the type of the HW channel and calls the
+*                appropriate IP function for reading the elapsed timer value from the HW.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @param[in]     uTargetTime         Target time value
+* @param[out]    pbReturnChannelOverflow  Rollover status flag value of the hardware timer channel
+* @return        returnValue         The elapsed time
+* @pre           The driver needs to be initialized.Call GetTimeElapsed before.
+*
+*/
+Gpt_ValueType Gpt_Ipw_GetTimeElapsed(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig,
+                                                      Gpt_HwChannelInfoType * pReturnHwChannelInfo)
+{
+    uint32 returnValue = 0U;
+
+switch(pHwChannelConfig->instanceType)
+{
+#if (FTM_GPT_IP_USED == STD_ON)
+    case(GPT_FTM_MODULE):
+    {
+        returnValue = Gpt_Ipw_FtmGetTimeElapsed(pHwChannelConfig, pReturnHwChannelInfo);
+    }
+    break;
+#endif
+
+#if (SRTC_IP_USED == STD_ON)
+    case(GPT_SRTC_MODULE):
+    {
+        returnValue = Gpt_Ipw_SrtcGetTimeElapsed(pHwChannelConfig, pReturnHwChannelInfo);
+    }
+    break;
+#endif
+#if (LPTMR_GPT_IP_USED == STD_ON)
+    case(GPT_LPTMR_MODULE):
+    {
+        returnValue = Gpt_Ipw_LptmrGetTimeElapsed(pHwChannelConfig, pReturnHwChannelInfo);
+    }
+    break;
+#endif
+
+#if (LPIT_GPT_IP_USED == STD_ON)
+    case(GPT_LPIT_MODULE):
+    {
+        returnValue = Gpt_Ipw_LpitGetTimeElapsed(pHwChannelConfig, pReturnHwChannelInfo);
+    }
+    break;
+#endif
+
+    default:
+         /*This switch branch is empty because it shall not be executed for normal behaviour*/
+    break;
+}
+    return((Gpt_ValueType)returnValue);
+}
+
+/*================================================================================================*/
+/**
+* @brief         Gpt driver Autosar independent and platform dependent function for stopping the timer channel.
+* @details       It checks the type of the HW module and calls the appropriate
+*                IP function for stopping the timer channel.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return        void
+* @pre           The driver needs to be initialized.Call StopTimer before.
+*/
+void Gpt_Ipw_StopTimer(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig)
+{
+    switch(pHwChannelConfig->instanceType)
+    {
+#if (FTM_GPT_IP_USED == STD_ON)
+        case(GPT_FTM_MODULE):
+        {
+
+            Ftm_Gpt_Ip_DisableChannelInterrupt(pHwChannelConfig->instance,
+                                               pHwChannelConfig->channel);
+        }
+        break;
+#endif
+#if (SRTC_IP_USED == STD_ON)
+        case(GPT_SRTC_MODULE):
+        {
+            /* Stop counter */
+            (void)Srtc_Ip_StopCounter(pHwChannelConfig->instance);
+        }
+        break;
+#endif
+#if (LPTMR_GPT_IP_USED == STD_ON)
+        case(GPT_LPTMR_MODULE):
+        {
+            Lptmr_Gpt_Ip_StopTimer(pHwChannelConfig->instance);
+        }
+        break;
+#endif
+#if (LPIT_GPT_IP_USED == STD_ON)
+        case(GPT_LPIT_MODULE):
+        {
+            Lpit_Gpt_Ip_StopTimer(pHwChannelConfig->instance,
+                                   pHwChannelConfig->channel);
+        }
+            break;
+#endif
+        default:
+            /*This switch branch is empty because it shall not be executed for normal behaviour*/
+        break;
+    }
+
+    return;
+}
+
+/*================================================================================================*/
+/**
+* @brief         Gpt driver Autosar independent and platform dependent function for enabling hardware timer interrupts.
+* @details       It checks the type of the HW module and calls the appropriate
+*                IP function for enabling hardware timer interrupts.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return        void
+* @pre           The driver needs to be initialized.
+*/
+void Gpt_Ipw_EnableInterrupt(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig)
+{
+    switch(pHwChannelConfig->instanceType)
+    {
+#if (FTM_GPT_IP_USED == STD_ON)
+        case(GPT_FTM_MODULE):
+        {
+            /* For a FTM enabled channel the interrupts are always activated */
+        }
+        break;
+#endif
+#if (SRTC_IP_USED == STD_ON)
+        case(GPT_SRTC_MODULE):
+        {
+            Srtc_Ip_EnableInterrupt(pHwChannelConfig->instance, SRTC_IP_ALARM_INTERRUPT);
+        }
+        break;
+#endif
+#if (LPTMR_GPT_IP_USED == STD_ON)
+        case(GPT_LPTMR_MODULE):
+        {
+            Lptmr_Gpt_Ip_EnableInterrupt(pHwChannelConfig->instance);
+        }
+        break;
+#endif
+#if (LPIT_GPT_IP_USED == STD_ON)
+        case(GPT_LPIT_MODULE):
+        {
+            Lpit_Gpt_Ip_EnableChInterrupt(pHwChannelConfig->instance, pHwChannelConfig->channel);
+        }
+        break;
+#endif
+        default:
+            /*This switch branch is empty because it shall not be executed for normal behaviour*/
+        break;
+    }
+
+    return;
+}
+
+/*================================================================================================*/
+#if (GPT_DEINIT_API == STD_ON)
+/**
+* @brief         Gpt driver Autosar independent and IP dependent de-initialization function.
+* @details       This function is called for each  channel from the current configuration.
+*                It determines the type of the HW channel and calls the
+*                appropriate IP function in order to de-initializes the hardware timer.
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return        void
+* @pre           The driver needs to be initialized. On/Off by the configuration parameter: GPT_DEINIT_API
+*/
+void Gpt_Ipw_DeInit(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig)
+{
+    switch(pHwChannelConfig->instanceType)
+    {
+#if (FTM_GPT_IP_USED == STD_ON)
+        case(GPT_FTM_MODULE):
+        {
+           Ftm_Gpt_Ip_Deinit(pHwChannelConfig->instance);
+        }
+        break;
+#endif
+#if (SRTC_IP_USED == STD_ON)
+        case(GPT_SRTC_MODULE):
+        {
+            Srtc_Ip_DeInit(pHwChannelConfig->instance);
+        }
+        break;
+#endif
+#if (LPTMR_GPT_IP_USED == STD_ON)
+        case(GPT_LPTMR_MODULE):
+        {
+            Lptmr_Gpt_Ip_DeInit(pHwChannelConfig->instance);
+        }
+        break;
+#endif
+#if (LPIT_GPT_IP_USED == STD_ON)
+        case(GPT_LPIT_MODULE):
+        {
+            Lpit_Gpt_Ip_Deinit(pHwChannelConfig->instance);
+        }
+        break;
+#endif
+        default:
+            /*This switch branch is empty because it shall not be executed for normal behaviour*/
+        break;
+    }
+    return;
+}
+
+#endif
+/*================================================================================================*/
+#if ((GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON) || (GPT_WAKEUP_FUNCTIONALITY_API == STD_ON))
+/**
+* @brief         Gpt driver Autosar independent and platform dependent function for disabling hardware timer interrupts.
+* @details       It checks the type of the HW module and calls the appropriate
+*                IP function for disabling hardware timer interrupts.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return        void
+* @pre           The driver needs to be initialized.On/Off by the configuration parameter: GPT_ENABLE_DISABLE_NOTIFICATION_API
+*/
+void Gpt_Ipw_DisableInterrupt(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig)
+{
+    switch(pHwChannelConfig->instanceType)
+    {
+#if (FTM_GPT_IP_USED == STD_ON)
+        case(GPT_FTM_MODULE):
+        {
+            /* For a FTM enabled channel the interrupts are always activated */
+        }
+        break;
+#endif
+#if (SRTC_IP_USED == STD_ON)
+        case(GPT_SRTC_MODULE):
+        {
+            Srtc_Ip_DisableInterrupt(pHwChannelConfig->instance, SRTC_IP_ALARM_INTERRUPT);
+        }
+        break;
+#endif
+#if (LPTMR_GPT_IP_USED == STD_ON)
+        case(GPT_LPTMR_MODULE):
+        {
+            Lptmr_Gpt_Ip_DisableInterrupt(pHwChannelConfig->instance);
+        }
+        break;
+#endif
+#if (LPIT_GPT_IP_USED == STD_ON)
+        case(GPT_LPIT_MODULE):
+        {
+            Lpit_Gpt_Ip_DisableChInterrupt(pHwChannelConfig->instance, pHwChannelConfig->channel);
+        }
+        break;
+#endif
+        default:
+            /*This switch branch is empty because it shall not be executed for normal behaviour*/
+        break;
+    }
+
+    return;
+}
+#endif
+/*================================================================================================*/
+
+#if (GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
+/**
+* @brief        Gpt driver Autosar independent and IP dependent function to change compare register value.
+* @details      This function:
+*                - Write next timeout to local variable
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent
+*                                       by platform
+* @param[in]     value               New Timeout period (in ticks) after which a notification
+*                                       shall occur (if enabled).
+* @return        void
+* @pre           The driver needs to be initialized.On/Off by the configuration parameter: GPT_CHANGE_NEXT_TIMEOUT_VALUE
+*
+*/
+
+Std_ReturnType Gpt_Ipw_ChangeNextTimeoutValue(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig,
+                                                               Gpt_ValueType value)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+
+    switch(pHwChannelConfig->instanceType)
+    {
+#if (FTM_GPT_IP_USED == STD_ON)
+        case (GPT_FTM_MODULE):
+        {
+             Ftm_Gpt_Ip_ChangeNextTimeoutValue( pHwChannelConfig->instance,
+                                                pHwChannelConfig->channel, (uint16)value);
+             returnValue =(Std_ReturnType)E_OK;
+
+        }
+        break;
+#endif
+        default:
+            /*This switch branch is empty because it shall not be executed for normal behaviour */
+        break;
+    }
+
+    return returnValue;
+}
+#endif /* GPT_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON */
+/*================================================================================================*/
+/**
+* @brief         Gpt driver Autosar independent and IP dependent function to change eMios compare register value.
+* @details       Calls the eMios function to change the eMios compare register value at the next match.
+*
+* @param[in]     pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @param[in]     clkMode             Clock mode for configuration channel
+*
+* @return        void
+* @pre           The driver needs to be initialized.On/Off by the configuration parameter: GPT_SET_CLOCK_MODE
+*/
+#if (GPT_SET_CLOCK_MODE == STD_ON)
+void Gpt_Ipw_SetClockModeInStance(const Gpt_Ipw_HwInstanceConfigType * pHwInstanceConfig,
+                                            Gpt_ClockModeType clkMode)
+{
+    switch(pHwInstanceConfig->instanceType)
+    {
+#if (FTM_GPT_IP_USED == STD_ON)
+        case (GPT_FTM_MODULE):
+        {
+            if(GPT_CLOCKMODE_NORMAL == clkMode)
+            {
+                Ftm_Gpt_Ip_SetClockMode(pHwInstanceConfig->instance, FTM_GPT_IP_CLOCKMODE_NORMAL);
+            }
+            else
+            {
+                Ftm_Gpt_Ip_SetClockMode(pHwInstanceConfig->instance, FTM_GPT_IP_CLOCKMODE_ALTERNATE);
+            }
+        }
+        break;
+#endif
+
+#if (LPTMR_GPT_IP_USED == STD_ON)
+        case (GPT_LPTMR_MODULE):
+        {
+            if(GPT_CLOCKMODE_NORMAL == clkMode)
+            {
+                Lptmr_Gpt_Ip_SetClockMode(pHwInstanceConfig->instance, LPTMR_GPT_IP_CLOCKMODE_NORMAL);
+            }
+            else
+            {
+                Lptmr_Gpt_Ip_SetClockMode(pHwInstanceConfig->instance, LPTMR_GPT_IP_CLOCKMODE_ALTERNATE);
+            }
+        }
+        break;
+#endif
+
+        default:
+            /*This switch branch is empty because it shall not be executed for normal behaviour*/
+        break;
+    }
+}
+#endif /* GPT_SET_CLOCK_MODE == STD_ON */
+/*================================================================================================*/
+#if(GPT_CHAIN_MODE == STD_ON)
+/**
+* @brief         The function Gpt_Ipw_EnableChainMode.
+* @details       This function:
+*               - Chain the timer.
+*
+* @param[in]     pHwChannelConfig        Pointer to the channel configuration structure dependent by platform
+* @return        returnValue
+* @pre           The driver needs to be initialized. CHAIN_MODE == STD_ON
+*/
+Std_ReturnType Gpt_Ipw_EnableChainMode(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+
+    switch(pHwChannelConfig->instanceType)
+    {
+#if (LPIT_GPT_IP_USED == STD_ON)
+        case (GPT_LPIT_MODULE):
+        {
+            returnValue = (Std_ReturnType)Lpit_Gpt_Ip_ChainMode(pHwChannelConfig->instance, pHwChannelConfig->channel, TRUE);
+        }
+        break;
+#endif
+        default:
+            /*This switch branch is empty because it shall not be executed for normal behaviour*/
+        break;
+    }
+
+    return returnValue;
+}
+#endif /*(GPT_CHAIN_MODE == STD_ON)*/
+/*================================================================================================*/
+#if(GPT_CHAIN_MODE == STD_ON)
+/**
+* @brief         The function Gpt_Ipw_DisableChainMode.
+* @details       This function:
+*               - Chain the timer.
+*
+* @param[in]     pHwChannelConfig        Pointer to the channel configuration structure dependent by platform
+* @return        returnValue
+* @pre           The driver needs to be initialized. CHAIN_MODE == STD_ON
+*/
+Std_ReturnType Gpt_Ipw_DisableChainMode(const Gpt_Ipw_HwChannelConfigType * pHwChannelConfig)
+{
+    Std_ReturnType returnValue = (Std_ReturnType)E_NOT_OK;
+
+    switch(pHwChannelConfig->instanceType)
+    {
+#if (LPIT_GPT_IP_USED == STD_ON)
+        case (GPT_LPIT_MODULE):
+        {
+            returnValue = (Std_ReturnType)Lpit_Gpt_Ip_ChainMode(pHwChannelConfig->instance, pHwChannelConfig->channel, FALSE);
+        }
+        break;
+#endif
+        default:
+            /*This switch branch is empty because it shall not be executed for normal behaviour*/
+        break;
+    }
+    return returnValue;
+}
+#endif /*(GPT_CHAIN_MODE == STD_ON)*/
+/*================================================================================================*/
+#if(GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON)
+/**
+* @brief        Gpt driver Autosar start predeftimer hw.
+* @details      This function to start channel, which using predeftimer feature in the used configuration.
+*               It determines the type of the HW channel and calls the
+*               appropriate IP function in order to initializes the hardware timer.
+* @param[in]    pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return       void
+* @pre          The driver needs to be initialized. On/Off GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON
+*/
+
+void Gpt_Ipw_StartPredefTimer
+(
+    const Gpt_ConfigType * configPtr
+)
+{
+    Gpt_ChannelType channel;
+    const Gpt_HwPredefChannelConfigType * pHwChannelConfig;
+
+    for(channel = 0U; channel < GPT_HW_PREDEFTIMER_NUM; channel++)
+    {
+        pHwChannelConfig = (configPtr->Gpt_pChannelPredefConfigType)[channel];
+
+        if(NULL_PTR != pHwChannelConfig)
+        {
+            switch(pHwChannelConfig->instanceType)
+            {
+#if (FTM_GPT_IP_USED == STD_ON)
+            case GPT_FTM_MODULE:
+            {
+                Ftm_Gpt_Ip_StartPredefTimer(pHwChannelConfig->instance, \
+                                            pHwChannelConfig->channel, \
+                                            pHwChannelConfig->Gpt_uPrescaler, \
+                                            pHwChannelConfig->Gpt_uClockSource, \
+                                            pHwChannelConfig->Gpt_bFreezeEnable);
+            }
+            break;
+#endif
+            default:
+                /*This switch branch is empty because it shall not be executed for normal behaviour*/
+            break;
+            }
+        }
+    }
+
+    return;
+}
+
+/**
+* @brief        Gpt driver Autosar get value of predeftimer hw.
+* @details      This function to start channel, which using predeftimer feature in the used configuration.
+*               It determines the type of the HW channel and calls the
+*               appropriate IP function in order to initializes the hardware timer.
+* @param[in]    pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @param[in]    TimeValuePtr        The pointer using for save current value of hardware channel
+* @param[in]    PredefTimer         Gpt_PredefTimerType
+* @return       void
+* @pre          The driver needs to be initialized. On/Off GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON
+*/
+void Gpt_Ipw_GetPredefTimerValue
+(
+    const Gpt_HwPredefChannelConfigType * pHwChannelConfig,
+    Gpt_PredefTimerType PredefTimer,
+    uint32 * TimeValuePtr
+)
+{
+    uint32 u32ReturnValue = 0U;
+    switch(pHwChannelConfig->instanceType)
+    {
+#if (FTM_GPT_IP_USED == STD_ON)
+        case GPT_FTM_MODULE:
+        {
+            u32ReturnValue = Ftm_Gpt_Ip_GetCounter(pHwChannelConfig->instance);
+        }
+        break;
+#endif
+        default:
+            /*This switch branch is empty because it shall not be executed for normal behaviour*/
+        break;
+    }
+    if(0U != u32ReturnValue)
+    {
+        switch(PredefTimer)
+        {
+            case GPT_PREDEF_TIMER_1US_16BIT:
+                *TimeValuePtr = (0x0000FFFFU & u32ReturnValue);
+            break;
+            case GPT_PREDEF_TIMER_1US_24BIT:
+                *TimeValuePtr = (0x00FFFFFFU & u32ReturnValue);
+            break;
+            case GPT_PREDEF_TIMER_1US_32BIT:
+                *TimeValuePtr = u32ReturnValue;
+            break;
+            case GPT_PREDEF_TIMER_100US_32BIT:
+                *TimeValuePtr = u32ReturnValue;
+            break;
+            default:
+                /* 32bit timer */
+            break;
+        }
+    }
+    return;
+}
+
+/**
+* @brief        Gpt driver Autosar stop predeftimer hw.
+* @details      This function to start channel, which using predeftimer feature in the used configuration.
+*               It determines the type of the HW channel and calls the
+*               appropriate IP function in order to initializes the hardware timer.
+* @param[in]    pHwChannelConfig    Pointer to the channel configuration structure dependent by platform
+* @return       void
+* @pre          The driver needs to be initialized. GPT_PREDEFTIMER_FUNCTIONALITY_API == STD_ON
+*/
+void Gpt_Ipw_StopPredefTimer
+(
+    const Gpt_ConfigType * configPtr
+)
+{
+    Gpt_ChannelType channel;
+    const Gpt_HwPredefChannelConfigType * pHwChannelConfig;
+
+    for(channel = 0U; channel < GPT_HW_PREDEFTIMER_NUM; channel++)
+    {
+
+        pHwChannelConfig = (configPtr->Gpt_pChannelPredefConfigType)[channel];
+        if(NULL_PTR != pHwChannelConfig)
+        {
+            switch(pHwChannelConfig->instanceType)
+            {
+#if (FTM_GPT_IP_USED == STD_ON)
+            case GPT_FTM_MODULE:
+            {
+                Ftm_Gpt_Ip_StopPredefTimer(pHwChannelConfig->instance, \
+                                           pHwChannelConfig->channel);
+            }
+            break;
+#endif
+            default:
+                /*This switch branch is empty because it shall not be executed for normal behaviour*/
+            break;
+            }
+        }
+    }
+    return;
+}
+#endif
+
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#ifdef __cplusplus
+}
+/** @} */
+#endif/*GPT_IPW_C*/
+
+

RTD/src/LPit_Gpt_Ip.c

@@ -0,0 +1,888 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+/**
+*   @file       LPit_Gpt_Ip.c
+*
+*   @addtogroup lpit_ip LPit IPL
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "LPit_Gpt_Ip.h"
+
+#ifdef LPIT_GPT_IP_ENABLE_USER_MODE_SUPPORT
+   #define USER_MODE_REG_PROT_ENABLED   LPIT_GPT_IP_ENABLE_USER_MODE_SUPPORT
+   #include "RegLockMacros.h"
+#endif
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+#define LPIT_GPT_IP_VENDOR_ID_C                    43
+#define LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION_C     4
+#define LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION_C     4
+#define LPIT_GPT_IP_AR_RELEASE_REVISION_VERSION_C  0
+#define LPIT_GPT_IP_SW_MAJOR_VERSION_C             1
+#define LPIT_GPT_IP_SW_MINOR_VERSION_C             0
+#define LPIT_GPT_IP_SW_PATCH_VERSION_C             0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+#if (LPIT_GPT_IP_VENDOR_ID != LPIT_GPT_IP_VENDOR_ID_C)
+    #error "LPit_Ip.h and LPit_Ip.c have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION != LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION_C) || \
+     (LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION != LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION_C) || \
+     (LPIT_GPT_IP_AR_RELEASE_REVISION_VERSION != LPIT_GPT_IP_AR_RELEASE_REVISION_VERSION_C) \
+    )
+    #error "AutoSar Version Numbers of LPit_Gpt_Ip.h and LPit_Gpt_Ip.c are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((LPIT_GPT_IP_SW_MAJOR_VERSION != LPIT_GPT_IP_SW_MAJOR_VERSION_C) || \
+     (LPIT_GPT_IP_SW_MINOR_VERSION != LPIT_GPT_IP_SW_MINOR_VERSION_C) || \
+     (LPIT_GPT_IP_SW_PATCH_VERSION != LPIT_GPT_IP_SW_PATCH_VERSION_C) \
+    )
+    #error "Software Version Numbers of LPit_Gpt_Ip.h and LPit_Gpt_Ip.c are different"
+#endif
+
+#ifdef LPIT_GPT_IP_ENABLE_USER_MODE_SUPPORT
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((REGLOCKMACROS_AR_RELEASE_MAJOR_VERSION != LPIT_GPT_IP_AR_RELEASE_MAJOR_VERSION_C) || \
+         (REGLOCKMACROS_AR_RELEASE_MINOR_VERSION != LPIT_GPT_IP_AR_RELEASE_MINOR_VERSION_C))
+        #error "AutoSar Version Numbers of RegLockMacros.h and LPit_Gpt_Ip.c are different"
+    #endif
+#endif
+#endif
+/*==================================================================================================
+*                         LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
+==================================================================================================*/
+
+/*=================================================================================================
+*                                       LOCAL MACROS
+=================================================================================================*/
+
+/*==================================================================================================
+*                                      LOCAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      LOCAL VARIABLES
+==================================================================================================*/
+#if (LPIT_GPT_IP_USED == STD_ON)
+#if ((defined LPIT_0_ISR_USED)||(defined LPIT_0_CH_0_ISR_USED)||(defined LPIT_0_CH_1_ISR_USED)||(defined LPIT_0_CH_2_ISR_USED)||(defined LPIT_0_CH_3_ISR_USED))
+static Lpit_Gpt_Ip_State Lpit_Gpt_Ip_u32ChState[LPIT_INSTANCE_COUNT][LPIT_TMR_COUNT] =  {
+                                                                                            {
+                                                                                                {
+                                                                                                    (boolean)FALSE,
+                                                                                                    NULL_PTR,
+                                                                                                    0U
+                                                                                                }
+                                                                                            }
+                                                                                        };
+#endif
+/*==================================================================================================
+*                                      GLOBAL CONSTANTS
+==================================================================================================*/
+
+
+/*==================================================================================================
+*                                      GLOBAL VARIABLES
+==================================================================================================*/
+#define GPT_START_SEC_CONST_UNSPECIFIED
+#include "Gpt_MemMap.h"
+/** @brief Table of base addresses for PIT instances. */
+LPIT_Type * const LPitGptBase[LPIT_INSTANCE_COUNT] = IP_LPIT_BASE_PTRS;
+#define GPT_STOP_SEC_CONST_UNSPECIFIED
+#include "Gpt_MemMap.h"
+
+#if ((defined LPIT_0_ISR_USED)||(defined LPIT_0_CH_0_ISR_USED)||(defined LPIT_0_CH_1_ISR_USED)||(defined LPIT_0_CH_2_ISR_USED)||(defined LPIT_0_CH_3_ISR_USED))
+static void Lpit_Gpt_Ip_ProcessCommonInterrupt(uint8 instance, uint8 channel);
+#endif
+
+#if (defined (LPIT_GPT_IP_MODULE_SINGLE_INTERRUPT) && (STD_ON == LPIT_GPT_IP_MODULE_SINGLE_INTERRUPT))
+#ifdef LPIT_0_ISR_USED
+ISR(LPIT_0_ISR);
+#endif
+#else
+#ifdef LPIT_0_CH_0_ISR_USED
+ISR(LPIT_0_CH_0_ISR);
+#endif
+#ifdef LPIT_0_CH_1_ISR_USED
+ISR(LPIT_0_CH_1_ISR);
+#endif
+#ifdef LPIT_0_CH_2_ISR_USED
+ISR(LPIT_0_CH_2_ISR);
+#endif
+#ifdef LPIT_0_CH_3_ISR_USED
+ISR(LPIT_0_CH_3_ISR);
+#endif
+#endif /*LPIT_GPT_IP_MODULE_SINGLE_INTERRUPT == STD_ON*/
+
+static inline void Lpit_Gpt_Ip_EnableMdlClk(uint8 instance, boolean enable);
+static inline void Lpit_Gpt_Ip_TimerEnable(uint8 instance, uint8 channel, boolean enable);
+#if (LPIT_GPT_IP_ENABLE_EXT_TRIGGERS == STD_ON)
+static inline void Lpit_Gpt_Ip_SetTrigger(uint8 instance, uint8 channel, uint32 value);
+#endif
+static inline void Lpit_Gpt_Ip_SetMode(uint8 instance, uint8 channel, uint32 mode);
+static inline void Lpit_Gpt_Ip_SetCmpValue(uint8 instance, uint8 channel, uint32 value);
+static inline void Lpit_Gpt_Ip_SetDebugMode(uint8 instance, boolean stopRun);
+static inline void Lpit_Gpt_Ip_SetDozeMode(uint8 instance, boolean running);
+static inline void Lpit_Gpt_Ip_InterruptTimerChannels(uint8 instance, uint8 channel, boolean enable);
+static inline void Lpit_Gpt_Ip_ClearInterruptFlagTimerChannels(uint8 instance, uint8 channel);
+#if (LPIT_GPT_IP_CHAIN_MODE == STD_ON)
+static inline void Lpit_Gpt_Ip_SetChainMode(uint8 instance, uint8 channel, boolean enable);
+#endif
+/*==================================================================================================
+*                                  LOCAL FUNCTION PROTOTYPES
+==================================================================================================*/
+/**
+* @brief
+* Function Name : Lpit_Gpt_Ip_EnableMdlClk
+* Description   : Enable hardware module clock (Module Clock Enable)
+*
+* @param[in]     instance       LPit hardware instance number
+* @param[in]     enable         (TRUE/FALSE)
+*
+* @return        void
+*
+*/
+static inline void Lpit_Gpt_Ip_EnableMdlClk(uint8 instance, boolean enable)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_50();
+    if (TRUE == enable)
+    {
+        LPitGptBase[instance]->MCR  |= LPIT_MCR_M_CEN_MASK;
+    }
+    else
+    {
+        LPitGptBase[instance]->MCR  &= (~(LPIT_MCR_M_CEN_MASK));
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_50();
+}
+
+/**
+* @brief
+* Function Name : Lpit_Gpt_Ip_TimerEnable
+* Description   : Enable Timer Enable (T_EN)
+*
+* @param[in]     instance       LPit hardware instance number
+* @param[in]     channel        LPit hardware channel number
+* @param[in]     enable         (TRUE/FALSE)
+*
+* @return        void
+*
+*/
+static inline void Lpit_Gpt_Ip_TimerEnable(uint8 instance, uint8 channel, boolean enable)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_51();
+    if (TRUE == enable)
+    {
+        LPitGptBase[instance]->TMR[channel].TCTRL  |= LPIT_TMR_TCTRL_T_EN_MASK;
+    }
+    else
+    {
+        LPitGptBase[instance]->TMR[channel].TCTRL  &= (~(LPIT_TMR_TCTRL_T_EN_MASK));
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_51();
+}
+
+#if (LPIT_GPT_IP_ENABLE_EXT_TRIGGERS == STD_ON)
+/**
+* @brief
+* Function Name : Lpit_Gpt_Ip_SetTrigger
+* Description   : Set trigger (TCTRL)
+*
+* @param[in]     instance       LPit hardware instance number
+* @param[in]     channel
+* @param[in]     value
+*
+* @return        void
+*
+*/
+static inline void Lpit_Gpt_Ip_SetTrigger(uint8 instance, uint8 channel, uint32 value)
+{
+    LPitGptBase[instance]-> TMR[channel].TCTRL = value;
+}
+#endif
+
+/**
+* @brief
+* Function Name : Lpit_Gpt_Ip_SetMode
+* Description   : Configures the channel timer's mode of operation. The MODE bits control how the timer decrements
+* @param[in]    : Set mode
+*                               - 00b - 32-bit Periodic Counter
+*                               - 01b - Dual 16-bit Periodic Counter
+*                               - 10b - 32-bit Trigger Accumulator
+*                               - 11b - 32-bit Trigger Input Capture
+* @param[in]     instance       LPit hardware instance number
+*
+* @return        void
+*
+*/
+static inline void Lpit_Gpt_Ip_SetMode(uint8 instance, uint8 channel, uint32 mode)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_52();
+    LPitGptBase[instance]->TMR[channel].TCTRL = (LPitGptBase[instance]->TMR[channel].TCTRL & ~LPIT_TMR_TCTRL_MODE_MASK) | LPIT_TMR_TCTRL_MODE(mode);
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_52();
+}
+
+
+/**
+* @brief
+* Function Name : Lpit_Gpt_Ip_SetCmpValue
+* Description   : Set the SetCmpValue
+*
+* @param[in]     instance       LPit hardware instance number
+* @param[in]     value
+*
+* @return        void
+*
+*/
+static inline void Lpit_Gpt_Ip_SetCmpValue(uint8 instance, uint8 channel, uint32 value)
+{
+    LPitGptBase[instance]->TMR[channel].TVAL = (uint32)(((uint32)value << LPIT_TMR_TVAL_TMR_VAL_SHIFT) & LPIT_TMR_TVAL_TMR_VAL_MASK);
+}
+
+
+/**
+* @brief         Lpit_Ip_SetDebugMode
+* @details       This register enables or disables the LPIT timer clocks and controls the timers
+*                when the LPIT enters the Debug mode. (DBG_EN)
+*
+*                Stops the timer channels when the device enters Debug mode
+*                  - 0b - Stop timer channels in Debug mode
+*                  - 1b - Allow timer channels to continue to run in Debug mode
+*
+* @param[in]     instance      LPIT hw instance number
+* @param[in]     stopRun       (TRUE/FALSE)
+*
+*
+* @return        void
+* @pre           The driver needs to be initialized.Enable/disable debug mode.
+*/
+static inline void Lpit_Gpt_Ip_SetDebugMode(uint8 instance, boolean stopRun)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_53();
+    if (TRUE == stopRun)
+    {
+        LPitGptBase[instance]->MCR |= LPIT_MCR_DBG_EN_MASK;
+    }
+    else
+    {
+        LPitGptBase[instance]->MCR &= ~LPIT_MCR_DBG_EN_MASK;
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_53();
+}
+
+/**
+* @brief         Lpit_Ip_SetDozeMode
+* @details       This register enables or disables Doze mode
+*                when the LPIT enters the Doze mode. (DOZE_EN)
+*
+*                Stops the timer channels when the device enters DOZE mode
+*                - 0b - Stop timer channels in DOZE mode
+*                - 1b - Allow timer channels to continue to run in DOZE mode
+*
+* @param[in]     instance      LPIT hw instance number
+* @param[in]     running
+*
+* @return        void
+* @pre           The driver needs to be initialized.Enable/disable Doze mode.
+*/
+static inline void Lpit_Gpt_Ip_SetDozeMode(uint8 instance, boolean running)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_54();
+    if (TRUE == running)
+    {
+        LPitGptBase[instance]->MCR |= LPIT_MCR_DOZE_EN_MASK;
+    }
+    else
+    {
+        LPitGptBase[instance]->MCR &= ~LPIT_MCR_DOZE_EN_MASK;
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_54();
+}
+
+/**
+* @brief             Lpit_Gpt_Ip_InterruptTimerChannels
+*
+* @details           This function allows enabling/disabling interrupt generation for timer channels simultaneously.
+*
+* @param[in] base    LPIT peripheral base address
+* @param[in] channel LPIT channel
+* @param[in] enable  The interrupt enabling/disabling channel that decides which channels will
+*                    be disabled interrupt.
+*
+* @return            void
+* @pre               The driver needs to be initialized.Enable/disable Doze mode.
+*/
+static inline void Lpit_Gpt_Ip_InterruptTimerChannels(uint8 instance, uint8 channel, boolean enable)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_55();
+    if (TRUE == enable)
+    {
+        LPitGptBase[instance]->MIER |= (uint32)(LPIT_MIER_TIE_GPT_MASK << (uint32)channel);
+    }
+    else
+    {
+        LPitGptBase[instance]->MIER &= ~(uint32)(LPIT_MIER_TIE_GPT_MASK << (uint32)channel);
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_55();
+}
+
+/**
+* @brief   Lpit_Gpt_Ip_ClearInterruptFlagTimerChannels
+*
+* @details This function clears current interrupt flag of timer channels.
+*
+* @param[in] instance LPIT peripheral base address
+* @param[in] channel  The interrupt flag clearing mask that decides which channels will
+*                       be cleared interrupt flag.
+*
+*      - To clear a channel timer interrupt flag, write logic 1 to it
+*/
+static inline void Lpit_Gpt_Ip_ClearInterruptFlagTimerChannels(uint8 instance, uint8 channel)
+{
+    /* Write 1 to clear the interrupt flag. */
+    LPitGptBase[instance]->MSR = ((uint32)(LPIT_MSR_TIF_GPT_MASK << (uint32)channel));
+}
+
+#if (LPIT_GPT_IP_CHAIN_MODE == STD_ON)
+/**
+* @brief         Lpit_Gpt_Ip_SetChainMode
+* @details       Support chain mode (CHAIN)
+*                This register is intended for Timer Control
+*
+*                Chain Channel
+*                When enabled, the timer channel will decrement when timer channel N-1 trigger asserts. Timer channel 0
+*                cannot be chained.
+*                 - 0b - Channel Chaining is disabled. The channel timer runs independently.
+*                 - 1b - Channel Chaining is enabled. The timer decrements on the previous channel's timeout.
+*
+* @param[in]     instance      LPIT hw instance number
+* @param[in]     channel       LPIT hw instance number
+* @param[in]     enable        TRUE/FALSE
+*
+* @return        void
+* @pre           The driver needs to be initialized.Enable/disable chain mode.
+*/
+static inline void Lpit_Gpt_Ip_SetChainMode(uint8 instance, uint8 channel, boolean enable)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_56();
+    if ((TRUE == enable) && (channel > 0U))
+    {
+        LPitGptBase[instance]->TMR[channel].TCTRL |= LPIT_TMR_TCTRL_CHAIN_MASK;
+    }
+    else
+    {
+        LPitGptBase[instance]->TMR[channel].TCTRL &= ~LPIT_TMR_TCTRL_CHAIN_MASK;
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_56();
+}
+#endif
+
+/**
+* @brief         Lpit_Gpt_Ip_GetInterruptFlagTimerChannels
+* @details       Support LPIT interrupt flags
+*                This register is intended for Timer Interrupt Flag
+*
+* @param[in]     instance     LPIT hw instance number
+* @param[in]     channel      LPIT hw channel number
+* @return        returnValue
+* @pre           The driver needs to be initialized.
+*/
+uint32 Lpit_Gpt_Ip_GetInterruptFlagTimerChannels(uint8 instance, uint8 channel)
+{
+    volatile uint32 returnValue = 0U;
+
+    returnValue = ((LPitGptBase[instance]->MSR & ((uint32)(LPIT_MSR_TIF_GPT_MASK) << (uint32)channel)) >> (uint32)channel);
+
+    return returnValue;
+}
+
+/**
+* @brief         Lpit_Gpt_Ip_GetTimerInterruptEnable
+* @details       Support LPIT Timer Interrupt Enable
+*                This register is intended for Timer Interrupt Enable
+*
+* @param[in]     instance     LPIT hw instance number
+* @param[in]     channel      LPIT hw channel number
+* @return        returnValue
+* @pre           The driver needs to be initialized.
+*/
+uint32 Lpit_Gpt_Ip_GetTimerInterruptEnable(uint8 instance, uint8 channel)
+{
+    uint32 returnValue = 0U;
+
+    returnValue = ((LPitGptBase[instance]->MIER & ((uint32)(LPIT_MIER_TIE_GPT_MASK) << (uint32)channel)) >> (uint32)channel);
+
+    return returnValue;
+}
+
+/**
+* @brief    Lpit_Gpt_Ip_GetCurrentTimervalue - Gets the current timer channel counting value.
+*
+* @details  This function returns the real-time timer channel counting value, the value in
+*           a range from 0 to timer channel period.
+*           Need to make sure the running time does not exceed the timer channel period.
+*
+* @param[in] instance LPIT peripheral base address
+* @param[in] channel Timer channel number
+* @return    Current timer channel counting value
+*/
+uint32 Lpit_Gpt_Ip_GetCurrentTimervalue(uint8 instance, uint8 channel)
+{
+    return (LPitGptBase[instance]->TMR[channel].CVAL);
+}
+
+
+/**
+* @brief    Lpit_Gpt_Ip_GetTimerValue-  Gets the timer channel period in count unit.
+*
+* @details  This function returns current period of timer channel given as argument.
+*
+* @param[in] instance   LPIT peripheral base address
+* @param[in] channel    Timer channel number
+* @return   Timer channel period in count unit
+*/
+uint32 Lpit_Gpt_Ip_GetTimerValue(uint8 instance, uint8 channel)
+{
+    return (LPitGptBase[instance]->TMR[channel].TVAL);
+}
+/*==================================================================================================
+*                                      GLOBAL FUNCTIONS
+==================================================================================================*/
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+/**
+* @brief         Function Name : Lpit_Gpt_Ip_Init
+* @details       Driver initialization function for LPit instance.
+*
+*               - enables the LPIT module
+*               - configures the freeze mode (enabled or disabled)
+*               - configures the DOZE mode (enabled or disabled)
+*
+* @param[in]     instance     LPIT hw instance number
+* @param[in]     config       Pointer to a selected configuration structure
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the driver
+* @implements    Lpit_Gpt_Ip_Init_Activity
+*/
+void Lpit_Gpt_Ip_Init(uint8 instance, const Lpit_Gpt_Ip_InstanceConfigType *config)
+{
+#if LPIT_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPIT_INSTANCE_COUNT > instance);
+    DevAssert(NULL_PTR != config);
+#endif
+    /* Enable hardware module clock. This shall be be executed before any other setup is made */
+    Lpit_Gpt_Ip_EnableMdlClk(instance, TRUE);
+
+    /* Sets LPIT operation in Debug mode*/
+    Lpit_Gpt_Ip_SetDebugMode(instance, config->stopRunInDebug);
+
+    /* Enable LPIT in DOZE modes */
+    Lpit_Gpt_Ip_SetDozeMode(instance, config->runInDozeMode);
+}
+/*================================================================================================*/
+/**
+* @brief         Function Name : Lpit_Gpt_Ip_InitChannel
+* @details       Initializes the LPIT channels. This functions is called for each LPIT hw channel.
+*
+*               - disables the IRQ correpsonding to the LPIT channel
+*               - clears the (pending) interrupt flag corresponding to LPit channel
+*               - disables the LPIT timer channel
+*               - clears the Load Value register correponding to the LPit channel.
+*
+*
+* @param[in]     instance        LPIT hw instance number
+* @param[in]     configChannel   Pointer to a selected configuration structure.
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the driver.
+* @implements    Lpit_Gpt_Ip_InitChannel_Activity
+*/
+void Lpit_Gpt_Ip_InitChannel(uint8 instance, const Lpit_Gpt_Ip_ChannelConfigType *configChannel)
+{
+#if LPIT_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPIT_INSTANCE_COUNT > instance);
+    DevAssert(NULL_PTR != configChannel);
+    DevAssert(LPIT_TMR_COUNT > configChannel->hwChannel);
+#endif
+
+    /* Enable hardware module clock. This shall be be executed before any other setup is made */
+    Lpit_Gpt_Ip_EnableMdlClk(instance, TRUE);
+    /* Stop Channel to Configure Channel */
+    Lpit_Gpt_Ip_TimerEnable(instance, configChannel->hwChannel, FALSE);
+
+    /* Config LPIT Mode as periodic counters */
+    Lpit_Gpt_Ip_SetMode(instance, configChannel->hwChannel, (uint32)0U);
+
+    /* Set Compare Value to 0 */
+    Lpit_Gpt_Ip_SetCmpValue(instance, configChannel->hwChannel, 0xFFFFFFFFU);
+
+#if (LPIT_GPT_IP_ENABLE_EXT_TRIGGERS == STD_ON)
+    /* Configures Trigger */
+    Lpit_Gpt_Ip_SetTrigger(instance, configChannel->hwChannel,configChannel->triggerConfig);
+#endif
+
+    /* Disable interrupts*/
+    Lpit_Gpt_Ip_InterruptTimerChannels(instance, (uint8)(configChannel->hwChannel), FALSE);
+
+    /* Clear pending interrupts */
+    Lpit_Gpt_Ip_ClearInterruptFlagTimerChannels(instance, (uint8)(configChannel->hwChannel));
+
+#if ((defined LPIT_0_ISR_USED)||(defined LPIT_0_CH_0_ISR_USED)||(defined LPIT_0_CH_1_ISR_USED)||(defined LPIT_0_CH_2_ISR_USED)||(defined LPIT_0_CH_3_ISR_USED))
+    Lpit_Gpt_Ip_u32ChState[instance][configChannel->hwChannel].chInit = TRUE;
+    Lpit_Gpt_Ip_u32ChState[instance][configChannel->hwChannel].callback = configChannel->callback;
+    Lpit_Gpt_Ip_u32ChState[instance][configChannel->hwChannel].callbackParam = configChannel->callbackParam;
+#endif
+
+}
+
+/*================================================================================================*/
+/**
+* @brief         Function Name: Lpit_Gpt_Ip_Deinit
+* @details       De-Initializes the LPIT instances. This functions is called and
+*
+*
+* @param[in]     instance        LPit hw instance
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver.
+*
+* @implements    Lpit_Gpt_Ip_Deinit_Activity
+*/
+void Lpit_Gpt_Ip_Deinit(uint8 instance)
+{
+#if LPIT_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPIT_INSTANCE_COUNT > instance);
+#endif
+    uint8 channelIndex;
+    /* Enable hardware module clock. This shall be be executed before any other setup is made */
+    Lpit_Gpt_Ip_EnableMdlClk(instance, TRUE);
+    /*Reset all channels to default*/
+    for (channelIndex = 0; channelIndex < LPIT_TMR_COUNT; channelIndex++)
+    {
+    /* Reset Status and Control Register */
+    Lpit_Gpt_Ip_TimerEnable(instance, channelIndex, FALSE);
+
+    /* Config LPIT Mode as periodic counters */
+    Lpit_Gpt_Ip_SetMode(instance, channelIndex, (uint32)0U);
+
+    /* Disable channel interrupts*/
+    Lpit_Gpt_Ip_InterruptTimerChannels(instance, channelIndex, FALSE);
+
+    /* Clear Interrupt Flag */
+    Lpit_Gpt_Ip_ClearInterruptFlagTimerChannels(instance, channelIndex);
+    }
+    /* Sets LPIT operation in Debug mode*/
+    Lpit_Gpt_Ip_SetDebugMode(instance, FALSE);
+
+    /* Enable LPIT in DOZE modes */
+    Lpit_Gpt_Ip_SetDozeMode(instance, FALSE);
+
+    /* Disable hardware module clock */
+    Lpit_Gpt_Ip_EnableMdlClk(instance, FALSE);
+}
+
+/*================================================================================================*/
+/**
+* @brief        Function Name : Lpit_Gpt_Ip_StartTimer
+* @details      This function is called for starting the LPit timer channel.
+*                    - sets the timeout value into the LPIT timer channel register
+*                    - enables the LPIT channel
+*
+* @param[in]     instance        LPit hw instance
+* @param[in]     channel         LPit hw channel
+* @param[in]     countValue      channel timeout value
+* @return        void
+* @pre           The driver needs to be initialized. This function is called for starting the Pit timer channel.
+* @implements    Lpit_Gpt_Ip_StartTimer_Activity
+*/
+void Lpit_Gpt_Ip_StartTimer(uint8 instance, uint8 channel, uint32 countValue)
+{
+#if LPIT_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPIT_INSTANCE_COUNT > instance);
+    DevAssert(LPIT_TMR_COUNT > channel);
+    DevAssert(LPIT_MAX_VALUE > countValue);
+#endif
+    /* Lpit timer disable */
+    Lpit_Gpt_Ip_TimerEnable(instance, channel, FALSE);
+
+    /* Sets the timer channel period in count unit   */
+    Lpit_Gpt_Ip_SetCmpValue(instance, channel, countValue);
+
+    /* Lpit timer enable */
+    Lpit_Gpt_Ip_TimerEnable(instance, channel, TRUE);
+}
+
+/*================================================================================================*/
+/**
+* @brief         Function Name : Lpit_Gpt_Ip_StopTimer
+* @details       This function is called for stopping the LPit counter. This function disables the LPIT channel
+*
+*
+* @param[in]     instance        LPit hw instance
+* @param[in]     channel         LPit hw channel
+* @return        void
+* @pre           The driver needs to be initialized. Lpit_Gpt_Ip_StartTimer must be call before.
+* @implements    Lpit_Gpt_Ip_StopTimer_Activity
+*/
+void Lpit_Gpt_Ip_StopTimer(uint8 instance, uint8 channel)
+{
+#if LPIT_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPIT_INSTANCE_COUNT > instance);
+    DevAssert(LPIT_TMR_COUNT > channel);
+#endif
+    /* Lpit timer disable */
+    Lpit_Gpt_Ip_TimerEnable(instance, channel, FALSE);
+
+    /* Clear interrupt flag */
+    Lpit_Gpt_Ip_ClearInterruptFlagTimerChannels(instance, channel);
+}
+
+/*================================================================================================*/
+/**
+* @brief        Function Name : Lpit_Gpt_Ip_EnableChInterrupt
+* @details      This function allows enabling interrupt generation of timer channel
+*               when timeout occurs
+*
+* @param[in]    instance        LPit hw instance
+* @param[in]    channel         LPit hw channel
+* @return       void
+* @pre          The driver needs to be initialized.
+* @implements    Lpit_Gpt_Ip_EnableChInterrupt_Activity
+*/
+void Lpit_Gpt_Ip_EnableChInterrupt(uint8 instance, uint8 channel)
+{
+#if LPIT_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPIT_INSTANCE_COUNT > instance);
+    DevAssert(LPIT_TMR_COUNT > channel);
+#endif
+    /* Clear interrupt flag */
+    Lpit_Gpt_Ip_ClearInterruptFlagTimerChannels(instance, channel);
+
+    /* Enable interrupt */
+    Lpit_Gpt_Ip_InterruptTimerChannels(instance, channel, TRUE);
+}
+
+/*================================================================================================*/
+/**
+* @brief        Function Name : Lpit_Gpt_Ip_DisableChInterrupt
+* @details      This function allows disabling interrupt of a timer channel
+*
+* @param[in]    instance        LPit hw instance
+* @param[in]    channel         LPit hw channel
+* @return       void
+* @pre          The driver needs to be initialized.
+* @implements    Lpit_Gpt_Ip_DisableChInterrupt_Activity
+*/
+void Lpit_Gpt_Ip_DisableChInterrupt(uint8 instance, uint8 channel)
+{
+#if LPIT_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPIT_INSTANCE_COUNT > instance);
+    DevAssert(LPIT_TMR_COUNT > channel);
+#endif
+    /* Clear Lpit interrupt flag */
+    Lpit_Gpt_Ip_ClearInterruptFlagTimerChannels(instance, channel);
+
+    /* Disable Lpit interrupt */
+    Lpit_Gpt_Ip_InterruptTimerChannels(instance, channel, FALSE);
+}
+
+/*================================================================================================*/
+#if (LPIT_GPT_IP_CHAIN_MODE == STD_ON)
+/**
+* @brief      Function Name :  Lpit_Gpt_Ip_ChainMode.
+* @details    This function:
+*               - Chain/Unchain LPit channels.
+* @param[in]     instance        LPit hw channel ID
+* @param[in]     channel         channel timeout value
+* @param[in]     enable          enable/disable chain mode
+* @return        returnValue
+* @pre           The driver needs to be initialized. LPIT_GPT_IP_CHAIN_MODE == STD_ON
+* @implements    Lpit_Gpt_Ip_ChainMode_Activity
+*/
+Lpit_Gpt_Ip_StatusType Lpit_Gpt_Ip_ChainMode(uint8 instance, uint8 channel, boolean enable)
+{
+#if LPIT_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPIT_INSTANCE_COUNT > instance);
+    DevAssert(LPIT_TMR_COUNT > channel);
+#endif
+    Lpit_Gpt_Ip_StatusType returnValue = LPIT_GPT_IP_ERROR;
+    /* Can not enable chain mode for LPIT_0_CH_0 */
+    if((uint8) 0x00 < channel)
+    {
+        /* Enable Chain Mode*/
+        Lpit_Gpt_Ip_SetChainMode(instance, channel, enable);
+        returnValue = LPIT_GPT_IP_SUCCESS;
+    }
+
+    return returnValue;
+}
+#endif /*(LPIT_GPT_IP_CHAIN_MODE== STD_ON)*/
+/*================================================================================================*/
+#if ((defined LPIT_0_ISR_USED)||(defined LPIT_0_CH_0_ISR_USED)||(defined LPIT_0_CH_1_ISR_USED)||(defined LPIT_0_CH_2_ISR_USED)||(defined LPIT_0_CH_3_ISR_USED))
+/**
+* @brief         Driver routine to process all the interrupts of LPIT.
+* @details       Support function used by interrupt service routines to implement LPIT specific operations
+*                and call the upper layer handler to implement non-hardware specific operations.
+*
+* @param[in]     instance     LPIT hw instance number
+* @param[in]     channel      LPIT hw channel number
+* @return        void
+* @pre           Enable interrupt service routines
+* @implements    Lpit_Gpt_Ip_ProcessCommonInterrupt_Activity
+*/
+static void Lpit_Gpt_Ip_ProcessCommonInterrupt(uint8 instance, uint8 channel)
+{
+    uint32 flag;
+    uint32 interruptEnabled;
+
+    /*Checks for spurious interrupts*/
+    flag = (uint32)(Lpit_Gpt_Ip_GetInterruptFlagTimerChannels(instance, channel));
+    interruptEnabled = (uint32)(Lpit_Gpt_Ip_GetTimerInterruptEnable(instance, channel));
+
+    if ((1U == flag) && (1U == interruptEnabled))
+    {
+        /* Call GPT upper layer handler */
+        if((TRUE == Lpit_Gpt_Ip_u32ChState[instance][channel].chInit) && \
+                (NULL_PTR != Lpit_Gpt_Ip_u32ChState[instance][channel].callback))
+        {
+            Lpit_Gpt_Ip_u32ChState[instance][channel].callback(Lpit_Gpt_Ip_u32ChState[instance][channel].callbackParam);
+        }
+    }
+    /*Clear interrupt flag*/
+    Lpit_Gpt_Ip_ClearInterruptFlagTimerChannels(instance, channel);
+}
+#endif
+/*================================================================================================*/
+
+#if (defined (LPIT_GPT_IP_MODULE_SINGLE_INTERRUPT) && (STD_ON == LPIT_GPT_IP_MODULE_SINGLE_INTERRUPT))
+#ifdef LPIT_0_ISR_USED
+/**
+* @brief   Interrupt handler for LPIT_0_CH_0 channels.
+* @details Interrupt Service Routine corresponding to LPIT_0_CH_0 hw module.
+* @param[in] none
+* @return  void
+* @isr
+* @pre      The driver needs to be initialized
+*/
+ISR(LPIT_0_ISR)
+{
+    uint8 channel = 0U;
+
+    for (channel = 0U; channel < LPIT_TMR_COUNT; channel++)
+    {
+        Lpit_Gpt_Ip_ProcessCommonInterrupt(0U, channel);
+    }
+
+    EXIT_INTERRUPT();
+}
+#endif
+#else
+#ifdef LPIT_0_CH_0_ISR_USED
+/**
+* @brief   Interrupt handler for LPIT_0_CH_0 channels.
+* @details Interrupt Service Routine corresponding to LPIT_0_CH_0 hw module.
+* @param[in] none
+* @return  void
+* @isr
+* @pre      The driver needs to be initialized
+*/
+ISR(LPIT_0_CH_0_ISR)
+{
+    Lpit_Gpt_Ip_ProcessCommonInterrupt(0U, 0U);
+    EXIT_INTERRUPT();
+}
+#endif
+/*================================================================================================*/
+#ifdef LPIT_0_CH_1_ISR_USED
+/**
+* @brief   Interrupt handler for LPIT_0_CH_1 channels.
+* @details Interrupt Service Routine corresponding to LPIT_0_CH_1 hw module.
+* @param[in] none
+* @return  void
+* @isr
+* @pre      The driver needs to be initialized
+*/
+ISR(LPIT_0_CH_1_ISR)
+{
+    Lpit_Gpt_Ip_ProcessCommonInterrupt(0U, 1U);
+    EXIT_INTERRUPT();
+}
+#endif
+/*================================================================================================*/
+#ifdef LPIT_0_CH_2_ISR_USED
+/**
+* @brief   Interrupt handler for LPIT_0_CH_0 channels.
+* @details Interrupt Service Routine corresponding to LPIT_0_CH_0 hw module.
+* @param[in] none
+* @return  void
+* @isr
+* @pre      The driver needs to be initialized
+*/
+ISR(LPIT_0_CH_2_ISR)
+{
+    Lpit_Gpt_Ip_ProcessCommonInterrupt(0U, 2U);
+    EXIT_INTERRUPT();
+}
+#endif
+/*================================================================================================*/
+#ifdef LPIT_0_CH_3_ISR_USED
+/**
+* @brief   Interrupt handler for LPIT_0_CH_0 channels.
+* @details Interrupt Service Routine corresponding to LPIT_0_CH_0 hw module.
+* @param[in] none
+* @return  void
+* @isr
+* @pre      The driver needs to be initialized
+*/
+ISR(LPIT_0_CH_3_ISR)
+{
+    Lpit_Gpt_Ip_ProcessCommonInterrupt(0U, 3U);
+    EXIT_INTERRUPT();
+}
+#endif
+
+#endif /*LPIT_GPT_IP_MODULE_SINGLE_INTERRUPT*/
+/*================================================================================================*/
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#endif /* LPIT_GPT_IP_USED == STD_ON */
+#ifdef __cplusplus
+}
+#endif /* LPIT_GPT_IP_C */
+
+/** @} */

RTD/src/Lptmr_Gpt_Ip.c

@@ -0,0 +1,818 @@
+/*==================================================================================================
+* Project : RTD AUTOSAR 4.4
+* Platform : CORTEXM
+* Peripheral : Ftm_Srtc_Lptmr_LPit
+* Dependencies : none
+*
+* Autosar Version : 4.4.0
+* Autosar Revision : ASR_REL_4_4_REV_0000
+* Autosar Conf.Variant :
+* SW Version : 1.0.0
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
+*
+* (c) Copyright 2020-2021 NXP Semiconductors
+* All Rights Reserved.
+*
+* NXP Confidential. This software is owned or controlled by NXP and may only be
+* used strictly in accordance with the applicable license terms. By expressly
+* accepting such terms or by downloading, installing, activating and/or otherwise
+* using the software, you are agreeing that you have read, and that you agree to
+* comply with and are bound by, such license terms. If you do not agree to be
+* bound by the applicable license terms, then you may not retain, install,
+* activate or otherwise use the software.
+==================================================================================================*/
+/**
+*   @file           Lptmr_Gpt_Ip.c
+*
+*   @addtogroup     LPTMR_GPT_IP Lptmr IPL
+*
+*   @{
+*/
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*==================================================================================================
+*                                        INCLUDE FILES
+* 1) system and project includes
+* 2) needed interfaces from external units
+* 3) internal and external interfaces from this unit
+==================================================================================================*/
+#include "Lptmr_Gpt_Ip.h"
+#ifdef LPTMR_GPT_IP_ENABLE_USER_MODE_SUPPORT
+   #define USER_MODE_REG_PROT_ENABLED   LPTMR_GPT_IP_ENABLE_USER_MODE_SUPPORT
+   #include "RegLockMacros.h"
+#endif
+/*==================================================================================================
+*                              SOURCE FILE VERSION INFORMATION
+==================================================================================================*/
+
+#define LPTMR_GPT_IP_VENDOR_ID_C                    43
+#define LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION_C     4
+#define LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION_C     4
+#define LPTMR_GPT_IP_AR_RELEASE_REVISION_VERSION_C  0
+#define LPTMR_GPT_IP_SW_MAJOR_VERSION_C             1
+#define LPTMR_GPT_IP_SW_MINOR_VERSION_C             0
+#define LPTMR_GPT_IP_SW_PATCH_VERSION_C             0
+
+/*==================================================================================================
+*                                     FILE VERSION CHECKS
+==================================================================================================*/
+#if (LPTMR_GPT_IP_VENDOR_ID_C != LPTMR_GPT_IP_VENDOR_ID)
+    #error "Lptmr_Gpt_Ip.c and Lptmr_Gpt_Ip.h have different vendor ids"
+#endif
+/* Check if header file and Gpt header file are of the same Autosar version */
+#if ((LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION_C != LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION) || \
+     (LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION_C != LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION) || \
+     (LPTMR_GPT_IP_AR_RELEASE_REVISION_VERSION_C != LPTMR_GPT_IP_AR_RELEASE_REVISION_VERSION) \
+    )
+    #error "AutoSar Version Numbers of Lptmr_Gpt_Ip.c and Lptmr_Gpt_Ip.h are different"
+#endif
+/* Check if source file and GPT header file are of the same Software version */
+#if ((LPTMR_GPT_IP_SW_MAJOR_VERSION_C != LPTMR_GPT_IP_SW_MAJOR_VERSION) || \
+     (LPTMR_GPT_IP_SW_MINOR_VERSION_C != LPTMR_GPT_IP_SW_MINOR_VERSION) || \
+     (LPTMR_GPT_IP_SW_PATCH_VERSION_C != LPTMR_GPT_IP_SW_PATCH_VERSION) \
+    )
+    #error "Software Version Numbers of Lptmr_Gpt_Ip.c and Lptmr_Gpt_Ip.h are different"
+#endif
+
+#ifdef LPTMR_GPT_IP_ENABLE_USER_MODE_SUPPORT
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
+    #if ((REGLOCKMACROS_AR_RELEASE_MAJOR_VERSION != LPTMR_GPT_IP_AR_RELEASE_MAJOR_VERSION_C) || \
+         (REGLOCKMACROS_AR_RELEASE_MINOR_VERSION != LPTMR_GPT_IP_AR_RELEASE_MINOR_VERSION_C))
+        #error "AutoSar Version Numbers of RegLockMacros.h and Lptmr_Gpt_Ip.c are different"
+    #endif
+#endif
+#endif
+/*==================================================================================================
+*                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
+==================================================================================================*/
+
+/*==================================================================================================
+*                                       LOCAL MACROS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      LOCAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      LOCAL VARIABLES
+==================================================================================================*/
+#if (LPTMR_GPT_IP_USED == STD_ON)
+
+/*==================================================================================================
+*                                      GLOBAL CONSTANTS
+==================================================================================================*/
+
+/*==================================================================================================
+*                                      GLOBAL VARIABLES
+==================================================================================================*/
+#define GPT_START_SEC_CONST_UNSPECIFIED
+#include "Gpt_MemMap.h"
+/** @brief Table of LPTMR base pointers */
+LPTMR_Type * const lptmrGptBase[LPTMR_INSTANCE_COUNT] = IP_LPTMR_BASE_PTRS;
+#define GPT_STOP_SEC_CONST_UNSPECIFIED
+#include "Gpt_MemMap.h"
+
+#if (defined LPTMR_0_CH_0_ISR_USED)
+static Lptmr_Gpt_Ip_State Lptmr_Gpt_Ip_u32ChState[LPTMR_INSTANCE_COUNT] =   {
+                                                                                {
+                                                                                    (boolean)FALSE,
+                                                                                    NULL_PTR,
+                                                                                    0U
+                                                                                }
+                                                                            };
+#endif
+#if (LPTMR_GPT_IP_SET_CLOCK_MODE == STD_ON)
+static Lptmr_Gpt_Ip_InstanceState Lptmr_Gpt_Ip_u32InstanceState[LPTMR_INSTANCE_COUNT] =     {
+                                                                                                {
+                                                                                                    0U,
+                                                                                                    0U
+                                                                                                }
+                                                                                            };
+#endif
+/*==================================================================================================
+*                                   LOCAL FUNCTION PROTOTYPES
+==================================================================================================*/
+#define GPT_START_SEC_CODE
+#include "Gpt_MemMap.h"
+
+static inline void Lptmr_Gpt_Ip_Configure(LPTMR_Type * const base,
+                                                             Lptmr_Gpt_Ip_ClockSelectType clocksource,
+                                                             uint8 prescalerValue);
+#if (LPTMR_GPT_IP_SET_CLOCK_MODE == STD_ON)
+static inline void Lptmr_Gpt_Ip_SetPrescaler(uint8 instance, uint8 prescalerValue);
+#endif
+static inline void Lptmr_Gpt_Ip_TimerEnable(uint8 instance, boolean enable);
+static inline void Lptmr_Gpt_Ip_InterruptEnable(uint8 instance, boolean enable);
+static inline void Lptmr_Gpt_Ip_ClearCompareFlag(uint8 instance, uint32 mask);
+static inline void Lptmr_Gpt_Ip_TimerModeSelect(uint8 instance, uint32 mode);
+static inline void Lptmr_Gpt_Ip_CompareValue(uint8 instance, uint16 value);
+static inline boolean Lptmr_Gpt_Ip_GetInterruptBit(uint8 instance);
+#ifdef LPTMR_0_CH_0_ISR_USED
+ISR(Lptmr_0_Ch_0_ISR);
+static void Lptmr_Gpt_Ip_ProcessCommonInterrupt(uint8 instance);
+#endif
+/*==================================================================================================
+*                                       LOCAL FUNCTIONS
+==================================================================================================*/
+#ifdef LPTMR_0_CH_0_ISR_USED
+/**
+* @brief         Lptmr_Gpt_Ip_ProcessCommonInterrupt.
+* @details       Function used by interrupt service routines to call notification
+*                functions if provided and enabled
+*
+* @param[in]     instance hardware index
+* @return        void
+* @pre           Enable interrupt service routines
+*
+* @implements    Lptmr_Gpt_Ip_ProcessCommonInterrupt_Activity
+*/
+static void Lptmr_Gpt_Ip_ProcessCommonInterrupt(uint8 instance)
+{
+    boolean flag = FALSE;
+    boolean interruptEnabled = FALSE;
+    flag = Lptmr_Gpt_Ip_GetCmpFlagState(instance);
+    interruptEnabled = Lptmr_Gpt_Ip_GetInterruptBit(instance);
+    /* Clear Interrupt Flag */
+    Lptmr_Gpt_Ip_ClearCompareFlag(instance, LPTMR_CSR_TCF_MASK);
+    /*Checks for spurious interrupts*/
+    if ((TRUE == flag) && (TRUE == interruptEnabled))
+    {
+        /* Call upper layer handler */
+        if((TRUE == Lptmr_Gpt_Ip_u32ChState[instance].chInit) && \
+                (NULL_PTR != Lptmr_Gpt_Ip_u32ChState[instance].callback))
+        {
+            Lptmr_Gpt_Ip_u32ChState[instance].callback(Lptmr_Gpt_Ip_u32ChState[instance].callbackParam);
+        }
+    }
+}
+#endif
+
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_TimerEnable
+* Description   : Enable/Disable (CSR_TEN)
+*
+* @param[in]     pointer       Lptimer hardware
+* @param[in]     enable         TRUE/FALSE
+*
+* @return        void
+*
+*/
+static inline void Lptmr_Gpt_Ip_TimerEnable(uint8 instance, boolean enable)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_40();
+    if (TRUE == enable)
+    {
+        lptmrGptBase[instance]->CSR |=  LPTMR_CSR_TEN_MASK;
+    }
+    else
+    {
+        lptmrGptBase[instance]->CSR &= ~(LPTMR_CSR_TEN_MASK);
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_40();
+}
+
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_InterruptEnable
+* Description   : Enable/Disable (CSR_TIE)
+*
+* @param[in]     pointer       Lptimer hardware
+* @param[in]     enable        TRUE/FALSE
+*
+* @return        void
+*
+*/
+static inline void Lptmr_Gpt_Ip_InterruptEnable(uint8 instance, boolean enable)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_41();
+    if (TRUE == enable)
+    {
+        lptmrGptBase[instance]->CSR |= LPTMR_CSR_TIE_MASK;
+    }
+    else
+    {
+        lptmrGptBase[instance]->CSR &= ~(LPTMR_CSR_TIE_MASK);
+    }
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_41();
+}
+
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_ClearCompareFlag
+* Description   : Enable/Disable (CSR_TCF)
+*
+* @param[in]     pointer       Lptimer hardware
+* @param[in]     enable        TRUE/FALSE
+*
+* @return        void
+*
+*/
+static inline void Lptmr_Gpt_Ip_ClearCompareFlag(uint8 instance, uint32 mask)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_42();
+    /* Clear Flag*/
+    lptmrGptBase[instance]->CSR |= mask;
+
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_42();
+}
+
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_TimerModeSelect
+* Description   : Enable/Disable (CSR_TMS)
+*
+* @param[in]     pointer       Lptimer hardware
+* @param[in]     enable        TRUE/FALSE
+*
+* @return        void
+*
+*/
+static inline void Lptmr_Gpt_Ip_TimerModeSelect(uint8 instance, uint32 mode)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_43();
+
+    /* Select mode TMS */
+    lptmrGptBase[instance]->CSR = (lptmrGptBase[instance]->CSR & ~LPTMR_CSR_TMS_MASK) | LPTMR_CSR_TMS(mode);
+
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_43();
+}
+
+#if (LPTMR_GPT_IP_SET_CLOCK_MODE == STD_ON)
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_SetPrescaler
+* Description   : SetPrescaler - (PSR_PRESCALE)
+*
+* @param[in]     pointer       Lptimer hardware
+* @param[in]     prescalerValue
+*
+* @return        void
+*
+*/
+static inline void Lptmr_Gpt_Ip_SetPrescaler(uint8 instance, uint8 prescalerValue)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_44();
+
+    lptmrGptBase[instance]->PSR = (lptmrGptBase[instance]->PSR & ~LPTMR_PSR_PRESCALE_MASK) | LPTMR_PSR_PRESCALE(prescalerValue);
+
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_44();
+}
+#endif
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_Configure
+* Description   : Configure the clock source and prescalerValue (PSR register)
+*
+* @param[in]     instance       LPtimer hardware instance number
+* @param[in]     clocksource
+* @param[in]     prescalerValue
+*
+* @return        void
+*
+*/
+static inline void Lptmr_Gpt_Ip_Configure(LPTMR_Type * const base,
+                                        Lptmr_Gpt_Ip_ClockSelectType clocksource,
+                                        uint8 prescalerValue)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_45();
+
+    base->PSR = (base->PSR & ~LPTMR_PSR_PCS_MASK) | LPTMR_PSR_PCS(clocksource);
+
+    base->PSR = (base->PSR & ~LPTMR_PSR_PRESCALE_MASK) | LPTMR_PSR_PRESCALE(prescalerValue);
+
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_45();
+}
+
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_WriteCompareValue
+* Description   : Set value (CMR)
+*
+* @param[in]     instance       LPtimer hardware instance number
+* @param[in]     channel
+* @param[in]     value
+*
+* @return        void
+*
+*/
+static inline void Lptmr_Gpt_Ip_WriteCompareValue(uint8 instance, uint16 value)
+{
+    lptmrGptBase[instance]->CMR = value;
+
+}
+
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_WriteCounterValue
+* Description   : Set value (CNR)
+*
+* @param[in]     instance       LPtimer hardware instance number
+* @param[in]     channel
+* @param[in]     value
+*
+* @return        void
+*
+*/
+void Lptmr_Gpt_Ip_WriteCounterValue(uint8 instance, uint16 value)
+{
+    lptmrGptBase[instance]->CNR = value;
+
+}
+
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_CompareValue
+* Description   : CompareValue - (LPTMR_CMR_COMPARE)
+*
+* @param[in]     pointer       Lptimer hardware
+* @param[in]     CompareValue
+*
+* @return        void
+*
+*/
+static inline void Lptmr_Gpt_Ip_CompareValue(uint8 instance, uint16 value)
+{
+    SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_46();
+
+    lptmrGptBase[instance]->CMR = (lptmrGptBase[instance]->CMR & ~LPTMR_CMR_COMPARE_MASK) | LPTMR_CMR_COMPARE(value);
+
+    SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_46();
+}
+
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_GetInterruptBit
+* Description   : Get the bit CSR_TIE (CSR)
+*
+* @param[in]     instance       LPtimer hardware instance number
+*
+* @return        status
+*
+*/
+static inline boolean Lptmr_Gpt_Ip_GetInterruptBit(uint8 instance)
+{
+    uint32 status;
+
+    status = ((lptmrGptBase[instance]->CSR) &LPTMR_CSR_TIE_MASK) >> LPTMR_CSR_TIE_SHIFT;
+
+    return ((status == 1u) ? TRUE : FALSE);
+}
+
+/**
+* @brief         Lptmr_Gpt_Ip_GetEnableState
+* @details       Get the state of a LPTMR instance .Support enable/disable Timer Enable
+*                This register is intended for Timer Control Register
+*
+* @param[in]     instance     LPtimer hw instance number
+*
+*
+* @return        isRunning
+* @pre           The driver needs to be initialized.
+*
+*/
+static inline boolean Lptmr_Gpt_Ip_GetEnableState(uint8 instance)
+{
+
+    uint32 EnableState;
+
+    EnableState = ((lptmrGptBase[instance]->CSR & LPTMR_CSR_TEN_MASK) >> LPTMR_CSR_TEN_SHIFT);
+
+    return ((EnableState == 1u) ? TRUE : FALSE);
+}
+
+/**
+* @brief         Lptmr_Gpt_Ip_GetCmpFlagState Get the Compare Flag state
+* @details       This function checks whether a Compare Match event has occurred or if there is an Interrupt Pending.
+*
+*
+* @param[in]     instance     LPtimer hw instance number
+*
+*
+* @return       The Compare Flag state
+*               - true: Compare Match/Interrupt Pending asserted
+*               - false: Compare Match/Interrupt Pending not asserted
+* @pre           The driver needs to be initialized.
+*
+*/
+boolean Lptmr_Gpt_Ip_GetCmpFlagState(uint8 instance)
+{
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPTMR_INSTANCE_COUNT > instance);
+#endif
+
+    uint32 CmpFlagState;
+
+    CmpFlagState = (lptmrGptBase[instance]->CSR & LPTMR_CSR_TCF_MASK) >> LPTMR_CSR_TCF_SHIFT;
+
+    return ((CmpFlagState == 1u) ? TRUE : FALSE);
+}
+
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_GetCntValue
+* Description   : Get current counter value (base->CNR)
+*
+* @param[in]     instance       LPtimer hardware instance number
+*
+* @return        currentCntValue
+*
+*/
+uint32 Lptmr_Gpt_Ip_GetCntValue(uint8 instance)
+{
+    uint32 currentCntValue;
+    currentCntValue = lptmrGptBase[instance]->CNR;
+    return currentCntValue;
+}
+
+/*================================================================================================*/
+/**
+* @brief
+* Function Name : Lptmr_Gpt_Ip_GetCompareValue
+* Description   : Get current compare value (base->CMR)
+*
+* @param[in]     instance       LPtimer hardware instance number
+*
+* @return        currentCmpValue
+*
+*/
+uint32 Lptmr_Gpt_Ip_GetCompareValue(uint8 instance)
+{
+    uint32 currentCmpValue;
+    currentCmpValue = lptmrGptBase[instance]->CMR;
+    return currentCmpValue;
+}
+/*==================================================================================================
+*                                       GLOBAL FUNCTIONS
+==================================================================================================*/
+/**
+* @brief          Low power timer Driver initialization function
+* @details        This function is called separately for each LPTMR hw channel corresponding to the configured
+*
+*               - enables the LPTMR module
+*               - configures the freeze mode (enabled or disabled)
+*               - disables the IRQ corresponding to the LPTMR channel
+*               - clears the (pending) interrupt flag corresponding to Lptmr channel
+*               - disables the LPTMR timer channel
+*               - clears the Load Value register corresponding to the Lptmr channel.
+*
+* @param[in]     instance     hw instance
+* @param[in]     *config      pointer to configuration
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+* @implements    Lptmr_Gpt_Ip_Init_Activity
+*/
+void Lptmr_Gpt_Ip_Init(uint8 instance, const Lptmr_Gpt_Ip_ConfigType *config)
+{
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPTMR_INSTANCE_COUNT > instance);
+    DevAssert(NULL_PTR != config);
+#endif
+
+#if (LPTMR_GPT_IP_STANDBY_WAKEUP_SUPPORT == STD_ON)
+    if (TRUE == (boolean)((Lptmr_Gpt_Ip_GetCmpFlagState(instance)) && \
+                          (Lptmr_Gpt_Ip_GetInterruptBit(instance))))
+    {
+#endif
+        /* Stop Channel to Configure Channel. This shall be be executed before any other setup is made */
+        Lptmr_Gpt_Ip_TimerEnable(instance, FALSE);
+
+        /* Disable interrupts*/
+        Lptmr_Gpt_Ip_InterruptEnable(instance, FALSE);
+
+        /* Clear pending interrupts */
+        Lptmr_Gpt_Ip_ClearCompareFlag(instance, LPTMR_CSR_TCF_MASK);
+
+        /* Configures the mode of LPTMR is Time Counter */
+        Lptmr_Gpt_Ip_TimerModeSelect(instance, LPTMR_GPT_IP_TM_MODE);
+
+#if (LPTMR_GPT_IP_STANDBY_WAKEUP_SUPPORT == STD_ON)
+    }
+#endif
+        /* Check Prescaler Bypass*/
+    if (TRUE == config->prescalerEnable)
+    {
+        lptmrGptBase[instance]->PSR &= ~(LPTMR_PSR_PBYP_MASK);
+    }
+    else
+    {
+        lptmrGptBase[instance]->PSR |= (LPTMR_PSR_PBYP_MASK);
+    }
+        /* Set clock and prescalerValue LPtimer */
+        Lptmr_Gpt_Ip_Configure(lptmrGptBase[instance],
+                                config->clocksource,
+                                config->clockPrescaler);
+
+        /* Write Compare Value */
+        Lptmr_Gpt_Ip_WriteCompareValue(instance, 0xFFFFU);
+
+#if (defined LPTMR_0_CH_0_ISR_USED)
+        Lptmr_Gpt_Ip_u32ChState[instance].chInit = TRUE;
+        Lptmr_Gpt_Ip_u32ChState[instance].callback = config->callback;
+        Lptmr_Gpt_Ip_u32ChState[instance].callbackParam = config->callbackParam;
+#endif
+
+#if (LPTMR_GPT_IP_SET_CLOCK_MODE == STD_ON)
+        Lptmr_Gpt_Ip_u32InstanceState[instance].clockPrescaler = config->clockPrescaler;
+        Lptmr_Gpt_Ip_u32InstanceState[instance].clockAlternatePrescaler = config->clockAlternatePrescaler;
+#endif
+}
+
+/*================================================================================================*/
+/**
+* @brief          de-initialization function for Lptmr module.
+* @details        This function is called separately for each LPTMR hw channel corresponding to the configured
+*                 timer channels, and:
+*               - disables the LPTMR channel
+*               - disables the freeze mode
+*               - disables IRQ corresponding to Lptmr channel
+*               - clears the (pending) interrupt flag corresponding to Lptmr channel
+*
+*
+*
+* @param[in]     instance        LPTMR hw instance
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the GPT driver
+* @implements    Lptmr_Gpt_Ip_DeInit_Activity
+*/
+void Lptmr_Gpt_Ip_DeInit(uint8 instance)
+{
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPTMR_INSTANCE_COUNT > instance);
+#endif
+
+    /* Enable hardware module clock. This shall be be executed before any other setup is made */
+    Lptmr_Gpt_Ip_TimerEnable(instance, FALSE);
+
+    /* Disable channel interrupts*/
+    Lptmr_Gpt_Ip_InterruptEnable(instance, FALSE);
+
+    /* Clear Interrupt Flag */
+    Lptmr_Gpt_Ip_ClearCompareFlag(instance, LPTMR_CSR_TCF_MASK);
+}
+
+/*================================================================================================*/
+/**
+* @brief        Function for starting the Lptmr timer channel.
+* @details      This function:
+*               - clears the (pending) interrupt flag corresponding to Lptmr channel
+*               - disables the LPTMR timer channel
+*               - sets the timeout value into the LPTMR timer channel register
+*               - enables the LPTMR timer channel
+*               - enables the IRQ corresponding to the LPTMR timer channel,if channel configured in One Shot mode.
+*
+* @param[in]     instance   LPtimer hw instance
+* @param[in]     value   channel timeout value
+* @return        void
+* @pre           The data structure including the configuration set required for initializing the driver
+* @implements    Lptmr_Gpt_Ip_StartTimer_Activity
+*/
+void Lptmr_Gpt_Ip_StartTimer(uint8 instance, uint16 value)
+{
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPTMR_INSTANCE_COUNT > instance);
+#endif
+
+    /* Disable LPTMR timer */
+    Lptmr_Gpt_Ip_TimerEnable(instance, FALSE);
+
+    /* Write compare value*/
+    Lptmr_Gpt_Ip_WriteCompareValue(instance, value);
+
+    /* Enable LPTMR timer */
+    Lptmr_Gpt_Ip_TimerEnable(instance, TRUE);
+
+}
+
+/*================================================================================================*/
+/**
+* @brief        Function for stopping the Lptmr timer channel.
+* @details      This function disables the LPTMR channel
+*
+*
+* @param[in]     instance        LPTMR hw instance
+* @return        void
+* @pre           The driver needs to be initialized.
+*
+* @implements    Lptmr_Gpt_Ip_StopTimer_Activity
+*/
+void Lptmr_Gpt_Ip_StopTimer(uint8 instance)
+{
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPTMR_INSTANCE_COUNT > instance);
+#endif
+
+    /* Disable LPTMR timer */
+    Lptmr_Gpt_Ip_TimerEnable(instance, FALSE);
+
+    /* Clear interrupt flag */
+    Lptmr_Gpt_Ip_ClearCompareFlag(instance, LPTMR_CSR_TCF_MASK);
+}
+
+/*================================================================================================*/
+/**
+* @brief          LPTMR Driver function for get status of comparevalue.
+* @details        This function:
+*                           - Set the compare value in counter tick units, for a LPTMR instance
+* @param[in]     instance           LPTMR hw instance
+* @param[in]     compareValue        compare value
+*
+* @return         Possible return values:
+*                - STATUS_SUCCESS: completed successfully
+*                - STATUS_ERROR: cannot reconfigure compare value (TCF not set)
+*                - STATUS_TIMEOUT: compare value is smaller than current counter value
+*
+* @pre           The driver needs to be initialized.
+*
+*
+*/
+Lptmr_Gpt_Ip_StatusType Lptmr_Gpt_Ip_SetCompareValue(uint8 instance,
+                                                     uint16 compareValue)
+{
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPTMR_INSTANCE_COUNT > instance);
+#endif
+    Lptmr_Gpt_Ip_StatusType status = LPTMR_GPT_IP_SUCCESS;
+    boolean EnableState;
+    boolean CmpFlagState;
+    uint16 counterVal;
+
+    EnableState = Lptmr_Gpt_Ip_GetEnableState(instance);
+    CmpFlagState  = Lptmr_Gpt_Ip_GetCmpFlagState(instance);
+
+    /* The compare value can only be written if counter is disabled or the compare flag is set. */
+    if (EnableState && !CmpFlagState)
+    {
+        status = LPTMR_GPT_IP_ERROR;
+    }
+    else
+    {
+        /* Check if new value is below the current counter value */
+        Lptmr_Gpt_Ip_CompareValue(instance, compareValue);
+        counterVal = (uint16)Lptmr_Gpt_Ip_GetCntValue(instance);
+        if (counterVal >= compareValue)
+        {
+            status = LPTMR_GPT_IP_TIMEOUT;
+        }
+    }
+
+    return status;
+
+}
+
+/*================================================================================================*/
+/**
+* @brief         Driver function for Enable Interrupt for LPtimer channel
+* @details       This function:
+*                        - Enable Interrupt for LPtimer channel
+*
+* @param[in]     instance        LPtimer hw instance
+* @return        void
+* @pre           The driver needs to be initialized.
+* @implements    Lptmr_Gpt_Ip_EnableInterrupt_Activity
+*/
+void Lptmr_Gpt_Ip_EnableInterrupt(uint8 instance)
+{
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPTMR_INSTANCE_COUNT > instance);
+#endif
+
+    if (FALSE == Lptmr_Gpt_Ip_GetInterruptBit(instance))
+    {
+    /* Clear interrupt flag */
+    Lptmr_Gpt_Ip_ClearCompareFlag(instance, LPTMR_CSR_TCF_MASK);
+
+    /* Enable LPTMR interrupt */
+    Lptmr_Gpt_Ip_InterruptEnable(instance, TRUE);
+    }
+}
+
+/*================================================================================================*/
+/**
+*
+* @brief         LPTMR driver function for Disable Interrupt for LPTMR channel
+* @details       This function:
+*                        - Disable Interrupt for LPTMR channel
+* @param[in]     instance        LPTMR hw instance
+* @return        void
+* @pre           The driver needs to be initialized.
+* @implements    Lptmr_Gpt_Ip_DisableInterrupt_Activity
+*/
+void Lptmr_Gpt_Ip_DisableInterrupt(uint8 instance)
+{
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+    DevAssert(LPTMR_INSTANCE_COUNT > instance);
+#endif
+    /* Disable LPTMR interrupt */
+    Lptmr_Gpt_Ip_InterruptEnable(instance, FALSE);
+    /* Clear interrupt flag */
+    Lptmr_Gpt_Ip_ClearCompareFlag(instance, LPTMR_CSR_TCF_MASK);
+
+}
+
+#if (LPTMR_GPT_IP_SET_CLOCK_MODE == STD_ON)
+/*================================================================================================*/
+/**
+* @brief        The function changes the LPtimer prescaler value.
+* @details      This function sets the LPtimer prescaler based on the input mode.
+*
+* @param[in]    instance     Lptmr hardware instance
+* @param[in]    clockMode    LPTMR_GPT_IP_CLOCKMODE_NORMAL or LPTMR_GPT_IP_CLOCKMODE_ALTERNATE
+*
+* @return       void
+* @pre          The driver needs to be initialized.On/Off by the configuration parameter: GPT_DUAL_CLOCK_MODE
+* @implements   Lptmr_Gpt_Ip_SetClockMode_Activity
+*/
+void Lptmr_Gpt_Ip_SetClockMode(uint8 instance, Lptmr_Gpt_Ip_ClockModeType clockMode)
+{
+#if LPTMR_GPT_IP_DEV_ERROR_DETECT == STD_ON
+DevAssert(LPTMR_INSTANCE_COUNT > instance);
+#endif
+
+    /* Set Prescaler */
+    if(LPTMR_GPT_IP_CLOCKMODE_NORMAL == clockMode)
+    {
+        Lptmr_Gpt_Ip_SetPrescaler(instance, Lptmr_Gpt_Ip_u32InstanceState[instance].clockPrescaler);
+    }
+    else
+    {
+        Lptmr_Gpt_Ip_SetPrescaler(instance, Lptmr_Gpt_Ip_u32InstanceState[instance].clockAlternatePrescaler);
+    }
+
+}
+#endif/*LPTMR_GPT_IP_SET_CLOCK_MODE*/
+
+#ifdef LPTMR_0_CH_0_ISR_USED
+/*================================================================================================*/
+/**
+* @brief          Interrupt handler for RTC channel
+* @details        Interrupt Service Routine corresponding to Gpt_RTC_Ch_0 hw channel.
+* @param[in]      none
+* @return         void
+* @isr
+* @pre            The driver needs to be initialized.
+*/
+ISR(Lptmr_0_Ch_0_ISR)
+{
+    Lptmr_Gpt_Ip_ProcessCommonInterrupt(0U);
+    EXIT_INTERRUPT();
+}
+#endif
+
+#define GPT_STOP_SEC_CODE
+#include "Gpt_MemMap.h"
+
+#endif /* LPTMR_GPT_IP_USED == STD_ON */
+#ifdef __cplusplus
+}
+#endif /*LPTMR_GPT_IP_C*/
+
+/** @} */

RTD/src/Lpuart_Uart_Ip.c

@@ -27,8 +27,7 @@
 *   @addtogroup  lpuart_uart_ip Lpuart UART IPL
 *   @{
 */
-#include "Port.h"
-#include "Dio.h"
+
 #ifdef __cplusplus
 extern "C"{
 #endif

RTD/src/OsIf_Timer.c

@@ -8,7 +8,7 @@
 * Autosar Revision : ASR_REL_4_4_REV_0000
 * Autosar Conf.Variant :
 * SW Version : 1.0.0
-* Build Version : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 * (c) Copyright 2020-2021 NXP Semiconductors
 * All Rights Reserved.

RTD/src/OsIf_Timer_System.c

@@ -8,7 +8,7 @@
 * Autosar Revision : ASR_REL_4_4_REV_0000
 * Autosar Conf.Variant :
 * SW Version : 1.0.0
-* Build Version : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+* Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 * (c) Copyright 2020-2021 NXP Semiconductors
 * All Rights Reserved.

RTD/src/Pdb_Adc_Ip.c

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.

RTD/src/Pdb_Adc_Ip_Isr.c

@@ -8,7 +8,7 @@
 *   Autosar Revision     : ASR_REL_4_4_REV_0000
 *   Autosar Conf.Variant :
 *   SW Version           : 1.0.0
-*   Build Version        : S32K1_RTD_1_0_0_D2108_ASR_REL_4_4_REV_0000_20210810
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 *
 *   (c) Copyright 2020-2021 NXP Semiconductors
 *   All Rights Reserved.