Home Esplora Aiuto
Registrati Accedi
RuiLiWuLian
/
4G
2
0
Forka 0
File Problemi 0 Pull Requests 0 Wiki
Sfoglia il codice sorgente

新建4G

CHENJIE-PC\QiXiang_CHENJIE 3 anni fa
commit
f8994b3143
100 ha cambiato i file con 51105 aggiunte e 0 eliminazioni
Visualizzazione separata Mostra Diff Stats
  1. 776 0
      .cproject
  2. 1 0
      .gitignore
  3. 26 0
      .project
  4. 2 0
      .settings/com.freescale.s32ds.cross.sdk.support.prefs
  5. 0 0
      .settings/com.nxp.s32ds.cle.ide.sdk.attached.sdks.data.prefs
  6. 9 0
      .settings/com.nxp.s32ds.cle.runtime.component.prefs
  7. 47 0
      .settings/language.settings.xml
  8. 3 0
      .settings/org.eclipse.cdt.codan.core.prefs
  9. 33 0
      .settings/org.eclipse.cdt.core.prefs
  10. 363 0
      FreeRTOS/Source/croutine.c
  11. 775 0
      FreeRTOS/Source/event_groups.c
  12. 1352 0
      FreeRTOS/Source/include/FreeRTOS.h
  13. 174 0
      FreeRTOS/Source/include/FreeRTOSConfig.h
  14. 34 0
      FreeRTOS/Source/include/StackMacros.h
  15. 419 0
      FreeRTOS/Source/include/atomic.h
  16. 753 0
      FreeRTOS/Source/include/croutine.h
  17. 281 0
      FreeRTOS/Source/include/deprecated_definitions.h
  18. 777 0
      FreeRTOS/Source/include/event_groups.h
  19. 499 0
      FreeRTOS/Source/include/list.h
  20. 823 0
      FreeRTOS/Source/include/message_buffer.h
  21. 259 0
      FreeRTOS/Source/include/mpu_prototypes.h
  22. 186 0
      FreeRTOS/Source/include/mpu_wrappers.h
  23. 223 0
      FreeRTOS/Source/include/portable.h
  24. 122 0
      FreeRTOS/Source/include/projdefs.h
  25. 1722 0
      FreeRTOS/Source/include/queue.h
  26. 1175 0
      FreeRTOS/Source/include/semphr.h
  27. 129 0
      FreeRTOS/Source/include/stack_macros.h
  28. 869 0
      FreeRTOS/Source/include/stream_buffer.h
  29. 3063 0
      FreeRTOS/Source/include/task.h
  30. 1353 0
      FreeRTOS/Source/include/timers.h
  31. 215 0
      FreeRTOS/Source/list.c
  32. 785 0
      FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
  33. 245 0
      FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
  34. 504 0
      FreeRTOS/Source/portable/MemMang/heap_4.c
  35. 3074 0
      FreeRTOS/Source/queue.c
  36. 1306 0
      FreeRTOS/Source/stream_buffer.c
  37. 5406 0
      FreeRTOS/Source/tasks.c
  38. 1118 0
      FreeRTOS/Source/timers.c
  39. 219 0
      Project_Settings/Debugger/S32K146_4G_Debug_FLASH_PNE.launch
  40. 210 0
      Project_Settings/Debugger/S32K146_4G_Debug_RAM_PNE.launch
  41. 210 0
      Project_Settings/Debugger/S32K146_4G_Release_FLASH_PNE.launch
  42. 210 0
      Project_Settings/Debugger/S32K146_4G_Release_RAM_PNE.launch
  43. 230 0
      Project_Settings/Linker_Files/linker_flash_s32k146.ld
  44. 183 0
      Project_Settings/Linker_Files/linker_ram_s32k146.ld
  45. 247 0
      Project_Settings/Startup_Code/Vector_Table.s
  46. 191 0
      Project_Settings/Startup_Code/exceptions.c
  47. 126 0
      Project_Settings/Startup_Code/nvic.c
  48. 186 0
      Project_Settings/Startup_Code/startup.c
  49. 345 0
      Project_Settings/Startup_Code/startup_cm4.s
  50. 397 0
      Project_Settings/Startup_Code/system.c
  51. 1993 0
      RTD/include/CDD_Mcl.h
  52. 100 0
      RTD/include/CDD_Mcl_Ipw.h
  53. 128 0
      RTD/include/CDD_Mcl_Irq.h
  54. 250 0
      RTD/include/Cache_Ip.h
  55. 116 0
      RTD/include/Cache_Ip_Devassert.h
  56. 99 0
      RTD/include/Cache_Ip_Types.h
  57. 630 0
      RTD/include/Can.h
  58. 124 0
      RTD/include/CanIf.h
  59. 104 0
      RTD/include/CanIf_Can.h
  60. 77 0
      RTD/include/CanIf_Types.h
  61. 478 0
      RTD/include/Can_Flexcan_Types.h
  62. 327 0
      RTD/include/Can_Ipw.h
  63. 133 0
      RTD/include/Can_Ipw_Irq.h
  64. 176 0
      RTD/include/Can_Ipw_Types.h
  65. 158 0
      RTD/include/Can_Irq.h
  66. 298 0
      RTD/include/Clock_Ip.h
  67. 509 0
      RTD/include/Clock_Ip_Private.h
  68. 453 0
      RTD/include/Clock_Ip_Specific.h
  69. 2502 0
      RTD/include/Clock_Ip_Types.h
  70. 167 0
      RTD/include/Det.h
  71. 100 0
      RTD/include/Det_stub.h
  72. 401 0
      RTD/include/Dio.h
  73. 202 0
      RTD/include/Dio_Ipw.h
  74. 666 0
      RTD/include/Dma_Ip.h
  75. 116 0
      RTD/include/Dma_Ip_Devassert.h
  76. 105 0
      RTD/include/Dma_Ip_Irq.h
  77. 117 0
      RTD/include/Dma_Ip_Multicore.h
  78. 438 0
      RTD/include/Dma_Ip_Types.h
  79. 125 0
      RTD/include/EcuM.h
  80. 122 0
      RTD/include/EcuM_Externals.h
  81. 1000 0
      RTD/include/FlexCAN_Ip.h
  82. 176 0
      RTD/include/FlexCAN_Ip_DeviceReg.h
  83. 1921 0
      RTD/include/FlexCAN_Ip_HwAccess.h
  84. 112 0
      RTD/include/FlexCAN_Ip_Irq.h
  85. 616 0
      RTD/include/FlexCAN_Ip_Types.h
  86. 395 0
      RTD/include/FlexCAN_Ip_Wrapper.h
  87. 215 0
      RTD/include/Flexio_Mcl_Ip.h
  88. 341 0
      RTD/include/Flexio_Mcl_Ip_HwAccess.h
  89. 137 0
      RTD/include/Flexio_Mcl_Ip_Types.h
  90. 305 0
      RTD/include/Flexio_Uart_Ip.h
  91. 416 0
      RTD/include/Flexio_Uart_Ip_HwAccess.h
  92. 164 0
      RTD/include/Flexio_Uart_Ip_Irq.h
  93. 277 0
      RTD/include/Flexio_Uart_Ip_Types.h
  94. 127 0
      RTD/include/Ftm_Mcl_Ip.h
  95. 273 0
      RTD/include/Gpio_Dio_Ip.h
  96. 359 0
      RTD/include/IntCtrl_Ip.h
  97. 87 0
      RTD/include/IntCtrl_Ip_DeviceRegisters.h
  98. 202 0
      RTD/include/IntCtrl_Ip_TypesDef.h
  99. 371 0
      RTD/include/Lpuart_Uart_Ip.h
  100. 742 0
      RTD/include/Lpuart_Uart_Ip_HwAccess.h

+ 776 - 0
.cproject
Vedi File 

@@ -0,0 +1,776 @@
 
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
 
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
 
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
 
+		<cconfiguration id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549">
 
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549" moduleId="org.eclipse.cdt.core.settings" name="Debug_FLASH">
 
+				<externalSettings/>
 
+				<extensions>
 
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
 
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="com.freescale.s32ds.cdt.core.errorParsers.S32DSGNULinkerErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+				</extensions>
 
+			</storageModule>
 
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
 
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="com.nxp.s32ds.cle.arm.mbs.arm32.bare.buildArtefact.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.nxp.s32ds.cle.arm.mbs.arm32.bare.buildArtefact.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549" name="Debug_FLASH" parent="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug">
 
+					<folderInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549." name="/" resourcePath="">
 
+						<toolChain id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.toolchain.debug.1669149124" name="NXP GCC 9.2 for Arm 32-bit Bare-Metal" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.toolchain.debug">
 
+							<option defaultValue="true" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.addtools.printsize.1799663837" name="Print size" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.addtools.printsize" valueType="boolean"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.compiler.path.434372331" name="Path" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.compiler.path" value="${S32DS_K1_ARM32_GNU_9_2_TOOLCHAIN_DIR}" valueType="string"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries.933777928" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu.912012235" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset.775672044" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset.thumb" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness.823522198" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness.little" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi.2049331992" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit.515607088" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="cdt.managedbuild.targetPlatform.gnu.cross.64147430" isAbstract="false" osList="all" superClass="cdt.managedbuild.targetPlatform.gnu.cross"/>
 
+							<builder buildPath="${workspace_loc:/S32K146_4G}/Debug_FLASH" id="com.freescale.s32ds.cross.gnu.builder.466747471" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="FSL Make Builder" superClass="com.freescale.s32ds.cross.gnu.builder"/>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.1980082058" name="Standard S32DS C Compiler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler">
 
+								<option defaultValue="gnu.c.optimization.level.none" id="gnu.c.compiler.option.optimization.level.1168627068" name="Optimization Level" superClass="gnu.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="gnu.c.optimization.level.none" valueType="enumerated"/>
 
+								<option defaultValue="gnu.c.debugging.level.max" id="gnu.c.compiler.option.debugging.level.1120041103" name="Debug Level" superClass="gnu.c.compiler.option.debugging.level" useByScannerDiscovery="false" value="gnu.c.debugging.level.none" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.functionsections.1916093778" name="Function sections (-ffunction-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.functionsections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.datasections.499071697" name="Data sections (-fdata-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.datasections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.debugging.format.155687014" name="Debug format" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.debugging.format" useByScannerDiscovery="true"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries.334102120" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.sysroot.2141010934" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.sysroot" useByScannerDiscovery="false" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.include.paths.203066772" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="../RTD/include"/>
 
+									<listOptionValue builtIn="false" value="../FreeRTOS/Source/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/GCC/ARM_CM4F}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/MemMang}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable}&quot;"/>
 
+									<listOptionValue builtIn="false" value="${ProjDirPath}/generate/include"/>
 
+									<listOptionValue builtIn="false" value="${ProjDirPath}/RTD/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/board&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu.788410825" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.preprocessor.def.symbols.258671052" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" useByScannerDiscovery="false" valueType="definedSymbols">
 
+									<listOptionValue builtIn="false" value="CPU_S32K146"/>
 
+									<listOptionValue builtIn="false" value="I_CACHE_ENABLE"/>
 
+									<listOptionValue builtIn="false" value="ENABLE_FPU"/>
 
+									<listOptionValue builtIn="false" value="GCC"/>
 
+									<listOptionValue builtIn="false" value="S32K1XX"/>
 
+									<listOptionValue builtIn="false" value="S32K146"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset.1838915511" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std.1417396713" name="Language standard" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std.c99" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness.2111908952" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="gnu.c.compiler.option.debugging.other.1875317800" name="Other debugging flags" superClass="gnu.c.compiler.option.debugging.other" useByScannerDiscovery="false" value="-ggdb3" valueType="string"/>
 
+								<option id="gnu.c.compiler.option.warnings.pedantic.984548499" name="Pedantic (-pedantic)" superClass="gnu.c.compiler.option.warnings.pedantic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 
+								<option id="gnu.c.compiler.option.warnings.extrawarn.1900261880" name="Extra warnings (-Wextra)" superClass="gnu.c.compiler.option.warnings.extrawarn" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.unused.328808949" name="Warn on various unused elements (-Wunused)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.unused" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.unsignedbitfields.1266318887" name="'bitfield' is unsigned (-funsigned-bitfields)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.unsignedbitfields" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi.1441299930" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit.1957587383" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.nocommon.1508403691" name="No common uninitialized (-fno-common)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.nocommon" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="gnu.c.compiler.option.optimization.flags.667443811" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" useByScannerDiscovery="false" value="-funsigned-char -fstack-usage -fdump-ipa-all -fomit-frame-pointer" valueType="string"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.other.92445213" name="Other warning flags" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.other" useByScannerDiscovery="true" value="-Wstrict-prototypes -Wsign-compare -Werror=implicit-function-declaration -Wundef -Wdouble-promotion" valueType="string"/>
 
+								<option id="gnu.c.compiler.option.misc.other.1541295530" name="Other flags" superClass="gnu.c.compiler.option.misc.other" useByScannerDiscovery="false" value="-c -fno-short-enums" valueType="string"/>
 
+								<inputType id="cdt.managedbuild.tool.gnu.c.compiler.input.401747511" superClass="cdt.managedbuild.tool.gnu.c.compiler.input"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.compiler.1360480314" name="Standard S32DS C++ Compiler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.compiler">
 
+								<option id="gnu.cpp.compiler.option.optimization.level.61547632" name="Optimization Level" superClass="gnu.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="gnu.cpp.compiler.optimization.level.none" valueType="enumerated"/>
 
+								<option defaultValue="gnu.cpp.compiler.debugging.level.max" id="gnu.cpp.compiler.option.debugging.level.959325868" name="Debug Level" superClass="gnu.cpp.compiler.option.debugging.level" useByScannerDiscovery="false" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.functionsections.685293854" name="Function sections (-ffunction-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.functionsections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.datasections.605720632" name="Data sections (-fdata-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.datasections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.debugging.format.1630021352" name="Debug format" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.debugging.format" useByScannerDiscovery="true"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries.992408870" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.sysroot.962316341" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.sysroot" useByScannerDiscovery="false" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.cpp.compiler.option.include.paths.1429489325" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu.694059838" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.cpp.compiler.option.preprocessor.def.76163339" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" useByScannerDiscovery="false" valueType="definedSymbols">
 
+									<listOptionValue builtIn="false" value="CPU_S32K146"/>
 
+									<listOptionValue builtIn="false" value="S32K146"/>
 
+									<listOptionValue builtIn="false" value="S32K1XX"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset.1178702533" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness.746929375" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi.876312129" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit.237850730" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.linker.1997644081" name="Standard S32DS C Linker" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.linker">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.linker.option.gcsections.1484145597" name="Remove unused sections (-Xlinker --gc-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.option.gcsections" value="false" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries.1478856746" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.sysroot.87857832" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu.225477617" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.freescale.s32ds.cross.gnu.tool.c.linker.option.scriptfile.1071620537" name="Script files (-T)" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.option.scriptfile" valueType="stringList">
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/Project_Settings/Linker_Files/linker_flash_s32k146.ld&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset.1152158946" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness.991000104" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi.1989513358" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit.1468430786" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<option id="gnu.c.link.option.ldflags.1002666294" name="Linker flags" superClass="gnu.c.link.option.ldflags" value="--entry=Reset_Handler -ggdb3" valueType="string"/>
 
+								<option id="gnu.c.link.option.nostart.970867213" name="Do not use standard start files (-nostartfiles)" superClass="gnu.c.link.option.nostart" value="true" valueType="boolean"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.link.option.libs.2096560342" name="Libraries (-l)" superClass="gnu.c.link.option.libs" valueType="libs">
 
+									<listOptionValue builtIn="false" value="c"/>
 
+									<listOptionValue builtIn="false" value="m"/>
 
+									<listOptionValue builtIn="false" value="gcc"/>
 
+								</option>
 
+								<inputType id="com.freescale.s32ds.cross.gnu.tool.c.linker.inputType.scriptfile.223205338" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.inputType.scriptfile"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.linker.2010049876" name="Standard S32DS C++ Linker" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.linker">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.linker.option.gcsections.261623701" name="Remove unused sections (-Xlinker --gc-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.linker.option.gcsections" value="true" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries.2133622679" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.sysroot.1660798688" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu.1496913249" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset.1237595604" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness.395475268" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi.1916612348" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit.437003658" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.archiver.50914677" name="Standard S32DS Archiver" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.archiver"/>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.339533218" name="Standard S32DS Assembler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.assembler.usepreprocessor.608521688" name="Use preprocessor" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.usepreprocessor" value="true" valueType="boolean"/>
 
+								<option defaultValue="gnu.c.debugging.level.max" id="com.freescale.s32ds.cross.gnu.tool.assembler.option.debugging.level.935781758" name="Debug Level" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.option.debugging.level" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries.2115819142" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.sysroot.1519150514" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.both.asm.option.include.paths.763521555" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="../RTD/include"/>
 
+									<listOptionValue builtIn="false" value="../FreeRTOS/Source/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/GCC/ARM_CM4F}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/MemMang}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/generate/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/RTD/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/board&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu.1538908586" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset.1659079625" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness.246218978" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi.1586904906" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit.1665512193" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<inputType id="cdt.managedbuild.tool.gnu.assembler.input.1966293971" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
 
+								<inputType id="com.freescale.s32ds.cross.gnu.tool.assembler.inputType.asmfile.1184782747" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.inputType.asmfile"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.createflash.655082520" name="Standard S32DS Create Flash Image" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.createflash"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.tool.createlisting.958717661" name="Standard S32DS Create Listing" superClass="com.freescale.s32ds.cross.gnu.tool.createlisting">
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.source.623943954" name="Display source (--source|-S)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.source" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.allheaders.743274389" name="Display all headers (--all-headers|-x)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.allheaders" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.demangle.1384457181" name="Demangle names (--demangle|-C)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.demangle" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.linenumbers.1609242598" name="Display line numbers (--line-numbers|-l)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.linenumbers" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.wide.1276236855" name="Wide lines (--wide|-w)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.wide" value="true" valueType="boolean"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.printsize.1466716249" name="Standard S32DS Print Size" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.printsize">
 
+								<option id="com.freescale.s32ds.cross.gnu.option.printsize.format.1897015732" name="Size format" superClass="com.freescale.s32ds.cross.gnu.option.printsize.format"/>
 
+							</tool>
 
+							<tool id="com.freescale.s32ds.cross.gnu.c.preprocessor.179719808" name="Standard S32DS C Preprocessor" superClass="com.freescale.s32ds.cross.gnu.c.preprocessor"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.cpp.preprocessor.2124652268" name="Standard S32DS C++ Preprocessor" superClass="com.freescale.s32ds.cross.gnu.cpp.preprocessor"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.disassembler.1213150737" name="Standard S32DS Disassembler" superClass="com.freescale.s32ds.cross.gnu.disassembler"/>
 
+						</toolChain>
 
+					</folderInfo>
 
+					<fileInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549.Project_Settings/Debugger" name="Debugger" rcbsApplicability="disable" resourcePath="Project_Settings/Debugger" toolsToInvoke=""/>
 
+					<fileInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549.Project_Settings/Linker_Files" name="Linker_Files" rcbsApplicability="disable" resourcePath="Project_Settings/Linker_Files" toolsToInvoke=""/>
 
+					<sourceEntries>
 
+						<entry excluding="Linker_Files|Debugger" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Project_Settings"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="RTD"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="board"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="generate"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="src"/>
 
+						<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="FreeRTOS"/>
 
+					</sourceEntries>
 
+				</configuration>
 
+			</storageModule>
 
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
 
+		</cconfiguration>
 
+		<cconfiguration id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412">
 
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412" moduleId="org.eclipse.cdt.core.settings" name="Release_FLASH">
 
+				<externalSettings/>
 
+				<extensions>
 
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
 
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="com.freescale.s32ds.cdt.core.errorParsers.S32DSGNULinkerErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+				</extensions>
 
+			</storageModule>
 
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
 
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="com.nxp.s32ds.cle.arm.mbs.arm32.bare.buildArtefact.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.nxp.s32ds.cle.arm.mbs.arm32.bare.buildArtefact.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" description="" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412" name="Release_FLASH" parent="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release">
 
+					<folderInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412." name="/" resourcePath="">
 
+						<toolChain id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.toolchain.release.271467363" name="NXP GCC 9.2 for Arm 32-bit Bare-Metal" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.toolchain.release">
 
+							<option defaultValue="true" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.addtools.printsize.2072393229" name="Print size" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.addtools.printsize" valueType="boolean"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.compiler.path.518034589" name="Path" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.compiler.path" value="${S32DS_K1_ARM32_GNU_9_2_TOOLCHAIN_DIR}" valueType="string"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries.681396793" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu.1833852163" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset.321281138" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset.thumb" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness.107520816" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness.little" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi.664194733" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit.1972236806" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="cdt.managedbuild.targetPlatform.gnu.cross.2083105389" isAbstract="false" osList="all" superClass="cdt.managedbuild.targetPlatform.gnu.cross"/>
 
+							<builder buildPath="${workspace_loc:/S32K146_4G}/Release_FLASH" id="com.freescale.s32ds.cross.gnu.builder.1672811342" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="FSL Make Builder" superClass="com.freescale.s32ds.cross.gnu.builder"/>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.980010937" name="Standard S32DS C Compiler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler">
 
+								<option defaultValue="gnu.c.optimization.level.most" id="gnu.c.compiler.option.optimization.level.927644" name="Optimization Level" superClass="gnu.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="gnu.c.optimization.level.size" valueType="enumerated"/>
 
+								<option defaultValue="gnu.c.debugging.level.none" id="gnu.c.compiler.option.debugging.level.2046702127" name="Debug Level" superClass="gnu.c.compiler.option.debugging.level" useByScannerDiscovery="false" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.functionsections.901472497" name="Function sections (-ffunction-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.functionsections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.datasections.19328425" name="Data sections (-fdata-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.datasections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.debugging.format.248905173" name="Debug format" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.debugging.format" useByScannerDiscovery="true"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries.642272549" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.sysroot.745096310" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.sysroot" useByScannerDiscovery="false" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.include.paths.592054341" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="../RTD/include"/>
 
+									<listOptionValue builtIn="false" value="../FreeRTOS/Source/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/GCC/ARM_CM4F}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/MemMang}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable}&quot;"/>
 
+									<listOptionValue builtIn="false" value="${ProjDirPath}/generate/include"/>
 
+									<listOptionValue builtIn="false" value="${ProjDirPath}/RTD/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/board&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu.73589440" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.preprocessor.def.symbols.840544850" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" useByScannerDiscovery="false" valueType="definedSymbols">
 
+									<listOptionValue builtIn="false" value="CPU_S32K146"/>
 
+									<listOptionValue builtIn="false" value="I_CACHE_ENABLE"/>
 
+									<listOptionValue builtIn="false" value="ENABLE_FPU"/>
 
+									<listOptionValue builtIn="false" value="GCC"/>
 
+									<listOptionValue builtIn="false" value="S32K1XX"/>
 
+									<listOptionValue builtIn="false" value="S32K146"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset.278845860" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std.1582895581" name="Language standard" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std.c99" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness.1475662671" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="gnu.c.compiler.option.debugging.other.72988407" name="Other debugging flags" superClass="gnu.c.compiler.option.debugging.other" useByScannerDiscovery="false" value="-ggdb3" valueType="string"/>
 
+								<option id="gnu.c.compiler.option.warnings.pedantic.1456942666" name="Pedantic (-pedantic)" superClass="gnu.c.compiler.option.warnings.pedantic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 
+								<option id="gnu.c.compiler.option.warnings.extrawarn.1213855016" name="Extra warnings (-Wextra)" superClass="gnu.c.compiler.option.warnings.extrawarn" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.unused.1138047921" name="Warn on various unused elements (-Wunused)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.unused" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.unsignedbitfields.709093071" name="'bitfield' is unsigned (-funsigned-bitfields)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.unsignedbitfields" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi.1230854436" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit.1819251672" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.nocommon.1296679375" name="No common uninitialized (-fno-common)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.nocommon" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="gnu.c.compiler.option.optimization.flags.1196366922" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" useByScannerDiscovery="false" value="-funsigned-char -fstack-usage -fdump-ipa-all -fomit-frame-pointer" valueType="string"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.other.636466313" name="Other warning flags" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.other" useByScannerDiscovery="true" value="-Wstrict-prototypes -Wsign-compare -Werror=implicit-function-declaration -Wundef -Wdouble-promotion" valueType="string"/>
 
+								<option id="gnu.c.compiler.option.misc.other.677261149" name="Other flags" superClass="gnu.c.compiler.option.misc.other" useByScannerDiscovery="false" value="-c -fno-short-enums" valueType="string"/>
 
+								<inputType id="cdt.managedbuild.tool.gnu.c.compiler.input.1499052172" superClass="cdt.managedbuild.tool.gnu.c.compiler.input"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.compiler.265477566" name="Standard S32DS C++ Compiler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.compiler">
 
+								<option id="gnu.cpp.compiler.option.optimization.level.1482025365" name="Optimization Level" superClass="gnu.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="gnu.cpp.compiler.optimization.level.most" valueType="enumerated"/>
 
+								<option defaultValue="gnu.cpp.compiler.debugging.level.none" id="gnu.cpp.compiler.option.debugging.level.87841425" name="Debug Level" superClass="gnu.cpp.compiler.option.debugging.level" useByScannerDiscovery="false" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.functionsections.1899155053" name="Function sections (-ffunction-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.functionsections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.datasections.1208594326" name="Data sections (-fdata-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.datasections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.debugging.format.491172039" name="Debug format" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.debugging.format" useByScannerDiscovery="true"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries.2134392800" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.sysroot.968986164" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.sysroot" useByScannerDiscovery="false" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.cpp.compiler.option.include.paths.2094680691" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu.633518597" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.cpp.compiler.option.preprocessor.def.893037895" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" useByScannerDiscovery="false" valueType="definedSymbols">
 
+									<listOptionValue builtIn="false" value="CPU_S32K146"/>
 
+									<listOptionValue builtIn="false" value="S32K146"/>
 
+									<listOptionValue builtIn="false" value="S32K1XX"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset.1854410327" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness.243179814" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi.1703369267" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit.1950165703" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.linker.1219001004" name="Standard S32DS C Linker" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.linker">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.linker.option.gcsections.719180971" name="Remove unused sections (-Xlinker --gc-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.option.gcsections" value="false" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries.1860564520" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.sysroot.447929725" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu.676667066" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.freescale.s32ds.cross.gnu.tool.c.linker.option.scriptfile.121045587" name="Script files (-T)" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.option.scriptfile" valueType="stringList">
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/Project_Settings/Linker_Files/linker_flash_s32k146.ld&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset.1047256684" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness.297202191" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi.762738208" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit.271612683" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<option id="gnu.c.link.option.ldflags.340435510" name="Linker flags" superClass="gnu.c.link.option.ldflags" value="--entry=Reset_Handler -ggdb3" valueType="string"/>
 
+								<option id="gnu.c.link.option.nostart.225431596" name="Do not use standard start files (-nostartfiles)" superClass="gnu.c.link.option.nostart" value="true" valueType="boolean"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.link.option.libs.1624015402" name="Libraries (-l)" superClass="gnu.c.link.option.libs" valueType="libs">
 
+									<listOptionValue builtIn="false" value="c"/>
 
+									<listOptionValue builtIn="false" value="m"/>
 
+									<listOptionValue builtIn="false" value="gcc"/>
 
+								</option>
 
+								<inputType id="com.freescale.s32ds.cross.gnu.tool.c.linker.inputType.scriptfile.506801160" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.inputType.scriptfile"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.linker.333199807" name="Standard S32DS C++ Linker" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.linker">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.linker.option.gcsections.2140567247" name="Remove unused sections (-Xlinker --gc-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.linker.option.gcsections" value="true" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries.1819955675" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.sysroot.1066858215" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu.272149159" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset.51568955" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness.499673861" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi.626743802" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit.811421281" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.archiver.1081678089" name="Standard S32DS Archiver" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.archiver"/>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.1902291486" name="Standard S32DS Assembler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.assembler.usepreprocessor.213894572" name="Use preprocessor" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.usepreprocessor" value="true" valueType="boolean"/>
 
+								<option defaultValue="gnu.c.debugging.level.none" id="com.freescale.s32ds.cross.gnu.tool.assembler.option.debugging.level.678370342" name="Debug Level" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.option.debugging.level" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries.1286924921" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.sysroot.1249287208" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.both.asm.option.include.paths.1369200527" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="../RTD/include"/>
 
+									<listOptionValue builtIn="false" value="../FreeRTOS/Source/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/GCC/ARM_CM4F}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/MemMang}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/generate/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/RTD/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/board&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu.570502433" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset.289068700" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness.599299528" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi.364832478" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit.1074661998" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<inputType id="cdt.managedbuild.tool.gnu.assembler.input.1732115841" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
 
+								<inputType id="com.freescale.s32ds.cross.gnu.tool.assembler.inputType.asmfile.1768243172" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.inputType.asmfile"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.createflash.1620525514" name="Standard S32DS Create Flash Image" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.createflash"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.tool.createlisting.1274587231" name="Standard S32DS Create Listing" superClass="com.freescale.s32ds.cross.gnu.tool.createlisting">
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.source.186864436" name="Display source (--source|-S)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.source" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.allheaders.256461967" name="Display all headers (--all-headers|-x)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.allheaders" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.demangle.1385936554" name="Demangle names (--demangle|-C)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.demangle" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.linenumbers.98151312" name="Display line numbers (--line-numbers|-l)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.linenumbers" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.wide.2038774731" name="Wide lines (--wide|-w)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.wide" value="true" valueType="boolean"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.printsize.1382718131" name="Standard S32DS Print Size" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.printsize">
 
+								<option id="com.freescale.s32ds.cross.gnu.option.printsize.format.20453185" name="Size format" superClass="com.freescale.s32ds.cross.gnu.option.printsize.format"/>
 
+							</tool>
 
+							<tool id="com.freescale.s32ds.cross.gnu.c.preprocessor.316620649" name="Standard S32DS C Preprocessor" superClass="com.freescale.s32ds.cross.gnu.c.preprocessor"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.cpp.preprocessor.1272778470" name="Standard S32DS C++ Preprocessor" superClass="com.freescale.s32ds.cross.gnu.cpp.preprocessor"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.disassembler.434088168" name="Standard S32DS Disassembler" superClass="com.freescale.s32ds.cross.gnu.disassembler"/>
 
+						</toolChain>
 
+					</folderInfo>
 
+					<fileInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412.Project_Settings/Debugger" name="Debugger" rcbsApplicability="disable" resourcePath="Project_Settings/Debugger" toolsToInvoke=""/>
 
+					<fileInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412.Project_Settings/Linker_Files" name="Linker_Files" rcbsApplicability="disable" resourcePath="Project_Settings/Linker_Files" toolsToInvoke=""/>
 
+					<sourceEntries>
 
+						<entry excluding="Linker_Files|Debugger" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Project_Settings"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="RTD"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="board"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="generate"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="src"/>
 
+						<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="FreeRTOS"/>
 
+					</sourceEntries>
 
+				</configuration>
 
+			</storageModule>
 
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
 
+		</cconfiguration>
 
+		<cconfiguration id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771">
 
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771" moduleId="org.eclipse.cdt.core.settings" name="Debug_RAM">
 
+				<externalSettings/>
 
+				<extensions>
 
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
 
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="com.freescale.s32ds.cdt.core.errorParsers.S32DSGNULinkerErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+				</extensions>
 
+			</storageModule>
 
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
 
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="com.nxp.s32ds.cle.arm.mbs.arm32.bare.buildArtefact.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.nxp.s32ds.cle.arm.mbs.arm32.bare.buildArtefact.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771" name="Debug_RAM" parent="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram">
 
+					<folderInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771." name="/" resourcePath="">
 
+						<toolChain id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.toolchain.debug.ram.467522861" name="NXP GCC 9.2 for Arm 32-bit Bare-Metal" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.toolchain.debug.ram">
 
+							<option defaultValue="true" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.addtools.printsize.1647129565" name="Print size" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.addtools.printsize" valueType="boolean"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.compiler.path.1014772534" name="Path" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.compiler.path" value="${S32DS_K1_ARM32_GNU_9_2_TOOLCHAIN_DIR}" valueType="string"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries.1004826758" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu.815997375" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset.1658176427" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset.thumb" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness.1610097669" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness.little" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi.2029712875" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit.562744595" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="cdt.managedbuild.targetPlatform.gnu.cross.648083291" isAbstract="false" osList="all" superClass="cdt.managedbuild.targetPlatform.gnu.cross"/>
 
+							<builder buildPath="${workspace_loc:/S32K146_4G}/Debug_RAM" id="com.freescale.s32ds.cross.gnu.builder.1664306776" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="FSL Make Builder" superClass="com.freescale.s32ds.cross.gnu.builder"/>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.611103080" name="Standard S32DS C Compiler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler">
 
+								<option defaultValue="gnu.c.optimization.level.none" id="gnu.c.compiler.option.optimization.level.1886669623" name="Optimization Level" superClass="gnu.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="gnu.c.optimization.level.size" valueType="enumerated"/>
 
+								<option defaultValue="gnu.c.debugging.level.max" id="gnu.c.compiler.option.debugging.level.740911444" name="Debug Level" superClass="gnu.c.compiler.option.debugging.level" useByScannerDiscovery="false" value="gnu.c.debugging.level.none" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.functionsections.12908712" name="Function sections (-ffunction-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.functionsections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.datasections.196389750" name="Data sections (-fdata-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.datasections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.debugging.format.1852119064" name="Debug format" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.debugging.format" useByScannerDiscovery="true"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries.1160366230" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.sysroot.558901589" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.sysroot" useByScannerDiscovery="false" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.include.paths.586265872" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="../RTD/include"/>
 
+									<listOptionValue builtIn="false" value="../FreeRTOS/Source/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/GCC/ARM_CM4F}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/MemMang}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable}&quot;"/>
 
+									<listOptionValue builtIn="false" value="${ProjDirPath}/generate/include"/>
 
+									<listOptionValue builtIn="false" value="${ProjDirPath}/RTD/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/board&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu.2006344641" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.preprocessor.def.symbols.1793415061" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" useByScannerDiscovery="false" valueType="definedSymbols">
 
+									<listOptionValue builtIn="false" value="CPU_S32K146"/>
 
+									<listOptionValue builtIn="false" value="I_CACHE_ENABLE"/>
 
+									<listOptionValue builtIn="false" value="ENABLE_FPU"/>
 
+									<listOptionValue builtIn="false" value="GCC"/>
 
+									<listOptionValue builtIn="false" value="S32K1XX"/>
 
+									<listOptionValue builtIn="false" value="S32K146"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset.1885797695" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std.2118062602" name="Language standard" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std.c99" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness.390892136" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="gnu.c.compiler.option.debugging.other.1900630700" name="Other debugging flags" superClass="gnu.c.compiler.option.debugging.other" useByScannerDiscovery="false" value="-ggdb3" valueType="string"/>
 
+								<option id="gnu.c.compiler.option.warnings.pedantic.1530100809" name="Pedantic (-pedantic)" superClass="gnu.c.compiler.option.warnings.pedantic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 
+								<option id="gnu.c.compiler.option.warnings.extrawarn.1441238867" name="Extra warnings (-Wextra)" superClass="gnu.c.compiler.option.warnings.extrawarn" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.unused.494637611" name="Warn on various unused elements (-Wunused)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.unused" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.unsignedbitfields.276824847" name="'bitfield' is unsigned (-funsigned-bitfields)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.unsignedbitfields" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi.29204094" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit.354275496" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.nocommon.1159141148" name="No common uninitialized (-fno-common)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.nocommon" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="gnu.c.compiler.option.optimization.flags.1033362763" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" useByScannerDiscovery="false" value="-funsigned-char -fstack-usage -fdump-ipa-all -fomit-frame-pointer" valueType="string"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.other.2042506394" name="Other warning flags" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.other" useByScannerDiscovery="true" value="-Wstrict-prototypes -Wsign-compare -Werror=implicit-function-declaration -Wundef -Wdouble-promotion" valueType="string"/>
 
+								<option id="gnu.c.compiler.option.misc.other.1902566803" name="Other flags" superClass="gnu.c.compiler.option.misc.other" useByScannerDiscovery="false" value="-c -fno-short-enums" valueType="string"/>
 
+								<inputType id="cdt.managedbuild.tool.gnu.c.compiler.input.1391965482" superClass="cdt.managedbuild.tool.gnu.c.compiler.input"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.compiler.1425848187" name="Standard S32DS C++ Compiler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.compiler">
 
+								<option id="gnu.cpp.compiler.option.optimization.level.275605176" name="Optimization Level" superClass="gnu.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="gnu.cpp.compiler.optimization.level.none" valueType="enumerated"/>
 
+								<option defaultValue="gnu.cpp.compiler.debugging.level.max" id="gnu.cpp.compiler.option.debugging.level.1215880574" name="Debug Level" superClass="gnu.cpp.compiler.option.debugging.level" useByScannerDiscovery="false" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.functionsections.2122935795" name="Function sections (-ffunction-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.functionsections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.datasections.717846992" name="Data sections (-fdata-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.datasections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.debugging.format.1684217455" name="Debug format" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.debugging.format" useByScannerDiscovery="true"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries.1097825515" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.sysroot.938321632" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.sysroot" useByScannerDiscovery="false" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.cpp.compiler.option.include.paths.671433325" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu.2123746767" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.cpp.compiler.option.preprocessor.def.527103247" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" useByScannerDiscovery="false" valueType="definedSymbols">
 
+									<listOptionValue builtIn="false" value="CPU_S32K146"/>
 
+									<listOptionValue builtIn="false" value="S32K146"/>
 
+									<listOptionValue builtIn="false" value="S32K1XX"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset.1113541874" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness.26362249" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi.2093171678" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit.798598944" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.linker.727013841" name="Standard S32DS C Linker" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.linker">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.linker.option.gcsections.645034267" name="Remove unused sections (-Xlinker --gc-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.option.gcsections" value="false" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries.1316470044" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.sysroot.627452615" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu.1512267649" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.freescale.s32ds.cross.gnu.tool.c.linker.option.scriptfile.1842822912" name="Script files (-T)" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.option.scriptfile" valueType="stringList">
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/Project_Settings/Linker_Files/linker_ram_s32k146.ld&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset.1683306225" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness.638497514" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi.1367979476" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit.1948486725" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<option id="gnu.c.link.option.ldflags.1876617691" name="Linker flags" superClass="gnu.c.link.option.ldflags" value="--entry=Reset_Handler -ggdb3" valueType="string"/>
 
+								<option id="gnu.c.link.option.nostart.419902549" name="Do not use standard start files (-nostartfiles)" superClass="gnu.c.link.option.nostart" value="true" valueType="boolean"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.link.option.libs.1908014548" name="Libraries (-l)" superClass="gnu.c.link.option.libs" valueType="libs">
 
+									<listOptionValue builtIn="false" value="c"/>
 
+									<listOptionValue builtIn="false" value="m"/>
 
+									<listOptionValue builtIn="false" value="gcc"/>
 
+								</option>
 
+								<inputType id="com.freescale.s32ds.cross.gnu.tool.c.linker.inputType.scriptfile.1767713702" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.inputType.scriptfile"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.linker.1473479974" name="Standard S32DS C++ Linker" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.linker">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.linker.option.gcsections.1062717314" name="Remove unused sections (-Xlinker --gc-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.linker.option.gcsections" value="true" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries.1607241945" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.sysroot.621407690" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu.1881949763" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset.461410859" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness.1950859600" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi.451159310" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit.1028806325" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.archiver.1918597209" name="Standard S32DS Archiver" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.archiver"/>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.2094811702" name="Standard S32DS Assembler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.assembler.usepreprocessor.396602889" name="Use preprocessor" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.usepreprocessor" value="true" valueType="boolean"/>
 
+								<option defaultValue="gnu.c.debugging.level.max" id="com.freescale.s32ds.cross.gnu.tool.assembler.option.debugging.level.2082463107" name="Debug Level" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.option.debugging.level" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries.1325224295" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.sysroot.886858011" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.both.asm.option.include.paths.1250405572" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="../RTD/include"/>
 
+									<listOptionValue builtIn="false" value="../FreeRTOS/Source/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/GCC/ARM_CM4F}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/MemMang}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/generate/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/RTD/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/board&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu.2036578229" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset.1119565045" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness.927364078" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi.1228260731" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit.574421527" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<inputType id="cdt.managedbuild.tool.gnu.assembler.input.629590692" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
 
+								<inputType id="com.freescale.s32ds.cross.gnu.tool.assembler.inputType.asmfile.1382042443" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.inputType.asmfile"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.createflash.1080244694" name="Standard S32DS Create Flash Image" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.createflash"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.tool.createlisting.1702336531" name="Standard S32DS Create Listing" superClass="com.freescale.s32ds.cross.gnu.tool.createlisting">
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.source.1255209437" name="Display source (--source|-S)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.source" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.allheaders.1370236074" name="Display all headers (--all-headers|-x)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.allheaders" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.demangle.1099535219" name="Demangle names (--demangle|-C)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.demangle" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.linenumbers.887426609" name="Display line numbers (--line-numbers|-l)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.linenumbers" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.wide.1073124729" name="Wide lines (--wide|-w)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.wide" value="true" valueType="boolean"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.printsize.54021379" name="Standard S32DS Print Size" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.printsize">
 
+								<option id="com.freescale.s32ds.cross.gnu.option.printsize.format.1028755042" name="Size format" superClass="com.freescale.s32ds.cross.gnu.option.printsize.format"/>
 
+							</tool>
 
+							<tool id="com.freescale.s32ds.cross.gnu.c.preprocessor.42706978" name="Standard S32DS C Preprocessor" superClass="com.freescale.s32ds.cross.gnu.c.preprocessor"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.cpp.preprocessor.1440378062" name="Standard S32DS C++ Preprocessor" superClass="com.freescale.s32ds.cross.gnu.cpp.preprocessor"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.disassembler.1839007837" name="Standard S32DS Disassembler" superClass="com.freescale.s32ds.cross.gnu.disassembler"/>
 
+						</toolChain>
 
+					</folderInfo>
 
+					<fileInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771.Project_Settings/Debugger" name="Debugger" rcbsApplicability="disable" resourcePath="Project_Settings/Debugger" toolsToInvoke=""/>
 
+					<fileInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771.Project_Settings/Linker_Files" name="Linker_Files" rcbsApplicability="disable" resourcePath="Project_Settings/Linker_Files" toolsToInvoke=""/>
 
+					<sourceEntries>
 
+						<entry excluding="Linker_Files|Debugger" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Project_Settings"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="RTD"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="board"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="generate"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="src"/>
 
+						<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="FreeRTOS"/>
 
+					</sourceEntries>
 
+				</configuration>
 
+			</storageModule>
 
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
 
+		</cconfiguration>
 
+		<cconfiguration id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570">
 
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570" moduleId="org.eclipse.cdt.core.settings" name="Release_RAM">
 
+				<externalSettings/>
 
+				<extensions>
 
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
 
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="com.freescale.s32ds.cdt.core.errorParsers.S32DSGNULinkerErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 
+				</extensions>
 
+			</storageModule>
 
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
 
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="com.nxp.s32ds.cle.arm.mbs.arm32.bare.buildArtefact.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.nxp.s32ds.cle.arm.mbs.arm32.bare.buildArtefact.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" description="" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570" name="Release_RAM" parent="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram">
 
+					<folderInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570." name="/" resourcePath="">
 
+						<toolChain id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.toolchain.release.ram.769166083" name="NXP GCC 9.2 for Arm 32-bit Bare-Metal" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.toolchain.release.ram">
 
+							<option defaultValue="true" id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.addtools.printsize.2144729074" name="Print size" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.addtools.printsize" valueType="boolean"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.compiler.path.687674291" name="Path" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.compiler.path" value="${S32DS_K1_ARM32_GNU_9_2_TOOLCHAIN_DIR}" valueType="string"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries.258017342" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu.1939722105" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset.1446426181" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.instructionset.thumb" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness.1639953990" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.endianness.little" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi.2110393428" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+							<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit.767420282" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="cdt.managedbuild.targetPlatform.gnu.cross.1497524319" isAbstract="false" osList="all" superClass="cdt.managedbuild.targetPlatform.gnu.cross"/>
 
+							<builder buildPath="${workspace_loc:/S32K146_4G}/Release_RAM" id="com.freescale.s32ds.cross.gnu.builder.599381168" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="FSL Make Builder" superClass="com.freescale.s32ds.cross.gnu.builder"/>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.1791885444" name="Standard S32DS C Compiler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler">
 
+								<option defaultValue="gnu.c.optimization.level.most" id="gnu.c.compiler.option.optimization.level.1260761523" name="Optimization Level" superClass="gnu.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="gnu.c.optimization.level.size" valueType="enumerated"/>
 
+								<option defaultValue="gnu.c.debugging.level.none" id="gnu.c.compiler.option.debugging.level.772224348" name="Debug Level" superClass="gnu.c.compiler.option.debugging.level" useByScannerDiscovery="false" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.functionsections.852871056" name="Function sections (-ffunction-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.functionsections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.datasections.1035442544" name="Data sections (-fdata-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.datasections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.debugging.format.761816550" name="Debug format" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.debugging.format" useByScannerDiscovery="true"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries.1971239951" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.sysroot.2134033035" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.sysroot" useByScannerDiscovery="false" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.include.paths.1845953649" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="../RTD/include"/>
 
+									<listOptionValue builtIn="false" value="../FreeRTOS/Source/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/GCC/ARM_CM4F}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/MemMang}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable}&quot;"/>
 
+									<listOptionValue builtIn="false" value="${ProjDirPath}/generate/include"/>
 
+									<listOptionValue builtIn="false" value="${ProjDirPath}/RTD/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/board&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu.508471184" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.preprocessor.def.symbols.1486224422" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" useByScannerDiscovery="false" valueType="definedSymbols">
 
+									<listOptionValue builtIn="false" value="CPU_S32K146"/>
 
+									<listOptionValue builtIn="false" value="I_CACHE_ENABLE"/>
 
+									<listOptionValue builtIn="false" value="ENABLE_FPU"/>
 
+									<listOptionValue builtIn="false" value="GCC"/>
 
+									<listOptionValue builtIn="false" value="S32K1XX"/>
 
+									<listOptionValue builtIn="false" value="S32K146"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset.1341737139" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std.2103339303" name="Language standard" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.option.dialect.std.c99" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness.777928081" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="gnu.c.compiler.option.debugging.other.1515476181" name="Other debugging flags" superClass="gnu.c.compiler.option.debugging.other" useByScannerDiscovery="false" value="-ggdb3" valueType="string"/>
 
+								<option id="gnu.c.compiler.option.warnings.pedantic.48187136" name="Pedantic (-pedantic)" superClass="gnu.c.compiler.option.warnings.pedantic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 
+								<option id="gnu.c.compiler.option.warnings.extrawarn.721505681" name="Extra warnings (-Wextra)" superClass="gnu.c.compiler.option.warnings.extrawarn" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.unused.1154433065" name="Warn on various unused elements (-Wunused)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.unused" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.unsignedbitfields.2135325913" name="'bitfield' is unsigned (-funsigned-bitfields)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.unsignedbitfields" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi.1559429254" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit.1654709104" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.compiler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.nocommon.580711665" name="No common uninitialized (-fno-common)" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.optimization.nocommon" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="gnu.c.compiler.option.optimization.flags.1513903294" name="Other optimization flags" superClass="gnu.c.compiler.option.optimization.flags" useByScannerDiscovery="false" value="-funsigned-char -fstack-usage -fdump-ipa-all -fomit-frame-pointer" valueType="string"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.other.483832558" name="Other warning flags" superClass="com.freescale.s32ds.cross.gnu.tool.c.compiler.option.warnings.other" useByScannerDiscovery="true" value="-Wstrict-prototypes -Wsign-compare -Werror=implicit-function-declaration -Wundef -Wdouble-promotion" valueType="string"/>
 
+								<option id="gnu.c.compiler.option.misc.other.1745256528" name="Other flags" superClass="gnu.c.compiler.option.misc.other" useByScannerDiscovery="false" value="-c -fno-short-enums" valueType="string"/>
 
+								<inputType id="cdt.managedbuild.tool.gnu.c.compiler.input.1142534454" superClass="cdt.managedbuild.tool.gnu.c.compiler.input"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.compiler.1941184114" name="Standard S32DS C++ Compiler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.compiler">
 
+								<option id="gnu.cpp.compiler.option.optimization.level.95080882" name="Optimization Level" superClass="gnu.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="gnu.cpp.compiler.optimization.level.most" valueType="enumerated"/>
 
+								<option defaultValue="gnu.cpp.compiler.debugging.level.none" id="gnu.cpp.compiler.option.debugging.level.2000595341" name="Debug Level" superClass="gnu.cpp.compiler.option.debugging.level" useByScannerDiscovery="false" valueType="enumerated"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.functionsections.1539203564" name="Function sections (-ffunction-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.functionsections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.datasections.1019890278" name="Data sections (-fdata-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.optimization.datasections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.debugging.format.300421986" name="Debug format" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.compiler.option.debugging.format" useByScannerDiscovery="true"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries.1140058878" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.sysroot.1583298184" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.sysroot" useByScannerDiscovery="false" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.cpp.compiler.option.include.paths.1872739856" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu.1699799654" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.cpp.compiler.option.preprocessor.def.223201202" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" useByScannerDiscovery="false" valueType="definedSymbols">
 
+									<listOptionValue builtIn="false" value="CPU_S32K146"/>
 
+									<listOptionValue builtIn="false" value="S32K146"/>
 
+									<listOptionValue builtIn="false" value="S32K1XX"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset.979974799" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness.1589059954" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness" useByScannerDiscovery="false" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi.320362002" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit.154228928" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit" useByScannerDiscovery="true" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.compiler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.linker.1779251962" name="Standard S32DS C Linker" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.linker">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.c.linker.option.gcsections.1209615565" name="Remove unused sections (-Xlinker --gc-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.option.gcsections" value="false" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries.1619874689" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.sysroot.1761182838" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu.1880115568" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.freescale.s32ds.cross.gnu.tool.c.linker.option.scriptfile.846976817" name="Script files (-T)" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.option.scriptfile" valueType="stringList">
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/Project_Settings/Linker_Files/linker_ram_s32k146.ld&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset.1488559063" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness.751616670" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi.1353650661" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit.35640653" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.c.linker.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<option id="gnu.c.link.option.ldflags.1809361664" name="Linker flags" superClass="gnu.c.link.option.ldflags" value="--entry=Reset_Handler -ggdb3" valueType="string"/>
 
+								<option id="gnu.c.link.option.nostart.294814833" name="Do not use standard start files (-nostartfiles)" superClass="gnu.c.link.option.nostart" value="true" valueType="boolean"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.link.option.libs.1727858993" name="Libraries (-l)" superClass="gnu.c.link.option.libs" valueType="libs">
 
+									<listOptionValue builtIn="false" value="c"/>
 
+									<listOptionValue builtIn="false" value="m"/>
 
+									<listOptionValue builtIn="false" value="gcc"/>
 
+								</option>
 
+								<inputType id="com.freescale.s32ds.cross.gnu.tool.c.linker.inputType.scriptfile.1063610498" superClass="com.freescale.s32ds.cross.gnu.tool.c.linker.inputType.scriptfile"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.linker.2093791268" name="Standard S32DS C++ Linker" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.cpp.linker">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.cpp.linker.option.gcsections.2014102417" name="Remove unused sections (-Xlinker --gc-sections)" superClass="com.freescale.s32ds.cross.gnu.tool.cpp.linker.option.gcsections" value="true" valueType="boolean"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries.894831255" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.sysroot.1760854636" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu.700883165" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset.238368313" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness.203989022" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi.682642878" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit.1138557288" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.cpp.linker.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.archiver.1506358825" name="Standard S32DS Archiver" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.archiver"/>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.593785447" name="Standard S32DS Assembler" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler">
 
+								<option id="com.freescale.s32ds.cross.gnu.tool.assembler.usepreprocessor.616240627" name="Use preprocessor" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.usepreprocessor" value="true" valueType="boolean"/>
 
+								<option defaultValue="gnu.c.debugging.level.none" id="com.freescale.s32ds.cross.gnu.tool.assembler.option.debugging.level.620980247" name="Debug Level" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.option.debugging.level" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries.613225987" name="Libraries support" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.libraries.newlib_nano_noio" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.sysroot.1743448021" name="Sysroot" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.sysroot" value="--sysroot=&quot;${S32DS_ARM32_NEWLIB_DIR}&quot;" valueType="string"/>
 
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.both.asm.option.include.paths.1068498650" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths" valueType="includePath">
 
+									<listOptionValue builtIn="false" value="../RTD/include"/>
 
+									<listOptionValue builtIn="false" value="../FreeRTOS/Source/include"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/GCC/ARM_CM4F}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable/MemMang}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS/Source/portable}&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/generate/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/RTD/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/board&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/header&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Base_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/include&quot;"/>
 
+									<listOptionValue builtIn="false" value="&quot;${PLATFORMSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH}/SW32K1_RTD_4_4_1_0_0_D2108/Platform_TS_T40D2M10I0R0/startup/include&quot;"/>
 
+								</option>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu.1070584779" name="Arm family" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.mcpu.cortex-m4" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset.809860752" name="Instruction set" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.instructionset.thumb" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness.259156094" name="Endianness" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.endianness.little" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi.1687238385" name="Float ABI" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.abi.hard" valueType="enumerated"/>
 
+								<option id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit.1886634419" name="FPU Type" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.assembler.option.target.fpu.unit.fpv4spd16" valueType="enumerated"/>
 
+								<inputType id="cdt.managedbuild.tool.gnu.assembler.input.327022080" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
 
+								<inputType id="com.freescale.s32ds.cross.gnu.tool.assembler.inputType.asmfile.1946193102" superClass="com.freescale.s32ds.cross.gnu.tool.assembler.inputType.asmfile"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.createflash.1948308316" name="Standard S32DS Create Flash Image" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.createflash"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.tool.createlisting.1309331734" name="Standard S32DS Create Listing" superClass="com.freescale.s32ds.cross.gnu.tool.createlisting">
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.source.1626984494" name="Display source (--source|-S)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.source" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.allheaders.186304717" name="Display all headers (--all-headers|-x)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.allheaders" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.demangle.1489157616" name="Demangle names (--demangle|-C)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.demangle" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.linenumbers.1665193263" name="Display line numbers (--line-numbers|-l)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.linenumbers" value="true" valueType="boolean"/>
 
+								<option id="com.freescale.s32ds.cross.gnu.option.createlisting.wide.766800042" name="Wide lines (--wide|-w)" superClass="com.freescale.s32ds.cross.gnu.option.createlisting.wide" value="true" valueType="boolean"/>
 
+							</tool>
 
+							<tool id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.printsize.2128034116" name="Standard S32DS Print Size" superClass="com.nxp.s32ds.cle.arm.mbs.arm32.bare.tool.printsize">
 
+								<option id="com.freescale.s32ds.cross.gnu.option.printsize.format.1011036632" name="Size format" superClass="com.freescale.s32ds.cross.gnu.option.printsize.format"/>
 
+							</tool>
 
+							<tool id="com.freescale.s32ds.cross.gnu.c.preprocessor.1929359459" name="Standard S32DS C Preprocessor" superClass="com.freescale.s32ds.cross.gnu.c.preprocessor"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.cpp.preprocessor.968746657" name="Standard S32DS C++ Preprocessor" superClass="com.freescale.s32ds.cross.gnu.cpp.preprocessor"/>
 
+							<tool id="com.freescale.s32ds.cross.gnu.disassembler.1271122733" name="Standard S32DS Disassembler" superClass="com.freescale.s32ds.cross.gnu.disassembler"/>
 
+						</toolChain>
 
+					</folderInfo>
 
+					<fileInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570.Project_Settings/Debugger" name="Debugger" rcbsApplicability="disable" resourcePath="Project_Settings/Debugger" toolsToInvoke=""/>
 
+					<fileInfo id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570.Project_Settings/Linker_Files" name="Linker_Files" rcbsApplicability="disable" resourcePath="Project_Settings/Linker_Files" toolsToInvoke=""/>
 
+					<sourceEntries>
 
+						<entry excluding="Linker_Files|Debugger" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Project_Settings"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="RTD"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="board"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="generate"/>
 
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="src"/>
 
+						<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="FreeRTOS"/>
 
+					</sourceEntries>
 
+				</configuration>
 
+			</storageModule>
 
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
 
+		</cconfiguration>
 
+	</storageModule>
 
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
 
+		<project id="S32K146_4G.com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.2134021774" name="Arm32 Executable" projectType="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe"/>
 
+	</storageModule>
 
+	<storageModule moduleId="scannerConfiguration">
 
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
 
+		<scannerConfigBuildInfo instanceId="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412;com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412.;com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.980010937;cdt.managedbuild.tool.gnu.c.compiler.input.1499052172">
 
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
 
+		</scannerConfigBuildInfo>
 
+		<scannerConfigBuildInfo instanceId="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549;com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549.;com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.1980082058;cdt.managedbuild.tool.gnu.c.compiler.input.401747511">
 
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
 
+		</scannerConfigBuildInfo>
 
+		<scannerConfigBuildInfo instanceId="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570;com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570.;com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.1791885444;cdt.managedbuild.tool.gnu.c.compiler.input.1142534454">
 
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
 
+		</scannerConfigBuildInfo>
 
+		<scannerConfigBuildInfo instanceId="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771;com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771.;com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.tool.c.compiler.611103080;cdt.managedbuild.tool.gnu.c.compiler.input.1391965482">
 
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
 
+		</scannerConfigBuildInfo>
 
+	</storageModule>
 
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
 
+	<storageModule moduleId="org.eclipse.embsys" parent_project="true" register_architecture="" register_board="---  none ---" register_chip="" register_core="" register_vendor=""/>
 
+	<storageModule moduleId="refreshScope"/>
 
+	<storageModule moduleId="com.nxp.s32ds.cle.uct.core">
 
+		<sdkComponents>platform.driver.osif;platform.driver.det;platform.driver.rte_can;platform.driver.rte_dio;platform.driver.rte_mcu;platform.driver.rte_mcl;platform.driver.rte_port;platform.driver.rte_uart;platform.os.freertos;platform.driver.Can;platform.driver.CanIf;platform.driver.dio;platform.driver.ecum;platform.driver.mcu;platform.driver.mcl;platform.driver.Platform;platform.driver.port;platform.driver.uart;platform.driver.clock</sdkComponents>
 
+		<COND_TOOLCHAIN_ADD_REMOVE_COMPONENTS_OPTION>true</COND_TOOLCHAIN_ADD_REMOVE_COMPONENTS_OPTION>
 
+		<COND_TOOLCHAIN_COPY_SOURCES>true</COND_TOOLCHAIN_COPY_SOURCES>
 
+	</storageModule>
 
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
 
+</cproject>

+ 1 - 0
.gitignore
Vedi File 

@@ -0,0 +1 @@
 
+Debug_FLASH/

+ 26 - 0
.project
Vedi File 

@@ -0,0 +1,26 @@
 
+<?xml version="1.0" encoding="UTF-8"?>
 
+<projectDescription>
 
+	<name>S32K146_4G</name>
 
+	<comment></comment>
 
+	<projects>
 
+	</projects>
 
+	<buildSpec>
 
+		<buildCommand>
 
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
 
+			<triggers>clean,full,incremental,</triggers>
 
+			<arguments>
 
+			</arguments>
 
+		</buildCommand>
 
+		<buildCommand>
 
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
 
+			<triggers>full,incremental,</triggers>
 
+			<arguments>
 
+			</arguments>
 
+		</buildCommand>
 
+	</buildSpec>
 
+	<natures>
 
+		<nature>org.eclipse.cdt.core.cnature</nature>
 
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
 
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
 
+	</natures>
 
+</projectDescription>

+ 2 - 0
.settings/com.freescale.s32ds.cross.sdk.support.prefs
Vedi File 

@@ -0,0 +1,2 @@
 
+com.freescale.s32ds.cross.sdk.support.attachedSDKs=PlatformSDK_S32K1_2021_08_S32K146_M4F_1.0.0_PATH|Debug_FLASH|Release_FLASH|Debug_RAM|Release_RAM
 
+eclipse.preferences.version=1

File diff suppressed because it is too large
+ 0 - 0
.settings/com.nxp.s32ds.cle.ide.sdk.attached.sdks.data.prefs


+ 9 - 0
.settings/com.nxp.s32ds.cle.runtime.component.prefs
Vedi File 

@@ -0,0 +1,9 @@
 
+com.nxp.s32ds.cle.runtime.component.registry.archetype.id=application
 
+com.nxp.s32ds.cle.runtime.component.registry.archetype.platform.id=
 
+com.nxp.s32ds.cle.runtime.hardware.registry.core.id=CortexM4F
 
+com.nxp.s32ds.cle.runtime.hardware.registry.device.id=S32K146
 
+com.nxp.s32ds.cle.runtime.hardware.registry.device.revision.id=
 
+com.nxp.s32ds.cle.runtime.hardware.registry.deviceCore.id=S32K146_M4F
 
+com.nxp.s32ds.cle.runtime.hardware.registry.family.id=S32K1
 
+com.nxp.s32ds.cle.runtime.lang.registry.lang.id=c
 
+eclipse.preferences.version=1

+ 47 - 0
.settings/language.settings.xml
Vedi File 

@@ -0,0 +1,47 @@
 
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
 
+<project>
 
+	<configuration id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549" name="Debug_FLASH">
 
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
 
+			<provider class="com.freescale.s32ds.cross.gnu.CrossGCCBuiltinSpecsDetector" console="false" env-hash="512964616103659477" id="com.freescale.s32ds.cross.gnu.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT S32DS Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
 
+				<language-scope id="org.eclipse.cdt.core.g++"/>
 
+			</provider>
 
+		</extension>
 
+	</configuration>
 
+	<configuration id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412" name="Release_FLASH">
 
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
 
+			<provider class="com.freescale.s32ds.cross.gnu.CrossGCCBuiltinSpecsDetector" console="false" env-hash="512964616103659477" id="com.freescale.s32ds.cross.gnu.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT S32DS Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
 
+				<language-scope id="org.eclipse.cdt.core.g++"/>
 
+			</provider>
 
+		</extension>
 
+	</configuration>
 
+	<configuration id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771" name="Debug_RAM">
 
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
 
+			<provider class="com.freescale.s32ds.cross.gnu.CrossGCCBuiltinSpecsDetector" console="false" env-hash="512964616103659477" id="com.freescale.s32ds.cross.gnu.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT S32DS Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
 
+				<language-scope id="org.eclipse.cdt.core.g++"/>
 
+			</provider>
 
+		</extension>
 
+	</configuration>
 
+	<configuration id="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570" name="Release_RAM">
 
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
 
+			<provider class="com.freescale.s32ds.cross.gnu.CrossGCCBuiltinSpecsDetector" console="false" env-hash="512964616103659477" id="com.freescale.s32ds.cross.gnu.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT S32DS Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
 
+				<language-scope id="org.eclipse.cdt.core.g++"/>
 
+			</provider>
 
+		</extension>
 
+	</configuration>
 
+</project>

+ 3 - 0
.settings/org.eclipse.cdt.codan.core.prefs
Vedi File 

@@ -0,0 +1,3 @@
 
+eclipse.preferences.version=1
 
+inEditor=false
 
+onBuild=false

+ 33 - 0
.settings/org.eclipse.cdt.core.prefs
Vedi File 

@@ -0,0 +1,33 @@
 
+eclipse.preferences.version=1
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549/PATH/delimiter=;
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549/PATH/operation=prepend
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549/PATH/value=
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549/S32DS_ARM32_NEWLIB_DIR/delimiter=;
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549/S32DS_ARM32_NEWLIB_DIR/operation=replace
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549/S32DS_ARM32_NEWLIB_DIR/value=${S32DS_K1_ARM32_GNU_9_2_TOOLCHAIN_DIR}/arm-none-eabi/newlib
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549/append=true
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549/appendContributed=true
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771/PATH/delimiter=;
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771/PATH/operation=prepend
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771/PATH/value=
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771/S32DS_ARM32_NEWLIB_DIR/delimiter=;
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771/S32DS_ARM32_NEWLIB_DIR/operation=replace
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771/S32DS_ARM32_NEWLIB_DIR/value=${S32DS_K1_ARM32_GNU_9_2_TOOLCHAIN_DIR}/arm-none-eabi/newlib
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771/append=true
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771/appendContributed=true
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412/PATH/delimiter=;
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412/PATH/operation=prepend
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412/PATH/value=
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412/S32DS_ARM32_NEWLIB_DIR/delimiter=;
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412/S32DS_ARM32_NEWLIB_DIR/operation=replace
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412/S32DS_ARM32_NEWLIB_DIR/value=${S32DS_K1_ARM32_GNU_9_2_TOOLCHAIN_DIR}/arm-none-eabi/newlib
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412/append=true
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412/appendContributed=true
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570/PATH/delimiter=;
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570/PATH/operation=prepend
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570/PATH/value=
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570/S32DS_ARM32_NEWLIB_DIR/delimiter=;
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570/S32DS_ARM32_NEWLIB_DIR/operation=replace
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570/S32DS_ARM32_NEWLIB_DIR/value=${S32DS_K1_ARM32_GNU_9_2_TOOLCHAIN_DIR}/arm-none-eabi/newlib
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570/append=true
 
+environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570/appendContributed=true

+ 363 - 0
FreeRTOS/Source/croutine.c
Vedi File 

@@ -0,0 +1,363 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#include "FreeRTOS.h"
 
+#include "task.h"
 
+#include "croutine.h"
 
+
 
+/* Remove the whole file is co-routines are not being used. */
 
+#if ( configUSE_CO_ROUTINES != 0 )
 
+
 
+/*
 
+ * Some kernel aware debuggers require data to be viewed to be global, rather
 
+ * than file scope.
 
+ */
 
+    #ifdef portREMOVE_STATIC_QUALIFIER
 
+        #define static
 
+    #endif
 
+
 
+
 
+/* Lists for ready and blocked co-routines. --------------------*/
 
+    static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */
 
+    static List_t xDelayedCoRoutineList1;                                   /*< Delayed co-routines. */
 
+    static List_t xDelayedCoRoutineList2;                                   /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */
 
+    static List_t * pxDelayedCoRoutineList = NULL;                          /*< Points to the delayed co-routine list currently being used. */
 
+    static List_t * pxOverflowDelayedCoRoutineList = NULL;                  /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */
 
+    static List_t xPendingReadyCoRoutineList;                               /*< Holds co-routines that have been readied by an external event.  They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */
 
+
 
+/* Other file private variables. --------------------------------*/
 
+    CRCB_t * pxCurrentCoRoutine = NULL;
 
+    static UBaseType_t uxTopCoRoutineReadyPriority = 0;
 
+    static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;
 
+
 
+/* The initial state of the co-routine when it is created. */
 
+    #define corINITIAL_STATE    ( 0 )
 
+
 
+/*
 
+ * Place the co-routine represented by pxCRCB into the appropriate ready queue
 
+ * for the priority.  It is inserted at the end of the list.
 
+ *
 
+ * This macro accesses the co-routine ready lists and therefore must not be
 
+ * used from within an ISR.
 
+ */
 
+    #define prvAddCoRoutineToReadyQueue( pxCRCB )                                                                       \
 
+    {                                                                                                                   \
 
+        if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority )                                                          \
 
+        {                                                                                                               \
 
+            uxTopCoRoutineReadyPriority = pxCRCB->uxPriority;                                                           \
 
+        }                                                                                                               \
 
+        vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \
 
+    }
 
+
 
+/*
 
+ * Utility to ready all the lists used by the scheduler.  This is called
 
+ * automatically upon the creation of the first co-routine.
 
+ */
 
+    static void prvInitialiseCoRoutineLists( void );
 
+
 
+/*
 
+ * Co-routines that are readied by an interrupt cannot be placed directly into
 
+ * the ready lists (there is no mutual exclusion).  Instead they are placed in
 
+ * in the pending ready list in order that they can later be moved to the ready
 
+ * list by the co-routine scheduler.
 
+ */
 
+    static void prvCheckPendingReadyList( void );
 
+
 
+/*
 
+ * Macro that looks at the list of co-routines that are currently delayed to
 
+ * see if any require waking.
 
+ *
 
+ * Co-routines are stored in the queue in the order of their wake time -
 
+ * meaning once one co-routine has been found whose timer has not expired
 
+ * we need not look any further down the list.
 
+ */
 
+    static void prvCheckDelayedList( void );
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+    BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
 
+                                 UBaseType_t uxPriority,
 
+                                 UBaseType_t uxIndex )
 
+    {
 
+        BaseType_t xReturn;
 
+        CRCB_t * pxCoRoutine;
 
+
 
+        /* Allocate the memory that will store the co-routine control block. */
 
+        pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) );
 
+
 
+        if( pxCoRoutine )
 
+        {
 
+            /* If pxCurrentCoRoutine is NULL then this is the first co-routine to
 
+            * be created and the co-routine data structures need initialising. */
 
+            if( pxCurrentCoRoutine == NULL )
 
+            {
 
+                pxCurrentCoRoutine = pxCoRoutine;
 
+                prvInitialiseCoRoutineLists();
 
+            }
 
+
 
+            /* Check the priority is within limits. */
 
+            if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES )
 
+            {
 
+                uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1;
 
+            }
 
+
 
+            /* Fill out the co-routine control block from the function parameters. */
 
+            pxCoRoutine->uxState = corINITIAL_STATE;
 
+            pxCoRoutine->uxPriority = uxPriority;
 
+            pxCoRoutine->uxIndex = uxIndex;
 
+            pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode;
 
+
 
+            /* Initialise all the other co-routine control block parameters. */
 
+            vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) );
 
+            vListInitialiseItem( &( pxCoRoutine->xEventListItem ) );
 
+
 
+            /* Set the co-routine control block as a link back from the ListItem_t.
 
+             * This is so we can get back to the containing CRCB from a generic item
 
+             * in a list. */
 
+            listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine );
 
+            listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine );
 
+
 
+            /* Event lists are always in priority order. */
 
+            listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) );
 
+
 
+            /* Now the co-routine has been initialised it can be added to the ready
 
+             * list at the correct priority. */
 
+            prvAddCoRoutineToReadyQueue( pxCoRoutine );
 
+
 
+            xReturn = pdPASS;
 
+        }
 
+        else
 
+        {
 
+            xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
 
+                                     List_t * pxEventList )
 
+    {
 
+        TickType_t xTimeToWake;
 
+
 
+        /* Calculate the time to wake - this may overflow but this is
 
+         * not a problem. */
 
+        xTimeToWake = xCoRoutineTickCount + xTicksToDelay;
 
+
 
+        /* We must remove ourselves from the ready list before adding
 
+         * ourselves to the blocked list as the same list item is used for
 
+         * both lists. */
 
+        ( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
 
+
 
+        /* The list item will be inserted in wake time order. */
 
+        listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake );
 
+
 
+        if( xTimeToWake < xCoRoutineTickCount )
 
+        {
 
+            /* Wake time has overflowed.  Place this item in the
 
+             * overflow list. */
 
+            vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
 
+        }
 
+        else
 
+        {
 
+            /* The wake time has not overflowed, so we can use the
 
+             * current block list. */
 
+            vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
 
+        }
 
+
 
+        if( pxEventList )
 
+        {
 
+            /* Also add the co-routine to an event list.  If this is done then the
 
+             * function must be called with interrupts disabled. */
 
+            vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) );
 
+        }
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static void prvCheckPendingReadyList( void )
 
+    {
 
+        /* Are there any co-routines waiting to get moved to the ready list?  These
 
+         * are co-routines that have been readied by an ISR.  The ISR cannot access
 
+         * the ready lists itself. */
 
+        while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE )
 
+        {
 
+            CRCB_t * pxUnblockedCRCB;
 
+
 
+            /* The pending ready list can be accessed by an ISR. */
 
+            portDISABLE_INTERRUPTS();
 
+            {
 
+                pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyCoRoutineList ) );
 
+                ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );
 
+            }
 
+            portENABLE_INTERRUPTS();
 
+
 
+            ( void ) uxListRemove( &( pxUnblockedCRCB->xGenericListItem ) );
 
+            prvAddCoRoutineToReadyQueue( pxUnblockedCRCB );
 
+        }
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static void prvCheckDelayedList( void )
 
+    {
 
+        CRCB_t * pxCRCB;
 
+
 
+        xPassedTicks = xTaskGetTickCount() - xLastTickCount;
 
+
 
+        while( xPassedTicks )
 
+        {
 
+            xCoRoutineTickCount++;
 
+            xPassedTicks--;
 
+
 
+            /* If the tick count has overflowed we need to swap the ready lists. */
 
+            if( xCoRoutineTickCount == 0 )
 
+            {
 
+                List_t * pxTemp;
 
+
 
+                /* Tick count has overflowed so we need to swap the delay lists.  If there are
 
+                 * any items in pxDelayedCoRoutineList here then there is an error! */
 
+                pxTemp = pxDelayedCoRoutineList;
 
+                pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList;
 
+                pxOverflowDelayedCoRoutineList = pxTemp;
 
+            }
 
+
 
+            /* See if this tick has made a timeout expire. */
 
+            while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE )
 
+            {
 
+                pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList );
 
+
 
+                if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) )
 
+                {
 
+                    /* Timeout not yet expired. */
 
+                    break;
 
+                }
 
+
 
+                portDISABLE_INTERRUPTS();
 
+                {
 
+                    /* The event could have occurred just before this critical
 
+                     *  section.  If this is the case then the generic list item will
 
+                     *  have been moved to the pending ready list and the following
 
+                     *  line is still valid.  Also the pvContainer parameter will have
 
+                     *  been set to NULL so the following lines are also valid. */
 
+                    ( void ) uxListRemove( &( pxCRCB->xGenericListItem ) );
 
+
 
+                    /* Is the co-routine waiting on an event also? */
 
+                    if( pxCRCB->xEventListItem.pxContainer )
 
+                    {
 
+                        ( void ) uxListRemove( &( pxCRCB->xEventListItem ) );
 
+                    }
 
+                }
 
+                portENABLE_INTERRUPTS();
 
+
 
+                prvAddCoRoutineToReadyQueue( pxCRCB );
 
+            }
 
+        }
 
+
 
+        xLastTickCount = xCoRoutineTickCount;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    void vCoRoutineSchedule( void )
 
+    {
 
+        /* Only run a co-routine after prvInitialiseCoRoutineLists() has been
 
+         * called.  prvInitialiseCoRoutineLists() is called automatically when a
 
+         * co-routine is created. */
 
+        if( pxDelayedCoRoutineList != NULL )
 
+        {
 
+            /* See if any co-routines readied by events need moving to the ready lists. */
 
+            prvCheckPendingReadyList();
 
+
 
+            /* See if any delayed co-routines have timed out. */
 
+            prvCheckDelayedList();
 
+
 
+            /* Find the highest priority queue that contains ready co-routines. */
 
+            while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) )
 
+            {
 
+                if( uxTopCoRoutineReadyPriority == 0 )
 
+                {
 
+                    /* No more co-routines to check. */
 
+                    return;
 
+                }
 
+
 
+                --uxTopCoRoutineReadyPriority;
 
+            }
 
+
 
+            /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines
 
+             * of the same priority get an equal share of the processor time. */
 
+            listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) );
 
+
 
+            /* Call the co-routine. */
 
+            ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex );
 
+        }
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static void prvInitialiseCoRoutineLists( void )
 
+    {
 
+        UBaseType_t uxPriority;
 
+
 
+        for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ )
 
+        {
 
+            vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) );
 
+        }
 
+
 
+        vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 );
 
+        vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 );
 
+        vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList );
 
+
 
+        /* Start with pxDelayedCoRoutineList using list1 and the
 
+         * pxOverflowDelayedCoRoutineList using list2. */
 
+        pxDelayedCoRoutineList = &xDelayedCoRoutineList1;
 
+        pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList )
 
+    {
 
+        CRCB_t * pxUnblockedCRCB;
 
+        BaseType_t xReturn;
 
+
 
+        /* This function is called from within an interrupt.  It can only access
 
+         * event lists and the pending ready list.  This function assumes that a
 
+         * check has already been made to ensure pxEventList is not empty. */
 
+        pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
 
+        ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );
 
+        vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) );
 
+
 
+        if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority )
 
+        {
 
+            xReturn = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            xReturn = pdFALSE;
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_CO_ROUTINES == 0 */

+ 775 - 0
FreeRTOS/Source/event_groups.c
Vedi File 

@@ -0,0 +1,775 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/* Standard includes. */
 
+#include <stdlib.h>
 
+
 
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
 
+ * all the API functions to use the MPU wrappers.  That should only be done when
 
+ * task.h is included from an application file. */
 
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
+
 
+/* FreeRTOS includes. */
 
+#include "FreeRTOS.h"
 
+#include "task.h"
 
+#include "timers.h"
 
+#include "event_groups.h"
 
+
 
+/* Lint e961, e750 and e9021 are suppressed as a MISRA exception justified
 
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
 
+ * for the header files above, but not in this file, in order to generate the
 
+ * correct privileged Vs unprivileged linkage and placement. */
 
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021 See comment above. */
 
+
 
+/* The following bit fields convey control information in a task's event list
 
+ * item value.  It is important they don't clash with the
 
+ * taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */
 
+#if configUSE_16_BIT_TICKS == 1
 
+    #define eventCLEAR_EVENTS_ON_EXIT_BIT    0x0100U
 
+    #define eventUNBLOCKED_DUE_TO_BIT_SET    0x0200U
 
+    #define eventWAIT_FOR_ALL_BITS           0x0400U
 
+    #define eventEVENT_BITS_CONTROL_BYTES    0xff00U
 
+#else
 
+    #define eventCLEAR_EVENTS_ON_EXIT_BIT    0x01000000UL
 
+    #define eventUNBLOCKED_DUE_TO_BIT_SET    0x02000000UL
 
+    #define eventWAIT_FOR_ALL_BITS           0x04000000UL
 
+    #define eventEVENT_BITS_CONTROL_BYTES    0xff000000UL
 
+#endif
 
+
 
+typedef struct EventGroupDef_t
 
+{
 
+    EventBits_t uxEventBits;
 
+    List_t xTasksWaitingForBits; /*< List of tasks waiting for a bit to be set. */
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        UBaseType_t uxEventGroupNumber;
 
+    #endif
 
+
 
+    #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
+        uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */
 
+    #endif
 
+} EventGroup_t;
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/*
 
+ * Test the bits set in uxCurrentEventBits to see if the wait condition is met.
 
+ * The wait condition is defined by xWaitForAllBits.  If xWaitForAllBits is
 
+ * pdTRUE then the wait condition is met if all the bits set in uxBitsToWaitFor
 
+ * are also set in uxCurrentEventBits.  If xWaitForAllBits is pdFALSE then the
 
+ * wait condition is met if any of the bits set in uxBitsToWait for are also set
 
+ * in uxCurrentEventBits.
 
+ */
 
+static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits,
 
+                                        const EventBits_t uxBitsToWaitFor,
 
+                                        const BaseType_t xWaitForAllBits ) PRIVILEGED_FUNCTION;
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+
 
+    EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer )
 
+    {
 
+        EventGroup_t * pxEventBits;
 
+
 
+        /* A StaticEventGroup_t object must be provided. */
 
+        configASSERT( pxEventGroupBuffer );
 
+
 
+        #if ( configASSERT_DEFINED == 1 )
 
+            {
 
+                /* Sanity check that the size of the structure used to declare a
 
+                 * variable of type StaticEventGroup_t equals the size of the real
 
+                 * event group structure. */
 
+                volatile size_t xSize = sizeof( StaticEventGroup_t );
 
+                configASSERT( xSize == sizeof( EventGroup_t ) );
 
+            } /*lint !e529 xSize is referenced if configASSERT() is defined. */
 
+        #endif /* configASSERT_DEFINED */
 
+
 
+        /* The user has provided a statically allocated event group - use it. */
 
+        pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 !e9087 EventGroup_t and StaticEventGroup_t are deliberately aliased for data hiding purposes and guaranteed to have the same size and alignment requirement - checked by configASSERT(). */
 
+
 
+        if( pxEventBits != NULL )
 
+        {
 
+            pxEventBits->uxEventBits = 0;
 
+            vListInitialise( &( pxEventBits->xTasksWaitingForBits ) );
 
+
 
+            #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+                {
 
+                    /* Both static and dynamic allocation can be used, so note that
 
+                     * this event group was created statically in case the event group
 
+                     * is later deleted. */
 
+                    pxEventBits->ucStaticallyAllocated = pdTRUE;
 
+                }
 
+            #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
+
 
+            traceEVENT_GROUP_CREATE( pxEventBits );
 
+        }
 
+        else
 
+        {
 
+            /* xEventGroupCreateStatic should only ever be called with
 
+             * pxEventGroupBuffer pointing to a pre-allocated (compile time
 
+             * allocated) StaticEventGroup_t variable. */
 
+            traceEVENT_GROUP_CREATE_FAILED();
 
+        }
 
+
 
+        return pxEventBits;
 
+    }
 
+
 
+#endif /* configSUPPORT_STATIC_ALLOCATION */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+
 
+    EventGroupHandle_t xEventGroupCreate( void )
 
+    {
 
+        EventGroup_t * pxEventBits;
 
+
 
+        /* Allocate the event group.  Justification for MISRA deviation as
 
+         * follows:  pvPortMalloc() always ensures returned memory blocks are
 
+         * aligned per the requirements of the MCU stack.  In this case
 
+         * pvPortMalloc() must return a pointer that is guaranteed to meet the
 
+         * alignment requirements of the EventGroup_t structure - which (if you
 
+         * follow it through) is the alignment requirements of the TickType_t type
 
+         * (EventBits_t being of TickType_t itself).  Therefore, whenever the
 
+         * stack alignment requirements are greater than or equal to the
 
+         * TickType_t alignment requirements the cast is safe.  In other cases,
 
+         * where the natural word size of the architecture is less than
 
+         * sizeof( TickType_t ), the TickType_t variables will be accessed in two
 
+         * or more reads operations, and the alignment requirements is only that
 
+         * of each individual read. */
 
+        pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) ); /*lint !e9087 !e9079 see comment above. */
 
+
 
+        if( pxEventBits != NULL )
 
+        {
 
+            pxEventBits->uxEventBits = 0;
 
+            vListInitialise( &( pxEventBits->xTasksWaitingForBits ) );
 
+
 
+            #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+                {
 
+                    /* Both static and dynamic allocation can be used, so note this
 
+                     * event group was allocated statically in case the event group is
 
+                     * later deleted. */
 
+                    pxEventBits->ucStaticallyAllocated = pdFALSE;
 
+                }
 
+            #endif /* configSUPPORT_STATIC_ALLOCATION */
 
+
 
+            traceEVENT_GROUP_CREATE( pxEventBits );
 
+        }
 
+        else
 
+        {
 
+            traceEVENT_GROUP_CREATE_FAILED(); /*lint !e9063 Else branch only exists to allow tracing and does not generate code if trace macros are not defined. */
 
+        }
 
+
 
+        return pxEventBits;
 
+    }
 
+
 
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
+/*-----------------------------------------------------------*/
 
+
 
+EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
 
+                             const EventBits_t uxBitsToSet,
 
+                             const EventBits_t uxBitsToWaitFor,
 
+                             TickType_t xTicksToWait )
 
+{
 
+    EventBits_t uxOriginalBitValue, uxReturn;
 
+    EventGroup_t * pxEventBits = xEventGroup;
 
+    BaseType_t xAlreadyYielded;
 
+    BaseType_t xTimeoutOccurred = pdFALSE;
 
+
 
+    configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
 
+    configASSERT( uxBitsToWaitFor != 0 );
 
+    #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
 
+        {
 
+            configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 
+        }
 
+    #endif
 
+
 
+    vTaskSuspendAll();
 
+    {
 
+        uxOriginalBitValue = pxEventBits->uxEventBits;
 
+
 
+        ( void ) xEventGroupSetBits( xEventGroup, uxBitsToSet );
 
+
 
+        if( ( ( uxOriginalBitValue | uxBitsToSet ) & uxBitsToWaitFor ) == uxBitsToWaitFor )
 
+        {
 
+            /* All the rendezvous bits are now set - no need to block. */
 
+            uxReturn = ( uxOriginalBitValue | uxBitsToSet );
 
+
 
+            /* Rendezvous always clear the bits.  They will have been cleared
 
+             * already unless this is the only task in the rendezvous. */
 
+            pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
 
+
 
+            xTicksToWait = 0;
 
+        }
 
+        else
 
+        {
 
+            if( xTicksToWait != ( TickType_t ) 0 )
 
+            {
 
+                traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor );
 
+
 
+                /* Store the bits that the calling task is waiting for in the
 
+                 * task's event list item so the kernel knows when a match is
 
+                 * found.  Then enter the blocked state. */
 
+                vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | eventCLEAR_EVENTS_ON_EXIT_BIT | eventWAIT_FOR_ALL_BITS ), xTicksToWait );
 
+
 
+                /* This assignment is obsolete as uxReturn will get set after
 
+                 * the task unblocks, but some compilers mistakenly generate a
 
+                 * warning about uxReturn being returned without being set if the
 
+                 * assignment is omitted. */
 
+                uxReturn = 0;
 
+            }
 
+            else
 
+            {
 
+                /* The rendezvous bits were not set, but no block time was
 
+                 * specified - just return the current event bit value. */
 
+                uxReturn = pxEventBits->uxEventBits;
 
+                xTimeoutOccurred = pdTRUE;
 
+            }
 
+        }
 
+    }
 
+    xAlreadyYielded = xTaskResumeAll();
 
+
 
+    if( xTicksToWait != ( TickType_t ) 0 )
 
+    {
 
+        if( xAlreadyYielded == pdFALSE )
 
+        {
 
+            portYIELD_WITHIN_API();
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        /* The task blocked to wait for its required bits to be set - at this
 
+         * point either the required bits were set or the block time expired.  If
 
+         * the required bits were set they will have been stored in the task's
 
+         * event list item, and they should now be retrieved then cleared. */
 
+        uxReturn = uxTaskResetEventItemValue();
 
+
 
+        if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 )
 
+        {
 
+            /* The task timed out, just return the current event bit value. */
 
+            taskENTER_CRITICAL();
 
+            {
 
+                uxReturn = pxEventBits->uxEventBits;
 
+
 
+                /* Although the task got here because it timed out before the
 
+                 * bits it was waiting for were set, it is possible that since it
 
+                 * unblocked another task has set the bits.  If this is the case
 
+                 * then it needs to clear the bits before exiting. */
 
+                if( ( uxReturn & uxBitsToWaitFor ) == uxBitsToWaitFor )
 
+                {
 
+                    pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            taskEXIT_CRITICAL();
 
+
 
+            xTimeoutOccurred = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            /* The task unblocked because the bits were set. */
 
+        }
 
+
 
+        /* Control bits might be set as the task had blocked should not be
 
+         * returned. */
 
+        uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES;
 
+    }
 
+
 
+    traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred );
 
+
 
+    /* Prevent compiler warnings when trace macros are not used. */
 
+    ( void ) xTimeoutOccurred;
 
+
 
+    return uxReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
 
+                                 const EventBits_t uxBitsToWaitFor,
 
+                                 const BaseType_t xClearOnExit,
 
+                                 const BaseType_t xWaitForAllBits,
 
+                                 TickType_t xTicksToWait )
 
+{
 
+    EventGroup_t * pxEventBits = xEventGroup;
 
+    EventBits_t uxReturn, uxControlBits = 0;
 
+    BaseType_t xWaitConditionMet, xAlreadyYielded;
 
+    BaseType_t xTimeoutOccurred = pdFALSE;
 
+
 
+    /* Check the user is not attempting to wait on the bits used by the kernel
 
+     * itself, and that at least one bit is being requested. */
 
+    configASSERT( xEventGroup );
 
+    configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
 
+    configASSERT( uxBitsToWaitFor != 0 );
 
+    #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
 
+        {
 
+            configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 
+        }
 
+    #endif
 
+
 
+    vTaskSuspendAll();
 
+    {
 
+        const EventBits_t uxCurrentEventBits = pxEventBits->uxEventBits;
 
+
 
+        /* Check to see if the wait condition is already met or not. */
 
+        xWaitConditionMet = prvTestWaitCondition( uxCurrentEventBits, uxBitsToWaitFor, xWaitForAllBits );
 
+
 
+        if( xWaitConditionMet != pdFALSE )
 
+        {
 
+            /* The wait condition has already been met so there is no need to
 
+             * block. */
 
+            uxReturn = uxCurrentEventBits;
 
+            xTicksToWait = ( TickType_t ) 0;
 
+
 
+            /* Clear the wait bits if requested to do so. */
 
+            if( xClearOnExit != pdFALSE )
 
+            {
 
+                pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else if( xTicksToWait == ( TickType_t ) 0 )
 
+        {
 
+            /* The wait condition has not been met, but no block time was
 
+             * specified, so just return the current value. */
 
+            uxReturn = uxCurrentEventBits;
 
+            xTimeoutOccurred = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            /* The task is going to block to wait for its required bits to be
 
+             * set.  uxControlBits are used to remember the specified behaviour of
 
+             * this call to xEventGroupWaitBits() - for use when the event bits
 
+             * unblock the task. */
 
+            if( xClearOnExit != pdFALSE )
 
+            {
 
+                uxControlBits |= eventCLEAR_EVENTS_ON_EXIT_BIT;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            if( xWaitForAllBits != pdFALSE )
 
+            {
 
+                uxControlBits |= eventWAIT_FOR_ALL_BITS;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            /* Store the bits that the calling task is waiting for in the
 
+             * task's event list item so the kernel knows when a match is
 
+             * found.  Then enter the blocked state. */
 
+            vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | uxControlBits ), xTicksToWait );
 
+
 
+            /* This is obsolete as it will get set after the task unblocks, but
 
+             * some compilers mistakenly generate a warning about the variable
 
+             * being returned without being set if it is not done. */
 
+            uxReturn = 0;
 
+
 
+            traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor );
 
+        }
 
+    }
 
+    xAlreadyYielded = xTaskResumeAll();
 
+
 
+    if( xTicksToWait != ( TickType_t ) 0 )
 
+    {
 
+        if( xAlreadyYielded == pdFALSE )
 
+        {
 
+            portYIELD_WITHIN_API();
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        /* The task blocked to wait for its required bits to be set - at this
 
+         * point either the required bits were set or the block time expired.  If
 
+         * the required bits were set they will have been stored in the task's
 
+         * event list item, and they should now be retrieved then cleared. */
 
+        uxReturn = uxTaskResetEventItemValue();
 
+
 
+        if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 )
 
+        {
 
+            taskENTER_CRITICAL();
 
+            {
 
+                /* The task timed out, just return the current event bit value. */
 
+                uxReturn = pxEventBits->uxEventBits;
 
+
 
+                /* It is possible that the event bits were updated between this
 
+                 * task leaving the Blocked state and running again. */
 
+                if( prvTestWaitCondition( uxReturn, uxBitsToWaitFor, xWaitForAllBits ) != pdFALSE )
 
+                {
 
+                    if( xClearOnExit != pdFALSE )
 
+                    {
 
+                        pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                xTimeoutOccurred = pdTRUE;
 
+            }
 
+            taskEXIT_CRITICAL();
 
+        }
 
+        else
 
+        {
 
+            /* The task unblocked because the bits were set. */
 
+        }
 
+
 
+        /* The task blocked so control bits may have been set. */
 
+        uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES;
 
+    }
 
+
 
+    traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred );
 
+
 
+    /* Prevent compiler warnings when trace macros are not used. */
 
+    ( void ) xTimeoutOccurred;
 
+
 
+    return uxReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
 
+                                  const EventBits_t uxBitsToClear )
 
+{
 
+    EventGroup_t * pxEventBits = xEventGroup;
 
+    EventBits_t uxReturn;
 
+
 
+    /* Check the user is not attempting to clear the bits used by the kernel
 
+     * itself. */
 
+    configASSERT( xEventGroup );
 
+    configASSERT( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
 
+
 
+    taskENTER_CRITICAL();
 
+    {
 
+        traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear );
 
+
 
+        /* The value returned is the event group value prior to the bits being
 
+         * cleared. */
 
+        uxReturn = pxEventBits->uxEventBits;
 
+
 
+        /* Clear the bits. */
 
+        pxEventBits->uxEventBits &= ~uxBitsToClear;
 
+    }
 
+    taskEXIT_CRITICAL();
 
+
 
+    return uxReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) )
 
+
 
+    BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup,
 
+                                            const EventBits_t uxBitsToClear )
 
+    {
 
+        BaseType_t xReturn;
 
+
 
+        traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear );
 
+        xReturn = xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup )
 
+{
 
+    UBaseType_t uxSavedInterruptStatus;
 
+    EventGroup_t const * const pxEventBits = xEventGroup;
 
+    EventBits_t uxReturn;
 
+
 
+    uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 
+    {
 
+        uxReturn = pxEventBits->uxEventBits;
 
+    }
 
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+    return uxReturn;
 
+} /*lint !e818 EventGroupHandle_t is a typedef used in other functions to so can't be pointer to const. */
 
+/*-----------------------------------------------------------*/
 
+
 
+EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
 
+                                const EventBits_t uxBitsToSet )
 
+{
 
+    ListItem_t * pxListItem, * pxNext;
 
+    ListItem_t const * pxListEnd;
 
+    List_t const * pxList;
 
+    EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits;
 
+    EventGroup_t * pxEventBits = xEventGroup;
 
+    BaseType_t xMatchFound = pdFALSE;
 
+
 
+    /* Check the user is not attempting to set the bits used by the kernel
 
+     * itself. */
 
+    configASSERT( xEventGroup );
 
+    configASSERT( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
 
+
 
+    pxList = &( pxEventBits->xTasksWaitingForBits );
 
+    pxListEnd = listGET_END_MARKER( pxList ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 
+    vTaskSuspendAll();
 
+    {
 
+        traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet );
 
+
 
+        pxListItem = listGET_HEAD_ENTRY( pxList );
 
+
 
+        /* Set the bits. */
 
+        pxEventBits->uxEventBits |= uxBitsToSet;
 
+
 
+        /* See if the new bit value should unblock any tasks. */
 
+        while( pxListItem != pxListEnd )
 
+        {
 
+            pxNext = listGET_NEXT( pxListItem );
 
+            uxBitsWaitedFor = listGET_LIST_ITEM_VALUE( pxListItem );
 
+            xMatchFound = pdFALSE;
 
+
 
+            /* Split the bits waited for from the control bits. */
 
+            uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES;
 
+            uxBitsWaitedFor &= ~eventEVENT_BITS_CONTROL_BYTES;
 
+
 
+            if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( EventBits_t ) 0 )
 
+            {
 
+                /* Just looking for single bit being set. */
 
+                if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) != ( EventBits_t ) 0 )
 
+                {
 
+                    xMatchFound = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) == uxBitsWaitedFor )
 
+            {
 
+                /* All bits are set. */
 
+                xMatchFound = pdTRUE;
 
+            }
 
+            else
 
+            {
 
+                /* Need all bits to be set, but not all the bits were set. */
 
+            }
 
+
 
+            if( xMatchFound != pdFALSE )
 
+            {
 
+                /* The bits match.  Should the bits be cleared on exit? */
 
+                if( ( uxControlBits & eventCLEAR_EVENTS_ON_EXIT_BIT ) != ( EventBits_t ) 0 )
 
+                {
 
+                    uxBitsToClear |= uxBitsWaitedFor;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                /* Store the actual event flag value in the task's event list
 
+                 * item before removing the task from the event list.  The
 
+                 * eventUNBLOCKED_DUE_TO_BIT_SET bit is set so the task knows
 
+                 * that is was unblocked due to its required bits matching, rather
 
+                 * than because it timed out. */
 
+                vTaskRemoveFromUnorderedEventList( pxListItem, pxEventBits->uxEventBits | eventUNBLOCKED_DUE_TO_BIT_SET );
 
+            }
 
+
 
+            /* Move onto the next list item.  Note pxListItem->pxNext is not
 
+             * used here as the list item may have been removed from the event list
 
+             * and inserted into the ready/pending reading list. */
 
+            pxListItem = pxNext;
 
+        }
 
+
 
+        /* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT
 
+         * bit was set in the control word. */
 
+        pxEventBits->uxEventBits &= ~uxBitsToClear;
 
+    }
 
+    ( void ) xTaskResumeAll();
 
+
 
+    return pxEventBits->uxEventBits;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vEventGroupDelete( EventGroupHandle_t xEventGroup )
 
+{
 
+    configASSERT( xEventGroup );
 
+
 
+    EventGroup_t * pxEventBits = xEventGroup;
 
+    const List_t * pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits );
 
+
 
+    vTaskSuspendAll();
 
+    {
 
+        traceEVENT_GROUP_DELETE( xEventGroup );
 
+
 
+        while( listCURRENT_LIST_LENGTH( pxTasksWaitingForBits ) > ( UBaseType_t ) 0 )
 
+        {
 
+            /* Unblock the task, returning 0 as the event list is being deleted
 
+             * and cannot therefore have any bits set. */
 
+            configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( const ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) );
 
+            vTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET );
 
+        }
 
+
 
+        #if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
 
+            {
 
+                /* The event group can only have been allocated dynamically - free
 
+                 * it again. */
 
+                vPortFree( pxEventBits );
 
+            }
 
+        #elif ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
+            {
 
+                /* The event group could have been allocated statically or
 
+                 * dynamically, so check before attempting to free the memory. */
 
+                if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
 
+                {
 
+                    vPortFree( pxEventBits );
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
+    }
 
+    ( void ) xTaskResumeAll();
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/* For internal use only - execute a 'set bits' command that was pended from
 
+ * an interrupt. */
 
+void vEventGroupSetBitsCallback( void * pvEventGroup,
 
+                                 const uint32_t ulBitsToSet )
 
+{
 
+    ( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/* For internal use only - execute a 'clear bits' command that was pended from
 
+ * an interrupt. */
 
+void vEventGroupClearBitsCallback( void * pvEventGroup,
 
+                                   const uint32_t ulBitsToClear )
 
+{
 
+    ( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits,
 
+                                        const EventBits_t uxBitsToWaitFor,
 
+                                        const BaseType_t xWaitForAllBits )
 
+{
 
+    BaseType_t xWaitConditionMet = pdFALSE;
 
+
 
+    if( xWaitForAllBits == pdFALSE )
 
+    {
 
+        /* Task only has to wait for one bit within uxBitsToWaitFor to be
 
+         * set.  Is one already set? */
 
+        if( ( uxCurrentEventBits & uxBitsToWaitFor ) != ( EventBits_t ) 0 )
 
+        {
 
+            xWaitConditionMet = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    else
 
+    {
 
+        /* Task has to wait for all the bits in uxBitsToWaitFor to be set.
 
+         * Are they set already? */
 
+        if( ( uxCurrentEventBits & uxBitsToWaitFor ) == uxBitsToWaitFor )
 
+        {
 
+            xWaitConditionMet = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+    return xWaitConditionMet;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) )
 
+
 
+    BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup,
 
+                                          const EventBits_t uxBitsToSet,
 
+                                          BaseType_t * pxHigherPriorityTaskWoken )
 
+    {
 
+        BaseType_t xReturn;
 
+
 
+        traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet );
 
+        xReturn = xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    UBaseType_t uxEventGroupGetNumber( void * xEventGroup )
 
+    {
 
+        UBaseType_t xReturn;
 
+        EventGroup_t const * pxEventBits = ( EventGroup_t * ) xEventGroup; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */
 
+
 
+        if( xEventGroup == NULL )
 
+        {
 
+            xReturn = 0;
 
+        }
 
+        else
 
+        {
 
+            xReturn = pxEventBits->uxEventGroupNumber;
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    void vEventGroupSetNumber( void * xEventGroup,
 
+                               UBaseType_t uxEventGroupNumber )
 
+    {
 
+        ( ( EventGroup_t * ) xEventGroup )->uxEventGroupNumber = uxEventGroupNumber; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/

+ 1352 - 0
FreeRTOS/Source/include/FreeRTOS.h
Vedi File 

@@ -0,0 +1,1352 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#ifndef INC_FREERTOS_H
 
+#define INC_FREERTOS_H
 
+
 
+/*
 
+ * Include the generic headers required for the FreeRTOS port being used.
 
+ */
 
+#include <stddef.h>
 
+
 
+/*
 
+ * If stdint.h cannot be located then:
 
+ *   + If using GCC ensure the -nostdint options is *not* being used.
 
+ *   + Ensure the project's include path includes the directory in which your
 
+ *     compiler stores stdint.h.
 
+ *   + Set any compiler options necessary for it to support C99, as technically
 
+ *     stdint.h is only mandatory with C99 (FreeRTOS does not require C99 in any
 
+ *     other way).
 
+ *   + The FreeRTOS download includes a simple stdint.h definition that can be
 
+ *     used in cases where none is provided by the compiler.  The files only
 
+ *     contains the typedefs required to build FreeRTOS.  Read the instructions
 
+ *     in FreeRTOS/source/stdint.readme for more information.
 
+ */
 
+#include <stdint.h>     /* READ COMMENT ABOVE. */
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+/* Application specific configuration options. */
 
+#include "FreeRTOSConfig.h"
 
+
 
+/* Basic FreeRTOS definitions. */
 
+#include "projdefs.h"
 
+
 
+/* Definitions specific to the port being used. */
 
+#include "portable.h"
 
+
 
+/* Must be defaulted before configUSE_NEWLIB_REENTRANT is used below. */
 
+#ifndef configUSE_NEWLIB_REENTRANT
 
+    #define configUSE_NEWLIB_REENTRANT    0
 
+#endif
 
+
 
+/* Required if struct _reent is used. */
 
+#if ( configUSE_NEWLIB_REENTRANT == 1 )
 
+    #include <reent.h>
 
+#endif
 
+
 
+/*
 
+ * Check all the required application specific macros have been defined.
 
+ * These macros are application specific and (as downloaded) are defined
 
+ * within FreeRTOSConfig.h.
 
+ */
 
+
 
+#ifndef configMINIMAL_STACK_SIZE
 
+    #error Missing definition:  configMINIMAL_STACK_SIZE must be defined in FreeRTOSConfig.h.  configMINIMAL_STACK_SIZE defines the size (in words) of the stack allocated to the idle task.  Refer to the demo project provided for your port for a suitable value.
 
+#endif
 
+
 
+#ifndef configMAX_PRIORITIES
 
+    #error Missing definition:  configMAX_PRIORITIES must be defined in FreeRTOSConfig.h.  See the Configuration section of the FreeRTOS API documentation for details.
 
+#endif
 
+
 
+#if configMAX_PRIORITIES < 1
 
+    #error configMAX_PRIORITIES must be defined to be greater than or equal to 1.
 
+#endif
 
+
 
+#ifndef configUSE_PREEMPTION
 
+    #error Missing definition:  configUSE_PREEMPTION must be defined in FreeRTOSConfig.h as either 1 or 0.  See the Configuration section of the FreeRTOS API documentation for details.
 
+#endif
 
+
 
+#ifndef configUSE_IDLE_HOOK
 
+    #error Missing definition:  configUSE_IDLE_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0.  See the Configuration section of the FreeRTOS API documentation for details.
 
+#endif
 
+
 
+#ifndef configUSE_TICK_HOOK
 
+    #error Missing definition:  configUSE_TICK_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0.  See the Configuration section of the FreeRTOS API documentation for details.
 
+#endif
 
+
 
+#ifndef configUSE_16_BIT_TICKS
 
+    #error Missing definition:  configUSE_16_BIT_TICKS must be defined in FreeRTOSConfig.h as either 1 or 0.  See the Configuration section of the FreeRTOS API documentation for details.
 
+#endif
 
+
 
+#ifndef configUSE_CO_ROUTINES
 
+    #define configUSE_CO_ROUTINES    0
 
+#endif
 
+
 
+#ifndef INCLUDE_vTaskPrioritySet
 
+    #define INCLUDE_vTaskPrioritySet    0
 
+#endif
 
+
 
+#ifndef INCLUDE_uxTaskPriorityGet
 
+    #define INCLUDE_uxTaskPriorityGet    0
 
+#endif
 
+
 
+#ifndef INCLUDE_vTaskDelete
 
+    #define INCLUDE_vTaskDelete    0
 
+#endif
 
+
 
+#ifndef INCLUDE_vTaskSuspend
 
+    #define INCLUDE_vTaskSuspend    0
 
+#endif
 
+
 
+#ifdef INCLUDE_xTaskDelayUntil
 
+    #ifdef INCLUDE_vTaskDelayUntil
 
+        /* INCLUDE_vTaskDelayUntil was replaced by INCLUDE_xTaskDelayUntil.  Backward
 
+         * compatibility is maintained if only one or the other is defined, but
 
+         * there is a conflict if both are defined. */
 
+        #error INCLUDE_vTaskDelayUntil and INCLUDE_xTaskDelayUntil are both defined.  INCLUDE_vTaskDelayUntil is no longer required and should be removed
 
+    #endif
 
+#endif
 
+
 
+#ifndef INCLUDE_xTaskDelayUntil
 
+    #ifdef INCLUDE_vTaskDelayUntil
 
+        /* If INCLUDE_vTaskDelayUntil is set but INCLUDE_xTaskDelayUntil is not then
 
+         * the project's FreeRTOSConfig.h probably pre-dates the introduction of
 
+         * xTaskDelayUntil and setting INCLUDE_xTaskDelayUntil to whatever
 
+         * INCLUDE_vTaskDelayUntil is set to will ensure backward compatibility.
 
+         */
 
+        #define INCLUDE_xTaskDelayUntil INCLUDE_vTaskDelayUntil
 
+    #endif
 
+#endif
 
+
 
+#ifndef INCLUDE_xTaskDelayUntil
 
+    #define INCLUDE_xTaskDelayUntil    0
 
+#endif
 
+
 
+#ifndef INCLUDE_vTaskDelay
 
+    #define INCLUDE_vTaskDelay    0
 
+#endif
 
+
 
+#ifndef INCLUDE_xTaskGetIdleTaskHandle
 
+    #define INCLUDE_xTaskGetIdleTaskHandle    0
 
+#endif
 
+
 
+#ifndef INCLUDE_xTaskAbortDelay
 
+    #define INCLUDE_xTaskAbortDelay    0
 
+#endif
 
+
 
+#ifndef INCLUDE_xQueueGetMutexHolder
 
+    #define INCLUDE_xQueueGetMutexHolder    0
 
+#endif
 
+
 
+#ifndef INCLUDE_xSemaphoreGetMutexHolder
 
+    #define INCLUDE_xSemaphoreGetMutexHolder    INCLUDE_xQueueGetMutexHolder
 
+#endif
 
+
 
+#ifndef INCLUDE_xTaskGetHandle
 
+    #define INCLUDE_xTaskGetHandle    0
 
+#endif
 
+
 
+#ifndef INCLUDE_uxTaskGetStackHighWaterMark
 
+    #define INCLUDE_uxTaskGetStackHighWaterMark    0
 
+#endif
 
+
 
+#ifndef INCLUDE_uxTaskGetStackHighWaterMark2
 
+    #define INCLUDE_uxTaskGetStackHighWaterMark2    0
 
+#endif
 
+
 
+#ifndef INCLUDE_eTaskGetState
 
+    #define INCLUDE_eTaskGetState    0
 
+#endif
 
+
 
+#ifndef INCLUDE_xTaskResumeFromISR
 
+    #define INCLUDE_xTaskResumeFromISR    1
 
+#endif
 
+
 
+#ifndef INCLUDE_xTimerPendFunctionCall
 
+    #define INCLUDE_xTimerPendFunctionCall    0
 
+#endif
 
+
 
+#ifndef INCLUDE_xTaskGetSchedulerState
 
+    #define INCLUDE_xTaskGetSchedulerState    0
 
+#endif
 
+
 
+#ifndef INCLUDE_xTaskGetCurrentTaskHandle
 
+    #define INCLUDE_xTaskGetCurrentTaskHandle    0
 
+#endif
 
+
 
+#if configUSE_CO_ROUTINES != 0
 
+    #ifndef configMAX_CO_ROUTINE_PRIORITIES
 
+        #error configMAX_CO_ROUTINE_PRIORITIES must be greater than or equal to 1.
 
+    #endif
 
+#endif
 
+
 
+#ifndef configUSE_DAEMON_TASK_STARTUP_HOOK
 
+    #define configUSE_DAEMON_TASK_STARTUP_HOOK    0
 
+#endif
 
+
 
+#ifndef configUSE_APPLICATION_TASK_TAG
 
+    #define configUSE_APPLICATION_TASK_TAG    0
 
+#endif
 
+
 
+#ifndef configNUM_THREAD_LOCAL_STORAGE_POINTERS
 
+    #define configNUM_THREAD_LOCAL_STORAGE_POINTERS    0
 
+#endif
 
+
 
+#ifndef configUSE_RECURSIVE_MUTEXES
 
+    #define configUSE_RECURSIVE_MUTEXES    0
 
+#endif
 
+
 
+#ifndef configUSE_MUTEXES
 
+    #define configUSE_MUTEXES    0
 
+#endif
 
+
 
+#ifndef configUSE_TIMERS
 
+    #define configUSE_TIMERS    0
 
+#endif
 
+
 
+#ifndef configUSE_COUNTING_SEMAPHORES
 
+    #define configUSE_COUNTING_SEMAPHORES    0
 
+#endif
 
+
 
+#ifndef configUSE_ALTERNATIVE_API
 
+    #define configUSE_ALTERNATIVE_API    0
 
+#endif
 
+
 
+#ifndef portCRITICAL_NESTING_IN_TCB
 
+    #define portCRITICAL_NESTING_IN_TCB    0
 
+#endif
 
+
 
+#ifndef configMAX_TASK_NAME_LEN
 
+    #define configMAX_TASK_NAME_LEN    16
 
+#endif
 
+
 
+#ifndef configIDLE_SHOULD_YIELD
 
+    #define configIDLE_SHOULD_YIELD    1
 
+#endif
 
+
 
+#if configMAX_TASK_NAME_LEN < 1
 
+    #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h
 
+#endif
 
+
 
+#ifndef configASSERT
 
+    #define configASSERT( x )
 
+    #define configASSERT_DEFINED    0
 
+#else
 
+    #define configASSERT_DEFINED    1
 
+#endif
 
+
 
+/* configPRECONDITION should be defined as configASSERT.
 
+ * The CBMC proofs need a way to track assumptions and assertions.
 
+ * A configPRECONDITION statement should express an implicit invariant or
 
+ * assumption made.  A configASSERT statement should express an invariant that must
 
+ * hold explicit before calling the code. */
 
+#ifndef configPRECONDITION
 
+    #define configPRECONDITION( X )    configASSERT( X )
 
+    #define configPRECONDITION_DEFINED    0
 
+#else
 
+    #define configPRECONDITION_DEFINED    1
 
+#endif
 
+
 
+#ifndef portMEMORY_BARRIER
 
+    #define portMEMORY_BARRIER()
 
+#endif
 
+
 
+#ifndef portSOFTWARE_BARRIER
 
+    #define portSOFTWARE_BARRIER()
 
+#endif
 
+
 
+/* The timers module relies on xTaskGetSchedulerState(). */
 
+#if configUSE_TIMERS == 1
 
+
 
+    #ifndef configTIMER_TASK_PRIORITY
 
+        #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_PRIORITY must also be defined.
 
+    #endif /* configTIMER_TASK_PRIORITY */
 
+
 
+    #ifndef configTIMER_QUEUE_LENGTH
 
+        #error If configUSE_TIMERS is set to 1 then configTIMER_QUEUE_LENGTH must also be defined.
 
+    #endif /* configTIMER_QUEUE_LENGTH */
 
+
 
+    #ifndef configTIMER_TASK_STACK_DEPTH
 
+        #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_STACK_DEPTH must also be defined.
 
+    #endif /* configTIMER_TASK_STACK_DEPTH */
 
+
 
+#endif /* configUSE_TIMERS */
 
+
 
+#ifndef portSET_INTERRUPT_MASK_FROM_ISR
 
+    #define portSET_INTERRUPT_MASK_FROM_ISR()    0
 
+#endif
 
+
 
+#ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR
 
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue )    ( void ) uxSavedStatusValue
 
+#endif
 
+
 
+#ifndef portCLEAN_UP_TCB
 
+    #define portCLEAN_UP_TCB( pxTCB )    ( void ) pxTCB
 
+#endif
 
+
 
+#ifndef portPRE_TASK_DELETE_HOOK
 
+    #define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxYieldPending )
 
+#endif
 
+
 
+#ifndef portSETUP_TCB
 
+    #define portSETUP_TCB( pxTCB )    ( void ) pxTCB
 
+#endif
 
+
 
+#ifndef configQUEUE_REGISTRY_SIZE
 
+    #define configQUEUE_REGISTRY_SIZE    0U
 
+#endif
 
+
 
+#if ( configQUEUE_REGISTRY_SIZE < 1 )
 
+    #define vQueueAddToRegistry( xQueue, pcName )
 
+    #define vQueueUnregisterQueue( xQueue )
 
+    #define pcQueueGetName( xQueue )
 
+#endif
 
+
 
+#ifndef portPOINTER_SIZE_TYPE
 
+    #define portPOINTER_SIZE_TYPE    uint32_t
 
+#endif
 
+
 
+/* Remove any unused trace macros. */
 
+#ifndef traceSTART
 
+
 
+/* Used to perform any necessary initialisation - for example, open a file
 
+ * into which trace is to be written. */
 
+    #define traceSTART()
 
+#endif
 
+
 
+#ifndef traceEND
 
+
 
+/* Use to close a trace, for example close a file into which trace has been
 
+ * written. */
 
+    #define traceEND()
 
+#endif
 
+
 
+#ifndef traceTASK_SWITCHED_IN
 
+
 
+/* Called after a task has been selected to run.  pxCurrentTCB holds a pointer
 
+ * to the task control block of the selected task. */
 
+    #define traceTASK_SWITCHED_IN()
 
+#endif
 
+
 
+#ifndef traceINCREASE_TICK_COUNT
 
+
 
+/* Called before stepping the tick count after waking from tickless idle
 
+ * sleep. */
 
+    #define traceINCREASE_TICK_COUNT( x )
 
+#endif
 
+
 
+#ifndef traceLOW_POWER_IDLE_BEGIN
 
+    /* Called immediately before entering tickless idle. */
 
+    #define traceLOW_POWER_IDLE_BEGIN()
 
+#endif
 
+
 
+#ifndef traceLOW_POWER_IDLE_END
 
+    /* Called when returning to the Idle task after a tickless idle. */
 
+    #define traceLOW_POWER_IDLE_END()
 
+#endif
 
+
 
+#ifndef traceTASK_SWITCHED_OUT
 
+
 
+/* Called before a task has been selected to run.  pxCurrentTCB holds a pointer
 
+ * to the task control block of the task being switched out. */
 
+    #define traceTASK_SWITCHED_OUT()
 
+#endif
 
+
 
+#ifndef traceTASK_PRIORITY_INHERIT
 
+
 
+/* Called when a task attempts to take a mutex that is already held by a
 
+ * lower priority task.  pxTCBOfMutexHolder is a pointer to the TCB of the task
 
+ * that holds the mutex.  uxInheritedPriority is the priority the mutex holder
 
+ * will inherit (the priority of the task that is attempting to obtain the
 
+ * muted. */
 
+    #define traceTASK_PRIORITY_INHERIT( pxTCBOfMutexHolder, uxInheritedPriority )
 
+#endif
 
+
 
+#ifndef traceTASK_PRIORITY_DISINHERIT
 
+
 
+/* Called when a task releases a mutex, the holding of which had resulted in
 
+ * the task inheriting the priority of a higher priority task.
 
+ * pxTCBOfMutexHolder is a pointer to the TCB of the task that is releasing the
 
+ * mutex.  uxOriginalPriority is the task's configured (base) priority. */
 
+    #define traceTASK_PRIORITY_DISINHERIT( pxTCBOfMutexHolder, uxOriginalPriority )
 
+#endif
 
+
 
+#ifndef traceBLOCKING_ON_QUEUE_RECEIVE
 
+
 
+/* Task is about to block because it cannot read from a
 
+ * queue/mutex/semaphore.  pxQueue is a pointer to the queue/mutex/semaphore
 
+ * upon which the read was attempted.  pxCurrentTCB points to the TCB of the
 
+ * task that attempted the read. */
 
+    #define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue )
 
+#endif
 
+
 
+#ifndef traceBLOCKING_ON_QUEUE_PEEK
 
+
 
+/* Task is about to block because it cannot read from a
 
+ * queue/mutex/semaphore.  pxQueue is a pointer to the queue/mutex/semaphore
 
+ * upon which the read was attempted.  pxCurrentTCB points to the TCB of the
 
+ * task that attempted the read. */
 
+    #define traceBLOCKING_ON_QUEUE_PEEK( pxQueue )
 
+#endif
 
+
 
+#ifndef traceBLOCKING_ON_QUEUE_SEND
 
+
 
+/* Task is about to block because it cannot write to a
 
+ * queue/mutex/semaphore.  pxQueue is a pointer to the queue/mutex/semaphore
 
+ * upon which the write was attempted.  pxCurrentTCB points to the TCB of the
 
+ * task that attempted the write. */
 
+    #define traceBLOCKING_ON_QUEUE_SEND( pxQueue )
 
+#endif
 
+
 
+#ifndef configCHECK_FOR_STACK_OVERFLOW
 
+    #define configCHECK_FOR_STACK_OVERFLOW    0
 
+#endif
 
+
 
+#ifndef configRECORD_STACK_HIGH_ADDRESS
 
+    #define configRECORD_STACK_HIGH_ADDRESS    0
 
+#endif
 
+
 
+#ifndef configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H
 
+    #define configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H    0
 
+#endif
 
+
 
+/* The following event macros are embedded in the kernel API calls. */
 
+
 
+#ifndef traceMOVED_TASK_TO_READY_STATE
 
+    #define traceMOVED_TASK_TO_READY_STATE( pxTCB )
 
+#endif
 
+
 
+#ifndef tracePOST_MOVED_TASK_TO_READY_STATE
 
+    #define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
 
+#endif
 
+
 
+#ifndef traceQUEUE_CREATE
 
+    #define traceQUEUE_CREATE( pxNewQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_CREATE_FAILED
 
+    #define traceQUEUE_CREATE_FAILED( ucQueueType )
 
+#endif
 
+
 
+#ifndef traceCREATE_MUTEX
 
+    #define traceCREATE_MUTEX( pxNewQueue )
 
+#endif
 
+
 
+#ifndef traceCREATE_MUTEX_FAILED
 
+    #define traceCREATE_MUTEX_FAILED()
 
+#endif
 
+
 
+#ifndef traceGIVE_MUTEX_RECURSIVE
 
+    #define traceGIVE_MUTEX_RECURSIVE( pxMutex )
 
+#endif
 
+
 
+#ifndef traceGIVE_MUTEX_RECURSIVE_FAILED
 
+    #define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex )
 
+#endif
 
+
 
+#ifndef traceTAKE_MUTEX_RECURSIVE
 
+    #define traceTAKE_MUTEX_RECURSIVE( pxMutex )
 
+#endif
 
+
 
+#ifndef traceTAKE_MUTEX_RECURSIVE_FAILED
 
+    #define traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex )
 
+#endif
 
+
 
+#ifndef traceCREATE_COUNTING_SEMAPHORE
 
+    #define traceCREATE_COUNTING_SEMAPHORE()
 
+#endif
 
+
 
+#ifndef traceCREATE_COUNTING_SEMAPHORE_FAILED
 
+    #define traceCREATE_COUNTING_SEMAPHORE_FAILED()
 
+#endif
 
+
 
+#ifndef traceQUEUE_SET_SEND
 
+    #define traceQUEUE_SET_SEND    traceQUEUE_SEND
 
+#endif
 
+
 
+#ifndef traceQUEUE_SEND
 
+    #define traceQUEUE_SEND( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_SEND_FAILED
 
+    #define traceQUEUE_SEND_FAILED( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_RECEIVE
 
+    #define traceQUEUE_RECEIVE( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_PEEK
 
+    #define traceQUEUE_PEEK( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_PEEK_FAILED
 
+    #define traceQUEUE_PEEK_FAILED( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_PEEK_FROM_ISR
 
+    #define traceQUEUE_PEEK_FROM_ISR( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_RECEIVE_FAILED
 
+    #define traceQUEUE_RECEIVE_FAILED( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_SEND_FROM_ISR
 
+    #define traceQUEUE_SEND_FROM_ISR( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_SEND_FROM_ISR_FAILED
 
+    #define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_RECEIVE_FROM_ISR
 
+    #define traceQUEUE_RECEIVE_FROM_ISR( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_RECEIVE_FROM_ISR_FAILED
 
+    #define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_PEEK_FROM_ISR_FAILED
 
+    #define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue )
 
+#endif
 
+
 
+#ifndef traceQUEUE_DELETE
 
+    #define traceQUEUE_DELETE( pxQueue )
 
+#endif
 
+
 
+#ifndef traceTASK_CREATE
 
+    #define traceTASK_CREATE( pxNewTCB )
 
+#endif
 
+
 
+#ifndef traceTASK_CREATE_FAILED
 
+    #define traceTASK_CREATE_FAILED()
 
+#endif
 
+
 
+#ifndef traceTASK_DELETE
 
+    #define traceTASK_DELETE( pxTaskToDelete )
 
+#endif
 
+
 
+#ifndef traceTASK_DELAY_UNTIL
 
+    #define traceTASK_DELAY_UNTIL( x )
 
+#endif
 
+
 
+#ifndef traceTASK_DELAY
 
+    #define traceTASK_DELAY()
 
+#endif
 
+
 
+#ifndef traceTASK_PRIORITY_SET
 
+    #define traceTASK_PRIORITY_SET( pxTask, uxNewPriority )
 
+#endif
 
+
 
+#ifndef traceTASK_SUSPEND
 
+    #define traceTASK_SUSPEND( pxTaskToSuspend )
 
+#endif
 
+
 
+#ifndef traceTASK_RESUME
 
+    #define traceTASK_RESUME( pxTaskToResume )
 
+#endif
 
+
 
+#ifndef traceTASK_RESUME_FROM_ISR
 
+    #define traceTASK_RESUME_FROM_ISR( pxTaskToResume )
 
+#endif
 
+
 
+#ifndef traceTASK_INCREMENT_TICK
 
+    #define traceTASK_INCREMENT_TICK( xTickCount )
 
+#endif
 
+
 
+#ifndef traceTIMER_CREATE
 
+    #define traceTIMER_CREATE( pxNewTimer )
 
+#endif
 
+
 
+#ifndef traceTIMER_CREATE_FAILED
 
+    #define traceTIMER_CREATE_FAILED()
 
+#endif
 
+
 
+#ifndef traceTIMER_COMMAND_SEND
 
+    #define traceTIMER_COMMAND_SEND( xTimer, xMessageID, xMessageValueValue, xReturn )
 
+#endif
 
+
 
+#ifndef traceTIMER_EXPIRED
 
+    #define traceTIMER_EXPIRED( pxTimer )
 
+#endif
 
+
 
+#ifndef traceTIMER_COMMAND_RECEIVED
 
+    #define traceTIMER_COMMAND_RECEIVED( pxTimer, xMessageID, xMessageValue )
 
+#endif
 
+
 
+#ifndef traceMALLOC
 
+    #define traceMALLOC( pvAddress, uiSize )
 
+#endif
 
+
 
+#ifndef traceFREE
 
+    #define traceFREE( pvAddress, uiSize )
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_CREATE
 
+    #define traceEVENT_GROUP_CREATE( xEventGroup )
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_CREATE_FAILED
 
+    #define traceEVENT_GROUP_CREATE_FAILED()
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_SYNC_BLOCK
 
+    #define traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor )
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_SYNC_END
 
+    #define traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred )    ( void ) xTimeoutOccurred
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_WAIT_BITS_BLOCK
 
+    #define traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor )
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_WAIT_BITS_END
 
+    #define traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred )    ( void ) xTimeoutOccurred
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_CLEAR_BITS
 
+    #define traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear )
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR
 
+    #define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear )
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_SET_BITS
 
+    #define traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet )
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_SET_BITS_FROM_ISR
 
+    #define traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet )
 
+#endif
 
+
 
+#ifndef traceEVENT_GROUP_DELETE
 
+    #define traceEVENT_GROUP_DELETE( xEventGroup )
 
+#endif
 
+
 
+#ifndef tracePEND_FUNC_CALL
 
+    #define tracePEND_FUNC_CALL( xFunctionToPend, pvParameter1, ulParameter2, ret )
 
+#endif
 
+
 
+#ifndef tracePEND_FUNC_CALL_FROM_ISR
 
+    #define tracePEND_FUNC_CALL_FROM_ISR( xFunctionToPend, pvParameter1, ulParameter2, ret )
 
+#endif
 
+
 
+#ifndef traceQUEUE_REGISTRY_ADD
 
+    #define traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName )
 
+#endif
 
+
 
+#ifndef traceTASK_NOTIFY_TAKE_BLOCK
 
+    #define traceTASK_NOTIFY_TAKE_BLOCK( uxIndexToWait )
 
+#endif
 
+
 
+#ifndef traceTASK_NOTIFY_TAKE
 
+    #define traceTASK_NOTIFY_TAKE( uxIndexToWait )
 
+#endif
 
+
 
+#ifndef traceTASK_NOTIFY_WAIT_BLOCK
 
+    #define traceTASK_NOTIFY_WAIT_BLOCK( uxIndexToWait )
 
+#endif
 
+
 
+#ifndef traceTASK_NOTIFY_WAIT
 
+    #define traceTASK_NOTIFY_WAIT( uxIndexToWait )
 
+#endif
 
+
 
+#ifndef traceTASK_NOTIFY
 
+    #define traceTASK_NOTIFY( uxIndexToNotify )
 
+#endif
 
+
 
+#ifndef traceTASK_NOTIFY_FROM_ISR
 
+    #define traceTASK_NOTIFY_FROM_ISR( uxIndexToNotify )
 
+#endif
 
+
 
+#ifndef traceTASK_NOTIFY_GIVE_FROM_ISR
 
+    #define traceTASK_NOTIFY_GIVE_FROM_ISR( uxIndexToNotify )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_CREATE_FAILED
 
+    #define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_CREATE_STATIC_FAILED
 
+    #define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_CREATE
 
+    #define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_DELETE
 
+    #define traceSTREAM_BUFFER_DELETE( xStreamBuffer )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_RESET
 
+    #define traceSTREAM_BUFFER_RESET( xStreamBuffer )
 
+#endif
 
+
 
+#ifndef traceBLOCKING_ON_STREAM_BUFFER_SEND
 
+    #define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_SEND
 
+    #define traceSTREAM_BUFFER_SEND( xStreamBuffer, xBytesSent )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_SEND_FAILED
 
+    #define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_SEND_FROM_ISR
 
+    #define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xBytesSent )
 
+#endif
 
+
 
+#ifndef traceBLOCKING_ON_STREAM_BUFFER_RECEIVE
 
+    #define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_RECEIVE
 
+    #define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_RECEIVE_FAILED
 
+    #define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer )
 
+#endif
 
+
 
+#ifndef traceSTREAM_BUFFER_RECEIVE_FROM_ISR
 
+    #define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength )
 
+#endif
 
+
 
+#ifndef configGENERATE_RUN_TIME_STATS
 
+    #define configGENERATE_RUN_TIME_STATS    0
 
+#endif
 
+
 
+#if ( configGENERATE_RUN_TIME_STATS == 1 )
 
+
 
+    #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS
 
+        #error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined.  portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base.
 
+    #endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */
 
+
 
+    #ifndef portGET_RUN_TIME_COUNTER_VALUE
 
+        #ifndef portALT_GET_RUN_TIME_COUNTER_VALUE
 
+            #error If configGENERATE_RUN_TIME_STATS is defined then either portGET_RUN_TIME_COUNTER_VALUE or portALT_GET_RUN_TIME_COUNTER_VALUE must also be defined.  See the examples provided and the FreeRTOS web site for more information.
 
+        #endif /* portALT_GET_RUN_TIME_COUNTER_VALUE */
 
+    #endif /* portGET_RUN_TIME_COUNTER_VALUE */
 
+
 
+#endif /* configGENERATE_RUN_TIME_STATS */
 
+
 
+#ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS
 
+    #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
 
+#endif
 
+
 
+#ifndef configUSE_MALLOC_FAILED_HOOK
 
+    #define configUSE_MALLOC_FAILED_HOOK    0
 
+#endif
 
+
 
+#ifndef portPRIVILEGE_BIT
 
+    #define portPRIVILEGE_BIT    ( ( UBaseType_t ) 0x00 )
 
+#endif
 
+
 
+#ifndef portYIELD_WITHIN_API
 
+    #define portYIELD_WITHIN_API    portYIELD
 
+#endif
 
+
 
+#ifndef portSUPPRESS_TICKS_AND_SLEEP
 
+    #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )
 
+#endif
 
+
 
+#ifndef configEXPECTED_IDLE_TIME_BEFORE_SLEEP
 
+    #define configEXPECTED_IDLE_TIME_BEFORE_SLEEP    2
 
+#endif
 
+
 
+#if configEXPECTED_IDLE_TIME_BEFORE_SLEEP < 2
 
+    #error configEXPECTED_IDLE_TIME_BEFORE_SLEEP must not be less than 2
 
+#endif
 
+
 
+#ifndef configUSE_TICKLESS_IDLE
 
+    #define configUSE_TICKLESS_IDLE    0
 
+#endif
 
+
 
+#ifndef configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING
 
+    #define configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( x )
 
+#endif
 
+
 
+#ifndef configPRE_SLEEP_PROCESSING
 
+    #define configPRE_SLEEP_PROCESSING( x )
 
+#endif
 
+
 
+#ifndef configPOST_SLEEP_PROCESSING
 
+    #define configPOST_SLEEP_PROCESSING( x )
 
+#endif
 
+
 
+#ifndef configUSE_QUEUE_SETS
 
+    #define configUSE_QUEUE_SETS    0
 
+#endif
 
+
 
+#ifndef portTASK_USES_FLOATING_POINT
 
+    #define portTASK_USES_FLOATING_POINT()
 
+#endif
 
+
 
+#ifndef portALLOCATE_SECURE_CONTEXT
 
+    #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
 
+#endif
 
+
 
+#ifndef portDONT_DISCARD
 
+    #define portDONT_DISCARD
 
+#endif
 
+
 
+#ifndef configUSE_TIME_SLICING
 
+    #define configUSE_TIME_SLICING    1
 
+#endif
 
+
 
+#ifndef configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
 
+    #define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS    0
 
+#endif
 
+
 
+#ifndef configUSE_STATS_FORMATTING_FUNCTIONS
 
+    #define configUSE_STATS_FORMATTING_FUNCTIONS    0
 
+#endif
 
+
 
+#ifndef portASSERT_IF_INTERRUPT_PRIORITY_INVALID
 
+    #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()
 
+#endif
 
+
 
+#ifndef configUSE_TRACE_FACILITY
 
+    #define configUSE_TRACE_FACILITY    0
 
+#endif
 
+
 
+#ifndef mtCOVERAGE_TEST_MARKER
 
+    #define mtCOVERAGE_TEST_MARKER()
 
+#endif
 
+
 
+#ifndef mtCOVERAGE_TEST_DELAY
 
+    #define mtCOVERAGE_TEST_DELAY()
 
+#endif
 
+
 
+#ifndef portASSERT_IF_IN_ISR
 
+    #define portASSERT_IF_IN_ISR()
 
+#endif
 
+
 
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
 
+    #define configUSE_PORT_OPTIMISED_TASK_SELECTION    0
 
+#endif
 
+
 
+#ifndef configAPPLICATION_ALLOCATED_HEAP
 
+    #define configAPPLICATION_ALLOCATED_HEAP    0
 
+#endif
 
+
 
+#ifndef configUSE_TASK_NOTIFICATIONS
 
+    #define configUSE_TASK_NOTIFICATIONS    1
 
+#endif
 
+
 
+#ifndef configTASK_NOTIFICATION_ARRAY_ENTRIES
 
+    #define configTASK_NOTIFICATION_ARRAY_ENTRIES    1
 
+#endif
 
+
 
+#if configTASK_NOTIFICATION_ARRAY_ENTRIES < 1
 
+    #error configTASK_NOTIFICATION_ARRAY_ENTRIES must be at least 1
 
+#endif
 
+
 
+#ifndef configUSE_POSIX_ERRNO
 
+    #define configUSE_POSIX_ERRNO    0
 
+#endif
 
+
 
+#ifndef portTICK_TYPE_IS_ATOMIC
 
+    #define portTICK_TYPE_IS_ATOMIC    0
 
+#endif
 
+
 
+#ifndef configSUPPORT_STATIC_ALLOCATION
 
+    /* Defaults to 0 for backward compatibility. */
 
+    #define configSUPPORT_STATIC_ALLOCATION    0
 
+#endif
 
+
 
+#ifndef configSUPPORT_DYNAMIC_ALLOCATION
 
+    /* Defaults to 1 for backward compatibility. */
 
+    #define configSUPPORT_DYNAMIC_ALLOCATION    1
 
+#endif
 
+
 
+#ifndef configSTACK_DEPTH_TYPE
 
+
 
+/* Defaults to uint16_t for backward compatibility, but can be overridden
 
+ * in FreeRTOSConfig.h if uint16_t is too restrictive. */
 
+    #define configSTACK_DEPTH_TYPE    uint16_t
 
+#endif
 
+
 
+#ifndef configMESSAGE_BUFFER_LENGTH_TYPE
 
+
 
+/* Defaults to size_t for backward compatibility, but can be overridden
 
+ * in FreeRTOSConfig.h if lengths will always be less than the number of bytes
 
+ * in a size_t. */
 
+    #define configMESSAGE_BUFFER_LENGTH_TYPE    size_t
 
+#endif
 
+
 
+/* Sanity check the configuration. */
 
+#if ( configUSE_TICKLESS_IDLE != 0 )
 
+    #if ( INCLUDE_vTaskSuspend != 1 )
 
+        #error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0
 
+    #endif /* INCLUDE_vTaskSuspend */
 
+#endif /* configUSE_TICKLESS_IDLE */
 
+
 
+#if ( ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) )
 
+    #error configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION cannot both be 0, but can both be 1.
 
+#endif
 
+
 
+#if ( ( configUSE_RECURSIVE_MUTEXES == 1 ) && ( configUSE_MUTEXES != 1 ) )
 
+    #error configUSE_MUTEXES must be set to 1 to use recursive mutexes
 
+#endif
 
+
 
+#ifndef configINITIAL_TICK_COUNT
 
+    #define configINITIAL_TICK_COUNT    0
 
+#endif
 
+
 
+#if ( portTICK_TYPE_IS_ATOMIC == 0 )
 
+
 
+/* Either variables of tick type cannot be read atomically, or
 
+ * portTICK_TYPE_IS_ATOMIC was not set - map the critical sections used when
 
+ * the tick count is returned to the standard critical section macros. */
 
+    #define portTICK_TYPE_ENTER_CRITICAL()                      portENTER_CRITICAL()
 
+    #define portTICK_TYPE_EXIT_CRITICAL()                       portEXIT_CRITICAL()
 
+    #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR()         portSET_INTERRUPT_MASK_FROM_ISR()
 
+    #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x )    portCLEAR_INTERRUPT_MASK_FROM_ISR( ( x ) )
 
+#else
 
+
 
+/* The tick type can be read atomically, so critical sections used when the
 
+ * tick count is returned can be defined away. */
 
+    #define portTICK_TYPE_ENTER_CRITICAL()
 
+    #define portTICK_TYPE_EXIT_CRITICAL()
 
+    #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR()         0
 
+    #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x )    ( void ) x
 
+#endif /* if ( portTICK_TYPE_IS_ATOMIC == 0 ) */
 
+
 
+/* Definitions to allow backward compatibility with FreeRTOS versions prior to
 
+ * V8 if desired. */
 
+#ifndef configENABLE_BACKWARD_COMPATIBILITY
 
+    #define configENABLE_BACKWARD_COMPATIBILITY    1
 
+#endif
 
+
 
+#ifndef configPRINTF
 
+
 
+/* configPRINTF() was not defined, so define it away to nothing.  To use
 
+ * configPRINTF() then define it as follows (where MyPrintFunction() is
 
+ * provided by the application writer):
 
+ *
 
+ * void MyPrintFunction(const char *pcFormat, ... );
 
+ #define configPRINTF( X )   MyPrintFunction X
 
+ *
 
+ * Then call like a standard printf() function, but placing brackets around
 
+ * all parameters so they are passed as a single parameter.  For example:
 
+ * configPRINTF( ("Value = %d", MyVariable) ); */
 
+    #define configPRINTF( X )
 
+#endif
 
+
 
+#ifndef configMAX
 
+
 
+/* The application writer has not provided their own MAX macro, so define
 
+ * the following generic implementation. */
 
+    #define configMAX( a, b )    ( ( ( a ) > ( b ) ) ? ( a ) : ( b ) )
 
+#endif
 
+
 
+#ifndef configMIN
 
+
 
+/* The application writer has not provided their own MIN macro, so define
 
+ * the following generic implementation. */
 
+    #define configMIN( a, b )    ( ( ( a ) < ( b ) ) ? ( a ) : ( b ) )
 
+#endif
 
+
 
+#if configENABLE_BACKWARD_COMPATIBILITY == 1
 
+    #define eTaskStateGet                 eTaskGetState
 
+    #define portTickType                  TickType_t
 
+    #define xTaskHandle                   TaskHandle_t
 
+    #define xQueueHandle                  QueueHandle_t
 
+    #define xSemaphoreHandle              SemaphoreHandle_t
 
+    #define xQueueSetHandle               QueueSetHandle_t
 
+    #define xQueueSetMemberHandle         QueueSetMemberHandle_t
 
+    #define xTimeOutType                  TimeOut_t
 
+    #define xMemoryRegion                 MemoryRegion_t
 
+    #define xTaskParameters               TaskParameters_t
 
+    #define xTaskStatusType               TaskStatus_t
 
+    #define xTimerHandle                  TimerHandle_t
 
+    #define xCoRoutineHandle              CoRoutineHandle_t
 
+    #define pdTASK_HOOK_CODE              TaskHookFunction_t
 
+    #define portTICK_RATE_MS              portTICK_PERIOD_MS
 
+    #define pcTaskGetTaskName             pcTaskGetName
 
+    #define pcTimerGetTimerName           pcTimerGetName
 
+    #define pcQueueGetQueueName           pcQueueGetName
 
+    #define vTaskGetTaskInfo              vTaskGetInfo
 
+    #define xTaskGetIdleRunTimeCounter    ulTaskGetIdleRunTimeCounter
 
+
 
+/* Backward compatibility within the scheduler code only - these definitions
 
+ * are not really required but are included for completeness. */
 
+    #define tmrTIMER_CALLBACK             TimerCallbackFunction_t
 
+    #define pdTASK_CODE                   TaskFunction_t
 
+    #define xListItem                     ListItem_t
 
+    #define xList                         List_t
 
+
 
+/* For libraries that break the list data hiding, and access list structure
 
+ * members directly (which is not supposed to be done). */
 
+    #define pxContainer                   pvContainer
 
+#endif /* configENABLE_BACKWARD_COMPATIBILITY */
 
+
 
+#if ( configUSE_ALTERNATIVE_API != 0 )
 
+    #error The alternative API was deprecated some time ago, and was removed in FreeRTOS V9.0 0
 
+#endif
 
+
 
+/* Set configUSE_TASK_FPU_SUPPORT to 0 to omit floating point support even
 
+ * if floating point hardware is otherwise supported by the FreeRTOS port in use.
 
+ * This constant is not supported by all FreeRTOS ports that include floating
 
+ * point support. */
 
+#ifndef configUSE_TASK_FPU_SUPPORT
 
+    #define configUSE_TASK_FPU_SUPPORT    1
 
+#endif
 
+
 
+/* Set configENABLE_MPU to 1 to enable MPU support and 0 to disable it. This is
 
+ * currently used in ARMv8M ports. */
 
+#ifndef configENABLE_MPU
 
+    #define configENABLE_MPU    0
 
+#endif
 
+
 
+/* Set configENABLE_FPU to 1 to enable FPU support and 0 to disable it. This is
 
+ * currently used in ARMv8M ports. */
 
+#ifndef configENABLE_FPU
 
+    #define configENABLE_FPU    1
 
+#endif
 
+
 
+/* Set configENABLE_TRUSTZONE to 1 enable TrustZone support and 0 to disable it.
 
+ * This is currently used in ARMv8M ports. */
 
+#ifndef configENABLE_TRUSTZONE
 
+    #define configENABLE_TRUSTZONE    1
 
+#endif
 
+
 
+/* Set configRUN_FREERTOS_SECURE_ONLY to 1 to run the FreeRTOS ARMv8M port on
 
+ * the Secure Side only. */
 
+#ifndef configRUN_FREERTOS_SECURE_ONLY
 
+    #define configRUN_FREERTOS_SECURE_ONLY    0
 
+#endif
 
+
 
+#ifndef configRUN_ADDITIONAL_TESTS
 
+    #define configRUN_ADDITIONAL_TESTS    0
 
+#endif
 
+
 
+
 
+/* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using
 
+ * dynamically allocated RAM, in which case when any task is deleted it is known
 
+ * that both the task's stack and TCB need to be freed.  Sometimes the
 
+ * FreeRTOSConfig.h settings only allow a task to be created using statically
 
+ * allocated RAM, in which case when any task is deleted it is known that neither
 
+ * the task's stack or TCB should be freed.  Sometimes the FreeRTOSConfig.h
 
+ * settings allow a task to be created using either statically or dynamically
 
+ * allocated RAM, in which case a member of the TCB is used to record whether the
 
+ * stack and/or TCB were allocated statically or dynamically, so when a task is
 
+ * deleted the RAM that was allocated dynamically is freed again and no attempt is
 
+ * made to free the RAM that was allocated statically.
 
+ * tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE is only true if it is possible for a
 
+ * task to be created using either statically or dynamically allocated RAM.  Note
 
+ * that if portUSING_MPU_WRAPPERS is 1 then a protected task can be created with
 
+ * a statically allocated stack and a dynamically allocated TCB.
 
+ *
 
+ * The following table lists various combinations of portUSING_MPU_WRAPPERS,
 
+ * configSUPPORT_DYNAMIC_ALLOCATION and configSUPPORT_STATIC_ALLOCATION and
 
+ * when it is possible to have both static and dynamic allocation:
 
+ *  +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+
 
+ * | MPU | Dynamic | Static |     Available Functions     |       Possible Allocations        | Both Dynamic and | Need Free |
 
+ * |     |         |        |                             |                                   | Static Possible  |           |
 
+ * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+
 
+ * | 0   | 0       | 1      | xTaskCreateStatic           | TCB - Static, Stack - Static      | No               | No        |
 
+ * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------|
 
+ * | 0   | 1       | 0      | xTaskCreate                 | TCB - Dynamic, Stack - Dynamic    | No               | Yes       |
 
+ * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------|
 
+ * | 0   | 1       | 1      | xTaskCreate,                | 1. TCB - Dynamic, Stack - Dynamic | Yes              | Yes       |
 
+ * |     |         |        | xTaskCreateStatic           | 2. TCB - Static, Stack - Static   |                  |           |
 
+ * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------|
 
+ * | 1   | 0       | 1      | xTaskCreateStatic,          | TCB - Static, Stack - Static      | No               | No        |
 
+ * |     |         |        | xTaskCreateRestrictedStatic |                                   |                  |           |
 
+ * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------|
 
+ * | 1   | 1       | 0      | xTaskCreate,                | 1. TCB - Dynamic, Stack - Dynamic | Yes              | Yes       |
 
+ * |     |         |        | xTaskCreateRestricted       | 2. TCB - Dynamic, Stack - Static  |                  |           |
 
+ * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------|
 
+ * | 1   | 1       | 1      | xTaskCreate,                | 1. TCB - Dynamic, Stack - Dynamic | Yes              | Yes       |
 
+ * |     |         |        | xTaskCreateStatic,          | 2. TCB - Dynamic, Stack - Static  |                  |           |
 
+ * |     |         |        | xTaskCreateRestricted,      | 3. TCB - Static, Stack - Static   |                  |           |
 
+ * |     |         |        | xTaskCreateRestrictedStatic |                                   |                  |           |
 
+ * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+
 
+ */
 
+#define tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE                                                                                     \
 
+    ( ( ( portUSING_MPU_WRAPPERS == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) || \
 
+      ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) )
 
+
 
+/*
 
+ * In line with software engineering best practice, FreeRTOS implements a strict
 
+ * data hiding policy, so the real structures used by FreeRTOS to maintain the
 
+ * state of tasks, queues, semaphores, etc. are not accessible to the application
 
+ * code.  However, if the application writer wants to statically allocate such
 
+ * an object then the size of the object needs to be known.  Dummy structures
 
+ * that are guaranteed to have the same size and alignment requirements of the
 
+ * real objects are used for this purpose.  The dummy list and list item
 
+ * structures below are used for inclusion in such a dummy structure.
 
+ */
 
+struct xSTATIC_LIST_ITEM
 
+{
 
+    #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 )
 
+        TickType_t xDummy1;
 
+    #endif
 
+    TickType_t xDummy2;
 
+    void * pvDummy3[ 4 ];
 
+    #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 )
 
+        TickType_t xDummy4;
 
+    #endif
 
+};
 
+typedef struct xSTATIC_LIST_ITEM StaticListItem_t;
 
+
 
+/* See the comments above the struct xSTATIC_LIST_ITEM definition. */
 
+struct xSTATIC_MINI_LIST_ITEM
 
+{
 
+    #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 )
 
+        TickType_t xDummy1;
 
+    #endif
 
+    TickType_t xDummy2;
 
+    void * pvDummy3[ 2 ];
 
+};
 
+typedef struct xSTATIC_MINI_LIST_ITEM StaticMiniListItem_t;
 
+
 
+/* See the comments above the struct xSTATIC_LIST_ITEM definition. */
 
+typedef struct xSTATIC_LIST
 
+{
 
+    #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 )
 
+        TickType_t xDummy1;
 
+    #endif
 
+    UBaseType_t uxDummy2;
 
+    void * pvDummy3;
 
+    StaticMiniListItem_t xDummy4;
 
+    #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 )
 
+        TickType_t xDummy5;
 
+    #endif
 
+} StaticList_t;
 
+
 
+/*
 
+ * In line with software engineering best practice, especially when supplying a
 
+ * library that is likely to change in future versions, FreeRTOS implements a
 
+ * strict data hiding policy.  This means the Task structure used internally by
 
+ * FreeRTOS is not accessible to application code.  However, if the application
 
+ * writer wants to statically allocate the memory required to create a task then
 
+ * the size of the task object needs to be known.  The StaticTask_t structure
 
+ * below is provided for this purpose.  Its sizes and alignment requirements are
 
+ * guaranteed to match those of the genuine structure, no matter which
 
+ * architecture is being used, and no matter how the values in FreeRTOSConfig.h
 
+ * are set.  Its contents are somewhat obfuscated in the hope users will
 
+ * recognise that it would be unwise to make direct use of the structure members.
 
+ */
 
+typedef struct xSTATIC_TCB
 
+{
 
+    void * pxDummy1;
 
+    #if ( portUSING_MPU_WRAPPERS == 1 )
 
+        xMPU_SETTINGS xDummy2;
 
+    #endif
 
+    StaticListItem_t xDummy3[ 2 ];
 
+    UBaseType_t uxDummy5;
 
+    void * pxDummy6;
 
+    uint8_t ucDummy7[ configMAX_TASK_NAME_LEN ];
 
+    #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
 
+        void * pxDummy8;
 
+    #endif
 
+    #if ( portCRITICAL_NESTING_IN_TCB == 1 )
 
+        UBaseType_t uxDummy9;
 
+    #endif
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        UBaseType_t uxDummy10[ 2 ];
 
+    #endif
 
+    #if ( configUSE_MUTEXES == 1 )
 
+        UBaseType_t uxDummy12[ 2 ];
 
+    #endif
 
+    #if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
+        void * pxDummy14;
 
+    #endif
 
+    #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
 
+        void * pvDummy15[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
 
+    #endif
 
+    #if ( configGENERATE_RUN_TIME_STATS == 1 )
 
+        uint32_t ulDummy16;
 
+    #endif
 
+    #if ( configUSE_NEWLIB_REENTRANT == 1 )
 
+        struct  _reent xDummy17;
 
+    #endif
 
+    #if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+        uint32_t ulDummy18[ configTASK_NOTIFICATION_ARRAY_ENTRIES ];
 
+        uint8_t ucDummy19[ configTASK_NOTIFICATION_ARRAY_ENTRIES ];
 
+    #endif
 
+    #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
 
+        uint8_t uxDummy20;
 
+    #endif
 
+
 
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
 
+        uint8_t ucDummy21;
 
+    #endif
 
+    #if ( configUSE_POSIX_ERRNO == 1 )
 
+        int iDummy22;
 
+    #endif
 
+} StaticTask_t;
 
+
 
+/*
 
+ * In line with software engineering best practice, especially when supplying a
 
+ * library that is likely to change in future versions, FreeRTOS implements a
 
+ * strict data hiding policy.  This means the Queue structure used internally by
 
+ * FreeRTOS is not accessible to application code.  However, if the application
 
+ * writer wants to statically allocate the memory required to create a queue
 
+ * then the size of the queue object needs to be known.  The StaticQueue_t
 
+ * structure below is provided for this purpose.  Its sizes and alignment
 
+ * requirements are guaranteed to match those of the genuine structure, no
 
+ * matter which architecture is being used, and no matter how the values in
 
+ * FreeRTOSConfig.h are set.  Its contents are somewhat obfuscated in the hope
 
+ * users will recognise that it would be unwise to make direct use of the
 
+ * structure members.
 
+ */
 
+typedef struct xSTATIC_QUEUE
 
+{
 
+    void * pvDummy1[ 3 ];
 
+
 
+    union
 
+    {
 
+        void * pvDummy2;
 
+        UBaseType_t uxDummy2;
 
+    } u;
 
+
 
+    StaticList_t xDummy3[ 2 ];
 
+    UBaseType_t uxDummy4[ 3 ];
 
+    uint8_t ucDummy5[ 2 ];
 
+
 
+    #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
+        uint8_t ucDummy6;
 
+    #endif
 
+
 
+    #if ( configUSE_QUEUE_SETS == 1 )
 
+        void * pvDummy7;
 
+    #endif
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        UBaseType_t uxDummy8;
 
+        uint8_t ucDummy9;
 
+    #endif
 
+} StaticQueue_t;
 
+typedef StaticQueue_t StaticSemaphore_t;
 
+
 
+/*
 
+ * In line with software engineering best practice, especially when supplying a
 
+ * library that is likely to change in future versions, FreeRTOS implements a
 
+ * strict data hiding policy.  This means the event group structure used
 
+ * internally by FreeRTOS is not accessible to application code.  However, if
 
+ * the application writer wants to statically allocate the memory required to
 
+ * create an event group then the size of the event group object needs to be
 
+ * know.  The StaticEventGroup_t structure below is provided for this purpose.
 
+ * Its sizes and alignment requirements are guaranteed to match those of the
 
+ * genuine structure, no matter which architecture is being used, and no matter
 
+ * how the values in FreeRTOSConfig.h are set.  Its contents are somewhat
 
+ * obfuscated in the hope users will recognise that it would be unwise to make
 
+ * direct use of the structure members.
 
+ */
 
+typedef struct xSTATIC_EVENT_GROUP
 
+{
 
+    TickType_t xDummy1;
 
+    StaticList_t xDummy2;
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        UBaseType_t uxDummy3;
 
+    #endif
 
+
 
+    #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
+        uint8_t ucDummy4;
 
+    #endif
 
+} StaticEventGroup_t;
 
+
 
+/*
 
+ * In line with software engineering best practice, especially when supplying a
 
+ * library that is likely to change in future versions, FreeRTOS implements a
 
+ * strict data hiding policy.  This means the software timer structure used
 
+ * internally by FreeRTOS is not accessible to application code.  However, if
 
+ * the application writer wants to statically allocate the memory required to
 
+ * create a software timer then the size of the queue object needs to be known.
 
+ * The StaticTimer_t structure below is provided for this purpose.  Its sizes
 
+ * and alignment requirements are guaranteed to match those of the genuine
 
+ * structure, no matter which architecture is being used, and no matter how the
 
+ * values in FreeRTOSConfig.h are set.  Its contents are somewhat obfuscated in
 
+ * the hope users will recognise that it would be unwise to make direct use of
 
+ * the structure members.
 
+ */
 
+typedef struct xSTATIC_TIMER
 
+{
 
+    void * pvDummy1;
 
+    StaticListItem_t xDummy2;
 
+    TickType_t xDummy3;
 
+    void * pvDummy5;
 
+    TaskFunction_t pvDummy6;
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        UBaseType_t uxDummy7;
 
+    #endif
 
+    uint8_t ucDummy8;
 
+} StaticTimer_t;
 
+
 
+/*
 
+ * In line with software engineering best practice, especially when supplying a
 
+ * library that is likely to change in future versions, FreeRTOS implements a
 
+ * strict data hiding policy.  This means the stream buffer structure used
 
+ * internally by FreeRTOS is not accessible to application code.  However, if
 
+ * the application writer wants to statically allocate the memory required to
 
+ * create a stream buffer then the size of the stream buffer object needs to be
 
+ * known.  The StaticStreamBuffer_t structure below is provided for this
 
+ * purpose.  Its size and alignment requirements are guaranteed to match those
 
+ * of the genuine structure, no matter which architecture is being used, and
 
+ * no matter how the values in FreeRTOSConfig.h are set.  Its contents are
 
+ * somewhat obfuscated in the hope users will recognise that it would be unwise
 
+ * to make direct use of the structure members.
 
+ */
 
+typedef struct xSTATIC_STREAM_BUFFER
 
+{
 
+    size_t uxDummy1[ 4 ];
 
+    void * pvDummy2[ 3 ];
 
+    uint8_t ucDummy3;
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        UBaseType_t uxDummy4;
 
+    #endif
 
+} StaticStreamBuffer_t;
 
+
 
+/* Message buffers are built on stream buffers. */
 
+typedef StaticStreamBuffer_t StaticMessageBuffer_t;
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    }
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#endif /* INC_FREERTOS_H */

+ 174 - 0
FreeRTOS/Source/include/FreeRTOSConfig.h
Vedi File 

@@ -0,0 +1,174 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#ifndef FREERTOS_CONFIG_H
 
+#define FREERTOS_CONFIG_H
 
+
 
+/*-----------------------------------------------------------
 
+ * Application specific definitions.
 
+ *
 
+ * These definitions should be adjusted for your particular hardware and
 
+ * application requirements.
 
+ *
 
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
 
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
 
+ *
 
+ * See http://www.freertos.org/a00110.html.
 
+ *----------------------------------------------------------*/
 
+
 
+
 
+#define configCPU_CLOCK_HZ                          ( 48000000UL )
 
+#define configTICK_RATE_HZ                          ((TickType_t) 1000 )
 
+#define configMAX_PRIORITIES                        5
 
+#define configMINIMAL_STACK_SIZE                    ((unsigned short) 90 )
 
+#define configMAX_TASK_NAME_LEN                     10
 
+#define configUSE_16_BIT_TICKS                      0
 
+#define configIDLE_SHOULD_YIELD                     1
 
+#define configUSE_PREEMPTION                        1
 
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS     0
 
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION     0
 
+#define configUSE_TASK_NOTIFICATIONS                1
 
+#define configUSE_TIME_SLICING                      1
 
+#define configUSE_NEWLIB_REENTRANT                  0
 
+#define configENABLE_BACKWARD_COMPATIBILITY         1
 
+#define configUSE_POSIX_ERRNO                       0
 
+#define configUSE_APPLICATION_TASK_TAG              0
 
+#define configRECORD_STACK_HIGH_ADDRESS             0
 
+
 
+/* Definition assert() function. */
 
+#define configASSERT(x)                             if((x)==0) { taskDISABLE_INTERRUPTS(); for( ;; ); }
 
+
 
+/* The highest interrupt priority that can be used by any interrupt service
 
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
 
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
 
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
 
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ( 1 )
 
+
 
+/* Memory allocation related definitions. */
 
+#define configSUPPORT_STATIC_ALLOCATION             0
 
+#define configSUPPORT_DYNAMIC_ALLOCATION            1
 
+#define configTOTAL_HEAP_SIZE                       (( size_t ) 8192 )
 
+#define configAPPLICATION_ALLOCATED_HEAP            0
 
+
 
+/* Hook function related definitions. */
 
+#define configUSE_IDLE_HOOK                         0
 
+#define configUSE_TICK_HOOK                         0
 
+#define configUSE_MALLOC_FAILED_HOOK                0
 
+#define configCHECK_FOR_STACK_OVERFLOW              0
 
+#define configUSE_DAEMON_TASK_STARTUP_HOOK          0
 
+
 
+/* Run time and task stats gathering related definitions. */
 
+#define configGENERATE_RUN_TIME_STATS               0
 
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()    
+#define portGET_RUN_TIME_COUNTER_VALUE()            xTaskGetTickCount()
 
+#define configUSE_TRACE_FACILITY                    1
 
+#define configUSE_STATS_FORMATTING_FUNCTIONS        1
 
+
 
+/* Co-routine related definitions. */
 
+#define configUSE_CO_ROUTINES                       0
 
+#define configMAX_CO_ROUTINE_PRIORITIES             2
 
+
 
+/* SEMAPHORES and MUTEXS */
 
+#define configUSE_MUTEXES                           1
 
+#define configUSE_RECURSIVE_MUTEXES                 1
 
+#define configUSE_COUNTING_SEMAPHORES               1
 
+
 
+/* Software timer related definitions. */
 
+#define configUSE_TIMERS                            1
 
+#define configTIMER_TASK_PRIORITY                   2
 
+#define configTIMER_QUEUE_LENGTH                    10
 
+#define configTIMER_TASK_STACK_DEPTH                180
 
+
 
+/* Tickless Idle Mode */
 
+#define configUSE_TICKLESS_IDLE                     0
 
+
 
+/* QUEUE */
 
+#define configQUEUE_REGISTRY_SIZE                   2
 
+#define configUSE_QUEUE_SETS                        0
 
+
 
+/* Optional functions - most linkers will remove unused functions anyway. */
 
+#define INCLUDE_vTaskPrioritySet                    1
 
+#define INCLUDE_uxTaskPriorityGet                   1
 
+#define INCLUDE_vTaskDelete                         1
 
+#define INCLUDE_vTaskSuspend                        1
 
+#define INCLUDE_vTaskDelayUntil                     1
 
+#define INCLUDE_vTaskDelay                          1
 
+#define INCLUDE_xTaskGetSchedulerState              1
 
+#define INCLUDE_xTaskGetCurrentTaskHandle           1
 
+#define INCLUDE_uxTaskGetStackHighWaterMark         1
 
+#define INCLUDE_uxTaskGetStackHighWaterMark2        0
 
+#define INCLUDE_xTaskGetIdleTaskHandle              0
 
+#define INCLUDE_eTaskGetState                       1
 
+#define INCLUDE_xEventGroupSetBitFromISR            1
 
+#define INCLUDE_xTimerPendFunctionCall              1
 
+#define INCLUDE_xTaskAbortDelay                     1
 
+#define INCLUDE_xTaskGetHandle                      1
 
+#define INCLUDE_xTaskResumeFromISR                  1
 
+#define INCLUDE_xQueueGetMutexHolder                1
 
+
 
+/* Run time stats gathering definitions. */
 
+#ifdef __GNUC__
 
+    /* The #ifdef just prevents this C specific syntax from being included in
 
+    assembly files. */
 
+    void vMainConfigureTimerForRunTimeStats( void );
 
+    unsigned long ulMainGetRunTimeCounterValue( void );
 
+#endif
 
+
 
+/* Cortex-M specific definitions. */
 
+#ifdef __NVIC_PRIO_BITS
 
+  #define configPRIO_BITS                         __NVIC_PRIO_BITS
 
+#else
 
+  #define configPRIO_BITS                         4
 
+#endif
 
+
 
+/* The lowest interrupt priority that can be used in a call to a "set priority"
 
+function. */
 
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY  (0x0F)
 
+
 
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
 
+to all Cortex-M ports, and do not rely on any particular library functions. */
 
+#ifndef configKERNEL_INTERRUPT_PRIORITY
 
+  #define configKERNEL_INTERRUPT_PRIORITY         (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8-configPRIO_BITS))
 
+#endif
 
+
 
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
 
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
 
+#ifndef configMAX_SYSCALL_INTERRUPT_PRIORITY
 
+  #define configMAX_SYSCALL_INTERRUPT_PRIORITY    (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8-configPRIO_BITS))
 
+#endif
 
+
 
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
 
+standard names. */
 
+#define vPortSVCHandler                             SVC_Handler
 
+#define xPortPendSVHandler                          PendSV_Handler
 
+#define xPortSysTickHandler                         SysTick_Handler
 
+
 
+
 
+#endif /* FREERTOS_CONFIG_H */
 
+
 
+

+ 34 - 0
FreeRTOS/Source/include/StackMacros.h
Vedi File 

@@ -0,0 +1,34 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+
 
+#ifndef _MSC_VER /* Visual Studio doesn't support #warning. */
 
+    #warning The name of this file has changed to stack_macros.h.  Please update your code accordingly.  This source file (which has the original name) will be removed in future released.
 
+#endif
 
+
 
+#include "stack_macros.h"

+ 419 - 0
FreeRTOS/Source/include/atomic.h
Vedi File 

@@ -0,0 +1,419 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/**
 
+ * @file atomic.h
 
+ * @brief FreeRTOS atomic operation support.
 
+ *
 
+ * This file implements atomic functions by disabling interrupts globally.
 
+ * Implementations with architecture specific atomic instructions can be
 
+ * provided under each compiler directory.
 
+ */
 
+
 
+#ifndef ATOMIC_H
 
+#define ATOMIC_H
 
+
 
+#ifndef INC_FREERTOS_H
 
+    #error "include FreeRTOS.h must appear in source files before include atomic.h"
 
+#endif
 
+
 
+/* Standard includes. */
 
+#include <stdint.h>
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+/*
 
+ * Port specific definitions -- entering/exiting critical section.
 
+ * Refer template -- ./lib/FreeRTOS/portable/Compiler/Arch/portmacro.h
 
+ *
 
+ * Every call to ATOMIC_EXIT_CRITICAL() must be closely paired with
 
+ * ATOMIC_ENTER_CRITICAL().
 
+ *
 
+ */
 
+#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
 
+
 
+/* Nested interrupt scheme is supported in this port. */
 
+    #define ATOMIC_ENTER_CRITICAL() \
 
+    UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR()
 
+
 
+    #define ATOMIC_EXIT_CRITICAL() \
 
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType )
 
+
 
+#else
 
+
 
+/* Nested interrupt scheme is NOT supported in this port. */
 
+    #define ATOMIC_ENTER_CRITICAL()    portENTER_CRITICAL()
 
+    #define ATOMIC_EXIT_CRITICAL()     portEXIT_CRITICAL()
 
+
 
+#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */
 
+
 
+/*
 
+ * Port specific definition -- "always inline".
 
+ * Inline is compiler specific, and may not always get inlined depending on your
 
+ * optimization level.  Also, inline is considered as performance optimization
 
+ * for atomic.  Thus, if portFORCE_INLINE is not provided by portmacro.h,
 
+ * instead of resulting error, simply define it away.
 
+ */
 
+#ifndef portFORCE_INLINE
 
+    #define portFORCE_INLINE
 
+#endif
 
+
 
+#define ATOMIC_COMPARE_AND_SWAP_SUCCESS    0x1U     /**< Compare and swap succeeded, swapped. */
 
+#define ATOMIC_COMPARE_AND_SWAP_FAILURE    0x0U     /**< Compare and swap failed, did not swap. */
 
+
 
+/*----------------------------- Swap && CAS ------------------------------*/
 
+
 
+/**
 
+ * Atomic compare-and-swap
 
+ *
 
+ * @brief Performs an atomic compare-and-swap operation on the specified values.
 
+ *
 
+ * @param[in, out] pulDestination  Pointer to memory location from where value is
 
+ *                               to be loaded and checked.
 
+ * @param[in] ulExchange         If condition meets, write this value to memory.
 
+ * @param[in] ulComparand        Swap condition.
 
+ *
 
+ * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
 
+ *
 
+ * @note This function only swaps *pulDestination with ulExchange, if previous
 
+ *       *pulDestination value equals ulComparand.
 
+ */
 
+static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination,
 
+                                                            uint32_t ulExchange,
 
+                                                            uint32_t ulComparand )
 
+{
 
+    uint32_t ulReturnValue;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        if( *pulDestination == ulComparand )
 
+        {
 
+            *pulDestination = ulExchange;
 
+            ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
 
+        }
 
+        else
 
+        {
 
+            ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
 
+        }
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return ulReturnValue;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/**
 
+ * Atomic swap (pointers)
 
+ *
 
+ * @brief Atomically sets the address pointed to by *ppvDestination to the value
 
+ *        of *pvExchange.
 
+ *
 
+ * @param[in, out] ppvDestination  Pointer to memory location from where a pointer
 
+ *                                 value is to be loaded and written back to.
 
+ * @param[in] pvExchange           Pointer value to be written to *ppvDestination.
 
+ *
 
+ * @return The initial value of *ppvDestination.
 
+ */
 
+static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination,
 
+                                                        void * pvExchange )
 
+{
 
+    void * pReturnValue;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        pReturnValue = *ppvDestination;
 
+        *ppvDestination = pvExchange;
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return pReturnValue;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/**
 
+ * Atomic compare-and-swap (pointers)
 
+ *
 
+ * @brief Performs an atomic compare-and-swap operation on the specified pointer
 
+ *        values.
 
+ *
 
+ * @param[in, out] ppvDestination  Pointer to memory location from where a pointer
 
+ *                                 value is to be loaded and checked.
 
+ * @param[in] pvExchange           If condition meets, write this value to memory.
 
+ * @param[in] pvComparand          Swap condition.
 
+ *
 
+ * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
 
+ *
 
+ * @note This function only swaps *ppvDestination with pvExchange, if previous
 
+ *       *ppvDestination value equals pvComparand.
 
+ */
 
+static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination,
 
+                                                                    void * pvExchange,
 
+                                                                    void * pvComparand )
 
+{
 
+    uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        if( *ppvDestination == pvComparand )
 
+        {
 
+            *ppvDestination = pvExchange;
 
+            ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
 
+        }
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return ulReturnValue;
 
+}
 
+
 
+
 
+/*----------------------------- Arithmetic ------------------------------*/
 
+
 
+/**
 
+ * Atomic add
 
+ *
 
+ * @brief Atomically adds count to the value of the specified pointer points to.
 
+ *
 
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
 
+ *                         loaded and written back to.
 
+ * @param[in] ulCount      Value to be added to *pulAddend.
 
+ *
 
+ * @return previous *pulAddend value.
 
+ */
 
+static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend,
 
+                                                 uint32_t ulCount )
 
+{
 
+    uint32_t ulCurrent;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        ulCurrent = *pulAddend;
 
+        *pulAddend += ulCount;
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return ulCurrent;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/**
 
+ * Atomic subtract
 
+ *
 
+ * @brief Atomically subtracts count from the value of the specified pointer
 
+ *        pointers to.
 
+ *
 
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
 
+ *                         loaded and written back to.
 
+ * @param[in] ulCount      Value to be subtract from *pulAddend.
 
+ *
 
+ * @return previous *pulAddend value.
 
+ */
 
+static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend,
 
+                                                      uint32_t ulCount )
 
+{
 
+    uint32_t ulCurrent;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        ulCurrent = *pulAddend;
 
+        *pulAddend -= ulCount;
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return ulCurrent;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/**
 
+ * Atomic increment
 
+ *
 
+ * @brief Atomically increments the value of the specified pointer points to.
 
+ *
 
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
 
+ *                         loaded and written back to.
 
+ *
 
+ * @return *pulAddend value before increment.
 
+ */
 
+static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend )
 
+{
 
+    uint32_t ulCurrent;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        ulCurrent = *pulAddend;
 
+        *pulAddend += 1;
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return ulCurrent;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/**
 
+ * Atomic decrement
 
+ *
 
+ * @brief Atomically decrements the value of the specified pointer points to
 
+ *
 
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
 
+ *                         loaded and written back to.
 
+ *
 
+ * @return *pulAddend value before decrement.
 
+ */
 
+static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend )
 
+{
 
+    uint32_t ulCurrent;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        ulCurrent = *pulAddend;
 
+        *pulAddend -= 1;
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return ulCurrent;
 
+}
 
+
 
+/*----------------------------- Bitwise Logical ------------------------------*/
 
+
 
+/**
 
+ * Atomic OR
 
+ *
 
+ * @brief Performs an atomic OR operation on the specified values.
 
+ *
 
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
 
+ *                                to be loaded and written back to.
 
+ * @param [in] ulValue            Value to be ORed with *pulDestination.
 
+ *
 
+ * @return The original value of *pulDestination.
 
+ */
 
+static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination,
 
+                                                uint32_t ulValue )
 
+{
 
+    uint32_t ulCurrent;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        ulCurrent = *pulDestination;
 
+        *pulDestination |= ulValue;
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return ulCurrent;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/**
 
+ * Atomic AND
 
+ *
 
+ * @brief Performs an atomic AND operation on the specified values.
 
+ *
 
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
 
+ *                                to be loaded and written back to.
 
+ * @param [in] ulValue            Value to be ANDed with *pulDestination.
 
+ *
 
+ * @return The original value of *pulDestination.
 
+ */
 
+static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination,
 
+                                                 uint32_t ulValue )
 
+{
 
+    uint32_t ulCurrent;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        ulCurrent = *pulDestination;
 
+        *pulDestination &= ulValue;
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return ulCurrent;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/**
 
+ * Atomic NAND
 
+ *
 
+ * @brief Performs an atomic NAND operation on the specified values.
 
+ *
 
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
 
+ *                                to be loaded and written back to.
 
+ * @param [in] ulValue            Value to be NANDed with *pulDestination.
 
+ *
 
+ * @return The original value of *pulDestination.
 
+ */
 
+static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination,
 
+                                                  uint32_t ulValue )
 
+{
 
+    uint32_t ulCurrent;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        ulCurrent = *pulDestination;
 
+        *pulDestination = ~( ulCurrent & ulValue );
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return ulCurrent;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/**
 
+ * Atomic XOR
 
+ *
 
+ * @brief Performs an atomic XOR operation on the specified values.
 
+ *
 
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
 
+ *                                to be loaded and written back to.
 
+ * @param [in] ulValue            Value to be XORed with *pulDestination.
 
+ *
 
+ * @return The original value of *pulDestination.
 
+ */
 
+static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination,
 
+                                                 uint32_t ulValue )
 
+{
 
+    uint32_t ulCurrent;
 
+
 
+    ATOMIC_ENTER_CRITICAL();
 
+    {
 
+        ulCurrent = *pulDestination;
 
+        *pulDestination ^= ulValue;
 
+    }
 
+    ATOMIC_EXIT_CRITICAL();
 
+
 
+    return ulCurrent;
 
+}
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    }
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#endif /* ATOMIC_H */

+ 753 - 0
FreeRTOS/Source/include/croutine.h
Vedi File 

@@ -0,0 +1,753 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#ifndef CO_ROUTINE_H
 
+#define CO_ROUTINE_H
 
+
 
+#ifndef INC_FREERTOS_H
 
+    #error "include FreeRTOS.h must appear in source files before include croutine.h"
 
+#endif
 
+
 
+#include "list.h"
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+/* Used to hide the implementation of the co-routine control block.  The
 
+ * control block structure however has to be included in the header due to
 
+ * the macro implementation of the co-routine functionality. */
 
+typedef void * CoRoutineHandle_t;
 
+
 
+/* Defines the prototype to which co-routine functions must conform. */
 
+typedef void (* crCOROUTINE_CODE)( CoRoutineHandle_t,
 
+                                   UBaseType_t );
 
+
 
+typedef struct corCoRoutineControlBlock
 
+{
 
+    crCOROUTINE_CODE pxCoRoutineFunction;
 
+    ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */
 
+    ListItem_t xEventListItem;   /*< List item used to place the CRCB in event lists. */
 
+    UBaseType_t uxPriority;      /*< The priority of the co-routine in relation to other co-routines. */
 
+    UBaseType_t uxIndex;         /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */
 
+    uint16_t uxState;            /*< Used internally by the co-routine implementation. */
 
+} CRCB_t;                        /* Co-routine control block.  Note must be identical in size down to uxPriority with TCB_t. */
 
+
 
+/**
 
+ * croutine. h
 
+ * <pre>
 
+ * BaseType_t xCoRoutineCreate(
 
+ *                               crCOROUTINE_CODE pxCoRoutineCode,
 
+ *                               UBaseType_t uxPriority,
 
+ *                               UBaseType_t uxIndex
 
+ *                             );
 
+ * </pre>
 
+ *
 
+ * Create a new co-routine and add it to the list of co-routines that are
 
+ * ready to run.
 
+ *
 
+ * @param pxCoRoutineCode Pointer to the co-routine function.  Co-routine
 
+ * functions require special syntax - see the co-routine section of the WEB
 
+ * documentation for more information.
 
+ *
 
+ * @param uxPriority The priority with respect to other co-routines at which
 
+ *  the co-routine will run.
 
+ *
 
+ * @param uxIndex Used to distinguish between different co-routines that
 
+ * execute the same function.  See the example below and the co-routine section
 
+ * of the WEB documentation for further information.
 
+ *
 
+ * @return pdPASS if the co-routine was successfully created and added to a ready
 
+ * list, otherwise an error code defined with ProjDefs.h.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Co-routine to be created.
 
+ * void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
 
+ * {
 
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
 
+ * // This may not be necessary for const variables.
 
+ * static const char cLedToFlash[ 2 ] = { 5, 6 };
 
+ * static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };
 
+ *
 
+ *   // Must start every co-routine with a call to crSTART();
 
+ *   crSTART( xHandle );
 
+ *
 
+ *   for( ;; )
 
+ *   {
 
+ *       // This co-routine just delays for a fixed period, then toggles
 
+ *       // an LED.  Two co-routines are created using this function, so
 
+ *       // the uxIndex parameter is used to tell the co-routine which
 
+ *       // LED to flash and how int32_t to delay.  This assumes xQueue has
 
+ *       // already been created.
 
+ *       vParTestToggleLED( cLedToFlash[ uxIndex ] );
 
+ *       crDELAY( xHandle, uxFlashRates[ uxIndex ] );
 
+ *   }
 
+ *
 
+ *   // Must end every co-routine with a call to crEND();
 
+ *   crEND();
 
+ * }
 
+ *
 
+ * // Function that creates two co-routines.
 
+ * void vOtherFunction( void )
 
+ * {
 
+ * uint8_t ucParameterToPass;
 
+ * TaskHandle_t xHandle;
 
+ *
 
+ *   // Create two co-routines at priority 0.  The first is given index 0
 
+ *   // so (from the code above) toggles LED 5 every 200 ticks.  The second
 
+ *   // is given index 1 so toggles LED 6 every 400 ticks.
 
+ *   for( uxIndex = 0; uxIndex < 2; uxIndex++ )
 
+ *   {
 
+ *       xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
 
+ *   }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xCoRoutineCreate xCoRoutineCreate
 
+ * \ingroup Tasks
 
+ */
 
+BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
 
+                             UBaseType_t uxPriority,
 
+                             UBaseType_t uxIndex );
 
+
 
+
 
+/**
 
+ * croutine. h
 
+ * <pre>
 
+ * void vCoRoutineSchedule( void );
 
+ * </pre>
 
+ *
 
+ * Run a co-routine.
 
+ *
 
+ * vCoRoutineSchedule() executes the highest priority co-routine that is able
 
+ * to run.  The co-routine will execute until it either blocks, yields or is
 
+ * preempted by a task.  Co-routines execute cooperatively so one
 
+ * co-routine cannot be preempted by another, but can be preempted by a task.
 
+ *
 
+ * If an application comprises of both tasks and co-routines then
 
+ * vCoRoutineSchedule should be called from the idle task (in an idle task
 
+ * hook).
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // This idle task hook will schedule a co-routine each time it is called.
 
+ * // The rest of the idle task will execute between co-routine calls.
 
+ * void vApplicationIdleHook( void )
 
+ * {
 
+ *  vCoRoutineSchedule();
 
+ * }
 
+ *
 
+ * // Alternatively, if you do not require any other part of the idle task to
 
+ * // execute, the idle task hook can call vCoRoutineSchedule() within an
 
+ * // infinite loop.
 
+ * void vApplicationIdleHook( void )
 
+ * {
 
+ *  for( ;; )
 
+ *  {
 
+ *      vCoRoutineSchedule();
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup vCoRoutineSchedule vCoRoutineSchedule
 
+ * \ingroup Tasks
 
+ */
 
+void vCoRoutineSchedule( void );
 
+
 
+/**
 
+ * croutine. h
 
+ * <pre>
 
+ * crSTART( CoRoutineHandle_t xHandle );
 
+ * </pre>
 
+ *
 
+ * This macro MUST always be called at the start of a co-routine function.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Co-routine to be created.
 
+ * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
 
+ * {
 
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
 
+ * static int32_t ulAVariable;
 
+ *
 
+ *   // Must start every co-routine with a call to crSTART();
 
+ *   crSTART( xHandle );
 
+ *
 
+ *   for( ;; )
 
+ *   {
 
+ *        // Co-routine functionality goes here.
 
+ *   }
 
+ *
 
+ *   // Must end every co-routine with a call to crEND();
 
+ *   crEND();
 
+ * }
 
+ * </pre>
 
+ * \defgroup crSTART crSTART
 
+ * \ingroup Tasks
 
+ */
 
+#define crSTART( pxCRCB )                            \
 
+    switch( ( ( CRCB_t * ) ( pxCRCB ) )->uxState ) { \
 
+        case 0:
 
+
 
+/**
 
+ * croutine. h
 
+ * <pre>
 
+ * crEND();
 
+ * </pre>
 
+ *
 
+ * This macro MUST always be called at the end of a co-routine function.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Co-routine to be created.
 
+ * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
 
+ * {
 
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
 
+ * static int32_t ulAVariable;
 
+ *
 
+ *   // Must start every co-routine with a call to crSTART();
 
+ *   crSTART( xHandle );
 
+ *
 
+ *   for( ;; )
 
+ *   {
 
+ *        // Co-routine functionality goes here.
 
+ *   }
 
+ *
 
+ *   // Must end every co-routine with a call to crEND();
 
+ *   crEND();
 
+ * }
 
+ * </pre>
 
+ * \defgroup crSTART crSTART
 
+ * \ingroup Tasks
 
+ */
 
+#define crEND()    }
 
+
 
+/*
 
+ * These macros are intended for internal use by the co-routine implementation
 
+ * only.  The macros should not be used directly by application writers.
 
+ */
 
+#define crSET_STATE0( xHandle )                                       \
 
+    ( ( CRCB_t * ) ( xHandle ) )->uxState = ( __LINE__ * 2 ); return; \
 
+    case ( __LINE__ * 2 ):
 
+#define crSET_STATE1( xHandle )                                               \
 
+    ( ( CRCB_t * ) ( xHandle ) )->uxState = ( ( __LINE__ * 2 ) + 1 ); return; \
 
+    case ( ( __LINE__ * 2 ) + 1 ):
 
+
 
+/**
 
+ * croutine. h
 
+ * <pre>
 
+ * crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
 
+ * </pre>
 
+ *
 
+ * Delay a co-routine for a fixed period of time.
 
+ *
 
+ * crDELAY can only be called from the co-routine function itself - not
 
+ * from within a function called by the co-routine function.  This is because
 
+ * co-routines do not maintain their own stack.
 
+ *
 
+ * @param xHandle The handle of the co-routine to delay.  This is the xHandle
 
+ * parameter of the co-routine function.
 
+ *
 
+ * @param xTickToDelay The number of ticks that the co-routine should delay
 
+ * for.  The actual amount of time this equates to is defined by
 
+ * configTICK_RATE_HZ (set in FreeRTOSConfig.h).  The constant portTICK_PERIOD_MS
 
+ * can be used to convert ticks to milliseconds.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Co-routine to be created.
 
+ * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
 
+ * {
 
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
 
+ * // This may not be necessary for const variables.
 
+ * // We are to delay for 200ms.
 
+ * static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;
 
+ *
 
+ *   // Must start every co-routine with a call to crSTART();
 
+ *   crSTART( xHandle );
 
+ *
 
+ *   for( ;; )
 
+ *   {
 
+ *      // Delay for 200ms.
 
+ *      crDELAY( xHandle, xDelayTime );
 
+ *
 
+ *      // Do something here.
 
+ *   }
 
+ *
 
+ *   // Must end every co-routine with a call to crEND();
 
+ *   crEND();
 
+ * }
 
+ * </pre>
 
+ * \defgroup crDELAY crDELAY
 
+ * \ingroup Tasks
 
+ */
 
+#define crDELAY( xHandle, xTicksToDelay )                      \
 
+    if( ( xTicksToDelay ) > 0 )                                \
 
+    {                                                          \
 
+        vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \
 
+    }                                                          \
 
+    crSET_STATE0( ( xHandle ) );
 
+
 
+/**
 
+ * <pre>
 
+ * crQUEUE_SEND(
 
+ *                CoRoutineHandle_t xHandle,
 
+ *                QueueHandle_t pxQueue,
 
+ *                void *pvItemToQueue,
 
+ *                TickType_t xTicksToWait,
 
+ *                BaseType_t *pxResult
 
+ *           )
 
+ * </pre>
 
+ *
 
+ * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
 
+ * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
 
+ *
 
+ * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas
 
+ * xQueueSend() and xQueueReceive() can only be used from tasks.
 
+ *
 
+ * crQUEUE_SEND can only be called from the co-routine function itself - not
 
+ * from within a function called by the co-routine function.  This is because
 
+ * co-routines do not maintain their own stack.
 
+ *
 
+ * See the co-routine section of the WEB documentation for information on
 
+ * passing data between tasks and co-routines and between ISR's and
 
+ * co-routines.
 
+ *
 
+ * @param xHandle The handle of the calling co-routine.  This is the xHandle
 
+ * parameter of the co-routine function.
 
+ *
 
+ * @param pxQueue The handle of the queue on which the data will be posted.
 
+ * The handle is obtained as the return value when the queue is created using
 
+ * the xQueueCreate() API function.
 
+ *
 
+ * @param pvItemToQueue A pointer to the data being posted onto the queue.
 
+ * The number of bytes of each queued item is specified when the queue is
 
+ * created.  This number of bytes is copied from pvItemToQueue into the queue
 
+ * itself.
 
+ *
 
+ * @param xTickToDelay The number of ticks that the co-routine should block
 
+ * to wait for space to become available on the queue, should space not be
 
+ * available immediately. The actual amount of time this equates to is defined
 
+ * by configTICK_RATE_HZ (set in FreeRTOSConfig.h).  The constant
 
+ * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see example
 
+ * below).
 
+ *
 
+ * @param pxResult The variable pointed to by pxResult will be set to pdPASS if
 
+ * data was successfully posted onto the queue, otherwise it will be set to an
 
+ * error defined within ProjDefs.h.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Co-routine function that blocks for a fixed period then posts a number onto
 
+ * // a queue.
 
+ * static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
 
+ * {
 
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
 
+ * static BaseType_t xNumberToPost = 0;
 
+ * static BaseType_t xResult;
 
+ *
 
+ *  // Co-routines must begin with a call to crSTART().
 
+ *  crSTART( xHandle );
 
+ *
 
+ *  for( ;; )
 
+ *  {
 
+ *      // This assumes the queue has already been created.
 
+ *      crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
 
+ *
 
+ *      if( xResult != pdPASS )
 
+ *      {
 
+ *          // The message was not posted!
 
+ *      }
 
+ *
 
+ *      // Increment the number to be posted onto the queue.
 
+ *      xNumberToPost++;
 
+ *
 
+ *      // Delay for 100 ticks.
 
+ *      crDELAY( xHandle, 100 );
 
+ *  }
 
+ *
 
+ *  // Co-routines must end with a call to crEND().
 
+ *  crEND();
 
+ * }
 
+ * </pre>
 
+ * \defgroup crQUEUE_SEND crQUEUE_SEND
 
+ * \ingroup Tasks
 
+ */
 
+#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult )           \
 
+    {                                                                                     \
 
+        *( pxResult ) = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), ( xTicksToWait ) ); \
 
+        if( *( pxResult ) == errQUEUE_BLOCKED )                                           \
 
+        {                                                                                 \
 
+            crSET_STATE0( ( xHandle ) );                                                  \
 
+            *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 );                \
 
+        }                                                                                 \
 
+        if( *pxResult == errQUEUE_YIELD )                                                 \
 
+        {                                                                                 \
 
+            crSET_STATE1( ( xHandle ) );                                                  \
 
+            *pxResult = pdPASS;                                                           \
 
+        }                                                                                 \
 
+    }
 
+
 
+/**
 
+ * croutine. h
 
+ * <pre>
 
+ * crQUEUE_RECEIVE(
 
+ *                   CoRoutineHandle_t xHandle,
 
+ *                   QueueHandle_t pxQueue,
 
+ *                   void *pvBuffer,
 
+ *                   TickType_t xTicksToWait,
 
+ *                   BaseType_t *pxResult
 
+ *               )
 
+ * </pre>
 
+ *
 
+ * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
 
+ * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
 
+ *
 
+ * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas
 
+ * xQueueSend() and xQueueReceive() can only be used from tasks.
 
+ *
 
+ * crQUEUE_RECEIVE can only be called from the co-routine function itself - not
 
+ * from within a function called by the co-routine function.  This is because
 
+ * co-routines do not maintain their own stack.
 
+ *
 
+ * See the co-routine section of the WEB documentation for information on
 
+ * passing data between tasks and co-routines and between ISR's and
 
+ * co-routines.
 
+ *
 
+ * @param xHandle The handle of the calling co-routine.  This is the xHandle
 
+ * parameter of the co-routine function.
 
+ *
 
+ * @param pxQueue The handle of the queue from which the data will be received.
 
+ * The handle is obtained as the return value when the queue is created using
 
+ * the xQueueCreate() API function.
 
+ *
 
+ * @param pvBuffer The buffer into which the received item is to be copied.
 
+ * The number of bytes of each queued item is specified when the queue is
 
+ * created.  This number of bytes is copied into pvBuffer.
 
+ *
 
+ * @param xTickToDelay The number of ticks that the co-routine should block
 
+ * to wait for data to become available from the queue, should data not be
 
+ * available immediately. The actual amount of time this equates to is defined
 
+ * by configTICK_RATE_HZ (set in FreeRTOSConfig.h).  The constant
 
+ * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see the
 
+ * crQUEUE_SEND example).
 
+ *
 
+ * @param pxResult The variable pointed to by pxResult will be set to pdPASS if
 
+ * data was successfully retrieved from the queue, otherwise it will be set to
 
+ * an error code as defined within ProjDefs.h.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // A co-routine receives the number of an LED to flash from a queue.  It
 
+ * // blocks on the queue until the number is received.
 
+ * static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
 
+ * {
 
+ * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
 
+ * static BaseType_t xResult;
 
+ * static UBaseType_t uxLEDToFlash;
 
+ *
 
+ *  // All co-routines must start with a call to crSTART().
 
+ *  crSTART( xHandle );
 
+ *
 
+ *  for( ;; )
 
+ *  {
 
+ *      // Wait for data to become available on the queue.
 
+ *      crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
 
+ *
 
+ *      if( xResult == pdPASS )
 
+ *      {
 
+ *          // We received the LED to flash - flash it!
 
+ *          vParTestToggleLED( uxLEDToFlash );
 
+ *      }
 
+ *  }
 
+ *
 
+ *  crEND();
 
+ * }
 
+ * </pre>
 
+ * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE
 
+ * \ingroup Tasks
 
+ */
 
+#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult )           \
 
+    {                                                                                   \
 
+        *( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), ( xTicksToWait ) ); \
 
+        if( *( pxResult ) == errQUEUE_BLOCKED )                                         \
 
+        {                                                                               \
 
+            crSET_STATE0( ( xHandle ) );                                                \
 
+            *( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), 0 );            \
 
+        }                                                                               \
 
+        if( *( pxResult ) == errQUEUE_YIELD )                                           \
 
+        {                                                                               \
 
+            crSET_STATE1( ( xHandle ) );                                                \
 
+            *( pxResult ) = pdPASS;                                                     \
 
+        }                                                                               \
 
+    }
 
+
 
+/**
 
+ * croutine. h
 
+ * <pre>
 
+ * crQUEUE_SEND_FROM_ISR(
 
+ *                          QueueHandle_t pxQueue,
 
+ *                          void *pvItemToQueue,
 
+ *                          BaseType_t xCoRoutinePreviouslyWoken
 
+ *                     )
 
+ * </pre>
 
+ *
 
+ * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
 
+ * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
 
+ * functions used by tasks.
 
+ *
 
+ * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to
 
+ * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and
 
+ * xQueueReceiveFromISR() can only be used to pass data between a task and and
 
+ * ISR.
 
+ *
 
+ * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue
 
+ * that is being used from within a co-routine.
 
+ *
 
+ * See the co-routine section of the WEB documentation for information on
 
+ * passing data between tasks and co-routines and between ISR's and
 
+ * co-routines.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto
 
+ * the same queue multiple times from a single interrupt.  The first call
 
+ * should always pass in pdFALSE.  Subsequent calls should pass in
 
+ * the value returned from the previous call.
 
+ *
 
+ * @return pdTRUE if a co-routine was woken by posting onto the queue.  This is
 
+ * used by the ISR to determine if a context switch may be required following
 
+ * the ISR.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // A co-routine that blocks on a queue waiting for characters to be received.
 
+ * static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
 
+ * {
 
+ * char cRxedChar;
 
+ * BaseType_t xResult;
 
+ *
 
+ *   // All co-routines must start with a call to crSTART().
 
+ *   crSTART( xHandle );
 
+ *
 
+ *   for( ;; )
 
+ *   {
 
+ *       // Wait for data to become available on the queue.  This assumes the
 
+ *       // queue xCommsRxQueue has already been created!
 
+ *       crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
 
+ *
 
+ *       // Was a character received?
 
+ *       if( xResult == pdPASS )
 
+ *       {
 
+ *           // Process the character here.
 
+ *       }
 
+ *   }
 
+ *
 
+ *   // All co-routines must end with a call to crEND().
 
+ *   crEND();
 
+ * }
 
+ *
 
+ * // An ISR that uses a queue to send characters received on a serial port to
 
+ * // a co-routine.
 
+ * void vUART_ISR( void )
 
+ * {
 
+ * char cRxedChar;
 
+ * BaseType_t xCRWokenByPost = pdFALSE;
 
+ *
 
+ *   // We loop around reading characters until there are none left in the UART.
 
+ *   while( UART_RX_REG_NOT_EMPTY() )
 
+ *   {
 
+ *       // Obtain the character from the UART.
 
+ *       cRxedChar = UART_RX_REG;
 
+ *
 
+ *       // Post the character onto a queue.  xCRWokenByPost will be pdFALSE
 
+ *       // the first time around the loop.  If the post causes a co-routine
 
+ *       // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
 
+ *       // In this manner we can ensure that if more than one co-routine is
 
+ *       // blocked on the queue only one is woken by this ISR no matter how
 
+ *       // many characters are posted to the queue.
 
+ *       xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
 
+ *   }
 
+ * }
 
+ * </pre>
 
+ * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR
 
+ * \ingroup Tasks
 
+ */
 
+#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) \
 
+    xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) )
 
+
 
+
 
+/**
 
+ * croutine. h
 
+ * <pre>
 
+ * crQUEUE_SEND_FROM_ISR(
 
+ *                          QueueHandle_t pxQueue,
 
+ *                          void *pvBuffer,
 
+ *                          BaseType_t * pxCoRoutineWoken
 
+ *                     )
 
+ * </pre>
 
+ *
 
+ * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
 
+ * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
 
+ * functions used by tasks.
 
+ *
 
+ * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to
 
+ * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and
 
+ * xQueueReceiveFromISR() can only be used to pass data between a task and and
 
+ * ISR.
 
+ *
 
+ * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data
 
+ * from a queue that is being used from within a co-routine (a co-routine
 
+ * posted to the queue).
 
+ *
 
+ * See the co-routine section of the WEB documentation for information on
 
+ * passing data between tasks and co-routines and between ISR's and
 
+ * co-routines.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvBuffer A pointer to a buffer into which the received item will be
 
+ * placed.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from the queue into
 
+ * pvBuffer.
 
+ *
 
+ * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become
 
+ * available on the queue.  If crQUEUE_RECEIVE_FROM_ISR causes such a
 
+ * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise
 
+ * *pxCoRoutineWoken will remain unchanged.
 
+ *
 
+ * @return pdTRUE an item was successfully received from the queue, otherwise
 
+ * pdFALSE.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // A co-routine that posts a character to a queue then blocks for a fixed
 
+ * // period.  The character is incremented each time.
 
+ * static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
 
+ * {
 
+ * // cChar holds its value while this co-routine is blocked and must therefore
 
+ * // be declared static.
 
+ * static char cCharToTx = 'a';
 
+ * BaseType_t xResult;
 
+ *
 
+ *   // All co-routines must start with a call to crSTART().
 
+ *   crSTART( xHandle );
 
+ *
 
+ *   for( ;; )
 
+ *   {
 
+ *       // Send the next character to the queue.
 
+ *       crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
 
+ *
 
+ *       if( xResult == pdPASS )
 
+ *       {
 
+ *           // The character was successfully posted to the queue.
 
+ *       }
 
+ *       else
 
+ *       {
 
+ *          // Could not post the character to the queue.
 
+ *       }
 
+ *
 
+ *       // Enable the UART Tx interrupt to cause an interrupt in this
 
+ *       // hypothetical UART.  The interrupt will obtain the character
 
+ *       // from the queue and send it.
 
+ *       ENABLE_RX_INTERRUPT();
 
+ *
 
+ *       // Increment to the next character then block for a fixed period.
 
+ *       // cCharToTx will maintain its value across the delay as it is
 
+ *       // declared static.
 
+ *       cCharToTx++;
 
+ *       if( cCharToTx > 'x' )
 
+ *       {
 
+ *          cCharToTx = 'a';
 
+ *       }
 
+ *       crDELAY( 100 );
 
+ *   }
 
+ *
 
+ *   // All co-routines must end with a call to crEND().
 
+ *   crEND();
 
+ * }
 
+ *
 
+ * // An ISR that uses a queue to receive characters to send on a UART.
 
+ * void vUART_ISR( void )
 
+ * {
 
+ * char cCharToTx;
 
+ * BaseType_t xCRWokenByPost = pdFALSE;
 
+ *
 
+ *   while( UART_TX_REG_EMPTY() )
 
+ *   {
 
+ *       // Are there any characters in the queue waiting to be sent?
 
+ *       // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
 
+ *       // is woken by the post - ensuring that only a single co-routine is
 
+ *       // woken no matter how many times we go around this loop.
 
+ *       if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
 
+ *       {
 
+ *           SEND_CHARACTER( cCharToTx );
 
+ *       }
 
+ *   }
 
+ * }
 
+ * </pre>
 
+ * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR
 
+ * \ingroup Tasks
 
+ */
 
+#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) \
 
+    xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) )
 
+
 
+/*
 
+ * This function is intended for internal use by the co-routine macros only.
 
+ * The macro nature of the co-routine implementation requires that the
 
+ * prototype appears here.  The function should not be used by application
 
+ * writers.
 
+ *
 
+ * Removes the current co-routine from its ready list and places it in the
 
+ * appropriate delayed list.
 
+ */
 
+void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
 
+                                 List_t * pxEventList );
 
+
 
+/*
 
+ * This function is intended for internal use by the queue implementation only.
 
+ * The function should not be used by application writers.
 
+ *
 
+ * Removes the highest priority co-routine from the event list and places it in
 
+ * the pending ready list.
 
+ */
 
+BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList );
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    }
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#endif /* CO_ROUTINE_H */

+ 281 - 0
FreeRTOS/Source/include/deprecated_definitions.h
Vedi File 

@@ -0,0 +1,281 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#ifndef DEPRECATED_DEFINITIONS_H
 
+#define DEPRECATED_DEFINITIONS_H
 
+
 
+
 
+/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
 
+ * pre-processor definition was used to ensure the pre-processor found the correct
 
+ * portmacro.h file for the port being used.  That scheme was deprecated in favour
 
+ * of setting the compiler's include path such that it found the correct
 
+ * portmacro.h file - removing the need for the constant and allowing the
 
+ * portmacro.h file to be located anywhere in relation to the port being used.  The
 
+ * definitions below remain in the code for backward compatibility only.  New
 
+ * projects should not use them. */
 
+
 
+#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT
 
+    #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h"
 
+    typedef void ( __interrupt __far * pxISR )();
 
+#endif
 
+
 
+#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT
 
+    #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h"
 
+    typedef void ( __interrupt __far * pxISR )();
 
+#endif
 
+
 
+#ifdef GCC_MEGA_AVR
 
+    #include "../portable/GCC/ATMega323/portmacro.h"
 
+#endif
 
+
 
+#ifdef IAR_MEGA_AVR
 
+    #include "../portable/IAR/ATMega323/portmacro.h"
 
+#endif
 
+
 
+#ifdef MPLAB_PIC24_PORT
 
+    #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
 
+#endif
 
+
 
+#ifdef MPLAB_DSPIC_PORT
 
+    #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
 
+#endif
 
+
 
+#ifdef MPLAB_PIC18F_PORT
 
+    #include "../../Source/portable/MPLAB/PIC18F/portmacro.h"
 
+#endif
 
+
 
+#ifdef MPLAB_PIC32MX_PORT
 
+    #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h"
 
+#endif
 
+
 
+#ifdef _FEDPICC
 
+    #include "libFreeRTOS/Include/portmacro.h"
 
+#endif
 
+
 
+#ifdef SDCC_CYGNAL
 
+    #include "../../Source/portable/SDCC/Cygnal/portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_ARM7
 
+    #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_ARM7_ECLIPSE
 
+    #include "portmacro.h"
 
+#endif
 
+
 
+#ifdef ROWLEY_LPC23xx
 
+    #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h"
 
+#endif
 
+
 
+#ifdef IAR_MSP430
 
+    #include "..\..\Source\portable\IAR\MSP430\portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_MSP430
 
+    #include "../../Source/portable/GCC/MSP430F449/portmacro.h"
 
+#endif
 
+
 
+#ifdef ROWLEY_MSP430
 
+    #include "../../Source/portable/Rowley/MSP430F449/portmacro.h"
 
+#endif
 
+
 
+#ifdef ARM7_LPC21xx_KEIL_RVDS
 
+    #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h"
 
+#endif
 
+
 
+#ifdef SAM7_GCC
 
+    #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h"
 
+#endif
 
+
 
+#ifdef SAM7_IAR
 
+    #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h"
 
+#endif
 
+
 
+#ifdef SAM9XE_IAR
 
+    #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h"
 
+#endif
 
+
 
+#ifdef LPC2000_IAR
 
+    #include "..\..\Source\portable\IAR\LPC2000\portmacro.h"
 
+#endif
 
+
 
+#ifdef STR71X_IAR
 
+    #include "..\..\Source\portable\IAR\STR71x\portmacro.h"
 
+#endif
 
+
 
+#ifdef STR75X_IAR
 
+    #include "..\..\Source\portable\IAR\STR75x\portmacro.h"
 
+#endif
 
+
 
+#ifdef STR75X_GCC
 
+    #include "..\..\Source\portable\GCC\STR75x\portmacro.h"
 
+#endif
 
+
 
+#ifdef STR91X_IAR
 
+    #include "..\..\Source\portable\IAR\STR91x\portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_H8S
 
+    #include "../../Source/portable/GCC/H8S2329/portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_AT91FR40008
 
+    #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h"
 
+#endif
 
+
 
+#ifdef RVDS_ARMCM3_LM3S102
 
+    #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_ARMCM3_LM3S102
 
+    #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_ARMCM3
 
+    #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
 
+#endif
 
+
 
+#ifdef IAR_ARM_CM3
 
+    #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
 
+#endif
 
+
 
+#ifdef IAR_ARMCM3_LM
 
+    #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
 
+#endif
 
+
 
+#ifdef HCS12_CODE_WARRIOR
 
+    #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h"
 
+#endif
 
+
 
+#ifdef MICROBLAZE_GCC
 
+    #include "../../Source/portable/GCC/MicroBlaze/portmacro.h"
 
+#endif
 
+
 
+#ifdef TERN_EE
 
+    #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_HCS12
 
+    #include "../../Source/portable/GCC/HCS12/portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_MCF5235
 
+    #include "../../Source/portable/GCC/MCF5235/portmacro.h"
 
+#endif
 
+
 
+#ifdef COLDFIRE_V2_GCC
 
+    #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h"
 
+#endif
 
+
 
+#ifdef COLDFIRE_V2_CODEWARRIOR
 
+    #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_PPC405
 
+    #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h"
 
+#endif
 
+
 
+#ifdef GCC_PPC440
 
+    #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h"
 
+#endif
 
+
 
+#ifdef _16FX_SOFTUNE
 
+    #include "..\..\Source\portable\Softune\MB96340\portmacro.h"
 
+#endif
 
+
 
+#ifdef BCC_INDUSTRIAL_PC_PORT
 
+
 
+/* A short file name has to be used in place of the normal
 
+ * FreeRTOSConfig.h when using the Borland compiler. */
 
+    #include "frconfig.h"
 
+    #include "..\portable\BCC\16BitDOS\PC\prtmacro.h"
 
+    typedef void ( __interrupt __far * pxISR )();
 
+#endif
 
+
 
+#ifdef BCC_FLASH_LITE_186_PORT
 
+
 
+/* A short file name has to be used in place of the normal
 
+ * FreeRTOSConfig.h when using the Borland compiler. */
 
+    #include "frconfig.h"
 
+    #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h"
 
+    typedef void ( __interrupt __far * pxISR )();
 
+#endif
 
+
 
+#ifdef __GNUC__
 
+    #ifdef __AVR32_AVR32A__
 
+        #include "portmacro.h"
 
+    #endif
 
+#endif
 
+
 
+#ifdef __ICCAVR32__
 
+    #ifdef __CORE__
 
+        #if __CORE__ == __AVR32A__
 
+            #include "portmacro.h"
 
+        #endif
 
+    #endif
 
+#endif
 
+
 
+#ifdef __91467D
 
+    #include "portmacro.h"
 
+#endif
 
+
 
+#ifdef __96340
 
+    #include "portmacro.h"
 
+#endif
 
+
 
+
 
+#ifdef __IAR_V850ES_Fx3__
 
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
 
+#endif
 
+
 
+#ifdef __IAR_V850ES_Jx3__
 
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
 
+#endif
 
+
 
+#ifdef __IAR_V850ES_Jx3_L__
 
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
 
+#endif
 
+
 
+#ifdef __IAR_V850ES_Jx2__
 
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
 
+#endif
 
+
 
+#ifdef __IAR_V850ES_Hx2__
 
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
 
+#endif
 
+
 
+#ifdef __IAR_78K0R_Kx3__
 
+    #include "../../Source/portable/IAR/78K0R/portmacro.h"
 
+#endif
 
+
 
+#ifdef __IAR_78K0R_Kx3L__
 
+    #include "../../Source/portable/IAR/78K0R/portmacro.h"
 
+#endif
 
+
 
+#endif /* DEPRECATED_DEFINITIONS_H */

+ 777 - 0
FreeRTOS/Source/include/event_groups.h
Vedi File 

@@ -0,0 +1,777 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#ifndef EVENT_GROUPS_H
 
+#define EVENT_GROUPS_H
 
+
 
+#ifndef INC_FREERTOS_H
 
+    #error "include FreeRTOS.h" must appear in source files before "include event_groups.h"
 
+#endif
 
+
 
+/* FreeRTOS includes. */
 
+#include "timers.h"
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+/**
 
+ * An event group is a collection of bits to which an application can assign a
 
+ * meaning.  For example, an application may create an event group to convey
 
+ * the status of various CAN bus related events in which bit 0 might mean "A CAN
 
+ * message has been received and is ready for processing", bit 1 might mean "The
 
+ * application has queued a message that is ready for sending onto the CAN
 
+ * network", and bit 2 might mean "It is time to send a SYNC message onto the
 
+ * CAN network" etc.  A task can then test the bit values to see which events
 
+ * are active, and optionally enter the Blocked state to wait for a specified
 
+ * bit or a group of specified bits to be active.  To continue the CAN bus
 
+ * example, a CAN controlling task can enter the Blocked state (and therefore
 
+ * not consume any processing time) until either bit 0, bit 1 or bit 2 are
 
+ * active, at which time the bit that was actually active would inform the task
 
+ * which action it had to take (process a received message, send a message, or
 
+ * send a SYNC).
 
+ *
 
+ * The event groups implementation contains intelligence to avoid race
 
+ * conditions that would otherwise occur were an application to use a simple
 
+ * variable for the same purpose.  This is particularly important with respect
 
+ * to when a bit within an event group is to be cleared, and when bits have to
 
+ * be set and then tested atomically - as is the case where event groups are
 
+ * used to create a synchronisation point between multiple tasks (a
 
+ * 'rendezvous').
 
+ *
 
+ * \defgroup EventGroup
 
+ */
 
+
 
+
 
+
 
+/**
 
+ * event_groups.h
 
+ *
 
+ * Type by which event groups are referenced.  For example, a call to
 
+ * xEventGroupCreate() returns an EventGroupHandle_t variable that can then
 
+ * be used as a parameter to other event group functions.
 
+ *
 
+ * \defgroup EventGroupHandle_t EventGroupHandle_t
 
+ * \ingroup EventGroup
 
+ */
 
+struct EventGroupDef_t;
 
+typedef struct EventGroupDef_t   * EventGroupHandle_t;
 
+
 
+/*
 
+ * The type that holds event bits always matches TickType_t - therefore the
 
+ * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1,
 
+ * 32 bits if set to 0.
 
+ *
 
+ * \defgroup EventBits_t EventBits_t
 
+ * \ingroup EventGroup
 
+ */
 
+typedef TickType_t               EventBits_t;
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ * EventGroupHandle_t xEventGroupCreate( void );
 
+ * </pre>
 
+ *
 
+ * Create a new event group.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, event groups use a [small]
 
+ * block of memory, in which the event group's structure is stored.  If an event
 
+ * groups is created using xEventGropuCreate() then the required memory is
 
+ * automatically dynamically allocated inside the xEventGroupCreate() function.
 
+ * (see https://www.FreeRTOS.org/a00111.html).  If an event group is created
 
+ * using xEventGropuCreateStatic() then the application writer must instead
 
+ * provide the memory that will get used by the event group.
 
+ * xEventGroupCreateStatic() therefore allows an event group to be created
 
+ * without using any dynamic memory allocation.
 
+ *
 
+ * Although event groups are not related to ticks, for internal implementation
 
+ * reasons the number of bits available for use in an event group is dependent
 
+ * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h.  If
 
+ * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit
 
+ * 0 to bit 7).  If configUSE_16_BIT_TICKS is set to 0 then each event group has
 
+ * 24 usable bits (bit 0 to bit 23).  The EventBits_t type is used to store
 
+ * event bits within an event group.
 
+ *
 
+ * @return If the event group was created then a handle to the event group is
 
+ * returned.  If there was insufficient FreeRTOS heap available to create the
 
+ * event group then NULL is returned.  See https://www.FreeRTOS.org/a00111.html
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ *  // Declare a variable to hold the created event group.
 
+ *  EventGroupHandle_t xCreatedEventGroup;
 
+ *
 
+ *  // Attempt to create the event group.
 
+ *  xCreatedEventGroup = xEventGroupCreate();
 
+ *
 
+ *  // Was the event group created successfully?
 
+ *  if( xCreatedEventGroup == NULL )
 
+ *  {
 
+ *      // The event group was not created because there was insufficient
 
+ *      // FreeRTOS heap available.
 
+ *  }
 
+ *  else
 
+ *  {
 
+ *      // The event group was created.
 
+ *  }
 
+ * </pre>
 
+ * \defgroup xEventGroupCreate xEventGroupCreate
 
+ * \ingroup EventGroup
 
+ */
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+    EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ * EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );
 
+ * </pre>
 
+ *
 
+ * Create a new event group.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, event groups use a [small]
 
+ * block of memory, in which the event group's structure is stored.  If an event
 
+ * groups is created using xEventGropuCreate() then the required memory is
 
+ * automatically dynamically allocated inside the xEventGroupCreate() function.
 
+ * (see https://www.FreeRTOS.org/a00111.html).  If an event group is created
 
+ * using xEventGropuCreateStatic() then the application writer must instead
 
+ * provide the memory that will get used by the event group.
 
+ * xEventGroupCreateStatic() therefore allows an event group to be created
 
+ * without using any dynamic memory allocation.
 
+ *
 
+ * Although event groups are not related to ticks, for internal implementation
 
+ * reasons the number of bits available for use in an event group is dependent
 
+ * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h.  If
 
+ * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit
 
+ * 0 to bit 7).  If configUSE_16_BIT_TICKS is set to 0 then each event group has
 
+ * 24 usable bits (bit 0 to bit 23).  The EventBits_t type is used to store
 
+ * event bits within an event group.
 
+ *
 
+ * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type
 
+ * StaticEventGroup_t, which will be then be used to hold the event group's data
 
+ * structures, removing the need for the memory to be allocated dynamically.
 
+ *
 
+ * @return If the event group was created then a handle to the event group is
 
+ * returned.  If pxEventGroupBuffer was NULL then NULL is returned.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ *  // StaticEventGroup_t is a publicly accessible structure that has the same
 
+ *  // size and alignment requirements as the real event group structure.  It is
 
+ *  // provided as a mechanism for applications to know the size of the event
 
+ *  // group (which is dependent on the architecture and configuration file
 
+ *  // settings) without breaking the strict data hiding policy by exposing the
 
+ *  // real event group internals.  This StaticEventGroup_t variable is passed
 
+ *  // into the xSemaphoreCreateEventGroupStatic() function and is used to store
 
+ *  // the event group's data structures
 
+ *  StaticEventGroup_t xEventGroupBuffer;
 
+ *
 
+ *  // Create the event group without dynamically allocating any memory.
 
+ *  xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );
 
+ * </pre>
 
+ */
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+    EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ *  EventBits_t xEventGroupWaitBits(    EventGroupHandle_t xEventGroup,
 
+ *                                      const EventBits_t uxBitsToWaitFor,
 
+ *                                      const BaseType_t xClearOnExit,
 
+ *                                      const BaseType_t xWaitForAllBits,
 
+ *                                      const TickType_t xTicksToWait );
 
+ * </pre>
 
+ *
 
+ * [Potentially] block to wait for one or more bits to be set within a
 
+ * previously created event group.
 
+ *
 
+ * This function cannot be called from an interrupt.
 
+ *
 
+ * @param xEventGroup The event group in which the bits are being tested.  The
 
+ * event group must have previously been created using a call to
 
+ * xEventGroupCreate().
 
+ *
 
+ * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test
 
+ * inside the event group.  For example, to wait for bit 0 and/or bit 2 set
 
+ * uxBitsToWaitFor to 0x05.  To wait for bits 0 and/or bit 1 and/or bit 2 set
 
+ * uxBitsToWaitFor to 0x07.  Etc.
 
+ *
 
+ * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within
 
+ * uxBitsToWaitFor that are set within the event group will be cleared before
 
+ * xEventGroupWaitBits() returns if the wait condition was met (if the function
 
+ * returns for a reason other than a timeout).  If xClearOnExit is set to
 
+ * pdFALSE then the bits set in the event group are not altered when the call to
 
+ * xEventGroupWaitBits() returns.
 
+ *
 
+ * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then
 
+ * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor
 
+ * are set or the specified block time expires.  If xWaitForAllBits is set to
 
+ * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set
 
+ * in uxBitsToWaitFor is set or the specified block time expires.  The block
 
+ * time is specified by the xTicksToWait parameter.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait
 
+ * for one/all (depending on the xWaitForAllBits value) of the bits specified by
 
+ * uxBitsToWaitFor to become set.
 
+ *
 
+ * @return The value of the event group at the time either the bits being waited
 
+ * for became set, or the block time expired.  Test the return value to know
 
+ * which bits were set.  If xEventGroupWaitBits() returned because its timeout
 
+ * expired then not all the bits being waited for will be set.  If
 
+ * xEventGroupWaitBits() returned because the bits it was waiting for were set
 
+ * then the returned value is the event group value before any bits were
 
+ * automatically cleared in the case that xClearOnExit parameter was set to
 
+ * pdTRUE.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ #define BIT_0 ( 1 << 0 )
 
+ #define BIT_4 ( 1 << 4 )
 
+ *
 
+ * void aFunction( EventGroupHandle_t xEventGroup )
 
+ * {
 
+ * EventBits_t uxBits;
 
+ * const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
 
+ *
 
+ *      // Wait a maximum of 100ms for either bit 0 or bit 4 to be set within
 
+ *      // the event group.  Clear the bits before exiting.
 
+ *      uxBits = xEventGroupWaitBits(
 
+ *                  xEventGroup,    // The event group being tested.
 
+ *                  BIT_0 | BIT_4,  // The bits within the event group to wait for.
 
+ *                  pdTRUE,         // BIT_0 and BIT_4 should be cleared before returning.
 
+ *                  pdFALSE,        // Don't wait for both bits, either bit will do.
 
+ *                  xTicksToWait ); // Wait a maximum of 100ms for either bit to be set.
 
+ *
 
+ *      if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
 
+ *      {
 
+ *          // xEventGroupWaitBits() returned because both bits were set.
 
+ *      }
 
+ *      else if( ( uxBits & BIT_0 ) != 0 )
 
+ *      {
 
+ *          // xEventGroupWaitBits() returned because just BIT_0 was set.
 
+ *      }
 
+ *      else if( ( uxBits & BIT_4 ) != 0 )
 
+ *      {
 
+ *          // xEventGroupWaitBits() returned because just BIT_4 was set.
 
+ *      }
 
+ *      else
 
+ *      {
 
+ *          // xEventGroupWaitBits() returned because xTicksToWait ticks passed
 
+ *          // without either BIT_0 or BIT_4 becoming set.
 
+ *      }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xEventGroupWaitBits xEventGroupWaitBits
 
+ * \ingroup EventGroup
 
+ */
 
+EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
 
+                                 const EventBits_t uxBitsToWaitFor,
 
+                                 const BaseType_t xClearOnExit,
 
+                                 const BaseType_t xWaitForAllBits,
 
+                                 TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ *  EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );
 
+ * </pre>
 
+ *
 
+ * Clear bits within an event group.  This function cannot be called from an
 
+ * interrupt.
 
+ *
 
+ * @param xEventGroup The event group in which the bits are to be cleared.
 
+ *
 
+ * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear
 
+ * in the event group.  For example, to clear bit 3 only, set uxBitsToClear to
 
+ * 0x08.  To clear bit 3 and bit 0 set uxBitsToClear to 0x09.
 
+ *
 
+ * @return The value of the event group before the specified bits were cleared.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ #define BIT_0 ( 1 << 0 )
 
+ #define BIT_4 ( 1 << 4 )
 
+ *
 
+ * void aFunction( EventGroupHandle_t xEventGroup )
 
+ * {
 
+ * EventBits_t uxBits;
 
+ *
 
+ *      // Clear bit 0 and bit 4 in xEventGroup.
 
+ *      uxBits = xEventGroupClearBits(
 
+ *                              xEventGroup,    // The event group being updated.
 
+ *                              BIT_0 | BIT_4 );// The bits being cleared.
 
+ *
 
+ *      if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
 
+ *      {
 
+ *          // Both bit 0 and bit 4 were set before xEventGroupClearBits() was
 
+ *          // called.  Both will now be clear (not set).
 
+ *      }
 
+ *      else if( ( uxBits & BIT_0 ) != 0 )
 
+ *      {
 
+ *          // Bit 0 was set before xEventGroupClearBits() was called.  It will
 
+ *          // now be clear.
 
+ *      }
 
+ *      else if( ( uxBits & BIT_4 ) != 0 )
 
+ *      {
 
+ *          // Bit 4 was set before xEventGroupClearBits() was called.  It will
 
+ *          // now be clear.
 
+ *      }
 
+ *      else
 
+ *      {
 
+ *          // Neither bit 0 nor bit 4 were set in the first place.
 
+ *      }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xEventGroupClearBits xEventGroupClearBits
 
+ * \ingroup EventGroup
 
+ */
 
+EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
 
+                                  const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ *  BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
 
+ * </pre>
 
+ *
 
+ * A version of xEventGroupClearBits() that can be called from an interrupt.
 
+ *
 
+ * Setting bits in an event group is not a deterministic operation because there
 
+ * are an unknown number of tasks that may be waiting for the bit or bits being
 
+ * set.  FreeRTOS does not allow nondeterministic operations to be performed
 
+ * while interrupts are disabled, so protects event groups that are accessed
 
+ * from tasks by suspending the scheduler rather than disabling interrupts.  As
 
+ * a result event groups cannot be accessed directly from an interrupt service
 
+ * routine.  Therefore xEventGroupClearBitsFromISR() sends a message to the
 
+ * timer task to have the clear operation performed in the context of the timer
 
+ * task.
 
+ *
 
+ * @param xEventGroup The event group in which the bits are to be cleared.
 
+ *
 
+ * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear.
 
+ * For example, to clear bit 3 only, set uxBitsToClear to 0x08.  To clear bit 3
 
+ * and bit 0 set uxBitsToClear to 0x09.
 
+ *
 
+ * @return If the request to execute the function was posted successfully then
 
+ * pdPASS is returned, otherwise pdFALSE is returned.  pdFALSE will be returned
 
+ * if the timer service queue was full.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ #define BIT_0 ( 1 << 0 )
 
+ #define BIT_4 ( 1 << 4 )
 
+ *
 
+ * // An event group which it is assumed has already been created by a call to
 
+ * // xEventGroupCreate().
 
+ * EventGroupHandle_t xEventGroup;
 
+ *
 
+ * void anInterruptHandler( void )
 
+ * {
 
+ *      // Clear bit 0 and bit 4 in xEventGroup.
 
+ *      xResult = xEventGroupClearBitsFromISR(
 
+ *                          xEventGroup,     // The event group being updated.
 
+ *                          BIT_0 | BIT_4 ); // The bits being set.
 
+ *
 
+ *      if( xResult == pdPASS )
 
+ *      {
 
+ *          // The message was posted successfully.
 
+ *      }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR
 
+ * \ingroup EventGroup
 
+ */
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+    BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup,
 
+                                            const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
 
+#else
 
+    #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) \
 
+    xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL )
 
+#endif
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ *  EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
 
+ * </pre>
 
+ *
 
+ * Set bits within an event group.
 
+ * This function cannot be called from an interrupt.  xEventGroupSetBitsFromISR()
 
+ * is a version that can be called from an interrupt.
 
+ *
 
+ * Setting bits in an event group will automatically unblock tasks that are
 
+ * blocked waiting for the bits.
 
+ *
 
+ * @param xEventGroup The event group in which the bits are to be set.
 
+ *
 
+ * @param uxBitsToSet A bitwise value that indicates the bit or bits to set.
 
+ * For example, to set bit 3 only, set uxBitsToSet to 0x08.  To set bit 3
 
+ * and bit 0 set uxBitsToSet to 0x09.
 
+ *
 
+ * @return The value of the event group at the time the call to
 
+ * xEventGroupSetBits() returns.  There are two reasons why the returned value
 
+ * might have the bits specified by the uxBitsToSet parameter cleared.  First,
 
+ * if setting a bit results in a task that was waiting for the bit leaving the
 
+ * blocked state then it is possible the bit will be cleared automatically
 
+ * (see the xClearBitOnExit parameter of xEventGroupWaitBits()).  Second, any
 
+ * unblocked (or otherwise Ready state) task that has a priority above that of
 
+ * the task that called xEventGroupSetBits() will execute and may change the
 
+ * event group value before the call to xEventGroupSetBits() returns.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ #define BIT_0 ( 1 << 0 )
 
+ #define BIT_4 ( 1 << 4 )
 
+ *
 
+ * void aFunction( EventGroupHandle_t xEventGroup )
 
+ * {
 
+ * EventBits_t uxBits;
 
+ *
 
+ *      // Set bit 0 and bit 4 in xEventGroup.
 
+ *      uxBits = xEventGroupSetBits(
 
+ *                          xEventGroup,    // The event group being updated.
 
+ *                          BIT_0 | BIT_4 );// The bits being set.
 
+ *
 
+ *      if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
 
+ *      {
 
+ *          // Both bit 0 and bit 4 remained set when the function returned.
 
+ *      }
 
+ *      else if( ( uxBits & BIT_0 ) != 0 )
 
+ *      {
 
+ *          // Bit 0 remained set when the function returned, but bit 4 was
 
+ *          // cleared.  It might be that bit 4 was cleared automatically as a
 
+ *          // task that was waiting for bit 4 was removed from the Blocked
 
+ *          // state.
 
+ *      }
 
+ *      else if( ( uxBits & BIT_4 ) != 0 )
 
+ *      {
 
+ *          // Bit 4 remained set when the function returned, but bit 0 was
 
+ *          // cleared.  It might be that bit 0 was cleared automatically as a
 
+ *          // task that was waiting for bit 0 was removed from the Blocked
 
+ *          // state.
 
+ *      }
 
+ *      else
 
+ *      {
 
+ *          // Neither bit 0 nor bit 4 remained set.  It might be that a task
 
+ *          // was waiting for both of the bits to be set, and the bits were
 
+ *          // cleared as the task left the Blocked state.
 
+ *      }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xEventGroupSetBits xEventGroupSetBits
 
+ * \ingroup EventGroup
 
+ */
 
+EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
 
+                                const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ *  BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
 
+ * </pre>
 
+ *
 
+ * A version of xEventGroupSetBits() that can be called from an interrupt.
 
+ *
 
+ * Setting bits in an event group is not a deterministic operation because there
 
+ * are an unknown number of tasks that may be waiting for the bit or bits being
 
+ * set.  FreeRTOS does not allow nondeterministic operations to be performed in
 
+ * interrupts or from critical sections.  Therefore xEventGroupSetBitsFromISR()
 
+ * sends a message to the timer task to have the set operation performed in the
 
+ * context of the timer task - where a scheduler lock is used in place of a
 
+ * critical section.
 
+ *
 
+ * @param xEventGroup The event group in which the bits are to be set.
 
+ *
 
+ * @param uxBitsToSet A bitwise value that indicates the bit or bits to set.
 
+ * For example, to set bit 3 only, set uxBitsToSet to 0x08.  To set bit 3
 
+ * and bit 0 set uxBitsToSet to 0x09.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken As mentioned above, calling this function
 
+ * will result in a message being sent to the timer daemon task.  If the
 
+ * priority of the timer daemon task is higher than the priority of the
 
+ * currently running task (the task the interrupt interrupted) then
 
+ * *pxHigherPriorityTaskWoken will be set to pdTRUE by
 
+ * xEventGroupSetBitsFromISR(), indicating that a context switch should be
 
+ * requested before the interrupt exits.  For that reason
 
+ * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the
 
+ * example code below.
 
+ *
 
+ * @return If the request to execute the function was posted successfully then
 
+ * pdPASS is returned, otherwise pdFALSE is returned.  pdFALSE will be returned
 
+ * if the timer service queue was full.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ #define BIT_0 ( 1 << 0 )
 
+ #define BIT_4 ( 1 << 4 )
 
+ *
 
+ * // An event group which it is assumed has already been created by a call to
 
+ * // xEventGroupCreate().
 
+ * EventGroupHandle_t xEventGroup;
 
+ *
 
+ * void anInterruptHandler( void )
 
+ * {
 
+ * BaseType_t xHigherPriorityTaskWoken, xResult;
 
+ *
 
+ *      // xHigherPriorityTaskWoken must be initialised to pdFALSE.
 
+ *      xHigherPriorityTaskWoken = pdFALSE;
 
+ *
 
+ *      // Set bit 0 and bit 4 in xEventGroup.
 
+ *      xResult = xEventGroupSetBitsFromISR(
 
+ *                          xEventGroup,    // The event group being updated.
 
+ *                          BIT_0 | BIT_4   // The bits being set.
 
+ *                          &xHigherPriorityTaskWoken );
 
+ *
 
+ *      // Was the message posted successfully?
 
+ *      if( xResult == pdPASS )
 
+ *      {
 
+ *          // If xHigherPriorityTaskWoken is now set to pdTRUE then a context
 
+ *          // switch should be requested.  The macro used is port specific and
 
+ *          // will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() -
 
+ *          // refer to the documentation page for the port being used.
 
+ *          portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
 
+ *      }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR
 
+ * \ingroup EventGroup
 
+ */
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+    BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup,
 
+                                          const EventBits_t uxBitsToSet,
 
+                                          BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+#else
 
+    #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) \
 
+    xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken )
 
+#endif
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ *  EventBits_t xEventGroupSync(    EventGroupHandle_t xEventGroup,
 
+ *                                  const EventBits_t uxBitsToSet,
 
+ *                                  const EventBits_t uxBitsToWaitFor,
 
+ *                                  TickType_t xTicksToWait );
 
+ * </pre>
 
+ *
 
+ * Atomically set bits within an event group, then wait for a combination of
 
+ * bits to be set within the same event group.  This functionality is typically
 
+ * used to synchronise multiple tasks, where each task has to wait for the other
 
+ * tasks to reach a synchronisation point before proceeding.
 
+ *
 
+ * This function cannot be used from an interrupt.
 
+ *
 
+ * The function will return before its block time expires if the bits specified
 
+ * by the uxBitsToWait parameter are set, or become set within that time.  In
 
+ * this case all the bits specified by uxBitsToWait will be automatically
 
+ * cleared before the function returns.
 
+ *
 
+ * @param xEventGroup The event group in which the bits are being tested.  The
 
+ * event group must have previously been created using a call to
 
+ * xEventGroupCreate().
 
+ *
 
+ * @param uxBitsToSet The bits to set in the event group before determining
 
+ * if, and possibly waiting for, all the bits specified by the uxBitsToWait
 
+ * parameter are set.
 
+ *
 
+ * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test
 
+ * inside the event group.  For example, to wait for bit 0 and bit 2 set
 
+ * uxBitsToWaitFor to 0x05.  To wait for bits 0 and bit 1 and bit 2 set
 
+ * uxBitsToWaitFor to 0x07.  Etc.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait
 
+ * for all of the bits specified by uxBitsToWaitFor to become set.
 
+ *
 
+ * @return The value of the event group at the time either the bits being waited
 
+ * for became set, or the block time expired.  Test the return value to know
 
+ * which bits were set.  If xEventGroupSync() returned because its timeout
 
+ * expired then not all the bits being waited for will be set.  If
 
+ * xEventGroupSync() returned because all the bits it was waiting for were
 
+ * set then the returned value is the event group value before any bits were
 
+ * automatically cleared.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Bits used by the three tasks.
 
+ #define TASK_0_BIT     ( 1 << 0 )
 
+ #define TASK_1_BIT     ( 1 << 1 )
 
+ #define TASK_2_BIT     ( 1 << 2 )
 
+ *
 
+ #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
 
+ *
 
+ * // Use an event group to synchronise three tasks.  It is assumed this event
 
+ * // group has already been created elsewhere.
 
+ * EventGroupHandle_t xEventBits;
 
+ *
 
+ * void vTask0( void *pvParameters )
 
+ * {
 
+ * EventBits_t uxReturn;
 
+ * TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
 
+ *
 
+ *   for( ;; )
 
+ *   {
 
+ *      // Perform task functionality here.
 
+ *
 
+ *      // Set bit 0 in the event flag to note this task has reached the
 
+ *      // sync point.  The other two tasks will set the other two bits defined
 
+ *      // by ALL_SYNC_BITS.  All three tasks have reached the synchronisation
 
+ *      // point when all the ALL_SYNC_BITS are set.  Wait a maximum of 100ms
 
+ *      // for this to happen.
 
+ *      uxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait );
 
+ *
 
+ *      if( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS )
 
+ *      {
 
+ *          // All three tasks reached the synchronisation point before the call
 
+ *          // to xEventGroupSync() timed out.
 
+ *      }
 
+ *  }
 
+ * }
 
+ *
 
+ * void vTask1( void *pvParameters )
 
+ * {
 
+ *   for( ;; )
 
+ *   {
 
+ *      // Perform task functionality here.
 
+ *
 
+ *      // Set bit 1 in the event flag to note this task has reached the
 
+ *      // synchronisation point.  The other two tasks will set the other two
 
+ *      // bits defined by ALL_SYNC_BITS.  All three tasks have reached the
 
+ *      // synchronisation point when all the ALL_SYNC_BITS are set.  Wait
 
+ *      // indefinitely for this to happen.
 
+ *      xEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY );
 
+ *
 
+ *      // xEventGroupSync() was called with an indefinite block time, so
 
+ *      // this task will only reach here if the synchronisation was made by all
 
+ *      // three tasks, so there is no need to test the return value.
 
+ *   }
 
+ * }
 
+ *
 
+ * void vTask2( void *pvParameters )
 
+ * {
 
+ *   for( ;; )
 
+ *   {
 
+ *      // Perform task functionality here.
 
+ *
 
+ *      // Set bit 2 in the event flag to note this task has reached the
 
+ *      // synchronisation point.  The other two tasks will set the other two
 
+ *      // bits defined by ALL_SYNC_BITS.  All three tasks have reached the
 
+ *      // synchronisation point when all the ALL_SYNC_BITS are set.  Wait
 
+ *      // indefinitely for this to happen.
 
+ *      xEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY );
 
+ *
 
+ *      // xEventGroupSync() was called with an indefinite block time, so
 
+ *      // this task will only reach here if the synchronisation was made by all
 
+ *      // three tasks, so there is no need to test the return value.
 
+ *  }
 
+ * }
 
+ *
 
+ * </pre>
 
+ * \defgroup xEventGroupSync xEventGroupSync
 
+ * \ingroup EventGroup
 
+ */
 
+EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
 
+                             const EventBits_t uxBitsToSet,
 
+                             const EventBits_t uxBitsToWaitFor,
 
+                             TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ *  EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );
 
+ * </pre>
 
+ *
 
+ * Returns the current value of the bits in an event group.  This function
 
+ * cannot be used from an interrupt.
 
+ *
 
+ * @param xEventGroup The event group being queried.
 
+ *
 
+ * @return The event group bits at the time xEventGroupGetBits() was called.
 
+ *
 
+ * \defgroup xEventGroupGetBits xEventGroupGetBits
 
+ * \ingroup EventGroup
 
+ */
 
+#define xEventGroupGetBits( xEventGroup )    xEventGroupClearBits( xEventGroup, 0 )
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ *  EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
 
+ * </pre>
 
+ *
 
+ * A version of xEventGroupGetBits() that can be called from an ISR.
 
+ *
 
+ * @param xEventGroup The event group being queried.
 
+ *
 
+ * @return The event group bits at the time xEventGroupGetBitsFromISR() was called.
 
+ *
 
+ * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR
 
+ * \ingroup EventGroup
 
+ */
 
+EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * event_groups.h
 
+ * <pre>
 
+ *  void xEventGroupDelete( EventGroupHandle_t xEventGroup );
 
+ * </pre>
 
+ *
 
+ * Delete an event group that was previously created by a call to
 
+ * xEventGroupCreate().  Tasks that are blocked on the event group will be
 
+ * unblocked and obtain 0 as the event group's value.
 
+ *
 
+ * @param xEventGroup The event group being deleted.
 
+ */
 
+void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
 
+
 
+/* For internal use only. */
 
+void vEventGroupSetBitsCallback( void * pvEventGroup,
 
+                                 const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION;
 
+void vEventGroupClearBitsCallback( void * pvEventGroup,
 
+                                   const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
 
+
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+    UBaseType_t uxEventGroupGetNumber( void * xEventGroup ) PRIVILEGED_FUNCTION;
 
+    void vEventGroupSetNumber( void * xEventGroup,
 
+                               UBaseType_t uxEventGroupNumber ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    }
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#endif /* EVENT_GROUPS_H */

+ 499 - 0
FreeRTOS/Source/include/list.h
Vedi File 

@@ -0,0 +1,499 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/*
 
+ * This is the list implementation used by the scheduler.  While it is tailored
 
+ * heavily for the schedulers needs, it is also available for use by
 
+ * application code.
 
+ *
 
+ * list_ts can only store pointers to list_item_ts.  Each ListItem_t contains a
 
+ * numeric value (xItemValue).  Most of the time the lists are sorted in
 
+ * ascending item value order.
 
+ *
 
+ * Lists are created already containing one list item.  The value of this
 
+ * item is the maximum possible that can be stored, it is therefore always at
 
+ * the end of the list and acts as a marker.  The list member pxHead always
 
+ * points to this marker - even though it is at the tail of the list.  This
 
+ * is because the tail contains a wrap back pointer to the true head of
 
+ * the list.
 
+ *
 
+ * In addition to it's value, each list item contains a pointer to the next
 
+ * item in the list (pxNext), a pointer to the list it is in (pxContainer)
 
+ * and a pointer to back to the object that contains it.  These later two
 
+ * pointers are included for efficiency of list manipulation.  There is
 
+ * effectively a two way link between the object containing the list item and
 
+ * the list item itself.
 
+ *
 
+ *
 
+ * \page ListIntroduction List Implementation
 
+ * \ingroup FreeRTOSIntro
 
+ */
 
+
 
+
 
+#ifndef LIST_H
 
+#define LIST_H
 
+
 
+#ifndef INC_FREERTOS_H
 
+    #error "FreeRTOS.h must be included before list.h"
 
+#endif
 
+
 
+/*
 
+ * The list structure members are modified from within interrupts, and therefore
 
+ * by rights should be declared volatile.  However, they are only modified in a
 
+ * functionally atomic way (within critical sections of with the scheduler
 
+ * suspended) and are either passed by reference into a function or indexed via
 
+ * a volatile variable.  Therefore, in all use cases tested so far, the volatile
 
+ * qualifier can be omitted in order to provide a moderate performance
 
+ * improvement without adversely affecting functional behaviour.  The assembly
 
+ * instructions generated by the IAR, ARM and GCC compilers when the respective
 
+ * compiler's options were set for maximum optimisation has been inspected and
 
+ * deemed to be as intended.  That said, as compiler technology advances, and
 
+ * especially if aggressive cross module optimisation is used (a use case that
 
+ * has not been exercised to any great extend) then it is feasible that the
 
+ * volatile qualifier will be needed for correct optimisation.  It is expected
 
+ * that a compiler removing essential code because, without the volatile
 
+ * qualifier on the list structure members and with aggressive cross module
 
+ * optimisation, the compiler deemed the code unnecessary will result in
 
+ * complete and obvious failure of the scheduler.  If this is ever experienced
 
+ * then the volatile qualifier can be inserted in the relevant places within the
 
+ * list structures by simply defining configLIST_VOLATILE to volatile in
 
+ * FreeRTOSConfig.h (as per the example at the bottom of this comment block).
 
+ * If configLIST_VOLATILE is not defined then the preprocessor directives below
 
+ * will simply #define configLIST_VOLATILE away completely.
 
+ *
 
+ * To use volatile list structure members then add the following line to
 
+ * FreeRTOSConfig.h (without the quotes):
 
+ * "#define configLIST_VOLATILE volatile"
 
+ */
 
+#ifndef configLIST_VOLATILE
 
+    #define configLIST_VOLATILE
 
+#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+/* Macros that can be used to place known values within the list structures,
 
+ * then check that the known values do not get corrupted during the execution of
 
+ * the application.   These may catch the list data structures being overwritten in
 
+ * memory.  They will not catch data errors caused by incorrect configuration or
 
+ * use of FreeRTOS.*/
 
+#if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 )
 
+    /* Define the macros to do nothing. */
 
+    #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE
 
+    #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE
 
+    #define listFIRST_LIST_INTEGRITY_CHECK_VALUE
 
+    #define listSECOND_LIST_INTEGRITY_CHECK_VALUE
 
+    #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
 
+    #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
 
+    #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )
 
+    #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )
 
+    #define listTEST_LIST_ITEM_INTEGRITY( pxItem )
 
+    #define listTEST_LIST_INTEGRITY( pxList )
 
+#else /* if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) */
 
+    /* Define macros that add new members into the list structures. */
 
+    #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE     TickType_t xListItemIntegrityValue1;
 
+    #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE    TickType_t xListItemIntegrityValue2;
 
+    #define listFIRST_LIST_INTEGRITY_CHECK_VALUE          TickType_t xListIntegrityValue1;
 
+    #define listSECOND_LIST_INTEGRITY_CHECK_VALUE         TickType_t xListIntegrityValue2;
 
+
 
+/* Define macros that set the new structure members to known values. */
 
+    #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )     ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
 
+    #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )    ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
 
+    #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )              ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
 
+    #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )              ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
 
+
 
+/* Define macros that will assert if one of the structure members does not
 
+ * contain its expected value. */
 
+    #define listTEST_LIST_ITEM_INTEGRITY( pxItem )                      configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
 
+    #define listTEST_LIST_INTEGRITY( pxList )                           configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
 
+#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */
 
+
 
+
 
+/*
 
+ * Definition of the only type of object that a list can contain.
 
+ */
 
+struct xLIST;
 
+struct xLIST_ITEM
 
+{
 
+    listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE           /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 
+    configLIST_VOLATILE TickType_t xItemValue;          /*< The value being listed.  In most cases this is used to sort the list in ascending order. */
 
+    struct xLIST_ITEM * configLIST_VOLATILE pxNext;     /*< Pointer to the next ListItem_t in the list. */
 
+    struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */
 
+    void * pvOwner;                                     /*< Pointer to the object (normally a TCB) that contains the list item.  There is therefore a two way link between the object containing the list item and the list item itself. */
 
+    struct xLIST * configLIST_VOLATILE pxContainer;     /*< Pointer to the list in which this list item is placed (if any). */
 
+    listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE          /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 
+};
 
+typedef struct xLIST_ITEM ListItem_t;                   /* For some reason lint wants this as two separate definitions. */
 
+
 
+struct xMINI_LIST_ITEM
 
+{
 
+    listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 
+    configLIST_VOLATILE TickType_t xItemValue;
 
+    struct xLIST_ITEM * configLIST_VOLATILE pxNext;
 
+    struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
 
+};
 
+typedef struct xMINI_LIST_ITEM MiniListItem_t;
 
+
 
+/*
 
+ * Definition of the type of queue used by the scheduler.
 
+ */
 
+typedef struct xLIST
 
+{
 
+    listFIRST_LIST_INTEGRITY_CHECK_VALUE      /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 
+    volatile UBaseType_t uxNumberOfItems;
 
+    ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list.  Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
 
+    MiniListItem_t xListEnd;                  /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
 
+    listSECOND_LIST_INTEGRITY_CHECK_VALUE     /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 
+} List_t;
 
+
 
+/*
 
+ * Access macro to set the owner of a list item.  The owner of a list item
 
+ * is the object (usually a TCB) that contains the list item.
 
+ *
 
+ * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
 
+ * \ingroup LinkedList
 
+ */
 
+#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner )    ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) )
 
+
 
+/*
 
+ * Access macro to get the owner of a list item.  The owner of a list item
 
+ * is the object (usually a TCB) that contains the list item.
 
+ *
 
+ * \page listGET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
 
+ * \ingroup LinkedList
 
+ */
 
+#define listGET_LIST_ITEM_OWNER( pxListItem )             ( ( pxListItem )->pvOwner )
 
+
 
+/*
 
+ * Access macro to set the value of the list item.  In most cases the value is
 
+ * used to sort the list in ascending order.
 
+ *
 
+ * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE
 
+ * \ingroup LinkedList
 
+ */
 
+#define listSET_LIST_ITEM_VALUE( pxListItem, xValue )     ( ( pxListItem )->xItemValue = ( xValue ) )
 
+
 
+/*
 
+ * Access macro to retrieve the value of the list item.  The value can
 
+ * represent anything - for example the priority of a task, or the time at
 
+ * which a task should be unblocked.
 
+ *
 
+ * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
 
+ * \ingroup LinkedList
 
+ */
 
+#define listGET_LIST_ITEM_VALUE( pxListItem )             ( ( pxListItem )->xItemValue )
 
+
 
+/*
 
+ * Access macro to retrieve the value of the list item at the head of a given
 
+ * list.
 
+ *
 
+ * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
 
+ * \ingroup LinkedList
 
+ */
 
+#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList )        ( ( ( pxList )->xListEnd ).pxNext->xItemValue )
 
+
 
+/*
 
+ * Return the list item at the head of the list.
 
+ *
 
+ * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY
 
+ * \ingroup LinkedList
 
+ */
 
+#define listGET_HEAD_ENTRY( pxList )                      ( ( ( pxList )->xListEnd ).pxNext )
 
+
 
+/*
 
+ * Return the next list item.
 
+ *
 
+ * \page listGET_NEXT listGET_NEXT
 
+ * \ingroup LinkedList
 
+ */
 
+#define listGET_NEXT( pxListItem )                        ( ( pxListItem )->pxNext )
 
+
 
+/*
 
+ * Return the list item that marks the end of the list
 
+ *
 
+ * \page listGET_END_MARKER listGET_END_MARKER
 
+ * \ingroup LinkedList
 
+ */
 
+#define listGET_END_MARKER( pxList )                      ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) )
 
+
 
+/*
 
+ * Access macro to determine if a list contains any items.  The macro will
 
+ * only have the value true if the list is empty.
 
+ *
 
+ * \page listLIST_IS_EMPTY listLIST_IS_EMPTY
 
+ * \ingroup LinkedList
 
+ */
 
+#define listLIST_IS_EMPTY( pxList )                       ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE )
 
+
 
+/*
 
+ * Access macro to return the number of items in the list.
 
+ */
 
+#define listCURRENT_LIST_LENGTH( pxList )                 ( ( pxList )->uxNumberOfItems )
 
+
 
+/*
 
+ * Access function to obtain the owner of the next entry in a list.
 
+ *
 
+ * The list member pxIndex is used to walk through a list.  Calling
 
+ * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list
 
+ * and returns that entry's pxOwner parameter.  Using multiple calls to this
 
+ * function it is therefore possible to move through every item contained in
 
+ * a list.
 
+ *
 
+ * The pxOwner parameter of a list item is a pointer to the object that owns
 
+ * the list item.  In the scheduler this is normally a task control block.
 
+ * The pxOwner parameter effectively creates a two way link between the list
 
+ * item and its owner.
 
+ *
 
+ * @param pxTCB pxTCB is set to the address of the owner of the next list item.
 
+ * @param pxList The list from which the next item owner is to be returned.
 
+ *
 
+ * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY
 
+ * \ingroup LinkedList
 
+ */
 
+#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList )                                           \
 
+    {                                                                                          \
 
+        List_t * const pxConstList = ( pxList );                                               \
 
+        /* Increment the index to the next item and return the item, ensuring */               \
 
+        /* we don't return the marker used at the end of the list.  */                         \
 
+        ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext;                           \
 
+        if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \
 
+        {                                                                                      \
 
+            ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext;                       \
 
+        }                                                                                      \
 
+        ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner;                                         \
 
+    }
 
+
 
+/*
 
+ * Version of uxListRemove() that does not return a value.  Provided as a slight
 
+ * optimisation for xTaskIncrementTick() by being inline.
 
+ *
 
+ * Remove an item from a list.  The list item has a pointer to the list that
 
+ * it is in, so only the list item need be passed into the function.
 
+ *
 
+ * @param uxListRemove The item to be removed.  The item will remove itself from
 
+ * the list pointed to by it's pxContainer parameter.
 
+ *
 
+ * @return The number of items that remain in the list after the list item has
 
+ * been removed.
 
+ *
 
+ * \page listREMOVE_ITEM listREMOVE_ITEM
 
+ * \ingroup LinkedList
 
+ */
 
+#define listREMOVE_ITEM( pxItemToRemove )                                           \
 
+{                                                                                   \
 
+    /* The list item knows which list it is in.  Obtain the list from the list      \
 
+     * item. */                                                                     \
 
+    List_t * const pxList = ( pxItemToRemove )->pxContainer;                        \
 
+                                                                                    \
 
+    ( pxItemToRemove )->pxNext->pxPrevious = ( pxItemToRemove )->pxPrevious;        \
 
+    ( pxItemToRemove )->pxPrevious->pxNext = ( pxItemToRemove )->pxNext;            \
 
+    /* Make sure the index is left pointing to a valid item. */                     \
 
+    if( pxList->pxIndex == ( pxItemToRemove ) )                                     \
 
+    {                                                                               \
 
+        pxList->pxIndex = ( pxItemToRemove )->pxPrevious;                           \
 
+    }                                                                               \
 
+                                                                                    \
 
+    ( pxItemToRemove )->pxContainer = NULL;                                         \
 
+    ( pxList->uxNumberOfItems )--;                                                  \
 
+}
 
+
 
+/*
 
+ * Inline version of vListInsertEnd() to provide slight optimisation for
 
+ * xTaskIncrementTick().
 
+ *
 
+ * Insert a list item into a list.  The item will be inserted in a position
 
+ * such that it will be the last item within the list returned by multiple
 
+ * calls to listGET_OWNER_OF_NEXT_ENTRY.
 
+ *
 
+ * The list member pxIndex is used to walk through a list.  Calling
 
+ * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list.
 
+ * Placing an item in a list using vListInsertEnd effectively places the item
 
+ * in the list position pointed to by pxIndex.  This means that every other
 
+ * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before
 
+ * the pxIndex parameter again points to the item being inserted.
 
+ *
 
+ * @param pxList The list into which the item is to be inserted.
 
+ *
 
+ * @param pxNewListItem The list item to be inserted into the list.
 
+ *
 
+ * \page listINSERT_END listINSERT_END
 
+ * \ingroup LinkedList
 
+ */
 
+#define listINSERT_END( pxList, pxNewListItem )                                     \
 
+{                                                                                   \
 
+    ListItem_t * const pxIndex = ( pxList )->pxIndex;                               \
 
+                                                                                    \
 
+    /* Only effective when configASSERT() is also defined, these tests may catch    \
 
+     * the list data structures being overwritten in memory.  They will not catch   \
 
+     * data errors caused by incorrect configuration or use of FreeRTOS. */         \
 
+    listTEST_LIST_INTEGRITY( ( pxList ) );                                          \
 
+    listTEST_LIST_ITEM_INTEGRITY( ( pxNewListItem ) );                              \
 
+                                                                                    \
 
+    /* Insert a new list item into ( pxList ), but rather than sort the list,       \
 
+     * makes the new list item the last item to be removed by a call to             \
 
+     * listGET_OWNER_OF_NEXT_ENTRY(). */                                            \
 
+    ( pxNewListItem )->pxNext = pxIndex;                                            \
 
+    ( pxNewListItem )->pxPrevious = pxIndex->pxPrevious;                            \
 
+                                                                                    \
 
+    pxIndex->pxPrevious->pxNext = ( pxNewListItem );                                \
 
+    pxIndex->pxPrevious = ( pxNewListItem );                                        \
 
+                                                                                    \
 
+    /* Remember which list the item is in. */                                       \
 
+    ( pxNewListItem )->pxContainer = ( pxList );                                    \
 
+                                                                                    \
 
+    ( ( pxList )->uxNumberOfItems )++;                                              \
 
+}
 
+
 
+/*
 
+ * Access function to obtain the owner of the first entry in a list.  Lists
 
+ * are normally sorted in ascending item value order.
 
+ *
 
+ * This function returns the pxOwner member of the first item in the list.
 
+ * The pxOwner parameter of a list item is a pointer to the object that owns
 
+ * the list item.  In the scheduler this is normally a task control block.
 
+ * The pxOwner parameter effectively creates a two way link between the list
 
+ * item and its owner.
 
+ *
 
+ * @param pxList The list from which the owner of the head item is to be
 
+ * returned.
 
+ *
 
+ * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY
 
+ * \ingroup LinkedList
 
+ */
 
+#define listGET_OWNER_OF_HEAD_ENTRY( pxList )            ( ( &( ( pxList )->xListEnd ) )->pxNext->pvOwner )
 
+
 
+/*
 
+ * Check to see if a list item is within a list.  The list item maintains a
 
+ * "container" pointer that points to the list it is in.  All this macro does
 
+ * is check to see if the container and the list match.
 
+ *
 
+ * @param pxList The list we want to know if the list item is within.
 
+ * @param pxListItem The list item we want to know if is in the list.
 
+ * @return pdTRUE if the list item is in the list, otherwise pdFALSE.
 
+ */
 
+#define listIS_CONTAINED_WITHIN( pxList, pxListItem )    ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) )
 
+
 
+/*
 
+ * Return the list a list item is contained within (referenced from).
 
+ *
 
+ * @param pxListItem The list item being queried.
 
+ * @return A pointer to the List_t object that references the pxListItem
 
+ */
 
+#define listLIST_ITEM_CONTAINER( pxListItem )            ( ( pxListItem )->pxContainer )
 
+
 
+/*
 
+ * This provides a crude means of knowing if a list has been initialised, as
 
+ * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise()
 
+ * function.
 
+ */
 
+#define listLIST_IS_INITIALISED( pxList )                ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY )
 
+
 
+/*
 
+ * Must be called before a list is used!  This initialises all the members
 
+ * of the list structure and inserts the xListEnd item into the list as a
 
+ * marker to the back of the list.
 
+ *
 
+ * @param pxList Pointer to the list being initialised.
 
+ *
 
+ * \page vListInitialise vListInitialise
 
+ * \ingroup LinkedList
 
+ */
 
+void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Must be called before a list item is used.  This sets the list container to
 
+ * null so the item does not think that it is already contained in a list.
 
+ *
 
+ * @param pxItem Pointer to the list item being initialised.
 
+ *
 
+ * \page vListInitialiseItem vListInitialiseItem
 
+ * \ingroup LinkedList
 
+ */
 
+void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Insert a list item into a list.  The item will be inserted into the list in
 
+ * a position determined by its item value (ascending item value order).
 
+ *
 
+ * @param pxList The list into which the item is to be inserted.
 
+ *
 
+ * @param pxNewListItem The item that is to be placed in the list.
 
+ *
 
+ * \page vListInsert vListInsert
 
+ * \ingroup LinkedList
 
+ */
 
+void vListInsert( List_t * const pxList,
 
+                  ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Insert a list item into a list.  The item will be inserted in a position
 
+ * such that it will be the last item within the list returned by multiple
 
+ * calls to listGET_OWNER_OF_NEXT_ENTRY.
 
+ *
 
+ * The list member pxIndex is used to walk through a list.  Calling
 
+ * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list.
 
+ * Placing an item in a list using vListInsertEnd effectively places the item
 
+ * in the list position pointed to by pxIndex.  This means that every other
 
+ * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before
 
+ * the pxIndex parameter again points to the item being inserted.
 
+ *
 
+ * @param pxList The list into which the item is to be inserted.
 
+ *
 
+ * @param pxNewListItem The list item to be inserted into the list.
 
+ *
 
+ * \page vListInsertEnd vListInsertEnd
 
+ * \ingroup LinkedList
 
+ */
 
+void vListInsertEnd( List_t * const pxList,
 
+                     ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Remove an item from a list.  The list item has a pointer to the list that
 
+ * it is in, so only the list item need be passed into the function.
 
+ *
 
+ * @param uxListRemove The item to be removed.  The item will remove itself from
 
+ * the list pointed to by it's pxContainer parameter.
 
+ *
 
+ * @return The number of items that remain in the list after the list item has
 
+ * been removed.
 
+ *
 
+ * \page uxListRemove uxListRemove
 
+ * \ingroup LinkedList
 
+ */
 
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    }
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#endif /* ifndef LIST_H */

+ 823 - 0
FreeRTOS/Source/include/message_buffer.h
Vedi File 

@@ -0,0 +1,823 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+
 
+/*
 
+ * Message buffers build functionality on top of FreeRTOS stream buffers.
 
+ * Whereas stream buffers are used to send a continuous stream of data from one
 
+ * task or interrupt to another, message buffers are used to send variable
 
+ * length discrete messages from one task or interrupt to another.  Their
 
+ * implementation is light weight, making them particularly suited for interrupt
 
+ * to task and core to core communication scenarios.
 
+ *
 
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
 
+ * implementation (so also the message buffer implementation, as message buffers
 
+ * are built on top of stream buffers) assumes there is only one task or
 
+ * interrupt that will write to the buffer (the writer), and only one task or
 
+ * interrupt that will read from the buffer (the reader).  It is safe for the
 
+ * writer and reader to be different tasks or interrupts, but, unlike other
 
+ * FreeRTOS objects, it is not safe to have multiple different writers or
 
+ * multiple different readers.  If there are to be multiple different writers
 
+ * then the application writer must place each call to a writing API function
 
+ * (such as xMessageBufferSend()) inside a critical section and set the send
 
+ * block time to 0.  Likewise, if there are to be multiple different readers
 
+ * then the application writer must place each call to a reading API function
 
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
 
+ * timeout to 0.
 
+ *
 
+ * Message buffers hold variable length messages.  To enable that, when a
 
+ * message is written to the message buffer an additional sizeof( size_t ) bytes
 
+ * are also written to store the message's length (that happens internally, with
 
+ * the API function).  sizeof( size_t ) is typically 4 bytes on a 32-bit
 
+ * architecture, so writing a 10 byte message to a message buffer on a 32-bit
 
+ * architecture will actually reduce the available space in the message buffer
 
+ * by 14 bytes (10 byte are used by the message, and 4 bytes to hold the length
 
+ * of the message).
 
+ */
 
+
 
+#ifndef FREERTOS_MESSAGE_BUFFER_H
 
+#define FREERTOS_MESSAGE_BUFFER_H
 
+
 
+#ifndef INC_FREERTOS_H
 
+    #error "include FreeRTOS.h must appear in source files before include message_buffer.h"
 
+#endif
 
+
 
+/* Message buffers are built onto of stream buffers. */
 
+#include "stream_buffer.h"
 
+
 
+/* *INDENT-OFF* */
 
+#if defined( __cplusplus )
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+/**
 
+ * Type by which message buffers are referenced.  For example, a call to
 
+ * xMessageBufferCreate() returns an MessageBufferHandle_t variable that can
 
+ * then be used as a parameter to xMessageBufferSend(), xMessageBufferReceive(),
 
+ * etc.
 
+ */
 
+typedef void * MessageBufferHandle_t;
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/**
 
+ * message_buffer.h
 
+ *
 
+ * <pre>
 
+ * MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes );
 
+ * </pre>
 
+ *
 
+ * Creates a new message buffer using dynamically allocated memory.  See
 
+ * xMessageBufferCreateStatic() for a version that uses statically allocated
 
+ * memory (memory that is allocated at compile time).
 
+ *
 
+ * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
 
+ * FreeRTOSConfig.h for xMessageBufferCreate() to be available.
 
+ *
 
+ * @param xBufferSizeBytes The total number of bytes (not messages) the message
 
+ * buffer will be able to hold at any one time.  When a message is written to
 
+ * the message buffer an additional sizeof( size_t ) bytes are also written to
 
+ * store the message's length.  sizeof( size_t ) is typically 4 bytes on a
 
+ * 32-bit architecture, so on most 32-bit architectures a 10 byte message will
 
+ * take up 14 bytes of message buffer space.
 
+ *
 
+ * @return If NULL is returned, then the message buffer cannot be created
 
+ * because there is insufficient heap memory available for FreeRTOS to allocate
 
+ * the message buffer data structures and storage area.  A non-NULL value being
 
+ * returned indicates that the message buffer has been created successfully -
 
+ * the returned value should be stored as the handle to the created message
 
+ * buffer.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ *
 
+ * void vAFunction( void )
 
+ * {
 
+ * MessageBufferHandle_t xMessageBuffer;
 
+ * const size_t xMessageBufferSizeBytes = 100;
 
+ *
 
+ *  // Create a message buffer that can hold 100 bytes.  The memory used to hold
 
+ *  // both the message buffer structure and the messages themselves is allocated
 
+ *  // dynamically.  Each message added to the buffer consumes an additional 4
 
+ *  // bytes which are used to hold the lengh of the message.
 
+ *  xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes );
 
+ *
 
+ *  if( xMessageBuffer == NULL )
 
+ *  {
 
+ *      // There was not enough heap memory space available to create the
 
+ *      // message buffer.
 
+ *  }
 
+ *  else
 
+ *  {
 
+ *      // The message buffer was created successfully and can now be used.
 
+ *  }
 
+ *
 
+ * </pre>
 
+ * \defgroup xMessageBufferCreate xMessageBufferCreate
 
+ * \ingroup MessageBufferManagement
 
+ */
 
+#define xMessageBufferCreate( xBufferSizeBytes ) \
 
+    ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
 
+
 
+/**
 
+ * message_buffer.h
 
+ *
 
+ * <pre>
 
+ * MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,
 
+ *                                                uint8_t *pucMessageBufferStorageArea,
 
+ *                                                StaticMessageBuffer_t *pxStaticMessageBuffer );
 
+ * </pre>
 
+ * Creates a new message buffer using statically allocated memory.  See
 
+ * xMessageBufferCreate() for a version that uses dynamically allocated memory.
 
+ *
 
+ * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
 
+ * pucMessageBufferStorageArea parameter.  When a message is written to the
 
+ * message buffer an additional sizeof( size_t ) bytes are also written to store
 
+ * the message's length.  sizeof( size_t ) is typically 4 bytes on a 32-bit
 
+ * architecture, so on most 32-bit architecture a 10 byte message will take up
 
+ * 14 bytes of message buffer space.  The maximum number of bytes that can be
 
+ * stored in the message buffer is actually (xBufferSizeBytes - 1).
 
+ *
 
+ * @param pucMessageBufferStorageArea Must point to a uint8_t array that is at
 
+ * least xBufferSizeBytes + 1 big.  This is the array to which messages are
 
+ * copied when they are written to the message buffer.
 
+ *
 
+ * @param pxStaticMessageBuffer Must point to a variable of type
 
+ * StaticMessageBuffer_t, which will be used to hold the message buffer's data
 
+ * structure.
 
+ *
 
+ * @return If the message buffer is created successfully then a handle to the
 
+ * created message buffer is returned. If either pucMessageBufferStorageArea or
 
+ * pxStaticmessageBuffer are NULL then NULL is returned.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ *
 
+ * // Used to dimension the array used to hold the messages.  The available space
 
+ * // will actually be one less than this, so 999.
 
+ #define STORAGE_SIZE_BYTES 1000
 
+ *
 
+ * // Defines the memory that will actually hold the messages within the message
 
+ * // buffer.
 
+ * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
 
+ *
 
+ * // The variable used to hold the message buffer structure.
 
+ * StaticMessageBuffer_t xMessageBufferStruct;
 
+ *
 
+ * void MyFunction( void )
 
+ * {
 
+ * MessageBufferHandle_t xMessageBuffer;
 
+ *
 
+ *  xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ),
 
+ *                                               ucBufferStorage,
 
+ *                                               &xMessageBufferStruct );
 
+ *
 
+ *  // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer
 
+ *  // parameters were NULL, xMessageBuffer will not be NULL, and can be used to
 
+ *  // reference the created message buffer in other message buffer API calls.
 
+ *
 
+ *  // Other code that uses the message buffer can go here.
 
+ * }
 
+ *
 
+ * </pre>
 
+ * \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic
 
+ * \ingroup MessageBufferManagement
 
+ */
 
+#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) \
 
+    ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
 
+
 
+/**
 
+ * message_buffer.h
 
+ *
 
+ * <pre>
 
+ * size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
 
+ *                         const void *pvTxData,
 
+ *                         size_t xDataLengthBytes,
 
+ *                         TickType_t xTicksToWait );
 
+ * </pre>
 
+ *
 
+ * Sends a discrete message to the message buffer.  The message can be any
 
+ * length that fits within the buffer's free space, and is copied into the
 
+ * buffer.
 
+ *
 
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
 
+ * implementation (so also the message buffer implementation, as message buffers
 
+ * are built on top of stream buffers) assumes there is only one task or
 
+ * interrupt that will write to the buffer (the writer), and only one task or
 
+ * interrupt that will read from the buffer (the reader).  It is safe for the
 
+ * writer and reader to be different tasks or interrupts, but, unlike other
 
+ * FreeRTOS objects, it is not safe to have multiple different writers or
 
+ * multiple different readers.  If there are to be multiple different writers
 
+ * then the application writer must place each call to a writing API function
 
+ * (such as xMessageBufferSend()) inside a critical section and set the send
 
+ * block time to 0.  Likewise, if there are to be multiple different readers
 
+ * then the application writer must place each call to a reading API function
 
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
 
+ * block time to 0.
 
+ *
 
+ * Use xMessageBufferSend() to write to a message buffer from a task.  Use
 
+ * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
 
+ * service routine (ISR).
 
+ *
 
+ * @param xMessageBuffer The handle of the message buffer to which a message is
 
+ * being sent.
 
+ *
 
+ * @param pvTxData A pointer to the message that is to be copied into the
 
+ * message buffer.
 
+ *
 
+ * @param xDataLengthBytes The length of the message.  That is, the number of
 
+ * bytes to copy from pvTxData into the message buffer.  When a message is
 
+ * written to the message buffer an additional sizeof( size_t ) bytes are also
 
+ * written to store the message's length.  sizeof( size_t ) is typically 4 bytes
 
+ * on a 32-bit architecture, so on most 32-bit architecture setting
 
+ * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24
 
+ * bytes (20 bytes of message data and 4 bytes to hold the message length).
 
+ *
 
+ * @param xTicksToWait The maximum amount of time the calling task should remain
 
+ * in the Blocked state to wait for enough space to become available in the
 
+ * message buffer, should the message buffer have insufficient space when
 
+ * xMessageBufferSend() is called.  The calling task will never block if
 
+ * xTicksToWait is zero.  The block time is specified in tick periods, so the
 
+ * absolute time it represents is dependent on the tick frequency.  The macro
 
+ * pdMS_TO_TICKS() can be used to convert a time specified in milliseconds into
 
+ * a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will cause
 
+ * the task to wait indefinitely (without timing out), provided
 
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  Tasks do not use any
 
+ * CPU time when they are in the Blocked state.
 
+ *
 
+ * @return The number of bytes written to the message buffer.  If the call to
 
+ * xMessageBufferSend() times out before there was enough space to write the
 
+ * message into the message buffer then zero is returned.  If the call did not
 
+ * time out then xDataLengthBytes is returned.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ * void vAFunction( MessageBufferHandle_t xMessageBuffer )
 
+ * {
 
+ * size_t xBytesSent;
 
+ * uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
 
+ * char *pcStringToSend = "String to send";
 
+ * const TickType_t x100ms = pdMS_TO_TICKS( 100 );
 
+ *
 
+ *  // Send an array to the message buffer, blocking for a maximum of 100ms to
 
+ *  // wait for enough space to be available in the message buffer.
 
+ *  xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
 
+ *
 
+ *  if( xBytesSent != sizeof( ucArrayToSend ) )
 
+ *  {
 
+ *      // The call to xMessageBufferSend() times out before there was enough
 
+ *      // space in the buffer for the data to be written.
 
+ *  }
 
+ *
 
+ *  // Send the string to the message buffer.  Return immediately if there is
 
+ *  // not enough space in the buffer.
 
+ *  xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
 
+ *
 
+ *  if( xBytesSent != strlen( pcStringToSend ) )
 
+ *  {
 
+ *      // The string could not be added to the message buffer because there was
 
+ *      // not enough free space in the buffer.
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xMessageBufferSend xMessageBufferSend
 
+ * \ingroup MessageBufferManagement
 
+ */
 
+#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) \
 
+    xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
 
+
 
+/**
 
+ * message_buffer.h
 
+ *
 
+ * <pre>
 
+ * size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
 
+ *                                const void *pvTxData,
 
+ *                                size_t xDataLengthBytes,
 
+ *                                BaseType_t *pxHigherPriorityTaskWoken );
 
+ * </pre>
 
+ *
 
+ * Interrupt safe version of the API function that sends a discrete message to
 
+ * the message buffer.  The message can be any length that fits within the
 
+ * buffer's free space, and is copied into the buffer.
 
+ *
 
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
 
+ * implementation (so also the message buffer implementation, as message buffers
 
+ * are built on top of stream buffers) assumes there is only one task or
 
+ * interrupt that will write to the buffer (the writer), and only one task or
 
+ * interrupt that will read from the buffer (the reader).  It is safe for the
 
+ * writer and reader to be different tasks or interrupts, but, unlike other
 
+ * FreeRTOS objects, it is not safe to have multiple different writers or
 
+ * multiple different readers.  If there are to be multiple different writers
 
+ * then the application writer must place each call to a writing API function
 
+ * (such as xMessageBufferSend()) inside a critical section and set the send
 
+ * block time to 0.  Likewise, if there are to be multiple different readers
 
+ * then the application writer must place each call to a reading API function
 
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
 
+ * block time to 0.
 
+ *
 
+ * Use xMessageBufferSend() to write to a message buffer from a task.  Use
 
+ * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
 
+ * service routine (ISR).
 
+ *
 
+ * @param xMessageBuffer The handle of the message buffer to which a message is
 
+ * being sent.
 
+ *
 
+ * @param pvTxData A pointer to the message that is to be copied into the
 
+ * message buffer.
 
+ *
 
+ * @param xDataLengthBytes The length of the message.  That is, the number of
 
+ * bytes to copy from pvTxData into the message buffer.  When a message is
 
+ * written to the message buffer an additional sizeof( size_t ) bytes are also
 
+ * written to store the message's length.  sizeof( size_t ) is typically 4 bytes
 
+ * on a 32-bit architecture, so on most 32-bit architecture setting
 
+ * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24
 
+ * bytes (20 bytes of message data and 4 bytes to hold the message length).
 
+ *
 
+ * @param pxHigherPriorityTaskWoken  It is possible that a message buffer will
 
+ * have a task blocked on it waiting for data.  Calling
 
+ * xMessageBufferSendFromISR() can make data available, and so cause a task that
 
+ * was waiting for data to leave the Blocked state.  If calling
 
+ * xMessageBufferSendFromISR() causes a task to leave the Blocked state, and the
 
+ * unblocked task has a priority higher than the currently executing task (the
 
+ * task that was interrupted), then, internally, xMessageBufferSendFromISR()
 
+ * will set *pxHigherPriorityTaskWoken to pdTRUE.  If
 
+ * xMessageBufferSendFromISR() sets this value to pdTRUE, then normally a
 
+ * context switch should be performed before the interrupt is exited.  This will
 
+ * ensure that the interrupt returns directly to the highest priority Ready
 
+ * state task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it
 
+ * is passed into the function.  See the code example below for an example.
 
+ *
 
+ * @return The number of bytes actually written to the message buffer.  If the
 
+ * message buffer didn't have enough free space for the message to be stored
 
+ * then 0 is returned, otherwise xDataLengthBytes is returned.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ * // A message buffer that has already been created.
 
+ * MessageBufferHandle_t xMessageBuffer;
 
+ *
 
+ * void vAnInterruptServiceRoutine( void )
 
+ * {
 
+ * size_t xBytesSent;
 
+ * char *pcStringToSend = "String to send";
 
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
 
+ *
 
+ *  // Attempt to send the string to the message buffer.
 
+ *  xBytesSent = xMessageBufferSendFromISR( xMessageBuffer,
 
+ *                                          ( void * ) pcStringToSend,
 
+ *                                          strlen( pcStringToSend ),
 
+ *                                          &xHigherPriorityTaskWoken );
 
+ *
 
+ *  if( xBytesSent != strlen( pcStringToSend ) )
 
+ *  {
 
+ *      // The string could not be added to the message buffer because there was
 
+ *      // not enough free space in the buffer.
 
+ *  }
 
+ *
 
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
 
+ *  // xMessageBufferSendFromISR() then a task that has a priority above the
 
+ *  // priority of the currently executing task was unblocked and a context
 
+ *  // switch should be performed to ensure the ISR returns to the unblocked
 
+ *  // task.  In most FreeRTOS ports this is done by simply passing
 
+ *  // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
 
+ *  // variables value, and perform the context switch if necessary.  Check the
 
+ *  // documentation for the port in use for port specific instructions.
 
+ *  portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
 
+ * }
 
+ * </pre>
 
+ * \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR
 
+ * \ingroup MessageBufferManagement
 
+ */
 
+#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) \
 
+    xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
 
+
 
+/**
 
+ * message_buffer.h
 
+ *
 
+ * <pre>
 
+ * size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
 
+ *                            void *pvRxData,
 
+ *                            size_t xBufferLengthBytes,
 
+ *                            TickType_t xTicksToWait );
 
+ * </pre>
 
+ *
 
+ * Receives a discrete message from a message buffer.  Messages can be of
 
+ * variable length and are copied out of the buffer.
 
+ *
 
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
 
+ * implementation (so also the message buffer implementation, as message buffers
 
+ * are built on top of stream buffers) assumes there is only one task or
 
+ * interrupt that will write to the buffer (the writer), and only one task or
 
+ * interrupt that will read from the buffer (the reader).  It is safe for the
 
+ * writer and reader to be different tasks or interrupts, but, unlike other
 
+ * FreeRTOS objects, it is not safe to have multiple different writers or
 
+ * multiple different readers.  If there are to be multiple different writers
 
+ * then the application writer must place each call to a writing API function
 
+ * (such as xMessageBufferSend()) inside a critical section and set the send
 
+ * block time to 0.  Likewise, if there are to be multiple different readers
 
+ * then the application writer must place each call to a reading API function
 
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
 
+ * block time to 0.
 
+ *
 
+ * Use xMessageBufferReceive() to read from a message buffer from a task.  Use
 
+ * xMessageBufferReceiveFromISR() to read from a message buffer from an
 
+ * interrupt service routine (ISR).
 
+ *
 
+ * @param xMessageBuffer The handle of the message buffer from which a message
 
+ * is being received.
 
+ *
 
+ * @param pvRxData A pointer to the buffer into which the received message is
 
+ * to be copied.
 
+ *
 
+ * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData
 
+ * parameter.  This sets the maximum length of the message that can be received.
 
+ * If xBufferLengthBytes is too small to hold the next message then the message
 
+ * will be left in the message buffer and 0 will be returned.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time the task should remain in the
 
+ * Blocked state to wait for a message, should the message buffer be empty.
 
+ * xMessageBufferReceive() will return immediately if xTicksToWait is zero and
 
+ * the message buffer is empty.  The block time is specified in tick periods, so
 
+ * the absolute time it represents is dependent on the tick frequency.  The
 
+ * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds
 
+ * into a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will
 
+ * cause the task to wait indefinitely (without timing out), provided
 
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  Tasks do not use any
 
+ * CPU time when they are in the Blocked state.
 
+ *
 
+ * @return The length, in bytes, of the message read from the message buffer, if
 
+ * any.  If xMessageBufferReceive() times out before a message became available
 
+ * then zero is returned.  If the length of the message is greater than
 
+ * xBufferLengthBytes then the message will be left in the message buffer and
 
+ * zero is returned.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ * void vAFunction( MessageBuffer_t xMessageBuffer )
 
+ * {
 
+ * uint8_t ucRxData[ 20 ];
 
+ * size_t xReceivedBytes;
 
+ * const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
 
+ *
 
+ *  // Receive the next message from the message buffer.  Wait in the Blocked
 
+ *  // state (so not using any CPU processing time) for a maximum of 100ms for
 
+ *  // a message to become available.
 
+ *  xReceivedBytes = xMessageBufferReceive( xMessageBuffer,
 
+ *                                          ( void * ) ucRxData,
 
+ *                                          sizeof( ucRxData ),
 
+ *                                          xBlockTime );
 
+ *
 
+ *  if( xReceivedBytes > 0 )
 
+ *  {
 
+ *      // A ucRxData contains a message that is xReceivedBytes long.  Process
 
+ *      // the message here....
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xMessageBufferReceive xMessageBufferReceive
 
+ * \ingroup MessageBufferManagement
 
+ */
 
+#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) \
 
+    xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
 
+
 
+
 
+/**
 
+ * message_buffer.h
 
+ *
 
+ * <pre>
 
+ * size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
 
+ *                                   void *pvRxData,
 
+ *                                   size_t xBufferLengthBytes,
 
+ *                                   BaseType_t *pxHigherPriorityTaskWoken );
 
+ * </pre>
 
+ *
 
+ * An interrupt safe version of the API function that receives a discrete
 
+ * message from a message buffer.  Messages can be of variable length and are
 
+ * copied out of the buffer.
 
+ *
 
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
 
+ * implementation (so also the message buffer implementation, as message buffers
 
+ * are built on top of stream buffers) assumes there is only one task or
 
+ * interrupt that will write to the buffer (the writer), and only one task or
 
+ * interrupt that will read from the buffer (the reader).  It is safe for the
 
+ * writer and reader to be different tasks or interrupts, but, unlike other
 
+ * FreeRTOS objects, it is not safe to have multiple different writers or
 
+ * multiple different readers.  If there are to be multiple different writers
 
+ * then the application writer must place each call to a writing API function
 
+ * (such as xMessageBufferSend()) inside a critical section and set the send
 
+ * block time to 0.  Likewise, if there are to be multiple different readers
 
+ * then the application writer must place each call to a reading API function
 
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
 
+ * block time to 0.
 
+ *
 
+ * Use xMessageBufferReceive() to read from a message buffer from a task.  Use
 
+ * xMessageBufferReceiveFromISR() to read from a message buffer from an
 
+ * interrupt service routine (ISR).
 
+ *
 
+ * @param xMessageBuffer The handle of the message buffer from which a message
 
+ * is being received.
 
+ *
 
+ * @param pvRxData A pointer to the buffer into which the received message is
 
+ * to be copied.
 
+ *
 
+ * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData
 
+ * parameter.  This sets the maximum length of the message that can be received.
 
+ * If xBufferLengthBytes is too small to hold the next message then the message
 
+ * will be left in the message buffer and 0 will be returned.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken  It is possible that a message buffer will
 
+ * have a task blocked on it waiting for space to become available.  Calling
 
+ * xMessageBufferReceiveFromISR() can make space available, and so cause a task
 
+ * that is waiting for space to leave the Blocked state.  If calling
 
+ * xMessageBufferReceiveFromISR() causes a task to leave the Blocked state, and
 
+ * the unblocked task has a priority higher than the currently executing task
 
+ * (the task that was interrupted), then, internally,
 
+ * xMessageBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE.
 
+ * If xMessageBufferReceiveFromISR() sets this value to pdTRUE, then normally a
 
+ * context switch should be performed before the interrupt is exited.  That will
 
+ * ensure the interrupt returns directly to the highest priority Ready state
 
+ * task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it is
 
+ * passed into the function.  See the code example below for an example.
 
+ *
 
+ * @return The length, in bytes, of the message read from the message buffer, if
 
+ * any.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ * // A message buffer that has already been created.
 
+ * MessageBuffer_t xMessageBuffer;
 
+ *
 
+ * void vAnInterruptServiceRoutine( void )
 
+ * {
 
+ * uint8_t ucRxData[ 20 ];
 
+ * size_t xReceivedBytes;
 
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
 
+ *
 
+ *  // Receive the next message from the message buffer.
 
+ *  xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer,
 
+ *                                                ( void * ) ucRxData,
 
+ *                                                sizeof( ucRxData ),
 
+ *                                                &xHigherPriorityTaskWoken );
 
+ *
 
+ *  if( xReceivedBytes > 0 )
 
+ *  {
 
+ *      // A ucRxData contains a message that is xReceivedBytes long.  Process
 
+ *      // the message here....
 
+ *  }
 
+ *
 
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
 
+ *  // xMessageBufferReceiveFromISR() then a task that has a priority above the
 
+ *  // priority of the currently executing task was unblocked and a context
 
+ *  // switch should be performed to ensure the ISR returns to the unblocked
 
+ *  // task.  In most FreeRTOS ports this is done by simply passing
 
+ *  // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
 
+ *  // variables value, and perform the context switch if necessary.  Check the
 
+ *  // documentation for the port in use for port specific instructions.
 
+ *  portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
 
+ * }
 
+ * </pre>
 
+ * \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR
 
+ * \ingroup MessageBufferManagement
 
+ */
 
+#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) \
 
+    xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
 
+
 
+/**
 
+ * message_buffer.h
 
+ *
 
+ * <pre>
 
+ * void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );
 
+ * </pre>
 
+ *
 
+ * Deletes a message buffer that was previously created using a call to
 
+ * xMessageBufferCreate() or xMessageBufferCreateStatic().  If the message
 
+ * buffer was created using dynamic memory (that is, by xMessageBufferCreate()),
 
+ * then the allocated memory is freed.
 
+ *
 
+ * A message buffer handle must not be used after the message buffer has been
 
+ * deleted.
 
+ *
 
+ * @param xMessageBuffer The handle of the message buffer to be deleted.
 
+ *
 
+ */
 
+#define vMessageBufferDelete( xMessageBuffer ) \
 
+    vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
 
+
 
+/**
 
+ * message_buffer.h
 
+ * <pre>
 
+ * BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer );
 
+ * </pre>
 
+ *
 
+ * Tests to see if a message buffer is full.  A message buffer is full if it
 
+ * cannot accept any more messages, of any size, until space is made available
 
+ * by a message being removed from the message buffer.
 
+ *
 
+ * @param xMessageBuffer The handle of the message buffer being queried.
 
+ *
 
+ * @return If the message buffer referenced by xMessageBuffer is full then
 
+ * pdTRUE is returned.  Otherwise pdFALSE is returned.
 
+ */
 
+#define xMessageBufferIsFull( xMessageBuffer ) \
 
+    xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
 
+
 
+/**
 
+ * message_buffer.h
 
+ * <pre>
 
+ * BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer );
 
+ * </pre>
 
+ *
 
+ * Tests to see if a message buffer is empty (does not contain any messages).
 
+ *
 
+ * @param xMessageBuffer The handle of the message buffer being queried.
 
+ *
 
+ * @return If the message buffer referenced by xMessageBuffer is empty then
 
+ * pdTRUE is returned.  Otherwise pdFALSE is returned.
 
+ *
 
+ */
 
+#define xMessageBufferIsEmpty( xMessageBuffer ) \
 
+    xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
 
+
 
+/**
 
+ * message_buffer.h
 
+ * <pre>
 
+ * BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
 
+ * </pre>
 
+ *
 
+ * Resets a message buffer to its initial empty state, discarding any message it
 
+ * contained.
 
+ *
 
+ * A message buffer can only be reset if there are no tasks blocked on it.
 
+ *
 
+ * @param xMessageBuffer The handle of the message buffer being reset.
 
+ *
 
+ * @return If the message buffer was reset then pdPASS is returned.  If the
 
+ * message buffer could not be reset because either there was a task blocked on
 
+ * the message queue to wait for space to become available, or to wait for a
 
+ * a message to be available, then pdFAIL is returned.
 
+ *
 
+ * \defgroup xMessageBufferReset xMessageBufferReset
 
+ * \ingroup MessageBufferManagement
 
+ */
 
+#define xMessageBufferReset( xMessageBuffer ) \
 
+    xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
 
+
 
+
 
+/**
 
+ * message_buffer.h
 
+ * <pre>
 
+ * size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer );
 
+ * </pre>
 
+ * Returns the number of bytes of free space in the message buffer.
 
+ *
 
+ * @param xMessageBuffer The handle of the message buffer being queried.
 
+ *
 
+ * @return The number of bytes that can be written to the message buffer before
 
+ * the message buffer would be full.  When a message is written to the message
 
+ * buffer an additional sizeof( size_t ) bytes are also written to store the
 
+ * message's length.  sizeof( size_t ) is typically 4 bytes on a 32-bit
 
+ * architecture, so if xMessageBufferSpacesAvailable() returns 10, then the size
 
+ * of the largest message that can be written to the message buffer is 6 bytes.
 
+ *
 
+ * \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable
 
+ * \ingroup MessageBufferManagement
 
+ */
 
+#define xMessageBufferSpaceAvailable( xMessageBuffer ) \
 
+    xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
 
+#define xMessageBufferSpacesAvailable( xMessageBuffer ) \
 
+    xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
 
+
 
+/**
 
+ * message_buffer.h
 
+ * <pre>
 
+ * size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer );
 
+ * </pre>
 
+ * Returns the length (in bytes) of the next message in a message buffer.
 
+ * Useful if xMessageBufferReceive() returned 0 because the size of the buffer
 
+ * passed into xMessageBufferReceive() was too small to hold the next message.
 
+ *
 
+ * @param xMessageBuffer The handle of the message buffer being queried.
 
+ *
 
+ * @return The length (in bytes) of the next message in the message buffer, or 0
 
+ * if the message buffer is empty.
 
+ *
 
+ * \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes
 
+ * \ingroup MessageBufferManagement
 
+ */
 
+#define xMessageBufferNextLengthBytes( xMessageBuffer ) \
 
+    xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * message_buffer.h
 
+ *
 
+ * <pre>
 
+ * BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
 
+ * </pre>
 
+ *
 
+ * For advanced users only.
 
+ *
 
+ * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when
 
+ * data is sent to a message buffer or stream buffer.  If there was a task that
 
+ * was blocked on the message or stream buffer waiting for data to arrive then
 
+ * the sbSEND_COMPLETED() macro sends a notification to the task to remove it
 
+ * from the Blocked state.  xMessageBufferSendCompletedFromISR() does the same
 
+ * thing.  It is provided to enable application writers to implement their own
 
+ * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME.
 
+ *
 
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
 
+ * additional information.
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer to which data was
 
+ * written.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
 
+ * initialised to pdFALSE before it is passed into
 
+ * xMessageBufferSendCompletedFromISR().  If calling
 
+ * xMessageBufferSendCompletedFromISR() removes a task from the Blocked state,
 
+ * and the task has a priority above the priority of the currently running task,
 
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
 
+ * context switch should be performed before exiting the ISR.
 
+ *
 
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
 
+ * Otherwise pdFALSE is returned.
 
+ *
 
+ * \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
 
+    xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
 
+
 
+/**
 
+ * message_buffer.h
 
+ *
 
+ * <pre>
 
+ * BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
 
+ * </pre>
 
+ *
 
+ * For advanced users only.
 
+ *
 
+ * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when
 
+ * data is read out of a message buffer or stream buffer.  If there was a task
 
+ * that was blocked on the message or stream buffer waiting for data to arrive
 
+ * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to
 
+ * remove it from the Blocked state.  xMessageBufferReceiveCompletedFromISR()
 
+ * does the same thing.  It is provided to enable application writers to
 
+ * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT
 
+ * ANY OTHER TIME.
 
+ *
 
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
 
+ * additional information.
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer from which data was
 
+ * read.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
 
+ * initialised to pdFALSE before it is passed into
 
+ * xMessageBufferReceiveCompletedFromISR().  If calling
 
+ * xMessageBufferReceiveCompletedFromISR() removes a task from the Blocked state,
 
+ * and the task has a priority above the priority of the currently running task,
 
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
 
+ * context switch should be performed before exiting the ISR.
 
+ *
 
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
 
+ * Otherwise pdFALSE is returned.
 
+ *
 
+ * \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
 
+    xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
 
+
 
+/* *INDENT-OFF* */
 
+#if defined( __cplusplus )
 
+    } /* extern "C" */
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#endif /* !defined( FREERTOS_MESSAGE_BUFFER_H ) */

+ 259 - 0
FreeRTOS/Source/include/mpu_prototypes.h
Vedi File 

@@ -0,0 +1,259 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/*
 
+ * When the MPU is used the standard (non MPU) API functions are mapped to
 
+ * equivalents that start "MPU_", the prototypes for which are defined in this
 
+ * header files.  This will cause the application code to call the MPU_ version
 
+ * which wraps the non-MPU version with privilege promoting then demoting code,
 
+ * so the kernel code always runs will full privileges.
 
+ */
 
+
 
+
 
+#ifndef MPU_PROTOTYPES_H
 
+#define MPU_PROTOTYPES_H
 
+
 
+/* MPU versions of tasks.h API functions. */
 
+BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
 
+                            const char * const pcName,
 
+                            const uint16_t usStackDepth,
 
+                            void * const pvParameters,
 
+                            UBaseType_t uxPriority,
 
+                            TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
 
+TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
 
+                                    const char * const pcName,
 
+                                    const uint32_t ulStackDepth,
 
+                                    void * const pvParameters,
 
+                                    UBaseType_t uxPriority,
 
+                                    StackType_t * const puxStackBuffer,
 
+                                    StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
 
+                          const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 
+UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 
+eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskGetInfo( TaskHandle_t xTask,
 
+                       TaskStatus_t * pxTaskStatus,
 
+                       BaseType_t xGetFreeStackSpace,
 
+                       eTaskState eState ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskPrioritySet( TaskHandle_t xTask,
 
+                           UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskStartScheduler( void ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskSuspendAll( void ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
 
+TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL;
 
+UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL;
 
+char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) FREERTOS_SYSTEM_CALL;
 
+TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) FREERTOS_SYSTEM_CALL;
 
+UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 
+configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask,
 
+                                     TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL;
 
+TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
 
+                                            BaseType_t xIndex,
 
+                                            void * pvValue ) FREERTOS_SYSTEM_CALL;
 
+void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
 
+                                               BaseType_t xIndex ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
 
+                                             void * pvParameter ) FREERTOS_SYSTEM_CALL;
 
+TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL;
 
+UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
 
+                                      const UBaseType_t uxArraySize,
 
+                                      uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
 
+uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify,
 
+                                   UBaseType_t uxIndexToNotify,
 
+                                   uint32_t ulValue,
 
+                                   eNotifyAction eAction,
 
+                                   uint32_t * pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
 
+                                       uint32_t ulBitsToClearOnEntry,
 
+                                       uint32_t ulBitsToClearOnExit,
 
+                                       uint32_t * pulNotificationValue,
 
+                                       TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
 
+                                      BaseType_t xClearCountOnExit,
 
+                                      TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask,
 
+                                             UBaseType_t uxIndexToClear ) FREERTOS_SYSTEM_CALL;
 
+uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
 
+                                            UBaseType_t uxIndexToClear,
 
+                                            uint32_t ulBitsToClear ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskIncrementTick( void ) FREERTOS_SYSTEM_CALL;
 
+TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
 
+                                     TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTaskMissedYield( void ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL;
 
+
 
+/* MPU versions of queue.h API functions. */
 
+BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue,
 
+                                  const void * const pvItemToQueue,
 
+                                  TickType_t xTicksToWait,
 
+                                  const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue,
 
+                              void * const pvBuffer,
 
+                              TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue,
 
+                           void * const pvBuffer,
 
+                           TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue,
 
+                                    TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 
+UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 
+QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
 
+QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
 
+                                           StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
 
+QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
 
+                                                 const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL;
 
+QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
 
+                                                       const UBaseType_t uxInitialCount,
 
+                                                       StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
 
+TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex,
 
+                                         TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vQueueAddToRegistry( QueueHandle_t xQueue,
 
+                              const char * pcName ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 
+const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 
+QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
 
+                                       const UBaseType_t uxItemSize,
 
+                                       const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
 
+QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
 
+                                             const UBaseType_t uxItemSize,
 
+                                             uint8_t * pucQueueStorage,
 
+                                             StaticQueue_t * pxStaticQueue,
 
+                                             const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
 
+QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
 
+                               QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
 
+                                    QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
 
+QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
 
+                                                const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
 
+                                   BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue,
 
+                               UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
 
+UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 
+uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 
+
 
+/* MPU versions of timers.h API functions. */
 
+TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
 
+                                const TickType_t xTimerPeriodInTicks,
 
+                                const UBaseType_t uxAutoReload,
 
+                                void * const pvTimerID,
 
+                                TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL;
 
+TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName,
 
+                                      const TickType_t xTimerPeriodInTicks,
 
+                                      const UBaseType_t uxAutoReload,
 
+                                      void * const pvTimerID,
 
+                                      TimerCallbackFunction_t pxCallbackFunction,
 
+                                      StaticTimer_t * pxTimerBuffer ) FREERTOS_SYSTEM_CALL;
 
+void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTimerSetTimerID( TimerHandle_t xTimer,
 
+                           void * pvNewID ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 
+TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
 
+                                       void * pvParameter1,
 
+                                       uint32_t ulParameter2,
 
+                                       TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
 
+                              const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
 
+UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 
+TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 
+TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTimerCreateTimerTask( void ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer,
 
+                                     const BaseType_t xCommandID,
 
+                                     const TickType_t xOptionalValue,
 
+                                     BaseType_t * const pxHigherPriorityTaskWoken,
 
+                                     const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+
 
+/* MPU versions of event_group.h API functions. */
 
+EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
 
+EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
 
+EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
 
+                                     const EventBits_t uxBitsToWaitFor,
 
+                                     const BaseType_t xClearOnExit,
 
+                                     const BaseType_t xWaitForAllBits,
 
+                                     TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup,
 
+                                      const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
 
+EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup,
 
+                                    const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL;
 
+EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup,
 
+                                 const EventBits_t uxBitsToSet,
 
+                                 const EventBits_t uxBitsToWaitFor,
 
+                                 TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL;
 
+UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL;
 
+
 
+/* MPU versions of message/stream_buffer.h API functions. */
 
+size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
 
+                              const void * pvTxData,
 
+                              size_t xDataLengthBytes,
 
+                              TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
 
+                                 void * pvRxData,
 
+                                 size_t xBufferLengthBytes,
 
+                                 TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
 
+size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 
+void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 
+size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 
+size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
 
+BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
 
+                                             size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL;
 
+StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
 
+                                                     size_t xTriggerLevelBytes,
 
+                                                     BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL;
 
+StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
 
+                                                           size_t xTriggerLevelBytes,
 
+                                                           BaseType_t xIsMessageBuffer,
 
+                                                           uint8_t * const pucStreamBufferStorageArea,
 
+                                                           StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL;
 
+
 
+
 
+
 
+#endif /* MPU_PROTOTYPES_H */

+ 186 - 0
FreeRTOS/Source/include/mpu_wrappers.h
Vedi File 

@@ -0,0 +1,186 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#ifndef MPU_WRAPPERS_H
 
+#define MPU_WRAPPERS_H
 
+
 
+/* This file redefines API functions to be called through a wrapper macro, but
 
+ * only for ports that are using the MPU. */
 
+#if ( portUSING_MPU_WRAPPERS == 1 )
 
+
 
+/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
 
+ * included from queue.c or task.c to prevent it from having an effect within
 
+ * those files. */
 
+    #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
+
 
+/*
 
+ * Map standard (non MPU) API functions to equivalents that start
 
+ * "MPU_".  This will cause the application code to call the MPU_
 
+ * version, which wraps the non-MPU version with privilege promoting
 
+ * then demoting code, so the kernel code always runs will full
 
+ * privileges.
 
+ */
 
+
 
+/* Map standard tasks.h API functions to the MPU equivalents. */
 
+        #define xTaskCreate                            MPU_xTaskCreate
 
+        #define xTaskCreateStatic                      MPU_xTaskCreateStatic
 
+        #define vTaskDelete                            MPU_vTaskDelete
 
+        #define vTaskDelay                             MPU_vTaskDelay
 
+        #define xTaskDelayUntil                        MPU_xTaskDelayUntil
 
+        #define xTaskAbortDelay                        MPU_xTaskAbortDelay
 
+        #define uxTaskPriorityGet                      MPU_uxTaskPriorityGet
 
+        #define eTaskGetState                          MPU_eTaskGetState
 
+        #define vTaskGetInfo                           MPU_vTaskGetInfo
 
+        #define vTaskPrioritySet                       MPU_vTaskPrioritySet
 
+        #define vTaskSuspend                           MPU_vTaskSuspend
 
+        #define vTaskResume                            MPU_vTaskResume
 
+        #define vTaskSuspendAll                        MPU_vTaskSuspendAll
 
+        #define xTaskResumeAll                         MPU_xTaskResumeAll
 
+        #define xTaskGetTickCount                      MPU_xTaskGetTickCount
 
+        #define uxTaskGetNumberOfTasks                 MPU_uxTaskGetNumberOfTasks
 
+        #define pcTaskGetName                          MPU_pcTaskGetName
 
+        #define xTaskGetHandle                         MPU_xTaskGetHandle
 
+        #define uxTaskGetStackHighWaterMark            MPU_uxTaskGetStackHighWaterMark
 
+        #define uxTaskGetStackHighWaterMark2           MPU_uxTaskGetStackHighWaterMark2
 
+        #define vTaskSetApplicationTaskTag             MPU_vTaskSetApplicationTaskTag
 
+        #define xTaskGetApplicationTaskTag             MPU_xTaskGetApplicationTaskTag
 
+        #define vTaskSetThreadLocalStoragePointer      MPU_vTaskSetThreadLocalStoragePointer
 
+        #define pvTaskGetThreadLocalStoragePointer     MPU_pvTaskGetThreadLocalStoragePointer
 
+        #define xTaskCallApplicationTaskHook           MPU_xTaskCallApplicationTaskHook
 
+        #define xTaskGetIdleTaskHandle                 MPU_xTaskGetIdleTaskHandle
 
+        #define uxTaskGetSystemState                   MPU_uxTaskGetSystemState
 
+        #define vTaskList                              MPU_vTaskList
 
+        #define vTaskGetRunTimeStats                   MPU_vTaskGetRunTimeStats
 
+        #define ulTaskGetIdleRunTimeCounter            MPU_ulTaskGetIdleRunTimeCounter
 
+        #define xTaskGenericNotify                     MPU_xTaskGenericNotify
 
+        #define xTaskGenericNotifyWait                 MPU_xTaskGenericNotifyWait
 
+        #define ulTaskGenericNotifyTake                MPU_ulTaskGenericNotifyTake
 
+        #define xTaskGenericNotifyStateClear           MPU_xTaskGenericNotifyStateClear
 
+        #define ulTaskGenericNotifyValueClear          MPU_ulTaskGenericNotifyValueClear
 
+        #define xTaskCatchUpTicks                      MPU_xTaskCatchUpTicks
 
+
 
+        #define xTaskGetCurrentTaskHandle              MPU_xTaskGetCurrentTaskHandle
 
+        #define vTaskSetTimeOutState                   MPU_vTaskSetTimeOutState
 
+        #define xTaskCheckForTimeOut                   MPU_xTaskCheckForTimeOut
 
+        #define xTaskGetSchedulerState                 MPU_xTaskGetSchedulerState
 
+
 
+/* Map standard queue.h API functions to the MPU equivalents. */
 
+        #define xQueueGenericSend                      MPU_xQueueGenericSend
 
+        #define xQueueReceive                          MPU_xQueueReceive
 
+        #define xQueuePeek                             MPU_xQueuePeek
 
+        #define xQueueSemaphoreTake                    MPU_xQueueSemaphoreTake
 
+        #define uxQueueMessagesWaiting                 MPU_uxQueueMessagesWaiting
 
+        #define uxQueueSpacesAvailable                 MPU_uxQueueSpacesAvailable
 
+        #define vQueueDelete                           MPU_vQueueDelete
 
+        #define xQueueCreateMutex                      MPU_xQueueCreateMutex
 
+        #define xQueueCreateMutexStatic                MPU_xQueueCreateMutexStatic
 
+        #define xQueueCreateCountingSemaphore          MPU_xQueueCreateCountingSemaphore
 
+        #define xQueueCreateCountingSemaphoreStatic    MPU_xQueueCreateCountingSemaphoreStatic
 
+        #define xQueueGetMutexHolder                   MPU_xQueueGetMutexHolder
 
+        #define xQueueTakeMutexRecursive               MPU_xQueueTakeMutexRecursive
 
+        #define xQueueGiveMutexRecursive               MPU_xQueueGiveMutexRecursive
 
+        #define xQueueGenericCreate                    MPU_xQueueGenericCreate
 
+        #define xQueueGenericCreateStatic              MPU_xQueueGenericCreateStatic
 
+        #define xQueueCreateSet                        MPU_xQueueCreateSet
 
+        #define xQueueAddToSet                         MPU_xQueueAddToSet
 
+        #define xQueueRemoveFromSet                    MPU_xQueueRemoveFromSet
 
+        #define xQueueSelectFromSet                    MPU_xQueueSelectFromSet
 
+        #define xQueueGenericReset                     MPU_xQueueGenericReset
 
+
 
+        #if ( configQUEUE_REGISTRY_SIZE > 0 )
 
+            #define vQueueAddToRegistry                MPU_vQueueAddToRegistry
 
+            #define vQueueUnregisterQueue              MPU_vQueueUnregisterQueue
 
+            #define pcQueueGetName                     MPU_pcQueueGetName
 
+        #endif
 
+
 
+/* Map standard timer.h API functions to the MPU equivalents. */
 
+        #define xTimerCreate                           MPU_xTimerCreate
 
+        #define xTimerCreateStatic                     MPU_xTimerCreateStatic
 
+        #define pvTimerGetTimerID                      MPU_pvTimerGetTimerID
 
+        #define vTimerSetTimerID                       MPU_vTimerSetTimerID
 
+        #define xTimerIsTimerActive                    MPU_xTimerIsTimerActive
 
+        #define xTimerGetTimerDaemonTaskHandle         MPU_xTimerGetTimerDaemonTaskHandle
 
+        #define xTimerPendFunctionCall                 MPU_xTimerPendFunctionCall
 
+        #define pcTimerGetName                         MPU_pcTimerGetName
 
+        #define vTimerSetReloadMode                    MPU_vTimerSetReloadMode
 
+        #define uxTimerGetReloadMode                   MPU_uxTimerGetReloadMode
 
+        #define xTimerGetPeriod                        MPU_xTimerGetPeriod
 
+        #define xTimerGetExpiryTime                    MPU_xTimerGetExpiryTime
 
+        #define xTimerGenericCommand                   MPU_xTimerGenericCommand
 
+
 
+/* Map standard event_group.h API functions to the MPU equivalents. */
 
+        #define xEventGroupCreate                      MPU_xEventGroupCreate
 
+        #define xEventGroupCreateStatic                MPU_xEventGroupCreateStatic
 
+        #define xEventGroupWaitBits                    MPU_xEventGroupWaitBits
 
+        #define xEventGroupClearBits                   MPU_xEventGroupClearBits
 
+        #define xEventGroupSetBits                     MPU_xEventGroupSetBits
 
+        #define xEventGroupSync                        MPU_xEventGroupSync
 
+        #define vEventGroupDelete                      MPU_vEventGroupDelete
 
+
 
+/* Map standard message/stream_buffer.h API functions to the MPU
 
+ * equivalents. */
 
+        #define xStreamBufferSend                      MPU_xStreamBufferSend
 
+        #define xStreamBufferReceive                   MPU_xStreamBufferReceive
 
+        #define xStreamBufferNextMessageLengthBytes    MPU_xStreamBufferNextMessageLengthBytes
 
+        #define vStreamBufferDelete                    MPU_vStreamBufferDelete
 
+        #define xStreamBufferIsFull                    MPU_xStreamBufferIsFull
 
+        #define xStreamBufferIsEmpty                   MPU_xStreamBufferIsEmpty
 
+        #define xStreamBufferReset                     MPU_xStreamBufferReset
 
+        #define xStreamBufferSpacesAvailable           MPU_xStreamBufferSpacesAvailable
 
+        #define xStreamBufferBytesAvailable            MPU_xStreamBufferBytesAvailable
 
+        #define xStreamBufferSetTriggerLevel           MPU_xStreamBufferSetTriggerLevel
 
+        #define xStreamBufferGenericCreate             MPU_xStreamBufferGenericCreate
 
+        #define xStreamBufferGenericCreateStatic       MPU_xStreamBufferGenericCreateStatic
 
+
 
+
 
+/* Remove the privileged function macro, but keep the PRIVILEGED_DATA
 
+ * macro so applications can place data in privileged access sections
 
+ * (useful when using statically allocated objects). */
 
+        #define PRIVILEGED_FUNCTION
 
+        #define PRIVILEGED_DATA    __attribute__( ( section( "privileged_data" ) ) )
 
+        #define FREERTOS_SYSTEM_CALL
 
+
 
+    #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
 
+
 
+/* Ensure API functions go in the privileged execution section. */
 
+        #define PRIVILEGED_FUNCTION     __attribute__( ( section( "privileged_functions" ) ) )
 
+        #define PRIVILEGED_DATA         __attribute__( ( section( "privileged_data" ) ) )
 
+        #define FREERTOS_SYSTEM_CALL    __attribute__( ( section( "freertos_system_calls" ) ) )
 
+
 
+    #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
 
+
 
+#else /* portUSING_MPU_WRAPPERS */
 
+
 
+    #define PRIVILEGED_FUNCTION
 
+    #define PRIVILEGED_DATA
 
+    #define FREERTOS_SYSTEM_CALL
 
+
 
+#endif /* portUSING_MPU_WRAPPERS */
 
+
 
+
 
+#endif /* MPU_WRAPPERS_H */

+ 223 - 0
FreeRTOS/Source/include/portable.h
Vedi File 

@@ -0,0 +1,223 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/*-----------------------------------------------------------
 
+* Portable layer API.  Each function must be defined for each port.
 
+*----------------------------------------------------------*/
 
+
 
+#ifndef PORTABLE_H
 
+#define PORTABLE_H
 
+
 
+/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
 
+ * pre-processor definition was used to ensure the pre-processor found the correct
 
+ * portmacro.h file for the port being used.  That scheme was deprecated in favour
 
+ * of setting the compiler's include path such that it found the correct
 
+ * portmacro.h file - removing the need for the constant and allowing the
 
+ * portmacro.h file to be located anywhere in relation to the port being used.
 
+ * Purely for reasons of backward compatibility the old method is still valid, but
 
+ * to make it clear that new projects should not use it, support for the port
 
+ * specific constants has been moved into the deprecated_definitions.h header
 
+ * file. */
 
+#include "deprecated_definitions.h"
 
+
 
+/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h
 
+ * did not result in a portmacro.h header file being included - and it should be
 
+ * included here.  In this case the path to the correct portmacro.h header file
 
+ * must be set in the compiler's include path. */
 
+#ifndef portENTER_CRITICAL
 
+    #include "portmacro.h"
 
+#endif
 
+
 
+#if portBYTE_ALIGNMENT == 32
 
+    #define portBYTE_ALIGNMENT_MASK    ( 0x001f )
 
+#elif portBYTE_ALIGNMENT == 16
 
+    #define portBYTE_ALIGNMENT_MASK    ( 0x000f )
 
+#elif portBYTE_ALIGNMENT == 8
 
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0007 )
 
+#elif portBYTE_ALIGNMENT == 4
 
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0003 )
 
+#elif portBYTE_ALIGNMENT == 2
 
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0001 )
 
+#elif portBYTE_ALIGNMENT == 1
 
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0000 )
 
+#else
 
+    #error "Invalid portBYTE_ALIGNMENT definition"
 
+#endif
 
+
 
+#ifndef portUSING_MPU_WRAPPERS
 
+    #define portUSING_MPU_WRAPPERS 0
 
+#endif
 
+
 
+#ifndef portNUM_CONFIGURABLE_REGIONS
 
+    #define portNUM_CONFIGURABLE_REGIONS    1
 
+#endif
 
+
 
+#ifndef portHAS_STACK_OVERFLOW_CHECKING
 
+    #define portHAS_STACK_OVERFLOW_CHECKING    0
 
+#endif
 
+
 
+#ifndef portARCH_NAME
 
+    #define portARCH_NAME    NULL
 
+#endif
 
+
 
+#ifndef configSTACK_ALLOCATION_FROM_SEPARATE_HEAP
 
+    /* Defaults to 0 for backward compatibility. */
 
+    #define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
 
+#endif
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#include "mpu_wrappers.h"
 
+
 
+/*
 
+ * Setup the stack of a new task so it is ready to be placed under the
 
+ * scheduler control.  The registers have to be placed on the stack in
 
+ * the order that the port expects to find them.
 
+ *
 
+ */
 
+#if ( portUSING_MPU_WRAPPERS == 1 )
 
+    #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
 
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 
+                                             StackType_t * pxEndOfStack,
 
+                                             TaskFunction_t pxCode,
 
+                                             void * pvParameters,
 
+                                             BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
 
+    #else
 
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 
+                                             TaskFunction_t pxCode,
 
+                                             void * pvParameters,
 
+                                             BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
 
+    #endif
 
+#else /* if ( portUSING_MPU_WRAPPERS == 1 ) */
 
+    #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
 
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 
+                                             StackType_t * pxEndOfStack,
 
+                                             TaskFunction_t pxCode,
 
+                                             void * pvParameters ) PRIVILEGED_FUNCTION;
 
+    #else
 
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 
+                                             TaskFunction_t pxCode,
 
+                                             void * pvParameters ) PRIVILEGED_FUNCTION;
 
+    #endif
 
+#endif /* if ( portUSING_MPU_WRAPPERS == 1 ) */
 
+
 
+/* Used by heap_5.c to define the start address and size of each memory region
 
+ * that together comprise the total FreeRTOS heap space. */
 
+typedef struct HeapRegion
 
+{
 
+    uint8_t * pucStartAddress;
 
+    size_t xSizeInBytes;
 
+} HeapRegion_t;
 
+
 
+/* Used to pass information about the heap out of vPortGetHeapStats(). */
 
+typedef struct xHeapStats
 
+{
 
+    size_t xAvailableHeapSpaceInBytes;          /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
 
+    size_t xSizeOfLargestFreeBlockInBytes;      /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
 
+    size_t xSizeOfSmallestFreeBlockInBytes;     /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
 
+    size_t xNumberOfFreeBlocks;                 /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
 
+    size_t xMinimumEverFreeBytesRemaining;      /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
 
+    size_t xNumberOfSuccessfulAllocations;      /* The number of calls to pvPortMalloc() that have returned a valid memory block. */
 
+    size_t xNumberOfSuccessfulFrees;            /* The number of calls to vPortFree() that has successfully freed a block of memory. */
 
+} HeapStats_t;
 
+
 
+/*
 
+ * Used to define multiple heap regions for use by heap_5.c.  This function
 
+ * must be called before any calls to pvPortMalloc() - not creating a task,
 
+ * queue, semaphore, mutex, software timer, event group, etc. will result in
 
+ * pvPortMalloc being called.
 
+ *
 
+ * pxHeapRegions passes in an array of HeapRegion_t structures - each of which
 
+ * defines a region of memory that can be used as the heap.  The array is
 
+ * terminated by a HeapRegions_t structure that has a size of 0.  The region
 
+ * with the lowest start address must appear first in the array.
 
+ */
 
+void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Returns a HeapStats_t structure filled with information about the current
 
+ * heap state.
 
+ */
 
+void vPortGetHeapStats( HeapStats_t * pxHeapStats );
 
+
 
+/*
 
+ * Map to the memory management routines required for the port.
 
+ */
 
+void * pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
 
+void vPortFree( void * pv ) PRIVILEGED_FUNCTION;
 
+void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
 
+size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
 
+size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
 
+
 
+#if( configSTACK_ALLOCATION_FROM_SEPARATE_HEAP == 1 )
 
+    void *pvPortMallocStack( size_t xSize ) PRIVILEGED_FUNCTION;
 
+    void vPortFreeStack( void *pv ) PRIVILEGED_FUNCTION;
 
+#else
 
+    #define pvPortMallocStack pvPortMalloc
 
+    #define vPortFreeStack vPortFree
 
+#endif
 
+
 
+/*
 
+ * Setup the hardware ready for the scheduler to take control.  This generally
 
+ * sets up a tick interrupt and sets timers for the correct tick frequency.
 
+ */
 
+BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so
 
+ * the hardware is left in its original condition after the scheduler stops
 
+ * executing.
 
+ */
 
+void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * The structures and methods of manipulating the MPU are contained within the
 
+ * port layer.
 
+ *
 
+ * Fills the xMPUSettings structure with the memory region information
 
+ * contained in xRegions.
 
+ */
 
+#if ( portUSING_MPU_WRAPPERS == 1 )
 
+    struct xMEMORY_REGION;
 
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
 
+                                    const struct xMEMORY_REGION * const xRegions,
 
+                                    StackType_t * pxBottomOfStack,
 
+                                    uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    }
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#endif /* PORTABLE_H */

+ 122 - 0
FreeRTOS/Source/include/projdefs.h
Vedi File 

@@ -0,0 +1,122 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#ifndef PROJDEFS_H
 
+#define PROJDEFS_H
 
+
 
+/*
 
+ * Defines the prototype to which task functions must conform.  Defined in this
 
+ * file to ensure the type is known before portable.h is included.
 
+ */
 
+typedef void (* TaskFunction_t)( void * );
 
+
 
+/* Converts a time in milliseconds to a time in ticks.  This macro can be
 
+ * overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
 
+ * definition here is not suitable for your application. */
 
+#ifndef pdMS_TO_TICKS
 
+    #define pdMS_TO_TICKS( xTimeInMs )    ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000U ) )
 
+#endif
 
+
 
+#define pdFALSE                                  ( ( BaseType_t ) 0 )
 
+#define pdTRUE                                   ( ( BaseType_t ) 1 )
 
+
 
+#define pdPASS                                   ( pdTRUE )
 
+#define pdFAIL                                   ( pdFALSE )
 
+#define errQUEUE_EMPTY                           ( ( BaseType_t ) 0 )
 
+#define errQUEUE_FULL                            ( ( BaseType_t ) 0 )
 
+
 
+/* FreeRTOS error definitions. */
 
+#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY    ( -1 )
 
+#define errQUEUE_BLOCKED                         ( -4 )
 
+#define errQUEUE_YIELD                           ( -5 )
 
+
 
+/* Macros used for basic data corruption checks. */
 
+#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES
 
+    #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES    0
 
+#endif
 
+
 
+#if ( configUSE_16_BIT_TICKS == 1 )
 
+    #define pdINTEGRITY_CHECK_VALUE    0x5a5a
 
+#else
 
+    #define pdINTEGRITY_CHECK_VALUE    0x5a5a5a5aUL
 
+#endif
 
+
 
+/* The following errno values are used by FreeRTOS+ components, not FreeRTOS
 
+ * itself. */
 
+#define pdFREERTOS_ERRNO_NONE             0   /* No errors */
 
+#define pdFREERTOS_ERRNO_ENOENT           2   /* No such file or directory */
 
+#define pdFREERTOS_ERRNO_EINTR            4   /* Interrupted system call */
 
+#define pdFREERTOS_ERRNO_EIO              5   /* I/O error */
 
+#define pdFREERTOS_ERRNO_ENXIO            6   /* No such device or address */
 
+#define pdFREERTOS_ERRNO_EBADF            9   /* Bad file number */
 
+#define pdFREERTOS_ERRNO_EAGAIN           11  /* No more processes */
 
+#define pdFREERTOS_ERRNO_EWOULDBLOCK      11  /* Operation would block */
 
+#define pdFREERTOS_ERRNO_ENOMEM           12  /* Not enough memory */
 
+#define pdFREERTOS_ERRNO_EACCES           13  /* Permission denied */
 
+#define pdFREERTOS_ERRNO_EFAULT           14  /* Bad address */
 
+#define pdFREERTOS_ERRNO_EBUSY            16  /* Mount device busy */
 
+#define pdFREERTOS_ERRNO_EEXIST           17  /* File exists */
 
+#define pdFREERTOS_ERRNO_EXDEV            18  /* Cross-device link */
 
+#define pdFREERTOS_ERRNO_ENODEV           19  /* No such device */
 
+#define pdFREERTOS_ERRNO_ENOTDIR          20  /* Not a directory */
 
+#define pdFREERTOS_ERRNO_EISDIR           21  /* Is a directory */
 
+#define pdFREERTOS_ERRNO_EINVAL           22  /* Invalid argument */
 
+#define pdFREERTOS_ERRNO_ENOSPC           28  /* No space left on device */
 
+#define pdFREERTOS_ERRNO_ESPIPE           29  /* Illegal seek */
 
+#define pdFREERTOS_ERRNO_EROFS            30  /* Read only file system */
 
+#define pdFREERTOS_ERRNO_EUNATCH          42  /* Protocol driver not attached */
 
+#define pdFREERTOS_ERRNO_EBADE            50  /* Invalid exchange */
 
+#define pdFREERTOS_ERRNO_EFTYPE           79  /* Inappropriate file type or format */
 
+#define pdFREERTOS_ERRNO_ENMFILE          89  /* No more files */
 
+#define pdFREERTOS_ERRNO_ENOTEMPTY        90  /* Directory not empty */
 
+#define pdFREERTOS_ERRNO_ENAMETOOLONG     91  /* File or path name too long */
 
+#define pdFREERTOS_ERRNO_EOPNOTSUPP       95  /* Operation not supported on transport endpoint */
 
+#define pdFREERTOS_ERRNO_ENOBUFS          105 /* No buffer space available */
 
+#define pdFREERTOS_ERRNO_ENOPROTOOPT      109 /* Protocol not available */
 
+#define pdFREERTOS_ERRNO_EADDRINUSE       112 /* Address already in use */
 
+#define pdFREERTOS_ERRNO_ETIMEDOUT        116 /* Connection timed out */
 
+#define pdFREERTOS_ERRNO_EINPROGRESS      119 /* Connection already in progress */
 
+#define pdFREERTOS_ERRNO_EALREADY         120 /* Socket already connected */
 
+#define pdFREERTOS_ERRNO_EADDRNOTAVAIL    125 /* Address not available */
 
+#define pdFREERTOS_ERRNO_EISCONN          127 /* Socket is already connected */
 
+#define pdFREERTOS_ERRNO_ENOTCONN         128 /* Socket is not connected */
 
+#define pdFREERTOS_ERRNO_ENOMEDIUM        135 /* No medium inserted */
 
+#define pdFREERTOS_ERRNO_EILSEQ           138 /* An invalid UTF-16 sequence was encountered. */
 
+#define pdFREERTOS_ERRNO_ECANCELED        140 /* Operation canceled. */
 
+
 
+/* The following endian values are used by FreeRTOS+ components, not FreeRTOS
 
+ * itself. */
 
+#define pdFREERTOS_LITTLE_ENDIAN          0
 
+#define pdFREERTOS_BIG_ENDIAN             1
 
+
 
+/* Re-defining endian values for generic naming. */
 
+#define pdLITTLE_ENDIAN                   pdFREERTOS_LITTLE_ENDIAN
 
+#define pdBIG_ENDIAN                      pdFREERTOS_BIG_ENDIAN
 
+
 
+
 
+#endif /* PROJDEFS_H */

+ 1722 - 0
FreeRTOS/Source/include/queue.h
Vedi File 

@@ -0,0 +1,1722 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+
 
+#ifndef QUEUE_H
 
+#define QUEUE_H
 
+
 
+#ifndef INC_FREERTOS_H
 
+    #error "include FreeRTOS.h" must appear in source files before "include queue.h"
 
+#endif
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#include "task.h"
 
+
 
+/**
 
+ * Type by which queues are referenced.  For example, a call to xQueueCreate()
 
+ * returns an QueueHandle_t variable that can then be used as a parameter to
 
+ * xQueueSend(), xQueueReceive(), etc.
 
+ */
 
+struct QueueDefinition; /* Using old naming convention so as not to break kernel aware debuggers. */
 
+typedef struct QueueDefinition   * QueueHandle_t;
 
+
 
+/**
 
+ * Type by which queue sets are referenced.  For example, a call to
 
+ * xQueueCreateSet() returns an xQueueSet variable that can then be used as a
 
+ * parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc.
 
+ */
 
+typedef struct QueueDefinition   * QueueSetHandle_t;
 
+
 
+/**
 
+ * Queue sets can contain both queues and semaphores, so the
 
+ * QueueSetMemberHandle_t is defined as a type to be used where a parameter or
 
+ * return value can be either an QueueHandle_t or an SemaphoreHandle_t.
 
+ */
 
+typedef struct QueueDefinition   * QueueSetMemberHandle_t;
 
+
 
+/* For internal use only. */
 
+#define queueSEND_TO_BACK                     ( ( BaseType_t ) 0 )
 
+#define queueSEND_TO_FRONT                    ( ( BaseType_t ) 1 )
 
+#define queueOVERWRITE                        ( ( BaseType_t ) 2 )
 
+
 
+/* For internal use only.  These definitions *must* match those in queue.c. */
 
+#define queueQUEUE_TYPE_BASE                  ( ( uint8_t ) 0U )
 
+#define queueQUEUE_TYPE_SET                   ( ( uint8_t ) 0U )
 
+#define queueQUEUE_TYPE_MUTEX                 ( ( uint8_t ) 1U )
 
+#define queueQUEUE_TYPE_COUNTING_SEMAPHORE    ( ( uint8_t ) 2U )
 
+#define queueQUEUE_TYPE_BINARY_SEMAPHORE      ( ( uint8_t ) 3U )
 
+#define queueQUEUE_TYPE_RECURSIVE_MUTEX       ( ( uint8_t ) 4U )
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * QueueHandle_t xQueueCreate(
 
+ *                            UBaseType_t uxQueueLength,
 
+ *                            UBaseType_t uxItemSize
 
+ *                        );
 
+ * </pre>
 
+ *
 
+ * Creates a new queue instance, and returns a handle by which the new queue
 
+ * can be referenced.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, queues use two blocks of
 
+ * memory.  The first block is used to hold the queue's data structures.  The
 
+ * second block is used to hold items placed into the queue.  If a queue is
 
+ * created using xQueueCreate() then both blocks of memory are automatically
 
+ * dynamically allocated inside the xQueueCreate() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a queue is created using
 
+ * xQueueCreateStatic() then the application writer must provide the memory that
 
+ * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to
 
+ * be created without using any dynamic memory allocation.
 
+ *
 
+ * https://www.FreeRTOS.org/Embedded-RTOS-Queues.html
 
+ *
 
+ * @param uxQueueLength The maximum number of items that the queue can contain.
 
+ *
 
+ * @param uxItemSize The number of bytes each item in the queue will require.
 
+ * Items are queued by copy, not by reference, so this is the number of bytes
 
+ * that will be copied for each posted item.  Each item on the queue must be
 
+ * the same size.
 
+ *
 
+ * @return If the queue is successfully create then a handle to the newly
 
+ * created queue is returned.  If the queue cannot be created then 0 is
 
+ * returned.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * struct AMessage
 
+ * {
 
+ *  char ucMessageID;
 
+ *  char ucData[ 20 ];
 
+ * };
 
+ *
 
+ * void vATask( void *pvParameters )
 
+ * {
 
+ * QueueHandle_t xQueue1, xQueue2;
 
+ *
 
+ *  // Create a queue capable of containing 10 uint32_t values.
 
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
 
+ *  if( xQueue1 == 0 )
 
+ *  {
 
+ *      // Queue was not created and must not be used.
 
+ *  }
 
+ *
 
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
 
+ *  // These should be passed by pointer as they contain a lot of data.
 
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
 
+ *  if( xQueue2 == 0 )
 
+ *  {
 
+ *      // Queue was not created and must not be used.
 
+ *  }
 
+ *
 
+ *  // ... Rest of task code.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueueCreate xQueueCreate
 
+ * \ingroup QueueManagement
 
+ */
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+    #define xQueueCreate( uxQueueLength, uxItemSize )    xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) )
 
+#endif
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * QueueHandle_t xQueueCreateStatic(
 
+ *                            UBaseType_t uxQueueLength,
 
+ *                            UBaseType_t uxItemSize,
 
+ *                            uint8_t *pucQueueStorageBuffer,
 
+ *                            StaticQueue_t *pxQueueBuffer
 
+ *                        );
 
+ * </pre>
 
+ *
 
+ * Creates a new queue instance, and returns a handle by which the new queue
 
+ * can be referenced.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, queues use two blocks of
 
+ * memory.  The first block is used to hold the queue's data structures.  The
 
+ * second block is used to hold items placed into the queue.  If a queue is
 
+ * created using xQueueCreate() then both blocks of memory are automatically
 
+ * dynamically allocated inside the xQueueCreate() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a queue is created using
 
+ * xQueueCreateStatic() then the application writer must provide the memory that
 
+ * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to
 
+ * be created without using any dynamic memory allocation.
 
+ *
 
+ * https://www.FreeRTOS.org/Embedded-RTOS-Queues.html
 
+ *
 
+ * @param uxQueueLength The maximum number of items that the queue can contain.
 
+ *
 
+ * @param uxItemSize The number of bytes each item in the queue will require.
 
+ * Items are queued by copy, not by reference, so this is the number of bytes
 
+ * that will be copied for each posted item.  Each item on the queue must be
 
+ * the same size.
 
+ *
 
+ * @param pucQueueStorageBuffer If uxItemSize is not zero then
 
+ * pucQueueStorageBuffer must point to a uint8_t array that is at least large
 
+ * enough to hold the maximum number of items that can be in the queue at any
 
+ * one time - which is ( uxQueueLength * uxItemsSize ) bytes.  If uxItemSize is
 
+ * zero then pucQueueStorageBuffer can be NULL.
 
+ *
 
+ * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which
 
+ * will be used to hold the queue's data structure.
 
+ *
 
+ * @return If the queue is created then a handle to the created queue is
 
+ * returned.  If pxQueueBuffer is NULL then NULL is returned.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * struct AMessage
 
+ * {
 
+ *  char ucMessageID;
 
+ *  char ucData[ 20 ];
 
+ * };
 
+ *
 
+ #define QUEUE_LENGTH 10
 
+ #define ITEM_SIZE sizeof( uint32_t )
 
+ *
 
+ * // xQueueBuffer will hold the queue structure.
 
+ * StaticQueue_t xQueueBuffer;
 
+ *
 
+ * // ucQueueStorage will hold the items posted to the queue.  Must be at least
 
+ * // [(queue length) * ( queue item size)] bytes long.
 
+ * uint8_t ucQueueStorage[ QUEUE_LENGTH * ITEM_SIZE ];
 
+ *
 
+ * void vATask( void *pvParameters )
 
+ * {
 
+ * QueueHandle_t xQueue1;
 
+ *
 
+ *  // Create a queue capable of containing 10 uint32_t values.
 
+ *  xQueue1 = xQueueCreate( QUEUE_LENGTH, // The number of items the queue can hold.
 
+ *                          ITEM_SIZE     // The size of each item in the queue
 
+ *                          &( ucQueueStorage[ 0 ] ), // The buffer that will hold the items in the queue.
 
+ *                          &xQueueBuffer ); // The buffer that will hold the queue structure.
 
+ *
 
+ *  // The queue is guaranteed to be created successfully as no dynamic memory
 
+ *  // allocation is used.  Therefore xQueue1 is now a handle to a valid queue.
 
+ *
 
+ *  // ... Rest of task code.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueueCreateStatic xQueueCreateStatic
 
+ * \ingroup QueueManagement
 
+ */
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+    #define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer )    xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) )
 
+#endif /* configSUPPORT_STATIC_ALLOCATION */
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueSendToToFront(
 
+ *                                 QueueHandle_t    xQueue,
 
+ *                                 const void       *pvItemToQueue,
 
+ *                                 TickType_t       xTicksToWait
 
+ *                             );
 
+ * </pre>
 
+ *
 
+ * Post an item to the front of a queue.  The item is queued by copy, not by
 
+ * reference.  This function must not be called from an interrupt service
 
+ * routine.  See xQueueSendFromISR () for an alternative which may be used
 
+ * in an ISR.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time the task should block
 
+ * waiting for space to become available on the queue, should it already
 
+ * be full.  The call will return immediately if this is set to 0 and the
 
+ * queue is full.  The time is defined in tick periods so the constant
 
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
 
+ *
 
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * struct AMessage
 
+ * {
 
+ *  char ucMessageID;
 
+ *  char ucData[ 20 ];
 
+ * } xMessage;
 
+ *
 
+ * uint32_t ulVar = 10UL;
 
+ *
 
+ * void vATask( void *pvParameters )
 
+ * {
 
+ * QueueHandle_t xQueue1, xQueue2;
 
+ * struct AMessage *pxMessage;
 
+ *
 
+ *  // Create a queue capable of containing 10 uint32_t values.
 
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
 
+ *
 
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
 
+ *  // These should be passed by pointer as they contain a lot of data.
 
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
 
+ *
 
+ *  // ...
 
+ *
 
+ *  if( xQueue1 != 0 )
 
+ *  {
 
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
 
+ *      // available if necessary.
 
+ *      if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
 
+ *      {
 
+ *          // Failed to post the message, even after 10 ticks.
 
+ *      }
 
+ *  }
 
+ *
 
+ *  if( xQueue2 != 0 )
 
+ *  {
 
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
 
+ *      // queue is already full.
 
+ *      pxMessage = & xMessage;
 
+ *      xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
 
+ *  }
 
+ *
 
+ *  // ... Rest of task code.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueueSend xQueueSend
 
+ * \ingroup QueueManagement
 
+ */
 
+#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) \
 
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueSendToBack(
 
+ *                                 QueueHandle_t    xQueue,
 
+ *                                 const void       *pvItemToQueue,
 
+ *                                 TickType_t       xTicksToWait
 
+ *                             );
 
+ * </pre>
 
+ *
 
+ * This is a macro that calls xQueueGenericSend().
 
+ *
 
+ * Post an item to the back of a queue.  The item is queued by copy, not by
 
+ * reference.  This function must not be called from an interrupt service
 
+ * routine.  See xQueueSendFromISR () for an alternative which may be used
 
+ * in an ISR.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time the task should block
 
+ * waiting for space to become available on the queue, should it already
 
+ * be full.  The call will return immediately if this is set to 0 and the queue
 
+ * is full.  The  time is defined in tick periods so the constant
 
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
 
+ *
 
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * struct AMessage
 
+ * {
 
+ *  char ucMessageID;
 
+ *  char ucData[ 20 ];
 
+ * } xMessage;
 
+ *
 
+ * uint32_t ulVar = 10UL;
 
+ *
 
+ * void vATask( void *pvParameters )
 
+ * {
 
+ * QueueHandle_t xQueue1, xQueue2;
 
+ * struct AMessage *pxMessage;
 
+ *
 
+ *  // Create a queue capable of containing 10 uint32_t values.
 
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
 
+ *
 
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
 
+ *  // These should be passed by pointer as they contain a lot of data.
 
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
 
+ *
 
+ *  // ...
 
+ *
 
+ *  if( xQueue1 != 0 )
 
+ *  {
 
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
 
+ *      // available if necessary.
 
+ *      if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
 
+ *      {
 
+ *          // Failed to post the message, even after 10 ticks.
 
+ *      }
 
+ *  }
 
+ *
 
+ *  if( xQueue2 != 0 )
 
+ *  {
 
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
 
+ *      // queue is already full.
 
+ *      pxMessage = & xMessage;
 
+ *      xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
 
+ *  }
 
+ *
 
+ *  // ... Rest of task code.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueueSend xQueueSend
 
+ * \ingroup QueueManagement
 
+ */
 
+#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) \
 
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueSend(
 
+ *                            QueueHandle_t xQueue,
 
+ *                            const void * pvItemToQueue,
 
+ *                            TickType_t xTicksToWait
 
+ *                       );
 
+ * </pre>
 
+ *
 
+ * This is a macro that calls xQueueGenericSend().  It is included for
 
+ * backward compatibility with versions of FreeRTOS.org that did not
 
+ * include the xQueueSendToFront() and xQueueSendToBack() macros.  It is
 
+ * equivalent to xQueueSendToBack().
 
+ *
 
+ * Post an item on a queue.  The item is queued by copy, not by reference.
 
+ * This function must not be called from an interrupt service routine.
 
+ * See xQueueSendFromISR () for an alternative which may be used in an ISR.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time the task should block
 
+ * waiting for space to become available on the queue, should it already
 
+ * be full.  The call will return immediately if this is set to 0 and the
 
+ * queue is full.  The time is defined in tick periods so the constant
 
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
 
+ *
 
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * struct AMessage
 
+ * {
 
+ *  char ucMessageID;
 
+ *  char ucData[ 20 ];
 
+ * } xMessage;
 
+ *
 
+ * uint32_t ulVar = 10UL;
 
+ *
 
+ * void vATask( void *pvParameters )
 
+ * {
 
+ * QueueHandle_t xQueue1, xQueue2;
 
+ * struct AMessage *pxMessage;
 
+ *
 
+ *  // Create a queue capable of containing 10 uint32_t values.
 
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
 
+ *
 
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
 
+ *  // These should be passed by pointer as they contain a lot of data.
 
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
 
+ *
 
+ *  // ...
 
+ *
 
+ *  if( xQueue1 != 0 )
 
+ *  {
 
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
 
+ *      // available if necessary.
 
+ *      if( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
 
+ *      {
 
+ *          // Failed to post the message, even after 10 ticks.
 
+ *      }
 
+ *  }
 
+ *
 
+ *  if( xQueue2 != 0 )
 
+ *  {
 
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
 
+ *      // queue is already full.
 
+ *      pxMessage = & xMessage;
 
+ *      xQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
 
+ *  }
 
+ *
 
+ *  // ... Rest of task code.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueueSend xQueueSend
 
+ * \ingroup QueueManagement
 
+ */
 
+#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) \
 
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueOverwrite(
 
+ *                            QueueHandle_t xQueue,
 
+ *                            const void * pvItemToQueue
 
+ *                       );
 
+ * </pre>
 
+ *
 
+ * Only for use with queues that have a length of one - so the queue is either
 
+ * empty or full.
 
+ *
 
+ * Post an item on a queue.  If the queue is already full then overwrite the
 
+ * value held in the queue.  The item is queued by copy, not by reference.
 
+ *
 
+ * This function must not be called from an interrupt service routine.
 
+ * See xQueueOverwriteFromISR () for an alternative which may be used in an ISR.
 
+ *
 
+ * @param xQueue The handle of the queue to which the data is being sent.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @return xQueueOverwrite() is a macro that calls xQueueGenericSend(), and
 
+ * therefore has the same return values as xQueueSendToFront().  However, pdPASS
 
+ * is the only value that can be returned because xQueueOverwrite() will write
 
+ * to the queue even when the queue is already full.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ *
 
+ * void vFunction( void *pvParameters )
 
+ * {
 
+ * QueueHandle_t xQueue;
 
+ * uint32_t ulVarToSend, ulValReceived;
 
+ *
 
+ *  // Create a queue to hold one uint32_t value.  It is strongly
 
+ *  // recommended *not* to use xQueueOverwrite() on queues that can
 
+ *  // contain more than one value, and doing so will trigger an assertion
 
+ *  // if configASSERT() is defined.
 
+ *  xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
 
+ *
 
+ *  // Write the value 10 to the queue using xQueueOverwrite().
 
+ *  ulVarToSend = 10;
 
+ *  xQueueOverwrite( xQueue, &ulVarToSend );
 
+ *
 
+ *  // Peeking the queue should now return 10, but leave the value 10 in
 
+ *  // the queue.  A block time of zero is used as it is known that the
 
+ *  // queue holds a value.
 
+ *  ulValReceived = 0;
 
+ *  xQueuePeek( xQueue, &ulValReceived, 0 );
 
+ *
 
+ *  if( ulValReceived != 10 )
 
+ *  {
 
+ *      // Error unless the item was removed by a different task.
 
+ *  }
 
+ *
 
+ *  // The queue is still full.  Use xQueueOverwrite() to overwrite the
 
+ *  // value held in the queue with 100.
 
+ *  ulVarToSend = 100;
 
+ *  xQueueOverwrite( xQueue, &ulVarToSend );
 
+ *
 
+ *  // This time read from the queue, leaving the queue empty once more.
 
+ *  // A block time of 0 is used again.
 
+ *  xQueueReceive( xQueue, &ulValReceived, 0 );
 
+ *
 
+ *  // The value read should be the last value written, even though the
 
+ *  // queue was already full when the value was written.
 
+ *  if( ulValReceived != 100 )
 
+ *  {
 
+ *      // Error!
 
+ *  }
 
+ *
 
+ *  // ...
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueueOverwrite xQueueOverwrite
 
+ * \ingroup QueueManagement
 
+ */
 
+#define xQueueOverwrite( xQueue, pvItemToQueue ) \
 
+    xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE )
 
+
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueGenericSend(
 
+ *                                  QueueHandle_t xQueue,
 
+ *                                  const void * pvItemToQueue,
 
+ *                                  TickType_t xTicksToWait
 
+ *                                  BaseType_t xCopyPosition
 
+ *                              );
 
+ * </pre>
 
+ *
 
+ * It is preferred that the macros xQueueSend(), xQueueSendToFront() and
 
+ * xQueueSendToBack() are used in place of calling this function directly.
 
+ *
 
+ * Post an item on a queue.  The item is queued by copy, not by reference.
 
+ * This function must not be called from an interrupt service routine.
 
+ * See xQueueSendFromISR () for an alternative which may be used in an ISR.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time the task should block
 
+ * waiting for space to become available on the queue, should it already
 
+ * be full.  The call will return immediately if this is set to 0 and the
 
+ * queue is full.  The time is defined in tick periods so the constant
 
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
 
+ *
 
+ * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
 
+ * item at the back of the queue, or queueSEND_TO_FRONT to place the item
 
+ * at the front of the queue (for high priority messages).
 
+ *
 
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * struct AMessage
 
+ * {
 
+ *  char ucMessageID;
 
+ *  char ucData[ 20 ];
 
+ * } xMessage;
 
+ *
 
+ * uint32_t ulVar = 10UL;
 
+ *
 
+ * void vATask( void *pvParameters )
 
+ * {
 
+ * QueueHandle_t xQueue1, xQueue2;
 
+ * struct AMessage *pxMessage;
 
+ *
 
+ *  // Create a queue capable of containing 10 uint32_t values.
 
+ *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
 
+ *
 
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
 
+ *  // These should be passed by pointer as they contain a lot of data.
 
+ *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
 
+ *
 
+ *  // ...
 
+ *
 
+ *  if( xQueue1 != 0 )
 
+ *  {
 
+ *      // Send an uint32_t.  Wait for 10 ticks for space to become
 
+ *      // available if necessary.
 
+ *      if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS )
 
+ *      {
 
+ *          // Failed to post the message, even after 10 ticks.
 
+ *      }
 
+ *  }
 
+ *
 
+ *  if( xQueue2 != 0 )
 
+ *  {
 
+ *      // Send a pointer to a struct AMessage object.  Don't block if the
 
+ *      // queue is already full.
 
+ *      pxMessage = & xMessage;
 
+ *      xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK );
 
+ *  }
 
+ *
 
+ *  // ... Rest of task code.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueueSend xQueueSend
 
+ * \ingroup QueueManagement
 
+ */
 
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue,
 
+                              const void * const pvItemToQueue,
 
+                              TickType_t xTicksToWait,
 
+                              const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueuePeek(
 
+ *                           QueueHandle_t xQueue,
 
+ *                           void * const pvBuffer,
 
+ *                           TickType_t xTicksToWait
 
+ *                       );
 
+ * </pre>
 
+ *
 
+ * Receive an item from a queue without removing the item from the queue.
 
+ * The item is received by copy so a buffer of adequate size must be
 
+ * provided.  The number of bytes copied into the buffer was defined when
 
+ * the queue was created.
 
+ *
 
+ * Successfully received items remain on the queue so will be returned again
 
+ * by the next call, or a call to xQueueReceive().
 
+ *
 
+ * This macro must not be used in an interrupt service routine.  See
 
+ * xQueuePeekFromISR() for an alternative that can be called from an interrupt
 
+ * service routine.
 
+ *
 
+ * @param xQueue The handle to the queue from which the item is to be
 
+ * received.
 
+ *
 
+ * @param pvBuffer Pointer to the buffer into which the received item will
 
+ * be copied.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time the task should block
 
+ * waiting for an item to receive should the queue be empty at the time
 
+ * of the call. The time is defined in tick periods so the constant
 
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
 
+ * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue
 
+ * is empty.
 
+ *
 
+ * @return pdTRUE if an item was successfully received from the queue,
 
+ * otherwise pdFALSE.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * struct AMessage
 
+ * {
 
+ *  char ucMessageID;
 
+ *  char ucData[ 20 ];
 
+ * } xMessage;
 
+ *
 
+ * QueueHandle_t xQueue;
 
+ *
 
+ * // Task to create a queue and post a value.
 
+ * void vATask( void *pvParameters )
 
+ * {
 
+ * struct AMessage *pxMessage;
 
+ *
 
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
 
+ *  // These should be passed by pointer as they contain a lot of data.
 
+ *  xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
 
+ *  if( xQueue == 0 )
 
+ *  {
 
+ *      // Failed to create the queue.
 
+ *  }
 
+ *
 
+ *  // ...
 
+ *
 
+ *  // Send a pointer to a struct AMessage object.  Don't block if the
 
+ *  // queue is already full.
 
+ *  pxMessage = & xMessage;
 
+ *  xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
 
+ *
 
+ *  // ... Rest of task code.
 
+ * }
 
+ *
 
+ * // Task to peek the data from the queue.
 
+ * void vADifferentTask( void *pvParameters )
 
+ * {
 
+ * struct AMessage *pxRxedMessage;
 
+ *
 
+ *  if( xQueue != 0 )
 
+ *  {
 
+ *      // Peek a message on the created queue.  Block for 10 ticks if a
 
+ *      // message is not immediately available.
 
+ *      if( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
 
+ *      {
 
+ *          // pcRxedMessage now points to the struct AMessage variable posted
 
+ *          // by vATask, but the item still remains on the queue.
 
+ *      }
 
+ *  }
 
+ *
 
+ *  // ... Rest of task code.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueuePeek xQueuePeek
 
+ * \ingroup QueueManagement
 
+ */
 
+BaseType_t xQueuePeek( QueueHandle_t xQueue,
 
+                       void * const pvBuffer,
 
+                       TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueuePeekFromISR(
 
+ *                                  QueueHandle_t xQueue,
 
+ *                                  void *pvBuffer,
 
+ *                              );
 
+ * </pre>
 
+ *
 
+ * A version of xQueuePeek() that can be called from an interrupt service
 
+ * routine (ISR).
 
+ *
 
+ * Receive an item from a queue without removing the item from the queue.
 
+ * The item is received by copy so a buffer of adequate size must be
 
+ * provided.  The number of bytes copied into the buffer was defined when
 
+ * the queue was created.
 
+ *
 
+ * Successfully received items remain on the queue so will be returned again
 
+ * by the next call, or a call to xQueueReceive().
 
+ *
 
+ * @param xQueue The handle to the queue from which the item is to be
 
+ * received.
 
+ *
 
+ * @param pvBuffer Pointer to the buffer into which the received item will
 
+ * be copied.
 
+ *
 
+ * @return pdTRUE if an item was successfully received from the queue,
 
+ * otherwise pdFALSE.
 
+ *
 
+ * \defgroup xQueuePeekFromISR xQueuePeekFromISR
 
+ * \ingroup QueueManagement
 
+ */
 
+BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
 
+                              void * const pvBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueReceive(
 
+ *                               QueueHandle_t xQueue,
 
+ *                               void *pvBuffer,
 
+ *                               TickType_t xTicksToWait
 
+ *                          );
 
+ * </pre>
 
+ *
 
+ * Receive an item from a queue.  The item is received by copy so a buffer of
 
+ * adequate size must be provided.  The number of bytes copied into the buffer
 
+ * was defined when the queue was created.
 
+ *
 
+ * Successfully received items are removed from the queue.
 
+ *
 
+ * This function must not be used in an interrupt service routine.  See
 
+ * xQueueReceiveFromISR for an alternative that can.
 
+ *
 
+ * @param xQueue The handle to the queue from which the item is to be
 
+ * received.
 
+ *
 
+ * @param pvBuffer Pointer to the buffer into which the received item will
 
+ * be copied.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time the task should block
 
+ * waiting for an item to receive should the queue be empty at the time
 
+ * of the call. xQueueReceive() will return immediately if xTicksToWait
 
+ * is zero and the queue is empty.  The time is defined in tick periods so the
 
+ * constant portTICK_PERIOD_MS should be used to convert to real time if this is
 
+ * required.
 
+ *
 
+ * @return pdTRUE if an item was successfully received from the queue,
 
+ * otherwise pdFALSE.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * struct AMessage
 
+ * {
 
+ *  char ucMessageID;
 
+ *  char ucData[ 20 ];
 
+ * } xMessage;
 
+ *
 
+ * QueueHandle_t xQueue;
 
+ *
 
+ * // Task to create a queue and post a value.
 
+ * void vATask( void *pvParameters )
 
+ * {
 
+ * struct AMessage *pxMessage;
 
+ *
 
+ *  // Create a queue capable of containing 10 pointers to AMessage structures.
 
+ *  // These should be passed by pointer as they contain a lot of data.
 
+ *  xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
 
+ *  if( xQueue == 0 )
 
+ *  {
 
+ *      // Failed to create the queue.
 
+ *  }
 
+ *
 
+ *  // ...
 
+ *
 
+ *  // Send a pointer to a struct AMessage object.  Don't block if the
 
+ *  // queue is already full.
 
+ *  pxMessage = & xMessage;
 
+ *  xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
 
+ *
 
+ *  // ... Rest of task code.
 
+ * }
 
+ *
 
+ * // Task to receive from the queue.
 
+ * void vADifferentTask( void *pvParameters )
 
+ * {
 
+ * struct AMessage *pxRxedMessage;
 
+ *
 
+ *  if( xQueue != 0 )
 
+ *  {
 
+ *      // Receive a message on the created queue.  Block for 10 ticks if a
 
+ *      // message is not immediately available.
 
+ *      if( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
 
+ *      {
 
+ *          // pcRxedMessage now points to the struct AMessage variable posted
 
+ *          // by vATask.
 
+ *      }
 
+ *  }
 
+ *
 
+ *  // ... Rest of task code.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueueReceive xQueueReceive
 
+ * \ingroup QueueManagement
 
+ */
 
+BaseType_t xQueueReceive( QueueHandle_t xQueue,
 
+                          void * const pvBuffer,
 
+                          TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );
 
+ * </pre>
 
+ *
 
+ * Return the number of messages stored in a queue.
 
+ *
 
+ * @param xQueue A handle to the queue being queried.
 
+ *
 
+ * @return The number of messages available in the queue.
 
+ *
 
+ * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
 
+ * \ingroup QueueManagement
 
+ */
 
+UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );
 
+ * </pre>
 
+ *
 
+ * Return the number of free spaces available in a queue.  This is equal to the
 
+ * number of items that can be sent to the queue before the queue becomes full
 
+ * if no items are removed.
 
+ *
 
+ * @param xQueue A handle to the queue being queried.
 
+ *
 
+ * @return The number of spaces available in the queue.
 
+ *
 
+ * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
 
+ * \ingroup QueueManagement
 
+ */
 
+UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * void vQueueDelete( QueueHandle_t xQueue );
 
+ * </pre>
 
+ *
 
+ * Delete a queue - freeing all the memory allocated for storing of items
 
+ * placed on the queue.
 
+ *
 
+ * @param xQueue A handle to the queue to be deleted.
 
+ *
 
+ * \defgroup vQueueDelete vQueueDelete
 
+ * \ingroup QueueManagement
 
+ */
 
+void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueSendToFrontFromISR(
 
+ *                                       QueueHandle_t xQueue,
 
+ *                                       const void *pvItemToQueue,
 
+ *                                       BaseType_t *pxHigherPriorityTaskWoken
 
+ *                                    );
 
+ * </pre>
 
+ *
 
+ * This is a macro that calls xQueueGenericSendFromISR().
 
+ *
 
+ * Post an item to the front of a queue.  It is safe to use this macro from
 
+ * within an interrupt service routine.
 
+ *
 
+ * Items are queued by copy not reference so it is preferable to only
 
+ * queue small items, especially when called from an ISR.  In most cases
 
+ * it would be preferable to store a pointer to the item being queued.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set
 
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
 
+ * to unblock, and the unblocked task has a priority higher than the currently
 
+ * running task.  If xQueueSendToFromFromISR() sets this value to pdTRUE then
 
+ * a context switch should be requested before the interrupt is exited.
 
+ *
 
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
 
+ * errQUEUE_FULL.
 
+ *
 
+ * Example usage for buffered IO (where the ISR can obtain more than one value
 
+ * per call):
 
+ * <pre>
 
+ * void vBufferISR( void )
 
+ * {
 
+ * char cIn;
 
+ * BaseType_t xHigherPrioritTaskWoken;
 
+ *
 
+ *  // We have not woken a task at the start of the ISR.
 
+ *  xHigherPriorityTaskWoken = pdFALSE;
 
+ *
 
+ *  // Loop until the buffer is empty.
 
+ *  do
 
+ *  {
 
+ *      // Obtain a byte from the buffer.
 
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
 
+ *
 
+ *      // Post the byte.
 
+ *      xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
 
+ *
 
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
 
+ *
 
+ *  // Now the buffer is empty we can switch context if necessary.
 
+ *  if( xHigherPriorityTaskWoken )
 
+ *  {
 
+ *      taskYIELD ();
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ *
 
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
 
+ * \ingroup QueueManagement
 
+ */
 
+#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
 
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT )
 
+
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueSendToBackFromISR(
 
+ *                                       QueueHandle_t xQueue,
 
+ *                                       const void *pvItemToQueue,
 
+ *                                       BaseType_t *pxHigherPriorityTaskWoken
 
+ *                                    );
 
+ * </pre>
 
+ *
 
+ * This is a macro that calls xQueueGenericSendFromISR().
 
+ *
 
+ * Post an item to the back of a queue.  It is safe to use this macro from
 
+ * within an interrupt service routine.
 
+ *
 
+ * Items are queued by copy not reference so it is preferable to only
 
+ * queue small items, especially when called from an ISR.  In most cases
 
+ * it would be preferable to store a pointer to the item being queued.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set
 
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
 
+ * to unblock, and the unblocked task has a priority higher than the currently
 
+ * running task.  If xQueueSendToBackFromISR() sets this value to pdTRUE then
 
+ * a context switch should be requested before the interrupt is exited.
 
+ *
 
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
 
+ * errQUEUE_FULL.
 
+ *
 
+ * Example usage for buffered IO (where the ISR can obtain more than one value
 
+ * per call):
 
+ * <pre>
 
+ * void vBufferISR( void )
 
+ * {
 
+ * char cIn;
 
+ * BaseType_t xHigherPriorityTaskWoken;
 
+ *
 
+ *  // We have not woken a task at the start of the ISR.
 
+ *  xHigherPriorityTaskWoken = pdFALSE;
 
+ *
 
+ *  // Loop until the buffer is empty.
 
+ *  do
 
+ *  {
 
+ *      // Obtain a byte from the buffer.
 
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
 
+ *
 
+ *      // Post the byte.
 
+ *      xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
 
+ *
 
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
 
+ *
 
+ *  // Now the buffer is empty we can switch context if necessary.
 
+ *  if( xHigherPriorityTaskWoken )
 
+ *  {
 
+ *      taskYIELD ();
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ *
 
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
 
+ * \ingroup QueueManagement
 
+ */
 
+#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
 
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueOverwriteFromISR(
 
+ *                            QueueHandle_t xQueue,
 
+ *                            const void * pvItemToQueue,
 
+ *                            BaseType_t *pxHigherPriorityTaskWoken
 
+ *                       );
 
+ * </pre>
 
+ *
 
+ * A version of xQueueOverwrite() that can be used in an interrupt service
 
+ * routine (ISR).
 
+ *
 
+ * Only for use with queues that can hold a single item - so the queue is either
 
+ * empty or full.
 
+ *
 
+ * Post an item on a queue.  If the queue is already full then overwrite the
 
+ * value held in the queue.  The item is queued by copy, not by reference.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken xQueueOverwriteFromISR() will set
 
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
 
+ * to unblock, and the unblocked task has a priority higher than the currently
 
+ * running task.  If xQueueOverwriteFromISR() sets this value to pdTRUE then
 
+ * a context switch should be requested before the interrupt is exited.
 
+ *
 
+ * @return xQueueOverwriteFromISR() is a macro that calls
 
+ * xQueueGenericSendFromISR(), and therefore has the same return values as
 
+ * xQueueSendToFrontFromISR().  However, pdPASS is the only value that can be
 
+ * returned because xQueueOverwriteFromISR() will write to the queue even when
 
+ * the queue is already full.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ *
 
+ * QueueHandle_t xQueue;
 
+ *
 
+ * void vFunction( void *pvParameters )
 
+ * {
 
+ *  // Create a queue to hold one uint32_t value.  It is strongly
 
+ *  // recommended *not* to use xQueueOverwriteFromISR() on queues that can
 
+ *  // contain more than one value, and doing so will trigger an assertion
 
+ *  // if configASSERT() is defined.
 
+ *  xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
 
+ * }
 
+ *
 
+ * void vAnInterruptHandler( void )
 
+ * {
 
+ * // xHigherPriorityTaskWoken must be set to pdFALSE before it is used.
 
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
+ * uint32_t ulVarToSend, ulValReceived;
 
+ *
 
+ *  // Write the value 10 to the queue using xQueueOverwriteFromISR().
 
+ *  ulVarToSend = 10;
 
+ *  xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
 
+ *
 
+ *  // The queue is full, but calling xQueueOverwriteFromISR() again will still
 
+ *  // pass because the value held in the queue will be overwritten with the
 
+ *  // new value.
 
+ *  ulVarToSend = 100;
 
+ *  xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
 
+ *
 
+ *  // Reading from the queue will now return 100.
 
+ *
 
+ *  // ...
 
+ *
 
+ *  if( xHigherPrioritytaskWoken == pdTRUE )
 
+ *  {
 
+ *      // Writing to the queue caused a task to unblock and the unblocked task
 
+ *      // has a priority higher than or equal to the priority of the currently
 
+ *      // executing task (the task this interrupt interrupted).  Perform a context
 
+ *      // switch so this interrupt returns directly to the unblocked task.
 
+ *      portYIELD_FROM_ISR(); // or portEND_SWITCHING_ISR() depending on the port.
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR
 
+ * \ingroup QueueManagement
 
+ */
 
+#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
 
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE )
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueSendFromISR(
 
+ *                                   QueueHandle_t xQueue,
 
+ *                                   const void *pvItemToQueue,
 
+ *                                   BaseType_t *pxHigherPriorityTaskWoken
 
+ *                              );
 
+ * </pre>
 
+ *
 
+ * This is a macro that calls xQueueGenericSendFromISR().  It is included
 
+ * for backward compatibility with versions of FreeRTOS.org that did not
 
+ * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR()
 
+ * macros.
 
+ *
 
+ * Post an item to the back of a queue.  It is safe to use this function from
 
+ * within an interrupt service routine.
 
+ *
 
+ * Items are queued by copy not reference so it is preferable to only
 
+ * queue small items, especially when called from an ISR.  In most cases
 
+ * it would be preferable to store a pointer to the item being queued.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set
 
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
 
+ * to unblock, and the unblocked task has a priority higher than the currently
 
+ * running task.  If xQueueSendFromISR() sets this value to pdTRUE then
 
+ * a context switch should be requested before the interrupt is exited.
 
+ *
 
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
 
+ * errQUEUE_FULL.
 
+ *
 
+ * Example usage for buffered IO (where the ISR can obtain more than one value
 
+ * per call):
 
+ * <pre>
 
+ * void vBufferISR( void )
 
+ * {
 
+ * char cIn;
 
+ * BaseType_t xHigherPriorityTaskWoken;
 
+ *
 
+ *  // We have not woken a task at the start of the ISR.
 
+ *  xHigherPriorityTaskWoken = pdFALSE;
 
+ *
 
+ *  // Loop until the buffer is empty.
 
+ *  do
 
+ *  {
 
+ *      // Obtain a byte from the buffer.
 
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
 
+ *
 
+ *      // Post the byte.
 
+ *      xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
 
+ *
 
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
 
+ *
 
+ *  // Now the buffer is empty we can switch context if necessary.
 
+ *  if( xHigherPriorityTaskWoken )
 
+ *  {
 
+ *      // Actual macro used here is port specific.
 
+ *      portYIELD_FROM_ISR ();
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ *
 
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
 
+ * \ingroup QueueManagement
 
+ */
 
+#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
 
+    xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueGenericSendFromISR(
 
+ *                                         QueueHandle_t    xQueue,
 
+ *                                         const    void    *pvItemToQueue,
 
+ *                                         BaseType_t  *pxHigherPriorityTaskWoken,
 
+ *                                         BaseType_t  xCopyPosition
 
+ *                                     );
 
+ * </pre>
 
+ *
 
+ * It is preferred that the macros xQueueSendFromISR(),
 
+ * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place
 
+ * of calling this function directly.  xQueueGiveFromISR() is an
 
+ * equivalent for use by semaphores that don't actually copy any data.
 
+ *
 
+ * Post an item on a queue.  It is safe to use this function from within an
 
+ * interrupt service routine.
 
+ *
 
+ * Items are queued by copy not reference so it is preferable to only
 
+ * queue small items, especially when called from an ISR.  In most cases
 
+ * it would be preferable to store a pointer to the item being queued.
 
+ *
 
+ * @param xQueue The handle to the queue on which the item is to be posted.
 
+ *
 
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
 
+ * queue.  The size of the items the queue will hold was defined when the
 
+ * queue was created, so this many bytes will be copied from pvItemToQueue
 
+ * into the queue storage area.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set
 
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
 
+ * to unblock, and the unblocked task has a priority higher than the currently
 
+ * running task.  If xQueueGenericSendFromISR() sets this value to pdTRUE then
 
+ * a context switch should be requested before the interrupt is exited.
 
+ *
 
+ * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
 
+ * item at the back of the queue, or queueSEND_TO_FRONT to place the item
 
+ * at the front of the queue (for high priority messages).
 
+ *
 
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
 
+ * errQUEUE_FULL.
 
+ *
 
+ * Example usage for buffered IO (where the ISR can obtain more than one value
 
+ * per call):
 
+ * <pre>
 
+ * void vBufferISR( void )
 
+ * {
 
+ * char cIn;
 
+ * BaseType_t xHigherPriorityTaskWokenByPost;
 
+ *
 
+ *  // We have not woken a task at the start of the ISR.
 
+ *  xHigherPriorityTaskWokenByPost = pdFALSE;
 
+ *
 
+ *  // Loop until the buffer is empty.
 
+ *  do
 
+ *  {
 
+ *      // Obtain a byte from the buffer.
 
+ *      cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
 
+ *
 
+ *      // Post each byte.
 
+ *      xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );
 
+ *
 
+ *  } while( portINPUT_BYTE( BUFFER_COUNT ) );
 
+ *
 
+ *  // Now the buffer is empty we can switch context if necessary.  Note that the
 
+ *  // name of the yield function required is port specific.
 
+ *  if( xHigherPriorityTaskWokenByPost )
 
+ *  {
 
+ *      portYIELD_FROM_ISR();
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ *
 
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
 
+ * \ingroup QueueManagement
 
+ */
 
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue,
 
+                                     const void * const pvItemToQueue,
 
+                                     BaseType_t * const pxHigherPriorityTaskWoken,
 
+                                     const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
 
+BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
 
+                              BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * queue. h
 
+ * <pre>
 
+ * BaseType_t xQueueReceiveFromISR(
 
+ *                                     QueueHandle_t    xQueue,
 
+ *                                     void             *pvBuffer,
 
+ *                                     BaseType_t       *pxTaskWoken
 
+ *                                 );
 
+ * </pre>
 
+ *
 
+ * Receive an item from a queue.  It is safe to use this function from within an
 
+ * interrupt service routine.
 
+ *
 
+ * @param xQueue The handle to the queue from which the item is to be
 
+ * received.
 
+ *
 
+ * @param pvBuffer Pointer to the buffer into which the received item will
 
+ * be copied.
 
+ *
 
+ * @param pxTaskWoken A task may be blocked waiting for space to become
 
+ * available on the queue.  If xQueueReceiveFromISR causes such a task to
 
+ * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will
 
+ * remain unchanged.
 
+ *
 
+ * @return pdTRUE if an item was successfully received from the queue,
 
+ * otherwise pdFALSE.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ *
 
+ * QueueHandle_t xQueue;
 
+ *
 
+ * // Function to create a queue and post some values.
 
+ * void vAFunction( void *pvParameters )
 
+ * {
 
+ * char cValueToPost;
 
+ * const TickType_t xTicksToWait = ( TickType_t )0xff;
 
+ *
 
+ *  // Create a queue capable of containing 10 characters.
 
+ *  xQueue = xQueueCreate( 10, sizeof( char ) );
 
+ *  if( xQueue == 0 )
 
+ *  {
 
+ *      // Failed to create the queue.
 
+ *  }
 
+ *
 
+ *  // ...
 
+ *
 
+ *  // Post some characters that will be used within an ISR.  If the queue
 
+ *  // is full then this task will block for xTicksToWait ticks.
 
+ *  cValueToPost = 'a';
 
+ *  xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
 
+ *  cValueToPost = 'b';
 
+ *  xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
 
+ *
 
+ *  // ... keep posting characters ... this task may block when the queue
 
+ *  // becomes full.
 
+ *
 
+ *  cValueToPost = 'c';
 
+ *  xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
 
+ * }
 
+ *
 
+ * // ISR that outputs all the characters received on the queue.
 
+ * void vISR_Routine( void )
 
+ * {
 
+ * BaseType_t xTaskWokenByReceive = pdFALSE;
 
+ * char cRxedChar;
 
+ *
 
+ *  while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
 
+ *  {
 
+ *      // A character was received.  Output the character now.
 
+ *      vOutputCharacter( cRxedChar );
 
+ *
 
+ *      // If removing the character from the queue woke the task that was
 
+ *      // posting onto the queue cTaskWokenByReceive will have been set to
 
+ *      // pdTRUE.  No matter how many times this loop iterates only one
 
+ *      // task will be woken.
 
+ *  }
 
+ *
 
+ *  if( cTaskWokenByPost != ( char ) pdFALSE;
 
+ *  {
 
+ *      taskYIELD ();
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR
 
+ * \ingroup QueueManagement
 
+ */
 
+BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue,
 
+                                 void * const pvBuffer,
 
+                                 BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Utilities to query queues that are safe to use from an ISR.  These utilities
 
+ * should be used only from witin an ISR, or within a critical section.
 
+ */
 
+BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
+BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
+UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * The functions defined above are for passing data to and from tasks.  The
 
+ * functions below are the equivalents for passing data to and from
 
+ * co-routines.
 
+ *
 
+ * These functions are called from the co-routine macro implementation and
 
+ * should not be called directly from application code.  Instead use the macro
 
+ * wrappers defined within croutine.h.
 
+ */
 
+BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue,
 
+                                const void * pvItemToQueue,
 
+                                BaseType_t xCoRoutinePreviouslyWoken );
 
+BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue,
 
+                                   void * pvBuffer,
 
+                                   BaseType_t * pxTaskWoken );
 
+BaseType_t xQueueCRSend( QueueHandle_t xQueue,
 
+                         const void * pvItemToQueue,
 
+                         TickType_t xTicksToWait );
 
+BaseType_t xQueueCRReceive( QueueHandle_t xQueue,
 
+                            void * pvBuffer,
 
+                            TickType_t xTicksToWait );
 
+
 
+/*
 
+ * For internal use only.  Use xSemaphoreCreateMutex(),
 
+ * xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling
 
+ * these functions directly.
 
+ */
 
+QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
 
+QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType,
 
+                                       StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
 
+QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
 
+                                             const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;
 
+QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
 
+                                                   const UBaseType_t uxInitialCount,
 
+                                                   StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
 
+BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue,
 
+                                TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
 
+TaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * For internal use only.  Use xSemaphoreTakeMutexRecursive() or
 
+ * xSemaphoreGiveMutexRecursive() instead of calling these functions directly.
 
+ */
 
+BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex,
 
+                                     TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Reset a queue back to its original empty state.  The return value is now
 
+ * obsolete and is always set to pdPASS.
 
+ */
 
+#define xQueueReset( xQueue )    xQueueGenericReset( xQueue, pdFALSE )
 
+
 
+/*
 
+ * The registry is provided as a means for kernel aware debuggers to
 
+ * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add
 
+ * a queue, semaphore or mutex handle to the registry if you want the handle
 
+ * to be available to a kernel aware debugger.  If you are not using a kernel
 
+ * aware debugger then this function can be ignored.
 
+ *
 
+ * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the
 
+ * registry can hold.  configQUEUE_REGISTRY_SIZE must be greater than 0
 
+ * within FreeRTOSConfig.h for the registry to be available.  Its value
 
+ * does not effect the number of queues, semaphores and mutexes that can be
 
+ * created - just the number that the registry can hold.
 
+ *
 
+ * If vQueueAddToRegistry is called more than once with the same xQueue
 
+ * parameter, the registry will store the pcQueueName parameter from the
 
+ * most recent call to vQueueAddToRegistry.
 
+ *
 
+ * @param xQueue The handle of the queue being added to the registry.  This
 
+ * is the handle returned by a call to xQueueCreate().  Semaphore and mutex
 
+ * handles can also be passed in here.
 
+ *
 
+ * @param pcName The name to be associated with the handle.  This is the
 
+ * name that the kernel aware debugger will display.  The queue registry only
 
+ * stores a pointer to the string - so the string must be persistent (global or
 
+ * preferably in ROM/Flash), not on the stack.
 
+ */
 
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
 
+    void vQueueAddToRegistry( QueueHandle_t xQueue,
 
+                              const char * pcQueueName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+#endif
 
+
 
+/*
 
+ * The registry is provided as a means for kernel aware debuggers to
 
+ * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add
 
+ * a queue, semaphore or mutex handle to the registry if you want the handle
 
+ * to be available to a kernel aware debugger, and vQueueUnregisterQueue() to
 
+ * remove the queue, semaphore or mutex from the register.  If you are not using
 
+ * a kernel aware debugger then this function can be ignored.
 
+ *
 
+ * @param xQueue The handle of the queue being removed from the registry.
 
+ */
 
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
 
+    void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/*
 
+ * The queue registry is provided as a means for kernel aware debuggers to
 
+ * locate queues, semaphores and mutexes.  Call pcQueueGetName() to look
 
+ * up and return the name of a queue in the queue registry from the queue's
 
+ * handle.
 
+ *
 
+ * @param xQueue The handle of the queue the name of which will be returned.
 
+ * @return If the queue is in the registry then a pointer to the name of the
 
+ * queue is returned.  If the queue is not in the registry then NULL is
 
+ * returned.
 
+ */
 
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
 
+    const char * pcQueueGetName( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+#endif
 
+
 
+/*
 
+ * Generic version of the function used to create a queue using dynamic memory
 
+ * allocation.  This is called by other functions and macros that create other
 
+ * RTOS objects that use the queue structure as their base.
 
+ */
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+    QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength,
 
+                                       const UBaseType_t uxItemSize,
 
+                                       const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/*
 
+ * Generic version of the function used to create a queue using dynamic memory
 
+ * allocation.  This is called by other functions and macros that create other
 
+ * RTOS objects that use the queue structure as their base.
 
+ */
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+    QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
 
+                                             const UBaseType_t uxItemSize,
 
+                                             uint8_t * pucQueueStorage,
 
+                                             StaticQueue_t * pxStaticQueue,
 
+                                             const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/*
 
+ * Queue sets provide a mechanism to allow a task to block (pend) on a read
 
+ * operation from multiple queues or semaphores simultaneously.
 
+ *
 
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
 
+ * function.
 
+ *
 
+ * A queue set must be explicitly created using a call to xQueueCreateSet()
 
+ * before it can be used.  Once created, standard FreeRTOS queues and semaphores
 
+ * can be added to the set using calls to xQueueAddToSet().
 
+ * xQueueSelectFromSet() is then used to determine which, if any, of the queues
 
+ * or semaphores contained in the set is in a state where a queue read or
 
+ * semaphore take operation would be successful.
 
+ *
 
+ * Note 1:  See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html
 
+ * for reasons why queue sets are very rarely needed in practice as there are
 
+ * simpler methods of blocking on multiple objects.
 
+ *
 
+ * Note 2:  Blocking on a queue set that contains a mutex will not cause the
 
+ * mutex holder to inherit the priority of the blocked task.
 
+ *
 
+ * Note 3:  An additional 4 bytes of RAM is required for each space in a every
 
+ * queue added to a queue set.  Therefore counting semaphores that have a high
 
+ * maximum count value should not be added to a queue set.
 
+ *
 
+ * Note 4:  A receive (in the case of a queue) or take (in the case of a
 
+ * semaphore) operation must not be performed on a member of a queue set unless
 
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
 
+ *
 
+ * @param uxEventQueueLength Queue sets store events that occur on
 
+ * the queues and semaphores contained in the set.  uxEventQueueLength specifies
 
+ * the maximum number of events that can be queued at once.  To be absolutely
 
+ * certain that events are not lost uxEventQueueLength should be set to the
 
+ * total sum of the length of the queues added to the set, where binary
 
+ * semaphores and mutexes have a length of 1, and counting semaphores have a
 
+ * length set by their maximum count value.  Examples:
 
+ *  + If a queue set is to hold a queue of length 5, another queue of length 12,
 
+ *    and a binary semaphore, then uxEventQueueLength should be set to
 
+ *    (5 + 12 + 1), or 18.
 
+ *  + If a queue set is to hold three binary semaphores then uxEventQueueLength
 
+ *    should be set to (1 + 1 + 1 ), or 3.
 
+ *  + If a queue set is to hold a counting semaphore that has a maximum count of
 
+ *    5, and a counting semaphore that has a maximum count of 3, then
 
+ *    uxEventQueueLength should be set to (5 + 3), or 8.
 
+ *
 
+ * @return If the queue set is created successfully then a handle to the created
 
+ * queue set is returned.  Otherwise NULL is returned.
 
+ */
 
+QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Adds a queue or semaphore to a queue set that was previously created by a
 
+ * call to xQueueCreateSet().
 
+ *
 
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
 
+ * function.
 
+ *
 
+ * Note 1:  A receive (in the case of a queue) or take (in the case of a
 
+ * semaphore) operation must not be performed on a member of a queue set unless
 
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
 
+ *
 
+ * @param xQueueOrSemaphore The handle of the queue or semaphore being added to
 
+ * the queue set (cast to an QueueSetMemberHandle_t type).
 
+ *
 
+ * @param xQueueSet The handle of the queue set to which the queue or semaphore
 
+ * is being added.
 
+ *
 
+ * @return If the queue or semaphore was successfully added to the queue set
 
+ * then pdPASS is returned.  If the queue could not be successfully added to the
 
+ * queue set because it is already a member of a different queue set then pdFAIL
 
+ * is returned.
 
+ */
 
+BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
 
+                           QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Removes a queue or semaphore from a queue set.  A queue or semaphore can only
 
+ * be removed from a set if the queue or semaphore is empty.
 
+ *
 
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
 
+ * function.
 
+ *
 
+ * @param xQueueOrSemaphore The handle of the queue or semaphore being removed
 
+ * from the queue set (cast to an QueueSetMemberHandle_t type).
 
+ *
 
+ * @param xQueueSet The handle of the queue set in which the queue or semaphore
 
+ * is included.
 
+ *
 
+ * @return If the queue or semaphore was successfully removed from the queue set
 
+ * then pdPASS is returned.  If the queue was not in the queue set, or the
 
+ * queue (or semaphore) was not empty, then pdFAIL is returned.
 
+ */
 
+BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
 
+                                QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * xQueueSelectFromSet() selects from the members of a queue set a queue or
 
+ * semaphore that either contains data (in the case of a queue) or is available
 
+ * to take (in the case of a semaphore).  xQueueSelectFromSet() effectively
 
+ * allows a task to block (pend) on a read operation on all the queues and
 
+ * semaphores in a queue set simultaneously.
 
+ *
 
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
 
+ * function.
 
+ *
 
+ * Note 1:  See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html
 
+ * for reasons why queue sets are very rarely needed in practice as there are
 
+ * simpler methods of blocking on multiple objects.
 
+ *
 
+ * Note 2:  Blocking on a queue set that contains a mutex will not cause the
 
+ * mutex holder to inherit the priority of the blocked task.
 
+ *
 
+ * Note 3:  A receive (in the case of a queue) or take (in the case of a
 
+ * semaphore) operation must not be performed on a member of a queue set unless
 
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
 
+ *
 
+ * @param xQueueSet The queue set on which the task will (potentially) block.
 
+ *
 
+ * @param xTicksToWait The maximum time, in ticks, that the calling task will
 
+ * remain in the Blocked state (with other tasks executing) to wait for a member
 
+ * of the queue set to be ready for a successful queue read or semaphore take
 
+ * operation.
 
+ *
 
+ * @return xQueueSelectFromSet() will return the handle of a queue (cast to
 
+ * a QueueSetMemberHandle_t type) contained in the queue set that contains data,
 
+ * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained
 
+ * in the queue set that is available, or NULL if no such queue or semaphore
 
+ * exists before before the specified block time expires.
 
+ */
 
+QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
 
+                                            const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * A version of xQueueSelectFromSet() that can be used from an ISR.
 
+ */
 
+QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
 
+
 
+/* Not public API functions. */
 
+void vQueueWaitForMessageRestricted( QueueHandle_t xQueue,
 
+                                     TickType_t xTicksToWait,
 
+                                     const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
 
+BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
 
+                               BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
 
+void vQueueSetQueueNumber( QueueHandle_t xQueue,
 
+                           UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION;
 
+UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
+uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
+
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    }
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#endif /* QUEUE_H */

+ 1175 - 0
FreeRTOS/Source/include/semphr.h
Vedi File 

@@ -0,0 +1,1175 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#ifndef SEMAPHORE_H
 
+#define SEMAPHORE_H
 
+
 
+#ifndef INC_FREERTOS_H
 
+    #error "include FreeRTOS.h" must appear in source files before "include semphr.h"
 
+#endif
 
+
 
+#include "queue.h"
 
+
 
+typedef QueueHandle_t SemaphoreHandle_t;
 
+
 
+#define semBINARY_SEMAPHORE_QUEUE_LENGTH    ( ( uint8_t ) 1U )
 
+#define semSEMAPHORE_QUEUE_ITEM_LENGTH      ( ( uint8_t ) 0U )
 
+#define semGIVE_BLOCK_TIME                  ( ( TickType_t ) 0U )
 
+
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore );
 
+ * </pre>
 
+ *
 
+ * In many usage scenarios it is faster and more memory efficient to use a
 
+ * direct to task notification in place of a binary semaphore!
 
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
 
+ *
 
+ * This old vSemaphoreCreateBinary() macro is now deprecated in favour of the
 
+ * xSemaphoreCreateBinary() function.  Note that binary semaphores created using
 
+ * the vSemaphoreCreateBinary() macro are created in a state such that the
 
+ * first call to 'take' the semaphore would pass, whereas binary semaphores
 
+ * created using xSemaphoreCreateBinary() are created in a state such that the
 
+ * the semaphore must first be 'given' before it can be 'taken'.
 
+ *
 
+ * <i>Macro</i> that implements a semaphore by using the existing queue mechanism.
 
+ * The queue length is 1 as this is a binary semaphore.  The data size is 0
 
+ * as we don't want to actually store any data - we just want to know if the
 
+ * queue is empty or full.
 
+ *
 
+ * This type of semaphore can be used for pure synchronisation between tasks or
 
+ * between an interrupt and a task.  The semaphore need not be given back once
 
+ * obtained, so one task/interrupt can continuously 'give' the semaphore while
 
+ * another continuously 'takes' the semaphore.  For this reason this type of
 
+ * semaphore does not use a priority inheritance mechanism.  For an alternative
 
+ * that does use priority inheritance see xSemaphoreCreateMutex().
 
+ *
 
+ * @param xSemaphore Handle to the created semaphore.  Should be of type SemaphoreHandle_t.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore = NULL;
 
+ *
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
 
+ *  // This is a macro so pass the variable in directly.
 
+ *  vSemaphoreCreateBinary( xSemaphore );
 
+ *
 
+ *  if( xSemaphore != NULL )
 
+ *  {
 
+ *      // The semaphore was created successfully.
 
+ *      // The semaphore can now be used.
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+    #define vSemaphoreCreateBinary( xSemaphore )                                                                                     \
 
+    {                                                                                                                                \
 
+        ( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \
 
+        if( ( xSemaphore ) != NULL )                                                                                                 \
 
+        {                                                                                                                            \
 
+            ( void ) xSemaphoreGive( ( xSemaphore ) );                                                                               \
 
+        }                                                                                                                            \
 
+    }
 
+#endif
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphoreCreateBinary( void );
 
+ * </pre>
 
+ *
 
+ * Creates a new binary semaphore instance, and returns a handle by which the
 
+ * new semaphore can be referenced.
 
+ *
 
+ * In many usage scenarios it is faster and more memory efficient to use a
 
+ * direct to task notification in place of a binary semaphore!
 
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
 
+ *
 
+ * Internally, within the FreeRTOS implementation, binary semaphores use a block
 
+ * of memory, in which the semaphore structure is stored.  If a binary semaphore
 
+ * is created using xSemaphoreCreateBinary() then the required memory is
 
+ * automatically dynamically allocated inside the xSemaphoreCreateBinary()
 
+ * function.  (see https://www.FreeRTOS.org/a00111.html).  If a binary semaphore
 
+ * is created using xSemaphoreCreateBinaryStatic() then the application writer
 
+ * must provide the memory.  xSemaphoreCreateBinaryStatic() therefore allows a
 
+ * binary semaphore to be created without using any dynamic memory allocation.
 
+ *
 
+ * The old vSemaphoreCreateBinary() macro is now deprecated in favour of this
 
+ * xSemaphoreCreateBinary() function.  Note that binary semaphores created using
 
+ * the vSemaphoreCreateBinary() macro are created in a state such that the
 
+ * first call to 'take' the semaphore would pass, whereas binary semaphores
 
+ * created using xSemaphoreCreateBinary() are created in a state such that the
 
+ * the semaphore must first be 'given' before it can be 'taken'.
 
+ *
 
+ * This type of semaphore can be used for pure synchronisation between tasks or
 
+ * between an interrupt and a task.  The semaphore need not be given back once
 
+ * obtained, so one task/interrupt can continuously 'give' the semaphore while
 
+ * another continuously 'takes' the semaphore.  For this reason this type of
 
+ * semaphore does not use a priority inheritance mechanism.  For an alternative
 
+ * that does use priority inheritance see xSemaphoreCreateMutex().
 
+ *
 
+ * @return Handle to the created semaphore, or NULL if the memory required to
 
+ * hold the semaphore's data structures could not be allocated.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore = NULL;
 
+ *
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
 
+ *  // This is a macro so pass the variable in directly.
 
+ *  xSemaphore = xSemaphoreCreateBinary();
 
+ *
 
+ *  if( xSemaphore != NULL )
 
+ *  {
 
+ *      // The semaphore was created successfully.
 
+ *      // The semaphore can now be used.
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+    #define xSemaphoreCreateBinary()    xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE )
 
+#endif
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer );
 
+ * </pre>
 
+ *
 
+ * Creates a new binary semaphore instance, and returns a handle by which the
 
+ * new semaphore can be referenced.
 
+ *
 
+ * NOTE: In many usage scenarios it is faster and more memory efficient to use a
 
+ * direct to task notification in place of a binary semaphore!
 
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
 
+ *
 
+ * Internally, within the FreeRTOS implementation, binary semaphores use a block
 
+ * of memory, in which the semaphore structure is stored.  If a binary semaphore
 
+ * is created using xSemaphoreCreateBinary() then the required memory is
 
+ * automatically dynamically allocated inside the xSemaphoreCreateBinary()
 
+ * function.  (see https://www.FreeRTOS.org/a00111.html).  If a binary semaphore
 
+ * is created using xSemaphoreCreateBinaryStatic() then the application writer
 
+ * must provide the memory.  xSemaphoreCreateBinaryStatic() therefore allows a
 
+ * binary semaphore to be created without using any dynamic memory allocation.
 
+ *
 
+ * This type of semaphore can be used for pure synchronisation between tasks or
 
+ * between an interrupt and a task.  The semaphore need not be given back once
 
+ * obtained, so one task/interrupt can continuously 'give' the semaphore while
 
+ * another continuously 'takes' the semaphore.  For this reason this type of
 
+ * semaphore does not use a priority inheritance mechanism.  For an alternative
 
+ * that does use priority inheritance see xSemaphoreCreateMutex().
 
+ *
 
+ * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t,
 
+ * which will then be used to hold the semaphore's data structure, removing the
 
+ * need for the memory to be allocated dynamically.
 
+ *
 
+ * @return If the semaphore is created then a handle to the created semaphore is
 
+ * returned.  If pxSemaphoreBuffer is NULL then NULL is returned.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore = NULL;
 
+ * StaticSemaphore_t xSemaphoreBuffer;
 
+ *
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
 
+ *  // The semaphore's data structures will be placed in the xSemaphoreBuffer
 
+ *  // variable, the address of which is passed into the function.  The
 
+ *  // function's parameter is not NULL, so the function will not attempt any
 
+ *  // dynamic memory allocation, and therefore the function will not return
 
+ *  // return NULL.
 
+ *  xSemaphore = xSemaphoreCreateBinary( &xSemaphoreBuffer );
 
+ *
 
+ *  // Rest of task code goes here.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+    #define xSemaphoreCreateBinaryStatic( pxStaticSemaphore )    xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE )
 
+#endif /* configSUPPORT_STATIC_ALLOCATION */
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * xSemaphoreTake(
 
+ *                   SemaphoreHandle_t xSemaphore,
 
+ *                   TickType_t xBlockTime
 
+ *               );
 
+ * </pre>
 
+ *
 
+ * <i>Macro</i> to obtain a semaphore.  The semaphore must have previously been
 
+ * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
 
+ * xSemaphoreCreateCounting().
 
+ *
 
+ * @param xSemaphore A handle to the semaphore being taken - obtained when
 
+ * the semaphore was created.
 
+ *
 
+ * @param xBlockTime The time in ticks to wait for the semaphore to become
 
+ * available.  The macro portTICK_PERIOD_MS can be used to convert this to a
 
+ * real time.  A block time of zero can be used to poll the semaphore.  A block
 
+ * time of portMAX_DELAY can be used to block indefinitely (provided
 
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h).
 
+ *
 
+ * @return pdTRUE if the semaphore was obtained.  pdFALSE
 
+ * if xBlockTime expired without the semaphore becoming available.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore = NULL;
 
+ *
 
+ * // A task that creates a semaphore.
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // Create the semaphore to guard a shared resource.
 
+ *  xSemaphore = xSemaphoreCreateBinary();
 
+ * }
 
+ *
 
+ * // A task that uses the semaphore.
 
+ * void vAnotherTask( void * pvParameters )
 
+ * {
 
+ *  // ... Do other things.
 
+ *
 
+ *  if( xSemaphore != NULL )
 
+ *  {
 
+ *      // See if we can obtain the semaphore.  If the semaphore is not available
 
+ *      // wait 10 ticks to see if it becomes free.
 
+ *      if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
 
+ *      {
 
+ *          // We were able to obtain the semaphore and can now access the
 
+ *          // shared resource.
 
+ *
 
+ *          // ...
 
+ *
 
+ *          // We have finished accessing the shared resource.  Release the
 
+ *          // semaphore.
 
+ *          xSemaphoreGive( xSemaphore );
 
+ *      }
 
+ *      else
 
+ *      {
 
+ *          // We could not obtain the semaphore and can therefore not access
 
+ *          // the shared resource safely.
 
+ *      }
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreTake xSemaphoreTake
 
+ * \ingroup Semaphores
 
+ */
 
+#define xSemaphoreTake( xSemaphore, xBlockTime )    xQueueSemaphoreTake( ( xSemaphore ), ( xBlockTime ) )
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * xSemaphoreTakeRecursive(
 
+ *                          SemaphoreHandle_t xMutex,
 
+ *                          TickType_t xBlockTime
 
+ *                        );
 
+ * </pre>
 
+ *
 
+ * <i>Macro</i> to recursively obtain, or 'take', a mutex type semaphore.
 
+ * The mutex must have previously been created using a call to
 
+ * xSemaphoreCreateRecursiveMutex();
 
+ *
 
+ * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this
 
+ * macro to be available.
 
+ *
 
+ * This macro must not be used on mutexes created using xSemaphoreCreateMutex().
 
+ *
 
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
 
+ * doesn't become available again until the owner has called
 
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
 
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
 
+ * not be available to any other task until it has also  'given' the mutex back
 
+ * exactly five times.
 
+ *
 
+ * @param xMutex A handle to the mutex being obtained.  This is the
 
+ * handle returned by xSemaphoreCreateRecursiveMutex();
 
+ *
 
+ * @param xBlockTime The time in ticks to wait for the semaphore to become
 
+ * available.  The macro portTICK_PERIOD_MS can be used to convert this to a
 
+ * real time.  A block time of zero can be used to poll the semaphore.  If
 
+ * the task already owns the semaphore then xSemaphoreTakeRecursive() will
 
+ * return immediately no matter what the value of xBlockTime.
 
+ *
 
+ * @return pdTRUE if the semaphore was obtained.  pdFALSE if xBlockTime
 
+ * expired without the semaphore becoming available.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xMutex = NULL;
 
+ *
 
+ * // A task that creates a mutex.
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // Create the mutex to guard a shared resource.
 
+ *  xMutex = xSemaphoreCreateRecursiveMutex();
 
+ * }
 
+ *
 
+ * // A task that uses the mutex.
 
+ * void vAnotherTask( void * pvParameters )
 
+ * {
 
+ *  // ... Do other things.
 
+ *
 
+ *  if( xMutex != NULL )
 
+ *  {
 
+ *      // See if we can obtain the mutex.  If the mutex is not available
 
+ *      // wait 10 ticks to see if it becomes free.
 
+ *      if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
 
+ *      {
 
+ *          // We were able to obtain the mutex and can now access the
 
+ *          // shared resource.
 
+ *
 
+ *          // ...
 
+ *          // For some reason due to the nature of the code further calls to
 
+ *          // xSemaphoreTakeRecursive() are made on the same mutex.  In real
 
+ *          // code these would not be just sequential calls as this would make
 
+ *          // no sense.  Instead the calls are likely to be buried inside
 
+ *          // a more complex call structure.
 
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
 
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
 
+ *
 
+ *          // The mutex has now been 'taken' three times, so will not be
 
+ *          // available to another task until it has also been given back
 
+ *          // three times.  Again it is unlikely that real code would have
 
+ *          // these calls sequentially, but instead buried in a more complex
 
+ *          // call structure.  This is just for illustrative purposes.
 
+ *          xSemaphoreGiveRecursive( xMutex );
 
+ *          xSemaphoreGiveRecursive( xMutex );
 
+ *          xSemaphoreGiveRecursive( xMutex );
 
+ *
 
+ *          // Now the mutex can be taken by other tasks.
 
+ *      }
 
+ *      else
 
+ *      {
 
+ *          // We could not obtain the mutex and can therefore not access
 
+ *          // the shared resource safely.
 
+ *      }
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( configUSE_RECURSIVE_MUTEXES == 1 )
 
+    #define xSemaphoreTakeRecursive( xMutex, xBlockTime )    xQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) )
 
+#endif
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * xSemaphoreGive( SemaphoreHandle_t xSemaphore );
 
+ * </pre>
 
+ *
 
+ * <i>Macro</i> to release a semaphore.  The semaphore must have previously been
 
+ * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
 
+ * xSemaphoreCreateCounting(). and obtained using sSemaphoreTake().
 
+ *
 
+ * This macro must not be used from an ISR.  See xSemaphoreGiveFromISR () for
 
+ * an alternative which can be used from an ISR.
 
+ *
 
+ * This macro must also not be used on semaphores created using
 
+ * xSemaphoreCreateRecursiveMutex().
 
+ *
 
+ * @param xSemaphore A handle to the semaphore being released.  This is the
 
+ * handle returned when the semaphore was created.
 
+ *
 
+ * @return pdTRUE if the semaphore was released.  pdFALSE if an error occurred.
 
+ * Semaphores are implemented using queues.  An error can occur if there is
 
+ * no space on the queue to post a message - indicating that the
 
+ * semaphore was not first obtained correctly.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore = NULL;
 
+ *
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // Create the semaphore to guard a shared resource.
 
+ *  xSemaphore = vSemaphoreCreateBinary();
 
+ *
 
+ *  if( xSemaphore != NULL )
 
+ *  {
 
+ *      if( xSemaphoreGive( xSemaphore ) != pdTRUE )
 
+ *      {
 
+ *          // We would expect this call to fail because we cannot give
 
+ *          // a semaphore without first "taking" it!
 
+ *      }
 
+ *
 
+ *      // Obtain the semaphore - don't block if the semaphore is not
 
+ *      // immediately available.
 
+ *      if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) )
 
+ *      {
 
+ *          // We now have the semaphore and can access the shared resource.
 
+ *
 
+ *          // ...
 
+ *
 
+ *          // We have finished accessing the shared resource so can free the
 
+ *          // semaphore.
 
+ *          if( xSemaphoreGive( xSemaphore ) != pdTRUE )
 
+ *          {
 
+ *              // We would not expect this call to fail because we must have
 
+ *              // obtained the semaphore to get here.
 
+ *          }
 
+ *      }
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreGive xSemaphoreGive
 
+ * \ingroup Semaphores
 
+ */
 
+#define xSemaphoreGive( xSemaphore )    xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex );
 
+ * </pre>
 
+ *
 
+ * <i>Macro</i> to recursively release, or 'give', a mutex type semaphore.
 
+ * The mutex must have previously been created using a call to
 
+ * xSemaphoreCreateRecursiveMutex();
 
+ *
 
+ * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this
 
+ * macro to be available.
 
+ *
 
+ * This macro must not be used on mutexes created using xSemaphoreCreateMutex().
 
+ *
 
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
 
+ * doesn't become available again until the owner has called
 
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
 
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
 
+ * not be available to any other task until it has also  'given' the mutex back
 
+ * exactly five times.
 
+ *
 
+ * @param xMutex A handle to the mutex being released, or 'given'.  This is the
 
+ * handle returned by xSemaphoreCreateMutex();
 
+ *
 
+ * @return pdTRUE if the semaphore was given.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xMutex = NULL;
 
+ *
 
+ * // A task that creates a mutex.
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // Create the mutex to guard a shared resource.
 
+ *  xMutex = xSemaphoreCreateRecursiveMutex();
 
+ * }
 
+ *
 
+ * // A task that uses the mutex.
 
+ * void vAnotherTask( void * pvParameters )
 
+ * {
 
+ *  // ... Do other things.
 
+ *
 
+ *  if( xMutex != NULL )
 
+ *  {
 
+ *      // See if we can obtain the mutex.  If the mutex is not available
 
+ *      // wait 10 ticks to see if it becomes free.
 
+ *      if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE )
 
+ *      {
 
+ *          // We were able to obtain the mutex and can now access the
 
+ *          // shared resource.
 
+ *
 
+ *          // ...
 
+ *          // For some reason due to the nature of the code further calls to
 
+ *          // xSemaphoreTakeRecursive() are made on the same mutex.  In real
 
+ *          // code these would not be just sequential calls as this would make
 
+ *          // no sense.  Instead the calls are likely to be buried inside
 
+ *          // a more complex call structure.
 
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
 
+ *          xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
 
+ *
 
+ *          // The mutex has now been 'taken' three times, so will not be
 
+ *          // available to another task until it has also been given back
 
+ *          // three times.  Again it is unlikely that real code would have
 
+ *          // these calls sequentially, it would be more likely that the calls
 
+ *          // to xSemaphoreGiveRecursive() would be called as a call stack
 
+ *          // unwound.  This is just for demonstrative purposes.
 
+ *          xSemaphoreGiveRecursive( xMutex );
 
+ *          xSemaphoreGiveRecursive( xMutex );
 
+ *          xSemaphoreGiveRecursive( xMutex );
 
+ *
 
+ *          // Now the mutex can be taken by other tasks.
 
+ *      }
 
+ *      else
 
+ *      {
 
+ *          // We could not obtain the mutex and can therefore not access
 
+ *          // the shared resource safely.
 
+ *      }
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( configUSE_RECURSIVE_MUTEXES == 1 )
 
+    #define xSemaphoreGiveRecursive( xMutex )    xQueueGiveMutexRecursive( ( xMutex ) )
 
+#endif
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * xSemaphoreGiveFromISR(
 
+ *                        SemaphoreHandle_t xSemaphore,
 
+ *                        BaseType_t *pxHigherPriorityTaskWoken
 
+ *                    );
 
+ * </pre>
 
+ *
 
+ * <i>Macro</i> to  release a semaphore.  The semaphore must have previously been
 
+ * created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting().
 
+ *
 
+ * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex())
 
+ * must not be used with this macro.
 
+ *
 
+ * This macro can be used from an ISR.
 
+ *
 
+ * @param xSemaphore A handle to the semaphore being released.  This is the
 
+ * handle returned when the semaphore was created.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken xSemaphoreGiveFromISR() will set
 
+ * *pxHigherPriorityTaskWoken to pdTRUE if giving the semaphore caused a task
 
+ * to unblock, and the unblocked task has a priority higher than the currently
 
+ * running task.  If xSemaphoreGiveFromISR() sets this value to pdTRUE then
 
+ * a context switch should be requested before the interrupt is exited.
 
+ *
 
+ * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ \#define LONG_TIME 0xffff
 
+ \#define TICKS_TO_WAIT 10
 
+ * SemaphoreHandle_t xSemaphore = NULL;
 
+ *
 
+ * // Repetitive task.
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  for( ;; )
 
+ *  {
 
+ *      // We want this task to run every 10 ticks of a timer.  The semaphore
 
+ *      // was created before this task was started.
 
+ *
 
+ *      // Block waiting for the semaphore to become available.
 
+ *      if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
 
+ *      {
 
+ *          // It is time to execute.
 
+ *
 
+ *          // ...
 
+ *
 
+ *          // We have finished our task.  Return to the top of the loop where
 
+ *          // we will block on the semaphore until it is time to execute
 
+ *          // again.  Note when using the semaphore for synchronisation with an
 
+ *          // ISR in this manner there is no need to 'give' the semaphore back.
 
+ *      }
 
+ *  }
 
+ * }
 
+ *
 
+ * // Timer ISR
 
+ * void vTimerISR( void * pvParameters )
 
+ * {
 
+ * static uint8_t ucLocalTickCount = 0;
 
+ * static BaseType_t xHigherPriorityTaskWoken;
 
+ *
 
+ *  // A timer tick has occurred.
 
+ *
 
+ *  // ... Do other time functions.
 
+ *
 
+ *  // Is it time for vATask () to run?
 
+ *  xHigherPriorityTaskWoken = pdFALSE;
 
+ *  ucLocalTickCount++;
 
+ *  if( ucLocalTickCount >= TICKS_TO_WAIT )
 
+ *  {
 
+ *      // Unblock the task by releasing the semaphore.
 
+ *      xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
 
+ *
 
+ *      // Reset the count so we release the semaphore again in 10 ticks time.
 
+ *      ucLocalTickCount = 0;
 
+ *  }
 
+ *
 
+ *  if( xHigherPriorityTaskWoken != pdFALSE )
 
+ *  {
 
+ *      // We can force a context switch here.  Context switching from an
 
+ *      // ISR uses port specific syntax.  Check the demo task for your port
 
+ *      // to find the syntax required.
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR
 
+ * \ingroup Semaphores
 
+ */
 
+#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken )    xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) )
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * xSemaphoreTakeFromISR(
 
+ *                        SemaphoreHandle_t xSemaphore,
 
+ *                        BaseType_t *pxHigherPriorityTaskWoken
 
+ *                    );
 
+ * </pre>
 
+ *
 
+ * <i>Macro</i> to  take a semaphore from an ISR.  The semaphore must have
 
+ * previously been created with a call to xSemaphoreCreateBinary() or
 
+ * xSemaphoreCreateCounting().
 
+ *
 
+ * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex())
 
+ * must not be used with this macro.
 
+ *
 
+ * This macro can be used from an ISR, however taking a semaphore from an ISR
 
+ * is not a common operation.  It is likely to only be useful when taking a
 
+ * counting semaphore when an interrupt is obtaining an object from a resource
 
+ * pool (when the semaphore count indicates the number of resources available).
 
+ *
 
+ * @param xSemaphore A handle to the semaphore being taken.  This is the
 
+ * handle returned when the semaphore was created.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken xSemaphoreTakeFromISR() will set
 
+ * *pxHigherPriorityTaskWoken to pdTRUE if taking the semaphore caused a task
 
+ * to unblock, and the unblocked task has a priority higher than the currently
 
+ * running task.  If xSemaphoreTakeFromISR() sets this value to pdTRUE then
 
+ * a context switch should be requested before the interrupt is exited.
 
+ *
 
+ * @return pdTRUE if the semaphore was successfully taken, otherwise
 
+ * pdFALSE
 
+ */
 
+#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken )    xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) )
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphoreCreateMutex( void );
 
+ * </pre>
 
+ *
 
+ * Creates a new mutex type semaphore instance, and returns a handle by which
 
+ * the new mutex can be referenced.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, mutex semaphores use a block
 
+ * of memory, in which the mutex structure is stored.  If a mutex is created
 
+ * using xSemaphoreCreateMutex() then the required memory is automatically
 
+ * dynamically allocated inside the xSemaphoreCreateMutex() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a mutex is created using
 
+ * xSemaphoreCreateMutexStatic() then the application writer must provided the
 
+ * memory.  xSemaphoreCreateMutexStatic() therefore allows a mutex to be created
 
+ * without using any dynamic memory allocation.
 
+ *
 
+ * Mutexes created using this function can be accessed using the xSemaphoreTake()
 
+ * and xSemaphoreGive() macros.  The xSemaphoreTakeRecursive() and
 
+ * xSemaphoreGiveRecursive() macros must not be used.
 
+ *
 
+ * This type of semaphore uses a priority inheritance mechanism so a task
 
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
 
+ * semaphore it is no longer required.
 
+ *
 
+ * Mutex type semaphores cannot be used from within interrupt service routines.
 
+ *
 
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
 
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
 
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
 
+ * service routines.
 
+ *
 
+ * @return If the mutex was successfully created then a handle to the created
 
+ * semaphore is returned.  If there was not enough heap to allocate the mutex
 
+ * data structures then NULL is returned.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore;
 
+ *
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
 
+ *  // This is a macro so pass the variable in directly.
 
+ *  xSemaphore = xSemaphoreCreateMutex();
 
+ *
 
+ *  if( xSemaphore != NULL )
 
+ *  {
 
+ *      // The semaphore was created successfully.
 
+ *      // The semaphore can now be used.
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+    #define xSemaphoreCreateMutex()    xQueueCreateMutex( queueQUEUE_TYPE_MUTEX )
 
+#endif
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer );
 
+ * </pre>
 
+ *
 
+ * Creates a new mutex type semaphore instance, and returns a handle by which
 
+ * the new mutex can be referenced.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, mutex semaphores use a block
 
+ * of memory, in which the mutex structure is stored.  If a mutex is created
 
+ * using xSemaphoreCreateMutex() then the required memory is automatically
 
+ * dynamically allocated inside the xSemaphoreCreateMutex() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a mutex is created using
 
+ * xSemaphoreCreateMutexStatic() then the application writer must provided the
 
+ * memory.  xSemaphoreCreateMutexStatic() therefore allows a mutex to be created
 
+ * without using any dynamic memory allocation.
 
+ *
 
+ * Mutexes created using this function can be accessed using the xSemaphoreTake()
 
+ * and xSemaphoreGive() macros.  The xSemaphoreTakeRecursive() and
 
+ * xSemaphoreGiveRecursive() macros must not be used.
 
+ *
 
+ * This type of semaphore uses a priority inheritance mechanism so a task
 
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
 
+ * semaphore it is no longer required.
 
+ *
 
+ * Mutex type semaphores cannot be used from within interrupt service routines.
 
+ *
 
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
 
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
 
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
 
+ * service routines.
 
+ *
 
+ * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t,
 
+ * which will be used to hold the mutex's data structure, removing the need for
 
+ * the memory to be allocated dynamically.
 
+ *
 
+ * @return If the mutex was successfully created then a handle to the created
 
+ * mutex is returned.  If pxMutexBuffer was NULL then NULL is returned.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore;
 
+ * StaticSemaphore_t xMutexBuffer;
 
+ *
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // A mutex cannot be used before it has been created.  xMutexBuffer is
 
+ *  // into xSemaphoreCreateMutexStatic() so no dynamic memory allocation is
 
+ *  // attempted.
 
+ *  xSemaphore = xSemaphoreCreateMutexStatic( &xMutexBuffer );
 
+ *
 
+ *  // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
 
+ *  // so there is no need to check it.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+    #define xSemaphoreCreateMutexStatic( pxMutexBuffer )    xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) )
 
+#endif /* configSUPPORT_STATIC_ALLOCATION */
 
+
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void );
 
+ * </pre>
 
+ *
 
+ * Creates a new recursive mutex type semaphore instance, and returns a handle
 
+ * by which the new recursive mutex can be referenced.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, recursive mutexs use a block
 
+ * of memory, in which the mutex structure is stored.  If a recursive mutex is
 
+ * created using xSemaphoreCreateRecursiveMutex() then the required memory is
 
+ * automatically dynamically allocated inside the
 
+ * xSemaphoreCreateRecursiveMutex() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a recursive mutex is created using
 
+ * xSemaphoreCreateRecursiveMutexStatic() then the application writer must
 
+ * provide the memory that will get used by the mutex.
 
+ * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to
 
+ * be created without using any dynamic memory allocation.
 
+ *
 
+ * Mutexes created using this macro can be accessed using the
 
+ * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros.  The
 
+ * xSemaphoreTake() and xSemaphoreGive() macros must not be used.
 
+ *
 
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
 
+ * doesn't become available again until the owner has called
 
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
 
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
 
+ * not be available to any other task until it has also  'given' the mutex back
 
+ * exactly five times.
 
+ *
 
+ * This type of semaphore uses a priority inheritance mechanism so a task
 
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
 
+ * semaphore it is no longer required.
 
+ *
 
+ * Mutex type semaphores cannot be used from within interrupt service routines.
 
+ *
 
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
 
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
 
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
 
+ * service routines.
 
+ *
 
+ * @return xSemaphore Handle to the created mutex semaphore.  Should be of type
 
+ * SemaphoreHandle_t.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore;
 
+ *
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
 
+ *  // This is a macro so pass the variable in directly.
 
+ *  xSemaphore = xSemaphoreCreateRecursiveMutex();
 
+ *
 
+ *  if( xSemaphore != NULL )
 
+ *  {
 
+ *      // The semaphore was created successfully.
 
+ *      // The semaphore can now be used.
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreCreateRecursiveMutex xSemaphoreCreateRecursiveMutex
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
 
+    #define xSemaphoreCreateRecursiveMutex()    xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX )
 
+#endif
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer );
 
+ * </pre>
 
+ *
 
+ * Creates a new recursive mutex type semaphore instance, and returns a handle
 
+ * by which the new recursive mutex can be referenced.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, recursive mutexs use a block
 
+ * of memory, in which the mutex structure is stored.  If a recursive mutex is
 
+ * created using xSemaphoreCreateRecursiveMutex() then the required memory is
 
+ * automatically dynamically allocated inside the
 
+ * xSemaphoreCreateRecursiveMutex() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a recursive mutex is created using
 
+ * xSemaphoreCreateRecursiveMutexStatic() then the application writer must
 
+ * provide the memory that will get used by the mutex.
 
+ * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to
 
+ * be created without using any dynamic memory allocation.
 
+ *
 
+ * Mutexes created using this macro can be accessed using the
 
+ * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros.  The
 
+ * xSemaphoreTake() and xSemaphoreGive() macros must not be used.
 
+ *
 
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
 
+ * doesn't become available again until the owner has called
 
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
 
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
 
+ * not be available to any other task until it has also  'given' the mutex back
 
+ * exactly five times.
 
+ *
 
+ * This type of semaphore uses a priority inheritance mechanism so a task
 
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
 
+ * semaphore it is no longer required.
 
+ *
 
+ * Mutex type semaphores cannot be used from within interrupt service routines.
 
+ *
 
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
 
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
 
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
 
+ * service routines.
 
+ *
 
+ * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t,
 
+ * which will then be used to hold the recursive mutex's data structure,
 
+ * removing the need for the memory to be allocated dynamically.
 
+ *
 
+ * @return If the recursive mutex was successfully created then a handle to the
 
+ * created recursive mutex is returned.  If pxMutexBuffer was NULL then NULL is
 
+ * returned.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore;
 
+ * StaticSemaphore_t xMutexBuffer;
 
+ *
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ *  // A recursive semaphore cannot be used before it is created.  Here a
 
+ *  // recursive mutex is created using xSemaphoreCreateRecursiveMutexStatic().
 
+ *  // The address of xMutexBuffer is passed into the function, and will hold
 
+ *  // the mutexes data structures - so no dynamic memory allocation will be
 
+ *  // attempted.
 
+ *  xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xMutexBuffer );
 
+ *
 
+ *  // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
 
+ *  // so there is no need to check it.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreCreateRecursiveMutexStatic xSemaphoreCreateRecursiveMutexStatic
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
 
+    #define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore )    xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore )
 
+#endif /* configSUPPORT_STATIC_ALLOCATION */
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount );
 
+ * </pre>
 
+ *
 
+ * Creates a new counting semaphore instance, and returns a handle by which the
 
+ * new counting semaphore can be referenced.
 
+ *
 
+ * In many usage scenarios it is faster and more memory efficient to use a
 
+ * direct to task notification in place of a counting semaphore!
 
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
 
+ *
 
+ * Internally, within the FreeRTOS implementation, counting semaphores use a
 
+ * block of memory, in which the counting semaphore structure is stored.  If a
 
+ * counting semaphore is created using xSemaphoreCreateCounting() then the
 
+ * required memory is automatically dynamically allocated inside the
 
+ * xSemaphoreCreateCounting() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a counting semaphore is created
 
+ * using xSemaphoreCreateCountingStatic() then the application writer can
 
+ * instead optionally provide the memory that will get used by the counting
 
+ * semaphore.  xSemaphoreCreateCountingStatic() therefore allows a counting
 
+ * semaphore to be created without using any dynamic memory allocation.
 
+ *
 
+ * Counting semaphores are typically used for two things:
 
+ *
 
+ * 1) Counting events.
 
+ *
 
+ *    In this usage scenario an event handler will 'give' a semaphore each time
 
+ *    an event occurs (incrementing the semaphore count value), and a handler
 
+ *    task will 'take' a semaphore each time it processes an event
 
+ *    (decrementing the semaphore count value).  The count value is therefore
 
+ *    the difference between the number of events that have occurred and the
 
+ *    number that have been processed.  In this case it is desirable for the
 
+ *    initial count value to be zero.
 
+ *
 
+ * 2) Resource management.
 
+ *
 
+ *    In this usage scenario the count value indicates the number of resources
 
+ *    available.  To obtain control of a resource a task must first obtain a
 
+ *    semaphore - decrementing the semaphore count value.  When the count value
 
+ *    reaches zero there are no free resources.  When a task finishes with the
 
+ *    resource it 'gives' the semaphore back - incrementing the semaphore count
 
+ *    value.  In this case it is desirable for the initial count value to be
 
+ *    equal to the maximum count value, indicating that all resources are free.
 
+ *
 
+ * @param uxMaxCount The maximum count value that can be reached.  When the
 
+ *        semaphore reaches this value it can no longer be 'given'.
 
+ *
 
+ * @param uxInitialCount The count value assigned to the semaphore when it is
 
+ *        created.
 
+ *
 
+ * @return Handle to the created semaphore.  Null if the semaphore could not be
 
+ *         created.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore;
 
+ *
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ * SemaphoreHandle_t xSemaphore = NULL;
 
+ *
 
+ *  // Semaphore cannot be used before a call to xSemaphoreCreateCounting().
 
+ *  // The max value to which the semaphore can count should be 10, and the
 
+ *  // initial value assigned to the count should be 0.
 
+ *  xSemaphore = xSemaphoreCreateCounting( 10, 0 );
 
+ *
 
+ *  if( xSemaphore != NULL )
 
+ *  {
 
+ *      // The semaphore was created successfully.
 
+ *      // The semaphore can now be used.
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+    #define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount )    xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) )
 
+#endif
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer );
 
+ * </pre>
 
+ *
 
+ * Creates a new counting semaphore instance, and returns a handle by which the
 
+ * new counting semaphore can be referenced.
 
+ *
 
+ * In many usage scenarios it is faster and more memory efficient to use a
 
+ * direct to task notification in place of a counting semaphore!
 
+ * https://www.FreeRTOS.org/RTOS-task-notifications.html
 
+ *
 
+ * Internally, within the FreeRTOS implementation, counting semaphores use a
 
+ * block of memory, in which the counting semaphore structure is stored.  If a
 
+ * counting semaphore is created using xSemaphoreCreateCounting() then the
 
+ * required memory is automatically dynamically allocated inside the
 
+ * xSemaphoreCreateCounting() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a counting semaphore is created
 
+ * using xSemaphoreCreateCountingStatic() then the application writer must
 
+ * provide the memory.  xSemaphoreCreateCountingStatic() therefore allows a
 
+ * counting semaphore to be created without using any dynamic memory allocation.
 
+ *
 
+ * Counting semaphores are typically used for two things:
 
+ *
 
+ * 1) Counting events.
 
+ *
 
+ *    In this usage scenario an event handler will 'give' a semaphore each time
 
+ *    an event occurs (incrementing the semaphore count value), and a handler
 
+ *    task will 'take' a semaphore each time it processes an event
 
+ *    (decrementing the semaphore count value).  The count value is therefore
 
+ *    the difference between the number of events that have occurred and the
 
+ *    number that have been processed.  In this case it is desirable for the
 
+ *    initial count value to be zero.
 
+ *
 
+ * 2) Resource management.
 
+ *
 
+ *    In this usage scenario the count value indicates the number of resources
 
+ *    available.  To obtain control of a resource a task must first obtain a
 
+ *    semaphore - decrementing the semaphore count value.  When the count value
 
+ *    reaches zero there are no free resources.  When a task finishes with the
 
+ *    resource it 'gives' the semaphore back - incrementing the semaphore count
 
+ *    value.  In this case it is desirable for the initial count value to be
 
+ *    equal to the maximum count value, indicating that all resources are free.
 
+ *
 
+ * @param uxMaxCount The maximum count value that can be reached.  When the
 
+ *        semaphore reaches this value it can no longer be 'given'.
 
+ *
 
+ * @param uxInitialCount The count value assigned to the semaphore when it is
 
+ *        created.
 
+ *
 
+ * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t,
 
+ * which will then be used to hold the semaphore's data structure, removing the
 
+ * need for the memory to be allocated dynamically.
 
+ *
 
+ * @return If the counting semaphore was successfully created then a handle to
 
+ * the created counting semaphore is returned.  If pxSemaphoreBuffer was NULL
 
+ * then NULL is returned.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * SemaphoreHandle_t xSemaphore;
 
+ * StaticSemaphore_t xSemaphoreBuffer;
 
+ *
 
+ * void vATask( void * pvParameters )
 
+ * {
 
+ * SemaphoreHandle_t xSemaphore = NULL;
 
+ *
 
+ *  // Counting semaphore cannot be used before they have been created.  Create
 
+ *  // a counting semaphore using xSemaphoreCreateCountingStatic().  The max
 
+ *  // value to which the semaphore can count is 10, and the initial value
 
+ *  // assigned to the count will be 0.  The address of xSemaphoreBuffer is
 
+ *  // passed in and will be used to hold the semaphore structure, so no dynamic
 
+ *  // memory allocation will be used.
 
+ *  xSemaphore = xSemaphoreCreateCounting( 10, 0, &xSemaphoreBuffer );
 
+ *
 
+ *  // No memory allocation was attempted so xSemaphore cannot be NULL, so there
 
+ *  // is no need to check its value.
 
+ * }
 
+ * </pre>
 
+ * \defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic
 
+ * \ingroup Semaphores
 
+ */
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+    #define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer )    xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) )
 
+#endif /* configSUPPORT_STATIC_ALLOCATION */
 
+
 
+/**
 
+ * semphr. h
 
+ * <pre>
 
+ * void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );
 
+ * </pre>
 
+ *
 
+ * Delete a semaphore.  This function must be used with care.  For example,
 
+ * do not delete a mutex type semaphore if the mutex is held by a task.
 
+ *
 
+ * @param xSemaphore A handle to the semaphore to be deleted.
 
+ *
 
+ * \defgroup vSemaphoreDelete vSemaphoreDelete
 
+ * \ingroup Semaphores
 
+ */
 
+#define vSemaphoreDelete( xSemaphore )                   vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) )
 
+
 
+/**
 
+ * semphr.h
 
+ * <pre>
 
+ * TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );
 
+ * </pre>
 
+ *
 
+ * If xMutex is indeed a mutex type semaphore, return the current mutex holder.
 
+ * If xMutex is not a mutex type semaphore, or the mutex is available (not held
 
+ * by a task), return NULL.
 
+ *
 
+ * Note: This is a good way of determining if the calling task is the mutex
 
+ * holder, but not a good way of determining the identity of the mutex holder as
 
+ * the holder may change between the function exiting and the returned value
 
+ * being tested.
 
+ */
 
+#define xSemaphoreGetMutexHolder( xSemaphore )           xQueueGetMutexHolder( ( xSemaphore ) )
 
+
 
+/**
 
+ * semphr.h
 
+ * <pre>
 
+ * TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );
 
+ * </pre>
 
+ *
 
+ * If xMutex is indeed a mutex type semaphore, return the current mutex holder.
 
+ * If xMutex is not a mutex type semaphore, or the mutex is available (not held
 
+ * by a task), return NULL.
 
+ *
 
+ */
 
+#define xSemaphoreGetMutexHolderFromISR( xSemaphore )    xQueueGetMutexHolderFromISR( ( xSemaphore ) )
 
+
 
+/**
 
+ * semphr.h
 
+ * <pre>
 
+ * UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );
 
+ * </pre>
 
+ *
 
+ * If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns
 
+ * its current count value.  If the semaphore is a binary semaphore then
 
+ * uxSemaphoreGetCount() returns 1 if the semaphore is available, and 0 if the
 
+ * semaphore is not available.
 
+ *
 
+ */
 
+#define uxSemaphoreGetCount( xSemaphore )                uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) )
 
+
 
+#endif /* SEMAPHORE_H */

+ 129 - 0
FreeRTOS/Source/include/stack_macros.h
Vedi File 

@@ -0,0 +1,129 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#ifndef STACK_MACROS_H
 
+#define STACK_MACROS_H
 
+
 
+/*
 
+ * Call the stack overflow hook function if the stack of the task being swapped
 
+ * out is currently overflowed, or looks like it might have overflowed in the
 
+ * past.
 
+ *
 
+ * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
 
+ * the current stack state only - comparing the current top of stack value to
 
+ * the stack limit.  Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
 
+ * will also cause the last few stack bytes to be checked to ensure the value
 
+ * to which the bytes were set when the task was created have not been
 
+ * overwritten.  Note this second test does not guarantee that an overflowed
 
+ * stack will always be recognised.
 
+ */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
 
+
 
+/* Only the current stack state is to be checked. */
 
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                            \
 
+    {                                                                                                 \
 
+        /* Is the currently saved stack pointer within the stack limit? */                            \
 
+        if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )                                     \
 
+        {                                                                                             \
 
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
 
+        }                                                                                             \
 
+    }
 
+
 
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
 
+
 
+/* Only the current stack state is to be checked. */
 
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                            \
 
+    {                                                                                                 \
 
+                                                                                                      \
 
+        /* Is the currently saved stack pointer within the stack limit? */                            \
 
+        if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )                                \
 
+        {                                                                                             \
 
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
 
+        }                                                                                             \
 
+    }
 
+
 
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
 
+
 
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                            \
 
+    {                                                                                                 \
 
+        const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;                       \
 
+        const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5;                                        \
 
+                                                                                                      \
 
+        if( ( pulStack[ 0 ] != ulCheckValue ) ||                                                      \
 
+            ( pulStack[ 1 ] != ulCheckValue ) ||                                                      \
 
+            ( pulStack[ 2 ] != ulCheckValue ) ||                                                      \
 
+            ( pulStack[ 3 ] != ulCheckValue ) )                                                       \
 
+        {                                                                                             \
 
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
 
+        }                                                                                             \
 
+    }
 
+
 
+#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
 
+
 
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                                                                \
 
+    {                                                                                                                                     \
 
+        int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;                                                                  \
 
+        static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
 
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
 
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
 
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
 
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
 
+                                                                                                                                          \
 
+                                                                                                                                          \
 
+        pcEndOfStack -= sizeof( ucExpectedStackBytes );                                                                                   \
 
+                                                                                                                                          \
 
+        /* Has the extremity of the task stack ever been written over? */                                                                 \
 
+        if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )                     \
 
+        {                                                                                                                                 \
 
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );                                     \
 
+        }                                                                                                                                 \
 
+    }
 
+
 
+#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+/* Remove stack overflow macro if not being used. */
 
+#ifndef taskCHECK_FOR_STACK_OVERFLOW
 
+    #define taskCHECK_FOR_STACK_OVERFLOW()
 
+#endif
 
+
 
+
 
+
 
+#endif /* STACK_MACROS_H */

+ 869 - 0
FreeRTOS/Source/include/stream_buffer.h
Vedi File 

@@ -0,0 +1,869 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/*
 
+ * Stream buffers are used to send a continuous stream of data from one task or
 
+ * interrupt to another.  Their implementation is light weight, making them
 
+ * particularly suited for interrupt to task and core to core communication
 
+ * scenarios.
 
+ *
 
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
 
+ * implementation (so also the message buffer implementation, as message buffers
 
+ * are built on top of stream buffers) assumes there is only one task or
 
+ * interrupt that will write to the buffer (the writer), and only one task or
 
+ * interrupt that will read from the buffer (the reader).  It is safe for the
 
+ * writer and reader to be different tasks or interrupts, but, unlike other
 
+ * FreeRTOS objects, it is not safe to have multiple different writers or
 
+ * multiple different readers.  If there are to be multiple different writers
 
+ * then the application writer must place each call to a writing API function
 
+ * (such as xStreamBufferSend()) inside a critical section and set the send
 
+ * block time to 0.  Likewise, if there are to be multiple different readers
 
+ * then the application writer must place each call to a reading API function
 
+ * (such as xStreamBufferReceive()) inside a critical section section and set the
 
+ * receive block time to 0.
 
+ *
 
+ */
 
+
 
+#ifndef STREAM_BUFFER_H
 
+#define STREAM_BUFFER_H
 
+
 
+#ifndef INC_FREERTOS_H
 
+    #error "include FreeRTOS.h must appear in source files before include stream_buffer.h"
 
+#endif
 
+
 
+/* *INDENT-OFF* */
 
+#if defined( __cplusplus )
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+/**
 
+ * Type by which stream buffers are referenced.  For example, a call to
 
+ * xStreamBufferCreate() returns an StreamBufferHandle_t variable that can
 
+ * then be used as a parameter to xStreamBufferSend(), xStreamBufferReceive(),
 
+ * etc.
 
+ */
 
+struct StreamBufferDef_t;
 
+typedef struct StreamBufferDef_t * StreamBufferHandle_t;
 
+
 
+
 
+/**
 
+ * message_buffer.h
 
+ *
 
+ * <pre>
 
+ * StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );
 
+ * </pre>
 
+ *
 
+ * Creates a new stream buffer using dynamically allocated memory.  See
 
+ * xStreamBufferCreateStatic() for a version that uses statically allocated
 
+ * memory (memory that is allocated at compile time).
 
+ *
 
+ * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
 
+ * FreeRTOSConfig.h for xStreamBufferCreate() to be available.
 
+ *
 
+ * @param xBufferSizeBytes The total number of bytes the stream buffer will be
 
+ * able to hold at any one time.
 
+ *
 
+ * @param xTriggerLevelBytes The number of bytes that must be in the stream
 
+ * buffer before a task that is blocked on the stream buffer to wait for data is
 
+ * moved out of the blocked state.  For example, if a task is blocked on a read
 
+ * of an empty stream buffer that has a trigger level of 1 then the task will be
 
+ * unblocked when a single byte is written to the buffer or the task's block
 
+ * time expires.  As another example, if a task is blocked on a read of an empty
 
+ * stream buffer that has a trigger level of 10 then the task will not be
 
+ * unblocked until the stream buffer contains at least 10 bytes or the task's
 
+ * block time expires.  If a reading task's block time expires before the
 
+ * trigger level is reached then the task will still receive however many bytes
 
+ * are actually available.  Setting a trigger level of 0 will result in a
 
+ * trigger level of 1 being used.  It is not valid to specify a trigger level
 
+ * that is greater than the buffer size.
 
+ *
 
+ * @return If NULL is returned, then the stream buffer cannot be created
 
+ * because there is insufficient heap memory available for FreeRTOS to allocate
 
+ * the stream buffer data structures and storage area.  A non-NULL value being
 
+ * returned indicates that the stream buffer has been created successfully -
 
+ * the returned value should be stored as the handle to the created stream
 
+ * buffer.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ *
 
+ * void vAFunction( void )
 
+ * {
 
+ * StreamBufferHandle_t xStreamBuffer;
 
+ * const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10;
 
+ *
 
+ *  // Create a stream buffer that can hold 100 bytes.  The memory used to hold
 
+ *  // both the stream buffer structure and the data in the stream buffer is
 
+ *  // allocated dynamically.
 
+ *  xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel );
 
+ *
 
+ *  if( xStreamBuffer == NULL )
 
+ *  {
 
+ *      // There was not enough heap memory space available to create the
 
+ *      // stream buffer.
 
+ *  }
 
+ *  else
 
+ *  {
 
+ *      // The stream buffer was created successfully and can now be used.
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xStreamBufferCreate xStreamBufferCreate
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes )    xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
 
+ *                                              size_t xTriggerLevelBytes,
 
+ *                                              uint8_t *pucStreamBufferStorageArea,
 
+ *                                              StaticStreamBuffer_t *pxStaticStreamBuffer );
 
+ * </pre>
 
+ * Creates a new stream buffer using statically allocated memory.  See
 
+ * xStreamBufferCreate() for a version that uses dynamically allocated memory.
 
+ *
 
+ * configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for
 
+ * xStreamBufferCreateStatic() to be available.
 
+ *
 
+ * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
 
+ * pucStreamBufferStorageArea parameter.
 
+ *
 
+ * @param xTriggerLevelBytes The number of bytes that must be in the stream
 
+ * buffer before a task that is blocked on the stream buffer to wait for data is
 
+ * moved out of the blocked state.  For example, if a task is blocked on a read
 
+ * of an empty stream buffer that has a trigger level of 1 then the task will be
 
+ * unblocked when a single byte is written to the buffer or the task's block
 
+ * time expires.  As another example, if a task is blocked on a read of an empty
 
+ * stream buffer that has a trigger level of 10 then the task will not be
 
+ * unblocked until the stream buffer contains at least 10 bytes or the task's
 
+ * block time expires.  If a reading task's block time expires before the
 
+ * trigger level is reached then the task will still receive however many bytes
 
+ * are actually available.  Setting a trigger level of 0 will result in a
 
+ * trigger level of 1 being used.  It is not valid to specify a trigger level
 
+ * that is greater than the buffer size.
 
+ *
 
+ * @param pucStreamBufferStorageArea Must point to a uint8_t array that is at
 
+ * least xBufferSizeBytes + 1 big.  This is the array to which streams are
 
+ * copied when they are written to the stream buffer.
 
+ *
 
+ * @param pxStaticStreamBuffer Must point to a variable of type
 
+ * StaticStreamBuffer_t, which will be used to hold the stream buffer's data
 
+ * structure.
 
+ *
 
+ * @return If the stream buffer is created successfully then a handle to the
 
+ * created stream buffer is returned. If either pucStreamBufferStorageArea or
 
+ * pxStaticstreamBuffer are NULL then NULL is returned.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ *
 
+ * // Used to dimension the array used to hold the streams.  The available space
 
+ * // will actually be one less than this, so 999.
 
+ #define STORAGE_SIZE_BYTES 1000
 
+ *
 
+ * // Defines the memory that will actually hold the streams within the stream
 
+ * // buffer.
 
+ * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
 
+ *
 
+ * // The variable used to hold the stream buffer structure.
 
+ * StaticStreamBuffer_t xStreamBufferStruct;
 
+ *
 
+ * void MyFunction( void )
 
+ * {
 
+ * StreamBufferHandle_t xStreamBuffer;
 
+ * const size_t xTriggerLevel = 1;
 
+ *
 
+ *  xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ),
 
+ *                                             xTriggerLevel,
 
+ *                                             ucBufferStorage,
 
+ *                                             &xStreamBufferStruct );
 
+ *
 
+ *  // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer
 
+ *  // parameters were NULL, xStreamBuffer will not be NULL, and can be used to
 
+ *  // reference the created stream buffer in other stream buffer API calls.
 
+ *
 
+ *  // Other code that uses the stream buffer can go here.
 
+ * }
 
+ *
 
+ * </pre>
 
+ * \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \
 
+    xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
 
+ *                        const void *pvTxData,
 
+ *                        size_t xDataLengthBytes,
 
+ *                        TickType_t xTicksToWait );
 
+ * </pre>
 
+ *
 
+ * Sends bytes to a stream buffer.  The bytes are copied into the stream buffer.
 
+ *
 
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
 
+ * implementation (so also the message buffer implementation, as message buffers
 
+ * are built on top of stream buffers) assumes there is only one task or
 
+ * interrupt that will write to the buffer (the writer), and only one task or
 
+ * interrupt that will read from the buffer (the reader).  It is safe for the
 
+ * writer and reader to be different tasks or interrupts, but, unlike other
 
+ * FreeRTOS objects, it is not safe to have multiple different writers or
 
+ * multiple different readers.  If there are to be multiple different writers
 
+ * then the application writer must place each call to a writing API function
 
+ * (such as xStreamBufferSend()) inside a critical section and set the send
 
+ * block time to 0.  Likewise, if there are to be multiple different readers
 
+ * then the application writer must place each call to a reading API function
 
+ * (such as xStreamBufferReceive()) inside a critical section and set the receive
 
+ * block time to 0.
 
+ *
 
+ * Use xStreamBufferSend() to write to a stream buffer from a task.  Use
 
+ * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
 
+ * service routine (ISR).
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer to which a stream is
 
+ * being sent.
 
+ *
 
+ * @param pvTxData A pointer to the buffer that holds the bytes to be copied
 
+ * into the stream buffer.
 
+ *
 
+ * @param xDataLengthBytes   The maximum number of bytes to copy from pvTxData
 
+ * into the stream buffer.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time the task should remain in the
 
+ * Blocked state to wait for enough space to become available in the stream
 
+ * buffer, should the stream buffer contain too little space to hold the
 
+ * another xDataLengthBytes bytes.  The block time is specified in tick periods,
 
+ * so the absolute time it represents is dependent on the tick frequency.  The
 
+ * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds
 
+ * into a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will
 
+ * cause the task to wait indefinitely (without timing out), provided
 
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  If a task times out
 
+ * before it can write all xDataLengthBytes into the buffer it will still write
 
+ * as many bytes as possible.  A task does not use any CPU time when it is in
 
+ * the blocked state.
 
+ *
 
+ * @return The number of bytes written to the stream buffer.  If a task times
 
+ * out before it can write all xDataLengthBytes into the buffer it will still
 
+ * write as many bytes as possible.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ * void vAFunction( StreamBufferHandle_t xStreamBuffer )
 
+ * {
 
+ * size_t xBytesSent;
 
+ * uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
 
+ * char *pcStringToSend = "String to send";
 
+ * const TickType_t x100ms = pdMS_TO_TICKS( 100 );
 
+ *
 
+ *  // Send an array to the stream buffer, blocking for a maximum of 100ms to
 
+ *  // wait for enough space to be available in the stream buffer.
 
+ *  xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
 
+ *
 
+ *  if( xBytesSent != sizeof( ucArrayToSend ) )
 
+ *  {
 
+ *      // The call to xStreamBufferSend() times out before there was enough
 
+ *      // space in the buffer for the data to be written, but it did
 
+ *      // successfully write xBytesSent bytes.
 
+ *  }
 
+ *
 
+ *  // Send the string to the stream buffer.  Return immediately if there is not
 
+ *  // enough space in the buffer.
 
+ *  xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
 
+ *
 
+ *  if( xBytesSent != strlen( pcStringToSend ) )
 
+ *  {
 
+ *      // The entire string could not be added to the stream buffer because
 
+ *      // there was not enough free space in the buffer, but xBytesSent bytes
 
+ *      // were sent.  Could try again to send the remaining bytes.
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xStreamBufferSend xStreamBufferSend
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
 
+                          const void * pvTxData,
 
+                          size_t xDataLengthBytes,
 
+                          TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
 
+ *                               const void *pvTxData,
 
+ *                               size_t xDataLengthBytes,
 
+ *                               BaseType_t *pxHigherPriorityTaskWoken );
 
+ * </pre>
 
+ *
 
+ * Interrupt safe version of the API function that sends a stream of bytes to
 
+ * the stream buffer.
 
+ *
 
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
 
+ * implementation (so also the message buffer implementation, as message buffers
 
+ * are built on top of stream buffers) assumes there is only one task or
 
+ * interrupt that will write to the buffer (the writer), and only one task or
 
+ * interrupt that will read from the buffer (the reader).  It is safe for the
 
+ * writer and reader to be different tasks or interrupts, but, unlike other
 
+ * FreeRTOS objects, it is not safe to have multiple different writers or
 
+ * multiple different readers.  If there are to be multiple different writers
 
+ * then the application writer must place each call to a writing API function
 
+ * (such as xStreamBufferSend()) inside a critical section and set the send
 
+ * block time to 0.  Likewise, if there are to be multiple different readers
 
+ * then the application writer must place each call to a reading API function
 
+ * (such as xStreamBufferReceive()) inside a critical section and set the receive
 
+ * block time to 0.
 
+ *
 
+ * Use xStreamBufferSend() to write to a stream buffer from a task.  Use
 
+ * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
 
+ * service routine (ISR).
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer to which a stream is
 
+ * being sent.
 
+ *
 
+ * @param pvTxData A pointer to the data that is to be copied into the stream
 
+ * buffer.
 
+ *
 
+ * @param xDataLengthBytes The maximum number of bytes to copy from pvTxData
 
+ * into the stream buffer.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken  It is possible that a stream buffer will
 
+ * have a task blocked on it waiting for data.  Calling
 
+ * xStreamBufferSendFromISR() can make data available, and so cause a task that
 
+ * was waiting for data to leave the Blocked state.  If calling
 
+ * xStreamBufferSendFromISR() causes a task to leave the Blocked state, and the
 
+ * unblocked task has a priority higher than the currently executing task (the
 
+ * task that was interrupted), then, internally, xStreamBufferSendFromISR()
 
+ * will set *pxHigherPriorityTaskWoken to pdTRUE.  If
 
+ * xStreamBufferSendFromISR() sets this value to pdTRUE, then normally a
 
+ * context switch should be performed before the interrupt is exited.  This will
 
+ * ensure that the interrupt returns directly to the highest priority Ready
 
+ * state task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it
 
+ * is passed into the function.  See the example code below for an example.
 
+ *
 
+ * @return The number of bytes actually written to the stream buffer, which will
 
+ * be less than xDataLengthBytes if the stream buffer didn't have enough free
 
+ * space for all the bytes to be written.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ * // A stream buffer that has already been created.
 
+ * StreamBufferHandle_t xStreamBuffer;
 
+ *
 
+ * void vAnInterruptServiceRoutine( void )
 
+ * {
 
+ * size_t xBytesSent;
 
+ * char *pcStringToSend = "String to send";
 
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
 
+ *
 
+ *  // Attempt to send the string to the stream buffer.
 
+ *  xBytesSent = xStreamBufferSendFromISR( xStreamBuffer,
 
+ *                                         ( void * ) pcStringToSend,
 
+ *                                         strlen( pcStringToSend ),
 
+ *                                         &xHigherPriorityTaskWoken );
 
+ *
 
+ *  if( xBytesSent != strlen( pcStringToSend ) )
 
+ *  {
 
+ *      // There was not enough free space in the stream buffer for the entire
 
+ *      // string to be written, ut xBytesSent bytes were written.
 
+ *  }
 
+ *
 
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
 
+ *  // xStreamBufferSendFromISR() then a task that has a priority above the
 
+ *  // priority of the currently executing task was unblocked and a context
 
+ *  // switch should be performed to ensure the ISR returns to the unblocked
 
+ *  // task.  In most FreeRTOS ports this is done by simply passing
 
+ *  // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
 
+ *  // variables value, and perform the context switch if necessary.  Check the
 
+ *  // documentation for the port in use for port specific instructions.
 
+ *  taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
 
+ * }
 
+ * </pre>
 
+ * \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
 
+                                 const void * pvTxData,
 
+                                 size_t xDataLengthBytes,
 
+                                 BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
 
+ *                           void *pvRxData,
 
+ *                           size_t xBufferLengthBytes,
 
+ *                           TickType_t xTicksToWait );
 
+ * </pre>
 
+ *
 
+ * Receives bytes from a stream buffer.
 
+ *
 
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
 
+ * implementation (so also the message buffer implementation, as message buffers
 
+ * are built on top of stream buffers) assumes there is only one task or
 
+ * interrupt that will write to the buffer (the writer), and only one task or
 
+ * interrupt that will read from the buffer (the reader).  It is safe for the
 
+ * writer and reader to be different tasks or interrupts, but, unlike other
 
+ * FreeRTOS objects, it is not safe to have multiple different writers or
 
+ * multiple different readers.  If there are to be multiple different writers
 
+ * then the application writer must place each call to a writing API function
 
+ * (such as xStreamBufferSend()) inside a critical section and set the send
 
+ * block time to 0.  Likewise, if there are to be multiple different readers
 
+ * then the application writer must place each call to a reading API function
 
+ * (such as xStreamBufferReceive()) inside a critical section and set the receive
 
+ * block time to 0.
 
+ *
 
+ * Use xStreamBufferReceive() to read from a stream buffer from a task.  Use
 
+ * xStreamBufferReceiveFromISR() to read from a stream buffer from an
 
+ * interrupt service routine (ISR).
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer from which bytes are to
 
+ * be received.
 
+ *
 
+ * @param pvRxData A pointer to the buffer into which the received bytes will be
 
+ * copied.
 
+ *
 
+ * @param xBufferLengthBytes The length of the buffer pointed to by the
 
+ * pvRxData parameter.  This sets the maximum number of bytes to receive in one
 
+ * call.  xStreamBufferReceive will return as many bytes as possible up to a
 
+ * maximum set by xBufferLengthBytes.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time the task should remain in the
 
+ * Blocked state to wait for data to become available if the stream buffer is
 
+ * empty.  xStreamBufferReceive() will return immediately if xTicksToWait is
 
+ * zero.  The block time is specified in tick periods, so the absolute time it
 
+ * represents is dependent on the tick frequency.  The macro pdMS_TO_TICKS() can
 
+ * be used to convert a time specified in milliseconds into a time specified in
 
+ * ticks.  Setting xTicksToWait to portMAX_DELAY will cause the task to wait
 
+ * indefinitely (without timing out), provided INCLUDE_vTaskSuspend is set to 1
 
+ * in FreeRTOSConfig.h.  A task does not use any CPU time when it is in the
 
+ * Blocked state.
 
+ *
 
+ * @return The number of bytes actually read from the stream buffer, which will
 
+ * be less than xBufferLengthBytes if the call to xStreamBufferReceive() timed
 
+ * out before xBufferLengthBytes were available.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ * void vAFunction( StreamBuffer_t xStreamBuffer )
 
+ * {
 
+ * uint8_t ucRxData[ 20 ];
 
+ * size_t xReceivedBytes;
 
+ * const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
 
+ *
 
+ *  // Receive up to another sizeof( ucRxData ) bytes from the stream buffer.
 
+ *  // Wait in the Blocked state (so not using any CPU processing time) for a
 
+ *  // maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be
 
+ *  // available.
 
+ *  xReceivedBytes = xStreamBufferReceive( xStreamBuffer,
 
+ *                                         ( void * ) ucRxData,
 
+ *                                         sizeof( ucRxData ),
 
+ *                                         xBlockTime );
 
+ *
 
+ *  if( xReceivedBytes > 0 )
 
+ *  {
 
+ *      // A ucRxData contains another xRecievedBytes bytes of data, which can
 
+ *      // be processed here....
 
+ *  }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xStreamBufferReceive xStreamBufferReceive
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
 
+                             void * pvRxData,
 
+                             size_t xBufferLengthBytes,
 
+                             TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
 
+ *                                  void *pvRxData,
 
+ *                                  size_t xBufferLengthBytes,
 
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
 
+ * </pre>
 
+ *
 
+ * An interrupt safe version of the API function that receives bytes from a
 
+ * stream buffer.
 
+ *
 
+ * Use xStreamBufferReceive() to read bytes from a stream buffer from a task.
 
+ * Use xStreamBufferReceiveFromISR() to read bytes from a stream buffer from an
 
+ * interrupt service routine (ISR).
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer from which a stream
 
+ * is being received.
 
+ *
 
+ * @param pvRxData A pointer to the buffer into which the received bytes are
 
+ * copied.
 
+ *
 
+ * @param xBufferLengthBytes The length of the buffer pointed to by the
 
+ * pvRxData parameter.  This sets the maximum number of bytes to receive in one
 
+ * call.  xStreamBufferReceive will return as many bytes as possible up to a
 
+ * maximum set by xBufferLengthBytes.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken  It is possible that a stream buffer will
 
+ * have a task blocked on it waiting for space to become available.  Calling
 
+ * xStreamBufferReceiveFromISR() can make space available, and so cause a task
 
+ * that is waiting for space to leave the Blocked state.  If calling
 
+ * xStreamBufferReceiveFromISR() causes a task to leave the Blocked state, and
 
+ * the unblocked task has a priority higher than the currently executing task
 
+ * (the task that was interrupted), then, internally,
 
+ * xStreamBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE.
 
+ * If xStreamBufferReceiveFromISR() sets this value to pdTRUE, then normally a
 
+ * context switch should be performed before the interrupt is exited.  That will
 
+ * ensure the interrupt returns directly to the highest priority Ready state
 
+ * task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it is
 
+ * passed into the function.  See the code example below for an example.
 
+ *
 
+ * @return The number of bytes read from the stream buffer, if any.
 
+ *
 
+ * Example use:
 
+ * <pre>
 
+ * // A stream buffer that has already been created.
 
+ * StreamBuffer_t xStreamBuffer;
 
+ *
 
+ * void vAnInterruptServiceRoutine( void )
 
+ * {
 
+ * uint8_t ucRxData[ 20 ];
 
+ * size_t xReceivedBytes;
 
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
 
+ *
 
+ *  // Receive the next stream from the stream buffer.
 
+ *  xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer,
 
+ *                                                ( void * ) ucRxData,
 
+ *                                                sizeof( ucRxData ),
 
+ *                                                &xHigherPriorityTaskWoken );
 
+ *
 
+ *  if( xReceivedBytes > 0 )
 
+ *  {
 
+ *      // ucRxData contains xReceivedBytes read from the stream buffer.
 
+ *      // Process the stream here....
 
+ *  }
 
+ *
 
+ *  // If xHigherPriorityTaskWoken was set to pdTRUE inside
 
+ *  // xStreamBufferReceiveFromISR() then a task that has a priority above the
 
+ *  // priority of the currently executing task was unblocked and a context
 
+ *  // switch should be performed to ensure the ISR returns to the unblocked
 
+ *  // task.  In most FreeRTOS ports this is done by simply passing
 
+ *  // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
 
+ *  // variables value, and perform the context switch if necessary.  Check the
 
+ *  // documentation for the port in use for port specific instructions.
 
+ *  taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
 
+ * }
 
+ * </pre>
 
+ * \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
 
+                                    void * pvRxData,
 
+                                    size_t xBufferLengthBytes,
 
+                                    BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer );
 
+ * </pre>
 
+ *
 
+ * Deletes a stream buffer that was previously created using a call to
 
+ * xStreamBufferCreate() or xStreamBufferCreateStatic().  If the stream
 
+ * buffer was created using dynamic memory (that is, by xStreamBufferCreate()),
 
+ * then the allocated memory is freed.
 
+ *
 
+ * A stream buffer handle must not be used after the stream buffer has been
 
+ * deleted.
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer to be deleted.
 
+ *
 
+ * \defgroup vStreamBufferDelete vStreamBufferDelete
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer );
 
+ * </pre>
 
+ *
 
+ * Queries a stream buffer to see if it is full.  A stream buffer is full if it
 
+ * does not have any free space, and therefore cannot accept any more data.
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer being queried.
 
+ *
 
+ * @return If the stream buffer is full then pdTRUE is returned.  Otherwise
 
+ * pdFALSE is returned.
 
+ *
 
+ * \defgroup xStreamBufferIsFull xStreamBufferIsFull
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer );
 
+ * </pre>
 
+ *
 
+ * Queries a stream buffer to see if it is empty.  A stream buffer is empty if
 
+ * it does not contain any data.
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer being queried.
 
+ *
 
+ * @return If the stream buffer is empty then pdTRUE is returned.  Otherwise
 
+ * pdFALSE is returned.
 
+ *
 
+ * \defgroup xStreamBufferIsEmpty xStreamBufferIsEmpty
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer );
 
+ * </pre>
 
+ *
 
+ * Resets a stream buffer to its initial, empty, state.  Any data that was in
 
+ * the stream buffer is discarded.  A stream buffer can only be reset if there
 
+ * are no tasks blocked waiting to either send to or receive from the stream
 
+ * buffer.
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer being reset.
 
+ *
 
+ * @return If the stream buffer is reset then pdPASS is returned.  If there was
 
+ * a task blocked waiting to send to or read from the stream buffer then the
 
+ * stream buffer is not reset and pdFAIL is returned.
 
+ *
 
+ * \defgroup xStreamBufferReset xStreamBufferReset
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer );
 
+ * </pre>
 
+ *
 
+ * Queries a stream buffer to see how much free space it contains, which is
 
+ * equal to the amount of data that can be sent to the stream buffer before it
 
+ * is full.
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer being queried.
 
+ *
 
+ * @return The number of bytes that can be written to the stream buffer before
 
+ * the stream buffer would be full.
 
+ *
 
+ * \defgroup xStreamBufferSpacesAvailable xStreamBufferSpacesAvailable
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer );
 
+ * </pre>
 
+ *
 
+ * Queries a stream buffer to see how much data it contains, which is equal to
 
+ * the number of bytes that can be read from the stream buffer before the stream
 
+ * buffer would be empty.
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer being queried.
 
+ *
 
+ * @return The number of bytes that can be read from the stream buffer before
 
+ * the stream buffer would be empty.
 
+ *
 
+ * \defgroup xStreamBufferBytesAvailable xStreamBufferBytesAvailable
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel );
 
+ * </pre>
 
+ *
 
+ * A stream buffer's trigger level is the number of bytes that must be in the
 
+ * stream buffer before a task that is blocked on the stream buffer to
 
+ * wait for data is moved out of the blocked state.  For example, if a task is
 
+ * blocked on a read of an empty stream buffer that has a trigger level of 1
 
+ * then the task will be unblocked when a single byte is written to the buffer
 
+ * or the task's block time expires.  As another example, if a task is blocked
 
+ * on a read of an empty stream buffer that has a trigger level of 10 then the
 
+ * task will not be unblocked until the stream buffer contains at least 10 bytes
 
+ * or the task's block time expires.  If a reading task's block time expires
 
+ * before the trigger level is reached then the task will still receive however
 
+ * many bytes are actually available.  Setting a trigger level of 0 will result
 
+ * in a trigger level of 1 being used.  It is not valid to specify a trigger
 
+ * level that is greater than the buffer size.
 
+ *
 
+ * A trigger level is set when the stream buffer is created, and can be modified
 
+ * using xStreamBufferSetTriggerLevel().
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer being updated.
 
+ *
 
+ * @param xTriggerLevel The new trigger level for the stream buffer.
 
+ *
 
+ * @return If xTriggerLevel was less than or equal to the stream buffer's length
 
+ * then the trigger level will be updated and pdTRUE is returned.  Otherwise
 
+ * pdFALSE is returned.
 
+ *
 
+ * \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
 
+                                         size_t xTriggerLevel ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
 
+ * </pre>
 
+ *
 
+ * For advanced users only.
 
+ *
 
+ * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when
 
+ * data is sent to a message buffer or stream buffer.  If there was a task that
 
+ * was blocked on the message or stream buffer waiting for data to arrive then
 
+ * the sbSEND_COMPLETED() macro sends a notification to the task to remove it
 
+ * from the Blocked state.  xStreamBufferSendCompletedFromISR() does the same
 
+ * thing.  It is provided to enable application writers to implement their own
 
+ * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME.
 
+ *
 
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
 
+ * additional information.
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer to which data was
 
+ * written.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
 
+ * initialised to pdFALSE before it is passed into
 
+ * xStreamBufferSendCompletedFromISR().  If calling
 
+ * xStreamBufferSendCompletedFromISR() removes a task from the Blocked state,
 
+ * and the task has a priority above the priority of the currently running task,
 
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
 
+ * context switch should be performed before exiting the ISR.
 
+ *
 
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
 
+ * Otherwise pdFALSE is returned.
 
+ *
 
+ * \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
 
+                                              BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * stream_buffer.h
 
+ *
 
+ * <pre>
 
+ * BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
 
+ * </pre>
 
+ *
 
+ * For advanced users only.
 
+ *
 
+ * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when
 
+ * data is read out of a message buffer or stream buffer.  If there was a task
 
+ * that was blocked on the message or stream buffer waiting for data to arrive
 
+ * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to
 
+ * remove it from the Blocked state.  xStreamBufferReceiveCompletedFromISR()
 
+ * does the same thing.  It is provided to enable application writers to
 
+ * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT
 
+ * ANY OTHER TIME.
 
+ *
 
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
 
+ * additional information.
 
+ *
 
+ * @param xStreamBuffer The handle of the stream buffer from which data was
 
+ * read.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
 
+ * initialised to pdFALSE before it is passed into
 
+ * xStreamBufferReceiveCompletedFromISR().  If calling
 
+ * xStreamBufferReceiveCompletedFromISR() removes a task from the Blocked state,
 
+ * and the task has a priority above the priority of the currently running task,
 
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
 
+ * context switch should be performed before exiting the ISR.
 
+ *
 
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
 
+ * Otherwise pdFALSE is returned.
 
+ *
 
+ * \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR
 
+ * \ingroup StreamBufferManagement
 
+ */
 
+BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
 
+                                                 BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+
 
+/* Functions below here are not part of the public API. */
 
+StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
 
+                                                 size_t xTriggerLevelBytes,
 
+                                                 BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
 
+                                                       size_t xTriggerLevelBytes,
 
+                                                       BaseType_t xIsMessageBuffer,
 
+                                                       uint8_t * const pucStreamBufferStorageArea,
 
+                                                       StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+    void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer,
 
+                                             UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION;
 
+    UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
+    uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/* *INDENT-OFF* */
 
+#if defined( __cplusplus )
 
+    }
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+#endif /* !defined( STREAM_BUFFER_H ) */

+ 3063 - 0
FreeRTOS/Source/include/task.h
Vedi File 

@@ -0,0 +1,3063 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+
 
+#ifndef INC_TASK_H
 
+#define INC_TASK_H
 
+
 
+#ifndef INC_FREERTOS_H
 
+    #error "include FreeRTOS.h must appear in source files before include task.h"
 
+#endif
 
+
 
+#include "list.h"
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+/*-----------------------------------------------------------
 
+* MACROS AND DEFINITIONS
 
+*----------------------------------------------------------*/
 
+
 
+/*
 
+ * If tskKERNEL_VERSION_NUMBER ends with + it represents the version in development
 
+ * after the numbered release.
 
+ *
 
+ * The tskKERNEL_VERSION_MAJOR, tskKERNEL_VERSION_MINOR, tskKERNEL_VERSION_BUILD
 
+ * values will reflect the last released version number.
 
+ */ 
+#define tskKERNEL_VERSION_NUMBER       "V10.4.4"
 
+#define tskKERNEL_VERSION_MAJOR        10
 
+#define tskKERNEL_VERSION_MINOR        4
 
+#define tskKERNEL_VERSION_BUILD        4
 
+
 
+/* MPU region parameters passed in ulParameters
 
+ * of MemoryRegion_t struct. */
 
+#define tskMPU_REGION_READ_ONLY        ( 1UL << 0UL )
 
+#define tskMPU_REGION_READ_WRITE       ( 1UL << 1UL )
 
+#define tskMPU_REGION_EXECUTE_NEVER    ( 1UL << 2UL )
 
+#define tskMPU_REGION_NORMAL_MEMORY    ( 1UL << 3UL )
 
+#define tskMPU_REGION_DEVICE_MEMORY    ( 1UL << 4UL )
 
+
 
+/* The direct to task notification feature used to have only a single notification
 
+ * per task.  Now there is an array of notifications per task that is dimensioned by
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES.  For backward compatibility, any use of the
 
+ * original direct to task notification defaults to using the first index in the
 
+ * array. */
 
+#define tskDEFAULT_INDEX_TO_NOTIFY     ( 0 )
 
+
 
+/**
 
+ * task. h
 
+ *
 
+ * Type by which tasks are referenced.  For example, a call to xTaskCreate
 
+ * returns (via a pointer parameter) an TaskHandle_t variable that can then
 
+ * be used as a parameter to vTaskDelete to delete the task.
 
+ *
 
+ * \defgroup TaskHandle_t TaskHandle_t
 
+ * \ingroup Tasks
 
+ */
 
+struct tskTaskControlBlock;     /* The old naming convention is used to prevent breaking kernel aware debuggers. */
 
+typedef struct tskTaskControlBlock * TaskHandle_t;
 
+
 
+/*
 
+ * Defines the prototype to which the application task hook function must
 
+ * conform.
 
+ */
 
+typedef BaseType_t (* TaskHookFunction_t)( void * );
 
+
 
+/* Task states returned by eTaskGetState. */
 
+typedef enum
 
+{
 
+    eRunning = 0,     /* A task is querying the state of itself, so must be running. */
 
+    eReady,           /* The task being queried is in a ready or pending ready list. */
 
+    eBlocked,         /* The task being queried is in the Blocked state. */
 
+    eSuspended,       /* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */
 
+    eDeleted,         /* The task being queried has been deleted, but its TCB has not yet been freed. */
 
+    eInvalid          /* Used as an 'invalid state' value. */
 
+} eTaskState;
 
+
 
+/* Actions that can be performed when vTaskNotify() is called. */
 
+typedef enum
 
+{
 
+    eNoAction = 0,                /* Notify the task without updating its notify value. */
 
+    eSetBits,                     /* Set bits in the task's notification value. */
 
+    eIncrement,                   /* Increment the task's notification value. */
 
+    eSetValueWithOverwrite,       /* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */
 
+    eSetValueWithoutOverwrite     /* Set the task's notification value if the previous value has been read by the task. */
 
+} eNotifyAction;
 
+
 
+/*
 
+ * Used internally only.
 
+ */
 
+typedef struct xTIME_OUT
 
+{
 
+    BaseType_t xOverflowCount;
 
+    TickType_t xTimeOnEntering;
 
+} TimeOut_t;
 
+
 
+/*
 
+ * Defines the memory ranges allocated to the task when an MPU is used.
 
+ */
 
+typedef struct xMEMORY_REGION
 
+{
 
+    void * pvBaseAddress;
 
+    uint32_t ulLengthInBytes;
 
+    uint32_t ulParameters;
 
+} MemoryRegion_t;
 
+
 
+/*
 
+ * Parameters required to create an MPU protected task.
 
+ */
 
+typedef struct xTASK_PARAMETERS
 
+{
 
+    TaskFunction_t pvTaskCode;
 
+    const char * pcName;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+    configSTACK_DEPTH_TYPE usStackDepth;
 
+    void * pvParameters;
 
+    UBaseType_t uxPriority;
 
+    StackType_t * puxStackBuffer;
 
+    MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ];
 
+    #if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
+        StaticTask_t * const pxTaskBuffer;
 
+    #endif
 
+} TaskParameters_t;
 
+
 
+/* Used with the uxTaskGetSystemState() function to return the state of each task
 
+ * in the system. */
 
+typedef struct xTASK_STATUS
 
+{
 
+    TaskHandle_t xHandle;                            /* The handle of the task to which the rest of the information in the structure relates. */
 
+    const char * pcTaskName;                         /* A pointer to the task's name.  This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+    UBaseType_t xTaskNumber;                         /* A number unique to the task. */
 
+    eTaskState eCurrentState;                        /* The state in which the task existed when the structure was populated. */
 
+    UBaseType_t uxCurrentPriority;                   /* The priority at which the task was running (may be inherited) when the structure was populated. */
 
+    UBaseType_t uxBasePriority;                      /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex.  Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
 
+    uint32_t ulRunTimeCounter;                       /* The total run time allocated to the task so far, as defined by the run time stats clock.  See https://www.FreeRTOS.org/rtos-run-time-stats.html.  Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */
 
+    StackType_t * pxStackBase;                       /* Points to the lowest address of the task's stack area. */
 
+    configSTACK_DEPTH_TYPE usStackHighWaterMark;     /* The minimum amount of stack space that has remained for the task since the task was created.  The closer this value is to zero the closer the task has come to overflowing its stack. */
 
+} TaskStatus_t;
 
+
 
+/* Possible return values for eTaskConfirmSleepModeStatus(). */
 
+typedef enum
 
+{
 
+    eAbortSleep = 0,           /* A task has been made ready or a context switch pended since portSUPPRESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */
 
+    eStandardSleep,            /* Enter a sleep mode that will not last any longer than the expected idle time. */
 
+    eNoTasksWaitingTimeout     /* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */
 
+} eSleepModeStatus;
 
+
 
+/**
 
+ * Defines the priority used by the idle task.  This must not be modified.
 
+ *
 
+ * \ingroup TaskUtils
 
+ */
 
+#define tskIDLE_PRIORITY    ( ( UBaseType_t ) 0U )
 
+
 
+/**
 
+ * task. h
 
+ *
 
+ * Macro for forcing a context switch.
 
+ *
 
+ * \defgroup taskYIELD taskYIELD
 
+ * \ingroup SchedulerControl
 
+ */
 
+#define taskYIELD()                        portYIELD()
 
+
 
+/**
 
+ * task. h
 
+ *
 
+ * Macro to mark the start of a critical code region.  Preemptive context
 
+ * switches cannot occur when in a critical region.
 
+ *
 
+ * NOTE: This may alter the stack (depending on the portable implementation)
 
+ * so must be used with care!
 
+ *
 
+ * \defgroup taskENTER_CRITICAL taskENTER_CRITICAL
 
+ * \ingroup SchedulerControl
 
+ */
 
+#define taskENTER_CRITICAL()               portENTER_CRITICAL()
 
+#define taskENTER_CRITICAL_FROM_ISR()      portSET_INTERRUPT_MASK_FROM_ISR()
 
+
 
+/**
 
+ * task. h
 
+ *
 
+ * Macro to mark the end of a critical code region.  Preemptive context
 
+ * switches cannot occur when in a critical region.
 
+ *
 
+ * NOTE: This may alter the stack (depending on the portable implementation)
 
+ * so must be used with care!
 
+ *
 
+ * \defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL
 
+ * \ingroup SchedulerControl
 
+ */
 
+#define taskEXIT_CRITICAL()                portEXIT_CRITICAL()
 
+#define taskEXIT_CRITICAL_FROM_ISR( x )    portCLEAR_INTERRUPT_MASK_FROM_ISR( x )
 
+
 
+/**
 
+ * task. h
 
+ *
 
+ * Macro to disable all maskable interrupts.
 
+ *
 
+ * \defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS
 
+ * \ingroup SchedulerControl
 
+ */
 
+#define taskDISABLE_INTERRUPTS()           portDISABLE_INTERRUPTS()
 
+
 
+/**
 
+ * task. h
 
+ *
 
+ * Macro to enable microcontroller interrupts.
 
+ *
 
+ * \defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS
 
+ * \ingroup SchedulerControl
 
+ */
 
+#define taskENABLE_INTERRUPTS()            portENABLE_INTERRUPTS()
 
+
 
+/* Definitions returned by xTaskGetSchedulerState().  taskSCHEDULER_SUSPENDED is
 
+ * 0 to generate more optimal code when configASSERT() is defined as the constant
 
+ * is used in assert() statements. */
 
+#define taskSCHEDULER_SUSPENDED      ( ( BaseType_t ) 0 )
 
+#define taskSCHEDULER_NOT_STARTED    ( ( BaseType_t ) 1 )
 
+#define taskSCHEDULER_RUNNING        ( ( BaseType_t ) 2 )
 
+
 
+
 
+/*-----------------------------------------------------------
 
+* TASK CREATION API
 
+*----------------------------------------------------------*/
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * BaseType_t xTaskCreate(
 
+ *                            TaskFunction_t pxTaskCode,
 
+ *                            const char *pcName,
 
+ *                            configSTACK_DEPTH_TYPE usStackDepth,
 
+ *                            void *pvParameters,
 
+ *                            UBaseType_t uxPriority,
 
+ *                            TaskHandle_t *pxCreatedTask
 
+ *                        );
 
+ * </pre>
 
+ *
 
+ * Create a new task and add it to the list of tasks that are ready to run.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
 
+ * memory.  The first block is used to hold the task's data structures.  The
 
+ * second block is used by the task as its stack.  If a task is created using
 
+ * xTaskCreate() then both blocks of memory are automatically dynamically
 
+ * allocated inside the xTaskCreate() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a task is created using
 
+ * xTaskCreateStatic() then the application writer must provide the required
 
+ * memory.  xTaskCreateStatic() therefore allows a task to be created without
 
+ * using any dynamic memory allocation.
 
+ *
 
+ * See xTaskCreateStatic() for a version that does not use any dynamic memory
 
+ * allocation.
 
+ *
 
+ * xTaskCreate() can only be used to create a task that has unrestricted
 
+ * access to the entire microcontroller memory map.  Systems that include MPU
 
+ * support can alternatively create an MPU constrained task using
 
+ * xTaskCreateRestricted().
 
+ *
 
+ * @param pxTaskCode Pointer to the task entry function.  Tasks
 
+ * must be implemented to never return (i.e. continuous loop).
 
+ *
 
+ * @param pcName A descriptive name for the task.  This is mainly used to
 
+ * facilitate debugging.  Max length defined by configMAX_TASK_NAME_LEN - default
 
+ * is 16.
 
+ *
 
+ * @param usStackDepth The size of the task stack specified as the number of
 
+ * variables the stack can hold - not the number of bytes.  For example, if
 
+ * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes
 
+ * will be allocated for stack storage.
 
+ *
 
+ * @param pvParameters Pointer that will be used as the parameter for the task
 
+ * being created.
 
+ *
 
+ * @param uxPriority The priority at which the task should run.  Systems that
 
+ * include MPU support can optionally create tasks in a privileged (system)
 
+ * mode by setting bit portPRIVILEGE_BIT of the priority parameter.  For
 
+ * example, to create a privileged task at priority 2 the uxPriority parameter
 
+ * should be set to ( 2 | portPRIVILEGE_BIT ).
 
+ *
 
+ * @param pxCreatedTask Used to pass back a handle by which the created task
 
+ * can be referenced.
 
+ *
 
+ * @return pdPASS if the task was successfully created and added to a ready
 
+ * list, otherwise an error code defined in the file projdefs.h
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Task to be created.
 
+ * void vTaskCode( void * pvParameters )
 
+ * {
 
+ *   for( ;; )
 
+ *   {
 
+ *       // Task code goes here.
 
+ *   }
 
+ * }
 
+ *
 
+ * // Function that creates a task.
 
+ * void vOtherFunction( void )
 
+ * {
 
+ * static uint8_t ucParameterToPass;
 
+ * TaskHandle_t xHandle = NULL;
 
+ *
 
+ *   // Create the task, storing the handle.  Note that the passed parameter ucParameterToPass
 
+ *   // must exist for the lifetime of the task, so in this case is declared static.  If it was just an
 
+ *   // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time
 
+ *   // the new task attempts to access it.
 
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
 
+ *   configASSERT( xHandle );
 
+ *
 
+ *   // Use the handle to delete the task.
 
+ *   if( xHandle != NULL )
 
+ *   {
 
+ *      vTaskDelete( xHandle );
 
+ *   }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xTaskCreate xTaskCreate
 
+ * \ingroup Tasks
 
+ */
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+    BaseType_t xTaskCreate( TaskFunction_t pxTaskCode,
 
+                            const char * const pcName,     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                            const configSTACK_DEPTH_TYPE usStackDepth,
 
+                            void * const pvParameters,
 
+                            UBaseType_t uxPriority,
 
+                            TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+* TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
 
+ *                               const char *pcName,
 
+ *                               uint32_t ulStackDepth,
 
+ *                               void *pvParameters,
 
+ *                               UBaseType_t uxPriority,
 
+ *                               StackType_t *puxStackBuffer,
 
+ *                               StaticTask_t *pxTaskBuffer );
 
+ * </pre>
 
+ *
 
+ * Create a new task and add it to the list of tasks that are ready to run.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
 
+ * memory.  The first block is used to hold the task's data structures.  The
 
+ * second block is used by the task as its stack.  If a task is created using
 
+ * xTaskCreate() then both blocks of memory are automatically dynamically
 
+ * allocated inside the xTaskCreate() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a task is created using
 
+ * xTaskCreateStatic() then the application writer must provide the required
 
+ * memory.  xTaskCreateStatic() therefore allows a task to be created without
 
+ * using any dynamic memory allocation.
 
+ *
 
+ * @param pxTaskCode Pointer to the task entry function.  Tasks
 
+ * must be implemented to never return (i.e. continuous loop).
 
+ *
 
+ * @param pcName A descriptive name for the task.  This is mainly used to
 
+ * facilitate debugging.  The maximum length of the string is defined by
 
+ * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h.
 
+ *
 
+ * @param ulStackDepth The size of the task stack specified as the number of
 
+ * variables the stack can hold - not the number of bytes.  For example, if
 
+ * the stack is 32-bits wide and ulStackDepth is defined as 100 then 400 bytes
 
+ * will be allocated for stack storage.
 
+ *
 
+ * @param pvParameters Pointer that will be used as the parameter for the task
 
+ * being created.
 
+ *
 
+ * @param uxPriority The priority at which the task will run.
 
+ *
 
+ * @param puxStackBuffer Must point to a StackType_t array that has at least
 
+ * ulStackDepth indexes - the array will then be used as the task's stack,
 
+ * removing the need for the stack to be allocated dynamically.
 
+ *
 
+ * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will
 
+ * then be used to hold the task's data structures, removing the need for the
 
+ * memory to be allocated dynamically.
 
+ *
 
+ * @return If neither puxStackBuffer nor pxTaskBuffer are NULL, then the task
 
+ * will be created and a handle to the created task is returned.  If either
 
+ * puxStackBuffer or pxTaskBuffer are NULL then the task will not be created and
 
+ * NULL is returned.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ *
 
+ *  // Dimensions of the buffer that the task being created will use as its stack.
 
+ *  // NOTE:  This is the number of words the stack will hold, not the number of
 
+ *  // bytes.  For example, if each stack item is 32-bits, and this is set to 100,
 
+ *  // then 400 bytes (100 * 32-bits) will be allocated.
 
+ #define STACK_SIZE 200
 
+ *
 
+ *  // Structure that will hold the TCB of the task being created.
 
+ *  StaticTask_t xTaskBuffer;
 
+ *
 
+ *  // Buffer that the task being created will use as its stack.  Note this is
 
+ *  // an array of StackType_t variables.  The size of StackType_t is dependent on
 
+ *  // the RTOS port.
 
+ *  StackType_t xStack[ STACK_SIZE ];
 
+ *
 
+ *  // Function that implements the task being created.
 
+ *  void vTaskCode( void * pvParameters )
 
+ *  {
 
+ *      // The parameter value is expected to be 1 as 1 is passed in the
 
+ *      // pvParameters value in the call to xTaskCreateStatic().
 
+ *      configASSERT( ( uint32_t ) pvParameters == 1UL );
 
+ *
 
+ *      for( ;; )
 
+ *      {
 
+ *          // Task code goes here.
 
+ *      }
 
+ *  }
 
+ *
 
+ *  // Function that creates a task.
 
+ *  void vOtherFunction( void )
 
+ *  {
 
+ *      TaskHandle_t xHandle = NULL;
 
+ *
 
+ *      // Create the task without using any dynamic memory allocation.
 
+ *      xHandle = xTaskCreateStatic(
 
+ *                    vTaskCode,       // Function that implements the task.
 
+ *                    "NAME",          // Text name for the task.
 
+ *                    STACK_SIZE,      // Stack size in words, not bytes.
 
+ *                    ( void * ) 1,    // Parameter passed into the task.
 
+ *                    tskIDLE_PRIORITY,// Priority at which the task is created.
 
+ *                    xStack,          // Array to use as the task's stack.
 
+ *                    &xTaskBuffer );  // Variable to hold the task's data structure.
 
+ *
 
+ *      // puxStackBuffer and pxTaskBuffer were not NULL, so the task will have
 
+ *      // been created, and xHandle will be the task's handle.  Use the handle
 
+ *      // to suspend the task.
 
+ *      vTaskSuspend( xHandle );
 
+ *  }
 
+ * </pre>
 
+ * \defgroup xTaskCreateStatic xTaskCreateStatic
 
+ * \ingroup Tasks
 
+ */
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+    TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
 
+                                    const char * const pcName,     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                                    const uint32_t ulStackDepth,
 
+                                    void * const pvParameters,
 
+                                    UBaseType_t uxPriority,
 
+                                    StackType_t * const puxStackBuffer,
 
+                                    StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION;
 
+#endif /* configSUPPORT_STATIC_ALLOCATION */
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
 
+ * </pre>
 
+ *
 
+ * Only available when configSUPPORT_DYNAMIC_ALLOCATION is set to 1.
 
+ *
 
+ * xTaskCreateRestricted() should only be used in systems that include an MPU
 
+ * implementation.
 
+ *
 
+ * Create a new task and add it to the list of tasks that are ready to run.
 
+ * The function parameters define the memory regions and associated access
 
+ * permissions allocated to the task.
 
+ *
 
+ * See xTaskCreateRestrictedStatic() for a version that does not use any
 
+ * dynamic memory allocation.
 
+ *
 
+ * @param pxTaskDefinition Pointer to a structure that contains a member
 
+ * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
 
+ * documentation) plus an optional stack buffer and the memory region
 
+ * definitions.
 
+ *
 
+ * @param pxCreatedTask Used to pass back a handle by which the created task
 
+ * can be referenced.
 
+ *
 
+ * @return pdPASS if the task was successfully created and added to a ready
 
+ * list, otherwise an error code defined in the file projdefs.h
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Create an TaskParameters_t structure that defines the task to be created.
 
+ * static const TaskParameters_t xCheckTaskParameters =
 
+ * {
 
+ *  vATask,     // pvTaskCode - the function that implements the task.
 
+ *  "ATask",    // pcName - just a text name for the task to assist debugging.
 
+ *  100,        // usStackDepth - the stack size DEFINED IN WORDS.
 
+ *  NULL,       // pvParameters - passed into the task function as the function parameters.
 
+ *  ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
 
+ *  cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
 
+ *
 
+ *  // xRegions - Allocate up to three separate memory regions for access by
 
+ *  // the task, with appropriate access permissions.  Different processors have
 
+ *  // different memory alignment requirements - refer to the FreeRTOS documentation
 
+ *  // for full information.
 
+ *  {
 
+ *      // Base address                 Length  Parameters
 
+ *      { cReadWriteArray,              32,     portMPU_REGION_READ_WRITE },
 
+ *      { cReadOnlyArray,               32,     portMPU_REGION_READ_ONLY },
 
+ *      { cPrivilegedOnlyAccessArray,   128,    portMPU_REGION_PRIVILEGED_READ_WRITE }
 
+ *  }
 
+ * };
 
+ *
 
+ * int main( void )
 
+ * {
 
+ * TaskHandle_t xHandle;
 
+ *
 
+ *  // Create a task from the const structure defined above.  The task handle
 
+ *  // is requested (the second parameter is not NULL) but in this case just for
 
+ *  // demonstration purposes as its not actually used.
 
+ *  xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
 
+ *
 
+ *  // Start the scheduler.
 
+ *  vTaskStartScheduler();
 
+ *
 
+ *  // Will only get here if there was insufficient memory to create the idle
 
+ *  // and/or timer task.
 
+ *  for( ;; );
 
+ * }
 
+ * </pre>
 
+ * \defgroup xTaskCreateRestricted xTaskCreateRestricted
 
+ * \ingroup Tasks
 
+ */
 
+#if ( portUSING_MPU_WRAPPERS == 1 )
 
+    BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
 
+                                      TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * BaseType_t xTaskCreateRestrictedStatic( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
 
+ * </pre>
 
+ *
 
+ * Only available when configSUPPORT_STATIC_ALLOCATION is set to 1.
 
+ *
 
+ * xTaskCreateRestrictedStatic() should only be used in systems that include an
 
+ * MPU implementation.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
 
+ * memory.  The first block is used to hold the task's data structures.  The
 
+ * second block is used by the task as its stack.  If a task is created using
 
+ * xTaskCreateRestricted() then the stack is provided by the application writer,
 
+ * and the memory used to hold the task's data structure is automatically
 
+ * dynamically allocated inside the xTaskCreateRestricted() function.  If a task
 
+ * is created using xTaskCreateRestrictedStatic() then the application writer
 
+ * must provide the memory used to hold the task's data structures too.
 
+ * xTaskCreateRestrictedStatic() therefore allows a memory protected task to be
 
+ * created without using any dynamic memory allocation.
 
+ *
 
+ * @param pxTaskDefinition Pointer to a structure that contains a member
 
+ * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
 
+ * documentation) plus an optional stack buffer and the memory region
 
+ * definitions.  If configSUPPORT_STATIC_ALLOCATION is set to 1 the structure
 
+ * contains an additional member, which is used to point to a variable of type
 
+ * StaticTask_t - which is then used to hold the task's data structure.
 
+ *
 
+ * @param pxCreatedTask Used to pass back a handle by which the created task
 
+ * can be referenced.
 
+ *
 
+ * @return pdPASS if the task was successfully created and added to a ready
 
+ * list, otherwise an error code defined in the file projdefs.h
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Create an TaskParameters_t structure that defines the task to be created.
 
+ * // The StaticTask_t variable is only included in the structure when
 
+ * // configSUPPORT_STATIC_ALLOCATION is set to 1.  The PRIVILEGED_DATA macro can
 
+ * // be used to force the variable into the RTOS kernel's privileged data area.
 
+ * static PRIVILEGED_DATA StaticTask_t xTaskBuffer;
 
+ * static const TaskParameters_t xCheckTaskParameters =
 
+ * {
 
+ *  vATask,     // pvTaskCode - the function that implements the task.
 
+ *  "ATask",    // pcName - just a text name for the task to assist debugging.
 
+ *  100,        // usStackDepth - the stack size DEFINED IN WORDS.
 
+ *  NULL,       // pvParameters - passed into the task function as the function parameters.
 
+ *  ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
 
+ *  cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
 
+ *
 
+ *  // xRegions - Allocate up to three separate memory regions for access by
 
+ *  // the task, with appropriate access permissions.  Different processors have
 
+ *  // different memory alignment requirements - refer to the FreeRTOS documentation
 
+ *  // for full information.
 
+ *  {
 
+ *      // Base address                 Length  Parameters
 
+ *      { cReadWriteArray,              32,     portMPU_REGION_READ_WRITE },
 
+ *      { cReadOnlyArray,               32,     portMPU_REGION_READ_ONLY },
 
+ *      { cPrivilegedOnlyAccessArray,   128,    portMPU_REGION_PRIVILEGED_READ_WRITE }
 
+ *  }
 
+ *
 
+ *  &xTaskBuffer; // Holds the task's data structure.
 
+ * };
 
+ *
 
+ * int main( void )
 
+ * {
 
+ * TaskHandle_t xHandle;
 
+ *
 
+ *  // Create a task from the const structure defined above.  The task handle
 
+ *  // is requested (the second parameter is not NULL) but in this case just for
 
+ *  // demonstration purposes as its not actually used.
 
+ *  xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
 
+ *
 
+ *  // Start the scheduler.
 
+ *  vTaskStartScheduler();
 
+ *
 
+ *  // Will only get here if there was insufficient memory to create the idle
 
+ *  // and/or timer task.
 
+ *  for( ;; );
 
+ * }
 
+ * </pre>
 
+ * \defgroup xTaskCreateRestrictedStatic xTaskCreateRestrictedStatic
 
+ * \ingroup Tasks
 
+ */
 
+#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
+    BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
 
+                                            TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );
 
+ * </pre>
 
+ *
 
+ * Memory regions are assigned to a restricted task when the task is created by
 
+ * a call to xTaskCreateRestricted().  These regions can be redefined using
 
+ * vTaskAllocateMPURegions().
 
+ *
 
+ * @param xTask The handle of the task being updated.
 
+ *
 
+ * @param xRegions A pointer to a MemoryRegion_t structure that contains the
 
+ * new memory region definitions.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Define an array of MemoryRegion_t structures that configures an MPU region
 
+ * // allowing read/write access for 1024 bytes starting at the beginning of the
 
+ * // ucOneKByte array.  The other two of the maximum 3 definable regions are
 
+ * // unused so set to zero.
 
+ * static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =
 
+ * {
 
+ *  // Base address     Length      Parameters
 
+ *  { ucOneKByte,       1024,       portMPU_REGION_READ_WRITE },
 
+ *  { 0,                0,          0 },
 
+ *  { 0,                0,          0 }
 
+ * };
 
+ *
 
+ * void vATask( void *pvParameters )
 
+ * {
 
+ *  // This task was created such that it has access to certain regions of
 
+ *  // memory as defined by the MPU configuration.  At some point it is
 
+ *  // desired that these MPU regions are replaced with that defined in the
 
+ *  // xAltRegions const struct above.  Use a call to vTaskAllocateMPURegions()
 
+ *  // for this purpose.  NULL is used as the task handle to indicate that this
 
+ *  // function should modify the MPU regions of the calling task.
 
+ *  vTaskAllocateMPURegions( NULL, xAltRegions );
 
+ *
 
+ *  // Now the task can continue its function, but from this point on can only
 
+ *  // access its stack and the ucOneKByte array (unless any other statically
 
+ *  // defined or shared regions have been declared elsewhere).
 
+ * }
 
+ * </pre>
 
+ * \defgroup xTaskCreateRestricted xTaskCreateRestricted
 
+ * \ingroup Tasks
 
+ */
 
+void vTaskAllocateMPURegions( TaskHandle_t xTask,
 
+                              const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void vTaskDelete( TaskHandle_t xTaskToDelete );
 
+ * </pre>
 
+ *
 
+ * INCLUDE_vTaskDelete must be defined as 1 for this function to be available.
 
+ * See the configuration section for more information.
 
+ *
 
+ * Remove a task from the RTOS real time kernel's management.  The task being
 
+ * deleted will be removed from all ready, blocked, suspended and event lists.
 
+ *
 
+ * NOTE:  The idle task is responsible for freeing the kernel allocated
 
+ * memory from tasks that have been deleted.  It is therefore important that
 
+ * the idle task is not starved of microcontroller processing time if your
 
+ * application makes any calls to vTaskDelete ().  Memory allocated by the
 
+ * task code is not automatically freed, and should be freed before the task
 
+ * is deleted.
 
+ *
 
+ * See the demo application file death.c for sample code that utilises
 
+ * vTaskDelete ().
 
+ *
 
+ * @param xTaskToDelete The handle of the task to be deleted.  Passing NULL will
 
+ * cause the calling task to be deleted.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * void vOtherFunction( void )
 
+ * {
 
+ * TaskHandle_t xHandle;
 
+ *
 
+ *   // Create the task, storing the handle.
 
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
 
+ *
 
+ *   // Use the handle to delete the task.
 
+ *   vTaskDelete( xHandle );
 
+ * }
 
+ * </pre>
 
+ * \defgroup vTaskDelete vTaskDelete
 
+ * \ingroup Tasks
 
+ */
 
+void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
 
+
 
+/*-----------------------------------------------------------
 
+* TASK CONTROL API
 
+*----------------------------------------------------------*/
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void vTaskDelay( const TickType_t xTicksToDelay );
 
+ * </pre>
 
+ *
 
+ * Delay a task for a given number of ticks.  The actual time that the
 
+ * task remains blocked depends on the tick rate.  The constant
 
+ * portTICK_PERIOD_MS can be used to calculate real time from the tick
 
+ * rate - with the resolution of one tick period.
 
+ *
 
+ * INCLUDE_vTaskDelay must be defined as 1 for this function to be available.
 
+ * See the configuration section for more information.
 
+ *
 
+ *
 
+ * vTaskDelay() specifies a time at which the task wishes to unblock relative to
 
+ * the time at which vTaskDelay() is called.  For example, specifying a block
 
+ * period of 100 ticks will cause the task to unblock 100 ticks after
 
+ * vTaskDelay() is called.  vTaskDelay() does not therefore provide a good method
 
+ * of controlling the frequency of a periodic task as the path taken through the
 
+ * code, as well as other task and interrupt activity, will effect the frequency
 
+ * at which vTaskDelay() gets called and therefore the time at which the task
 
+ * next executes.  See xTaskDelayUntil() for an alternative API function designed
 
+ * to facilitate fixed frequency execution.  It does this by specifying an
 
+ * absolute time (rather than a relative time) at which the calling task should
 
+ * unblock.
 
+ *
 
+ * @param xTicksToDelay The amount of time, in tick periods, that
 
+ * the calling task should block.
 
+ *
 
+ * Example usage:
 
+ *
 
+ * void vTaskFunction( void * pvParameters )
 
+ * {
 
+ * // Block for 500ms.
 
+ * const TickType_t xDelay = 500 / portTICK_PERIOD_MS;
 
+ *
 
+ *   for( ;; )
 
+ *   {
 
+ *       // Simply toggle the LED every 500ms, blocking between each toggle.
 
+ *       vToggleLED();
 
+ *       vTaskDelay( xDelay );
 
+ *   }
 
+ * }
 
+ *
 
+ * \defgroup vTaskDelay vTaskDelay
 
+ * \ingroup TaskCtrl
 
+ */
 
+void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * BaseType_t xTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );
 
+ * </pre>
 
+ *
 
+ * INCLUDE_xTaskDelayUntil must be defined as 1 for this function to be available.
 
+ * See the configuration section for more information.
 
+ *
 
+ * Delay a task until a specified time.  This function can be used by periodic
 
+ * tasks to ensure a constant execution frequency.
 
+ *
 
+ * This function differs from vTaskDelay () in one important aspect:  vTaskDelay () will
 
+ * cause a task to block for the specified number of ticks from the time vTaskDelay () is
 
+ * called.  It is therefore difficult to use vTaskDelay () by itself to generate a fixed
 
+ * execution frequency as the time between a task starting to execute and that task
 
+ * calling vTaskDelay () may not be fixed [the task may take a different path though the
 
+ * code between calls, or may get interrupted or preempted a different number of times
 
+ * each time it executes].
 
+ *
 
+ * Whereas vTaskDelay () specifies a wake time relative to the time at which the function
 
+ * is called, xTaskDelayUntil () specifies the absolute (exact) time at which it wishes to
 
+ * unblock.
 
+ *
 
+ * The macro pdMS_TO_TICKS() can be used to calculate the number of ticks from a
 
+ * time specified in milliseconds with a resolution of one tick period.
 
+ *
 
+ * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the
 
+ * task was last unblocked.  The variable must be initialised with the current time
 
+ * prior to its first use (see the example below).  Following this the variable is
 
+ * automatically updated within xTaskDelayUntil ().
 
+ *
 
+ * @param xTimeIncrement The cycle time period.  The task will be unblocked at
 
+ * time *pxPreviousWakeTime + xTimeIncrement.  Calling xTaskDelayUntil with the
 
+ * same xTimeIncrement parameter value will cause the task to execute with
 
+ * a fixed interface period.
 
+ *
 
+ * @return Value which can be used to check whether the task was actually delayed.
 
+ * Will be pdTRUE if the task way delayed and pdFALSE otherwise.  A task will not
 
+ * be delayed if the next expected wake time is in the past.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * // Perform an action every 10 ticks.
 
+ * void vTaskFunction( void * pvParameters )
 
+ * {
 
+ * TickType_t xLastWakeTime;
 
+ * const TickType_t xFrequency = 10;
 
+ * BaseType_t xWasDelayed;
 
+ *
 
+ *     // Initialise the xLastWakeTime variable with the current time.
 
+ *     xLastWakeTime = xTaskGetTickCount ();
 
+ *     for( ;; )
 
+ *     {
 
+ *         // Wait for the next cycle.
 
+ *         xWasDelayed = xTaskDelayUntil( &xLastWakeTime, xFrequency );
 
+ *
 
+ *         // Perform action here. xWasDelayed value can be used to determine
 
+ *         // whether a deadline was missed if the code here took too long.
 
+ *     }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xTaskDelayUntil xTaskDelayUntil
 
+ * \ingroup TaskCtrl
 
+ */
 
+BaseType_t xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
 
+                            const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * vTaskDelayUntil() is the older version of xTaskDelayUntil() and does not
 
+ * return a value.
 
+ */
 
+#define vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement )       \
 
+{                                                                   \
 
+    ( void ) xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); \
 
+}
 
+
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * BaseType_t xTaskAbortDelay( TaskHandle_t xTask );
 
+ * </pre>
 
+ *
 
+ * INCLUDE_xTaskAbortDelay must be defined as 1 in FreeRTOSConfig.h for this
 
+ * function to be available.
 
+ *
 
+ * A task will enter the Blocked state when it is waiting for an event.  The
 
+ * event it is waiting for can be a temporal event (waiting for a time), such
 
+ * as when vTaskDelay() is called, or an event on an object, such as when
 
+ * xQueueReceive() or ulTaskNotifyTake() is called.  If the handle of a task
 
+ * that is in the Blocked state is used in a call to xTaskAbortDelay() then the
 
+ * task will leave the Blocked state, and return from whichever function call
 
+ * placed the task into the Blocked state.
 
+ *
 
+ * There is no 'FromISR' version of this function as an interrupt would need to
 
+ * know which object a task was blocked on in order to know which actions to
 
+ * take.  For example, if the task was blocked on a queue the interrupt handler
 
+ * would then need to know if the queue was locked.
 
+ *
 
+ * @param xTask The handle of the task to remove from the Blocked state.
 
+ *
 
+ * @return If the task referenced by xTask was not in the Blocked state then
 
+ * pdFAIL is returned.  Otherwise pdPASS is returned.
 
+ *
 
+ * \defgroup xTaskAbortDelay xTaskAbortDelay
 
+ * \ingroup TaskCtrl
 
+ */
 
+BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask );
 
+ * </pre>
 
+ *
 
+ * INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available.
 
+ * See the configuration section for more information.
 
+ *
 
+ * Obtain the priority of any task.
 
+ *
 
+ * @param xTask Handle of the task to be queried.  Passing a NULL
 
+ * handle results in the priority of the calling task being returned.
 
+ *
 
+ * @return The priority of xTask.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * void vAFunction( void )
 
+ * {
 
+ * TaskHandle_t xHandle;
 
+ *
 
+ *   // Create a task, storing the handle.
 
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
 
+ *
 
+ *   // ...
 
+ *
 
+ *   // Use the handle to obtain the priority of the created task.
 
+ *   // It was created with tskIDLE_PRIORITY, but may have changed
 
+ *   // it itself.
 
+ *   if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
 
+ *   {
 
+ *       // The task has changed it's priority.
 
+ *   }
 
+ *
 
+ *   // ...
 
+ *
 
+ *   // Is our priority higher than the created task?
 
+ *   if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
 
+ *   {
 
+ *       // Our priority (obtained using NULL handle) is higher.
 
+ *   }
 
+ * }
 
+ * </pre>
 
+ * \defgroup uxTaskPriorityGet uxTaskPriorityGet
 
+ * \ingroup TaskCtrl
 
+ */
 
+UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask );
 
+ * </pre>
 
+ *
 
+ * A version of uxTaskPriorityGet() that can be used from an ISR.
 
+ */
 
+UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * eTaskState eTaskGetState( TaskHandle_t xTask );
 
+ * </pre>
 
+ *
 
+ * INCLUDE_eTaskGetState must be defined as 1 for this function to be available.
 
+ * See the configuration section for more information.
 
+ *
 
+ * Obtain the state of any task.  States are encoded by the eTaskState
 
+ * enumerated type.
 
+ *
 
+ * @param xTask Handle of the task to be queried.
 
+ *
 
+ * @return The state of xTask at the time the function was called.  Note the
 
+ * state of the task might change between the function being called, and the
 
+ * functions return value being tested by the calling task.
 
+ */
 
+eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );
 
+ * </pre>
 
+ *
 
+ * configUSE_TRACE_FACILITY must be defined as 1 for this function to be
 
+ * available.  See the configuration section for more information.
 
+ *
 
+ * Populates a TaskStatus_t structure with information about a task.
 
+ *
 
+ * @param xTask Handle of the task being queried.  If xTask is NULL then
 
+ * information will be returned about the calling task.
 
+ *
 
+ * @param pxTaskStatus A pointer to the TaskStatus_t structure that will be
 
+ * filled with information about the task referenced by the handle passed using
 
+ * the xTask parameter.
 
+ *
 
+ * @xGetFreeStackSpace The TaskStatus_t structure contains a member to report
 
+ * the stack high water mark of the task being queried.  Calculating the stack
 
+ * high water mark takes a relatively long time, and can make the system
 
+ * temporarily unresponsive - so the xGetFreeStackSpace parameter is provided to
 
+ * allow the high water mark checking to be skipped.  The high watermark value
 
+ * will only be written to the TaskStatus_t structure if xGetFreeStackSpace is
 
+ * not set to pdFALSE;
 
+ *
 
+ * @param eState The TaskStatus_t structure contains a member to report the
 
+ * state of the task being queried.  Obtaining the task state is not as fast as
 
+ * a simple assignment - so the eState parameter is provided to allow the state
 
+ * information to be omitted from the TaskStatus_t structure.  To obtain state
 
+ * information then set eState to eInvalid - otherwise the value passed in
 
+ * eState will be reported as the task state in the TaskStatus_t structure.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * void vAFunction( void )
 
+ * {
 
+ * TaskHandle_t xHandle;
 
+ * TaskStatus_t xTaskDetails;
 
+ *
 
+ *  // Obtain the handle of a task from its name.
 
+ *  xHandle = xTaskGetHandle( "Task_Name" );
 
+ *
 
+ *  // Check the handle is not NULL.
 
+ *  configASSERT( xHandle );
 
+ *
 
+ *  // Use the handle to obtain further information about the task.
 
+ *  vTaskGetInfo( xHandle,
 
+ *                &xTaskDetails,
 
+ *                pdTRUE, // Include the high water mark in xTaskDetails.
 
+ *                eInvalid ); // Include the task state in xTaskDetails.
 
+ * }
 
+ * </pre>
 
+ * \defgroup vTaskGetInfo vTaskGetInfo
 
+ * \ingroup TaskCtrl
 
+ */
 
+void vTaskGetInfo( TaskHandle_t xTask,
 
+                   TaskStatus_t * pxTaskStatus,
 
+                   BaseType_t xGetFreeStackSpace,
 
+                   eTaskState eState ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );
 
+ * </pre>
 
+ *
 
+ * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available.
 
+ * See the configuration section for more information.
 
+ *
 
+ * Set the priority of any task.
 
+ *
 
+ * A context switch will occur before the function returns if the priority
 
+ * being set is higher than the currently executing task.
 
+ *
 
+ * @param xTask Handle to the task for which the priority is being set.
 
+ * Passing a NULL handle results in the priority of the calling task being set.
 
+ *
 
+ * @param uxNewPriority The priority to which the task will be set.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * void vAFunction( void )
 
+ * {
 
+ * TaskHandle_t xHandle;
 
+ *
 
+ *   // Create a task, storing the handle.
 
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
 
+ *
 
+ *   // ...
 
+ *
 
+ *   // Use the handle to raise the priority of the created task.
 
+ *   vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
 
+ *
 
+ *   // ...
 
+ *
 
+ *   // Use a NULL handle to raise our priority to the same value.
 
+ *   vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
 
+ * }
 
+ * </pre>
 
+ * \defgroup vTaskPrioritySet vTaskPrioritySet
 
+ * \ingroup TaskCtrl
 
+ */
 
+void vTaskPrioritySet( TaskHandle_t xTask,
 
+                       UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void vTaskSuspend( TaskHandle_t xTaskToSuspend );
 
+ * </pre>
 
+ *
 
+ * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
 
+ * See the configuration section for more information.
 
+ *
 
+ * Suspend any task.  When suspended a task will never get any microcontroller
 
+ * processing time, no matter what its priority.
 
+ *
 
+ * Calls to vTaskSuspend are not accumulative -
 
+ * i.e. calling vTaskSuspend () twice on the same task still only requires one
 
+ * call to vTaskResume () to ready the suspended task.
 
+ *
 
+ * @param xTaskToSuspend Handle to the task being suspended.  Passing a NULL
 
+ * handle will cause the calling task to be suspended.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * void vAFunction( void )
 
+ * {
 
+ * TaskHandle_t xHandle;
 
+ *
 
+ *   // Create a task, storing the handle.
 
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
 
+ *
 
+ *   // ...
 
+ *
 
+ *   // Use the handle to suspend the created task.
 
+ *   vTaskSuspend( xHandle );
 
+ *
 
+ *   // ...
 
+ *
 
+ *   // The created task will not run during this period, unless
 
+ *   // another task calls vTaskResume( xHandle ).
 
+ *
 
+ *   //...
 
+ *
 
+ *
 
+ *   // Suspend ourselves.
 
+ *   vTaskSuspend( NULL );
 
+ *
 
+ *   // We cannot get here unless another task calls vTaskResume
 
+ *   // with our handle as the parameter.
 
+ * }
 
+ * </pre>
 
+ * \defgroup vTaskSuspend vTaskSuspend
 
+ * \ingroup TaskCtrl
 
+ */
 
+void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void vTaskResume( TaskHandle_t xTaskToResume );
 
+ * </pre>
 
+ *
 
+ * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
 
+ * See the configuration section for more information.
 
+ *
 
+ * Resumes a suspended task.
 
+ *
 
+ * A task that has been suspended by one or more calls to vTaskSuspend ()
 
+ * will be made available for running again by a single call to
 
+ * vTaskResume ().
 
+ *
 
+ * @param xTaskToResume Handle to the task being readied.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * void vAFunction( void )
 
+ * {
 
+ * TaskHandle_t xHandle;
 
+ *
 
+ *   // Create a task, storing the handle.
 
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
 
+ *
 
+ *   // ...
 
+ *
 
+ *   // Use the handle to suspend the created task.
 
+ *   vTaskSuspend( xHandle );
 
+ *
 
+ *   // ...
 
+ *
 
+ *   // The created task will not run during this period, unless
 
+ *   // another task calls vTaskResume( xHandle ).
 
+ *
 
+ *   //...
 
+ *
 
+ *
 
+ *   // Resume the suspended task ourselves.
 
+ *   vTaskResume( xHandle );
 
+ *
 
+ *   // The created task will once again get microcontroller processing
 
+ *   // time in accordance with its priority within the system.
 
+ * }
 
+ * </pre>
 
+ * \defgroup vTaskResume vTaskResume
 
+ * \ingroup TaskCtrl
 
+ */
 
+void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void xTaskResumeFromISR( TaskHandle_t xTaskToResume );
 
+ * </pre>
 
+ *
 
+ * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be
 
+ * available.  See the configuration section for more information.
 
+ *
 
+ * An implementation of vTaskResume() that can be called from within an ISR.
 
+ *
 
+ * A task that has been suspended by one or more calls to vTaskSuspend ()
 
+ * will be made available for running again by a single call to
 
+ * xTaskResumeFromISR ().
 
+ *
 
+ * xTaskResumeFromISR() should not be used to synchronise a task with an
 
+ * interrupt if there is a chance that the interrupt could arrive prior to the
 
+ * task being suspended - as this can lead to interrupts being missed. Use of a
 
+ * semaphore as a synchronisation mechanism would avoid this eventuality.
 
+ *
 
+ * @param xTaskToResume Handle to the task being readied.
 
+ *
 
+ * @return pdTRUE if resuming the task should result in a context switch,
 
+ * otherwise pdFALSE. This is used by the ISR to determine if a context switch
 
+ * may be required following the ISR.
 
+ *
 
+ * \defgroup vTaskResumeFromISR vTaskResumeFromISR
 
+ * \ingroup TaskCtrl
 
+ */
 
+BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
 
+
 
+/*-----------------------------------------------------------
 
+* SCHEDULER CONTROL
 
+*----------------------------------------------------------*/
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void vTaskStartScheduler( void );
 
+ * </pre>
 
+ *
 
+ * Starts the real time kernel tick processing.  After calling the kernel
 
+ * has control over which tasks are executed and when.
 
+ *
 
+ * See the demo application file main.c for an example of creating
 
+ * tasks and starting the kernel.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * void vAFunction( void )
 
+ * {
 
+ *   // Create at least one task before starting the kernel.
 
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
 
+ *
 
+ *   // Start the real time kernel with preemption.
 
+ *   vTaskStartScheduler ();
 
+ *
 
+ *   // Will not get here unless a task calls vTaskEndScheduler ()
 
+ * }
 
+ * </pre>
 
+ *
 
+ * \defgroup vTaskStartScheduler vTaskStartScheduler
 
+ * \ingroup SchedulerControl
 
+ */
 
+void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void vTaskEndScheduler( void );
 
+ * </pre>
 
+ *
 
+ * NOTE:  At the time of writing only the x86 real mode port, which runs on a PC
 
+ * in place of DOS, implements this function.
 
+ *
 
+ * Stops the real time kernel tick.  All created tasks will be automatically
 
+ * deleted and multitasking (either preemptive or cooperative) will
 
+ * stop.  Execution then resumes from the point where vTaskStartScheduler ()
 
+ * was called, as if vTaskStartScheduler () had just returned.
 
+ *
 
+ * See the demo application file main. c in the demo/PC directory for an
 
+ * example that uses vTaskEndScheduler ().
 
+ *
 
+ * vTaskEndScheduler () requires an exit function to be defined within the
 
+ * portable layer (see vPortEndScheduler () in port. c for the PC port).  This
 
+ * performs hardware specific operations such as stopping the kernel tick.
 
+ *
 
+ * vTaskEndScheduler () will cause all of the resources allocated by the
 
+ * kernel to be freed - but will not free resources allocated by application
 
+ * tasks.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * void vTaskCode( void * pvParameters )
 
+ * {
 
+ *   for( ;; )
 
+ *   {
 
+ *       // Task code goes here.
 
+ *
 
+ *       // At some point we want to end the real time kernel processing
 
+ *       // so call ...
 
+ *       vTaskEndScheduler ();
 
+ *   }
 
+ * }
 
+ *
 
+ * void vAFunction( void )
 
+ * {
 
+ *   // Create at least one task before starting the kernel.
 
+ *   xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
 
+ *
 
+ *   // Start the real time kernel with preemption.
 
+ *   vTaskStartScheduler ();
 
+ *
 
+ *   // Will only get here when the vTaskCode () task has called
 
+ *   // vTaskEndScheduler ().  When we get here we are back to single task
 
+ *   // execution.
 
+ * }
 
+ * </pre>
 
+ *
 
+ * \defgroup vTaskEndScheduler vTaskEndScheduler
 
+ * \ingroup SchedulerControl
 
+ */
 
+void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * void vTaskSuspendAll( void );
 
+ * </pre>
 
+ *
 
+ * Suspends the scheduler without disabling interrupts.  Context switches will
 
+ * not occur while the scheduler is suspended.
 
+ *
 
+ * After calling vTaskSuspendAll () the calling task will continue to execute
 
+ * without risk of being swapped out until a call to xTaskResumeAll () has been
 
+ * made.
 
+ *
 
+ * API functions that have the potential to cause a context switch (for example,
 
+ * xTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler
 
+ * is suspended.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * void vTask1( void * pvParameters )
 
+ * {
 
+ *   for( ;; )
 
+ *   {
 
+ *       // Task code goes here.
 
+ *
 
+ *       // ...
 
+ *
 
+ *       // At some point the task wants to perform a long operation during
 
+ *       // which it does not want to get swapped out.  It cannot use
 
+ *       // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
 
+ *       // operation may cause interrupts to be missed - including the
 
+ *       // ticks.
 
+ *
 
+ *       // Prevent the real time kernel swapping out the task.
 
+ *       vTaskSuspendAll ();
 
+ *
 
+ *       // Perform the operation here.  There is no need to use critical
 
+ *       // sections as we have all the microcontroller processing time.
 
+ *       // During this time interrupts will still operate and the kernel
 
+ *       // tick count will be maintained.
 
+ *
 
+ *       // ...
 
+ *
 
+ *       // The operation is complete.  Restart the kernel.
 
+ *       xTaskResumeAll ();
 
+ *   }
 
+ * }
 
+ * </pre>
 
+ * \defgroup vTaskSuspendAll vTaskSuspendAll
 
+ * \ingroup SchedulerControl
 
+ */
 
+void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * BaseType_t xTaskResumeAll( void );
 
+ * </pre>
 
+ *
 
+ * Resumes scheduler activity after it was suspended by a call to
 
+ * vTaskSuspendAll().
 
+ *
 
+ * xTaskResumeAll() only resumes the scheduler.  It does not unsuspend tasks
 
+ * that were previously suspended by a call to vTaskSuspend().
 
+ *
 
+ * @return If resuming the scheduler caused a context switch then pdTRUE is
 
+ *         returned, otherwise pdFALSE is returned.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ * void vTask1( void * pvParameters )
 
+ * {
 
+ *   for( ;; )
 
+ *   {
 
+ *       // Task code goes here.
 
+ *
 
+ *       // ...
 
+ *
 
+ *       // At some point the task wants to perform a long operation during
 
+ *       // which it does not want to get swapped out.  It cannot use
 
+ *       // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
 
+ *       // operation may cause interrupts to be missed - including the
 
+ *       // ticks.
 
+ *
 
+ *       // Prevent the real time kernel swapping out the task.
 
+ *       vTaskSuspendAll ();
 
+ *
 
+ *       // Perform the operation here.  There is no need to use critical
 
+ *       // sections as we have all the microcontroller processing time.
 
+ *       // During this time interrupts will still operate and the real
 
+ *       // time kernel tick count will be maintained.
 
+ *
 
+ *       // ...
 
+ *
 
+ *       // The operation is complete.  Restart the kernel.  We want to force
 
+ *       // a context switch - but there is no point if resuming the scheduler
 
+ *       // caused a context switch already.
 
+ *       if( !xTaskResumeAll () )
 
+ *       {
 
+ *            taskYIELD ();
 
+ *       }
 
+ *   }
 
+ * }
 
+ * </pre>
 
+ * \defgroup xTaskResumeAll xTaskResumeAll
 
+ * \ingroup SchedulerControl
 
+ */
 
+BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*-----------------------------------------------------------
 
+* TASK UTILITIES
 
+*----------------------------------------------------------*/
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>TickType_t xTaskGetTickCount( void );</PRE>
 
+ *
 
+ * @return The count of ticks since vTaskStartScheduler was called.
 
+ *
 
+ * \defgroup xTaskGetTickCount xTaskGetTickCount
 
+ * \ingroup TaskUtils
 
+ */
 
+TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>TickType_t xTaskGetTickCountFromISR( void );</PRE>
 
+ *
 
+ * @return The count of ticks since vTaskStartScheduler was called.
 
+ *
 
+ * This is a version of xTaskGetTickCount() that is safe to be called from an
 
+ * ISR - provided that TickType_t is the natural word size of the
 
+ * microcontroller being used or interrupt nesting is either not supported or
 
+ * not being used.
 
+ *
 
+ * \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR
 
+ * \ingroup TaskUtils
 
+ */
 
+TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>uint16_t uxTaskGetNumberOfTasks( void );</PRE>
 
+ *
 
+ * @return The number of tasks that the real time kernel is currently managing.
 
+ * This includes all ready, blocked and suspended tasks.  A task that
 
+ * has been deleted but not yet freed by the idle task will also be
 
+ * included in the count.
 
+ *
 
+ * \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks
 
+ * \ingroup TaskUtils
 
+ */
 
+UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>char *pcTaskGetName( TaskHandle_t xTaskToQuery );</PRE>
 
+ *
 
+ * @return The text (human readable) name of the task referenced by the handle
 
+ * xTaskToQuery.  A task can query its own name by either passing in its own
 
+ * handle, or by setting xTaskToQuery to NULL.
 
+ *
 
+ * \defgroup pcTaskGetName pcTaskGetName
 
+ * \ingroup TaskUtils
 
+ */
 
+char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>TaskHandle_t xTaskGetHandle( const char *pcNameToQuery );</PRE>
 
+ *
 
+ * NOTE:  This function takes a relatively long time to complete and should be
 
+ * used sparingly.
 
+ *
 
+ * @return The handle of the task that has the human readable name pcNameToQuery.
 
+ * NULL is returned if no matching name is found.  INCLUDE_xTaskGetHandle
 
+ * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available.
 
+ *
 
+ * \defgroup pcTaskGetHandle pcTaskGetHandle
 
+ * \ingroup TaskUtils
 
+ */
 
+TaskHandle_t xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+
 
+/**
 
+ * task.h
 
+ * <PRE>UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask );</PRE>
 
+ *
 
+ * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for
 
+ * this function to be available.
 
+ *
 
+ * Returns the high water mark of the stack associated with xTask.  That is,
 
+ * the minimum free stack space there has been (in words, so on a 32 bit machine
 
+ * a value of 1 means 4 bytes) since the task started.  The smaller the returned
 
+ * number the closer the task has come to overflowing its stack.
 
+ *
 
+ * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
 
+ * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
 
+ * user to determine the return type.  It gets around the problem of the value
 
+ * overflowing on 8-bit types without breaking backward compatibility for
 
+ * applications that expect an 8-bit return type.
 
+ *
 
+ * @param xTask Handle of the task associated with the stack to be checked.
 
+ * Set xTask to NULL to check the stack of the calling task.
 
+ *
 
+ * @return The smallest amount of free stack space there has been (in words, so
 
+ * actual spaces on the stack rather than bytes) since the task referenced by
 
+ * xTask was created.
 
+ */
 
+UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task.h
 
+ * <PRE>configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask );</PRE>
 
+ *
 
+ * INCLUDE_uxTaskGetStackHighWaterMark2 must be set to 1 in FreeRTOSConfig.h for
 
+ * this function to be available.
 
+ *
 
+ * Returns the high water mark of the stack associated with xTask.  That is,
 
+ * the minimum free stack space there has been (in words, so on a 32 bit machine
 
+ * a value of 1 means 4 bytes) since the task started.  The smaller the returned
 
+ * number the closer the task has come to overflowing its stack.
 
+ *
 
+ * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
 
+ * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
 
+ * user to determine the return type.  It gets around the problem of the value
 
+ * overflowing on 8-bit types without breaking backward compatibility for
 
+ * applications that expect an 8-bit return type.
 
+ *
 
+ * @param xTask Handle of the task associated with the stack to be checked.
 
+ * Set xTask to NULL to check the stack of the calling task.
 
+ *
 
+ * @return The smallest amount of free stack space there has been (in words, so
 
+ * actual spaces on the stack rather than bytes) since the task referenced by
 
+ * xTask was created.
 
+ */
 
+configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
+
 
+/* When using trace macros it is sometimes necessary to include task.h before
 
+ * FreeRTOS.h.  When this is done TaskHookFunction_t will not yet have been defined,
 
+ * so the following two prototypes will cause a compilation error.  This can be
 
+ * fixed by simply guarding against the inclusion of these two prototypes unless
 
+ * they are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration
 
+ * constant. */
 
+#ifdef configUSE_APPLICATION_TASK_TAG
 
+    #if configUSE_APPLICATION_TASK_TAG == 1
 
+
 
+/**
 
+ * task.h
 
+ * <pre>
 
+ * void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );
 
+ * </pre>
 
+ *
 
+ * Sets pxHookFunction to be the task hook function used by the task xTask.
 
+ * Passing xTask as NULL has the effect of setting the calling tasks hook
 
+ * function.
 
+ */
 
+        void vTaskSetApplicationTaskTag( TaskHandle_t xTask,
 
+                                         TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task.h
 
+ * <pre>
 
+ * void xTaskGetApplicationTaskTag( TaskHandle_t xTask );
 
+ * </pre>
 
+ *
 
+ * Returns the pxHookFunction value assigned to the task xTask.  Do not
 
+ * call from an interrupt service routine - call
 
+ * xTaskGetApplicationTaskTagFromISR() instead.
 
+ */
 
+        TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task.h
 
+ * <pre>
 
+ * void xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask );
 
+ * </pre>
 
+ *
 
+ * Returns the pxHookFunction value assigned to the task xTask.  Can
 
+ * be called from an interrupt service routine.
 
+ */
 
+        TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
+    #endif /* configUSE_APPLICATION_TASK_TAG ==1 */
 
+#endif /* ifdef configUSE_APPLICATION_TASK_TAG */
 
+
 
+#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
 
+
 
+/* Each task contains an array of pointers that is dimensioned by the
 
+ * configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h.  The
 
+ * kernel does not use the pointers itself, so the application writer can use
 
+ * the pointers for any purpose they wish.  The following two functions are
 
+ * used to set and query a pointer respectively. */
 
+    void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
 
+                                            BaseType_t xIndex,
 
+                                            void * pvValue ) PRIVILEGED_FUNCTION;
 
+    void * pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
 
+                                               BaseType_t xIndex ) PRIVILEGED_FUNCTION;
 
+
 
+#endif
 
+
 
+#if ( configCHECK_FOR_STACK_OVERFLOW > 0 )
 
+
 
+     /**
 
+      * task.h
 
+      * <pre>void vApplicationStackOverflowHook( TaskHandle_t xTask char *pcTaskName); </pre>
 
+      *
 
+      * The application stack overflow hook is called when a stack overflow is detected for a task.
 
+      *
 
+      * Details on stack overflow detection can be found here: https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html
 
+      *
 
+      * @param xTask the task that just exceeded its stack boundaries.
 
+      * @param pcTaskName A character string containing the name of the offending task.
 
+      */
 
+     void vApplicationStackOverflowHook( TaskHandle_t xTask,
 
+                                               char * pcTaskName );
 
+
 
+#endif
 
+
 
+#if  (  configUSE_TICK_HOOK > 0 )
 
+    /**
 
+     *  task.h
 
+     *  <pre>void vApplicationTickHook( void ); </pre>
 
+     *
 
+     * This hook function is called in the system tick handler after any OS work is completed.
 
+     */
 
+    void vApplicationTickHook( void ); /*lint !e526 Symbol not defined as it is an application callback. */
 
+
 
+#endif
 
+
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+    /**
 
+     * task.h
 
+     * <pre>void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ) </pre>
 
+     *
 
+     * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Idle Task TCB.  This function is required when
 
+     * configSUPPORT_STATIC_ALLOCATION is set.  For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
 
+     *
 
+     * @param ppxIdleTaskTCBBuffer A handle to a statically allocated TCB buffer
 
+     * @param ppxIdleTaskStackBuffer A handle to a statically allocated Stack buffer for the idle task
 
+     * @param pulIdleTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
 
+     */
 
+    void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer,
 
+                                               StackType_t ** ppxIdleTaskStackBuffer,
 
+                                               uint32_t * pulIdleTaskStackSize ); /*lint !e526 Symbol not defined as it is an application callback. */
 
+#endif
 
+
 
+/**
 
+ * task.h
 
+ * <pre>
 
+ * BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );
 
+ * </pre>
 
+ *
 
+ * Calls the hook function associated with xTask.  Passing xTask as NULL has
 
+ * the effect of calling the Running tasks (the calling task) hook function.
 
+ *
 
+ * pvParameter is passed to the hook function for the task to interpret as it
 
+ * wants.  The return value is the value returned by the task hook function
 
+ * registered by the user.
 
+ */
 
+BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask,
 
+                                         void * pvParameter ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * xTaskGetIdleTaskHandle() is only available if
 
+ * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h.
 
+ *
 
+ * Simply returns the handle of the idle task.  It is not valid to call
 
+ * xTaskGetIdleTaskHandle() before the scheduler has been started.
 
+ */
 
+TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for
 
+ * uxTaskGetSystemState() to be available.
 
+ *
 
+ * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in
 
+ * the system.  TaskStatus_t structures contain, among other things, members
 
+ * for the task handle, task name, task priority, task state, and total amount
 
+ * of run time consumed by the task.  See the TaskStatus_t structure
 
+ * definition in this file for the full member list.
 
+ *
 
+ * NOTE:  This function is intended for debugging use only as its use results in
 
+ * the scheduler remaining suspended for an extended period.
 
+ *
 
+ * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures.
 
+ * The array must contain at least one TaskStatus_t structure for each task
 
+ * that is under the control of the RTOS.  The number of tasks under the control
 
+ * of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function.
 
+ *
 
+ * @param uxArraySize The size of the array pointed to by the pxTaskStatusArray
 
+ * parameter.  The size is specified as the number of indexes in the array, or
 
+ * the number of TaskStatus_t structures contained in the array, not by the
 
+ * number of bytes in the array.
 
+ *
 
+ * @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in
 
+ * FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the
 
+ * total run time (as defined by the run time stats clock, see
 
+ * https://www.FreeRTOS.org/rtos-run-time-stats.html) since the target booted.
 
+ * pulTotalRunTime can be set to NULL to omit the total run time information.
 
+ *
 
+ * @return The number of TaskStatus_t structures that were populated by
 
+ * uxTaskGetSystemState().  This should equal the number returned by the
 
+ * uxTaskGetNumberOfTasks() API function, but will be zero if the value passed
 
+ * in the uxArraySize parameter was too small.
 
+ *
 
+ * Example usage:
 
+ * <pre>
 
+ *  // This example demonstrates how a human readable table of run time stats
 
+ *  // information is generated from raw data provided by uxTaskGetSystemState().
 
+ *  // The human readable table is written to pcWriteBuffer
 
+ *  void vTaskGetRunTimeStats( char *pcWriteBuffer )
 
+ *  {
 
+ *  TaskStatus_t *pxTaskStatusArray;
 
+ *  volatile UBaseType_t uxArraySize, x;
 
+ *  uint32_t ulTotalRunTime, ulStatsAsPercentage;
 
+ *
 
+ *      // Make sure the write buffer does not contain a string.
 
+ * pcWriteBuffer = 0x00;
 
+ *
 
+ *      // Take a snapshot of the number of tasks in case it changes while this
 
+ *      // function is executing.
 
+ *      uxArraySize = uxTaskGetNumberOfTasks();
 
+ *
 
+ *      // Allocate a TaskStatus_t structure for each task.  An array could be
 
+ *      // allocated statically at compile time.
 
+ *      pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) );
 
+ *
 
+ *      if( pxTaskStatusArray != NULL )
 
+ *      {
 
+ *          // Generate raw status information about each task.
 
+ *          uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime );
 
+ *
 
+ *          // For percentage calculations.
 
+ *          ulTotalRunTime /= 100UL;
 
+ *
 
+ *          // Avoid divide by zero errors.
 
+ *          if( ulTotalRunTime > 0 )
 
+ *          {
 
+ *              // For each populated position in the pxTaskStatusArray array,
 
+ *              // format the raw data as human readable ASCII data
 
+ *              for( x = 0; x < uxArraySize; x++ )
 
+ *              {
 
+ *                  // What percentage of the total run time has the task used?
 
+ *                  // This will always be rounded down to the nearest integer.
 
+ *                  // ulTotalRunTimeDiv100 has already been divided by 100.
 
+ *                  ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime;
 
+ *
 
+ *                  if( ulStatsAsPercentage > 0UL )
 
+ *                  {
 
+ *                      sprintf( pcWriteBuffer, "%s\t\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
 
+ *                  }
 
+ *                  else
 
+ *                  {
 
+ *                      // If the percentage is zero here then the task has
 
+ *                      // consumed less than 1% of the total run time.
 
+ *                      sprintf( pcWriteBuffer, "%s\t\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter );
 
+ *                  }
 
+ *
 
+ *                  pcWriteBuffer += strlen( ( char * ) pcWriteBuffer );
 
+ *              }
 
+ *          }
 
+ *
 
+ *          // The array is no longer needed, free the memory it consumes.
 
+ *          vPortFree( pxTaskStatusArray );
 
+ *      }
 
+ *  }
 
+ *  </pre>
 
+ */
 
+UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
 
+                                  const UBaseType_t uxArraySize,
 
+                                  uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>void vTaskList( char *pcWriteBuffer );</PRE>
 
+ *
 
+ * configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must
 
+ * both be defined as 1 for this function to be available.  See the
 
+ * configuration section of the FreeRTOS.org website for more information.
 
+ *
 
+ * NOTE 1: This function will disable interrupts for its duration.  It is
 
+ * not intended for normal application runtime use but as a debug aid.
 
+ *
 
+ * Lists all the current tasks, along with their current state and stack
 
+ * usage high water mark.
 
+ *
 
+ * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or
 
+ * suspended ('S').
 
+ *
 
+ * PLEASE NOTE:
 
+ *
 
+ * This function is provided for convenience only, and is used by many of the
 
+ * demo applications.  Do not consider it to be part of the scheduler.
 
+ *
 
+ * vTaskList() calls uxTaskGetSystemState(), then formats part of the
 
+ * uxTaskGetSystemState() output into a human readable table that displays task:
 
+ * names, states, priority, stack usage and task number.
 
+ * Stack usage specified as the number of unused StackType_t words stack can hold
 
+ * on top of stack - not the number of bytes.
 
+ *
 
+ * vTaskList() has a dependency on the sprintf() C library function that might
 
+ * bloat the code size, use a lot of stack, and provide different results on
 
+ * different platforms.  An alternative, tiny, third party, and limited
 
+ * functionality implementation of sprintf() is provided in many of the
 
+ * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note
 
+ * printf-stdarg.c does not provide a full snprintf() implementation!).
 
+ *
 
+ * It is recommended that production systems call uxTaskGetSystemState()
 
+ * directly to get access to raw stats data, rather than indirectly through a
 
+ * call to vTaskList().
 
+ *
 
+ * @param pcWriteBuffer A buffer into which the above mentioned details
 
+ * will be written, in ASCII form.  This buffer is assumed to be large
 
+ * enough to contain the generated report.  Approximately 40 bytes per
 
+ * task should be sufficient.
 
+ *
 
+ * \defgroup vTaskList vTaskList
 
+ * \ingroup TaskUtils
 
+ */
 
+void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>void vTaskGetRunTimeStats( char *pcWriteBuffer );</PRE>
 
+ *
 
+ * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
 
+ * must both be defined as 1 for this function to be available.  The application
 
+ * must also then provide definitions for
 
+ * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
 
+ * to configure a peripheral timer/counter and return the timers current count
 
+ * value respectively.  The counter should be at least 10 times the frequency of
 
+ * the tick count.
 
+ *
 
+ * NOTE 1: This function will disable interrupts for its duration.  It is
 
+ * not intended for normal application runtime use but as a debug aid.
 
+ *
 
+ * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
 
+ * accumulated execution time being stored for each task.  The resolution
 
+ * of the accumulated time value depends on the frequency of the timer
 
+ * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
 
+ * Calling vTaskGetRunTimeStats() writes the total execution time of each
 
+ * task into a buffer, both as an absolute count value and as a percentage
 
+ * of the total system execution time.
 
+ *
 
+ * NOTE 2:
 
+ *
 
+ * This function is provided for convenience only, and is used by many of the
 
+ * demo applications.  Do not consider it to be part of the scheduler.
 
+ *
 
+ * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the
 
+ * uxTaskGetSystemState() output into a human readable table that displays the
 
+ * amount of time each task has spent in the Running state in both absolute and
 
+ * percentage terms.
 
+ *
 
+ * vTaskGetRunTimeStats() has a dependency on the sprintf() C library function
 
+ * that might bloat the code size, use a lot of stack, and provide different
 
+ * results on different platforms.  An alternative, tiny, third party, and
 
+ * limited functionality implementation of sprintf() is provided in many of the
 
+ * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note
 
+ * printf-stdarg.c does not provide a full snprintf() implementation!).
 
+ *
 
+ * It is recommended that production systems call uxTaskGetSystemState() directly
 
+ * to get access to raw stats data, rather than indirectly through a call to
 
+ * vTaskGetRunTimeStats().
 
+ *
 
+ * @param pcWriteBuffer A buffer into which the execution times will be
 
+ * written, in ASCII form.  This buffer is assumed to be large enough to
 
+ * contain the generated report.  Approximately 40 bytes per task should
 
+ * be sufficient.
 
+ *
 
+ * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats
 
+ * \ingroup TaskUtils
 
+ */
 
+void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>uint32_t ulTaskGetIdleRunTimeCounter( void );</PRE>
 
+ *
 
+ * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
 
+ * must both be defined as 1 for this function to be available.  The application
 
+ * must also then provide definitions for
 
+ * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
 
+ * to configure a peripheral timer/counter and return the timers current count
 
+ * value respectively.  The counter should be at least 10 times the frequency of
 
+ * the tick count.
 
+ *
 
+ * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
 
+ * accumulated execution time being stored for each task.  The resolution
 
+ * of the accumulated time value depends on the frequency of the timer
 
+ * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
 
+ * While uxTaskGetSystemState() and vTaskGetRunTimeStats() writes the total
 
+ * execution time of each task into a buffer, ulTaskGetIdleRunTimeCounter()
 
+ * returns the total execution time of just the idle task.
 
+ *
 
+ * @return The total run time of the idle task.  This is the amount of time the
 
+ * idle task has actually been executing.  The unit of time is dependent on the
 
+ * frequency configured using the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and
 
+ * portGET_RUN_TIME_COUNTER_VALUE() macros.
 
+ *
 
+ * \defgroup ulTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter
 
+ * \ingroup TaskUtils
 
+ */
 
+uint32_t ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>BaseType_t xTaskNotifyIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction );</PRE>
 
+ * <PRE>BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction );</PRE>
 
+ *
 
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
 
+ *
 
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
 
+ * functions to be available.
 
+ *
 
+ * Sends a direct to task notification to a task, with an optional value and
 
+ * action.
 
+ *
 
+ * Each task has a private array of "notification values" (or 'notifications'),
 
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
 
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
 
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
 
+ *
 
+ * Events can be sent to a task using an intermediary object.  Examples of such
 
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
 
+ * are a method of sending an event directly to a task without the need for such
 
+ * an intermediary object.
 
+ *
 
+ * A notification sent to a task can optionally perform an action, such as
 
+ * update, overwrite or increment one of the task's notification values.  In
 
+ * that way task notifications can be used to send data to a task, or be used as
 
+ * light weight and fast binary or counting semaphores.
 
+ *
 
+ * A task can use xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() to
 
+ * [optionally] block to wait for a notification to be pending.  The task does
 
+ * not consume any CPU time while it is in the Blocked state.
 
+ *
 
+ * A notification sent to a task will remain pending until it is cleared by the
 
+ * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their
 
+ * un-indexed equivalents).  If the task was already in the Blocked state to
 
+ * wait for a notification when the notification arrives then the task will
 
+ * automatically be removed from the Blocked state (unblocked) and the
 
+ * notification cleared.
 
+ *
 
+ * **NOTE** Each notification within the array operates independently - a task
 
+ * can only block on one notification within the array at a time and will not be
 
+ * unblocked by a notification sent to any other array index.
 
+ *
 
+ * Backward compatibility information:
 
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
 
+ * all task notification API functions operated on that value. Replacing the
 
+ * single notification value with an array of notification values necessitated a
 
+ * new set of API functions that could address specific notifications within the
 
+ * array.  xTaskNotify() is the original API function, and remains backward
 
+ * compatible by always operating on the notification value at index 0 in the
 
+ * array. Calling xTaskNotify() is equivalent to calling xTaskNotifyIndexed()
 
+ * with the uxIndexToNotify parameter set to 0.
 
+ *
 
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
 
+ * task can be returned from the xTaskCreate() API function used to create the
 
+ * task, and the handle of the currently running task can be obtained by calling
 
+ * xTaskGetCurrentTaskHandle().
 
+ *
 
+ * @param uxIndexToNotify The index within the target task's array of
 
+ * notification values to which the notification is to be sent.  uxIndexToNotify
 
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotify() does
 
+ * not have this parameter and always sends notifications to index 0.
 
+ *
 
+ * @param ulValue Data that can be sent with the notification.  How the data is
 
+ * used depends on the value of the eAction parameter.
 
+ *
 
+ * @param eAction Specifies how the notification updates the task's notification
 
+ * value, if at all.  Valid values for eAction are as follows:
 
+ *
 
+ * eSetBits -
 
+ * The target notification value is bitwise ORed with ulValue.
 
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
 
+ *
 
+ * eIncrement -
 
+ * The target notification value is incremented.  ulValue is not used and
 
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
 
+ *
 
+ * eSetValueWithOverwrite -
 
+ * The target notification value is set to the value of ulValue, even if the
 
+ * task being notified had not yet processed the previous notification at the
 
+ * same array index (the task already had a notification pending at that index).
 
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
 
+ *
 
+ * eSetValueWithoutOverwrite -
 
+ * If the task being notified did not already have a notification pending at the
 
+ * same array index then the target notification value is set to ulValue and
 
+ * xTaskNotifyIndexed() will return pdPASS.  If the task being notified already
 
+ * had a notification pending at the same array index then no action is
 
+ * performed and pdFAIL is returned.
 
+ *
 
+ * eNoAction -
 
+ * The task receives a notification at the specified array index without the
 
+ * notification value at that index being updated.  ulValue is not used and
 
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
 
+ *
 
+ * pulPreviousNotificationValue -
 
+ * Can be used to pass out the subject task's notification value before any
 
+ * bits are modified by the notify function.
 
+ *
 
+ * @return Dependent on the value of eAction.  See the description of the
 
+ * eAction parameter.
 
+ *
 
+ * \defgroup xTaskNotifyIndexed xTaskNotifyIndexed
 
+ * \ingroup TaskNotifications
 
+ */
 
+BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
 
+                               UBaseType_t uxIndexToNotify,
 
+                               uint32_t ulValue,
 
+                               eNotifyAction eAction,
 
+                               uint32_t * pulPreviousNotificationValue ) PRIVILEGED_FUNCTION;
 
+#define xTaskNotify( xTaskToNotify, ulValue, eAction ) \
 
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL )
 
+#define xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction ) \
 
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL )
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>BaseType_t xTaskNotifyAndQueryIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotifyValue );</PRE>
 
+ * <PRE>BaseType_t xTaskNotifyAndQuery( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotifyValue );</PRE>
 
+ *
 
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
 
+ *
 
+ * xTaskNotifyAndQueryIndexed() performs the same operation as
 
+ * xTaskNotifyIndexed() with the addition that it also returns the subject
 
+ * task's prior notification value (the notification value at the time the
 
+ * function is called rather than when the function returns) in the additional
 
+ * pulPreviousNotifyValue parameter.
 
+ *
 
+ * xTaskNotifyAndQuery() performs the same operation as xTaskNotify() with the
 
+ * addition that it also returns the subject task's prior notification value
 
+ * (the notification value as it was at the time the function is called, rather
 
+ * than when the function returns) in the additional pulPreviousNotifyValue
 
+ * parameter.
 
+ *
 
+ * \defgroup xTaskNotifyAndQueryIndexed xTaskNotifyAndQueryIndexed
 
+ * \ingroup TaskNotifications
 
+ */
 
+#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) \
 
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
 
+#define xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotifyValue ) \
 
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>BaseType_t xTaskNotifyIndexedFromISR( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );</PRE>
 
+ * <PRE>BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );</PRE>
 
+ *
 
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
 
+ *
 
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
 
+ * functions to be available.
 
+ *
 
+ * A version of xTaskNotifyIndexed() that can be used from an interrupt service
 
+ * routine (ISR).
 
+ *
 
+ * Each task has a private array of "notification values" (or 'notifications'),
 
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
 
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
 
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
 
+ *
 
+ * Events can be sent to a task using an intermediary object.  Examples of such
 
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
 
+ * are a method of sending an event directly to a task without the need for such
 
+ * an intermediary object.
 
+ *
 
+ * A notification sent to a task can optionally perform an action, such as
 
+ * update, overwrite or increment one of the task's notification values.  In
 
+ * that way task notifications can be used to send data to a task, or be used as
 
+ * light weight and fast binary or counting semaphores.
 
+ *
 
+ * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a
 
+ * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block
 
+ * to wait for a notification value to have a non-zero value.  The task does
 
+ * not consume any CPU time while it is in the Blocked state.
 
+ *
 
+ * A notification sent to a task will remain pending until it is cleared by the
 
+ * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their
 
+ * un-indexed equivalents).  If the task was already in the Blocked state to
 
+ * wait for a notification when the notification arrives then the task will
 
+ * automatically be removed from the Blocked state (unblocked) and the
 
+ * notification cleared.
 
+ *
 
+ * **NOTE** Each notification within the array operates independently - a task
 
+ * can only block on one notification within the array at a time and will not be
 
+ * unblocked by a notification sent to any other array index.
 
+ *
 
+ * Backward compatibility information:
 
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
 
+ * all task notification API functions operated on that value. Replacing the
 
+ * single notification value with an array of notification values necessitated a
 
+ * new set of API functions that could address specific notifications within the
 
+ * array.  xTaskNotifyFromISR() is the original API function, and remains
 
+ * backward compatible by always operating on the notification value at index 0
 
+ * within the array. Calling xTaskNotifyFromISR() is equivalent to calling
 
+ * xTaskNotifyIndexedFromISR() with the uxIndexToNotify parameter set to 0.
 
+ *
 
+ * @param uxIndexToNotify The index within the target task's array of
 
+ * notification values to which the notification is to be sent.  uxIndexToNotify
 
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyFromISR()
 
+ * does not have this parameter and always sends notifications to index 0.
 
+ *
 
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
 
+ * task can be returned from the xTaskCreate() API function used to create the
 
+ * task, and the handle of the currently running task can be obtained by calling
 
+ * xTaskGetCurrentTaskHandle().
 
+ *
 
+ * @param ulValue Data that can be sent with the notification.  How the data is
 
+ * used depends on the value of the eAction parameter.
 
+ *
 
+ * @param eAction Specifies how the notification updates the task's notification
 
+ * value, if at all.  Valid values for eAction are as follows:
 
+ *
 
+ * eSetBits -
 
+ * The task's notification value is bitwise ORed with ulValue.  xTaskNotify()
 
+ * always returns pdPASS in this case.
 
+ *
 
+ * eIncrement -
 
+ * The task's notification value is incremented.  ulValue is not used and
 
+ * xTaskNotify() always returns pdPASS in this case.
 
+ *
 
+ * eSetValueWithOverwrite -
 
+ * The task's notification value is set to the value of ulValue, even if the
 
+ * task being notified had not yet processed the previous notification (the
 
+ * task already had a notification pending).  xTaskNotify() always returns
 
+ * pdPASS in this case.
 
+ *
 
+ * eSetValueWithoutOverwrite -
 
+ * If the task being notified did not already have a notification pending then
 
+ * the task's notification value is set to ulValue and xTaskNotify() will
 
+ * return pdPASS.  If the task being notified already had a notification
 
+ * pending then no action is performed and pdFAIL is returned.
 
+ *
 
+ * eNoAction -
 
+ * The task receives a notification without its notification value being
 
+ * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
 
+ * this case.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken  xTaskNotifyFromISR() will set
 
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
 
+ * task to which the notification was sent to leave the Blocked state, and the
 
+ * unblocked task has a priority higher than the currently running task.  If
 
+ * xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should
 
+ * be requested before the interrupt is exited.  How a context switch is
 
+ * requested from an ISR is dependent on the port - see the documentation page
 
+ * for the port in use.
 
+ *
 
+ * @return Dependent on the value of eAction.  See the description of the
 
+ * eAction parameter.
 
+ *
 
+ * \defgroup xTaskNotifyIndexedFromISR xTaskNotifyIndexedFromISR
 
+ * \ingroup TaskNotifications
 
+ */
 
+BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
 
+                                      UBaseType_t uxIndexToNotify,
 
+                                      uint32_t ulValue,
 
+                                      eNotifyAction eAction,
 
+                                      uint32_t * pulPreviousNotificationValue,
 
+                                      BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) \
 
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
 
+#define xTaskNotifyIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) \
 
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>BaseType_t xTaskNotifyAndQueryIndexedFromISR( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken );</PRE>
 
+ * <PRE>BaseType_t xTaskNotifyAndQueryFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken );</PRE>
 
+ *
 
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
 
+ *
 
+ * xTaskNotifyAndQueryIndexedFromISR() performs the same operation as
 
+ * xTaskNotifyIndexedFromISR() with the addition that it also returns the
 
+ * subject task's prior notification value (the notification value at the time
 
+ * the function is called rather than at the time the function returns) in the
 
+ * additional pulPreviousNotifyValue parameter.
 
+ *
 
+ * xTaskNotifyAndQueryFromISR() performs the same operation as
 
+ * xTaskNotifyFromISR() with the addition that it also returns the subject
 
+ * task's prior notification value (the notification value at the time the
 
+ * function is called rather than at the time the function returns) in the
 
+ * additional pulPreviousNotifyValue parameter.
 
+ *
 
+ * \defgroup xTaskNotifyAndQueryIndexedFromISR xTaskNotifyAndQueryIndexedFromISR
 
+ * \ingroup TaskNotifications
 
+ */
 
+#define xTaskNotifyAndQueryIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \
 
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
 
+#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \
 
+    xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * BaseType_t xTaskNotifyWaitIndexed( UBaseType_t uxIndexToWaitOn, uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
 
+ *
 
+ * BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
 
+ * </pre>
 
+ *
 
+ * Waits for a direct to task notification to be pending at a given index within
 
+ * an array of direct to task notifications.
 
+ *
 
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
 
+ *
 
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
 
+ * function to be available.
 
+ *
 
+ * Each task has a private array of "notification values" (or 'notifications'),
 
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
 
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
 
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
 
+ *
 
+ * Events can be sent to a task using an intermediary object.  Examples of such
 
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
 
+ * are a method of sending an event directly to a task without the need for such
 
+ * an intermediary object.
 
+ *
 
+ * A notification sent to a task can optionally perform an action, such as
 
+ * update, overwrite or increment one of the task's notification values.  In
 
+ * that way task notifications can be used to send data to a task, or be used as
 
+ * light weight and fast binary or counting semaphores.
 
+ *
 
+ * A notification sent to a task will remain pending until it is cleared by the
 
+ * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their
 
+ * un-indexed equivalents).  If the task was already in the Blocked state to
 
+ * wait for a notification when the notification arrives then the task will
 
+ * automatically be removed from the Blocked state (unblocked) and the
 
+ * notification cleared.
 
+ *
 
+ * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a
 
+ * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block
 
+ * to wait for a notification value to have a non-zero value.  The task does
 
+ * not consume any CPU time while it is in the Blocked state.
 
+ *
 
+ * **NOTE** Each notification within the array operates independently - a task
 
+ * can only block on one notification within the array at a time and will not be
 
+ * unblocked by a notification sent to any other array index.
 
+ *
 
+ * Backward compatibility information:
 
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
 
+ * all task notification API functions operated on that value. Replacing the
 
+ * single notification value with an array of notification values necessitated a
 
+ * new set of API functions that could address specific notifications within the
 
+ * array.  xTaskNotifyWait() is the original API function, and remains backward
 
+ * compatible by always operating on the notification value at index 0 in the
 
+ * array. Calling xTaskNotifyWait() is equivalent to calling
 
+ * xTaskNotifyWaitIndexed() with the uxIndexToWaitOn parameter set to 0.
 
+ *
 
+ * @param uxIndexToWaitOn The index within the calling task's array of
 
+ * notification values on which the calling task will wait for a notification to
 
+ * be received.  uxIndexToWaitOn must be less than
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyWait() does
 
+ * not have this parameter and always waits for notifications on index 0.
 
+ *
 
+ * @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value
 
+ * will be cleared in the calling task's notification value before the task
 
+ * checks to see if any notifications are pending, and optionally blocks if no
 
+ * notifications are pending.  Setting ulBitsToClearOnEntry to ULONG_MAX (if
 
+ * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have
 
+ * the effect of resetting the task's notification value to 0.  Setting
 
+ * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged.
 
+ *
 
+ * @param ulBitsToClearOnExit If a notification is pending or received before
 
+ * the calling task exits the xTaskNotifyWait() function then the task's
 
+ * notification value (see the xTaskNotify() API function) is passed out using
 
+ * the pulNotificationValue parameter.  Then any bits that are set in
 
+ * ulBitsToClearOnExit will be cleared in the task's notification value (note
 
+ * *pulNotificationValue is set before any bits are cleared).  Setting
 
+ * ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL
 
+ * (if limits.h is not included) will have the effect of resetting the task's
 
+ * notification value to 0 before the function exits.  Setting
 
+ * ulBitsToClearOnExit to 0 will leave the task's notification value unchanged
 
+ * when the function exits (in which case the value passed out in
 
+ * pulNotificationValue will match the task's notification value).
 
+ *
 
+ * @param pulNotificationValue Used to pass the task's notification value out
 
+ * of the function.  Note the value passed out will not be effected by the
 
+ * clearing of any bits caused by ulBitsToClearOnExit being non-zero.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time that the task should wait in
 
+ * the Blocked state for a notification to be received, should a notification
 
+ * not already be pending when xTaskNotifyWait() was called.  The task
 
+ * will not consume any processing time while it is in the Blocked state.  This
 
+ * is specified in kernel ticks, the macro pdMS_TO_TICKS( value_in_ms ) can be
 
+ * used to convert a time specified in milliseconds to a time specified in
 
+ * ticks.
 
+ *
 
+ * @return If a notification was received (including notifications that were
 
+ * already pending when xTaskNotifyWait was called) then pdPASS is
 
+ * returned.  Otherwise pdFAIL is returned.
 
+ *
 
+ * \defgroup xTaskNotifyWaitIndexed xTaskNotifyWaitIndexed
 
+ * \ingroup TaskNotifications
 
+ */
 
+BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
 
+                                   uint32_t ulBitsToClearOnEntry,
 
+                                   uint32_t ulBitsToClearOnExit,
 
+                                   uint32_t * pulNotificationValue,
 
+                                   TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+#define xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ) \
 
+    xTaskGenericNotifyWait( tskDEFAULT_INDEX_TO_NOTIFY, ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
 
+#define xTaskNotifyWaitIndexed( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ) \
 
+    xTaskGenericNotifyWait( ( uxIndexToWaitOn ), ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>BaseType_t xTaskNotifyGiveIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify );</PRE>
 
+ * <PRE>BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify );</PRE>
 
+ *
 
+ * Sends a direct to task notification to a particular index in the target
 
+ * task's notification array in a manner similar to giving a counting semaphore.
 
+ *
 
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
 
+ *
 
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
 
+ * macros to be available.
 
+ *
 
+ * Each task has a private array of "notification values" (or 'notifications'),
 
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
 
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
 
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
 
+ *
 
+ * Events can be sent to a task using an intermediary object.  Examples of such
 
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
 
+ * are a method of sending an event directly to a task without the need for such
 
+ * an intermediary object.
 
+ *
 
+ * A notification sent to a task can optionally perform an action, such as
 
+ * update, overwrite or increment one of the task's notification values.  In
 
+ * that way task notifications can be used to send data to a task, or be used as
 
+ * light weight and fast binary or counting semaphores.
 
+ *
 
+ * xTaskNotifyGiveIndexed() is a helper macro intended for use when task
 
+ * notifications are used as light weight and faster binary or counting
 
+ * semaphore equivalents.  Actual FreeRTOS semaphores are given using the
 
+ * xSemaphoreGive() API function, the equivalent action that instead uses a task
 
+ * notification is xTaskNotifyGiveIndexed().
 
+ *
 
+ * When task notifications are being used as a binary or counting semaphore
 
+ * equivalent then the task being notified should wait for the notification
 
+ * using the ulTaskNotificationTakeIndexed() API function rather than the
 
+ * xTaskNotifyWaitIndexed() API function.
 
+ *
 
+ * **NOTE** Each notification within the array operates independently - a task
 
+ * can only block on one notification within the array at a time and will not be
 
+ * unblocked by a notification sent to any other array index.
 
+ *
 
+ * Backward compatibility information:
 
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
 
+ * all task notification API functions operated on that value. Replacing the
 
+ * single notification value with an array of notification values necessitated a
 
+ * new set of API functions that could address specific notifications within the
 
+ * array.  xTaskNotifyGive() is the original API function, and remains backward
 
+ * compatible by always operating on the notification value at index 0 in the
 
+ * array. Calling xTaskNotifyGive() is equivalent to calling
 
+ * xTaskNotifyGiveIndexed() with the uxIndexToNotify parameter set to 0.
 
+ *
 
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
 
+ * task can be returned from the xTaskCreate() API function used to create the
 
+ * task, and the handle of the currently running task can be obtained by calling
 
+ * xTaskGetCurrentTaskHandle().
 
+ *
 
+ * @param uxIndexToNotify The index within the target task's array of
 
+ * notification values to which the notification is to be sent.  uxIndexToNotify
 
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyGive()
 
+ * does not have this parameter and always sends notifications to index 0.
 
+ *
 
+ * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the
 
+ * eAction parameter set to eIncrement - so pdPASS is always returned.
 
+ *
 
+ * \defgroup xTaskNotifyGiveIndexed xTaskNotifyGiveIndexed
 
+ * \ingroup TaskNotifications
 
+ */
 
+#define xTaskNotifyGive( xTaskToNotify ) \
 
+    xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( 0 ), eIncrement, NULL )
 
+#define xTaskNotifyGiveIndexed( xTaskToNotify, uxIndexToNotify ) \
 
+    xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( 0 ), eIncrement, NULL )
 
+
 
+/**
 
+ * task. h
 
+ * <PRE>void vTaskNotifyGiveIndexedFromISR( TaskHandle_t xTaskHandle, UBaseType_t uxIndexToNotify, BaseType_t *pxHigherPriorityTaskWoken );</PRE>
 
+ * <PRE>void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken );</PRE>
 
+ *
 
+ * A version of xTaskNotifyGiveIndexed() that can be called from an interrupt
 
+ * service routine (ISR).
 
+ *
 
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
 
+ *
 
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro
 
+ * to be available.
 
+ *
 
+ * Each task has a private array of "notification values" (or 'notifications'),
 
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
 
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
 
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
 
+ *
 
+ * Events can be sent to a task using an intermediary object.  Examples of such
 
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
 
+ * are a method of sending an event directly to a task without the need for such
 
+ * an intermediary object.
 
+ *
 
+ * A notification sent to a task can optionally perform an action, such as
 
+ * update, overwrite or increment one of the task's notification values.  In
 
+ * that way task notifications can be used to send data to a task, or be used as
 
+ * light weight and fast binary or counting semaphores.
 
+ *
 
+ * vTaskNotifyGiveIndexedFromISR() is intended for use when task notifications
 
+ * are used as light weight and faster binary or counting semaphore equivalents.
 
+ * Actual FreeRTOS semaphores are given from an ISR using the
 
+ * xSemaphoreGiveFromISR() API function, the equivalent action that instead uses
 
+ * a task notification is vTaskNotifyGiveIndexedFromISR().
 
+ *
 
+ * When task notifications are being used as a binary or counting semaphore
 
+ * equivalent then the task being notified should wait for the notification
 
+ * using the ulTaskNotificationTakeIndexed() API function rather than the
 
+ * xTaskNotifyWaitIndexed() API function.
 
+ *
 
+ * **NOTE** Each notification within the array operates independently - a task
 
+ * can only block on one notification within the array at a time and will not be
 
+ * unblocked by a notification sent to any other array index.
 
+ *
 
+ * Backward compatibility information:
 
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
 
+ * all task notification API functions operated on that value. Replacing the
 
+ * single notification value with an array of notification values necessitated a
 
+ * new set of API functions that could address specific notifications within the
 
+ * array.  xTaskNotifyFromISR() is the original API function, and remains
 
+ * backward compatible by always operating on the notification value at index 0
 
+ * within the array. Calling xTaskNotifyGiveFromISR() is equivalent to calling
 
+ * xTaskNotifyGiveIndexedFromISR() with the uxIndexToNotify parameter set to 0.
 
+ *
 
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
 
+ * task can be returned from the xTaskCreate() API function used to create the
 
+ * task, and the handle of the currently running task can be obtained by calling
 
+ * xTaskGetCurrentTaskHandle().
 
+ *
 
+ * @param uxIndexToNotify The index within the target task's array of
 
+ * notification values to which the notification is to be sent.  uxIndexToNotify
 
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.
 
+ * xTaskNotifyGiveFromISR() does not have this parameter and always sends
 
+ * notifications to index 0.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken  vTaskNotifyGiveFromISR() will set
 
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
 
+ * task to which the notification was sent to leave the Blocked state, and the
 
+ * unblocked task has a priority higher than the currently running task.  If
 
+ * vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch
 
+ * should be requested before the interrupt is exited.  How a context switch is
 
+ * requested from an ISR is dependent on the port - see the documentation page
 
+ * for the port in use.
 
+ *
 
+ * \defgroup vTaskNotifyGiveIndexedFromISR vTaskNotifyGiveIndexedFromISR
 
+ * \ingroup TaskNotifications
 
+ */
 
+void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
 
+                                    UBaseType_t uxIndexToNotify,
 
+                                    BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+#define vTaskNotifyGiveFromISR( xTaskToNotify, pxHigherPriorityTaskWoken ) \
 
+    vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( pxHigherPriorityTaskWoken ) );
 
+#define vTaskNotifyGiveIndexedFromISR( xTaskToNotify, uxIndexToNotify, pxHigherPriorityTaskWoken ) \
 
+    vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( pxHigherPriorityTaskWoken ) );
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * uint32_t ulTaskNotifyTakeIndexed( UBaseType_t uxIndexToWaitOn, BaseType_t xClearCountOnExit, TickType_t xTicksToWait );
 
+ *
 
+ * uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );
 
+ * </pre>
 
+ *
 
+ * Waits for a direct to task notification on a particular index in the calling
 
+ * task's notification array in a manner similar to taking a counting semaphore.
 
+ *
 
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
 
+ *
 
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
 
+ * function to be available.
 
+ *
 
+ * Each task has a private array of "notification values" (or 'notifications'),
 
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
 
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
 
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
 
+ *
 
+ * Events can be sent to a task using an intermediary object.  Examples of such
 
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
 
+ * are a method of sending an event directly to a task without the need for such
 
+ * an intermediary object.
 
+ *
 
+ * A notification sent to a task can optionally perform an action, such as
 
+ * update, overwrite or increment one of the task's notification values.  In
 
+ * that way task notifications can be used to send data to a task, or be used as
 
+ * light weight and fast binary or counting semaphores.
 
+ *
 
+ * ulTaskNotifyTakeIndexed() is intended for use when a task notification is
 
+ * used as a faster and lighter weight binary or counting semaphore alternative.
 
+ * Actual FreeRTOS semaphores are taken using the xSemaphoreTake() API function,
 
+ * the equivalent action that instead uses a task notification is
 
+ * ulTaskNotifyTakeIndexed().
 
+ *
 
+ * When a task is using its notification value as a binary or counting semaphore
 
+ * other tasks should send notifications to it using the xTaskNotifyGiveIndexed()
 
+ * macro, or xTaskNotifyIndex() function with the eAction parameter set to
 
+ * eIncrement.
 
+ *
 
+ * ulTaskNotifyTakeIndexed() can either clear the task's notification value at
 
+ * the array index specified by the uxIndexToWaitOn parameter to zero on exit,
 
+ * in which case the notification value acts like a binary semaphore, or
 
+ * decrement the notification value on exit, in which case the notification
 
+ * value acts like a counting semaphore.
 
+ *
 
+ * A task can use ulTaskNotifyTakeIndexed() to [optionally] block to wait for
 
+ * a notification.  The task does not consume any CPU time while it is in the
 
+ * Blocked state.
 
+ *
 
+ * Where as xTaskNotifyWaitIndexed() will return when a notification is pending,
 
+ * ulTaskNotifyTakeIndexed() will return when the task's notification value is
 
+ * not zero.
 
+ *
 
+ * **NOTE** Each notification within the array operates independently - a task
 
+ * can only block on one notification within the array at a time and will not be
 
+ * unblocked by a notification sent to any other array index.
 
+ *
 
+ * Backward compatibility information:
 
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
 
+ * all task notification API functions operated on that value. Replacing the
 
+ * single notification value with an array of notification values necessitated a
 
+ * new set of API functions that could address specific notifications within the
 
+ * array.  ulTaskNotifyTake() is the original API function, and remains backward
 
+ * compatible by always operating on the notification value at index 0 in the
 
+ * array. Calling ulTaskNotifyTake() is equivalent to calling
 
+ * ulTaskNotifyTakeIndexed() with the uxIndexToWaitOn parameter set to 0.
 
+ *
 
+ * @param uxIndexToWaitOn The index within the calling task's array of
 
+ * notification values on which the calling task will wait for a notification to
 
+ * be non-zero.  uxIndexToWaitOn must be less than
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES.  xTaskNotifyTake() does
 
+ * not have this parameter and always waits for notifications on index 0.
 
+ *
 
+ * @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's
 
+ * notification value is decremented when the function exits.  In this way the
 
+ * notification value acts like a counting semaphore.  If xClearCountOnExit is
 
+ * not pdFALSE then the task's notification value is cleared to zero when the
 
+ * function exits.  In this way the notification value acts like a binary
 
+ * semaphore.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time that the task should wait in
 
+ * the Blocked state for the task's notification value to be greater than zero,
 
+ * should the count not already be greater than zero when
 
+ * ulTaskNotifyTake() was called.  The task will not consume any processing
 
+ * time while it is in the Blocked state.  This is specified in kernel ticks,
 
+ * the macro pdMS_TO_TICKS( value_in_ms ) can be used to convert a time
 
+ * specified in milliseconds to a time specified in ticks.
 
+ *
 
+ * @return The task's notification count before it is either cleared to zero or
 
+ * decremented (see the xClearCountOnExit parameter).
 
+ *
 
+ * \defgroup ulTaskNotifyTakeIndexed ulTaskNotifyTakeIndexed
 
+ * \ingroup TaskNotifications
 
+ */
 
+uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
 
+                                  BaseType_t xClearCountOnExit,
 
+                                  TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+#define ulTaskNotifyTake( xClearCountOnExit, xTicksToWait ) \
 
+    ulTaskGenericNotifyTake( ( tskDEFAULT_INDEX_TO_NOTIFY ), ( xClearCountOnExit ), ( xTicksToWait ) )
 
+#define ulTaskNotifyTakeIndexed( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ) \
 
+    ulTaskGenericNotifyTake( ( uxIndexToWaitOn ), ( xClearCountOnExit ), ( xTicksToWait ) )
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * BaseType_t xTaskNotifyStateClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToCLear );
 
+ *
 
+ * BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );
 
+ * </pre>
 
+ *
 
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
 
+ *
 
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
 
+ * functions to be available.
 
+ *
 
+ * Each task has a private array of "notification values" (or 'notifications'),
 
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
 
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
 
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
 
+ *
 
+ * If a notification is sent to an index within the array of notifications then
 
+ * the notification at that index is said to be 'pending' until it is read or
 
+ * explicitly cleared by the receiving task.  xTaskNotifyStateClearIndexed()
 
+ * is the function that clears a pending notification without reading the
 
+ * notification value.  The notification value at the same array index is not
 
+ * altered.  Set xTask to NULL to clear the notification state of the calling
 
+ * task.
 
+ *
 
+ * Backward compatibility information:
 
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
 
+ * all task notification API functions operated on that value. Replacing the
 
+ * single notification value with an array of notification values necessitated a
 
+ * new set of API functions that could address specific notifications within the
 
+ * array.  xTaskNotifyStateClear() is the original API function, and remains
 
+ * backward compatible by always operating on the notification value at index 0
 
+ * within the array. Calling xTaskNotifyStateClear() is equivalent to calling
 
+ * xTaskNotifyStateClearIndexed() with the uxIndexToNotify parameter set to 0.
 
+ *
 
+ * @param xTask The handle of the RTOS task that will have a notification state
 
+ * cleared.  Set xTask to NULL to clear a notification state in the calling
 
+ * task.  To obtain a task's handle create the task using xTaskCreate() and
 
+ * make use of the pxCreatedTask parameter, or create the task using
 
+ * xTaskCreateStatic() and store the returned value, or use the task's name in
 
+ * a call to xTaskGetHandle().
 
+ *
 
+ * @param uxIndexToClear The index within the target task's array of
 
+ * notification values to act upon.  For example, setting uxIndexToClear to 1
 
+ * will clear the state of the notification at index 1 within the array.
 
+ * uxIndexToClear must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.
 
+ * ulTaskNotifyStateClear() does not have this parameter and always acts on the
 
+ * notification at index 0.
 
+ *
 
+ * @return pdTRUE if the task's notification state was set to
 
+ * eNotWaitingNotification, otherwise pdFALSE.
 
+ *
 
+ * \defgroup xTaskNotifyStateClearIndexed xTaskNotifyStateClearIndexed
 
+ * \ingroup TaskNotifications
 
+ */
 
+BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask,
 
+                                         UBaseType_t uxIndexToClear ) PRIVILEGED_FUNCTION;
 
+#define xTaskNotifyStateClear( xTask ) \
 
+    xTaskGenericNotifyStateClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ) )
 
+#define xTaskNotifyStateClearIndexed( xTask, uxIndexToClear ) \
 
+    xTaskGenericNotifyStateClear( ( xTask ), ( uxIndexToClear ) )
 
+
 
+/**
 
+ * task. h
 
+ * <pre>
 
+ * uint32_t ulTaskNotifyValueClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToClear, uint32_t ulBitsToClear );
 
+ *
 
+ * uint32_t ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear );
 
+ * </pre>
 
+ *
 
+ * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
 
+ *
 
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these
 
+ * functions to be available.
 
+ *
 
+ * Each task has a private array of "notification values" (or 'notifications'),
 
+ * each of which is a 32-bit unsigned integer (uint32_t).  The constant
 
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
 
+ * array, and (for backward compatibility) defaults to 1 if left undefined.
 
+ * Prior to FreeRTOS V10.4.0 there was only one notification value per task.
 
+ *
 
+ * ulTaskNotifyValueClearIndexed() clears the bits specified by the
 
+ * ulBitsToClear bit mask in the notification value at array index uxIndexToClear
 
+ * of the task referenced by xTask.
 
+ *
 
+ * Backward compatibility information:
 
+ * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and
 
+ * all task notification API functions operated on that value. Replacing the
 
+ * single notification value with an array of notification values necessitated a
 
+ * new set of API functions that could address specific notifications within the
 
+ * array.  ulTaskNotifyValueClear() is the original API function, and remains
 
+ * backward compatible by always operating on the notification value at index 0
 
+ * within the array. Calling ulTaskNotifyValueClear() is equivalent to calling
 
+ * ulTaskNotifyValueClearIndexed() with the uxIndexToClear parameter set to 0.
 
+ *
 
+ * @param xTask The handle of the RTOS task that will have bits in one of its
 
+ * notification values cleared. Set xTask to NULL to clear bits in a
 
+ * notification value of the calling task.  To obtain a task's handle create the
 
+ * task using xTaskCreate() and make use of the pxCreatedTask parameter, or
 
+ * create the task using xTaskCreateStatic() and store the returned value, or
 
+ * use the task's name in a call to xTaskGetHandle().
 
+ *
 
+ * @param uxIndexToClear The index within the target task's array of
 
+ * notification values in which to clear the bits.  uxIndexToClear
 
+ * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES.
 
+ * ulTaskNotifyValueClear() does not have this parameter and always clears bits
 
+ * in the notification value at index 0.
 
+ *
 
+ * @param ulBitsToClear Bit mask of the bits to clear in the notification value of
 
+ * xTask. Set a bit to 1 to clear the corresponding bits in the task's notification
 
+ * value. Set ulBitsToClear to 0xffffffff (UINT_MAX on 32-bit architectures) to clear
 
+ * the notification value to 0.  Set ulBitsToClear to 0 to query the task's
 
+ * notification value without clearing any bits.
 
+ *
 
+ *
 
+ * @return The value of the target task's notification value before the bits
 
+ * specified by ulBitsToClear were cleared.
 
+ * \defgroup ulTaskNotifyValueClear ulTaskNotifyValueClear
 
+ * \ingroup TaskNotifications
 
+ */
 
+uint32_t ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
 
+                                        UBaseType_t uxIndexToClear,
 
+                                        uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
 
+#define ulTaskNotifyValueClear( xTask, ulBitsToClear ) \
 
+    ulTaskGenericNotifyValueClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulBitsToClear ) )
 
+#define ulTaskNotifyValueClearIndexed( xTask, uxIndexToClear, ulBitsToClear ) \
 
+    ulTaskGenericNotifyValueClear( ( xTask ), ( uxIndexToClear ), ( ulBitsToClear ) )
 
+
 
+/**
 
+ * task.h
 
+ * <pre>
 
+ * void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut );
 
+ * </pre>
 
+ *
 
+ * Capture the current time for future use with xTaskCheckForTimeOut().
 
+ *
 
+ * @param pxTimeOut Pointer to a timeout object into which the current time
 
+ * is to be captured.  The captured time includes the tick count and the number
 
+ * of times the tick count has overflowed since the system first booted.
 
+ * \defgroup vTaskSetTimeOutState vTaskSetTimeOutState
 
+ * \ingroup TaskCtrl
 
+ */
 
+void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task.h
 
+ * <pre>
 
+ * BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait );
 
+ * </pre>
 
+ *
 
+ * Determines if pxTicksToWait ticks has passed since a time was captured
 
+ * using a call to vTaskSetTimeOutState().  The captured time includes the tick
 
+ * count and the number of times the tick count has overflowed.
 
+ *
 
+ * @param pxTimeOut The time status as captured previously using
 
+ * vTaskSetTimeOutState. If the timeout has not yet occurred, it is updated
 
+ * to reflect the current time status.
 
+ * @param pxTicksToWait The number of ticks to check for timeout i.e. if
 
+ * pxTicksToWait ticks have passed since pxTimeOut was last updated (either by
 
+ * vTaskSetTimeOutState() or xTaskCheckForTimeOut()), the timeout has occurred.
 
+ * If the timeout has not occurred, pxTicksToWait is updated to reflect the
 
+ * number of remaining ticks.
 
+ *
 
+ * @return If timeout has occurred, pdTRUE is returned. Otherwise pdFALSE is
 
+ * returned and pxTicksToWait is updated to reflect the number of remaining
 
+ * ticks.
 
+ *
 
+ * @see https://www.FreeRTOS.org/xTaskCheckForTimeOut.html
 
+ *
 
+ * Example Usage:
 
+ * <pre>
 
+ *  // Driver library function used to receive uxWantedBytes from an Rx buffer
 
+ *  // that is filled by a UART interrupt. If there are not enough bytes in the
 
+ *  // Rx buffer then the task enters the Blocked state until it is notified that
 
+ *  // more data has been placed into the buffer. If there is still not enough
 
+ *  // data then the task re-enters the Blocked state, and xTaskCheckForTimeOut()
 
+ *  // is used to re-calculate the Block time to ensure the total amount of time
 
+ *  // spent in the Blocked state does not exceed MAX_TIME_TO_WAIT. This
 
+ *  // continues until either the buffer contains at least uxWantedBytes bytes,
 
+ *  // or the total amount of time spent in the Blocked state reaches
 
+ *  // MAX_TIME_TO_WAIT – at which point the task reads however many bytes are
 
+ *  // available up to a maximum of uxWantedBytes.
 
+ *
 
+ *  size_t xUART_Receive( uint8_t *pucBuffer, size_t uxWantedBytes )
 
+ *  {
 
+ *  size_t uxReceived = 0;
 
+ *  TickType_t xTicksToWait = MAX_TIME_TO_WAIT;
 
+ *  TimeOut_t xTimeOut;
 
+ *
 
+ *      // Initialize xTimeOut.  This records the time at which this function
 
+ *      // was entered.
 
+ *      vTaskSetTimeOutState( &xTimeOut );
 
+ *
 
+ *      // Loop until the buffer contains the wanted number of bytes, or a
 
+ *      // timeout occurs.
 
+ *      while( UART_bytes_in_rx_buffer( pxUARTInstance ) < uxWantedBytes )
 
+ *      {
 
+ *          // The buffer didn't contain enough data so this task is going to
 
+ *          // enter the Blocked state. Adjusting xTicksToWait to account for
 
+ *          // any time that has been spent in the Blocked state within this
 
+ *          // function so far to ensure the total amount of time spent in the
 
+ *          // Blocked state does not exceed MAX_TIME_TO_WAIT.
 
+ *          if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) != pdFALSE )
 
+ *          {
 
+ *              //Timed out before the wanted number of bytes were available,
 
+ *              // exit the loop.
 
+ *              break;
 
+ *          }
 
+ *
 
+ *          // Wait for a maximum of xTicksToWait ticks to be notified that the
 
+ *          // receive interrupt has placed more data into the buffer.
 
+ *          ulTaskNotifyTake( pdTRUE, xTicksToWait );
 
+ *      }
 
+ *
 
+ *      // Attempt to read uxWantedBytes from the receive buffer into pucBuffer.
 
+ *      // The actual number of bytes read (which might be less than
 
+ *      // uxWantedBytes) is returned.
 
+ *      uxReceived = UART_read_from_receive_buffer( pxUARTInstance,
 
+ *                                                  pucBuffer,
 
+ *                                                  uxWantedBytes );
 
+ *
 
+ *      return uxReceived;
 
+ *  }
 
+ * </pre>
 
+ * \defgroup xTaskCheckForTimeOut xTaskCheckForTimeOut
 
+ * \ingroup TaskCtrl
 
+ */
 
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
 
+                                 TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * task.h
 
+ * <pre>
 
+ * BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp );
 
+ * </pre>
 
+ *
 
+ * This function corrects the tick count value after the application code has held
 
+ * interrupts disabled for an extended period resulting in tick interrupts having
 
+ * been missed.
 
+ *
 
+ * This function is similar to vTaskStepTick(), however, unlike
 
+ * vTaskStepTick(), xTaskCatchUpTicks() may move the tick count forward past a
 
+ * time at which a task should be removed from the blocked state.  That means
 
+ * tasks may have to be removed from the blocked state as the tick count is
 
+ * moved.
 
+ *
 
+ * @param xTicksToCatchUp The number of tick interrupts that have been missed due to
 
+ * interrupts being disabled.  Its value is not computed automatically, so must be
 
+ * computed by the application writer.
 
+ *
 
+ * @return pdTRUE if moving the tick count forward resulted in a task leaving the
 
+ * blocked state and a context switch being performed.  Otherwise pdFALSE.
 
+ *
 
+ * \defgroup xTaskCatchUpTicks xTaskCatchUpTicks
 
+ * \ingroup TaskCtrl
 
+ */
 
+BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) PRIVILEGED_FUNCTION;
 
+
 
+
 
+/*-----------------------------------------------------------
 
+* SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
 
+*----------------------------------------------------------*/
 
+
 
+/*
 
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
 
+ * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
 
+ * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
 
+ *
 
+ * Called from the real time kernel tick (either preemptive or cooperative),
 
+ * this increments the tick count and checks if any tasks that are blocked
 
+ * for a finite period required removing from a blocked list and placing on
 
+ * a ready list.  If a non-zero value is returned then a context switch is
 
+ * required because either:
 
+ *   + A task was removed from a blocked list because its timeout had expired,
 
+ *     or
 
+ *   + Time slicing is in use and there is a task of equal priority to the
 
+ *     currently running task.
 
+ */
 
+BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
 
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
 
+ *
 
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
 
+ *
 
+ * Removes the calling task from the ready list and places it both
 
+ * on the list of tasks waiting for a particular event, and the
 
+ * list of delayed tasks.  The task will be removed from both lists
 
+ * and replaced on the ready list should either the event occur (and
 
+ * there be no higher priority tasks waiting on the same event) or
 
+ * the delay period expires.
 
+ *
 
+ * The 'unordered' version replaces the event list item value with the
 
+ * xItemValue value, and inserts the list item at the end of the list.
 
+ *
 
+ * The 'ordered' version uses the existing event list item value (which is the
 
+ * owning task's priority) to insert the list item into the event list in task
 
+ * priority order.
 
+ *
 
+ * @param pxEventList The list containing tasks that are blocked waiting
 
+ * for the event to occur.
 
+ *
 
+ * @param xItemValue The item value to use for the event list item when the
 
+ * event list is not ordered by task priority.
 
+ *
 
+ * @param xTicksToWait The maximum amount of time that the task should wait
 
+ * for the event to occur.  This is specified in kernel ticks, the constant
 
+ * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time
 
+ * period.
 
+ */
 
+void vTaskPlaceOnEventList( List_t * const pxEventList,
 
+                            const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+void vTaskPlaceOnUnorderedEventList( List_t * pxEventList,
 
+                                     const TickType_t xItemValue,
 
+                                     const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
 
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
 
+ *
 
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
 
+ *
 
+ * This function performs nearly the same function as vTaskPlaceOnEventList().
 
+ * The difference being that this function does not permit tasks to block
 
+ * indefinitely, whereas vTaskPlaceOnEventList() does.
 
+ *
 
+ */
 
+void vTaskPlaceOnEventListRestricted( List_t * const pxEventList,
 
+                                      TickType_t xTicksToWait,
 
+                                      const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
 
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
 
+ *
 
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
 
+ *
 
+ * Removes a task from both the specified event list and the list of blocked
 
+ * tasks, and places it on a ready queue.
 
+ *
 
+ * xTaskRemoveFromEventList()/vTaskRemoveFromUnorderedEventList() will be called
 
+ * if either an event occurs to unblock a task, or the block timeout period
 
+ * expires.
 
+ *
 
+ * xTaskRemoveFromEventList() is used when the event list is in task priority
 
+ * order.  It removes the list item from the head of the event list as that will
 
+ * have the highest priority owning task of all the tasks on the event list.
 
+ * vTaskRemoveFromUnorderedEventList() is used when the event list is not
 
+ * ordered and the event list items hold something other than the owning tasks
 
+ * priority.  In this case the event list item value is updated to the value
 
+ * passed in the xItemValue parameter.
 
+ *
 
+ * @return pdTRUE if the task being removed has a higher priority than the task
 
+ * making the call, otherwise pdFALSE.
 
+ */
 
+BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION;
 
+void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem,
 
+                                        const TickType_t xItemValue ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
 
+ * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
 
+ * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
 
+ *
 
+ * Sets the pointer to the current TCB to the TCB of the highest priority task
 
+ * that is ready to run.
 
+ */
 
+portDONT_DISCARD void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE.  THEY ARE USED BY
 
+ * THE EVENT BITS MODULE.
 
+ */
 
+TickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Return the handle of the calling task.
 
+ */
 
+TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Shortcut used by the queue implementation to prevent unnecessary call to
 
+ * taskYIELD();
 
+ */
 
+void vTaskMissedYield( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Returns the scheduler state as taskSCHEDULER_RUNNING,
 
+ * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED.
 
+ */
 
+BaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Raises the priority of the mutex holder to that of the calling task should
 
+ * the mutex holder have a priority less than the calling task.
 
+ */
 
+BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Set the priority of a task back to its proper priority in the case that it
 
+ * inherited a higher priority while it was holding a semaphore.
 
+ */
 
+BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * If a higher priority task attempting to obtain a mutex caused a lower
 
+ * priority task to inherit the higher priority task's priority - but the higher
 
+ * priority task then timed out without obtaining the mutex, then the lower
 
+ * priority task will disinherit the priority again - but only down as far as
 
+ * the highest priority task that is still waiting for the mutex (if there were
 
+ * more than one task waiting for the mutex).
 
+ */
 
+void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder,
 
+                                          UBaseType_t uxHighestPriorityWaitingTask ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Get the uxTCBNumber assigned to the task referenced by the xTask parameter.
 
+ */
 
+UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Set the uxTaskNumber of the task referenced by the xTask parameter to
 
+ * uxHandle.
 
+ */
 
+void vTaskSetTaskNumber( TaskHandle_t xTask,
 
+                         const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Only available when configUSE_TICKLESS_IDLE is set to 1.
 
+ * If tickless mode is being used, or a low power mode is implemented, then
 
+ * the tick interrupt will not execute during idle periods.  When this is the
 
+ * case, the tick count value maintained by the scheduler needs to be kept up
 
+ * to date with the actual execution time by being skipped forward by a time
 
+ * equal to the idle period.
 
+ */
 
+void vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Only available when configUSE_TICKLESS_IDLE is set to 1.
 
+ * Provided for use within portSUPPRESS_TICKS_AND_SLEEP() to allow the port
 
+ * specific sleep function to determine if it is ok to proceed with the sleep,
 
+ * and if it is ok to proceed, if it is ok to sleep indefinitely.
 
+ *
 
+ * This function is necessary because portSUPPRESS_TICKS_AND_SLEEP() is only
 
+ * called with the scheduler suspended, not from within a critical section.  It
 
+ * is therefore possible for an interrupt to request a context switch between
 
+ * portSUPPRESS_TICKS_AND_SLEEP() and the low power mode actually being
 
+ * entered.  eTaskConfirmSleepModeStatus() should be called from a short
 
+ * critical section between the timer being stopped and the sleep mode being
 
+ * entered to ensure it is ok to proceed into the sleep mode.
 
+ */
 
+eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * For internal use only.  Increment the mutex held count when a mutex is
 
+ * taken and return the handle of the task that has taken the mutex.
 
+ */
 
+TaskHandle_t pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * For internal use only.  Same as vTaskSetTimeOutState(), but without a critical
 
+ * section.
 
+ */
 
+void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
 
+
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    }
 
+#endif
 
+/* *INDENT-ON* */
 
+#endif /* INC_TASK_H */

+ 1353 - 0
FreeRTOS/Source/include/timers.h
Vedi File 

@@ -0,0 +1,1353 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+
 
+#ifndef TIMERS_H
 
+#define TIMERS_H
 
+
 
+#ifndef INC_FREERTOS_H
 
+    #error "include FreeRTOS.h must appear in source files before include timers.h"
 
+#endif
 
+
 
+/*lint -save -e537 This headers are only multiply included if the application code
 
+ * happens to also be including task.h. */
 
+#include "task.h"
 
+/*lint -restore */
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    extern "C" {
 
+#endif
 
+/* *INDENT-ON* */
 
+
 
+/*-----------------------------------------------------------
 
+* MACROS AND DEFINITIONS
 
+*----------------------------------------------------------*/
 
+
 
+/* IDs for commands that can be sent/received on the timer queue.  These are to
 
+ * be used solely through the macros that make up the public software timer API,
 
+ * as defined below.  The commands that are sent from interrupts must use the
 
+ * highest numbers as tmrFIRST_FROM_ISR_COMMAND is used to determine if the task
 
+ * or interrupt version of the queue send function should be used. */
 
+#define tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR    ( ( BaseType_t ) -2 )
 
+#define tmrCOMMAND_EXECUTE_CALLBACK             ( ( BaseType_t ) -1 )
 
+#define tmrCOMMAND_START_DONT_TRACE             ( ( BaseType_t ) 0 )
 
+#define tmrCOMMAND_START                        ( ( BaseType_t ) 1 )
 
+#define tmrCOMMAND_RESET                        ( ( BaseType_t ) 2 )
 
+#define tmrCOMMAND_STOP                         ( ( BaseType_t ) 3 )
 
+#define tmrCOMMAND_CHANGE_PERIOD                ( ( BaseType_t ) 4 )
 
+#define tmrCOMMAND_DELETE                       ( ( BaseType_t ) 5 )
 
+
 
+#define tmrFIRST_FROM_ISR_COMMAND               ( ( BaseType_t ) 6 )
 
+#define tmrCOMMAND_START_FROM_ISR               ( ( BaseType_t ) 6 )
 
+#define tmrCOMMAND_RESET_FROM_ISR               ( ( BaseType_t ) 7 )
 
+#define tmrCOMMAND_STOP_FROM_ISR                ( ( BaseType_t ) 8 )
 
+#define tmrCOMMAND_CHANGE_PERIOD_FROM_ISR       ( ( BaseType_t ) 9 )
 
+
 
+
 
+/**
 
+ * Type by which software timers are referenced.  For example, a call to
 
+ * xTimerCreate() returns an TimerHandle_t variable that can then be used to
 
+ * reference the subject timer in calls to other software timer API functions
 
+ * (for example, xTimerStart(), xTimerReset(), etc.).
 
+ */
 
+struct tmrTimerControl; /* The old naming convention is used to prevent breaking kernel aware debuggers. */
 
+typedef struct tmrTimerControl * TimerHandle_t;
 
+
 
+/*
 
+ * Defines the prototype to which timer callback functions must conform.
 
+ */
 
+typedef void (* TimerCallbackFunction_t)( TimerHandle_t xTimer );
 
+
 
+/*
 
+ * Defines the prototype to which functions used with the
 
+ * xTimerPendFunctionCallFromISR() function must conform.
 
+ */
 
+typedef void (* PendedFunction_t)( void *,
 
+                                   uint32_t );
 
+
 
+/**
 
+ * TimerHandle_t xTimerCreate(  const char * const pcTimerName,
 
+ *                              TickType_t xTimerPeriodInTicks,
 
+ *                              UBaseType_t uxAutoReload,
 
+ *                              void * pvTimerID,
 
+ *                              TimerCallbackFunction_t pxCallbackFunction );
 
+ *
 
+ * Creates a new software timer instance, and returns a handle by which the
 
+ * created software timer can be referenced.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, software timers use a block
 
+ * of memory, in which the timer data structure is stored.  If a software timer
 
+ * is created using xTimerCreate() then the required memory is automatically
 
+ * dynamically allocated inside the xTimerCreate() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a software timer is created using
 
+ * xTimerCreateStatic() then the application writer must provide the memory that
 
+ * will get used by the software timer.  xTimerCreateStatic() therefore allows a
 
+ * software timer to be created without using any dynamic memory allocation.
 
+ *
 
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
 
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
 
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a
 
+ * timer into the active state.
 
+ *
 
+ * @param pcTimerName A text name that is assigned to the timer.  This is done
 
+ * purely to assist debugging.  The kernel itself only ever references a timer
 
+ * by its handle, and never by its name.
 
+ *
 
+ * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
 
+ * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
 
+ * has been specified in milliseconds.  For example, if the timer must expire
 
+ * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
 
+ * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
 
+ * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
 
+ * equal to 1000.  Time timer period must be greater than 0.
 
+ *
 
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
 
+ * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
 
+ * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
 
+ * enter the dormant state after it expires.
 
+ *
 
+ * @param pvTimerID An identifier that is assigned to the timer being created.
 
+ * Typically this would be used in the timer callback function to identify which
 
+ * timer expired when the same callback function is assigned to more than one
 
+ * timer.
 
+ *
 
+ * @param pxCallbackFunction The function to call when the timer expires.
 
+ * Callback functions must have the prototype defined by TimerCallbackFunction_t,
 
+ * which is "void vCallbackFunction( TimerHandle_t xTimer );".
 
+ *
 
+ * @return If the timer is successfully created then a handle to the newly
 
+ * created timer is returned.  If the timer cannot be created because there is
 
+ * insufficient FreeRTOS heap remaining to allocate the timer
 
+ * structures then NULL is returned.
 
+ *
 
+ * Example usage:
 
+ * @verbatim
 
+ * #define NUM_TIMERS 5
 
+ *
 
+ * // An array to hold handles to the created timers.
 
+ * TimerHandle_t xTimers[ NUM_TIMERS ];
 
+ *
 
+ * // An array to hold a count of the number of times each timer expires.
 
+ * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 };
 
+ *
 
+ * // Define a callback function that will be used by multiple timer instances.
 
+ * // The callback function does nothing but count the number of times the
 
+ * // associated timer expires, and stop the timer once the timer has expired
 
+ * // 10 times.
 
+ * void vTimerCallback( TimerHandle_t pxTimer )
 
+ * {
 
+ * int32_t lArrayIndex;
 
+ * const int32_t xMaxExpiryCountBeforeStopping = 10;
 
+ *
 
+ *     // Optionally do something if the pxTimer parameter is NULL.
 
+ *     configASSERT( pxTimer );
 
+ *
 
+ *     // Which timer expired?
 
+ *     lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer );
 
+ *
 
+ *     // Increment the number of times that pxTimer has expired.
 
+ *     lExpireCounters[ lArrayIndex ] += 1;
 
+ *
 
+ *     // If the timer has expired 10 times then stop it from running.
 
+ *     if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping )
 
+ *     {
 
+ *         // Do not use a block time if calling a timer API function from a
 
+ *         // timer callback function, as doing so could cause a deadlock!
 
+ *         xTimerStop( pxTimer, 0 );
 
+ *     }
 
+ * }
 
+ *
 
+ * void main( void )
 
+ * {
 
+ * int32_t x;
 
+ *
 
+ *     // Create then start some timers.  Starting the timers before the scheduler
 
+ *     // has been started means the timers will start running immediately that
 
+ *     // the scheduler starts.
 
+ *     for( x = 0; x < NUM_TIMERS; x++ )
 
+ *     {
 
+ *         xTimers[ x ] = xTimerCreate(    "Timer",       // Just a text name, not used by the kernel.
 
+ *                                         ( 100 * x ),   // The timer period in ticks.
 
+ *                                         pdTRUE,        // The timers will auto-reload themselves when they expire.
 
+ *                                         ( void * ) x,  // Assign each timer a unique id equal to its array index.
 
+ *                                         vTimerCallback // Each timer calls the same callback when it expires.
 
+ *                                     );
 
+ *
 
+ *         if( xTimers[ x ] == NULL )
 
+ *         {
 
+ *             // The timer was not created.
 
+ *         }
 
+ *         else
 
+ *         {
 
+ *             // Start the timer.  No block time is specified, and even if one was
 
+ *             // it would be ignored because the scheduler has not yet been
 
+ *             // started.
 
+ *             if( xTimerStart( xTimers[ x ], 0 ) != pdPASS )
 
+ *             {
 
+ *                 // The timer could not be set into the Active state.
 
+ *             }
 
+ *         }
 
+ *     }
 
+ *
 
+ *     // ...
 
+ *     // Create tasks here.
 
+ *     // ...
 
+ *
 
+ *     // Starting the scheduler will start the timers running as they have already
 
+ *     // been set into the active state.
 
+ *     vTaskStartScheduler();
 
+ *
 
+ *     // Should not reach here.
 
+ *     for( ;; );
 
+ * }
 
+ * @endverbatim
 
+ */
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+    TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                                const TickType_t xTimerPeriodInTicks,
 
+                                const UBaseType_t uxAutoReload,
 
+                                void * const pvTimerID,
 
+                                TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/**
 
+ * TimerHandle_t xTimerCreateStatic(const char * const pcTimerName,
 
+ *                                  TickType_t xTimerPeriodInTicks,
 
+ *                                  UBaseType_t uxAutoReload,
 
+ *                                  void * pvTimerID,
 
+ *                                  TimerCallbackFunction_t pxCallbackFunction,
 
+ *                                  StaticTimer_t *pxTimerBuffer );
 
+ *
 
+ * Creates a new software timer instance, and returns a handle by which the
 
+ * created software timer can be referenced.
 
+ *
 
+ * Internally, within the FreeRTOS implementation, software timers use a block
 
+ * of memory, in which the timer data structure is stored.  If a software timer
 
+ * is created using xTimerCreate() then the required memory is automatically
 
+ * dynamically allocated inside the xTimerCreate() function.  (see
 
+ * https://www.FreeRTOS.org/a00111.html).  If a software timer is created using
 
+ * xTimerCreateStatic() then the application writer must provide the memory that
 
+ * will get used by the software timer.  xTimerCreateStatic() therefore allows a
 
+ * software timer to be created without using any dynamic memory allocation.
 
+ *
 
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
 
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
 
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a
 
+ * timer into the active state.
 
+ *
 
+ * @param pcTimerName A text name that is assigned to the timer.  This is done
 
+ * purely to assist debugging.  The kernel itself only ever references a timer
 
+ * by its handle, and never by its name.
 
+ *
 
+ * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
 
+ * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
 
+ * has been specified in milliseconds.  For example, if the timer must expire
 
+ * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
 
+ * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
 
+ * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
 
+ * equal to 1000.  The timer period must be greater than 0.
 
+ *
 
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
 
+ * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
 
+ * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
 
+ * enter the dormant state after it expires.
 
+ *
 
+ * @param pvTimerID An identifier that is assigned to the timer being created.
 
+ * Typically this would be used in the timer callback function to identify which
 
+ * timer expired when the same callback function is assigned to more than one
 
+ * timer.
 
+ *
 
+ * @param pxCallbackFunction The function to call when the timer expires.
 
+ * Callback functions must have the prototype defined by TimerCallbackFunction_t,
 
+ * which is "void vCallbackFunction( TimerHandle_t xTimer );".
 
+ *
 
+ * @param pxTimerBuffer Must point to a variable of type StaticTimer_t, which
 
+ * will be then be used to hold the software timer's data structures, removing
 
+ * the need for the memory to be allocated dynamically.
 
+ *
 
+ * @return If the timer is created then a handle to the created timer is
 
+ * returned.  If pxTimerBuffer was NULL then NULL is returned.
 
+ *
 
+ * Example usage:
 
+ * @verbatim
 
+ *
 
+ * // The buffer used to hold the software timer's data structure.
 
+ * static StaticTimer_t xTimerBuffer;
 
+ *
 
+ * // A variable that will be incremented by the software timer's callback
 
+ * // function.
 
+ * UBaseType_t uxVariableToIncrement = 0;
 
+ *
 
+ * // A software timer callback function that increments a variable passed to
 
+ * // it when the software timer was created.  After the 5th increment the
 
+ * // callback function stops the software timer.
 
+ * static void prvTimerCallback( TimerHandle_t xExpiredTimer )
 
+ * {
 
+ * UBaseType_t *puxVariableToIncrement;
 
+ * BaseType_t xReturned;
 
+ *
 
+ *     // Obtain the address of the variable to increment from the timer ID.
 
+ *     puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer );
 
+ *
 
+ *     // Increment the variable to show the timer callback has executed.
 
+ *     ( *puxVariableToIncrement )++;
 
+ *
 
+ *     // If this callback has executed the required number of times, stop the
 
+ *     // timer.
 
+ *     if( *puxVariableToIncrement == 5 )
 
+ *     {
 
+ *         // This is called from a timer callback so must not block.
 
+ *         xTimerStop( xExpiredTimer, staticDONT_BLOCK );
 
+ *     }
 
+ * }
 
+ *
 
+ *
 
+ * void main( void )
 
+ * {
 
+ *     // Create the software time.  xTimerCreateStatic() has an extra parameter
 
+ *     // than the normal xTimerCreate() API function.  The parameter is a pointer
 
+ *     // to the StaticTimer_t structure that will hold the software timer
 
+ *     // structure.  If the parameter is passed as NULL then the structure will be
 
+ *     // allocated dynamically, just as if xTimerCreate() had been called.
 
+ *     xTimer = xTimerCreateStatic( "T1",             // Text name for the task.  Helps debugging only.  Not used by FreeRTOS.
 
+ *                                  xTimerPeriod,     // The period of the timer in ticks.
 
+ *                                  pdTRUE,           // This is an auto-reload timer.
 
+ *                                  ( void * ) &uxVariableToIncrement,    // A variable incremented by the software timer's callback function
 
+ *                                  prvTimerCallback, // The function to execute when the timer expires.
 
+ *                                  &xTimerBuffer );  // The buffer that will hold the software timer structure.
 
+ *
 
+ *     // The scheduler has not started yet so a block time is not used.
 
+ *     xReturned = xTimerStart( xTimer, 0 );
 
+ *
 
+ *     // ...
 
+ *     // Create tasks here.
 
+ *     // ...
 
+ *
 
+ *     // Starting the scheduler will start the timers running as they have already
 
+ *     // been set into the active state.
 
+ *     vTaskStartScheduler();
 
+ *
 
+ *     // Should not reach here.
 
+ *     for( ;; );
 
+ * }
 
+ * @endverbatim
 
+ */
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+    TimerHandle_t xTimerCreateStatic( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                                      const TickType_t xTimerPeriodInTicks,
 
+                                      const UBaseType_t uxAutoReload,
 
+                                      void * const pvTimerID,
 
+                                      TimerCallbackFunction_t pxCallbackFunction,
 
+                                      StaticTimer_t * pxTimerBuffer ) PRIVILEGED_FUNCTION;
 
+#endif /* configSUPPORT_STATIC_ALLOCATION */
 
+
 
+/**
 
+ * void *pvTimerGetTimerID( TimerHandle_t xTimer );
 
+ *
 
+ * Returns the ID assigned to the timer.
 
+ *
 
+ * IDs are assigned to timers using the pvTimerID parameter of the call to
 
+ * xTimerCreated() that was used to create the timer, and by calling the
 
+ * vTimerSetTimerID() API function.
 
+ *
 
+ * If the same callback function is assigned to multiple timers then the timer
 
+ * ID can be used as time specific (timer local) storage.
 
+ *
 
+ * @param xTimer The timer being queried.
 
+ *
 
+ * @return The ID assigned to the timer being queried.
 
+ *
 
+ * Example usage:
 
+ *
 
+ * See the xTimerCreate() API function example usage scenario.
 
+ */
 
+void * pvTimerGetTimerID( const TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID );
 
+ *
 
+ * Sets the ID assigned to the timer.
 
+ *
 
+ * IDs are assigned to timers using the pvTimerID parameter of the call to
 
+ * xTimerCreated() that was used to create the timer.
 
+ *
 
+ * If the same callback function is assigned to multiple timers then the timer
 
+ * ID can be used as time specific (timer local) storage.
 
+ *
 
+ * @param xTimer The timer being updated.
 
+ *
 
+ * @param pvNewID The ID to assign to the timer.
 
+ *
 
+ * Example usage:
 
+ *
 
+ * See the xTimerCreate() API function example usage scenario.
 
+ */
 
+void vTimerSetTimerID( TimerHandle_t xTimer,
 
+                       void * pvNewID ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer );
 
+ *
 
+ * Queries a timer to see if it is active or dormant.
 
+ *
 
+ * A timer will be dormant if:
 
+ *     1) It has been created but not started, or
 
+ *     2) It is an expired one-shot timer that has not been restarted.
 
+ *
 
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
 
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
 
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the
 
+ * active state.
 
+ *
 
+ * @param xTimer The timer being queried.
 
+ *
 
+ * @return pdFALSE will be returned if the timer is dormant.  A value other than
 
+ * pdFALSE will be returned if the timer is active.
 
+ *
 
+ * Example usage:
 
+ * @verbatim
 
+ * // This function assumes xTimer has already been created.
 
+ * void vAFunction( TimerHandle_t xTimer )
 
+ * {
 
+ *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
 
+ *     {
 
+ *         // xTimer is active, do something.
 
+ *     }
 
+ *     else
 
+ *     {
 
+ *         // xTimer is not active, do something else.
 
+ *     }
 
+ * }
 
+ * @endverbatim
 
+ */
 
+BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );
 
+ *
 
+ * Simply returns the handle of the timer service/daemon task.  It it not valid
 
+ * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.
 
+ */
 
+TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait );
 
+ *
 
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
 
+ * public FreeRTOS timer API functions send commands to the timer service task
 
+ * through a queue called the timer command queue.  The timer command queue is
 
+ * private to the kernel itself and is not directly accessible to application
 
+ * code.  The length of the timer command queue is set by the
 
+ * configTIMER_QUEUE_LENGTH configuration constant.
 
+ *
 
+ * xTimerStart() starts a timer that was previously created using the
 
+ * xTimerCreate() API function.  If the timer had already been started and was
 
+ * already in the active state, then xTimerStart() has equivalent functionality
 
+ * to the xTimerReset() API function.
 
+ *
 
+ * Starting a timer ensures the timer is in the active state.  If the timer
 
+ * is not stopped, deleted, or reset in the mean time, the callback function
 
+ * associated with the timer will get called 'n' ticks after xTimerStart() was
 
+ * called, where 'n' is the timers defined period.
 
+ *
 
+ * It is valid to call xTimerStart() before the scheduler has been started, but
 
+ * when this is done the timer will not actually start until the scheduler is
 
+ * started, and the timers expiry time will be relative to when the scheduler is
 
+ * started, not relative to when xTimerStart() was called.
 
+ *
 
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart()
 
+ * to be available.
 
+ *
 
+ * @param xTimer The handle of the timer being started/restarted.
 
+ *
 
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
 
+ * be held in the Blocked state to wait for the start command to be successfully
 
+ * sent to the timer command queue, should the queue already be full when
 
+ * xTimerStart() was called.  xTicksToWait is ignored if xTimerStart() is called
 
+ * before the scheduler is started.
 
+ *
 
+ * @return pdFAIL will be returned if the start command could not be sent to
 
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
 
+ * be returned if the command was successfully sent to the timer command queue.
 
+ * When the command is actually processed will depend on the priority of the
 
+ * timer service/daemon task relative to other tasks in the system, although the
 
+ * timers expiry time is relative to when xTimerStart() is actually called.  The
 
+ * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
 
+ * configuration constant.
 
+ *
 
+ * Example usage:
 
+ *
 
+ * See the xTimerCreate() API function example usage scenario.
 
+ *
 
+ */
 
+#define xTimerStart( xTimer, xTicksToWait ) \
 
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
 
+
 
+/**
 
+ * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait );
 
+ *
 
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
 
+ * public FreeRTOS timer API functions send commands to the timer service task
 
+ * through a queue called the timer command queue.  The timer command queue is
 
+ * private to the kernel itself and is not directly accessible to application
 
+ * code.  The length of the timer command queue is set by the
 
+ * configTIMER_QUEUE_LENGTH configuration constant.
 
+ *
 
+ * xTimerStop() stops a timer that was previously started using either of the
 
+ * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(),
 
+ * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions.
 
+ *
 
+ * Stopping a timer ensures the timer is not in the active state.
 
+ *
 
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop()
 
+ * to be available.
 
+ *
 
+ * @param xTimer The handle of the timer being stopped.
 
+ *
 
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
 
+ * be held in the Blocked state to wait for the stop command to be successfully
 
+ * sent to the timer command queue, should the queue already be full when
 
+ * xTimerStop() was called.  xTicksToWait is ignored if xTimerStop() is called
 
+ * before the scheduler is started.
 
+ *
 
+ * @return pdFAIL will be returned if the stop command could not be sent to
 
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
 
+ * be returned if the command was successfully sent to the timer command queue.
 
+ * When the command is actually processed will depend on the priority of the
 
+ * timer service/daemon task relative to other tasks in the system.  The timer
 
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
 
+ * configuration constant.
 
+ *
 
+ * Example usage:
 
+ *
 
+ * See the xTimerCreate() API function example usage scenario.
 
+ *
 
+ */
 
+#define xTimerStop( xTimer, xTicksToWait ) \
 
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) )
 
+
 
+/**
 
+ * BaseType_t xTimerChangePeriod(   TimerHandle_t xTimer,
 
+ *                                  TickType_t xNewPeriod,
 
+ *                                  TickType_t xTicksToWait );
 
+ *
 
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
 
+ * public FreeRTOS timer API functions send commands to the timer service task
 
+ * through a queue called the timer command queue.  The timer command queue is
 
+ * private to the kernel itself and is not directly accessible to application
 
+ * code.  The length of the timer command queue is set by the
 
+ * configTIMER_QUEUE_LENGTH configuration constant.
 
+ *
 
+ * xTimerChangePeriod() changes the period of a timer that was previously
 
+ * created using the xTimerCreate() API function.
 
+ *
 
+ * xTimerChangePeriod() can be called to change the period of an active or
 
+ * dormant state timer.
 
+ *
 
+ * The configUSE_TIMERS configuration constant must be set to 1 for
 
+ * xTimerChangePeriod() to be available.
 
+ *
 
+ * @param xTimer The handle of the timer that is having its period changed.
 
+ *
 
+ * @param xNewPeriod The new period for xTimer. Timer periods are specified in
 
+ * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
 
+ * that has been specified in milliseconds.  For example, if the timer must
 
+ * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
 
+ * if the timer must expire after 500ms, then xNewPeriod can be set to
 
+ * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
 
+ * or equal to 1000.
 
+ *
 
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
 
+ * be held in the Blocked state to wait for the change period command to be
 
+ * successfully sent to the timer command queue, should the queue already be
 
+ * full when xTimerChangePeriod() was called.  xTicksToWait is ignored if
 
+ * xTimerChangePeriod() is called before the scheduler is started.
 
+ *
 
+ * @return pdFAIL will be returned if the change period command could not be
 
+ * sent to the timer command queue even after xTicksToWait ticks had passed.
 
+ * pdPASS will be returned if the command was successfully sent to the timer
 
+ * command queue.  When the command is actually processed will depend on the
 
+ * priority of the timer service/daemon task relative to other tasks in the
 
+ * system.  The timer service/daemon task priority is set by the
 
+ * configTIMER_TASK_PRIORITY configuration constant.
 
+ *
 
+ * Example usage:
 
+ * @verbatim
 
+ * // This function assumes xTimer has already been created.  If the timer
 
+ * // referenced by xTimer is already active when it is called, then the timer
 
+ * // is deleted.  If the timer referenced by xTimer is not active when it is
 
+ * // called, then the period of the timer is set to 500ms and the timer is
 
+ * // started.
 
+ * void vAFunction( TimerHandle_t xTimer )
 
+ * {
 
+ *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
 
+ *     {
 
+ *         // xTimer is already active - delete it.
 
+ *         xTimerDelete( xTimer );
 
+ *     }
 
+ *     else
 
+ *     {
 
+ *         // xTimer is not active, change its period to 500ms.  This will also
 
+ *         // cause the timer to start.  Block for a maximum of 100 ticks if the
 
+ *         // change period command cannot immediately be sent to the timer
 
+ *         // command queue.
 
+ *         if( xTimerChangePeriod( xTimer, 500 / portTICK_PERIOD_MS, 100 ) == pdPASS )
 
+ *         {
 
+ *             // The command was successfully sent.
 
+ *         }
 
+ *         else
 
+ *         {
 
+ *             // The command could not be sent, even after waiting for 100 ticks
 
+ *             // to pass.  Take appropriate action here.
 
+ *         }
 
+ *     }
 
+ * }
 
+ * @endverbatim
 
+ */
 
+#define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) \
 
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) )
 
+
 
+/**
 
+ * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait );
 
+ *
 
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
 
+ * public FreeRTOS timer API functions send commands to the timer service task
 
+ * through a queue called the timer command queue.  The timer command queue is
 
+ * private to the kernel itself and is not directly accessible to application
 
+ * code.  The length of the timer command queue is set by the
 
+ * configTIMER_QUEUE_LENGTH configuration constant.
 
+ *
 
+ * xTimerDelete() deletes a timer that was previously created using the
 
+ * xTimerCreate() API function.
 
+ *
 
+ * The configUSE_TIMERS configuration constant must be set to 1 for
 
+ * xTimerDelete() to be available.
 
+ *
 
+ * @param xTimer The handle of the timer being deleted.
 
+ *
 
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
 
+ * be held in the Blocked state to wait for the delete command to be
 
+ * successfully sent to the timer command queue, should the queue already be
 
+ * full when xTimerDelete() was called.  xTicksToWait is ignored if xTimerDelete()
 
+ * is called before the scheduler is started.
 
+ *
 
+ * @return pdFAIL will be returned if the delete command could not be sent to
 
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
 
+ * be returned if the command was successfully sent to the timer command queue.
 
+ * When the command is actually processed will depend on the priority of the
 
+ * timer service/daemon task relative to other tasks in the system.  The timer
 
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
 
+ * configuration constant.
 
+ *
 
+ * Example usage:
 
+ *
 
+ * See the xTimerChangePeriod() API function example usage scenario.
 
+ */
 
+#define xTimerDelete( xTimer, xTicksToWait ) \
 
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) )
 
+
 
+/**
 
+ * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait );
 
+ *
 
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
 
+ * public FreeRTOS timer API functions send commands to the timer service task
 
+ * through a queue called the timer command queue.  The timer command queue is
 
+ * private to the kernel itself and is not directly accessible to application
 
+ * code.  The length of the timer command queue is set by the
 
+ * configTIMER_QUEUE_LENGTH configuration constant.
 
+ *
 
+ * xTimerReset() re-starts a timer that was previously created using the
 
+ * xTimerCreate() API function.  If the timer had already been started and was
 
+ * already in the active state, then xTimerReset() will cause the timer to
 
+ * re-evaluate its expiry time so that it is relative to when xTimerReset() was
 
+ * called.  If the timer was in the dormant state then xTimerReset() has
 
+ * equivalent functionality to the xTimerStart() API function.
 
+ *
 
+ * Resetting a timer ensures the timer is in the active state.  If the timer
 
+ * is not stopped, deleted, or reset in the mean time, the callback function
 
+ * associated with the timer will get called 'n' ticks after xTimerReset() was
 
+ * called, where 'n' is the timers defined period.
 
+ *
 
+ * It is valid to call xTimerReset() before the scheduler has been started, but
 
+ * when this is done the timer will not actually start until the scheduler is
 
+ * started, and the timers expiry time will be relative to when the scheduler is
 
+ * started, not relative to when xTimerReset() was called.
 
+ *
 
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset()
 
+ * to be available.
 
+ *
 
+ * @param xTimer The handle of the timer being reset/started/restarted.
 
+ *
 
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
 
+ * be held in the Blocked state to wait for the reset command to be successfully
 
+ * sent to the timer command queue, should the queue already be full when
 
+ * xTimerReset() was called.  xTicksToWait is ignored if xTimerReset() is called
 
+ * before the scheduler is started.
 
+ *
 
+ * @return pdFAIL will be returned if the reset command could not be sent to
 
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
 
+ * be returned if the command was successfully sent to the timer command queue.
 
+ * When the command is actually processed will depend on the priority of the
 
+ * timer service/daemon task relative to other tasks in the system, although the
 
+ * timers expiry time is relative to when xTimerStart() is actually called.  The
 
+ * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
 
+ * configuration constant.
 
+ *
 
+ * Example usage:
 
+ * @verbatim
 
+ * // When a key is pressed, an LCD back-light is switched on.  If 5 seconds pass
 
+ * // without a key being pressed, then the LCD back-light is switched off.  In
 
+ * // this case, the timer is a one-shot timer.
 
+ *
 
+ * TimerHandle_t xBacklightTimer = NULL;
 
+ *
 
+ * // The callback function assigned to the one-shot timer.  In this case the
 
+ * // parameter is not used.
 
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
 
+ * {
 
+ *     // The timer expired, therefore 5 seconds must have passed since a key
 
+ *     // was pressed.  Switch off the LCD back-light.
 
+ *     vSetBacklightState( BACKLIGHT_OFF );
 
+ * }
 
+ *
 
+ * // The key press event handler.
 
+ * void vKeyPressEventHandler( char cKey )
 
+ * {
 
+ *     // Ensure the LCD back-light is on, then reset the timer that is
 
+ *     // responsible for turning the back-light off after 5 seconds of
 
+ *     // key inactivity.  Wait 10 ticks for the command to be successfully sent
 
+ *     // if it cannot be sent immediately.
 
+ *     vSetBacklightState( BACKLIGHT_ON );
 
+ *     if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
 
+ *     {
 
+ *         // The reset command was not executed successfully.  Take appropriate
 
+ *         // action here.
 
+ *     }
 
+ *
 
+ *     // Perform the rest of the key processing here.
 
+ * }
 
+ *
 
+ * void main( void )
 
+ * {
 
+ * int32_t x;
 
+ *
 
+ *     // Create then start the one-shot timer that is responsible for turning
 
+ *     // the back-light off if no keys are pressed within a 5 second period.
 
+ *     xBacklightTimer = xTimerCreate( "BacklightTimer",           // Just a text name, not used by the kernel.
 
+ *                                     ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.
 
+ *                                     pdFALSE,                    // The timer is a one-shot timer.
 
+ *                                     0,                          // The id is not used by the callback so can take any value.
 
+ *                                     vBacklightTimerCallback     // The callback function that switches the LCD back-light off.
 
+ *                                   );
 
+ *
 
+ *     if( xBacklightTimer == NULL )
 
+ *     {
 
+ *         // The timer was not created.
 
+ *     }
 
+ *     else
 
+ *     {
 
+ *         // Start the timer.  No block time is specified, and even if one was
 
+ *         // it would be ignored because the scheduler has not yet been
 
+ *         // started.
 
+ *         if( xTimerStart( xBacklightTimer, 0 ) != pdPASS )
 
+ *         {
 
+ *             // The timer could not be set into the Active state.
 
+ *         }
 
+ *     }
 
+ *
 
+ *     // ...
 
+ *     // Create tasks here.
 
+ *     // ...
 
+ *
 
+ *     // Starting the scheduler will start the timer running as it has already
 
+ *     // been set into the active state.
 
+ *     vTaskStartScheduler();
 
+ *
 
+ *     // Should not reach here.
 
+ *     for( ;; );
 
+ * }
 
+ * @endverbatim
 
+ */
 
+#define xTimerReset( xTimer, xTicksToWait ) \
 
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
 
+
 
+/**
 
+ * BaseType_t xTimerStartFromISR(   TimerHandle_t xTimer,
 
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
 
+ *
 
+ * A version of xTimerStart() that can be called from an interrupt service
 
+ * routine.
 
+ *
 
+ * @param xTimer The handle of the timer being started/restarted.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
 
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
 
+ * command queue.  Calling xTimerStartFromISR() writes a message to the timer
 
+ * command queue, so has the potential to transition the timer service/daemon
 
+ * task out of the Blocked state.  If calling xTimerStartFromISR() causes the
 
+ * timer service/daemon task to leave the Blocked state, and the timer service/
 
+ * daemon task has a priority equal to or greater than the currently executing
 
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
 
+ * get set to pdTRUE internally within the xTimerStartFromISR() function.  If
 
+ * xTimerStartFromISR() sets this value to pdTRUE then a context switch should
 
+ * be performed before the interrupt exits.
 
+ *
 
+ * @return pdFAIL will be returned if the start command could not be sent to
 
+ * the timer command queue.  pdPASS will be returned if the command was
 
+ * successfully sent to the timer command queue.  When the command is actually
 
+ * processed will depend on the priority of the timer service/daemon task
 
+ * relative to other tasks in the system, although the timers expiry time is
 
+ * relative to when xTimerStartFromISR() is actually called.  The timer
 
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
 
+ * configuration constant.
 
+ *
 
+ * Example usage:
 
+ * @verbatim
 
+ * // This scenario assumes xBacklightTimer has already been created.  When a
 
+ * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
 
+ * // without a key being pressed, then the LCD back-light is switched off.  In
 
+ * // this case, the timer is a one-shot timer, and unlike the example given for
 
+ * // the xTimerReset() function, the key press event handler is an interrupt
 
+ * // service routine.
 
+ *
 
+ * // The callback function assigned to the one-shot timer.  In this case the
 
+ * // parameter is not used.
 
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
 
+ * {
 
+ *     // The timer expired, therefore 5 seconds must have passed since a key
 
+ *     // was pressed.  Switch off the LCD back-light.
 
+ *     vSetBacklightState( BACKLIGHT_OFF );
 
+ * }
 
+ *
 
+ * // The key press interrupt service routine.
 
+ * void vKeyPressEventInterruptHandler( void )
 
+ * {
 
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
+ *
 
+ *     // Ensure the LCD back-light is on, then restart the timer that is
 
+ *     // responsible for turning the back-light off after 5 seconds of
 
+ *     // key inactivity.  This is an interrupt service routine so can only
 
+ *     // call FreeRTOS API functions that end in "FromISR".
 
+ *     vSetBacklightState( BACKLIGHT_ON );
 
+ *
 
+ *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
 
+ *     // as both cause the timer to re-calculate its expiry time.
 
+ *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
 
+ *     // declared (in this function).
 
+ *     if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
 
+ *     {
 
+ *         // The start command was not executed successfully.  Take appropriate
 
+ *         // action here.
 
+ *     }
 
+ *
 
+ *     // Perform the rest of the key processing here.
 
+ *
 
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
 
+ *     // should be performed.  The syntax required to perform a context switch
 
+ *     // from inside an ISR varies from port to port, and from compiler to
 
+ *     // compiler.  Inspect the demos for the port you are using to find the
 
+ *     // actual syntax required.
 
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
 
+ *     {
 
+ *         // Call the interrupt safe yield function here (actual function
 
+ *         // depends on the FreeRTOS port being used).
 
+ *     }
 
+ * }
 
+ * @endverbatim
 
+ */
 
+#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) \
 
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
 
+
 
+/**
 
+ * BaseType_t xTimerStopFromISR(    TimerHandle_t xTimer,
 
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
 
+ *
 
+ * A version of xTimerStop() that can be called from an interrupt service
 
+ * routine.
 
+ *
 
+ * @param xTimer The handle of the timer being stopped.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
 
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
 
+ * command queue.  Calling xTimerStopFromISR() writes a message to the timer
 
+ * command queue, so has the potential to transition the timer service/daemon
 
+ * task out of the Blocked state.  If calling xTimerStopFromISR() causes the
 
+ * timer service/daemon task to leave the Blocked state, and the timer service/
 
+ * daemon task has a priority equal to or greater than the currently executing
 
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
 
+ * get set to pdTRUE internally within the xTimerStopFromISR() function.  If
 
+ * xTimerStopFromISR() sets this value to pdTRUE then a context switch should
 
+ * be performed before the interrupt exits.
 
+ *
 
+ * @return pdFAIL will be returned if the stop command could not be sent to
 
+ * the timer command queue.  pdPASS will be returned if the command was
 
+ * successfully sent to the timer command queue.  When the command is actually
 
+ * processed will depend on the priority of the timer service/daemon task
 
+ * relative to other tasks in the system.  The timer service/daemon task
 
+ * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
 
+ *
 
+ * Example usage:
 
+ * @verbatim
 
+ * // This scenario assumes xTimer has already been created and started.  When
 
+ * // an interrupt occurs, the timer should be simply stopped.
 
+ *
 
+ * // The interrupt service routine that stops the timer.
 
+ * void vAnExampleInterruptServiceRoutine( void )
 
+ * {
 
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
+ *
 
+ *     // The interrupt has occurred - simply stop the timer.
 
+ *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
 
+ *     // (within this function).  As this is an interrupt service routine, only
 
+ *     // FreeRTOS API functions that end in "FromISR" can be used.
 
+ *     if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
 
+ *     {
 
+ *         // The stop command was not executed successfully.  Take appropriate
 
+ *         // action here.
 
+ *     }
 
+ *
 
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
 
+ *     // should be performed.  The syntax required to perform a context switch
 
+ *     // from inside an ISR varies from port to port, and from compiler to
 
+ *     // compiler.  Inspect the demos for the port you are using to find the
 
+ *     // actual syntax required.
 
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
 
+ *     {
 
+ *         // Call the interrupt safe yield function here (actual function
 
+ *         // depends on the FreeRTOS port being used).
 
+ *     }
 
+ * }
 
+ * @endverbatim
 
+ */
 
+#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) \
 
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U )
 
+
 
+/**
 
+ * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer,
 
+ *                                       TickType_t xNewPeriod,
 
+ *                                       BaseType_t *pxHigherPriorityTaskWoken );
 
+ *
 
+ * A version of xTimerChangePeriod() that can be called from an interrupt
 
+ * service routine.
 
+ *
 
+ * @param xTimer The handle of the timer that is having its period changed.
 
+ *
 
+ * @param xNewPeriod The new period for xTimer. Timer periods are specified in
 
+ * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
 
+ * that has been specified in milliseconds.  For example, if the timer must
 
+ * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
 
+ * if the timer must expire after 500ms, then xNewPeriod can be set to
 
+ * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
 
+ * or equal to 1000.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
 
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
 
+ * command queue.  Calling xTimerChangePeriodFromISR() writes a message to the
 
+ * timer command queue, so has the potential to transition the timer service/
 
+ * daemon task out of the Blocked state.  If calling xTimerChangePeriodFromISR()
 
+ * causes the timer service/daemon task to leave the Blocked state, and the
 
+ * timer service/daemon task has a priority equal to or greater than the
 
+ * currently executing task (the task that was interrupted), then
 
+ * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the
 
+ * xTimerChangePeriodFromISR() function.  If xTimerChangePeriodFromISR() sets
 
+ * this value to pdTRUE then a context switch should be performed before the
 
+ * interrupt exits.
 
+ *
 
+ * @return pdFAIL will be returned if the command to change the timers period
 
+ * could not be sent to the timer command queue.  pdPASS will be returned if the
 
+ * command was successfully sent to the timer command queue.  When the command
 
+ * is actually processed will depend on the priority of the timer service/daemon
 
+ * task relative to other tasks in the system.  The timer service/daemon task
 
+ * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
 
+ *
 
+ * Example usage:
 
+ * @verbatim
 
+ * // This scenario assumes xTimer has already been created and started.  When
 
+ * // an interrupt occurs, the period of xTimer should be changed to 500ms.
 
+ *
 
+ * // The interrupt service routine that changes the period of xTimer.
 
+ * void vAnExampleInterruptServiceRoutine( void )
 
+ * {
 
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
+ *
 
+ *     // The interrupt has occurred - change the period of xTimer to 500ms.
 
+ *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
 
+ *     // (within this function).  As this is an interrupt service routine, only
 
+ *     // FreeRTOS API functions that end in "FromISR" can be used.
 
+ *     if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
 
+ *     {
 
+ *         // The command to change the timers period was not executed
 
+ *         // successfully.  Take appropriate action here.
 
+ *     }
 
+ *
 
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
 
+ *     // should be performed.  The syntax required to perform a context switch
 
+ *     // from inside an ISR varies from port to port, and from compiler to
 
+ *     // compiler.  Inspect the demos for the port you are using to find the
 
+ *     // actual syntax required.
 
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
 
+ *     {
 
+ *         // Call the interrupt safe yield function here (actual function
 
+ *         // depends on the FreeRTOS port being used).
 
+ *     }
 
+ * }
 
+ * @endverbatim
 
+ */
 
+#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) \
 
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )
 
+
 
+/**
 
+ * BaseType_t xTimerResetFromISR(   TimerHandle_t xTimer,
 
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
 
+ *
 
+ * A version of xTimerReset() that can be called from an interrupt service
 
+ * routine.
 
+ *
 
+ * @param xTimer The handle of the timer that is to be started, reset, or
 
+ * restarted.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
 
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
 
+ * command queue.  Calling xTimerResetFromISR() writes a message to the timer
 
+ * command queue, so has the potential to transition the timer service/daemon
 
+ * task out of the Blocked state.  If calling xTimerResetFromISR() causes the
 
+ * timer service/daemon task to leave the Blocked state, and the timer service/
 
+ * daemon task has a priority equal to or greater than the currently executing
 
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
 
+ * get set to pdTRUE internally within the xTimerResetFromISR() function.  If
 
+ * xTimerResetFromISR() sets this value to pdTRUE then a context switch should
 
+ * be performed before the interrupt exits.
 
+ *
 
+ * @return pdFAIL will be returned if the reset command could not be sent to
 
+ * the timer command queue.  pdPASS will be returned if the command was
 
+ * successfully sent to the timer command queue.  When the command is actually
 
+ * processed will depend on the priority of the timer service/daemon task
 
+ * relative to other tasks in the system, although the timers expiry time is
 
+ * relative to when xTimerResetFromISR() is actually called.  The timer service/daemon
 
+ * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.
 
+ *
 
+ * Example usage:
 
+ * @verbatim
 
+ * // This scenario assumes xBacklightTimer has already been created.  When a
 
+ * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
 
+ * // without a key being pressed, then the LCD back-light is switched off.  In
 
+ * // this case, the timer is a one-shot timer, and unlike the example given for
 
+ * // the xTimerReset() function, the key press event handler is an interrupt
 
+ * // service routine.
 
+ *
 
+ * // The callback function assigned to the one-shot timer.  In this case the
 
+ * // parameter is not used.
 
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
 
+ * {
 
+ *     // The timer expired, therefore 5 seconds must have passed since a key
 
+ *     // was pressed.  Switch off the LCD back-light.
 
+ *     vSetBacklightState( BACKLIGHT_OFF );
 
+ * }
 
+ *
 
+ * // The key press interrupt service routine.
 
+ * void vKeyPressEventInterruptHandler( void )
 
+ * {
 
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
 
+ *
 
+ *     // Ensure the LCD back-light is on, then reset the timer that is
 
+ *     // responsible for turning the back-light off after 5 seconds of
 
+ *     // key inactivity.  This is an interrupt service routine so can only
 
+ *     // call FreeRTOS API functions that end in "FromISR".
 
+ *     vSetBacklightState( BACKLIGHT_ON );
 
+ *
 
+ *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
 
+ *     // as both cause the timer to re-calculate its expiry time.
 
+ *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
 
+ *     // declared (in this function).
 
+ *     if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
 
+ *     {
 
+ *         // The reset command was not executed successfully.  Take appropriate
 
+ *         // action here.
 
+ *     }
 
+ *
 
+ *     // Perform the rest of the key processing here.
 
+ *
 
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
 
+ *     // should be performed.  The syntax required to perform a context switch
 
+ *     // from inside an ISR varies from port to port, and from compiler to
 
+ *     // compiler.  Inspect the demos for the port you are using to find the
 
+ *     // actual syntax required.
 
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
 
+ *     {
 
+ *         // Call the interrupt safe yield function here (actual function
 
+ *         // depends on the FreeRTOS port being used).
 
+ *     }
 
+ * }
 
+ * @endverbatim
 
+ */
 
+#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) \
 
+    xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
 
+
 
+
 
+/**
 
+ * BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
 
+ *                                          void *pvParameter1,
 
+ *                                          uint32_t ulParameter2,
 
+ *                                          BaseType_t *pxHigherPriorityTaskWoken );
 
+ *
 
+ *
 
+ * Used from application interrupt service routines to defer the execution of a
 
+ * function to the RTOS daemon task (the timer service task, hence this function
 
+ * is implemented in timers.c and is prefixed with 'Timer').
 
+ *
 
+ * Ideally an interrupt service routine (ISR) is kept as short as possible, but
 
+ * sometimes an ISR either has a lot of processing to do, or needs to perform
 
+ * processing that is not deterministic.  In these cases
 
+ * xTimerPendFunctionCallFromISR() can be used to defer processing of a function
 
+ * to the RTOS daemon task.
 
+ *
 
+ * A mechanism is provided that allows the interrupt to return directly to the
 
+ * task that will subsequently execute the pended callback function.  This
 
+ * allows the callback function to execute contiguously in time with the
 
+ * interrupt - just as if the callback had executed in the interrupt itself.
 
+ *
 
+ * @param xFunctionToPend The function to execute from the timer service/
 
+ * daemon task.  The function must conform to the PendedFunction_t
 
+ * prototype.
 
+ *
 
+ * @param pvParameter1 The value of the callback function's first parameter.
 
+ * The parameter has a void * type to allow it to be used to pass any type.
 
+ * For example, unsigned longs can be cast to a void *, or the void * can be
 
+ * used to point to a structure.
 
+ *
 
+ * @param ulParameter2 The value of the callback function's second parameter.
 
+ *
 
+ * @param pxHigherPriorityTaskWoken As mentioned above, calling this function
 
+ * will result in a message being sent to the timer daemon task.  If the
 
+ * priority of the timer daemon task (which is set using
 
+ * configTIMER_TASK_PRIORITY in FreeRTOSConfig.h) is higher than the priority of
 
+ * the currently running task (the task the interrupt interrupted) then
 
+ * *pxHigherPriorityTaskWoken will be set to pdTRUE within
 
+ * xTimerPendFunctionCallFromISR(), indicating that a context switch should be
 
+ * requested before the interrupt exits.  For that reason
 
+ * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the
 
+ * example code below.
 
+ *
 
+ * @return pdPASS is returned if the message was successfully sent to the
 
+ * timer daemon task, otherwise pdFALSE is returned.
 
+ *
 
+ * Example usage:
 
+ * @verbatim
 
+ *
 
+ *  // The callback function that will execute in the context of the daemon task.
 
+ *  // Note callback functions must all use this same prototype.
 
+ *  void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 )
 
+ *  {
 
+ *      BaseType_t xInterfaceToService;
 
+ *
 
+ *      // The interface that requires servicing is passed in the second
 
+ *      // parameter.  The first parameter is not used in this case.
 
+ *      xInterfaceToService = ( BaseType_t ) ulParameter2;
 
+ *
 
+ *      // ...Perform the processing here...
 
+ *  }
 
+ *
 
+ *  // An ISR that receives data packets from multiple interfaces
 
+ *  void vAnISR( void )
 
+ *  {
 
+ *      BaseType_t xInterfaceToService, xHigherPriorityTaskWoken;
 
+ *
 
+ *      // Query the hardware to determine which interface needs processing.
 
+ *      xInterfaceToService = prvCheckInterfaces();
 
+ *
 
+ *      // The actual processing is to be deferred to a task.  Request the
 
+ *      // vProcessInterface() callback function is executed, passing in the
 
+ *      // number of the interface that needs processing.  The interface to
 
+ *      // service is passed in the second parameter.  The first parameter is
 
+ *      // not used in this case.
 
+ *      xHigherPriorityTaskWoken = pdFALSE;
 
+ *      xTimerPendFunctionCallFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken );
 
+ *
 
+ *      // If xHigherPriorityTaskWoken is now set to pdTRUE then a context
 
+ *      // switch should be requested.  The macro used is port specific and will
 
+ *      // be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - refer to
 
+ *      // the documentation page for the port being used.
 
+ *      portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
 
+ *
 
+ *  }
 
+ * @endverbatim
 
+ */
 
+BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
 
+                                          void * pvParameter1,
 
+                                          uint32_t ulParameter2,
 
+                                          BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
 
+ *                                    void *pvParameter1,
 
+ *                                    uint32_t ulParameter2,
 
+ *                                    TickType_t xTicksToWait );
 
+ *
 
+ *
 
+ * Used to defer the execution of a function to the RTOS daemon task (the timer
 
+ * service task, hence this function is implemented in timers.c and is prefixed
 
+ * with 'Timer').
 
+ *
 
+ * @param xFunctionToPend The function to execute from the timer service/
 
+ * daemon task.  The function must conform to the PendedFunction_t
 
+ * prototype.
 
+ *
 
+ * @param pvParameter1 The value of the callback function's first parameter.
 
+ * The parameter has a void * type to allow it to be used to pass any type.
 
+ * For example, unsigned longs can be cast to a void *, or the void * can be
 
+ * used to point to a structure.
 
+ *
 
+ * @param ulParameter2 The value of the callback function's second parameter.
 
+ *
 
+ * @param xTicksToWait Calling this function will result in a message being
 
+ * sent to the timer daemon task on a queue.  xTicksToWait is the amount of
 
+ * time the calling task should remain in the Blocked state (so not using any
 
+ * processing time) for space to become available on the timer queue if the
 
+ * queue is found to be full.
 
+ *
 
+ * @return pdPASS is returned if the message was successfully sent to the
 
+ * timer daemon task, otherwise pdFALSE is returned.
 
+ *
 
+ */
 
+BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
 
+                                   void * pvParameter1,
 
+                                   uint32_t ulParameter2,
 
+                                   TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * const char * const pcTimerGetName( TimerHandle_t xTimer );
 
+ *
 
+ * Returns the name that was assigned to a timer when the timer was created.
 
+ *
 
+ * @param xTimer The handle of the timer being queried.
 
+ *
 
+ * @return The name assigned to the timer specified by the xTimer parameter.
 
+ */
 
+const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+
 
+/**
 
+ * void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload );
 
+ *
 
+ * Updates a timer to be either an auto-reload timer, in which case the timer
 
+ * automatically resets itself each time it expires, or a one-shot timer, in
 
+ * which case the timer will only expire once unless it is manually restarted.
 
+ *
 
+ * @param xTimer The handle of the timer being updated.
 
+ *
 
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
 
+ * expire repeatedly with a frequency set by the timer's period (see the
 
+ * xTimerPeriodInTicks parameter of the xTimerCreate() API function).  If
 
+ * uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
 
+ * enter the dormant state after it expires.
 
+ */
 
+void vTimerSetReloadMode( TimerHandle_t xTimer,
 
+                          const UBaseType_t uxAutoReload ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer );
 
+ *
 
+ * Queries a timer to determine if it is an auto-reload timer, in which case the timer
 
+ * automatically resets itself each time it expires, or a one-shot timer, in
 
+ * which case the timer will only expire once unless it is manually restarted.
 
+ *
 
+ * @param xTimer The handle of the timer being queried.
 
+ *
 
+ * @return If the timer is an auto-reload timer then pdTRUE is returned, otherwise
 
+ * pdFALSE is returned.
 
+ */
 
+UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * TickType_t xTimerGetPeriod( TimerHandle_t xTimer );
 
+ *
 
+ * Returns the period of a timer.
 
+ *
 
+ * @param xTimer The handle of the timer being queried.
 
+ *
 
+ * @return The period of the timer in ticks.
 
+ */
 
+TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
 
+
 
+/**
 
+ * TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer );
 
+ *
 
+ * Returns the time in ticks at which the timer will expire.  If this is less
 
+ * than the current tick count then the expiry time has overflowed from the
 
+ * current time.
 
+ *
 
+ * @param xTimer The handle of the timer being queried.
 
+ *
 
+ * @return If the timer is running then the time in ticks at which the timer
 
+ * will next expire is returned.  If the timer is not running then the return
 
+ * value is undefined.
 
+ */
 
+TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Functions beyond this part are not part of the public API and are intended
 
+ * for use by the kernel only.
 
+ */
 
+BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;
 
+BaseType_t xTimerGenericCommand( TimerHandle_t xTimer,
 
+                                 const BaseType_t xCommandID,
 
+                                 const TickType_t xOptionalValue,
 
+                                 BaseType_t * const pxHigherPriorityTaskWoken,
 
+                                 const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+    void vTimerSetTimerNumber( TimerHandle_t xTimer,
 
+                               UBaseType_t uxTimerNumber ) PRIVILEGED_FUNCTION;
 
+    UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+
 
+    /**
 
+     * task.h
 
+     * <pre>void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ) </pre>
 
+     *
 
+     * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Timer Task TCB.  This function is required when
 
+     * configSUPPORT_STATIC_ALLOCATION is set.  For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
 
+     *
 
+     * @param ppxTimerTaskTCBBuffer   A handle to a statically allocated TCB buffer
 
+     * @param ppxTimerTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task
 
+     * @param pulTimerTaskStackSize   A pointer to the number of elements that will fit in the allocated stack buffer
 
+     */
 
+    void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,
 
+                                          StackType_t ** ppxTimerTaskStackBuffer,
 
+                                              uint32_t * pulTimerTaskStackSize );
 
+
 
+#endif
 
+
 
+/* *INDENT-OFF* */
 
+#ifdef __cplusplus
 
+    }
 
+#endif
 
+/* *INDENT-ON* */
 
+#endif /* TIMERS_H */

+ 215 - 0
FreeRTOS/Source/list.c
Vedi File 

@@ -0,0 +1,215 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+
 
+#include <stdlib.h>
 
+
 
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
 
+ * all the API functions to use the MPU wrappers.  That should only be done when
 
+ * task.h is included from an application file. */
 
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
+
 
+#include "FreeRTOS.h"
 
+#include "list.h"
 
+
 
+/* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
 
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be
 
+ * defined for the header files above, but not in this file, in order to
 
+ * generate the correct privileged Vs unprivileged linkage and placement. */
 
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
 
+
 
+/*-----------------------------------------------------------
 
+* PUBLIC LIST API documented in list.h
 
+*----------------------------------------------------------*/
 
+
 
+void vListInitialise( List_t * const pxList )
 
+{
 
+    /* The list structure contains a list item which is used to mark the
 
+     * end of the list.  To initialise the list the list end is inserted
 
+     * as the only list entry. */
 
+    pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 
+
 
+    /* The list end value is the highest possible value in the list to
 
+     * ensure it remains at the end of the list. */
 
+    pxList->xListEnd.xItemValue = portMAX_DELAY;
 
+
 
+    /* The list end next and previous pointers point to itself so we know
 
+     * when the list is empty. */
 
+    pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );     /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 
+    pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 
+
 
+    pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
 
+
 
+    /* Write known values into the list if
 
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 
+    listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
 
+    listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vListInitialiseItem( ListItem_t * const pxItem )
 
+{
 
+    /* Make sure the list item is not recorded as being on a list. */
 
+    pxItem->pxContainer = NULL;
 
+
 
+    /* Write known values into the list item if
 
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 
+    listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
 
+    listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vListInsertEnd( List_t * const pxList,
 
+                     ListItem_t * const pxNewListItem )
 
+{
 
+    ListItem_t * const pxIndex = pxList->pxIndex;
 
+
 
+    /* Only effective when configASSERT() is also defined, these tests may catch
 
+     * the list data structures being overwritten in memory.  They will not catch
 
+     * data errors caused by incorrect configuration or use of FreeRTOS. */
 
+    listTEST_LIST_INTEGRITY( pxList );
 
+    listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
 
+
 
+    /* Insert a new list item into pxList, but rather than sort the list,
 
+     * makes the new list item the last item to be removed by a call to
 
+     * listGET_OWNER_OF_NEXT_ENTRY(). */
 
+    pxNewListItem->pxNext = pxIndex;
 
+    pxNewListItem->pxPrevious = pxIndex->pxPrevious;
 
+
 
+    /* Only used during decision coverage testing. */
 
+    mtCOVERAGE_TEST_DELAY();
 
+
 
+    pxIndex->pxPrevious->pxNext = pxNewListItem;
 
+    pxIndex->pxPrevious = pxNewListItem;
 
+
 
+    /* Remember which list the item is in. */
 
+    pxNewListItem->pxContainer = pxList;
 
+
 
+    ( pxList->uxNumberOfItems )++;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vListInsert( List_t * const pxList,
 
+                  ListItem_t * const pxNewListItem )
 
+{
 
+    ListItem_t * pxIterator;
 
+    const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
 
+
 
+    /* Only effective when configASSERT() is also defined, these tests may catch
 
+     * the list data structures being overwritten in memory.  They will not catch
 
+     * data errors caused by incorrect configuration or use of FreeRTOS. */
 
+    listTEST_LIST_INTEGRITY( pxList );
 
+    listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
 
+
 
+    /* Insert the new list item into the list, sorted in xItemValue order.
 
+     *
 
+     * If the list already contains a list item with the same item value then the
 
+     * new list item should be placed after it.  This ensures that TCBs which are
 
+     * stored in ready lists (all of which have the same xItemValue value) get a
 
+     * share of the CPU.  However, if the xItemValue is the same as the back marker
 
+     * the iteration loop below will not end.  Therefore the value is checked
 
+     * first, and the algorithm slightly modified if necessary. */
 
+    if( xValueOfInsertion == portMAX_DELAY )
 
+    {
 
+        pxIterator = pxList->xListEnd.pxPrevious;
 
+    }
 
+    else
 
+    {
 
+        /* *** NOTE ***********************************************************
 
+        *  If you find your application is crashing here then likely causes are
 
+        *  listed below.  In addition see https://www.FreeRTOS.org/FAQHelp.html for
 
+        *  more tips, and ensure configASSERT() is defined!
 
+        *  https://www.FreeRTOS.org/a00110.html#configASSERT
 
+        *
 
+        *   1) Stack overflow -
 
+        *      see https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html
 
+        *   2) Incorrect interrupt priority assignment, especially on Cortex-M
 
+        *      parts where numerically high priority values denote low actual
 
+        *      interrupt priorities, which can seem counter intuitive.  See
 
+        *      https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html and the definition
 
+        *      of configMAX_SYSCALL_INTERRUPT_PRIORITY on
 
+        *      https://www.FreeRTOS.org/a00110.html
 
+        *   3) Calling an API function from within a critical section or when
 
+        *      the scheduler is suspended, or calling an API function that does
 
+        *      not end in "FromISR" from an interrupt.
 
+        *   4) Using a queue or semaphore before it has been initialised or
 
+        *      before the scheduler has been started (are interrupts firing
 
+        *      before vTaskStartScheduler() has been called?).
 
+        *   5) If the FreeRTOS port supports interrupt nesting then ensure that
 
+        *      the priority of the tick interrupt is at or below
 
+        *      configMAX_SYSCALL_INTERRUPT_PRIORITY.
 
+        **********************************************************************/
 
+
 
+        for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
 
+        {
 
+            /* There is nothing to do here, just iterating to the wanted
 
+             * insertion position. */
 
+        }
 
+    }
 
+
 
+    pxNewListItem->pxNext = pxIterator->pxNext;
 
+    pxNewListItem->pxNext->pxPrevious = pxNewListItem;
 
+    pxNewListItem->pxPrevious = pxIterator;
 
+    pxIterator->pxNext = pxNewListItem;
 
+
 
+    /* Remember which list the item is in.  This allows fast removal of the
 
+     * item later. */
 
+    pxNewListItem->pxContainer = pxList;
 
+
 
+    ( pxList->uxNumberOfItems )++;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
 
+{
 
+/* The list item knows which list it is in.  Obtain the list from the list
 
+ * item. */
 
+    List_t * const pxList = pxItemToRemove->pxContainer;
 
+
 
+    pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
 
+    pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
 
+
 
+    /* Only used during decision coverage testing. */
 
+    mtCOVERAGE_TEST_DELAY();
 
+
 
+    /* Make sure the index is left pointing to a valid item. */
 
+    if( pxList->pxIndex == pxItemToRemove )
 
+    {
 
+        pxList->pxIndex = pxItemToRemove->pxPrevious;
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    pxItemToRemove->pxContainer = NULL;
 
+    ( pxList->uxNumberOfItems )--;
 
+
 
+    return pxList->uxNumberOfItems;
 
+}
 
+/*-----------------------------------------------------------*/

+ 785 - 0
FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
Vedi File 

@@ -0,0 +1,785 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/*-----------------------------------------------------------
 
+* Implementation of functions defined in portable.h for the ARM CM4F port.
 
+*----------------------------------------------------------*/
 
+
 
+/* Scheduler includes. */
 
+#include "FreeRTOS.h"
 
+#include "task.h"
 
+
 
+#ifndef __VFP_FP__
 
+    #error This port can only be used when the project options are configured to enable hardware floating point support.
 
+#endif
 
+
 
+#ifndef configSYSTICK_CLOCK_HZ
 
+    #define configSYSTICK_CLOCK_HZ      configCPU_CLOCK_HZ
 
+    /* Ensure the SysTick is clocked at the same frequency as the core. */
 
+    #define portNVIC_SYSTICK_CLK_BIT    ( 1UL << 2UL )
 
+#else
 
+
 
+/* The way the SysTick is clocked is not modified in case it is not the same
 
+ * as the core. */
 
+    #define portNVIC_SYSTICK_CLK_BIT    ( 0 )
 
+#endif
 
+
 
+/* Constants required to manipulate the core.  Registers first... */
 
+#define portNVIC_SYSTICK_CTRL_REG             ( *( ( volatile uint32_t * ) 0xe000e010 ) )
 
+#define portNVIC_SYSTICK_LOAD_REG             ( *( ( volatile uint32_t * ) 0xe000e014 ) )
 
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG    ( *( ( volatile uint32_t * ) 0xe000e018 ) )
 
+#define portNVIC_SHPR3_REG                    ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
 
+/* ...then bits in the registers. */
 
+#define portNVIC_SYSTICK_INT_BIT              ( 1UL << 1UL )
 
+#define portNVIC_SYSTICK_ENABLE_BIT           ( 1UL << 0UL )
 
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT       ( 1UL << 16UL )
 
+#define portNVIC_PENDSVCLEAR_BIT              ( 1UL << 27UL )
 
+#define portNVIC_PEND_SYSTICK_CLEAR_BIT       ( 1UL << 25UL )
 
+
 
+/* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
 
+ * r0p1 port. */
 
+#define portCPUID                             ( *( ( volatile uint32_t * ) 0xE000ed00 ) )
 
+#define portCORTEX_M7_r0p1_ID                 ( 0x410FC271UL )
 
+#define portCORTEX_M7_r0p0_ID                 ( 0x410FC270UL )
 
+
 
+#define portNVIC_PENDSV_PRI                   ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
 
+#define portNVIC_SYSTICK_PRI                  ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
 
+
 
+/* Constants required to check the validity of an interrupt priority. */
 
+#define portFIRST_USER_INTERRUPT_NUMBER       ( 16 )
 
+#define portNVIC_IP_REGISTERS_OFFSET_16       ( 0xE000E3F0 )
 
+#define portAIRCR_REG                         ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
 
+#define portMAX_8_BIT_VALUE                   ( ( uint8_t ) 0xff )
 
+#define portTOP_BIT_OF_BYTE                   ( ( uint8_t ) 0x80 )
 
+#define portMAX_PRIGROUP_BITS                 ( ( uint8_t ) 7 )
 
+#define portPRIORITY_GROUP_MASK               ( 0x07UL << 8UL )
 
+#define portPRIGROUP_SHIFT                    ( 8UL )
 
+
 
+/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
 
+#define portVECTACTIVE_MASK                   ( 0xFFUL )
 
+
 
+/* Constants required to manipulate the VFP. */
 
+#define portFPCCR                             ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
 
+#define portASPEN_AND_LSPEN_BITS              ( 0x3UL << 30UL )
 
+
 
+/* Constants required to set up the initial stack. */
 
+#define portINITIAL_XPSR                      ( 0x01000000 )
 
+#define portINITIAL_EXC_RETURN                ( 0xfffffffd )
 
+
 
+/* The systick is a 24-bit counter. */
 
+#define portMAX_24_BIT_NUMBER                 ( 0xffffffUL )
 
+
 
+/* For strict compliance with the Cortex-M spec the task start address should
 
+ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
 
+#define portSTART_ADDRESS_MASK                ( ( StackType_t ) 0xfffffffeUL )
 
+
 
+/* A fiddle factor to estimate the number of SysTick counts that would have
 
+ * occurred while the SysTick counter is stopped during tickless idle
 
+ * calculations. */
 
+#define portMISSED_COUNTS_FACTOR              ( 45UL )
 
+
 
+/* Let the user override the pre-loading of the initial LR with the address of
 
+ * prvTaskExitError() in case it messes up unwinding of the stack in the
 
+ * debugger. */
 
+#ifdef configTASK_RETURN_ADDRESS
 
+    #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
 
+#else
 
+    #define portTASK_RETURN_ADDRESS    prvTaskExitError
 
+#endif
 
+
 
+/*
 
+ * Setup the timer to generate the tick interrupts.  The implementation in this
 
+ * file is weak to allow application writers to change the timer used to
 
+ * generate the tick interrupt.
 
+ */
 
+void vPortSetupTimerInterrupt( void );
 
+
 
+/*
 
+ * Exception handlers.
 
+ */
 
+void xPortPendSVHandler( void ) __attribute__( ( naked ) );
 
+void xPortSysTickHandler( void );
 
+void vPortSVCHandler( void ) __attribute__( ( naked ) );
 
+
 
+/*
 
+ * Start first task is a separate function so it can be tested in isolation.
 
+ */
 
+static void prvPortStartFirstTask( void ) __attribute__( ( naked ) );
 
+
 
+/*
 
+ * Function to enable the VFP.
 
+ */
 
+static void vPortEnableVFP( void ) __attribute__( ( naked ) );
 
+
 
+/*
 
+ * Used to catch tasks that attempt to return from their implementing function.
 
+ */
 
+static void prvTaskExitError( void );
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/* Each task maintains its own interrupt status in the critical nesting
 
+ * variable. */
 
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
+
 
+/*
 
+ * The number of SysTick increments that make up one tick period.
 
+ */
 
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
+    static uint32_t ulTimerCountsForOneTick = 0;
 
+#endif /* configUSE_TICKLESS_IDLE */
 
+
 
+/*
 
+ * The maximum number of tick periods that can be suppressed is limited by the
 
+ * 24 bit resolution of the SysTick timer.
 
+ */
 
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
+    static uint32_t xMaximumPossibleSuppressedTicks = 0;
 
+#endif /* configUSE_TICKLESS_IDLE */
 
+
 
+/*
 
+ * Compensate for the CPU cycles that pass while the SysTick is stopped (low
 
+ * power functionality only.
 
+ */
 
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
+    static uint32_t ulStoppedTimerCompensation = 0;
 
+#endif /* configUSE_TICKLESS_IDLE */
 
+
 
+/*
 
+ * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
 
+ * FreeRTOS API functions are not called from interrupts that have been assigned
 
+ * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
 
+ */
 
+#if ( configASSERT_DEFINED == 1 )
 
+    static uint8_t ucMaxSysCallPriority = 0;
 
+    static uint32_t ulMaxPRIGROUPValue = 0;
 
+    static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
 
+#endif /* configASSERT_DEFINED */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/*
 
+ * See header file for description.
 
+ */
 
+StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 
+                                     TaskFunction_t pxCode,
 
+                                     void * pvParameters )
 
+{
 
+    /* Simulate the stack frame as it would be created by a context switch
 
+     * interrupt. */
 
+
 
+    /* Offset added to account for the way the MCU uses the stack on entry/exit
 
+     * of interrupts, and to ensure alignment. */
 
+    pxTopOfStack--;
 
+
 
+    *pxTopOfStack = portINITIAL_XPSR;                                    /* xPSR */
 
+    pxTopOfStack--;
 
+    *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
 
+    pxTopOfStack--;
 
+    *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;             /* LR */
 
+
 
+    /* Save code space by skipping register initialisation. */
 
+    pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */
 
+    *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
 
+
 
+    /* A save method is being used that requires each task to maintain its
 
+     * own exec return value. */
 
+    pxTopOfStack--;
 
+    *pxTopOfStack = portINITIAL_EXC_RETURN;
 
+
 
+    pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
 
+
 
+    return pxTopOfStack;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvTaskExitError( void )
 
+{
 
+    volatile uint32_t ulDummy = 0;
 
+
 
+    /* A function that implements a task must not exit or attempt to return to
 
+     * its caller as there is nothing to return to.  If a task wants to exit it
 
+     * should instead call vTaskDelete( NULL ).
 
+     *
 
+     * Artificially force an assert() to be triggered if configASSERT() is
 
+     * defined, then stop here so application writers can catch the error. */
 
+    configASSERT( uxCriticalNesting == ~0UL );
 
+    portDISABLE_INTERRUPTS();
 
+
 
+    while( ulDummy == 0 )
 
+    {
 
+        /* This file calls prvTaskExitError() after the scheduler has been
 
+         * started to remove a compiler warning about the function being defined
 
+         * but never called.  ulDummy is used purely to quieten other warnings
 
+         * about code appearing after this function is called - making ulDummy
 
+         * volatile makes the compiler think the function could return and
 
+         * therefore not output an 'unreachable code' warning for code that appears
 
+         * after it. */
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vPortSVCHandler( void )
 
+{
 
+    __asm volatile (
 
+        "	ldr	r3, pxCurrentTCBConst2		\n"/* Restore the context. */
 
+        "	ldr r1, [r3]					\n"/* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
 
+        "	ldr r0, [r1]					\n"/* The first item in pxCurrentTCB is the task top of stack. */
 
+        "	ldmia r0!, {r4-r11, r14}		\n"/* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
 
+        "	msr psp, r0						\n"/* Restore the task stack pointer. */
 
+        "	isb								\n"
 
+        "	mov r0, #0 						\n"
 
+        "	msr	basepri, r0					\n"
 
+        "	bx r14							\n"
 
+        "									\n"
 
+        "	.align 4						\n"
 
+        "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
 
+        );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvPortStartFirstTask( void )
 
+{
 
+    /* Start the first task.  This also clears the bit that indicates the FPU is
 
+     * in use in case the FPU was used before the scheduler was started - which
 
+     * would otherwise result in the unnecessary leaving of space in the SVC stack
 
+     * for lazy saving of FPU registers. */
 
+    __asm volatile (
 
+        " ldr r0, =0xE000ED08 	\n"/* Use the NVIC offset register to locate the stack. */
 
+        " ldr r0, [r0] 			\n"
 
+        " ldr r0, [r0] 			\n"
 
+        " msr msp, r0			\n"/* Set the msp back to the start of the stack. */
 
+        " mov r0, #0			\n"/* Clear the bit that indicates the FPU is in use, see comment above. */
 
+        " msr control, r0		\n"
 
+        " cpsie i				\n"/* Globally enable interrupts. */
 
+        " cpsie f				\n"
 
+        " dsb					\n"
 
+        " isb					\n"
 
+        " svc 0					\n"/* System call to start first task. */
 
+        " nop					\n"
 
+        " .ltorg				\n"
 
+        );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/*
 
+ * See header file for description.
 
+ */
 
+BaseType_t xPortStartScheduler( void )
 
+{
 
+    /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
 
+     * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 
+    configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
 
+
 
+    /* This port can be used on all revisions of the Cortex-M7 core other than
 
+     * the r0p1 parts.  r0p1 parts should use the port from the
 
+     * /source/portable/GCC/ARM_CM7/r0p1 directory. */
 
+    configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
 
+    configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
 
+
 
+    #if ( configASSERT_DEFINED == 1 )
 
+        {
 
+            volatile uint32_t ulOriginalPriority;
 
+            volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
 
+            volatile uint8_t ucMaxPriorityValue;
 
+
 
+            /* Determine the maximum priority from which ISR safe FreeRTOS API
 
+             * functions can be called.  ISR safe functions are those that end in
 
+             * "FromISR".  FreeRTOS maintains separate thread and ISR API functions to
 
+             * ensure interrupt entry is as fast and simple as possible.
 
+             *
 
+             * Save the interrupt priority value that is about to be clobbered. */
 
+            ulOriginalPriority = *pucFirstUserPriorityRegister;
 
+
 
+            /* Determine the number of priority bits available.  First write to all
 
+             * possible bits. */
 
+            *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 
+
 
+            /* Read the value back to see how many bits stuck. */
 
+            ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 
+
 
+            /* Use the same mask on the maximum system call priority. */
 
+            ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 
+
 
+            /* Calculate the maximum acceptable priority group value for the number
 
+             * of bits read back. */
 
+            ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 
+
 
+            while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 
+            {
 
+                ulMaxPRIGROUPValue--;
 
+                ucMaxPriorityValue <<= ( uint8_t ) 0x01;
 
+            }
 
+
 
+            #ifdef __NVIC_PRIO_BITS
 
+                {
 
+                    /* Check the CMSIS configuration that defines the number of
 
+                     * priority bits matches the number of priority bits actually queried
 
+                     * from the hardware. */
 
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
 
+                }
 
+            #endif
 
+
 
+            #ifdef configPRIO_BITS
 
+                {
 
+                    /* Check the FreeRTOS configuration that defines the number of
 
+                     * priority bits matches the number of priority bits actually queried
 
+                     * from the hardware. */
 
+                    configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
 
+                }
 
+            #endif
 
+
 
+            /* Shift the priority group value back to its position within the AIRCR
 
+             * register. */
 
+            ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
 
+            ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 
+
 
+            /* Restore the clobbered interrupt priority register to its original
 
+             * value. */
 
+            *pucFirstUserPriorityRegister = ulOriginalPriority;
 
+        }
 
+    #endif /* conifgASSERT_DEFINED */
 
+
 
+    /* Make PendSV and SysTick the lowest priority interrupts. */
 
+    portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
 
+    portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
 
+
 
+    /* Start the timer that generates the tick ISR.  Interrupts are disabled
 
+     * here already. */
 
+    vPortSetupTimerInterrupt();
 
+
 
+    /* Initialise the critical nesting count ready for the first task. */
 
+    uxCriticalNesting = 0;
 
+
 
+    /* Ensure the VFP is enabled - it should be anyway. */
 
+    vPortEnableVFP();
 
+
 
+    /* Lazy save always. */
 
+    *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 
+
 
+    /* Start the first task. */
 
+    prvPortStartFirstTask();
 
+
 
+    /* Should never get here as the tasks will now be executing!  Call the task
 
+     * exit error function to prevent compiler warnings about a static function
 
+     * not being called in the case that the application writer overrides this
 
+     * functionality by defining configTASK_RETURN_ADDRESS.  Call
 
+     * vTaskSwitchContext() so link time optimisation does not remove the
 
+     * symbol. */
 
+    vTaskSwitchContext();
 
+    prvTaskExitError();
 
+
 
+    /* Should not get here! */
 
+    return 0;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vPortEndScheduler( void )
 
+{
 
+    /* Not implemented in ports where there is nothing to return to.
 
+     * Artificially force an assert. */
 
+    configASSERT( uxCriticalNesting == 1000UL );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vPortEnterCritical( void )
 
+{
 
+    portDISABLE_INTERRUPTS();
 
+    uxCriticalNesting++;
 
+
 
+    /* This is not the interrupt safe version of the enter critical function so
 
+     * assert() if it is being called from an interrupt context.  Only API
 
+     * functions that end in "FromISR" can be used in an interrupt.  Only assert if
 
+     * the critical nesting count is 1 to protect against recursive calls if the
 
+     * assert function also uses a critical section. */
 
+    if( uxCriticalNesting == 1 )
 
+    {
 
+        configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vPortExitCritical( void )
 
+{
 
+    configASSERT( uxCriticalNesting );
 
+    uxCriticalNesting--;
 
+
 
+    if( uxCriticalNesting == 0 )
 
+    {
 
+        portENABLE_INTERRUPTS();
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void xPortPendSVHandler( void )
 
+{
 
+    /* This is a naked function. */
 
+
 
+    __asm volatile
 
+    (
 
+        "	mrs r0, psp							\n"
 
+        "	isb									\n"
 
+        "										\n"
 
+        "	ldr	r3, pxCurrentTCBConst			\n"/* Get the location of the current TCB. */
 
+        "	ldr	r2, [r3]						\n"
 
+        "										\n"
 
+        "	tst r14, #0x10						\n"/* Is the task using the FPU context?  If so, push high vfp registers. */
 
+        "	it eq								\n"
 
+        "	vstmdbeq r0!, {s16-s31}				\n"
 
+        "										\n"
 
+        "	stmdb r0!, {r4-r11, r14}			\n"/* Save the core registers. */
 
+        "	str r0, [r2]						\n"/* Save the new top of stack into the first member of the TCB. */
 
+        "										\n"
 
+        "	stmdb sp!, {r0, r3}					\n"
 
+        "	mov r0, %0 							\n"
 
+        "	msr basepri, r0						\n"
 
+        "	dsb									\n"
 
+        "	isb									\n"
 
+        "	bl vTaskSwitchContext				\n"
 
+        "	mov r0, #0							\n"
 
+        "	msr basepri, r0						\n"
 
+        "	ldmia sp!, {r0, r3}					\n"
 
+        "										\n"
 
+        "	ldr r1, [r3]						\n"/* The first item in pxCurrentTCB is the task top of stack. */
 
+        "	ldr r0, [r1]						\n"
 
+        "										\n"
 
+        "	ldmia r0!, {r4-r11, r14}			\n"/* Pop the core registers. */
 
+        "										\n"
 
+        "	tst r14, #0x10						\n"/* Is the task using the FPU context?  If so, pop the high vfp registers too. */
 
+        "	it eq								\n"
 
+        "	vldmiaeq r0!, {s16-s31}				\n"
 
+        "										\n"
 
+        "	msr psp, r0							\n"
 
+        "	isb									\n"
 
+        "										\n"
 
+        #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata workaround. */
 
+            #if WORKAROUND_PMU_CM001 == 1
 
+                "			push { r14 }				\n"
 
+                "			pop { pc }					\n"
 
+            #endif
 
+        #endif
 
+        "										\n"
 
+        "	bx r14								\n"
 
+        "										\n"
 
+        "	.align 4							\n"
 
+        "pxCurrentTCBConst: .word pxCurrentTCB	\n"
 
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
 
+    );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void xPortSysTickHandler( void )
 
+{
 
+    /* The SysTick runs at the lowest interrupt priority, so when this interrupt
 
+     * executes all interrupts must be unmasked.  There is therefore no need to
 
+     * save and then restore the interrupt mask value as its value is already
 
+     * known. */
 
+    portDISABLE_INTERRUPTS();
 
+    {
 
+        /* Increment the RTOS tick. */
 
+        if( xTaskIncrementTick() != pdFALSE )
 
+        {
 
+            /* A context switch is required.  Context switching is performed in
 
+             * the PendSV interrupt.  Pend the PendSV interrupt. */
 
+            portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
+        }
 
+    }
 
+    portENABLE_INTERRUPTS();
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TICKLESS_IDLE == 1 )
 
+
 
+    __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
 
+    {
 
+        uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
 
+        TickType_t xModifiableIdleTime;
 
+
 
+        /* Make sure the SysTick reload value does not overflow the counter. */
 
+        if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
 
+        {
 
+            xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
 
+        }
 
+
 
+        /* Stop the SysTick momentarily.  The time the SysTick is stopped for
 
+         * is accounted for as best it can be, but using the tickless mode will
 
+         * inevitably result in some tiny drift of the time maintained by the
 
+         * kernel with respect to calendar time. */
 
+        portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
 
+
 
+        /* Calculate the reload value required to wait xExpectedIdleTime
 
+         * tick periods.  -1 is used because this code will execute part way
 
+         * through one of the tick periods. */
 
+        ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
 
+
 
+        if( ulReloadValue > ulStoppedTimerCompensation )
 
+        {
 
+            ulReloadValue -= ulStoppedTimerCompensation;
 
+        }
 
+
 
+        /* Enter a critical section but don't use the taskENTER_CRITICAL()
 
+         * method as that will mask interrupts that should exit sleep mode. */
 
+        __asm volatile ( "cpsid i" ::: "memory" );
 
+        __asm volatile ( "dsb" );
 
+        __asm volatile ( "isb" );
 
+
 
+        /* If a context switch is pending or a task is waiting for the scheduler
 
+         * to be unsuspended then abandon the low power entry. */
 
+        if( eTaskConfirmSleepModeStatus() == eAbortSleep )
 
+        {
 
+            /* Restart from whatever is left in the count register to complete
 
+             * this tick period. */
 
+            portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
+
 
+            /* Restart SysTick. */
 
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
+
 
+            /* Reset the reload register to the value required for normal tick
 
+             * periods. */
 
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
+
 
+            /* Re-enable interrupts - see comments above the cpsid instruction()
 
+             * above. */
 
+            __asm volatile ( "cpsie i" ::: "memory" );
 
+        }
 
+        else
 
+        {
 
+            /* Set the new reload value. */
 
+            portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
 
+
 
+            /* Clear the SysTick count flag and set the count value back to
 
+             * zero. */
 
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
+
 
+            /* Restart SysTick. */
 
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
+
 
+            /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
 
+             * set its parameter to 0 to indicate that its implementation contains
 
+             * its own wait for interrupt or wait for event instruction, and so wfi
 
+             * should not be executed again.  However, the original expected idle
 
+             * time variable must remain unmodified, so a copy is taken. */
 
+            xModifiableIdleTime = xExpectedIdleTime;
 
+            configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
 
+
 
+            if( xModifiableIdleTime > 0 )
 
+            {
 
+                __asm volatile ( "dsb" ::: "memory" );
 
+                __asm volatile ( "wfi" );
 
+                __asm volatile ( "isb" );
 
+            }
 
+
 
+            configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
 
+
 
+            /* Re-enable interrupts to allow the interrupt that brought the MCU
 
+             * out of sleep mode to execute immediately.  see comments above
 
+             * __disable_interrupt() call above. */
 
+            __asm volatile ( "cpsie i" ::: "memory" );
 
+            __asm volatile ( "dsb" );
 
+            __asm volatile ( "isb" );
 
+
 
+            /* Disable interrupts again because the clock is about to be stopped
 
+             * and interrupts that execute while the clock is stopped will increase
 
+             * any slippage between the time maintained by the RTOS and calendar
 
+             * time. */
 
+            __asm volatile ( "cpsid i" ::: "memory" );
 
+            __asm volatile ( "dsb" );
 
+            __asm volatile ( "isb" );
 
+
 
+            /* Disable the SysTick clock without reading the
 
+             * portNVIC_SYSTICK_CTRL_REG register to ensure the
 
+             * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
 
+             * the time the SysTick is stopped for is accounted for as best it can
 
+             * be, but using the tickless mode will inevitably result in some tiny
 
+             * drift of the time maintained by the kernel with respect to calendar
 
+             * time*/
 
+            portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
 
+
 
+            /* Determine if the SysTick clock has already counted to zero and
 
+             * been set back to the current reload value (the reload back being
 
+             * correct for the entire expected idle time) or if the SysTick is yet
 
+             * to count to zero (in which case an interrupt other than the SysTick
 
+             * must have brought the system out of sleep mode). */
 
+            if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
 
+            {
 
+                uint32_t ulCalculatedLoadValue;
 
+
 
+                /* The tick interrupt is already pending, and the SysTick count
 
+                 * reloaded with ulReloadValue.  Reset the
 
+                 * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
 
+                 * period. */
 
+                ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
 
+
 
+                /* Don't allow a tiny value, or values that have somehow
 
+                 * underflowed because the post sleep hook did something
 
+                 * that took too long. */
 
+                if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
 
+                {
 
+                    ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
 
+                }
 
+
 
+                portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
 
+
 
+                /* As the pending tick will be processed as soon as this
 
+                 * function exits, the tick value maintained by the tick is stepped
 
+                 * forward by one less than the time spent waiting. */
 
+                ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
 
+            }
 
+            else
 
+            {
 
+                /* Something other than the tick interrupt ended the sleep.
 
+                 * Work out how long the sleep lasted rounded to complete tick
 
+                 * periods (not the ulReload value which accounted for part
 
+                 * ticks). */
 
+                ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
+
 
+                /* How many complete tick periods passed while the processor
 
+                 * was waiting? */
 
+                ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
 
+
 
+                /* The reload value is set to whatever fraction of a single tick
 
+                 * period remains. */
 
+                portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
 
+            }
 
+
 
+            /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
 
+             * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
 
+             * value. */
 
+            portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
+            portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
 
+            vTaskStepTick( ulCompleteTickPeriods );
 
+            portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
 
+
 
+            /* Exit with interrupts enabled. */
 
+            __asm volatile ( "cpsie i" ::: "memory" );
 
+        }
 
+    }
 
+
 
+#endif /* #if configUSE_TICKLESS_IDLE */
 
+/*-----------------------------------------------------------*/
 
+
 
+/*
 
+ * Setup the systick timer to generate the tick interrupts at the required
 
+ * frequency.
 
+ */
 
+__attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
 
+{
 
+    /* Calculate the constants required to configure the tick interrupt. */
 
+    #if ( configUSE_TICKLESS_IDLE == 1 )
 
+        {
 
+            ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
 
+            xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
 
+            ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
 
+        }
 
+    #endif /* configUSE_TICKLESS_IDLE */
 
+
 
+    /* Stop and clear the SysTick. */
 
+    portNVIC_SYSTICK_CTRL_REG = 0UL;
 
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
+
 
+    /* Configure SysTick to interrupt at the requested rate. */
 
+    portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
 
+    portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+/* This is a naked function. */
 
+static void vPortEnableVFP( void )
 
+{
 
+    __asm volatile
 
+    (
 
+        "	ldr.w r0, =0xE000ED88		\n"/* The FPU enable bits are in the CPACR. */
 
+        "	ldr r1, [r0]				\n"
 
+        "								\n"
 
+        "	orr r1, r1, #( 0xf << 20 )	\n"/* Enable CP10 and CP11 coprocessors, then save back. */
 
+        "	str r1, [r0]				\n"
 
+        "	bx r14						\n"
 
+        "	.ltorg						\n"
 
+    );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configASSERT_DEFINED == 1 )
 
+
 
+    void vPortValidateInterruptPriority( void )
 
+    {
 
+        uint32_t ulCurrentInterrupt;
 
+        uint8_t ucCurrentPriority;
 
+
 
+        /* Obtain the number of the currently executing interrupt. */
 
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
+
 
+        /* Is the interrupt number a user defined interrupt? */
 
+        if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
 
+        {
 
+            /* Look up the interrupt's priority. */
 
+            ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 
+
 
+            /* The following assertion will fail if a service routine (ISR) for
 
+             * an interrupt that has been assigned a priority above
 
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
 
+             * function.  ISR safe FreeRTOS API functions must *only* be called
 
+             * from interrupts that have been assigned a priority at or below
 
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
 
+             *
 
+             * Numerically low interrupt priority numbers represent logically high
 
+             * interrupt priorities, therefore the priority of the interrupt must
 
+             * be set to a value equal to or numerically *higher* than
 
+             * configMAX_SYSCALL_INTERRUPT_PRIORITY.
 
+             *
 
+             * Interrupts that	use the FreeRTOS API must not be left at their
 
+             * default priority of	zero as that is the highest possible priority,
 
+             * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
 
+             * and	therefore also guaranteed to be invalid.
 
+             *
 
+             * FreeRTOS maintains separate thread and ISR API functions to ensure
 
+             * interrupt entry is as fast and simple as possible.
 
+             *
 
+             * The following links provide detailed information:
 
+             * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
 
+             * https://www.FreeRTOS.org/FAQHelp.html */
 
+            configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
 
+        }
 
+
 
+        /* Priority grouping:  The interrupt controller (NVIC) allows the bits
 
+         * that define each interrupt's priority to be split between bits that
 
+         * define the interrupt's pre-emption priority bits and bits that define
 
+         * the interrupt's sub-priority.  For simplicity all bits must be defined
 
+         * to be pre-emption priority bits.  The following assertion will fail if
 
+         * this is not the case (if some bits represent a sub-priority).
 
+         *
 
+         * If the application only uses CMSIS libraries for interrupt
 
+         * configuration then the correct setting can be achieved on all Cortex-M
 
+         * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
 
+         * scheduler.  Note however that some vendor specific peripheral libraries
 
+         * assume a non-zero priority group setting, in which cases using a value
 
+         * of zero will result in unpredictable behaviour. */
 
+        configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
 
+    }
 
+
 
+#endif /* configASSERT_DEFINED */

+ 245 - 0
FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
Vedi File 

@@ -0,0 +1,245 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+
 
+#ifndef PORTMACRO_H
 
+    #define PORTMACRO_H
 
+
 
+    #ifdef __cplusplus
 
+        extern "C" {
 
+    #endif
 
+
 
+/*-----------------------------------------------------------
 
+ * Port specific definitions.
 
+ *
 
+ * The settings in this file configure FreeRTOS correctly for the
 
+ * given hardware and compiler.
 
+ *
 
+ * These settings should not be altered.
 
+ *-----------------------------------------------------------
 
+ */
 
+
 
+/* Type definitions. */
 
+    #define portCHAR          char
 
+    #define portFLOAT         float
 
+    #define portDOUBLE        double
 
+    #define portLONG          long
 
+    #define portSHORT         short
 
+    #define portSTACK_TYPE    uint32_t
 
+    #define portBASE_TYPE     long
 
+
 
+    typedef portSTACK_TYPE   StackType_t;
 
+    typedef long             BaseType_t;
 
+    typedef unsigned long    UBaseType_t;
 
+
 
+    #if ( configUSE_16_BIT_TICKS == 1 )
 
+        typedef uint16_t     TickType_t;
 
+        #define portMAX_DELAY              ( TickType_t ) 0xffff
 
+    #else
 
+        typedef uint32_t     TickType_t;
 
+        #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
 
+
 
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
 
+ * not need to be guarded with a critical section. */
 
+        #define portTICK_TYPE_IS_ATOMIC    1
 
+    #endif
 
+/*-----------------------------------------------------------*/
 
+
 
+/* Architecture specifics. */
 
+    #define portSTACK_GROWTH      ( -1 )
 
+    #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
 
+    #define portBYTE_ALIGNMENT    8
 
+    #define portDONT_DISCARD      __attribute__( ( used ) )
 
+/*-----------------------------------------------------------*/
 
+
 
+/* Scheduler utilities. */
 
+    #define portYIELD()                                 \
 
+    {                                                   \
 
+        /* Set a PendSV to request a context switch. */ \
 
+        portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
 
+                                                        \
 
+        /* Barriers are normally not required but do ensure the code is completely \
 
+         * within the specified behaviour for the architecture. */ \
 
+        __asm volatile ( "dsb" ::: "memory" );                     \
 
+        __asm volatile ( "isb" );                                  \
 
+    }
 
+
 
+    #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
 
+    #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
 
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired != pdFALSE ) portYIELD(); } while( 0 )
 
+    #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 
+/*-----------------------------------------------------------*/
 
+
 
+/* Critical section management. */
 
+    extern void vPortEnterCritical( void );
 
+    extern void vPortExitCritical( void );
 
+    #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
 
+    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
 
+    #define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
 
+    #define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
 
+    #define portENTER_CRITICAL()                      vPortEnterCritical()
 
+    #define portEXIT_CRITICAL()                       vPortExitCritical()
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/* Task function macros as described on the FreeRTOS.org WEB site.  These are
 
+ * not necessary for to use this port.  They are defined so the common demo files
 
+ * (which build with all the ports) will build. */
 
+    #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
 
+    #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
 
+/*-----------------------------------------------------------*/
 
+
 
+/* Tickless idle/low power functionality. */
 
+    #ifndef portSUPPRESS_TICKS_AND_SLEEP
 
+        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
 
+        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
 
+    #endif
 
+/*-----------------------------------------------------------*/
 
+
 
+/* Architecture specific optimisations. */
 
+    #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
 
+        #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
 
+    #endif
 
+
 
+    #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
 
+
 
+/* Generic helper function. */
 
+        __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
 
+        {
 
+            uint8_t ucReturn;
 
+
 
+            __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
 
+
 
+            return ucReturn;
 
+        }
 
+
 
+/* Check the configuration. */
 
+        #if ( configMAX_PRIORITIES > 32 )
 
+            #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
 
+        #endif
 
+
 
+/* Store/clear the ready priorities in a bit map. */
 
+        #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
 
+        #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+        #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
 
+
 
+    #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+    #ifdef configASSERT
 
+        void vPortValidateInterruptPriority( void );
 
+        #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
 
+    #endif
 
+
 
+/* portNOP() is not required by this port. */
 
+    #define portNOP()
 
+
 
+    #define portINLINE              __inline
 
+
 
+    #ifndef portFORCE_INLINE
 
+        #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
 
+    #endif
 
+
 
+    portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
 
+    {
 
+        uint32_t ulCurrentInterrupt;
 
+        BaseType_t xReturn;
 
+
 
+        /* Obtain the number of the currently executing interrupt. */
 
+        __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
 
+
 
+        if( ulCurrentInterrupt == 0 )
 
+        {
 
+            xReturn = pdFALSE;
 
+        }
 
+        else
 
+        {
 
+            xReturn = pdTRUE;
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+    portFORCE_INLINE static void vPortRaiseBASEPRI( void )
 
+    {
 
+        uint32_t ulNewBASEPRI;
 
+
 
+        __asm volatile
 
+        (
 
+            "	mov %0, %1												\n"\
 
+            "	msr basepri, %0											\n"\
 
+            "	isb														\n"\
 
+            "	dsb														\n"\
 
+            : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
 
+        );
 
+    }
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+    portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
 
+    {
 
+        uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
 
+
 
+        __asm volatile
 
+        (
 
+            "	mrs %0, basepri											\n"\
 
+            "	mov %1, %2												\n"\
 
+            "	msr basepri, %1											\n"\
 
+            "	isb														\n"\
 
+            "	dsb														\n"\
 
+            : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
 
+        );
 
+
 
+        /* This return will not be reached but is necessary to prevent compiler
 
+         * warnings. */
 
+        return ulOriginalBASEPRI;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
 
+    {
 
+        __asm volatile
 
+        (
 
+            "	msr basepri, %0	"::"r" ( ulNewMaskValue ) : "memory"
 
+        );
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
 
+
 
+    #ifdef __cplusplus
 
+        }
 
+    #endif
 
+
 
+#endif /* PORTMACRO_H */

+ 504 - 0
FreeRTOS/Source/portable/MemMang/heap_4.c
Vedi File 

@@ -0,0 +1,504 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/*
 
+ * A sample implementation of pvPortMalloc() and vPortFree() that combines
 
+ * (coalescences) adjacent memory blocks as they are freed, and in so doing
 
+ * limits memory fragmentation.
 
+ *
 
+ * See heap_1.c, heap_2.c and heap_3.c for alternative implementations, and the
 
+ * memory management pages of https://www.FreeRTOS.org for more information.
 
+ */
 
+#include <stdlib.h>
 
+
 
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
 
+ * all the API functions to use the MPU wrappers.  That should only be done when
 
+ * task.h is included from an application file. */
 
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
+
 
+#include "FreeRTOS.h"
 
+#include "task.h"
 
+
 
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
+
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
 
+    #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
 
+#endif
 
+
 
+/* Block sizes must not get too small. */
 
+#define heapMINIMUM_BLOCK_SIZE    ( ( size_t ) ( xHeapStructSize << 1 ) )
 
+
 
+/* Assumes 8bit bytes! */
 
+#define heapBITS_PER_BYTE         ( ( size_t ) 8 )
 
+
 
+/* Allocate the memory for the heap. */
 
+#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
 
+
 
+/* The application writer has already defined the array used for the RTOS
 
+* heap - probably so it can be placed in a special segment or address. */
 
+    extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
 
+#else
 
+    PRIVILEGED_DATA static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
 
+#endif /* configAPPLICATION_ALLOCATED_HEAP */
 
+
 
+/* Define the linked list structure.  This is used to link free blocks in order
 
+ * of their memory address. */
 
+typedef struct A_BLOCK_LINK
 
+{
 
+    struct A_BLOCK_LINK * pxNextFreeBlock; /*<< The next free block in the list. */
 
+    size_t xBlockSize;                     /*<< The size of the free block. */
 
+} BlockLink_t;
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/*
 
+ * Inserts a block of memory that is being freed into the correct position in
 
+ * the list of free memory blocks.  The block being freed will be merged with
 
+ * the block in front it and/or the block behind it if the memory blocks are
 
+ * adjacent to each other.
 
+ */
 
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Called automatically to setup the required heap structures the first time
 
+ * pvPortMalloc() is called.
 
+ */
 
+static void prvHeapInit( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/* The size of the structure placed at the beginning of each allocated memory
 
+ * block must by correctly byte aligned. */
 
+static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 
+
 
+/* Create a couple of list links to mark the start and end of the list. */
 
+PRIVILEGED_DATA static BlockLink_t xStart, * pxEnd = NULL;
 
+
 
+/* Keeps track of the number of calls to allocate and free memory as well as the
 
+ * number of free bytes remaining, but says nothing about fragmentation. */
 
+PRIVILEGED_DATA static size_t xFreeBytesRemaining = 0U;
 
+PRIVILEGED_DATA static size_t xMinimumEverFreeBytesRemaining = 0U;
 
+PRIVILEGED_DATA static size_t xNumberOfSuccessfulAllocations = 0;
 
+PRIVILEGED_DATA static size_t xNumberOfSuccessfulFrees = 0;
 
+
 
+/* Gets set to the top bit of an size_t type.  When this bit in the xBlockSize
 
+ * member of an BlockLink_t structure is set then the block belongs to the
 
+ * application.  When the bit is free the block is still part of the free heap
 
+ * space. */
 
+PRIVILEGED_DATA static size_t xBlockAllocatedBit = 0;
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+void * pvPortMalloc( size_t xWantedSize )
 
+{
 
+    BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink;
 
+    void * pvReturn = NULL;
 
+
 
+    vTaskSuspendAll();
 
+    {
 
+        /* If this is the first call to malloc then the heap will require
 
+         * initialisation to setup the list of free blocks. */
 
+        if( pxEnd == NULL )
 
+        {
 
+            prvHeapInit();
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        /* Check the requested block size is not so large that the top bit is
 
+         * set.  The top bit of the block size member of the BlockLink_t structure
 
+         * is used to determine who owns the block - the application or the
 
+         * kernel, so it must be free. */
 
+        if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
 
+        {
 
+            /* The wanted size must be increased so it can contain a BlockLink_t
 
+             * structure in addition to the requested amount of bytes. */
 
+            if( ( xWantedSize > 0 ) &&
 
+                ( ( xWantedSize + xHeapStructSize ) >  xWantedSize ) ) /* Overflow check */
 
+            {
 
+                xWantedSize += xHeapStructSize;
 
+
 
+                /* Ensure that blocks are always aligned. */
 
+                if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
 
+                {
 
+                    /* Byte alignment required. Check for overflow. */
 
+                    if( ( xWantedSize + ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ) )
 
+                            > xWantedSize )
 
+                    {
 
+                        xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
 
+                        configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
 
+                    }
 
+                    else
 
+                    {
 
+                        xWantedSize = 0;
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                xWantedSize = 0;
 
+            }
 
+
 
+            if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
 
+            {
 
+                /* Traverse the list from the start (lowest address) block until
 
+                 * one of adequate size is found. */
 
+                pxPreviousBlock = &xStart;
 
+                pxBlock = xStart.pxNextFreeBlock;
 
+
 
+                while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 
+                {
 
+                    pxPreviousBlock = pxBlock;
 
+                    pxBlock = pxBlock->pxNextFreeBlock;
 
+                }
 
+
 
+                /* If the end marker was reached then a block of adequate size
 
+                 * was not found. */
 
+                if( pxBlock != pxEnd )
 
+                {
 
+                    /* Return the memory space pointed to - jumping over the
 
+                     * BlockLink_t structure at its start. */
 
+                    pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 
+
 
+                    /* This block is being returned for use so must be taken out
 
+                     * of the list of free blocks. */
 
+                    pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 
+
 
+                    /* If the block is larger than required it can be split into
 
+                     * two. */
 
+                    if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
 
+                    {
 
+                        /* This block is to be split into two.  Create a new
 
+                         * block following the number of bytes requested. The void
 
+                         * cast is used to prevent byte alignment warnings from the
 
+                         * compiler. */
 
+                        pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
 
+                        configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
 
+
 
+                        /* Calculate the sizes of two blocks split from the
 
+                         * single block. */
 
+                        pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
 
+                        pxBlock->xBlockSize = xWantedSize;
 
+
 
+                        /* Insert the new block into the list of free blocks. */
 
+                        prvInsertBlockIntoFreeList( pxNewBlockLink );
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+
 
+                    xFreeBytesRemaining -= pxBlock->xBlockSize;
 
+
 
+                    if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
 
+                    {
 
+                        xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+
 
+                    /* The block is being returned - it is allocated and owned
 
+                     * by the application and has no "next" block. */
 
+                    pxBlock->xBlockSize |= xBlockAllocatedBit;
 
+                    pxBlock->pxNextFreeBlock = NULL;
 
+                    xNumberOfSuccessfulAllocations++;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        traceMALLOC( pvReturn, xWantedSize );
 
+    }
 
+    ( void ) xTaskResumeAll();
 
+
 
+    #if ( configUSE_MALLOC_FAILED_HOOK == 1 )
 
+        {
 
+            if( pvReturn == NULL )
 
+            {
 
+                extern void vApplicationMallocFailedHook( void );
 
+                vApplicationMallocFailedHook();
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+    #endif /* if ( configUSE_MALLOC_FAILED_HOOK == 1 ) */
 
+
 
+    configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
 
+    return pvReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vPortFree( void * pv )
 
+{
 
+    uint8_t * puc = ( uint8_t * ) pv;
 
+    BlockLink_t * pxLink;
 
+
 
+    if( pv != NULL )
 
+    {
 
+        /* The memory being freed will have an BlockLink_t structure immediately
 
+         * before it. */
 
+        puc -= xHeapStructSize;
 
+
 
+        /* This casting is to keep the compiler from issuing warnings. */
 
+        pxLink = ( void * ) puc;
 
+
 
+        /* Check the block is actually allocated. */
 
+        configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
 
+        configASSERT( pxLink->pxNextFreeBlock == NULL );
 
+
 
+        if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
 
+        {
 
+            if( pxLink->pxNextFreeBlock == NULL )
 
+            {
 
+                /* The block is being returned to the heap - it is no longer
 
+                 * allocated. */
 
+                pxLink->xBlockSize &= ~xBlockAllocatedBit;
 
+
 
+                vTaskSuspendAll();
 
+                {
 
+                    /* Add this block to the list of free blocks. */
 
+                    xFreeBytesRemaining += pxLink->xBlockSize;
 
+                    traceFREE( pv, pxLink->xBlockSize );
 
+                    prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
 
+                    xNumberOfSuccessfulFrees++;
 
+                }
 
+                ( void ) xTaskResumeAll();
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+size_t xPortGetFreeHeapSize( void )
 
+{
 
+    return xFreeBytesRemaining;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+size_t xPortGetMinimumEverFreeHeapSize( void )
 
+{
 
+    return xMinimumEverFreeBytesRemaining;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vPortInitialiseBlocks( void )
 
+{
 
+    /* This just exists to keep the linker quiet. */
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvHeapInit( void ) /* PRIVILEGED_FUNCTION */
 
+{
 
+    BlockLink_t * pxFirstFreeBlock;
 
+    uint8_t * pucAlignedHeap;
 
+    size_t uxAddress;
 
+    size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
 
+
 
+    /* Ensure the heap starts on a correctly aligned boundary. */
 
+    uxAddress = ( size_t ) ucHeap;
 
+
 
+    if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
 
+    {
 
+        uxAddress += ( portBYTE_ALIGNMENT - 1 );
 
+        uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 
+        xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
 
+    }
 
+
 
+    pucAlignedHeap = ( uint8_t * ) uxAddress;
 
+
 
+    /* xStart is used to hold a pointer to the first item in the list of free
 
+     * blocks.  The void cast is used to prevent compiler warnings. */
 
+    xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
 
+    xStart.xBlockSize = ( size_t ) 0;
 
+
 
+    /* pxEnd is used to mark the end of the list of free blocks and is inserted
 
+     * at the end of the heap space. */
 
+    uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
 
+    uxAddress -= xHeapStructSize;
 
+    uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 
+    pxEnd = ( void * ) uxAddress;
 
+    pxEnd->xBlockSize = 0;
 
+    pxEnd->pxNextFreeBlock = NULL;
 
+
 
+    /* To start with there is a single free block that is sized to take up the
 
+     * entire heap space, minus the space taken by pxEnd. */
 
+    pxFirstFreeBlock = ( void * ) pucAlignedHeap;
 
+    pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
 
+    pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 
+
 
+    /* Only one block exists - and it covers the entire usable heap space. */
 
+    xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 
+    xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 
+
 
+    /* Work out the position of the top bit in a size_t variable. */
 
+    xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) /* PRIVILEGED_FUNCTION */
 
+{
 
+    BlockLink_t * pxIterator;
 
+    uint8_t * puc;
 
+
 
+    /* Iterate through the list until a block is found that has a higher address
 
+     * than the block being inserted. */
 
+    for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
 
+    {
 
+        /* Nothing to do here, just iterate to the right position. */
 
+    }
 
+
 
+    /* Do the block being inserted, and the block it is being inserted after
 
+     * make a contiguous block of memory? */
 
+    puc = ( uint8_t * ) pxIterator;
 
+
 
+    if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
 
+    {
 
+        pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
 
+        pxBlockToInsert = pxIterator;
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    /* Do the block being inserted, and the block it is being inserted before
 
+     * make a contiguous block of memory? */
 
+    puc = ( uint8_t * ) pxBlockToInsert;
 
+
 
+    if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
 
+    {
 
+        if( pxIterator->pxNextFreeBlock != pxEnd )
 
+        {
 
+            /* Form one big block from the two blocks. */
 
+            pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
 
+            pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
 
+        }
 
+        else
 
+        {
 
+            pxBlockToInsert->pxNextFreeBlock = pxEnd;
 
+        }
 
+    }
 
+    else
 
+    {
 
+        pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
 
+    }
 
+
 
+    /* If the block being inserted plugged a gab, so was merged with the block
 
+     * before and the block after, then it's pxNextFreeBlock pointer will have
 
+     * already been set, and should not be set here as that would make it point
 
+     * to itself. */
 
+    if( pxIterator != pxBlockToInsert )
 
+    {
 
+        pxIterator->pxNextFreeBlock = pxBlockToInsert;
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vPortGetHeapStats( HeapStats_t * pxHeapStats )
 
+{
 
+    BlockLink_t * pxBlock;
 
+    size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */
 
+
 
+    vTaskSuspendAll();
 
+    {
 
+        pxBlock = xStart.pxNextFreeBlock;
 
+
 
+        /* pxBlock will be NULL if the heap has not been initialised.  The heap
 
+         * is initialised automatically when the first allocation is made. */
 
+        if( pxBlock != NULL )
 
+        {
 
+            do
 
+            {
 
+                /* Increment the number of blocks and record the largest block seen
 
+                 * so far. */
 
+                xBlocks++;
 
+
 
+                if( pxBlock->xBlockSize > xMaxSize )
 
+                {
 
+                    xMaxSize = pxBlock->xBlockSize;
 
+                }
 
+
 
+                if( pxBlock->xBlockSize < xMinSize )
 
+                {
 
+                    xMinSize = pxBlock->xBlockSize;
 
+                }
 
+
 
+                /* Move to the next block in the chain until the last block is
 
+                 * reached. */
 
+                pxBlock = pxBlock->pxNextFreeBlock;
 
+            } while( pxBlock != pxEnd );
 
+        }
 
+    }
 
+    ( void ) xTaskResumeAll();
 
+
 
+    pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize;
 
+    pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize;
 
+    pxHeapStats->xNumberOfFreeBlocks = xBlocks;
 
+
 
+    taskENTER_CRITICAL();
 
+    {
 
+        pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining;
 
+        pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations;
 
+        pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees;
 
+        pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining;
 
+    }
 
+    taskEXIT_CRITICAL();
 
+}

+ 3074 - 0
FreeRTOS/Source/queue.c
Vedi File 

@@ -0,0 +1,3074 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+#include <stdlib.h>
 
+#include <string.h>
 
+
 
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
 
+ * all the API functions to use the MPU wrappers.  That should only be done when
 
+ * task.h is included from an application file. */
 
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
+
 
+#include "FreeRTOS.h"
 
+#include "task.h"
 
+#include "queue.h"
 
+
 
+#if ( configUSE_CO_ROUTINES == 1 )
 
+    #include "croutine.h"
 
+#endif
 
+
 
+/* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
 
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
 
+ * for the header files above, but not in this file, in order to generate the
 
+ * correct privileged Vs unprivileged linkage and placement. */
 
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
 
+
 
+
 
+/* Constants used with the cRxLock and cTxLock structure members. */
 
+#define queueUNLOCKED             ( ( int8_t ) -1 )
 
+#define queueLOCKED_UNMODIFIED    ( ( int8_t ) 0 )
 
+#define queueINT8_MAX             ( ( int8_t ) 127 )
 
+
 
+/* When the Queue_t structure is used to represent a base queue its pcHead and
 
+ * pcTail members are used as pointers into the queue storage area.  When the
 
+ * Queue_t structure is used to represent a mutex pcHead and pcTail pointers are
 
+ * not necessary, and the pcHead pointer is set to NULL to indicate that the
 
+ * structure instead holds a pointer to the mutex holder (if any).  Map alternative
 
+ * names to the pcHead and structure member to ensure the readability of the code
 
+ * is maintained.  The QueuePointers_t and SemaphoreData_t types are used to form
 
+ * a union as their usage is mutually exclusive dependent on what the queue is
 
+ * being used for. */
 
+#define uxQueueType               pcHead
 
+#define queueQUEUE_IS_MUTEX       NULL
 
+
 
+typedef struct QueuePointers
 
+{
 
+    int8_t * pcTail;     /*< Points to the byte at the end of the queue storage area.  Once more byte is allocated than necessary to store the queue items, this is used as a marker. */
 
+    int8_t * pcReadFrom; /*< Points to the last place that a queued item was read from when the structure is used as a queue. */
 
+} QueuePointers_t;
 
+
 
+typedef struct SemaphoreData
 
+{
 
+    TaskHandle_t xMutexHolder;        /*< The handle of the task that holds the mutex. */
 
+    UBaseType_t uxRecursiveCallCount; /*< Maintains a count of the number of times a recursive mutex has been recursively 'taken' when the structure is used as a mutex. */
 
+} SemaphoreData_t;
 
+
 
+/* Semaphores do not actually store or copy data, so have an item size of
 
+ * zero. */
 
+#define queueSEMAPHORE_QUEUE_ITEM_LENGTH    ( ( UBaseType_t ) 0 )
 
+#define queueMUTEX_GIVE_BLOCK_TIME          ( ( TickType_t ) 0U )
 
+
 
+#if ( configUSE_PREEMPTION == 0 )
 
+
 
+/* If the cooperative scheduler is being used then a yield should not be
 
+ * performed just because a higher priority task has been woken. */
 
+    #define queueYIELD_IF_USING_PREEMPTION()
 
+#else
 
+    #define queueYIELD_IF_USING_PREEMPTION()    portYIELD_WITHIN_API()
 
+#endif
 
+
 
+/*
 
+ * Definition of the queue used by the scheduler.
 
+ * Items are queued by copy, not reference.  See the following link for the
 
+ * rationale: https://www.FreeRTOS.org/Embedded-RTOS-Queues.html
 
+ */
 
+typedef struct QueueDefinition /* The old naming convention is used to prevent breaking kernel aware debuggers. */
 
+{
 
+    int8_t * pcHead;           /*< Points to the beginning of the queue storage area. */
 
+    int8_t * pcWriteTo;        /*< Points to the free next place in the storage area. */
 
+
 
+    union
 
+    {
 
+        QueuePointers_t xQueue;     /*< Data required exclusively when this structure is used as a queue. */
 
+        SemaphoreData_t xSemaphore; /*< Data required exclusively when this structure is used as a semaphore. */
 
+    } u;
 
+
 
+    List_t xTasksWaitingToSend;             /*< List of tasks that are blocked waiting to post onto this queue.  Stored in priority order. */
 
+    List_t xTasksWaitingToReceive;          /*< List of tasks that are blocked waiting to read from this queue.  Stored in priority order. */
 
+
 
+    volatile UBaseType_t uxMessagesWaiting; /*< The number of items currently in the queue. */
 
+    UBaseType_t uxLength;                   /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */
 
+    UBaseType_t uxItemSize;                 /*< The size of each items that the queue will hold. */
 
+
 
+    volatile int8_t cRxLock;                /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
 
+    volatile int8_t cTxLock;                /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
 
+
 
+    #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
+        uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the memory used by the queue was statically allocated to ensure no attempt is made to free the memory. */
 
+    #endif
 
+
 
+    #if ( configUSE_QUEUE_SETS == 1 )
 
+        struct QueueDefinition * pxQueueSetContainer;
 
+    #endif
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        UBaseType_t uxQueueNumber;
 
+        uint8_t ucQueueType;
 
+    #endif
 
+} xQUEUE;
 
+
 
+/* The old xQUEUE name is maintained above then typedefed to the new Queue_t
 
+ * name below to enable the use of older kernel aware debuggers. */
 
+typedef xQUEUE Queue_t;
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/*
 
+ * The queue registry is just a means for kernel aware debuggers to locate
 
+ * queue structures.  It has no other purpose so is an optional component.
 
+ */
 
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
 
+
 
+/* The type stored within the queue registry array.  This allows a name
 
+ * to be assigned to each queue making kernel aware debugging a little
 
+ * more user friendly. */
 
+    typedef struct QUEUE_REGISTRY_ITEM
 
+    {
 
+        const char * pcQueueName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+        QueueHandle_t xHandle;
 
+    } xQueueRegistryItem;
 
+
 
+/* The old xQueueRegistryItem name is maintained above then typedefed to the
 
+ * new xQueueRegistryItem name below to enable the use of older kernel aware
 
+ * debuggers. */
 
+    typedef xQueueRegistryItem QueueRegistryItem_t;
 
+
 
+/* The queue registry is simply an array of QueueRegistryItem_t structures.
 
+ * The pcQueueName member of a structure being NULL is indicative of the
 
+ * array position being vacant. */
 
+    PRIVILEGED_DATA QueueRegistryItem_t xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];
 
+
 
+#endif /* configQUEUE_REGISTRY_SIZE */
 
+
 
+/*
 
+ * Unlocks a queue locked by a call to prvLockQueue.  Locking a queue does not
 
+ * prevent an ISR from adding or removing items to the queue, but does prevent
 
+ * an ISR from removing tasks from the queue event lists.  If an ISR finds a
 
+ * queue is locked it will instead increment the appropriate queue lock count
 
+ * to indicate that a task may require unblocking.  When the queue in unlocked
 
+ * these lock counts are inspected, and the appropriate action taken.
 
+ */
 
+static void prvUnlockQueue( Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Uses a critical section to determine if there is any data in a queue.
 
+ *
 
+ * @return pdTRUE if the queue contains no items, otherwise pdFALSE.
 
+ */
 
+static BaseType_t prvIsQueueEmpty( const Queue_t * pxQueue ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Uses a critical section to determine if there is any space in a queue.
 
+ *
 
+ * @return pdTRUE if there is no space, otherwise pdFALSE;
 
+ */
 
+static BaseType_t prvIsQueueFull( const Queue_t * pxQueue ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Copies an item into the queue, either at the front of the queue or the
 
+ * back of the queue.
 
+ */
 
+static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue,
 
+                                      const void * pvItemToQueue,
 
+                                      const BaseType_t xPosition ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Copies an item out of a queue.
 
+ */
 
+static void prvCopyDataFromQueue( Queue_t * const pxQueue,
 
+                                  void * const pvBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+#if ( configUSE_QUEUE_SETS == 1 )
 
+
 
+/*
 
+ * Checks to see if a queue is a member of a queue set, and if so, notifies
 
+ * the queue set that the queue contains data.
 
+ */
 
+    static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+/*
 
+ * Called after a Queue_t structure has been allocated either statically or
 
+ * dynamically to fill in the structure's members.
 
+ */
 
+static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength,
 
+                                   const UBaseType_t uxItemSize,
 
+                                   uint8_t * pucQueueStorage,
 
+                                   const uint8_t ucQueueType,
 
+                                   Queue_t * pxNewQueue ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Mutexes are a special type of queue.  When a mutex is created, first the
 
+ * queue is created, then prvInitialiseMutex() is called to configure the queue
 
+ * as a mutex.
 
+ */
 
+#if ( configUSE_MUTEXES == 1 )
 
+    static void prvInitialiseMutex( Queue_t * pxNewQueue ) PRIVILEGED_FUNCTION;
 
+#endif
 
+
 
+#if ( configUSE_MUTEXES == 1 )
 
+
 
+/*
 
+ * If a task waiting for a mutex causes the mutex holder to inherit a
 
+ * priority, but the waiting task times out, then the holder should
 
+ * disinherit the priority - but only down to the highest priority of any
 
+ * other tasks that are waiting for the same mutex.  This function returns
 
+ * that priority.
 
+ */
 
+    static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
 
+#endif
 
+/*-----------------------------------------------------------*/
 
+
 
+/*
 
+ * Macro to mark a queue as locked.  Locking a queue prevents an ISR from
 
+ * accessing the queue event lists.
 
+ */
 
+#define prvLockQueue( pxQueue )                            \
 
+    taskENTER_CRITICAL();                                  \
 
+    {                                                      \
 
+        if( ( pxQueue )->cRxLock == queueUNLOCKED )        \
 
+        {                                                  \
 
+            ( pxQueue )->cRxLock = queueLOCKED_UNMODIFIED; \
 
+        }                                                  \
 
+        if( ( pxQueue )->cTxLock == queueUNLOCKED )        \
 
+        {                                                  \
 
+            ( pxQueue )->cTxLock = queueLOCKED_UNMODIFIED; \
 
+        }                                                  \
 
+    }                                                      \
 
+    taskEXIT_CRITICAL()
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
 
+                               BaseType_t xNewQueue )
 
+{
 
+    BaseType_t xReturn = pdPASS;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    configASSERT( pxQueue );
 
+
 
+    if( ( pxQueue != NULL ) &&
 
+        ( pxQueue->uxLength >= 1U ) &&
 
+        /* Check for multiplication overflow. */
 
+        ( ( SIZE_MAX / pxQueue->uxLength ) >= pxQueue->uxItemSize ) )
 
+    {
 
+        taskENTER_CRITICAL();
 
+
 
+        pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 
+        pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
 
+        pxQueue->pcWriteTo = pxQueue->pcHead;
 
+        pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 
+        pxQueue->cRxLock = queueUNLOCKED;
 
+        pxQueue->cTxLock = queueUNLOCKED;
 
+
 
+        if( xNewQueue == pdFALSE )
 
+        {
 
+            /* If there are tasks blocked waiting to read from the queue, then
 
+             * the tasks will remain blocked as after this function exits the queue
 
+             * will still be empty.  If there are tasks blocked waiting to write to
 
+             * the queue, then one should be unblocked as after this function exits
 
+             * it will be possible to write to it. */
 
+            if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 
+            {
 
+                if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 
+                {
 
+                    queueYIELD_IF_USING_PREEMPTION();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            /* Ensure the event queues start in the correct state. */
 
+            vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
 
+            vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
 
+        }
 
+        taskEXIT_CRITICAL();
 
+    }
 
+    else
 
+    {
 
+        xReturn = pdFAIL;
 
+    }
 
+
 
+    configASSERT( xReturn != pdFAIL );
 
+
 
+    /* A value is returned for calling semantic consistency with previous
 
+     * versions. */
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+
 
+    QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
 
+                                             const UBaseType_t uxItemSize,
 
+                                             uint8_t * pucQueueStorage,
 
+                                             StaticQueue_t * pxStaticQueue,
 
+                                             const uint8_t ucQueueType )
 
+    {
 
+        Queue_t * pxNewQueue = NULL;
 
+
 
+        /* The StaticQueue_t structure and the queue storage area must be
 
+         * supplied. */
 
+        configASSERT( pxStaticQueue );
 
+
 
+        if( ( uxQueueLength > ( UBaseType_t ) 0 ) &&
 
+            ( pxStaticQueue != NULL ) &&
 
+            /* A queue storage area should be provided if the item size is not 0, and
 
+             * should not be provided if the item size is 0. */
 
+            ( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) ) &&
 
+            ( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) ) )
 
+        {
 
+
 
+            #if ( configASSERT_DEFINED == 1 )
 
+                {
 
+                    /* Sanity check that the size of the structure used to declare a
 
+                     * variable of type StaticQueue_t or StaticSemaphore_t equals the size of
 
+                     * the real queue and semaphore structures. */
 
+                    volatile size_t xSize = sizeof( StaticQueue_t );
 
+
 
+                    /* This assertion cannot be branch covered in unit tests */
 
+                    configASSERT( xSize == sizeof( Queue_t ) ); /* LCOV_EXCL_BR_LINE */
 
+                    ( void ) xSize;                             /* Keeps lint quiet when configASSERT() is not defined. */
 
+                }
 
+            #endif /* configASSERT_DEFINED */
 
+
 
+            /* The address of a statically allocated queue was passed in, use it.
 
+             * The address of a statically allocated storage area was also passed in
 
+             * but is already set. */
 
+            pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 
+
 
+            #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+                {
 
+                    /* Queues can be allocated wither statically or dynamically, so
 
+                     * note this queue was allocated statically in case the queue is
 
+                     * later deleted. */
 
+                    pxNewQueue->ucStaticallyAllocated = pdTRUE;
 
+                }
 
+            #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
+
 
+            prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 
+        }
 
+        else
 
+        {
 
+            configASSERT( pxNewQueue );
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return pxNewQueue;
 
+    }
 
+
 
+#endif /* configSUPPORT_STATIC_ALLOCATION */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+
 
+    QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength,
 
+                                       const UBaseType_t uxItemSize,
 
+                                       const uint8_t ucQueueType )
 
+    {
 
+        Queue_t * pxNewQueue = NULL;
 
+        size_t xQueueSizeInBytes;
 
+        uint8_t * pucQueueStorage;
 
+
 
+        if( ( uxQueueLength > ( UBaseType_t ) 0 ) &&
 
+            /* Check for multiplication overflow. */
 
+            ( ( SIZE_MAX / uxQueueLength ) >= uxItemSize ) &&
 
+            /* Check for addition overflow. */
 
+            ( ( SIZE_MAX - sizeof( Queue_t ) ) >= ( uxQueueLength * uxItemSize ) ) )
 
+        {
 
+            /* Allocate enough space to hold the maximum number of items that
 
+             * can be in the queue at any time.  It is valid for uxItemSize to be
 
+             * zero in the case the queue is used as a semaphore. */
 
+            xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+
 
+            /* Allocate the queue and storage area.  Justification for MISRA
 
+             * deviation as follows:  pvPortMalloc() always ensures returned memory
 
+             * blocks are aligned per the requirements of the MCU stack.  In this case
 
+             * pvPortMalloc() must return a pointer that is guaranteed to meet the
 
+             * alignment requirements of the Queue_t structure - which in this case
 
+             * is an int8_t *.  Therefore, whenever the stack alignment requirements
 
+             * are greater than or equal to the pointer to char requirements the cast
 
+             * is safe.  In other cases alignment requirements are not strict (one or
 
+             * two bytes). */
 
+            pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
 
+
 
+            if( pxNewQueue != NULL )
 
+            {
 
+                /* Jump past the queue structure to find the location of the queue
 
+                 * storage area. */
 
+                pucQueueStorage = ( uint8_t * ) pxNewQueue;
 
+                pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 
+
 
+                #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+                    {
 
+                        /* Queues can be created either statically or dynamically, so
 
+                         * note this task was created dynamically in case it is later
 
+                         * deleted. */
 
+                        pxNewQueue->ucStaticallyAllocated = pdFALSE;
 
+                    }
 
+                #endif /* configSUPPORT_STATIC_ALLOCATION */
 
+
 
+                prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 
+            }
 
+            else
 
+            {
 
+                traceQUEUE_CREATE_FAILED( ucQueueType );
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            configASSERT( pxNewQueue );
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return pxNewQueue;
 
+    }
 
+
 
+#endif /* configSUPPORT_STATIC_ALLOCATION */
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength,
 
+                                   const UBaseType_t uxItemSize,
 
+                                   uint8_t * pucQueueStorage,
 
+                                   const uint8_t ucQueueType,
 
+                                   Queue_t * pxNewQueue )
 
+{
 
+    /* Remove compiler warnings about unused parameters should
 
+     * configUSE_TRACE_FACILITY not be set to 1. */
 
+    ( void ) ucQueueType;
 
+
 
+    if( uxItemSize == ( UBaseType_t ) 0 )
 
+    {
 
+        /* No RAM was allocated for the queue storage area, but PC head cannot
 
+         * be set to NULL because NULL is used as a key to say the queue is used as
 
+         * a mutex.  Therefore just set pcHead to point to the queue as a benign
 
+         * value that is known to be within the memory map. */
 
+        pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
 
+    }
 
+    else
 
+    {
 
+        /* Set the head to the start of the queue storage area. */
 
+        pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
 
+    }
 
+
 
+    /* Initialise the queue members as described where the queue type is
 
+     * defined. */
 
+    pxNewQueue->uxLength = uxQueueLength;
 
+    pxNewQueue->uxItemSize = uxItemSize;
 
+    ( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        {
 
+            pxNewQueue->ucQueueType = ucQueueType;
 
+        }
 
+    #endif /* configUSE_TRACE_FACILITY */
 
+
 
+    #if ( configUSE_QUEUE_SETS == 1 )
 
+        {
 
+            pxNewQueue->pxQueueSetContainer = NULL;
 
+        }
 
+    #endif /* configUSE_QUEUE_SETS */
 
+
 
+    traceQUEUE_CREATE( pxNewQueue );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_MUTEXES == 1 )
 
+
 
+    static void prvInitialiseMutex( Queue_t * pxNewQueue )
 
+    {
 
+        if( pxNewQueue != NULL )
 
+        {
 
+            /* The queue create function will set all the queue structure members
 
+            * correctly for a generic queue, but this function is creating a
 
+            * mutex.  Overwrite those members that need to be set differently -
 
+            * in particular the information required for priority inheritance. */
 
+            pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
 
+            pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
 
+
 
+            /* In case this is a recursive mutex. */
 
+            pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
 
+
 
+            traceCREATE_MUTEX( pxNewQueue );
 
+
 
+            /* Start with the semaphore in the expected state. */
 
+            ( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
 
+        }
 
+        else
 
+        {
 
+            traceCREATE_MUTEX_FAILED();
 
+        }
 
+    }
 
+
 
+#endif /* configUSE_MUTEXES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
+
 
+    QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
 
+    {
 
+        QueueHandle_t xNewQueue;
 
+        const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 
+
 
+        xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
 
+        prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 
+
 
+        return xNewQueue;
 
+    }
 
+
 
+#endif /* configUSE_MUTEXES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
+
 
+    QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType,
 
+                                           StaticQueue_t * pxStaticQueue )
 
+    {
 
+        QueueHandle_t xNewQueue;
 
+        const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 
+
 
+        /* Prevent compiler warnings about unused parameters if
 
+         * configUSE_TRACE_FACILITY does not equal 1. */
 
+        ( void ) ucQueueType;
 
+
 
+        xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
 
+        prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 
+
 
+        return xNewQueue;
 
+    }
 
+
 
+#endif /* configUSE_MUTEXES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
 
+
 
+    TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore )
 
+    {
 
+        TaskHandle_t pxReturn;
 
+        Queue_t * const pxSemaphore = ( Queue_t * ) xSemaphore;
 
+
 
+        configASSERT( xSemaphore );
 
+
 
+        /* This function is called by xSemaphoreGetMutexHolder(), and should not
 
+         * be called directly.  Note:  This is a good way of determining if the
 
+         * calling task is the mutex holder, but not a good way of determining the
 
+         * identity of the mutex holder, as the holder may change between the
 
+         * following critical section exiting and the function returning. */
 
+        taskENTER_CRITICAL();
 
+        {
 
+            if( pxSemaphore->uxQueueType == queueQUEUE_IS_MUTEX )
 
+            {
 
+                pxReturn = pxSemaphore->u.xSemaphore.xMutexHolder;
 
+            }
 
+            else
 
+            {
 
+                pxReturn = NULL;
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return pxReturn;
 
+    } /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */
 
+
 
+#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
 
+
 
+    TaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore )
 
+    {
 
+        TaskHandle_t pxReturn;
 
+
 
+        configASSERT( xSemaphore );
 
+
 
+        /* Mutexes cannot be used in interrupt service routines, so the mutex
 
+         * holder should not change in an ISR, and therefore a critical section is
 
+         * not required here. */
 
+        if( ( ( Queue_t * ) xSemaphore )->uxQueueType == queueQUEUE_IS_MUTEX )
 
+        {
 
+            pxReturn = ( ( Queue_t * ) xSemaphore )->u.xSemaphore.xMutexHolder;
 
+        }
 
+        else
 
+        {
 
+            pxReturn = NULL;
 
+        }
 
+
 
+        return pxReturn;
 
+    } /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */
 
+
 
+#endif /* if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_RECURSIVE_MUTEXES == 1 )
 
+
 
+    BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
 
+    {
 
+        BaseType_t xReturn;
 
+        Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 
+
 
+        configASSERT( pxMutex );
 
+
 
+        /* If this is the task that holds the mutex then xMutexHolder will not
 
+         * change outside of this task.  If this task does not hold the mutex then
 
+         * pxMutexHolder can never coincidentally equal the tasks handle, and as
 
+         * this is the only condition we are interested in it does not matter if
 
+         * pxMutexHolder is accessed simultaneously by another task.  Therefore no
 
+         * mutual exclusion is required to test the pxMutexHolder variable. */
 
+        if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 
+        {
 
+            traceGIVE_MUTEX_RECURSIVE( pxMutex );
 
+
 
+            /* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
 
+             * the task handle, therefore no underflow check is required.  Also,
 
+             * uxRecursiveCallCount is only modified by the mutex holder, and as
 
+             * there can only be one, no mutual exclusion is required to modify the
 
+             * uxRecursiveCallCount member. */
 
+            ( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
 
+
 
+            /* Has the recursive call count unwound to 0? */
 
+            if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
 
+            {
 
+                /* Return the mutex.  This will automatically unblock any other
 
+                 * task that might be waiting to access the mutex. */
 
+                ( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            xReturn = pdPASS;
 
+        }
 
+        else
 
+        {
 
+            /* The mutex cannot be given because the calling task is not the
 
+             * holder. */
 
+            xReturn = pdFAIL;
 
+
 
+            traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_RECURSIVE_MUTEXES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_RECURSIVE_MUTEXES == 1 )
 
+
 
+    BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex,
 
+                                         TickType_t xTicksToWait )
 
+    {
 
+        BaseType_t xReturn;
 
+        Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 
+
 
+        configASSERT( pxMutex );
 
+
 
+        /* Comments regarding mutual exclusion as per those within
 
+         * xQueueGiveMutexRecursive(). */
 
+
 
+        traceTAKE_MUTEX_RECURSIVE( pxMutex );
 
+
 
+        if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 
+        {
 
+            ( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 
+            xReturn = pdPASS;
 
+        }
 
+        else
 
+        {
 
+            xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
 
+
 
+            /* pdPASS will only be returned if the mutex was successfully
 
+             * obtained.  The calling task may have entered the Blocked state
 
+             * before reaching here. */
 
+            if( xReturn != pdFAIL )
 
+            {
 
+                ( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 
+            }
 
+            else
 
+            {
 
+                traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
 
+            }
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_RECURSIVE_MUTEXES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
+
 
+    QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
 
+                                                       const UBaseType_t uxInitialCount,
 
+                                                       StaticQueue_t * pxStaticQueue )
 
+    {
 
+        QueueHandle_t xHandle = NULL;
 
+
 
+        if( ( uxMaxCount != 0 ) &&
 
+            ( uxInitialCount <= uxMaxCount ) )
 
+        {
 
+            xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 
+
 
+            if( xHandle != NULL )
 
+            {
 
+                ( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 
+
 
+                traceCREATE_COUNTING_SEMAPHORE();
 
+            }
 
+            else
 
+            {
 
+                traceCREATE_COUNTING_SEMAPHORE_FAILED();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            configASSERT( xHandle );
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return xHandle;
 
+    }
 
+
 
+#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
+
 
+    QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
 
+                                                 const UBaseType_t uxInitialCount )
 
+    {
 
+        QueueHandle_t xHandle = NULL;
 
+
 
+        if( ( uxMaxCount != 0 ) &&
 
+            ( uxInitialCount <= uxMaxCount ) )
 
+        {
 
+            xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 
+
 
+            if( xHandle != NULL )
 
+            {
 
+                ( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 
+
 
+                traceCREATE_COUNTING_SEMAPHORE();
 
+            }
 
+            else
 
+            {
 
+                traceCREATE_COUNTING_SEMAPHORE_FAILED();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            configASSERT( xHandle );
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return xHandle;
 
+    }
 
+
 
+#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue,
 
+                              const void * const pvItemToQueue,
 
+                              TickType_t xTicksToWait,
 
+                              const BaseType_t xCopyPosition )
 
+{
 
+    BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
 
+    TimeOut_t xTimeOut;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    configASSERT( pxQueue );
 
+    configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 
+    configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 
+    #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
 
+        {
 
+            configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 
+        }
 
+    #endif
 
+
 
+    /*lint -save -e904 This function relaxes the coding standard somewhat to
 
+     * allow return statements within the function itself.  This is done in the
 
+     * interest of execution time efficiency. */
 
+    for( ; ; )
 
+    {
 
+        taskENTER_CRITICAL();
 
+        {
 
+            /* Is there room on the queue now?  The running task must be the
 
+             * highest priority task wanting to access the queue.  If the head item
 
+             * in the queue is to be overwritten then it does not matter if the
 
+             * queue is full. */
 
+            if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 
+            {
 
+                traceQUEUE_SEND( pxQueue );
 
+
 
+                #if ( configUSE_QUEUE_SETS == 1 )
 
+                    {
 
+                        const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
 
+
 
+                        xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 
+
 
+                        if( pxQueue->pxQueueSetContainer != NULL )
 
+                        {
 
+                            if( ( xCopyPosition == queueOVERWRITE ) && ( uxPreviousMessagesWaiting != ( UBaseType_t ) 0 ) )
 
+                            {
 
+                                /* Do not notify the queue set as an existing item
 
+                                 * was overwritten in the queue so the number of items
 
+                                 * in the queue has not changed. */
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                            else if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
 
+                            {
 
+                                /* The queue is a member of a queue set, and posting
 
+                                 * to the queue set caused a higher priority task to
 
+                                 * unblock. A context switch is required. */
 
+                                queueYIELD_IF_USING_PREEMPTION();
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                        else
 
+                        {
 
+                            /* If there was a task waiting for data to arrive on the
 
+                             * queue then unblock it now. */
 
+                            if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                            {
 
+                                if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                                {
 
+                                    /* The unblocked task has a priority higher than
 
+                                     * our own so yield immediately.  Yes it is ok to
 
+                                     * do this from within the critical section - the
 
+                                     * kernel takes care of that. */
 
+                                    queueYIELD_IF_USING_PREEMPTION();
 
+                                }
 
+                                else
 
+                                {
 
+                                    mtCOVERAGE_TEST_MARKER();
 
+                                }
 
+                            }
 
+                            else if( xYieldRequired != pdFALSE )
 
+                            {
 
+                                /* This path is a special case that will only get
 
+                                 * executed if the task was holding multiple mutexes
 
+                                 * and the mutexes were given back in an order that is
 
+                                 * different to that in which they were taken. */
 
+                                queueYIELD_IF_USING_PREEMPTION();
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                    }
 
+                #else /* configUSE_QUEUE_SETS */
 
+                    {
 
+                        xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 
+
 
+                        /* If there was a task waiting for data to arrive on the
 
+                         * queue then unblock it now. */
 
+                        if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                        {
 
+                            if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                            {
 
+                                /* The unblocked task has a priority higher than
 
+                                 * our own so yield immediately.  Yes it is ok to do
 
+                                 * this from within the critical section - the kernel
 
+                                 * takes care of that. */
 
+                                queueYIELD_IF_USING_PREEMPTION();
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                        else if( xYieldRequired != pdFALSE )
 
+                        {
 
+                            /* This path is a special case that will only get
 
+                             * executed if the task was holding multiple mutexes and
 
+                             * the mutexes were given back in an order that is
 
+                             * different to that in which they were taken. */
 
+                            queueYIELD_IF_USING_PREEMPTION();
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                #endif /* configUSE_QUEUE_SETS */
 
+
 
+                taskEXIT_CRITICAL();
 
+                return pdPASS;
 
+            }
 
+            else
 
+            {
 
+                if( xTicksToWait == ( TickType_t ) 0 )
 
+                {
 
+                    /* The queue was full and no block time is specified (or
 
+                     * the block time has expired) so leave now. */
 
+                    taskEXIT_CRITICAL();
 
+
 
+                    /* Return to the original privilege level before exiting
 
+                     * the function. */
 
+                    traceQUEUE_SEND_FAILED( pxQueue );
 
+                    return errQUEUE_FULL;
 
+                }
 
+                else if( xEntryTimeSet == pdFALSE )
 
+                {
 
+                    /* The queue was full and a block time was specified so
 
+                     * configure the timeout structure. */
 
+                    vTaskInternalSetTimeOutState( &xTimeOut );
 
+                    xEntryTimeSet = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    /* Entry time was already set. */
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        /* Interrupts and other tasks can send to and receive from the queue
 
+         * now the critical section has been exited. */
 
+
 
+        vTaskSuspendAll();
 
+        prvLockQueue( pxQueue );
 
+
 
+        /* Update the timeout state to see if it has expired yet. */
 
+        if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 
+        {
 
+            if( prvIsQueueFull( pxQueue ) != pdFALSE )
 
+            {
 
+                traceBLOCKING_ON_QUEUE_SEND( pxQueue );
 
+                vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
 
+
 
+                /* Unlocking the queue means queue events can effect the
 
+                 * event list. It is possible that interrupts occurring now
 
+                 * remove this task from the event list again - but as the
 
+                 * scheduler is suspended the task will go onto the pending
 
+                 * ready list instead of the actual ready list. */
 
+                prvUnlockQueue( pxQueue );
 
+
 
+                /* Resuming the scheduler will move tasks from the pending
 
+                 * ready list into the ready list - so it is feasible that this
 
+                 * task is already in the ready list before it yields - in which
 
+                 * case the yield will not cause a context switch unless there
 
+                 * is also a higher priority task in the pending ready list. */
 
+                if( xTaskResumeAll() == pdFALSE )
 
+                {
 
+                    portYIELD_WITHIN_API();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                /* Try again. */
 
+                prvUnlockQueue( pxQueue );
 
+                ( void ) xTaskResumeAll();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            /* The timeout has expired. */
 
+            prvUnlockQueue( pxQueue );
 
+            ( void ) xTaskResumeAll();
 
+
 
+            traceQUEUE_SEND_FAILED( pxQueue );
 
+            return errQUEUE_FULL;
 
+        }
 
+    } /*lint -restore */
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue,
 
+                                     const void * const pvItemToQueue,
 
+                                     BaseType_t * const pxHigherPriorityTaskWoken,
 
+                                     const BaseType_t xCopyPosition )
 
+{
 
+    BaseType_t xReturn;
 
+    UBaseType_t uxSavedInterruptStatus;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    configASSERT( pxQueue );
 
+    configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 
+    configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 
+
 
+    /* RTOS ports that support interrupt nesting have the concept of a maximum
 
+     * system call (or maximum API call) interrupt priority.  Interrupts that are
 
+     * above the maximum system call priority are kept permanently enabled, even
 
+     * when the RTOS kernel is in a critical section, but cannot make any calls to
 
+     * FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
 
+     * then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
 
+     * failure if a FreeRTOS API function is called from an interrupt that has been
 
+     * assigned a priority above the configured maximum system call priority.
 
+     * Only FreeRTOS functions that end in FromISR can be called from interrupts
 
+     * that have been assigned a priority at or (logically) below the maximum
 
+     * system call interrupt priority.  FreeRTOS maintains a separate interrupt
 
+     * safe API to ensure interrupt entry is as fast and as simple as possible.
 
+     * More information (albeit Cortex-M specific) is provided on the following
 
+     * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 
+    portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
+
 
+    /* Similar to xQueueGenericSend, except without blocking if there is no room
 
+     * in the queue.  Also don't directly wake a task that was blocked on a queue
 
+     * read, instead return a flag to say whether a context switch is required or
 
+     * not (i.e. has a task with a higher priority than us been woken by this
 
+     * post). */
 
+    uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 
+    {
 
+        if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 
+        {
 
+            const int8_t cTxLock = pxQueue->cTxLock;
 
+            const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
 
+
 
+            traceQUEUE_SEND_FROM_ISR( pxQueue );
 
+
 
+            /* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
 
+             *  semaphore or mutex.  That means prvCopyDataToQueue() cannot result
 
+             *  in a task disinheriting a priority and prvCopyDataToQueue() can be
 
+             *  called here even though the disinherit function does not check if
 
+             *  the scheduler is suspended before accessing the ready lists. */
 
+            ( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 
+
 
+            /* The event list is not altered if the queue is locked.  This will
 
+             * be done when the queue is unlocked later. */
 
+            if( cTxLock == queueUNLOCKED )
 
+            {
 
+                #if ( configUSE_QUEUE_SETS == 1 )
 
+                    {
 
+                        if( pxQueue->pxQueueSetContainer != NULL )
 
+                        {
 
+                            if( ( xCopyPosition == queueOVERWRITE ) && ( uxPreviousMessagesWaiting != ( UBaseType_t ) 0 ) )
 
+                            {
 
+                                /* Do not notify the queue set as an existing item
 
+                                 * was overwritten in the queue so the number of items
 
+                                 * in the queue has not changed. */
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                            else if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
 
+                            {
 
+                                /* The queue is a member of a queue set, and posting
 
+                                 * to the queue set caused a higher priority task to
 
+                                 * unblock.  A context switch is required. */
 
+                                if( pxHigherPriorityTaskWoken != NULL )
 
+                                {
 
+                                    *pxHigherPriorityTaskWoken = pdTRUE;
 
+                                }
 
+                                else
 
+                                {
 
+                                    mtCOVERAGE_TEST_MARKER();
 
+                                }
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                        else
 
+                        {
 
+                            if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                            {
 
+                                if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                                {
 
+                                    /* The task waiting has a higher priority so
 
+                                     *  record that a context switch is required. */
 
+                                    if( pxHigherPriorityTaskWoken != NULL )
 
+                                    {
 
+                                        *pxHigherPriorityTaskWoken = pdTRUE;
 
+                                    }
 
+                                    else
 
+                                    {
 
+                                        mtCOVERAGE_TEST_MARKER();
 
+                                    }
 
+                                }
 
+                                else
 
+                                {
 
+                                    mtCOVERAGE_TEST_MARKER();
 
+                                }
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                    }
 
+                #else /* configUSE_QUEUE_SETS */
 
+                    {
 
+                        if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                        {
 
+                            if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                            {
 
+                                /* The task waiting has a higher priority so record that a
 
+                                 * context switch is required. */
 
+                                if( pxHigherPriorityTaskWoken != NULL )
 
+                                {
 
+                                    *pxHigherPriorityTaskWoken = pdTRUE;
 
+                                }
 
+                                else
 
+                                {
 
+                                    mtCOVERAGE_TEST_MARKER();
 
+                                }
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+
 
+                        /* Not used in this path. */
 
+                        ( void ) uxPreviousMessagesWaiting;
 
+                    }
 
+                #endif /* configUSE_QUEUE_SETS */
 
+            }
 
+            else
 
+            {
 
+                /* Increment the lock count so the task that unlocks the queue
 
+                 * knows that data was posted while it was locked. */
 
+                configASSERT( cTxLock != queueINT8_MAX );
 
+
 
+                pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 
+            }
 
+
 
+            xReturn = pdPASS;
 
+        }
 
+        else
 
+        {
 
+            traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
 
+            xReturn = errQUEUE_FULL;
 
+        }
 
+    }
 
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
 
+                              BaseType_t * const pxHigherPriorityTaskWoken )
 
+{
 
+    BaseType_t xReturn;
 
+    UBaseType_t uxSavedInterruptStatus;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    /* Similar to xQueueGenericSendFromISR() but used with semaphores where the
 
+     * item size is 0.  Don't directly wake a task that was blocked on a queue
 
+     * read, instead return a flag to say whether a context switch is required or
 
+     * not (i.e. has a task with a higher priority than us been woken by this
 
+     * post). */
 
+
 
+    configASSERT( pxQueue );
 
+
 
+    /* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
 
+     * if the item size is not 0. */
 
+    configASSERT( pxQueue->uxItemSize == 0 );
 
+
 
+    /* Normally a mutex would not be given from an interrupt, especially if
 
+     * there is a mutex holder, as priority inheritance makes no sense for an
 
+     * interrupts, only tasks. */
 
+    configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
 
+
 
+    /* RTOS ports that support interrupt nesting have the concept of a maximum
 
+     * system call (or maximum API call) interrupt priority.  Interrupts that are
 
+     * above the maximum system call priority are kept permanently enabled, even
 
+     * when the RTOS kernel is in a critical section, but cannot make any calls to
 
+     * FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
 
+     * then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
 
+     * failure if a FreeRTOS API function is called from an interrupt that has been
 
+     * assigned a priority above the configured maximum system call priority.
 
+     * Only FreeRTOS functions that end in FromISR can be called from interrupts
 
+     * that have been assigned a priority at or (logically) below the maximum
 
+     * system call interrupt priority.  FreeRTOS maintains a separate interrupt
 
+     * safe API to ensure interrupt entry is as fast and as simple as possible.
 
+     * More information (albeit Cortex-M specific) is provided on the following
 
+     * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 
+    portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
+
 
+    uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 
+    {
 
+        const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 
+
 
+        /* When the queue is used to implement a semaphore no data is ever
 
+         * moved through the queue but it is still valid to see if the queue 'has
 
+         * space'. */
 
+        if( uxMessagesWaiting < pxQueue->uxLength )
 
+        {
 
+            const int8_t cTxLock = pxQueue->cTxLock;
 
+
 
+            traceQUEUE_SEND_FROM_ISR( pxQueue );
 
+
 
+            /* A task can only have an inherited priority if it is a mutex
 
+             * holder - and if there is a mutex holder then the mutex cannot be
 
+             * given from an ISR.  As this is the ISR version of the function it
 
+             * can be assumed there is no mutex holder and no need to determine if
 
+             * priority disinheritance is needed.  Simply increase the count of
 
+             * messages (semaphores) available. */
 
+            pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 
+
 
+            /* The event list is not altered if the queue is locked.  This will
 
+             * be done when the queue is unlocked later. */
 
+            if( cTxLock == queueUNLOCKED )
 
+            {
 
+                #if ( configUSE_QUEUE_SETS == 1 )
 
+                    {
 
+                        if( pxQueue->pxQueueSetContainer != NULL )
 
+                        {
 
+                            if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
 
+                            {
 
+                                /* The semaphore is a member of a queue set, and
 
+                                 * posting to the queue set caused a higher priority
 
+                                 * task to unblock.  A context switch is required. */
 
+                                if( pxHigherPriorityTaskWoken != NULL )
 
+                                {
 
+                                    *pxHigherPriorityTaskWoken = pdTRUE;
 
+                                }
 
+                                else
 
+                                {
 
+                                    mtCOVERAGE_TEST_MARKER();
 
+                                }
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                        else
 
+                        {
 
+                            if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                            {
 
+                                if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                                {
 
+                                    /* The task waiting has a higher priority so
 
+                                     *  record that a context switch is required. */
 
+                                    if( pxHigherPriorityTaskWoken != NULL )
 
+                                    {
 
+                                        *pxHigherPriorityTaskWoken = pdTRUE;
 
+                                    }
 
+                                    else
 
+                                    {
 
+                                        mtCOVERAGE_TEST_MARKER();
 
+                                    }
 
+                                }
 
+                                else
 
+                                {
 
+                                    mtCOVERAGE_TEST_MARKER();
 
+                                }
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                    }
 
+                #else /* configUSE_QUEUE_SETS */
 
+                    {
 
+                        if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                        {
 
+                            if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                            {
 
+                                /* The task waiting has a higher priority so record that a
 
+                                 * context switch is required. */
 
+                                if( pxHigherPriorityTaskWoken != NULL )
 
+                                {
 
+                                    *pxHigherPriorityTaskWoken = pdTRUE;
 
+                                }
 
+                                else
 
+                                {
 
+                                    mtCOVERAGE_TEST_MARKER();
 
+                                }
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                #endif /* configUSE_QUEUE_SETS */
 
+            }
 
+            else
 
+            {
 
+                /* Increment the lock count so the task that unlocks the queue
 
+                 * knows that data was posted while it was locked. */
 
+                configASSERT( cTxLock != queueINT8_MAX );
 
+
 
+                pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 
+            }
 
+
 
+            xReturn = pdPASS;
 
+        }
 
+        else
 
+        {
 
+            traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
 
+            xReturn = errQUEUE_FULL;
 
+        }
 
+    }
 
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueueReceive( QueueHandle_t xQueue,
 
+                          void * const pvBuffer,
 
+                          TickType_t xTicksToWait )
 
+{
 
+    BaseType_t xEntryTimeSet = pdFALSE;
 
+    TimeOut_t xTimeOut;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    /* Check the pointer is not NULL. */
 
+    configASSERT( ( pxQueue ) );
 
+
 
+    /* The buffer into which data is received can only be NULL if the data size
 
+     * is zero (so no data is copied into the buffer). */
 
+    configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
 
+
 
+    /* Cannot block if the scheduler is suspended. */
 
+    #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
 
+        {
 
+            configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 
+        }
 
+    #endif
 
+
 
+    /*lint -save -e904  This function relaxes the coding standard somewhat to
 
+     * allow return statements within the function itself.  This is done in the
 
+     * interest of execution time efficiency. */
 
+    for( ; ; )
 
+    {
 
+        taskENTER_CRITICAL();
 
+        {
 
+            const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 
+
 
+            /* Is there data in the queue now?  To be running the calling task
 
+             * must be the highest priority task wanting to access the queue. */
 
+            if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 
+            {
 
+                /* Data available, remove one item. */
 
+                prvCopyDataFromQueue( pxQueue, pvBuffer );
 
+                traceQUEUE_RECEIVE( pxQueue );
 
+                pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 
+
 
+                /* There is now space in the queue, were any tasks waiting to
 
+                 * post to the queue?  If so, unblock the highest priority waiting
 
+                 * task. */
 
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 
+                {
 
+                    if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 
+                    {
 
+                        queueYIELD_IF_USING_PREEMPTION();
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                taskEXIT_CRITICAL();
 
+                return pdPASS;
 
+            }
 
+            else
 
+            {
 
+                if( xTicksToWait == ( TickType_t ) 0 )
 
+                {
 
+                    /* The queue was empty and no block time is specified (or
 
+                     * the block time has expired) so leave now. */
 
+                    taskEXIT_CRITICAL();
 
+                    traceQUEUE_RECEIVE_FAILED( pxQueue );
 
+                    return errQUEUE_EMPTY;
 
+                }
 
+                else if( xEntryTimeSet == pdFALSE )
 
+                {
 
+                    /* The queue was empty and a block time was specified so
 
+                     * configure the timeout structure. */
 
+                    vTaskInternalSetTimeOutState( &xTimeOut );
 
+                    xEntryTimeSet = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    /* Entry time was already set. */
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        /* Interrupts and other tasks can send to and receive from the queue
 
+         * now the critical section has been exited. */
 
+
 
+        vTaskSuspendAll();
 
+        prvLockQueue( pxQueue );
 
+
 
+        /* Update the timeout state to see if it has expired yet. */
 
+        if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 
+        {
 
+            /* The timeout has not expired.  If the queue is still empty place
 
+             * the task on the list of tasks waiting to receive from the queue. */
 
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 
+            {
 
+                traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
 
+                vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 
+                prvUnlockQueue( pxQueue );
 
+
 
+                if( xTaskResumeAll() == pdFALSE )
 
+                {
 
+                    portYIELD_WITHIN_API();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                /* The queue contains data again.  Loop back to try and read the
 
+                 * data. */
 
+                prvUnlockQueue( pxQueue );
 
+                ( void ) xTaskResumeAll();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            /* Timed out.  If there is no data in the queue exit, otherwise loop
 
+             * back and attempt to read the data. */
 
+            prvUnlockQueue( pxQueue );
 
+            ( void ) xTaskResumeAll();
 
+
 
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 
+            {
 
+                traceQUEUE_RECEIVE_FAILED( pxQueue );
 
+                return errQUEUE_EMPTY;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+    } /*lint -restore */
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue,
 
+                                TickType_t xTicksToWait )
 
+{
 
+    BaseType_t xEntryTimeSet = pdFALSE;
 
+    TimeOut_t xTimeOut;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    #if ( configUSE_MUTEXES == 1 )
 
+        BaseType_t xInheritanceOccurred = pdFALSE;
 
+    #endif
 
+
 
+    /* Check the queue pointer is not NULL. */
 
+    configASSERT( ( pxQueue ) );
 
+
 
+    /* Check this really is a semaphore, in which case the item size will be
 
+     * 0. */
 
+    configASSERT( pxQueue->uxItemSize == 0 );
 
+
 
+    /* Cannot block if the scheduler is suspended. */
 
+    #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
 
+        {
 
+            configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 
+        }
 
+    #endif
 
+
 
+    /*lint -save -e904 This function relaxes the coding standard somewhat to allow return
 
+     * statements within the function itself.  This is done in the interest
 
+     * of execution time efficiency. */
 
+    for( ; ; )
 
+    {
 
+        taskENTER_CRITICAL();
 
+        {
 
+            /* Semaphores are queues with an item size of 0, and where the
 
+             * number of messages in the queue is the semaphore's count value. */
 
+            const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
 
+
 
+            /* Is there data in the queue now?  To be running the calling task
 
+             * must be the highest priority task wanting to access the queue. */
 
+            if( uxSemaphoreCount > ( UBaseType_t ) 0 )
 
+            {
 
+                traceQUEUE_RECEIVE( pxQueue );
 
+
 
+                /* Semaphores are queues with a data size of zero and where the
 
+                 * messages waiting is the semaphore's count.  Reduce the count. */
 
+                pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
 
+
 
+                #if ( configUSE_MUTEXES == 1 )
 
+                    {
 
+                        if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 
+                        {
 
+                            /* Record the information required to implement
 
+                             * priority inheritance should it become necessary. */
 
+                            pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                #endif /* configUSE_MUTEXES */
 
+
 
+                /* Check to see if other tasks are blocked waiting to give the
 
+                 * semaphore, and if so, unblock the highest priority such task. */
 
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 
+                {
 
+                    if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 
+                    {
 
+                        queueYIELD_IF_USING_PREEMPTION();
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                taskEXIT_CRITICAL();
 
+                return pdPASS;
 
+            }
 
+            else
 
+            {
 
+                if( xTicksToWait == ( TickType_t ) 0 )
 
+                {
 
+                    /* For inheritance to have occurred there must have been an
 
+                     * initial timeout, and an adjusted timeout cannot become 0, as
 
+                     * if it were 0 the function would have exited. */
 
+                    #if ( configUSE_MUTEXES == 1 )
 
+                        {
 
+                            configASSERT( xInheritanceOccurred == pdFALSE );
 
+                        }
 
+                    #endif /* configUSE_MUTEXES */
 
+
 
+                    /* The semaphore count was 0 and no block time is specified
 
+                     * (or the block time has expired) so exit now. */
 
+                    taskEXIT_CRITICAL();
 
+                    traceQUEUE_RECEIVE_FAILED( pxQueue );
 
+                    return errQUEUE_EMPTY;
 
+                }
 
+                else if( xEntryTimeSet == pdFALSE )
 
+                {
 
+                    /* The semaphore count was 0 and a block time was specified
 
+                     * so configure the timeout structure ready to block. */
 
+                    vTaskInternalSetTimeOutState( &xTimeOut );
 
+                    xEntryTimeSet = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    /* Entry time was already set. */
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        /* Interrupts and other tasks can give to and take from the semaphore
 
+         * now the critical section has been exited. */
 
+
 
+        vTaskSuspendAll();
 
+        prvLockQueue( pxQueue );
 
+
 
+        /* Update the timeout state to see if it has expired yet. */
 
+        if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 
+        {
 
+            /* A block time is specified and not expired.  If the semaphore
 
+             * count is 0 then enter the Blocked state to wait for a semaphore to
 
+             * become available.  As semaphores are implemented with queues the
 
+             * queue being empty is equivalent to the semaphore count being 0. */
 
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 
+            {
 
+                traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
 
+
 
+                #if ( configUSE_MUTEXES == 1 )
 
+                    {
 
+                        if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 
+                        {
 
+                            taskENTER_CRITICAL();
 
+                            {
 
+                                xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
 
+                            }
 
+                            taskEXIT_CRITICAL();
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                #endif /* if ( configUSE_MUTEXES == 1 ) */
 
+
 
+                vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 
+                prvUnlockQueue( pxQueue );
 
+
 
+                if( xTaskResumeAll() == pdFALSE )
 
+                {
 
+                    portYIELD_WITHIN_API();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                /* There was no timeout and the semaphore count was not 0, so
 
+                 * attempt to take the semaphore again. */
 
+                prvUnlockQueue( pxQueue );
 
+                ( void ) xTaskResumeAll();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            /* Timed out. */
 
+            prvUnlockQueue( pxQueue );
 
+            ( void ) xTaskResumeAll();
 
+
 
+            /* If the semaphore count is 0 exit now as the timeout has
 
+             * expired.  Otherwise return to attempt to take the semaphore that is
 
+             * known to be available.  As semaphores are implemented by queues the
 
+             * queue being empty is equivalent to the semaphore count being 0. */
 
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 
+            {
 
+                #if ( configUSE_MUTEXES == 1 )
 
+                    {
 
+                        /* xInheritanceOccurred could only have be set if
 
+                         * pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
 
+                         * test the mutex type again to check it is actually a mutex. */
 
+                        if( xInheritanceOccurred != pdFALSE )
 
+                        {
 
+                            taskENTER_CRITICAL();
 
+                            {
 
+                                UBaseType_t uxHighestWaitingPriority;
 
+
 
+                                /* This task blocking on the mutex caused another
 
+                                 * task to inherit this task's priority.  Now this task
 
+                                 * has timed out the priority should be disinherited
 
+                                 * again, but only as low as the next highest priority
 
+                                 * task that is waiting for the same mutex. */
 
+                                uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
 
+                                vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
 
+                            }
 
+                            taskEXIT_CRITICAL();
 
+                        }
 
+                    }
 
+                #endif /* configUSE_MUTEXES */
 
+
 
+                traceQUEUE_RECEIVE_FAILED( pxQueue );
 
+                return errQUEUE_EMPTY;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+    } /*lint -restore */
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueuePeek( QueueHandle_t xQueue,
 
+                       void * const pvBuffer,
 
+                       TickType_t xTicksToWait )
 
+{
 
+    BaseType_t xEntryTimeSet = pdFALSE;
 
+    TimeOut_t xTimeOut;
 
+    int8_t * pcOriginalReadPosition;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    /* Check the pointer is not NULL. */
 
+    configASSERT( ( pxQueue ) );
 
+
 
+    /* The buffer into which data is received can only be NULL if the data size
 
+     * is zero (so no data is copied into the buffer. */
 
+    configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
 
+
 
+    /* Cannot block if the scheduler is suspended. */
 
+    #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
 
+        {
 
+            configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 
+        }
 
+    #endif
 
+
 
+    /*lint -save -e904  This function relaxes the coding standard somewhat to
 
+     * allow return statements within the function itself.  This is done in the
 
+     * interest of execution time efficiency. */
 
+    for( ; ; )
 
+    {
 
+        taskENTER_CRITICAL();
 
+        {
 
+            const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 
+
 
+            /* Is there data in the queue now?  To be running the calling task
 
+             * must be the highest priority task wanting to access the queue. */
 
+            if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 
+            {
 
+                /* Remember the read position so it can be reset after the data
 
+                 * is read from the queue as this function is only peeking the
 
+                 * data, not removing it. */
 
+                pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom;
 
+
 
+                prvCopyDataFromQueue( pxQueue, pvBuffer );
 
+                traceQUEUE_PEEK( pxQueue );
 
+
 
+                /* The data is not being removed, so reset the read pointer. */
 
+                pxQueue->u.xQueue.pcReadFrom = pcOriginalReadPosition;
 
+
 
+                /* The data is being left in the queue, so see if there are
 
+                 * any other tasks waiting for the data. */
 
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                {
 
+                    if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                    {
 
+                        /* The task waiting has a higher priority than this task. */
 
+                        queueYIELD_IF_USING_PREEMPTION();
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                taskEXIT_CRITICAL();
 
+                return pdPASS;
 
+            }
 
+            else
 
+            {
 
+                if( xTicksToWait == ( TickType_t ) 0 )
 
+                {
 
+                    /* The queue was empty and no block time is specified (or
 
+                     * the block time has expired) so leave now. */
 
+                    taskEXIT_CRITICAL();
 
+                    traceQUEUE_PEEK_FAILED( pxQueue );
 
+                    return errQUEUE_EMPTY;
 
+                }
 
+                else if( xEntryTimeSet == pdFALSE )
 
+                {
 
+                    /* The queue was empty and a block time was specified so
 
+                     * configure the timeout structure ready to enter the blocked
 
+                     * state. */
 
+                    vTaskInternalSetTimeOutState( &xTimeOut );
 
+                    xEntryTimeSet = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    /* Entry time was already set. */
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        /* Interrupts and other tasks can send to and receive from the queue
 
+         * now that the critical section has been exited. */
 
+
 
+        vTaskSuspendAll();
 
+        prvLockQueue( pxQueue );
 
+
 
+        /* Update the timeout state to see if it has expired yet. */
 
+        if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 
+        {
 
+            /* Timeout has not expired yet, check to see if there is data in the
 
+            * queue now, and if not enter the Blocked state to wait for data. */
 
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 
+            {
 
+                traceBLOCKING_ON_QUEUE_PEEK( pxQueue );
 
+                vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 
+                prvUnlockQueue( pxQueue );
 
+
 
+                if( xTaskResumeAll() == pdFALSE )
 
+                {
 
+                    portYIELD_WITHIN_API();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                /* There is data in the queue now, so don't enter the blocked
 
+                 * state, instead return to try and obtain the data. */
 
+                prvUnlockQueue( pxQueue );
 
+                ( void ) xTaskResumeAll();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            /* The timeout has expired.  If there is still no data in the queue
 
+             * exit, otherwise go back and try to read the data again. */
 
+            prvUnlockQueue( pxQueue );
 
+            ( void ) xTaskResumeAll();
 
+
 
+            if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 
+            {
 
+                traceQUEUE_PEEK_FAILED( pxQueue );
 
+                return errQUEUE_EMPTY;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+    } /*lint -restore */
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue,
 
+                                 void * const pvBuffer,
 
+                                 BaseType_t * const pxHigherPriorityTaskWoken )
 
+{
 
+    BaseType_t xReturn;
 
+    UBaseType_t uxSavedInterruptStatus;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    configASSERT( pxQueue );
 
+    configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 
+
 
+    /* RTOS ports that support interrupt nesting have the concept of a maximum
 
+     * system call (or maximum API call) interrupt priority.  Interrupts that are
 
+     * above the maximum system call priority are kept permanently enabled, even
 
+     * when the RTOS kernel is in a critical section, but cannot make any calls to
 
+     * FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
 
+     * then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
 
+     * failure if a FreeRTOS API function is called from an interrupt that has been
 
+     * assigned a priority above the configured maximum system call priority.
 
+     * Only FreeRTOS functions that end in FromISR can be called from interrupts
 
+     * that have been assigned a priority at or (logically) below the maximum
 
+     * system call interrupt priority.  FreeRTOS maintains a separate interrupt
 
+     * safe API to ensure interrupt entry is as fast and as simple as possible.
 
+     * More information (albeit Cortex-M specific) is provided on the following
 
+     * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 
+    portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
+
 
+    uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 
+    {
 
+        const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 
+
 
+        /* Cannot block in an ISR, so check there is data available. */
 
+        if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 
+        {
 
+            const int8_t cRxLock = pxQueue->cRxLock;
 
+
 
+            traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
 
+
 
+            prvCopyDataFromQueue( pxQueue, pvBuffer );
 
+            pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 
+
 
+            /* If the queue is locked the event list will not be modified.
 
+             * Instead update the lock count so the task that unlocks the queue
 
+             * will know that an ISR has removed data while the queue was
 
+             * locked. */
 
+            if( cRxLock == queueUNLOCKED )
 
+            {
 
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 
+                {
 
+                    if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 
+                    {
 
+                        /* The task waiting has a higher priority than us so
 
+                         * force a context switch. */
 
+                        if( pxHigherPriorityTaskWoken != NULL )
 
+                        {
 
+                            *pxHigherPriorityTaskWoken = pdTRUE;
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                /* Increment the lock count so the task that unlocks the queue
 
+                 * knows that data was removed while it was locked. */
 
+                configASSERT( cRxLock != queueINT8_MAX );
 
+
 
+                pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
 
+            }
 
+
 
+            xReturn = pdPASS;
 
+        }
 
+        else
 
+        {
 
+            xReturn = pdFAIL;
 
+            traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
 
+        }
 
+    }
 
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
 
+                              void * const pvBuffer )
 
+{
 
+    BaseType_t xReturn;
 
+    UBaseType_t uxSavedInterruptStatus;
 
+    int8_t * pcOriginalReadPosition;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    configASSERT( pxQueue );
 
+    configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 
+    configASSERT( pxQueue->uxItemSize != 0 ); /* Can't peek a semaphore. */
 
+
 
+    /* RTOS ports that support interrupt nesting have the concept of a maximum
 
+     * system call (or maximum API call) interrupt priority.  Interrupts that are
 
+     * above the maximum system call priority are kept permanently enabled, even
 
+     * when the RTOS kernel is in a critical section, but cannot make any calls to
 
+     * FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
 
+     * then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
 
+     * failure if a FreeRTOS API function is called from an interrupt that has been
 
+     * assigned a priority above the configured maximum system call priority.
 
+     * Only FreeRTOS functions that end in FromISR can be called from interrupts
 
+     * that have been assigned a priority at or (logically) below the maximum
 
+     * system call interrupt priority.  FreeRTOS maintains a separate interrupt
 
+     * safe API to ensure interrupt entry is as fast and as simple as possible.
 
+     * More information (albeit Cortex-M specific) is provided on the following
 
+     * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 
+    portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
+
 
+    uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 
+    {
 
+        /* Cannot block in an ISR, so check there is data available. */
 
+        if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
 
+        {
 
+            traceQUEUE_PEEK_FROM_ISR( pxQueue );
 
+
 
+            /* Remember the read position so it can be reset as nothing is
 
+             * actually being removed from the queue. */
 
+            pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom;
 
+            prvCopyDataFromQueue( pxQueue, pvBuffer );
 
+            pxQueue->u.xQueue.pcReadFrom = pcOriginalReadPosition;
 
+
 
+            xReturn = pdPASS;
 
+        }
 
+        else
 
+        {
 
+            xReturn = pdFAIL;
 
+            traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue );
 
+        }
 
+    }
 
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
 
+{
 
+    UBaseType_t uxReturn;
 
+
 
+    configASSERT( xQueue );
 
+
 
+    taskENTER_CRITICAL();
 
+    {
 
+        uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
 
+    }
 
+    taskEXIT_CRITICAL();
 
+
 
+    return uxReturn;
 
+} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 
+/*-----------------------------------------------------------*/
 
+
 
+UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue )
 
+{
 
+    UBaseType_t uxReturn;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    configASSERT( pxQueue );
 
+
 
+    taskENTER_CRITICAL();
 
+    {
 
+        uxReturn = pxQueue->uxLength - pxQueue->uxMessagesWaiting;
 
+    }
 
+    taskEXIT_CRITICAL();
 
+
 
+    return uxReturn;
 
+} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 
+/*-----------------------------------------------------------*/
 
+
 
+UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
 
+{
 
+    UBaseType_t uxReturn;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    configASSERT( pxQueue );
 
+    uxReturn = pxQueue->uxMessagesWaiting;
 
+
 
+    return uxReturn;
 
+} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 
+/*-----------------------------------------------------------*/
 
+
 
+void vQueueDelete( QueueHandle_t xQueue )
 
+{
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    configASSERT( pxQueue );
 
+    traceQUEUE_DELETE( pxQueue );
 
+
 
+    #if ( configQUEUE_REGISTRY_SIZE > 0 )
 
+        {
 
+            vQueueUnregisterQueue( pxQueue );
 
+        }
 
+    #endif
 
+
 
+    #if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
 
+        {
 
+            /* The queue can only have been allocated dynamically - free it
 
+             * again. */
 
+            vPortFree( pxQueue );
 
+        }
 
+    #elif ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
+        {
 
+            /* The queue could have been allocated statically or dynamically, so
 
+             * check before attempting to free the memory. */
 
+            if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
 
+            {
 
+                vPortFree( pxQueue );
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+    #else /* if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) ) */
 
+        {
 
+            /* The queue must have been statically allocated, so is not going to be
 
+             * deleted.  Avoid compiler warnings about the unused parameter. */
 
+            ( void ) pxQueue;
 
+        }
 
+    #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue )
 
+    {
 
+        return ( ( Queue_t * ) xQueue )->uxQueueNumber;
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    void vQueueSetQueueNumber( QueueHandle_t xQueue,
 
+                               UBaseType_t uxQueueNumber )
 
+    {
 
+        ( ( Queue_t * ) xQueue )->uxQueueNumber = uxQueueNumber;
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    uint8_t ucQueueGetQueueType( QueueHandle_t xQueue )
 
+    {
 
+        return ( ( Queue_t * ) xQueue )->ucQueueType;
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_MUTEXES == 1 )
 
+
 
+    static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
 
+    {
 
+        UBaseType_t uxHighestPriorityOfWaitingTasks;
 
+
 
+        /* If a task waiting for a mutex causes the mutex holder to inherit a
 
+         * priority, but the waiting task times out, then the holder should
 
+         * disinherit the priority - but only down to the highest priority of any
 
+         * other tasks that are waiting for the same mutex.  For this purpose,
 
+         * return the priority of the highest priority task that is waiting for the
 
+         * mutex. */
 
+        if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
 
+        {
 
+            uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
 
+        }
 
+        else
 
+        {
 
+            uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
 
+        }
 
+
 
+        return uxHighestPriorityOfWaitingTasks;
 
+    }
 
+
 
+#endif /* configUSE_MUTEXES */
 
+/*-----------------------------------------------------------*/
 
+
 
+static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue,
 
+                                      const void * pvItemToQueue,
 
+                                      const BaseType_t xPosition )
 
+{
 
+    BaseType_t xReturn = pdFALSE;
 
+    UBaseType_t uxMessagesWaiting;
 
+
 
+    /* This function is called from a critical section. */
 
+
 
+    uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 
+
 
+    if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
 
+    {
 
+        #if ( configUSE_MUTEXES == 1 )
 
+            {
 
+                if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 
+                {
 
+                    /* The mutex is no longer being held. */
 
+                    xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
 
+                    pxQueue->u.xSemaphore.xMutexHolder = NULL;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        #endif /* configUSE_MUTEXES */
 
+    }
 
+    else if( xPosition == queueSEND_TO_BACK )
 
+    {
 
+        ( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 
+        pxQueue->pcWriteTo += pxQueue->uxItemSize;                                                       /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 
+
 
+        if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail )                                             /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 
+        {
 
+            pxQueue->pcWriteTo = pxQueue->pcHead;
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    else
 
+    {
 
+        ( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
 
+        pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
 
+
 
+        if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 
+        {
 
+            pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        if( xPosition == queueOVERWRITE )
 
+        {
 
+            if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 
+            {
 
+                /* An item is not being added but overwritten, so subtract
 
+                 * one from the recorded number of items in the queue so when
 
+                 * one is added again below the number of recorded items remains
 
+                 * correct. */
 
+                --uxMessagesWaiting;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+    pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvCopyDataFromQueue( Queue_t * const pxQueue,
 
+                                  void * const pvBuffer )
 
+{
 
+    if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
 
+    {
 
+        pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize;           /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 
+
 
+        if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
 
+        {
 
+            pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvUnlockQueue( Queue_t * const pxQueue )
 
+{
 
+    /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */
 
+
 
+    /* The lock counts contains the number of extra data items placed or
 
+     * removed from the queue while the queue was locked.  When a queue is
 
+     * locked items can be added or removed, but the event lists cannot be
 
+     * updated. */
 
+    taskENTER_CRITICAL();
 
+    {
 
+        int8_t cTxLock = pxQueue->cTxLock;
 
+
 
+        /* See if data was added to the queue while it was locked. */
 
+        while( cTxLock > queueLOCKED_UNMODIFIED )
 
+        {
 
+            /* Data was posted while the queue was locked.  Are any tasks
 
+             * blocked waiting for data to become available? */
 
+            #if ( configUSE_QUEUE_SETS == 1 )
 
+                {
 
+                    if( pxQueue->pxQueueSetContainer != NULL )
 
+                    {
 
+                        if( prvNotifyQueueSetContainer( pxQueue ) != pdFALSE )
 
+                        {
 
+                            /* The queue is a member of a queue set, and posting to
 
+                             * the queue set caused a higher priority task to unblock.
 
+                             * A context switch is required. */
 
+                            vTaskMissedYield();
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                    else
 
+                    {
 
+                        /* Tasks that are removed from the event list will get
 
+                         * added to the pending ready list as the scheduler is still
 
+                         * suspended. */
 
+                        if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                        {
 
+                            if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                            {
 
+                                /* The task waiting has a higher priority so record that a
 
+                                 * context switch is required. */
 
+                                vTaskMissedYield();
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                        else
 
+                        {
 
+                            break;
 
+                        }
 
+                    }
 
+                }
 
+            #else /* configUSE_QUEUE_SETS */
 
+                {
 
+                    /* Tasks that are removed from the event list will get added to
 
+                     * the pending ready list as the scheduler is still suspended. */
 
+                    if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                    {
 
+                        if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                        {
 
+                            /* The task waiting has a higher priority so record that
 
+                             * a context switch is required. */
 
+                            vTaskMissedYield();
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                    else
 
+                    {
 
+                        break;
 
+                    }
 
+                }
 
+            #endif /* configUSE_QUEUE_SETS */
 
+
 
+            --cTxLock;
 
+        }
 
+
 
+        pxQueue->cTxLock = queueUNLOCKED;
 
+    }
 
+    taskEXIT_CRITICAL();
 
+
 
+    /* Do the same for the Rx lock. */
 
+    taskENTER_CRITICAL();
 
+    {
 
+        int8_t cRxLock = pxQueue->cRxLock;
 
+
 
+        while( cRxLock > queueLOCKED_UNMODIFIED )
 
+        {
 
+            if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 
+            {
 
+                if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 
+                {
 
+                    vTaskMissedYield();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                --cRxLock;
 
+            }
 
+            else
 
+            {
 
+                break;
 
+            }
 
+        }
 
+
 
+        pxQueue->cRxLock = queueUNLOCKED;
 
+    }
 
+    taskEXIT_CRITICAL();
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static BaseType_t prvIsQueueEmpty( const Queue_t * pxQueue )
 
+{
 
+    BaseType_t xReturn;
 
+
 
+    taskENTER_CRITICAL();
 
+    {
 
+        if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
 
+        {
 
+            xReturn = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            xReturn = pdFALSE;
 
+        }
 
+    }
 
+    taskEXIT_CRITICAL();
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue )
 
+{
 
+    BaseType_t xReturn;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    configASSERT( pxQueue );
 
+
 
+    if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
 
+    {
 
+        xReturn = pdTRUE;
 
+    }
 
+    else
 
+    {
 
+        xReturn = pdFALSE;
 
+    }
 
+
 
+    return xReturn;
 
+} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 
+/*-----------------------------------------------------------*/
 
+
 
+static BaseType_t prvIsQueueFull( const Queue_t * pxQueue )
 
+{
 
+    BaseType_t xReturn;
 
+
 
+    taskENTER_CRITICAL();
 
+    {
 
+        if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
 
+        {
 
+            xReturn = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            xReturn = pdFALSE;
 
+        }
 
+    }
 
+    taskEXIT_CRITICAL();
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue )
 
+{
 
+    BaseType_t xReturn;
 
+    Queue_t * const pxQueue = xQueue;
 
+
 
+    configASSERT( pxQueue );
 
+
 
+    if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
 
+    {
 
+        xReturn = pdTRUE;
 
+    }
 
+    else
 
+    {
 
+        xReturn = pdFALSE;
 
+    }
 
+
 
+    return xReturn;
 
+} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_CO_ROUTINES == 1 )
 
+
 
+    BaseType_t xQueueCRSend( QueueHandle_t xQueue,
 
+                             const void * pvItemToQueue,
 
+                             TickType_t xTicksToWait )
 
+    {
 
+        BaseType_t xReturn;
 
+        Queue_t * const pxQueue = xQueue;
 
+
 
+        /* If the queue is already full we may have to block.  A critical section
 
+         * is required to prevent an interrupt removing something from the queue
 
+         * between the check to see if the queue is full and blocking on the queue. */
 
+        portDISABLE_INTERRUPTS();
 
+        {
 
+            if( prvIsQueueFull( pxQueue ) != pdFALSE )
 
+            {
 
+                /* The queue is full - do we want to block or just leave without
 
+                 * posting? */
 
+                if( xTicksToWait > ( TickType_t ) 0 )
 
+                {
 
+                    /* As this is called from a coroutine we cannot block directly, but
 
+                     * return indicating that we need to block. */
 
+                    vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) );
 
+                    portENABLE_INTERRUPTS();
 
+                    return errQUEUE_BLOCKED;
 
+                }
 
+                else
 
+                {
 
+                    portENABLE_INTERRUPTS();
 
+                    return errQUEUE_FULL;
 
+                }
 
+            }
 
+        }
 
+        portENABLE_INTERRUPTS();
 
+
 
+        portDISABLE_INTERRUPTS();
 
+        {
 
+            if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
 
+            {
 
+                /* There is room in the queue, copy the data into the queue. */
 
+                prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
 
+                xReturn = pdPASS;
 
+
 
+                /* Were any co-routines waiting for data to become available? */
 
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                {
 
+                    /* In this instance the co-routine could be placed directly
 
+                     * into the ready list as we are within a critical section.
 
+                     * Instead the same pending ready list mechanism is used as if
 
+                     * the event were caused from within an interrupt. */
 
+                    if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                    {
 
+                        /* The co-routine waiting has a higher priority so record
 
+                         * that a yield might be appropriate. */
 
+                        xReturn = errQUEUE_YIELD;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                xReturn = errQUEUE_FULL;
 
+            }
 
+        }
 
+        portENABLE_INTERRUPTS();
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_CO_ROUTINES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_CO_ROUTINES == 1 )
 
+
 
+    BaseType_t xQueueCRReceive( QueueHandle_t xQueue,
 
+                                void * pvBuffer,
 
+                                TickType_t xTicksToWait )
 
+    {
 
+        BaseType_t xReturn;
 
+        Queue_t * const pxQueue = xQueue;
 
+
 
+        /* If the queue is already empty we may have to block.  A critical section
 
+         * is required to prevent an interrupt adding something to the queue
 
+         * between the check to see if the queue is empty and blocking on the queue. */
 
+        portDISABLE_INTERRUPTS();
 
+        {
 
+            if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
 
+            {
 
+                /* There are no messages in the queue, do we want to block or just
 
+                 * leave with nothing? */
 
+                if( xTicksToWait > ( TickType_t ) 0 )
 
+                {
 
+                    /* As this is a co-routine we cannot block directly, but return
 
+                     * indicating that we need to block. */
 
+                    vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) );
 
+                    portENABLE_INTERRUPTS();
 
+                    return errQUEUE_BLOCKED;
 
+                }
 
+                else
 
+                {
 
+                    portENABLE_INTERRUPTS();
 
+                    return errQUEUE_FULL;
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        portENABLE_INTERRUPTS();
 
+
 
+        portDISABLE_INTERRUPTS();
 
+        {
 
+            if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
 
+            {
 
+                /* Data is available from the queue. */
 
+                pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize;
 
+
 
+                if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail )
 
+                {
 
+                    pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                --( pxQueue->uxMessagesWaiting );
 
+                ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
 
+
 
+                xReturn = pdPASS;
 
+
 
+                /* Were any co-routines waiting for space to become available? */
 
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 
+                {
 
+                    /* In this instance the co-routine could be placed directly
 
+                     * into the ready list as we are within a critical section.
 
+                     * Instead the same pending ready list mechanism is used as if
 
+                     * the event were caused from within an interrupt. */
 
+                    if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 
+                    {
 
+                        xReturn = errQUEUE_YIELD;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                xReturn = pdFAIL;
 
+            }
 
+        }
 
+        portENABLE_INTERRUPTS();
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_CO_ROUTINES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_CO_ROUTINES == 1 )
 
+
 
+    BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue,
 
+                                    const void * pvItemToQueue,
 
+                                    BaseType_t xCoRoutinePreviouslyWoken )
 
+    {
 
+        Queue_t * const pxQueue = xQueue;
 
+
 
+        /* Cannot block within an ISR so if there is no space on the queue then
 
+         * exit without doing anything. */
 
+        if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
 
+        {
 
+            prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
 
+
 
+            /* We only want to wake one co-routine per ISR, so check that a
 
+             * co-routine has not already been woken. */
 
+            if( xCoRoutinePreviouslyWoken == pdFALSE )
 
+            {
 
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                {
 
+                    if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                    {
 
+                        return pdTRUE;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return xCoRoutinePreviouslyWoken;
 
+    }
 
+
 
+#endif /* configUSE_CO_ROUTINES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_CO_ROUTINES == 1 )
 
+
 
+    BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue,
 
+                                       void * pvBuffer,
 
+                                       BaseType_t * pxCoRoutineWoken )
 
+    {
 
+        BaseType_t xReturn;
 
+        Queue_t * const pxQueue = xQueue;
 
+
 
+        /* We cannot block from an ISR, so check there is data available. If
 
+         * not then just leave without doing anything. */
 
+        if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
 
+        {
 
+            /* Copy the data from the queue. */
 
+            pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize;
 
+
 
+            if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail )
 
+            {
 
+                pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            --( pxQueue->uxMessagesWaiting );
 
+            ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
 
+
 
+            if( ( *pxCoRoutineWoken ) == pdFALSE )
 
+            {
 
+                if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 
+                {
 
+                    if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 
+                    {
 
+                        *pxCoRoutineWoken = pdTRUE;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            xReturn = pdPASS;
 
+        }
 
+        else
 
+        {
 
+            xReturn = pdFAIL;
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_CO_ROUTINES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
 
+
 
+    void vQueueAddToRegistry( QueueHandle_t xQueue,
 
+                              const char * pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+    {
 
+        UBaseType_t ux;
 
+
 
+        configASSERT( xQueue );
 
+
 
+        QueueRegistryItem_t * pxEntryToWrite = NULL;
 
+
 
+        if( pcQueueName != NULL )
 
+        {
 
+            /* See if there is an empty space in the registry.  A NULL name denotes
 
+             * a free slot. */
 
+            for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 
+            {
 
+                /* Replace an existing entry if the queue is already in the registry. */
 
+                if( xQueue == xQueueRegistry[ ux ].xHandle )
 
+                {
 
+                    pxEntryToWrite = &( xQueueRegistry[ ux ] );
 
+                    break;
 
+                }
 
+                /* Otherwise, store in the next empty location */
 
+                else if( ( pxEntryToWrite == NULL ) && ( xQueueRegistry[ ux ].pcQueueName == NULL ) )
 
+                {
 
+                    pxEntryToWrite = &( xQueueRegistry[ ux ] );
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        }
 
+
 
+        if( pxEntryToWrite != NULL )
 
+        {
 
+            /* Store the information on this queue. */
 
+            pxEntryToWrite->pcQueueName = pcQueueName;
 
+            pxEntryToWrite->xHandle = xQueue;
 
+
 
+            traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
 
+        }
 
+    }
 
+
 
+#endif /* configQUEUE_REGISTRY_SIZE */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
 
+
 
+    const char * pcQueueGetName( QueueHandle_t xQueue ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+    {
 
+        UBaseType_t ux;
 
+        const char * pcReturn = NULL; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+
 
+        configASSERT( xQueue );
 
+
 
+        /* Note there is nothing here to protect against another task adding or
 
+         * removing entries from the registry while it is being searched. */
 
+
 
+        for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 
+        {
 
+            if( xQueueRegistry[ ux ].xHandle == xQueue )
 
+            {
 
+                pcReturn = xQueueRegistry[ ux ].pcQueueName;
 
+                break;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+
 
+        return pcReturn;
 
+    } /*lint !e818 xQueue cannot be a pointer to const because it is a typedef. */
 
+
 
+#endif /* configQUEUE_REGISTRY_SIZE */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
 
+
 
+    void vQueueUnregisterQueue( QueueHandle_t xQueue )
 
+    {
 
+        UBaseType_t ux;
 
+
 
+        configASSERT( xQueue );
 
+
 
+        /* See if the handle of the queue being unregistered in actually in the
 
+         * registry. */
 
+        for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 
+        {
 
+            if( xQueueRegistry[ ux ].xHandle == xQueue )
 
+            {
 
+                /* Set the name to NULL to show that this slot if free again. */
 
+                xQueueRegistry[ ux ].pcQueueName = NULL;
 
+
 
+                /* Set the handle to NULL to ensure the same queue handle cannot
 
+                 * appear in the registry twice if it is added, removed, then
 
+                 * added again. */
 
+                xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
 
+                break;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+    } /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 
+
 
+#endif /* configQUEUE_REGISTRY_SIZE */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TIMERS == 1 )
 
+
 
+    void vQueueWaitForMessageRestricted( QueueHandle_t xQueue,
 
+                                         TickType_t xTicksToWait,
 
+                                         const BaseType_t xWaitIndefinitely )
 
+    {
 
+        Queue_t * const pxQueue = xQueue;
 
+
 
+        /* This function should not be called by application code hence the
 
+         * 'Restricted' in its name.  It is not part of the public API.  It is
 
+         * designed for use by kernel code, and has special calling requirements.
 
+         * It can result in vListInsert() being called on a list that can only
 
+         * possibly ever have one item in it, so the list will be fast, but even
 
+         * so it should be called with the scheduler locked and not from a critical
 
+         * section. */
 
+
 
+        /* Only do anything if there are no messages in the queue.  This function
 
+         *  will not actually cause the task to block, just place it on a blocked
 
+         *  list.  It will not block until the scheduler is unlocked - at which
 
+         *  time a yield will be performed.  If an item is added to the queue while
 
+         *  the queue is locked, and the calling task blocks on the queue, then the
 
+         *  calling task will be immediately unblocked when the queue is unlocked. */
 
+        prvLockQueue( pxQueue );
 
+
 
+        if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
 
+        {
 
+            /* There is nothing in the queue, block for the specified period. */
 
+            vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        prvUnlockQueue( pxQueue );
 
+    }
 
+
 
+#endif /* configUSE_TIMERS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
+
 
+    QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength )
 
+    {
 
+        QueueSetHandle_t pxQueue;
 
+
 
+        pxQueue = xQueueGenericCreate( uxEventQueueLength, ( UBaseType_t ) sizeof( Queue_t * ), queueQUEUE_TYPE_SET );
 
+
 
+        return pxQueue;
 
+    }
 
+
 
+#endif /* configUSE_QUEUE_SETS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_QUEUE_SETS == 1 )
 
+
 
+    BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
 
+                               QueueSetHandle_t xQueueSet )
 
+    {
 
+        BaseType_t xReturn;
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            if( ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer != NULL )
 
+            {
 
+                /* Cannot add a queue/semaphore to more than one queue set. */
 
+                xReturn = pdFAIL;
 
+            }
 
+            else if( ( ( Queue_t * ) xQueueOrSemaphore )->uxMessagesWaiting != ( UBaseType_t ) 0 )
 
+            {
 
+                /* Cannot add a queue/semaphore to a queue set if there are already
 
+                 * items in the queue/semaphore. */
 
+                xReturn = pdFAIL;
 
+            }
 
+            else
 
+            {
 
+                ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer = xQueueSet;
 
+                xReturn = pdPASS;
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_QUEUE_SETS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_QUEUE_SETS == 1 )
 
+
 
+    BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
 
+                                    QueueSetHandle_t xQueueSet )
 
+    {
 
+        BaseType_t xReturn;
 
+        Queue_t * const pxQueueOrSemaphore = ( Queue_t * ) xQueueOrSemaphore;
 
+
 
+        if( pxQueueOrSemaphore->pxQueueSetContainer != xQueueSet )
 
+        {
 
+            /* The queue was not a member of the set. */
 
+            xReturn = pdFAIL;
 
+        }
 
+        else if( pxQueueOrSemaphore->uxMessagesWaiting != ( UBaseType_t ) 0 )
 
+        {
 
+            /* It is dangerous to remove a queue from a set when the queue is
 
+             * not empty because the queue set will still hold pending events for
 
+             * the queue. */
 
+            xReturn = pdFAIL;
 
+        }
 
+        else
 
+        {
 
+            taskENTER_CRITICAL();
 
+            {
 
+                /* The queue is no longer contained in the set. */
 
+                pxQueueOrSemaphore->pxQueueSetContainer = NULL;
 
+            }
 
+            taskEXIT_CRITICAL();
 
+            xReturn = pdPASS;
 
+        }
 
+
 
+        return xReturn;
 
+    } /*lint !e818 xQueueSet could not be declared as pointing to const as it is a typedef. */
 
+
 
+#endif /* configUSE_QUEUE_SETS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_QUEUE_SETS == 1 )
 
+
 
+    QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
 
+                                                TickType_t const xTicksToWait )
 
+    {
 
+        QueueSetMemberHandle_t xReturn = NULL;
 
+
 
+        ( void ) xQueueReceive( ( QueueHandle_t ) xQueueSet, &xReturn, xTicksToWait ); /*lint !e961 Casting from one typedef to another is not redundant. */
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_QUEUE_SETS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_QUEUE_SETS == 1 )
 
+
 
+    QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet )
 
+    {
 
+        QueueSetMemberHandle_t xReturn = NULL;
 
+
 
+        ( void ) xQueueReceiveFromISR( ( QueueHandle_t ) xQueueSet, &xReturn, NULL ); /*lint !e961 Casting from one typedef to another is not redundant. */
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_QUEUE_SETS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_QUEUE_SETS == 1 )
 
+
 
+    static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue )
 
+    {
 
+        Queue_t * pxQueueSetContainer = pxQueue->pxQueueSetContainer;
 
+        BaseType_t xReturn = pdFALSE;
 
+
 
+        /* This function must be called form a critical section. */
 
+
 
+        /* The following line is not reachable in unit tests because every call
 
+         * to prvNotifyQueueSetContainer is preceded by a check that
 
+         * pxQueueSetContainer != NULL */
 
+        configASSERT( pxQueueSetContainer ); /* LCOV_EXCL_BR_LINE */
 
+        configASSERT( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength );
 
+
 
+        if( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength )
 
+        {
 
+            const int8_t cTxLock = pxQueueSetContainer->cTxLock;
 
+
 
+            traceQUEUE_SET_SEND( pxQueueSetContainer );
 
+
 
+            /* The data copied is the handle of the queue that contains data. */
 
+            xReturn = prvCopyDataToQueue( pxQueueSetContainer, &pxQueue, queueSEND_TO_BACK );
 
+
 
+            if( cTxLock == queueUNLOCKED )
 
+            {
 
+                if( listLIST_IS_EMPTY( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) == pdFALSE )
 
+                {
 
+                    if( xTaskRemoveFromEventList( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) != pdFALSE )
 
+                    {
 
+                        /* The task waiting has a higher priority. */
 
+                        xReturn = pdTRUE;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                configASSERT( cTxLock != queueINT8_MAX );
 
+
 
+                pxQueueSetContainer->cTxLock = ( int8_t ) ( cTxLock + 1 );
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_QUEUE_SETS */

+ 1306 - 0
FreeRTOS/Source/stream_buffer.c
Vedi File 

@@ -0,0 +1,1306 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/* Standard includes. */
 
+#include <stdint.h>
 
+#include <string.h>
 
+
 
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
 
+ * all the API functions to use the MPU wrappers.  That should only be done when
 
+ * task.h is included from an application file. */
 
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
+
 
+/* FreeRTOS includes. */
 
+#include "FreeRTOS.h"
 
+#include "task.h"
 
+#include "stream_buffer.h"
 
+
 
+#if ( configUSE_TASK_NOTIFICATIONS != 1 )
 
+    #error configUSE_TASK_NOTIFICATIONS must be set to 1 to build stream_buffer.c
 
+#endif
 
+
 
+/* Lint e961, e9021 and e750 are suppressed as a MISRA exception justified
 
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
 
+ * for the header files above, but not in this file, in order to generate the
 
+ * correct privileged Vs unprivileged linkage and placement. */
 
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
 
+
 
+/* If the user has not provided application specific Rx notification macros,
 
+ * or #defined the notification macros away, then provide default implementations
 
+ * that uses task notifications. */
 
+/*lint -save -e9026 Function like macros allowed and needed here so they can be overridden. */
 
+#ifndef sbRECEIVE_COMPLETED
 
+    #define sbRECEIVE_COMPLETED( pxStreamBuffer )                         \
 
+    vTaskSuspendAll();                                                    \
 
+    {                                                                     \
 
+        if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )              \
 
+        {                                                                 \
 
+            ( void ) xTaskNotify( ( pxStreamBuffer )->xTaskWaitingToSend, \
 
+                                  ( uint32_t ) 0,                         \
 
+                                  eNoAction );                            \
 
+            ( pxStreamBuffer )->xTaskWaitingToSend = NULL;                \
 
+        }                                                                 \
 
+    }                                                                     \
 
+    ( void ) xTaskResumeAll();
 
+#endif /* sbRECEIVE_COMPLETED */
 
+
 
+#ifndef sbRECEIVE_COMPLETED_FROM_ISR
 
+    #define sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer,                            \
 
+                                          pxHigherPriorityTaskWoken )                \
 
+    {                                                                                \
 
+        UBaseType_t uxSavedInterruptStatus;                                          \
 
+                                                                                     \
 
+        uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();  \
 
+        {                                                                            \
 
+            if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )                     \
 
+            {                                                                        \
 
+                ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToSend, \
 
+                                             ( uint32_t ) 0,                         \
 
+                                             eNoAction,                              \
 
+                                             pxHigherPriorityTaskWoken );            \
 
+                ( pxStreamBuffer )->xTaskWaitingToSend = NULL;                       \
 
+            }                                                                        \
 
+        }                                                                            \
 
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );                 \
 
+    }
 
+#endif /* sbRECEIVE_COMPLETED_FROM_ISR */
 
+
 
+/* If the user has not provided an application specific Tx notification macro,
 
+ * or #defined the notification macro away, them provide a default implementation
 
+ * that uses task notifications. */
 
+#ifndef sbSEND_COMPLETED
 
+    #define sbSEND_COMPLETED( pxStreamBuffer )                               \
 
+    vTaskSuspendAll();                                                       \
 
+    {                                                                        \
 
+        if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )              \
 
+        {                                                                    \
 
+            ( void ) xTaskNotify( ( pxStreamBuffer )->xTaskWaitingToReceive, \
 
+                                  ( uint32_t ) 0,                            \
 
+                                  eNoAction );                               \
 
+            ( pxStreamBuffer )->xTaskWaitingToReceive = NULL;                \
 
+        }                                                                    \
 
+    }                                                                        \
 
+    ( void ) xTaskResumeAll();
 
+#endif /* sbSEND_COMPLETED */
 
+
 
+#ifndef sbSEND_COMPLETE_FROM_ISR
 
+    #define sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken )       \
 
+    {                                                                                   \
 
+        UBaseType_t uxSavedInterruptStatus;                                             \
 
+                                                                                        \
 
+        uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();     \
 
+        {                                                                               \
 
+            if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )                     \
 
+            {                                                                           \
 
+                ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToReceive, \
 
+                                             ( uint32_t ) 0,                            \
 
+                                             eNoAction,                                 \
 
+                                             pxHigherPriorityTaskWoken );               \
 
+                ( pxStreamBuffer )->xTaskWaitingToReceive = NULL;                       \
 
+            }                                                                           \
 
+        }                                                                               \
 
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );                    \
 
+    }
 
+#endif /* sbSEND_COMPLETE_FROM_ISR */
 
+/*lint -restore (9026) */
 
+
 
+/* The number of bytes used to hold the length of a message in the buffer. */
 
+#define sbBYTES_TO_STORE_MESSAGE_LENGTH    ( sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) )
 
+
 
+/* Bits stored in the ucFlags field of the stream buffer. */
 
+#define sbFLAGS_IS_MESSAGE_BUFFER          ( ( uint8_t ) 1 ) /* Set if the stream buffer was created as a message buffer, in which case it holds discrete messages rather than a stream. */
 
+#define sbFLAGS_IS_STATICALLY_ALLOCATED    ( ( uint8_t ) 2 ) /* Set if the stream buffer was created using statically allocated memory. */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/* Structure that hold state information on the buffer. */
 
+typedef struct StreamBufferDef_t                 /*lint !e9058 Style convention uses tag. */
 
+{
 
+    volatile size_t xTail;                       /* Index to the next item to read within the buffer. */
 
+    volatile size_t xHead;                       /* Index to the next item to write within the buffer. */
 
+    size_t xLength;                              /* The length of the buffer pointed to by pucBuffer. */
 
+    size_t xTriggerLevelBytes;                   /* The number of bytes that must be in the stream buffer before a task that is waiting for data is unblocked. */
 
+    volatile TaskHandle_t xTaskWaitingToReceive; /* Holds the handle of a task waiting for data, or NULL if no tasks are waiting. */
 
+    volatile TaskHandle_t xTaskWaitingToSend;    /* Holds the handle of a task waiting to send data to a message buffer that is full. */
 
+    uint8_t * pucBuffer;                         /* Points to the buffer itself - that is - the RAM that stores the data passed through the buffer. */
 
+    uint8_t ucFlags;
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        UBaseType_t uxStreamBufferNumber; /* Used for tracing purposes. */
 
+    #endif
 
+} StreamBuffer_t;
 
+
 
+/*
 
+ * The number of bytes available to be read from the buffer.
 
+ */
 
+static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Add xCount bytes from pucData into the pxStreamBuffer's data storage area.
 
+ * This function does not update the buffer's xHead pointer, so multiple writes
 
+ * may be chained together "atomically". This is useful for Message Buffers where
 
+ * the length and data bytes are written in two separate chunks, and we don't want
 
+ * the reader to see the buffer as having grown until after all data is copied over.
 
+ * This function takes a custom xHead value to indicate where to write to (necessary
 
+ * for chaining) and returns the the resulting xHead position.
 
+ * To mark the write as complete, manually set the buffer's xHead field with the
 
+ * returned xHead from this function.
 
+ */
 
+static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer,
 
+                                     const uint8_t * pucData,
 
+                                     size_t xCount,
 
+                                     size_t xHead ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * If the stream buffer is being used as a message buffer, then reads an entire
 
+ * message out of the buffer.  If the stream buffer is being used as a stream
 
+ * buffer then read as many bytes as possible from the buffer.
 
+ * prvReadBytesFromBuffer() is called to actually extract the bytes from the
 
+ * buffer's data storage area.
 
+ */
 
+static size_t prvReadMessageFromBuffer( StreamBuffer_t * pxStreamBuffer,
 
+                                        void * pvRxData,
 
+                                        size_t xBufferLengthBytes,
 
+                                        size_t xBytesAvailable ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * If the stream buffer is being used as a message buffer, then writes an entire
 
+ * message to the buffer.  If the stream buffer is being used as a stream
 
+ * buffer then write as many bytes as possible to the buffer.
 
+ * prvWriteBytestoBuffer() is called to actually send the bytes to the buffer's
 
+ * data storage area.
 
+ */
 
+static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
 
+                                       const void * pvTxData,
 
+                                       size_t xDataLengthBytes,
 
+                                       size_t xSpace,
 
+                                       size_t xRequiredSpace ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Copies xCount bytes from the pxStreamBuffer's data storage area to pucData.
 
+ * This function does not update the buffer's xTail pointer, so multiple reads
 
+ * may be chained together "atomically". This is useful for Message Buffers where
 
+ * the length and data bytes are read in two separate chunks, and we don't want
 
+ * the writer to see the buffer as having more free space until after all data is
 
+ * copied over, especially if we have to abort the read due to insufficient receiving space.
 
+ * This function takes a custom xTail value to indicate where to read from (necessary
 
+ * for chaining) and returns the the resulting xTail position.
 
+ * To mark the read as complete, manually set the buffer's xTail field with the
 
+ * returned xTail from this function.
 
+ */
 
+static size_t prvReadBytesFromBuffer( StreamBuffer_t * pxStreamBuffer,
 
+                                      uint8_t * pucData,
 
+                                      size_t xCount,
 
+                                      size_t xTail ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Called by both pxStreamBufferCreate() and pxStreamBufferCreateStatic() to
 
+ * initialise the members of the newly created stream buffer structure.
 
+ */
 
+static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
 
+                                          uint8_t * const pucBuffer,
 
+                                          size_t xBufferSizeBytes,
 
+                                          size_t xTriggerLevelBytes,
 
+                                          uint8_t ucFlags ) PRIVILEGED_FUNCTION;
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+
 
+    StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
 
+                                                     size_t xTriggerLevelBytes,
 
+                                                     BaseType_t xIsMessageBuffer )
 
+    {
 
+        uint8_t * pucAllocatedMemory;
 
+        uint8_t ucFlags;
 
+
 
+        /* In case the stream buffer is going to be used as a message buffer
 
+         * (that is, it will hold discrete messages with a little meta data that
 
+         * says how big the next message is) check the buffer will be large enough
 
+         * to hold at least one message. */
 
+        if( xIsMessageBuffer == pdTRUE )
 
+        {
 
+            /* Is a message buffer but not statically allocated. */
 
+            ucFlags = sbFLAGS_IS_MESSAGE_BUFFER;
 
+            configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
 
+        }
 
+        else
 
+        {
 
+            /* Not a message buffer and not statically allocated. */
 
+            ucFlags = 0;
 
+            configASSERT( xBufferSizeBytes > 0 );
 
+        }
 
+
 
+        configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
 
+
 
+        /* A trigger level of 0 would cause a waiting task to unblock even when
 
+         * the buffer was empty. */
 
+        if( xTriggerLevelBytes == ( size_t ) 0 )
 
+        {
 
+            xTriggerLevelBytes = ( size_t ) 1;
 
+        }
 
+
 
+        /* A stream buffer requires a StreamBuffer_t structure and a buffer.
 
+         * Both are allocated in a single call to pvPortMalloc().  The
 
+         * StreamBuffer_t structure is placed at the start of the allocated memory
 
+         * and the buffer follows immediately after.  The requested size is
 
+         * incremented so the free space is returned as the user would expect -
 
+         * this is a quirk of the implementation that means otherwise the free
 
+         * space would be reported as one byte smaller than would be logically
 
+         * expected. */
 
+        if( xBufferSizeBytes < ( xBufferSizeBytes + 1 + sizeof( StreamBuffer_t ) ) )
 
+        {
 
+            xBufferSizeBytes++;
 
+            pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */
 
+        }
 
+        else
 
+        {
 
+            pucAllocatedMemory = NULL;
 
+        }
 
+
 
+        if( pucAllocatedMemory != NULL )
 
+        {
 
+            prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory,       /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */
 
+                                          pucAllocatedMemory + sizeof( StreamBuffer_t ), /* Storage area follows. */ /*lint !e9016 Indexing past structure valid for uint8_t pointer, also storage area has no alignment requirement. */
 
+                                          xBufferSizeBytes,
 
+                                          xTriggerLevelBytes,
 
+                                          ucFlags );
 
+
 
+            traceSTREAM_BUFFER_CREATE( ( ( StreamBuffer_t * ) pucAllocatedMemory ), xIsMessageBuffer );
 
+        }
 
+        else
 
+        {
 
+            traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer );
 
+        }
 
+
 
+        return ( StreamBufferHandle_t ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */
 
+    }
 
+
 
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+
 
+    StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
 
+                                                           size_t xTriggerLevelBytes,
 
+                                                           BaseType_t xIsMessageBuffer,
 
+                                                           uint8_t * const pucStreamBufferStorageArea,
 
+                                                           StaticStreamBuffer_t * const pxStaticStreamBuffer )
 
+    {
 
+        StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer; /*lint !e740 !e9087 Safe cast as StaticStreamBuffer_t is opaque Streambuffer_t. */
 
+        StreamBufferHandle_t xReturn;
 
+        uint8_t ucFlags;
 
+
 
+        configASSERT( pucStreamBufferStorageArea );
 
+        configASSERT( pxStaticStreamBuffer );
 
+        configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
 
+
 
+        /* A trigger level of 0 would cause a waiting task to unblock even when
 
+         * the buffer was empty. */
 
+        if( xTriggerLevelBytes == ( size_t ) 0 )
 
+        {
 
+            xTriggerLevelBytes = ( size_t ) 1;
 
+        }
 
+
 
+        if( xIsMessageBuffer != pdFALSE )
 
+        {
 
+            /* Statically allocated message buffer. */
 
+            ucFlags = sbFLAGS_IS_MESSAGE_BUFFER | sbFLAGS_IS_STATICALLY_ALLOCATED;
 
+        }
 
+        else
 
+        {
 
+            /* Statically allocated stream buffer. */
 
+            ucFlags = sbFLAGS_IS_STATICALLY_ALLOCATED;
 
+        }
 
+
 
+        /* In case the stream buffer is going to be used as a message buffer
 
+         * (that is, it will hold discrete messages with a little meta data that
 
+         * says how big the next message is) check the buffer will be large enough
 
+         * to hold at least one message. */
 
+        configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
 
+
 
+        #if ( configASSERT_DEFINED == 1 )
 
+            {
 
+                /* Sanity check that the size of the structure used to declare a
 
+                 * variable of type StaticStreamBuffer_t equals the size of the real
 
+                 * message buffer structure. */
 
+                volatile size_t xSize = sizeof( StaticStreamBuffer_t );
 
+                configASSERT( xSize == sizeof( StreamBuffer_t ) );
 
+            } /*lint !e529 xSize is referenced is configASSERT() is defined. */
 
+        #endif /* configASSERT_DEFINED */
 
+
 
+        if( ( pucStreamBufferStorageArea != NULL ) && ( pxStaticStreamBuffer != NULL ) )
 
+        {
 
+            prvInitialiseNewStreamBuffer( pxStreamBuffer,
 
+                                          pucStreamBufferStorageArea,
 
+                                          xBufferSizeBytes,
 
+                                          xTriggerLevelBytes,
 
+                                          ucFlags );
 
+
 
+            /* Remember this was statically allocated in case it is ever deleted
 
+             * again. */
 
+            pxStreamBuffer->ucFlags |= sbFLAGS_IS_STATICALLY_ALLOCATED;
 
+
 
+            traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer );
 
+
 
+            xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /*lint !e9087 Data hiding requires cast to opaque type. */
 
+        }
 
+        else
 
+        {
 
+            xReturn = NULL;
 
+            traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer );
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer )
 
+{
 
+    StreamBuffer_t * pxStreamBuffer = xStreamBuffer;
 
+
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    traceSTREAM_BUFFER_DELETE( xStreamBuffer );
 
+
 
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) pdFALSE )
 
+    {
 
+        #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+            {
 
+                /* Both the structure and the buffer were allocated using a single call
 
+                * to pvPortMalloc(), hence only one call to vPortFree() is required. */
 
+                vPortFree( ( void * ) pxStreamBuffer ); /*lint !e9087 Standard free() semantics require void *, plus pxStreamBuffer was allocated by pvPortMalloc(). */
 
+            }
 
+        #else
 
+            {
 
+                /* Should not be possible to get here, ucFlags must be corrupt.
 
+                 * Force an assert. */
 
+                configASSERT( xStreamBuffer == ( StreamBufferHandle_t ) ~0 );
 
+            }
 
+        #endif
 
+    }
 
+    else
 
+    {
 
+        /* The structure and buffer were not allocated dynamically and cannot be
 
+         * freed - just scrub the structure so future use will assert. */
 
+        ( void ) memset( pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) );
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer )
 
+{
 
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    BaseType_t xReturn = pdFAIL;
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        UBaseType_t uxStreamBufferNumber;
 
+    #endif
 
+
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        {
 
+            /* Store the stream buffer number so it can be restored after the
 
+             * reset. */
 
+            uxStreamBufferNumber = pxStreamBuffer->uxStreamBufferNumber;
 
+        }
 
+    #endif
 
+
 
+    /* Can only reset a message buffer if there are no tasks blocked on it. */
 
+    taskENTER_CRITICAL();
 
+    {
 
+        if( pxStreamBuffer->xTaskWaitingToReceive == NULL )
 
+        {
 
+            if( pxStreamBuffer->xTaskWaitingToSend == NULL )
 
+            {
 
+                prvInitialiseNewStreamBuffer( pxStreamBuffer,
 
+                                              pxStreamBuffer->pucBuffer,
 
+                                              pxStreamBuffer->xLength,
 
+                                              pxStreamBuffer->xTriggerLevelBytes,
 
+                                              pxStreamBuffer->ucFlags );
 
+                xReturn = pdPASS;
 
+
 
+                #if ( configUSE_TRACE_FACILITY == 1 )
 
+                    {
 
+                        pxStreamBuffer->uxStreamBufferNumber = uxStreamBufferNumber;
 
+                    }
 
+                #endif
 
+
 
+                traceSTREAM_BUFFER_RESET( xStreamBuffer );
 
+            }
 
+        }
 
+    }
 
+    taskEXIT_CRITICAL();
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
 
+                                         size_t xTriggerLevel )
 
+{
 
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    BaseType_t xReturn;
 
+
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    /* It is not valid for the trigger level to be 0. */
 
+    if( xTriggerLevel == ( size_t ) 0 )
 
+    {
 
+        xTriggerLevel = ( size_t ) 1;
 
+    }
 
+
 
+    /* The trigger level is the number of bytes that must be in the stream
 
+     * buffer before a task that is waiting for data is unblocked. */
 
+    if( xTriggerLevel < pxStreamBuffer->xLength )
 
+    {
 
+        pxStreamBuffer->xTriggerLevelBytes = xTriggerLevel;
 
+        xReturn = pdPASS;
 
+    }
 
+    else
 
+    {
 
+        xReturn = pdFALSE;
 
+    }
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer )
 
+{
 
+    const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    size_t xSpace;
 
+    size_t xOriginalTail;
 
+
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    /* The code below reads xTail and then xHead.  This is safe if the stream
 
+    buffer is updated once between the two reads - but not if the stream buffer
 
+    is updated more than once between the two reads - hence the loop. */
 
+    do
 
+    {
 
+        xOriginalTail = pxStreamBuffer->xTail;
 
+        xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
 
+        xSpace -= pxStreamBuffer->xHead;
 
+    } while( xOriginalTail != pxStreamBuffer->xTail );
 
+    xSpace -= ( size_t ) 1;
 
+
 
+    if( xSpace >= pxStreamBuffer->xLength )
 
+    {
 
+        xSpace -= pxStreamBuffer->xLength;
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    return xSpace;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer )
 
+{
 
+    const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    size_t xReturn;
 
+
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    xReturn = prvBytesInBuffer( pxStreamBuffer );
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
 
+                          const void * pvTxData,
 
+                          size_t xDataLengthBytes,
 
+                          TickType_t xTicksToWait )
 
+{
 
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    size_t xReturn, xSpace = 0;
 
+    size_t xRequiredSpace = xDataLengthBytes;
 
+    TimeOut_t xTimeOut;
 
+    size_t xMaxReportedSpace = 0;
 
+
 
+    configASSERT( pvTxData );
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    /* The maximum amount of space a stream buffer will ever report is its length
 
+     * minus 1. */
 
+    xMaxReportedSpace = pxStreamBuffer->xLength - ( size_t ) 1;
 
+
 
+    /* This send function is used to write to both message buffers and stream
 
+     * buffers.  If this is a message buffer then the space needed must be
 
+     * increased by the amount of bytes needed to store the length of the
 
+     * message. */
 
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 
+    {
 
+        xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
 
+
 
+        /* Overflow? */
 
+        configASSERT( xRequiredSpace > xDataLengthBytes );
 
+
 
+        /* If this is a message buffer then it must be possible to write the
 
+         * whole message. */
 
+        if( xRequiredSpace > xMaxReportedSpace )
 
+        {
 
+            /* The message would not fit even if the entire buffer was empty,
 
+             * so don't wait for space. */
 
+            xTicksToWait = ( TickType_t ) 0;
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    else
 
+    {
 
+        /* If this is a stream buffer then it is acceptable to write only part
 
+         * of the message to the buffer.  Cap the length to the total length of
 
+         * the buffer. */
 
+        if( xRequiredSpace > xMaxReportedSpace )
 
+        {
 
+            xRequiredSpace = xMaxReportedSpace;
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+    if( xTicksToWait != ( TickType_t ) 0 )
 
+    {
 
+        vTaskSetTimeOutState( &xTimeOut );
 
+
 
+        do
 
+        {
 
+            /* Wait until the required number of bytes are free in the message
 
+             * buffer. */
 
+            taskENTER_CRITICAL();
 
+            {
 
+                xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 
+
 
+                if( xSpace < xRequiredSpace )
 
+                {
 
+                    /* Clear notification state as going to wait for space. */
 
+                    ( void ) xTaskNotifyStateClear( NULL );
 
+
 
+                    /* Should only be one writer. */
 
+                    configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
 
+                    pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
 
+                }
 
+                else
 
+                {
 
+                    taskEXIT_CRITICAL();
 
+                    break;
 
+                }
 
+            }
 
+            taskEXIT_CRITICAL();
 
+
 
+            traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
 
+            ( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 
+            pxStreamBuffer->xTaskWaitingToSend = NULL;
 
+        } while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    if( xSpace == ( size_t ) 0 )
 
+    {
 
+        xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
 
+
 
+    if( xReturn > ( size_t ) 0 )
 
+    {
 
+        traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );
 
+
 
+        /* Was a task waiting for the data? */
 
+        if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
 
+        {
 
+            sbSEND_COMPLETED( pxStreamBuffer );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+        traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
 
+    }
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
 
+                                 const void * pvTxData,
 
+                                 size_t xDataLengthBytes,
 
+                                 BaseType_t * const pxHigherPriorityTaskWoken )
 
+{
 
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    size_t xReturn, xSpace;
 
+    size_t xRequiredSpace = xDataLengthBytes;
 
+
 
+    configASSERT( pvTxData );
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    /* This send function is used to write to both message buffers and stream
 
+     * buffers.  If this is a message buffer then the space needed must be
 
+     * increased by the amount of bytes needed to store the length of the
 
+     * message. */
 
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 
+    {
 
+        xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 
+    xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
 
+
 
+    if( xReturn > ( size_t ) 0 )
 
+    {
 
+        /* Was a task waiting for the data? */
 
+        if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
 
+        {
 
+            sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xReturn );
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
 
+                                       const void * pvTxData,
 
+                                       size_t xDataLengthBytes,
 
+                                       size_t xSpace,
 
+                                       size_t xRequiredSpace )
 
+{
 
+    size_t xNextHead = pxStreamBuffer->xHead;
 
+
 
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 
+    {
 
+        /* This is a message buffer, as opposed to a stream buffer. */
 
+
 
+        if( xSpace >= xRequiredSpace )
 
+        {
 
+            /* There is enough space to write both the message length and the message
 
+             * itself into the buffer.  Start by writing the length of the data, the data
 
+             * itself will be written later in this function. */
 
+            xNextHead = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH, xNextHead );
 
+        }
 
+        else
 
+        {
 
+            /* Not enough space, so do not write data to the buffer. */
 
+            xDataLengthBytes = 0;
 
+        }
 
+    }
 
+    else
 
+    {
 
+        /* This is a stream buffer, as opposed to a message buffer, so writing a
 
+         * stream of bytes rather than discrete messages.  Plan to write as many
 
+         * bytes as possible. */
 
+        xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
 
+    }
 
+
 
+    if( xDataLengthBytes != ( size_t ) 0 )
 
+    {
 
+        /* Write the data to the buffer. */
 
+        pxStreamBuffer->xHead = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes, xNextHead ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alignment and access. */
 
+    }
 
+
 
+    return xDataLengthBytes;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
 
+                             void * pvRxData,
 
+                             size_t xBufferLengthBytes,
 
+                             TickType_t xTicksToWait )
 
+{
 
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
 
+
 
+    configASSERT( pvRxData );
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    /* This receive function is used by both message buffers, which store
 
+     * discrete messages, and stream buffers, which store a continuous stream of
 
+     * bytes.  Discrete messages include an additional
 
+     * sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
 
+     * message. */
 
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 
+    {
 
+        xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
 
+    }
 
+    else
 
+    {
 
+        xBytesToStoreMessageLength = 0;
 
+    }
 
+
 
+    if( xTicksToWait != ( TickType_t ) 0 )
 
+    {
 
+        /* Checking if there is data and clearing the notification state must be
 
+         * performed atomically. */
 
+        taskENTER_CRITICAL();
 
+        {
 
+            xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 
+
 
+            /* If this function was invoked by a message buffer read then
 
+             * xBytesToStoreMessageLength holds the number of bytes used to hold
 
+             * the length of the next discrete message.  If this function was
 
+             * invoked by a stream buffer read then xBytesToStoreMessageLength will
 
+             * be 0. */
 
+            if( xBytesAvailable <= xBytesToStoreMessageLength )
 
+            {
 
+                /* Clear notification state as going to wait for data. */
 
+                ( void ) xTaskNotifyStateClear( NULL );
 
+
 
+                /* Should only be one reader. */
 
+                configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL );
 
+                pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle();
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        if( xBytesAvailable <= xBytesToStoreMessageLength )
 
+        {
 
+            /* Wait for data to be available. */
 
+            traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer );
 
+            ( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 
+            pxStreamBuffer->xTaskWaitingToReceive = NULL;
 
+
 
+            /* Recheck the data available after blocking. */
 
+            xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    else
 
+    {
 
+        xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 
+    }
 
+
 
+    /* Whether receiving a discrete message (where xBytesToStoreMessageLength
 
+     * holds the number of bytes used to store the message length) or a stream of
 
+     * bytes (where xBytesToStoreMessageLength is zero), the number of bytes
 
+     * available must be greater than xBytesToStoreMessageLength to be able to
 
+     * read bytes from the buffer. */
 
+    if( xBytesAvailable > xBytesToStoreMessageLength )
 
+    {
 
+        xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable );
 
+
 
+        /* Was a task waiting for space in the buffer? */
 
+        if( xReceivedLength != ( size_t ) 0 )
 
+        {
 
+            traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength );
 
+            sbRECEIVE_COMPLETED( pxStreamBuffer );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    else
 
+    {
 
+        traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer );
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    return xReceivedLength;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer )
 
+{
 
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    size_t xReturn, xBytesAvailable;
 
+    configMESSAGE_BUFFER_LENGTH_TYPE xTempReturn;
 
+
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    /* Ensure the stream buffer is being used as a message buffer. */
 
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 
+    {
 
+        xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 
+
 
+        if( xBytesAvailable > sbBYTES_TO_STORE_MESSAGE_LENGTH )
 
+        {
 
+            /* The number of bytes available is greater than the number of bytes
 
+             * required to hold the length of the next message, so another message
 
+             * is available. */
 
+             ( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempReturn, sbBYTES_TO_STORE_MESSAGE_LENGTH, pxStreamBuffer->xTail );
 
+             xReturn = ( size_t ) xTempReturn;
 
+        }
 
+        else
 
+        {
 
+            /* The minimum amount of bytes in a message buffer is
 
+             * ( sbBYTES_TO_STORE_MESSAGE_LENGTH + 1 ), so if xBytesAvailable is
 
+             * less than sbBYTES_TO_STORE_MESSAGE_LENGTH the only other valid
 
+             * value is 0. */
 
+            configASSERT( xBytesAvailable == 0 );
 
+            xReturn = 0;
 
+        }
 
+    }
 
+    else
 
+    {
 
+        xReturn = 0;
 
+    }
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
 
+                                    void * pvRxData,
 
+                                    size_t xBufferLengthBytes,
 
+                                    BaseType_t * const pxHigherPriorityTaskWoken )
 
+{
 
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
 
+
 
+    configASSERT( pvRxData );
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    /* This receive function is used by both message buffers, which store
 
+     * discrete messages, and stream buffers, which store a continuous stream of
 
+     * bytes.  Discrete messages include an additional
 
+     * sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
 
+     * message. */
 
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 
+    {
 
+        xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
 
+    }
 
+    else
 
+    {
 
+        xBytesToStoreMessageLength = 0;
 
+    }
 
+
 
+    xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 
+
 
+    /* Whether receiving a discrete message (where xBytesToStoreMessageLength
 
+     * holds the number of bytes used to store the message length) or a stream of
 
+     * bytes (where xBytesToStoreMessageLength is zero), the number of bytes
 
+     * available must be greater than xBytesToStoreMessageLength to be able to
 
+     * read bytes from the buffer. */
 
+    if( xBytesAvailable > xBytesToStoreMessageLength )
 
+    {
 
+        xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable );
 
+
 
+        /* Was a task waiting for space in the buffer? */
 
+        if( xReceivedLength != ( size_t ) 0 )
 
+        {
 
+            sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength );
 
+
 
+    return xReceivedLength;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static size_t prvReadMessageFromBuffer( StreamBuffer_t * pxStreamBuffer,
 
+                                        void * pvRxData,
 
+                                        size_t xBufferLengthBytes,
 
+                                        size_t xBytesAvailable )
 
+{
 
+    size_t xCount, xNextMessageLength;
 
+    configMESSAGE_BUFFER_LENGTH_TYPE xTempNextMessageLength;
 
+    size_t xNextTail = pxStreamBuffer->xTail;
 
+
 
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 
+    {
 
+        /* A discrete message is being received.  First receive the length
 
+         * of the message. */
 
+        xNextTail = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, sbBYTES_TO_STORE_MESSAGE_LENGTH, xNextTail );
 
+        xNextMessageLength = ( size_t ) xTempNextMessageLength;
 
+
 
+        /* Reduce the number of bytes available by the number of bytes just
 
+         * read out. */
 
+        xBytesAvailable -= sbBYTES_TO_STORE_MESSAGE_LENGTH;
 
+
 
+        /* Check there is enough space in the buffer provided by the
 
+         * user. */
 
+        if( xNextMessageLength > xBufferLengthBytes )
 
+        {
 
+            /* The user has provided insufficient space to read the message. */
 
+            xNextMessageLength = 0;
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    else
 
+    {
 
+        /* A stream of bytes is being received (as opposed to a discrete
 
+         * message), so read as many bytes as possible. */
 
+        xNextMessageLength = xBufferLengthBytes;
 
+    }
 
+
 
+    /* Use the minimum of the wanted bytes and the available bytes. */
 
+    xCount = configMIN( xNextMessageLength, xBytesAvailable );
 
+
 
+    if( xCount != ( size_t ) 0 )
 
+    {
 
+        /* Read the actual data and update the tail to mark the data as officially consumed. */
 
+        pxStreamBuffer->xTail = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xCount, xNextTail); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */
 
+    }
 
+
 
+    return xCount;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer )
 
+{
 
+    const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    BaseType_t xReturn;
 
+    size_t xTail;
 
+
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    /* True if no bytes are available. */
 
+    xTail = pxStreamBuffer->xTail;
 
+
 
+    if( pxStreamBuffer->xHead == xTail )
 
+    {
 
+        xReturn = pdTRUE;
 
+    }
 
+    else
 
+    {
 
+        xReturn = pdFALSE;
 
+    }
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer )
 
+{
 
+    BaseType_t xReturn;
 
+    size_t xBytesToStoreMessageLength;
 
+    const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    /* This generic version of the receive function is used by both message
 
+     * buffers, which store discrete messages, and stream buffers, which store a
 
+     * continuous stream of bytes.  Discrete messages include an additional
 
+     * sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the message. */
 
+    if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 
+    {
 
+        xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
 
+    }
 
+    else
 
+    {
 
+        xBytesToStoreMessageLength = 0;
 
+    }
 
+
 
+    /* True if the available space equals zero. */
 
+    if( xStreamBufferSpacesAvailable( xStreamBuffer ) <= xBytesToStoreMessageLength )
 
+    {
 
+        xReturn = pdTRUE;
 
+    }
 
+    else
 
+    {
 
+        xReturn = pdFALSE;
 
+    }
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
 
+                                              BaseType_t * pxHigherPriorityTaskWoken )
 
+{
 
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    BaseType_t xReturn;
 
+    UBaseType_t uxSavedInterruptStatus;
 
+
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();
 
+    {
 
+        if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )
 
+        {
 
+            ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToReceive,
 
+                                         ( uint32_t ) 0,
 
+                                         eNoAction,
 
+                                         pxHigherPriorityTaskWoken );
 
+            ( pxStreamBuffer )->xTaskWaitingToReceive = NULL;
 
+            xReturn = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            xReturn = pdFALSE;
 
+        }
 
+    }
 
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
 
+                                                 BaseType_t * pxHigherPriorityTaskWoken )
 
+{
 
+    StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 
+    BaseType_t xReturn;
 
+    UBaseType_t uxSavedInterruptStatus;
 
+
 
+    configASSERT( pxStreamBuffer );
 
+
 
+    uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();
 
+    {
 
+        if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )
 
+        {
 
+            ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToSend,
 
+                                         ( uint32_t ) 0,
 
+                                         eNoAction,
 
+                                         pxHigherPriorityTaskWoken );
 
+            ( pxStreamBuffer )->xTaskWaitingToSend = NULL;
 
+            xReturn = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            xReturn = pdFALSE;
 
+        }
 
+    }
 
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer,
 
+                                     const uint8_t * pucData,
 
+                                     size_t xCount,
 
+                                     size_t xHead )
 
+{
 
+    size_t xFirstLength;
 
+
 
+    configASSERT( xCount > ( size_t ) 0 );
 
+
 
+    /* Calculate the number of bytes that can be added in the first write -
 
+     * which may be less than the total number of bytes that need to be added if
 
+     * the buffer will wrap back to the beginning. */
 
+    xFirstLength = configMIN( pxStreamBuffer->xLength - xHead, xCount );
 
+
 
+    /* Write as many bytes as can be written in the first write. */
 
+    configASSERT( ( xHead + xFirstLength ) <= pxStreamBuffer->xLength );
 
+    ( void ) memcpy( ( void * ) ( &( pxStreamBuffer->pucBuffer[ xHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 
+
 
+    /* If the number of bytes written was less than the number that could be
 
+     * written in the first write... */
 
+    if( xCount > xFirstLength )
 
+    {
 
+        /* ...then write the remaining bytes to the start of the buffer. */
 
+        configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
 
+        ( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    xHead += xCount;
 
+
 
+    if( xHead >= pxStreamBuffer->xLength )
 
+    {
 
+        xHead -= pxStreamBuffer->xLength;
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    return xHead;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static size_t prvReadBytesFromBuffer( StreamBuffer_t * pxStreamBuffer,
 
+                                      uint8_t * pucData,
 
+                                      size_t xCount,
 
+                                      size_t xTail )
 
+{
 
+    size_t xFirstLength;
 
+
 
+    configASSERT( xCount != ( size_t ) 0 );
 
+
 
+    /* Calculate the number of bytes that can be read - which may be
 
+     * less than the number wanted if the data wraps around to the start of
 
+     * the buffer. */
 
+    xFirstLength = configMIN( pxStreamBuffer->xLength - xTail, xCount );
 
+
 
+    /* Obtain the number of bytes it is possible to obtain in the first
 
+     * read.  Asserts check bounds of read and write. */
 
+    configASSERT( xFirstLength <= xCount );
 
+    configASSERT( ( xTail + xFirstLength ) <= pxStreamBuffer->xLength );
 
+    ( void ) memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 
+
 
+    /* If the total number of wanted bytes is greater than the number
 
+     * that could be read in the first read... */
 
+    if( xCount > xFirstLength )
 
+    {
 
+        /* ...then read the remaining bytes from the start of the buffer. */
 
+        ( void ) memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    /* Move the tail pointer to effectively remove the data read from the buffer. */
 
+    xTail += xCount;
 
+
 
+    if( xTail >= pxStreamBuffer->xLength )
 
+    {
 
+        xTail -= pxStreamBuffer->xLength;
 
+    }
 
+
 
+    return xTail;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer )
 
+{
 
+/* Returns the distance between xTail and xHead. */
 
+    size_t xCount;
 
+
 
+    xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
 
+    xCount -= pxStreamBuffer->xTail;
 
+
 
+    if( xCount >= pxStreamBuffer->xLength )
 
+    {
 
+        xCount -= pxStreamBuffer->xLength;
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    return xCount;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
 
+                                          uint8_t * const pucBuffer,
 
+                                          size_t xBufferSizeBytes,
 
+                                          size_t xTriggerLevelBytes,
 
+                                          uint8_t ucFlags )
 
+{
 
+    /* Assert here is deliberately writing to the entire buffer to ensure it can
 
+     * be written to without generating exceptions, and is setting the buffer to a
 
+     * known value to assist in development/debugging. */
 
+    #if ( configASSERT_DEFINED == 1 )
 
+        {
 
+            /* The value written just has to be identifiable when looking at the
 
+             * memory.  Don't use 0xA5 as that is the stack fill value and could
 
+             * result in confusion as to what is actually being observed. */
 
+            const BaseType_t xWriteValue = 0x55;
 
+            configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer );
 
+        } /*lint !e529 !e438 xWriteValue is only used if configASSERT() is defined. */
 
+    #endif
 
+
 
+    ( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */
 
+    pxStreamBuffer->pucBuffer = pucBuffer;
 
+    pxStreamBuffer->xLength = xBufferSizeBytes;
 
+    pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes;
 
+    pxStreamBuffer->ucFlags = ucFlags;
 
+}
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer )
 
+    {
 
+        return xStreamBuffer->uxStreamBufferNumber;
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer,
 
+                                             UBaseType_t uxStreamBufferNumber )
 
+    {
 
+        xStreamBuffer->uxStreamBufferNumber = uxStreamBufferNumber;
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer )
 
+    {
 
+        return( xStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER );
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/

+ 5406 - 0
FreeRTOS/Source/tasks.c
Vedi File 

@@ -0,0 +1,5406 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/* Standard includes. */
 
+#include <stdlib.h>
 
+#include <string.h>
 
+
 
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
 
+ * all the API functions to use the MPU wrappers.  That should only be done when
 
+ * task.h is included from an application file. */
 
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
+
 
+/* FreeRTOS includes. */
 
+#include "FreeRTOS.h"
 
+#include "task.h"
 
+#include "timers.h"
 
+#include "stack_macros.h"
 
+
 
+/* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
 
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
 
+ * for the header files above, but not in this file, in order to generate the
 
+ * correct privileged Vs unprivileged linkage and placement. */
 
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
 
+
 
+/* Set configUSE_STATS_FORMATTING_FUNCTIONS to 2 to include the stats formatting
 
+ * functions but without including stdio.h here. */
 
+#if ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 )
 
+
 
+/* At the bottom of this file are two optional functions that can be used
 
+ * to generate human readable text from the raw data generated by the
 
+ * uxTaskGetSystemState() function.  Note the formatting functions are provided
 
+ * for convenience only, and are NOT considered part of the kernel. */
 
+    #include <stdio.h>
 
+#endif /* configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) */
 
+
 
+#if ( configUSE_PREEMPTION == 0 )
 
+
 
+/* If the cooperative scheduler is being used then a yield should not be
 
+ * performed just because a higher priority task has been woken. */
 
+    #define taskYIELD_IF_USING_PREEMPTION()
 
+#else
 
+    #define taskYIELD_IF_USING_PREEMPTION()    portYIELD_WITHIN_API()
 
+#endif
 
+
 
+/* Values that can be assigned to the ucNotifyState member of the TCB. */
 
+#define taskNOT_WAITING_NOTIFICATION              ( ( uint8_t ) 0 ) /* Must be zero as it is the initialised value. */
 
+#define taskWAITING_NOTIFICATION                  ( ( uint8_t ) 1 )
 
+#define taskNOTIFICATION_RECEIVED                 ( ( uint8_t ) 2 )
 
+
 
+/*
 
+ * The value used to fill the stack of a task when the task is created.  This
 
+ * is used purely for checking the high water mark for tasks.
 
+ */
 
+#define tskSTACK_FILL_BYTE                        ( 0xa5U )
 
+
 
+/* Bits used to record how a task's stack and TCB were allocated. */
 
+#define tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB    ( ( uint8_t ) 0 )
 
+#define tskSTATICALLY_ALLOCATED_STACK_ONLY        ( ( uint8_t ) 1 )
 
+#define tskSTATICALLY_ALLOCATED_STACK_AND_TCB     ( ( uint8_t ) 2 )
 
+
 
+/* If any of the following are set then task stacks are filled with a known
 
+ * value so the high water mark can be determined.  If none of the following are
 
+ * set then don't fill the stack so there is no unnecessary dependency on memset. */
 
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) )
 
+    #define tskSET_NEW_STACKS_TO_KNOWN_VALUE    1
 
+#else
 
+    #define tskSET_NEW_STACKS_TO_KNOWN_VALUE    0
 
+#endif
 
+
 
+/*
 
+ * Macros used by vListTask to indicate which state a task is in.
 
+ */
 
+#define tskRUNNING_CHAR      ( 'X' )
 
+#define tskBLOCKED_CHAR      ( 'B' )
 
+#define tskREADY_CHAR        ( 'R' )
 
+#define tskDELETED_CHAR      ( 'D' )
 
+#define tskSUSPENDED_CHAR    ( 'S' )
 
+
 
+/*
 
+ * Some kernel aware debuggers require the data the debugger needs access to to
 
+ * be global, rather than file scope.
 
+ */
 
+#ifdef portREMOVE_STATIC_QUALIFIER
 
+    #define static
 
+#endif
 
+
 
+/* The name allocated to the Idle task.  This can be overridden by defining
 
+ * configIDLE_TASK_NAME in FreeRTOSConfig.h. */
 
+#ifndef configIDLE_TASK_NAME
 
+    #define configIDLE_TASK_NAME    "IDLE"
 
+#endif
 
+
 
+#if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
 
+
 
+/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 0 then task selection is
 
+ * performed in a generic way that is not optimised to any particular
 
+ * microcontroller architecture. */
 
+
 
+/* uxTopReadyPriority holds the priority of the highest priority ready
 
+ * state task. */
 
+    #define taskRECORD_READY_PRIORITY( uxPriority ) \
 
+    {                                               \
 
+        if( ( uxPriority ) > uxTopReadyPriority )   \
 
+        {                                           \
 
+            uxTopReadyPriority = ( uxPriority );    \
 
+        }                                           \
 
+    } /* taskRECORD_READY_PRIORITY */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+    #define taskSELECT_HIGHEST_PRIORITY_TASK()                                \
 
+    {                                                                         \
 
+        UBaseType_t uxTopPriority = uxTopReadyPriority;                       \
 
+                                                                              \
 
+        /* Find the highest priority queue that contains ready tasks. */      \
 
+        while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopPriority ] ) ) ) \
 
+        {                                                                     \
 
+            configASSERT( uxTopPriority );                                    \
 
+            --uxTopPriority;                                                  \
 
+        }                                                                     \
 
+                                                                              \
 
+        /* listGET_OWNER_OF_NEXT_ENTRY indexes through the list, so the tasks of \
 
+         * the  same priority get an equal share of the processor time. */                    \
 
+        listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) ); \
 
+        uxTopReadyPriority = uxTopPriority;                                                   \
 
+    } /* taskSELECT_HIGHEST_PRIORITY_TASK */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/* Define away taskRESET_READY_PRIORITY() and portRESET_READY_PRIORITY() as
 
+ * they are only required when a port optimised method of task selection is
 
+ * being used. */
 
+    #define taskRESET_READY_PRIORITY( uxPriority )
 
+    #define portRESET_READY_PRIORITY( uxPriority, uxTopReadyPriority )
 
+
 
+#else /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 
+
 
+/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 1 then task selection is
 
+ * performed in a way that is tailored to the particular microcontroller
 
+ * architecture being used. */
 
+
 
+/* A port optimised version is provided.  Call the port defined macros. */
 
+    #define taskRECORD_READY_PRIORITY( uxPriority )    portRECORD_READY_PRIORITY( uxPriority, uxTopReadyPriority )
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+    #define taskSELECT_HIGHEST_PRIORITY_TASK()                                                  \
 
+    {                                                                                           \
 
+        UBaseType_t uxTopPriority;                                                              \
 
+                                                                                                \
 
+        /* Find the highest priority list that contains ready tasks. */                         \
 
+        portGET_HIGHEST_PRIORITY( uxTopPriority, uxTopReadyPriority );                          \
 
+        configASSERT( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ uxTopPriority ] ) ) > 0 ); \
 
+        listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) );   \
 
+    } /* taskSELECT_HIGHEST_PRIORITY_TASK() */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/* A port optimised version is provided, call it only if the TCB being reset
 
+ * is being referenced from a ready list.  If it is referenced from a delayed
 
+ * or suspended list then it won't be in a ready list. */
 
+    #define taskRESET_READY_PRIORITY( uxPriority )                                                     \
 
+    {                                                                                                  \
 
+        if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ ( uxPriority ) ] ) ) == ( UBaseType_t ) 0 ) \
 
+        {                                                                                              \
 
+            portRESET_READY_PRIORITY( ( uxPriority ), ( uxTopReadyPriority ) );                        \
 
+        }                                                                                              \
 
+    }
 
+
 
+#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/* pxDelayedTaskList and pxOverflowDelayedTaskList are switched when the tick
 
+ * count overflows. */
 
+#define taskSWITCH_DELAYED_LISTS()                                                \
 
+    {                                                                             \
 
+        List_t * pxTemp;                                                          \
 
+                                                                                  \
 
+        /* The delayed tasks list should be empty when the lists are switched. */ \
 
+        configASSERT( ( listLIST_IS_EMPTY( pxDelayedTaskList ) ) );               \
 
+                                                                                  \
 
+        pxTemp = pxDelayedTaskList;                                               \
 
+        pxDelayedTaskList = pxOverflowDelayedTaskList;                            \
 
+        pxOverflowDelayedTaskList = pxTemp;                                       \
 
+        xNumOfOverflows++;                                                        \
 
+        prvResetNextTaskUnblockTime();                                            \
 
+    }
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/*
 
+ * Place the task represented by pxTCB into the appropriate ready list for
 
+ * the task.  It is inserted at the end of the list.
 
+ */
 
+#define prvAddTaskToReadyList( pxTCB )                                                                 \
 
+    traceMOVED_TASK_TO_READY_STATE( pxTCB );                                                           \
 
+    taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority );                                                \
 
+    listINSERT_END( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xStateListItem ) ); \
 
+    tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
 
+/*-----------------------------------------------------------*/
 
+
 
+/*
 
+ * Several functions take a TaskHandle_t parameter that can optionally be NULL,
 
+ * where NULL is used to indicate that the handle of the currently executing
 
+ * task should be used in place of the parameter.  This macro simply checks to
 
+ * see if the parameter is NULL and returns a pointer to the appropriate TCB.
 
+ */
 
+#define prvGetTCBFromHandle( pxHandle )    ( ( ( pxHandle ) == NULL ) ? pxCurrentTCB : ( pxHandle ) )
 
+
 
+/* The item value of the event list item is normally used to hold the priority
 
+ * of the task to which it belongs (coded to allow it to be held in reverse
 
+ * priority order).  However, it is occasionally borrowed for other purposes.  It
 
+ * is important its value is not updated due to a task priority change while it is
 
+ * being used for another purpose.  The following bit definition is used to inform
 
+ * the scheduler that the value should not be changed - in which case it is the
 
+ * responsibility of whichever module is using the value to ensure it gets set back
 
+ * to its original value when it is released. */
 
+#if ( configUSE_16_BIT_TICKS == 1 )
 
+    #define taskEVENT_LIST_ITEM_VALUE_IN_USE    0x8000U
 
+#else
 
+    #define taskEVENT_LIST_ITEM_VALUE_IN_USE    0x80000000UL
 
+#endif
 
+
 
+/*
 
+ * Task control block.  A task control block (TCB) is allocated for each task,
 
+ * and stores task state information, including a pointer to the task's context
 
+ * (the task's run time environment, including register values)
 
+ */
 
+typedef struct tskTaskControlBlock       /* The old naming convention is used to prevent breaking kernel aware debuggers. */
 
+{
 
+    volatile StackType_t * pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack.  THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */
 
+
 
+    #if ( portUSING_MPU_WRAPPERS == 1 )
 
+        xMPU_SETTINGS xMPUSettings; /*< The MPU settings are defined as part of the port layer.  THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */
 
+    #endif
 
+
 
+    ListItem_t xStateListItem;                  /*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */
 
+    ListItem_t xEventListItem;                  /*< Used to reference a task from an event list. */
 
+    UBaseType_t uxPriority;                     /*< The priority of the task.  0 is the lowest priority. */
 
+    StackType_t * pxStack;                      /*< Points to the start of the stack. */
 
+    char pcTaskName[ configMAX_TASK_NAME_LEN ]; /*< Descriptive name given to the task when created.  Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+
 
+    #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
 
+        StackType_t * pxEndOfStack; /*< Points to the highest valid address for the stack. */
 
+    #endif
 
+
 
+    #if ( portCRITICAL_NESTING_IN_TCB == 1 )
 
+        UBaseType_t uxCriticalNesting; /*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */
 
+    #endif
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+        UBaseType_t uxTCBNumber;  /*< Stores a number that increments each time a TCB is created.  It allows debuggers to determine when a task has been deleted and then recreated. */
 
+        UBaseType_t uxTaskNumber; /*< Stores a number specifically for use by third party trace code. */
 
+    #endif
 
+
 
+    #if ( configUSE_MUTEXES == 1 )
 
+        UBaseType_t uxBasePriority; /*< The priority last assigned to the task - used by the priority inheritance mechanism. */
 
+        UBaseType_t uxMutexesHeld;
 
+    #endif
 
+
 
+    #if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
+        TaskHookFunction_t pxTaskTag;
 
+    #endif
 
+
 
+    #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
 
+        void * pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
 
+    #endif
 
+
 
+    #if ( configGENERATE_RUN_TIME_STATS == 1 )
 
+        uint32_t ulRunTimeCounter; /*< Stores the amount of time the task has spent in the Running state. */
 
+    #endif
 
+
 
+    #if ( configUSE_NEWLIB_REENTRANT == 1 )
 
+        /* Allocate a Newlib reent structure that is specific to this task.
 
+         * Note Newlib support has been included by popular demand, but is not
 
+         * used by the FreeRTOS maintainers themselves.  FreeRTOS is not
 
+         * responsible for resulting newlib operation.  User must be familiar with
 
+         * newlib and must provide system-wide implementations of the necessary
 
+         * stubs. Be warned that (at the time of writing) the current newlib design
 
+         * implements a system-wide malloc() that must be provided with locks.
 
+         *
 
+         * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
 
+         * for additional information. */
 
+        struct  _reent xNewLib_reent;
 
+    #endif
 
+
 
+    #if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+        volatile uint32_t ulNotifiedValue[ configTASK_NOTIFICATION_ARRAY_ENTRIES ];
 
+        volatile uint8_t ucNotifyState[ configTASK_NOTIFICATION_ARRAY_ENTRIES ];
 
+    #endif
 
+
 
+    /* See the comments in FreeRTOS.h with the definition of
 
+     * tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE. */
 
+    #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
 
+        uint8_t ucStaticallyAllocated;                     /*< Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */
 
+    #endif
 
+
 
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
 
+        uint8_t ucDelayAborted;
 
+    #endif
 
+
 
+    #if ( configUSE_POSIX_ERRNO == 1 )
 
+        int iTaskErrno;
 
+    #endif
 
+} tskTCB;
 
+
 
+/* The old tskTCB name is maintained above then typedefed to the new TCB_t name
 
+ * below to enable the use of older kernel aware debuggers. */
 
+typedef tskTCB TCB_t;
 
+
 
+/*lint -save -e956 A manual analysis and inspection has been used to determine
 
+ * which static variables must be declared volatile. */
 
+PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL;
 
+
 
+/* Lists for ready and blocked tasks. --------------------
 
+ * xDelayedTaskList1 and xDelayedTaskList2 could be moved to function scope but
 
+ * doing so breaks some kernel aware debuggers and debuggers that rely on removing
 
+ * the static qualifier. */
 
+PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */
 
+PRIVILEGED_DATA static List_t xDelayedTaskList1;                         /*< Delayed tasks. */
 
+PRIVILEGED_DATA static List_t xDelayedTaskList2;                         /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */
 
+PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList;              /*< Points to the delayed task list currently being used. */
 
+PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList;      /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */
 
+PRIVILEGED_DATA static List_t xPendingReadyList;                         /*< Tasks that have been readied while the scheduler was suspended.  They will be moved to the ready list when the scheduler is resumed. */
 
+
 
+#if ( INCLUDE_vTaskDelete == 1 )
 
+
 
+    PRIVILEGED_DATA static List_t xTasksWaitingTermination; /*< Tasks that have been deleted - but their memory not yet freed. */
 
+    PRIVILEGED_DATA static volatile UBaseType_t uxDeletedTasksWaitingCleanUp = ( UBaseType_t ) 0U;
 
+
 
+#endif
 
+
 
+#if ( INCLUDE_vTaskSuspend == 1 )
 
+
 
+    PRIVILEGED_DATA static List_t xSuspendedTaskList; /*< Tasks that are currently suspended. */
 
+
 
+#endif
 
+
 
+/* Global POSIX errno. Its value is changed upon context switching to match
 
+ * the errno of the currently running task. */
 
+#if ( configUSE_POSIX_ERRNO == 1 )
 
+    int FreeRTOS_errno = 0;
 
+#endif
 
+
 
+/* Other file private variables. --------------------------------*/
 
+PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks = ( UBaseType_t ) 0U;
 
+PRIVILEGED_DATA static volatile TickType_t xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
 
+PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority = tskIDLE_PRIORITY;
 
+PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning = pdFALSE;
 
+PRIVILEGED_DATA static volatile TickType_t xPendedTicks = ( TickType_t ) 0U;
 
+PRIVILEGED_DATA static volatile BaseType_t xYieldPending = pdFALSE;
 
+PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows = ( BaseType_t ) 0;
 
+PRIVILEGED_DATA static UBaseType_t uxTaskNumber = ( UBaseType_t ) 0U;
 
+PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime = ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */
 
+PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle = NULL;                          /*< Holds the handle of the idle task.  The idle task is created automatically when the scheduler is started. */
 
+
 
+/* Improve support for OpenOCD. The kernel tracks Ready tasks via priority lists.
 
+ * For tracking the state of remote threads, OpenOCD uses uxTopUsedPriority
 
+ * to determine the number of priority lists to read back from the remote target. */
 
+const volatile UBaseType_t uxTopUsedPriority = configMAX_PRIORITIES - 1U;
 
+
 
+/* Context switches are held pending while the scheduler is suspended.  Also,
 
+ * interrupts must not manipulate the xStateListItem of a TCB, or any of the
 
+ * lists the xStateListItem can be referenced from, if the scheduler is suspended.
 
+ * If an interrupt needs to unblock a task while the scheduler is suspended then it
 
+ * moves the task's event list item into the xPendingReadyList, ready for the
 
+ * kernel to move the task from the pending ready list into the real ready list
 
+ * when the scheduler is unsuspended.  The pending ready list itself can only be
 
+ * accessed from a critical section. */
 
+PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended = ( UBaseType_t ) pdFALSE;
 
+
 
+#if ( configGENERATE_RUN_TIME_STATS == 1 )
 
+
 
+/* Do not move these variables to function scope as doing so prevents the
 
+ * code working with debuggers that need to remove the static qualifier. */
 
+    PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL;    /*< Holds the value of a timer/counter the last time a task was switched in. */
 
+    PRIVILEGED_DATA static volatile uint32_t ulTotalRunTime = 0UL; /*< Holds the total amount of execution time as defined by the run time counter clock. */
 
+
 
+#endif
 
+
 
+/*lint -restore */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/* File private functions. --------------------------------*/
 
+
 
+/**
 
+ * Utility task that simply returns pdTRUE if the task referenced by xTask is
 
+ * currently in the Suspended state, or pdFALSE if the task referenced by xTask
 
+ * is in any other state.
 
+ */
 
+#if ( INCLUDE_vTaskSuspend == 1 )
 
+
 
+    static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
+
 
+#endif /* INCLUDE_vTaskSuspend */
 
+
 
+/*
 
+ * Utility to ready all the lists used by the scheduler.  This is called
 
+ * automatically upon the creation of the first task.
 
+ */
 
+static void prvInitialiseTaskLists( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * The idle task, which as all tasks is implemented as a never ending loop.
 
+ * The idle task is automatically created and added to the ready lists upon
 
+ * creation of the first user task.
 
+ *
 
+ * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific
 
+ * language extensions.  The equivalent prototype for this function is:
 
+ *
 
+ * void prvIdleTask( void *pvParameters );
 
+ *
 
+ */
 
+static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Utility to free all memory allocated by the scheduler to hold a TCB,
 
+ * including the stack pointed to by the TCB.
 
+ *
 
+ * This does not free memory allocated by the task itself (i.e. memory
 
+ * allocated by calls to pvPortMalloc from within the tasks application code).
 
+ */
 
+#if ( INCLUDE_vTaskDelete == 1 )
 
+
 
+    static void prvDeleteTCB( TCB_t * pxTCB ) PRIVILEGED_FUNCTION;
 
+
 
+#endif
 
+
 
+/*
 
+ * Used only by the idle task.  This checks to see if anything has been placed
 
+ * in the list of tasks waiting to be deleted.  If so the task is cleaned up
 
+ * and its TCB deleted.
 
+ */
 
+static void prvCheckTasksWaitingTermination( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * The currently executing task is entering the Blocked state.  Add the task to
 
+ * either the current or the overflow delayed task list.
 
+ */
 
+static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait,
 
+                                            const BaseType_t xCanBlockIndefinitely ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Fills an TaskStatus_t structure with information on each task that is
 
+ * referenced from the pxList list (which may be a ready list, a delayed list,
 
+ * a suspended list, etc.).
 
+ *
 
+ * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM
 
+ * NORMAL APPLICATION CODE.
 
+ */
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t * pxTaskStatusArray,
 
+                                                     List_t * pxList,
 
+                                                     eTaskState eState ) PRIVILEGED_FUNCTION;
 
+
 
+#endif
 
+
 
+/*
 
+ * Searches pxList for a task with name pcNameToQuery - returning a handle to
 
+ * the task if it is found, or NULL if the task is not found.
 
+ */
 
+#if ( INCLUDE_xTaskGetHandle == 1 )
 
+
 
+    static TCB_t * prvSearchForNameWithinSingleList( List_t * pxList,
 
+                                                     const char pcNameToQuery[] ) PRIVILEGED_FUNCTION;
 
+
 
+#endif
 
+
 
+/*
 
+ * When a task is created, the stack of the task is filled with a known value.
 
+ * This function determines the 'high water mark' of the task stack by
 
+ * determining how much of the stack remains at the original preset value.
 
+ */
 
+#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) )
 
+
 
+    static configSTACK_DEPTH_TYPE prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte ) PRIVILEGED_FUNCTION;
 
+
 
+#endif
 
+
 
+/*
 
+ * Return the amount of time, in ticks, that will pass before the kernel will
 
+ * next move a task from the Blocked state to the Running state.
 
+ *
 
+ * This conditional compilation should use inequality to 0, not equality to 1.
 
+ * This is to ensure portSUPPRESS_TICKS_AND_SLEEP() can be called when user
 
+ * defined low power mode implementations require configUSE_TICKLESS_IDLE to be
 
+ * set to a value other than 1.
 
+ */
 
+#if ( configUSE_TICKLESS_IDLE != 0 )
 
+
 
+    static TickType_t prvGetExpectedIdleTime( void ) PRIVILEGED_FUNCTION;
 
+
 
+#endif
 
+
 
+/*
 
+ * Set xNextTaskUnblockTime to the time at which the next Blocked state task
 
+ * will exit the Blocked state.
 
+ */
 
+static void prvResetNextTaskUnblockTime( void ) PRIVILEGED_FUNCTION;
 
+
 
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
 
+
 
+/*
 
+ * Helper function used to pad task names with spaces when printing out
 
+ * human readable tables of task information.
 
+ */
 
+    static char * prvWriteNameToBuffer( char * pcBuffer,
 
+                                        const char * pcTaskName ) PRIVILEGED_FUNCTION;
 
+
 
+#endif
 
+
 
+/*
 
+ * Called after a Task_t structure has been allocated either statically or
 
+ * dynamically to fill in the structure's members.
 
+ */
 
+static void prvInitialiseNewTask( TaskFunction_t pxTaskCode,
 
+                                  const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                                  const uint32_t ulStackDepth,
 
+                                  void * const pvParameters,
 
+                                  UBaseType_t uxPriority,
 
+                                  TaskHandle_t * const pxCreatedTask,
 
+                                  TCB_t * pxNewTCB,
 
+                                  const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Called after a new task has been created and initialised to place the task
 
+ * under the control of the scheduler.
 
+ */
 
+static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * freertos_tasks_c_additions_init() should only be called if the user definable
 
+ * macro FREERTOS_TASKS_C_ADDITIONS_INIT() is defined, as that is the only macro
 
+ * called by the function.
 
+ */
 
+#ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
 
+
 
+    static void freertos_tasks_c_additions_init( void ) PRIVILEGED_FUNCTION;
 
+
 
+#endif
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+
 
+    TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
 
+                                    const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                                    const uint32_t ulStackDepth,
 
+                                    void * const pvParameters,
 
+                                    UBaseType_t uxPriority,
 
+                                    StackType_t * const puxStackBuffer,
 
+                                    StaticTask_t * const pxTaskBuffer )
 
+    {
 
+        TCB_t * pxNewTCB;
 
+        TaskHandle_t xReturn;
 
+
 
+        configASSERT( puxStackBuffer != NULL );
 
+        configASSERT( pxTaskBuffer != NULL );
 
+
 
+        #if ( configASSERT_DEFINED == 1 )
 
+            {
 
+                /* Sanity check that the size of the structure used to declare a
 
+                 * variable of type StaticTask_t equals the size of the real task
 
+                 * structure. */
 
+                volatile size_t xSize = sizeof( StaticTask_t );
 
+                configASSERT( xSize == sizeof( TCB_t ) );
 
+                ( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
 
+            }
 
+        #endif /* configASSERT_DEFINED */
 
+
 
+        if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
 
+        {
 
+            /* The memory used for the task's TCB and stack are passed into this
 
+             * function - use them. */
 
+            pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 
+            pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
 
+
 
+            #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
 
+                {
 
+                    /* Tasks can be created statically or dynamically, so note this
 
+                     * task was created statically in case the task is later deleted. */
 
+                    pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
 
+                }
 
+            #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
 
+
 
+            prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
 
+            prvAddNewTaskToReadyList( pxNewTCB );
 
+        }
 
+        else
 
+        {
 
+            xReturn = NULL;
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* SUPPORT_STATIC_ALLOCATION */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
 
+
 
+    BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
 
+                                            TaskHandle_t * pxCreatedTask )
 
+    {
 
+        TCB_t * pxNewTCB;
 
+        BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 
+
 
+        configASSERT( pxTaskDefinition->puxStackBuffer != NULL );
 
+        configASSERT( pxTaskDefinition->pxTaskBuffer != NULL );
 
+
 
+        if( ( pxTaskDefinition->puxStackBuffer != NULL ) && ( pxTaskDefinition->pxTaskBuffer != NULL ) )
 
+        {
 
+            /* Allocate space for the TCB.  Where the memory comes from depends
 
+             * on the implementation of the port malloc function and whether or
 
+             * not static allocation is being used. */
 
+            pxNewTCB = ( TCB_t * ) pxTaskDefinition->pxTaskBuffer;
 
+
 
+            /* Store the stack location in the TCB. */
 
+            pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;
 
+
 
+            #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
 
+                {
 
+                    /* Tasks can be created statically or dynamically, so note this
 
+                     * task was created statically in case the task is later deleted. */
 
+                    pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
 
+                }
 
+            #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
 
+
 
+            prvInitialiseNewTask( pxTaskDefinition->pvTaskCode,
 
+                                  pxTaskDefinition->pcName,
 
+                                  ( uint32_t ) pxTaskDefinition->usStackDepth,
 
+                                  pxTaskDefinition->pvParameters,
 
+                                  pxTaskDefinition->uxPriority,
 
+                                  pxCreatedTask, pxNewTCB,
 
+                                  pxTaskDefinition->xRegions );
 
+
 
+            prvAddNewTaskToReadyList( pxNewTCB );
 
+            xReturn = pdPASS;
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
+
 
+    BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
 
+                                      TaskHandle_t * pxCreatedTask )
 
+    {
 
+        TCB_t * pxNewTCB;
 
+        BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 
+
 
+        configASSERT( pxTaskDefinition->puxStackBuffer );
 
+
 
+        if( pxTaskDefinition->puxStackBuffer != NULL )
 
+        {
 
+            /* Allocate space for the TCB.  Where the memory comes from depends
 
+             * on the implementation of the port malloc function and whether or
 
+             * not static allocation is being used. */
 
+            pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
 
+
 
+            if( pxNewTCB != NULL )
 
+            {
 
+                /* Store the stack location in the TCB. */
 
+                pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;
 
+
 
+                #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
 
+                    {
 
+                        /* Tasks can be created statically or dynamically, so note
 
+                         * this task had a statically allocated stack in case it is
 
+                         * later deleted.  The TCB was allocated dynamically. */
 
+                        pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_ONLY;
 
+                    }
 
+                #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
 
+
 
+                prvInitialiseNewTask( pxTaskDefinition->pvTaskCode,
 
+                                      pxTaskDefinition->pcName,
 
+                                      ( uint32_t ) pxTaskDefinition->usStackDepth,
 
+                                      pxTaskDefinition->pvParameters,
 
+                                      pxTaskDefinition->uxPriority,
 
+                                      pxCreatedTask, pxNewTCB,
 
+                                      pxTaskDefinition->xRegions );
 
+
 
+                prvAddNewTaskToReadyList( pxNewTCB );
 
+                xReturn = pdPASS;
 
+            }
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* portUSING_MPU_WRAPPERS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+
 
+    BaseType_t xTaskCreate( TaskFunction_t pxTaskCode,
 
+                            const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                            const configSTACK_DEPTH_TYPE usStackDepth,
 
+                            void * const pvParameters,
 
+                            UBaseType_t uxPriority,
 
+                            TaskHandle_t * const pxCreatedTask )
 
+    {
 
+        TCB_t * pxNewTCB;
 
+        BaseType_t xReturn;
 
+
 
+        /* If the stack grows down then allocate the stack then the TCB so the stack
 
+         * does not grow into the TCB.  Likewise if the stack grows up then allocate
 
+         * the TCB then the stack. */
 
+        #if ( portSTACK_GROWTH > 0 )
 
+            {
 
+                /* Allocate space for the TCB.  Where the memory comes from depends on
 
+                 * the implementation of the port malloc function and whether or not static
 
+                 * allocation is being used. */
 
+                pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
 
+
 
+                if( pxNewTCB != NULL )
 
+                {
 
+                    /* Allocate space for the stack used by the task being created.
 
+                     * The base of the stack memory stored in the TCB so the task can
 
+                     * be deleted later if required. */
 
+                    pxNewTCB->pxStack = ( StackType_t * ) pvPortMallocStack( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+
 
+                    if( pxNewTCB->pxStack == NULL )
 
+                    {
 
+                        /* Could not allocate the stack.  Delete the allocated TCB. */
 
+                        vPortFree( pxNewTCB );
 
+                        pxNewTCB = NULL;
 
+                    }
 
+                }
 
+            }
 
+        #else /* portSTACK_GROWTH */
 
+            {
 
+                StackType_t * pxStack;
 
+
 
+                /* Allocate space for the stack used by the task being created. */
 
+                pxStack = pvPortMallocStack( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
 
+
 
+                if( pxStack != NULL )
 
+                {
 
+                    /* Allocate space for the TCB. */
 
+                    pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
 
+
 
+                    if( pxNewTCB != NULL )
 
+                    {
 
+                        /* Store the stack location in the TCB. */
 
+                        pxNewTCB->pxStack = pxStack;
 
+                    }
 
+                    else
 
+                    {
 
+                        /* The stack cannot be used as the TCB was not created.  Free
 
+                         * it again. */
 
+                        vPortFreeStack( pxStack );
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    pxNewTCB = NULL;
 
+                }
 
+            }
 
+        #endif /* portSTACK_GROWTH */
 
+
 
+        if( pxNewTCB != NULL )
 
+        {
 
+            #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
 
+                {
 
+                    /* Tasks can be created statically or dynamically, so note this
 
+                     * task was created dynamically in case it is later deleted. */
 
+                    pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
 
+                }
 
+            #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
 
+
 
+            prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
 
+            prvAddNewTaskToReadyList( pxNewTCB );
 
+            xReturn = pdPASS;
 
+        }
 
+        else
 
+        {
 
+            xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvInitialiseNewTask( TaskFunction_t pxTaskCode,
 
+                                  const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                                  const uint32_t ulStackDepth,
 
+                                  void * const pvParameters,
 
+                                  UBaseType_t uxPriority,
 
+                                  TaskHandle_t * const pxCreatedTask,
 
+                                  TCB_t * pxNewTCB,
 
+                                  const MemoryRegion_t * const xRegions )
 
+{
 
+    StackType_t * pxTopOfStack;
 
+    UBaseType_t x;
 
+
 
+    #if ( portUSING_MPU_WRAPPERS == 1 )
 
+        /* Should the task be created in privileged mode? */
 
+        BaseType_t xRunPrivileged;
 
+
 
+        if( ( uxPriority & portPRIVILEGE_BIT ) != 0U )
 
+        {
 
+            xRunPrivileged = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            xRunPrivileged = pdFALSE;
 
+        }
 
+        uxPriority &= ~portPRIVILEGE_BIT;
 
+    #endif /* portUSING_MPU_WRAPPERS == 1 */
 
+
 
+    /* Avoid dependency on memset() if it is not required. */
 
+    #if ( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
 
+        {
 
+            /* Fill the stack with a known value to assist debugging. */
 
+            ( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
 
+        }
 
+    #endif /* tskSET_NEW_STACKS_TO_KNOWN_VALUE */
 
+
 
+    /* Calculate the top of stack address.  This depends on whether the stack
 
+     * grows from high memory to low (as per the 80x86) or vice versa.
 
+     * portSTACK_GROWTH is used to make the result positive or negative as required
 
+     * by the port. */
 
+    #if ( portSTACK_GROWTH < 0 )
 
+        {
 
+            pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
 
+            pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
 
+
 
+            /* Check the alignment of the calculated top of stack is correct. */
 
+            configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
 
+
 
+            #if ( configRECORD_STACK_HIGH_ADDRESS == 1 )
 
+                {
 
+                    /* Also record the stack's high address, which may assist
 
+                     * debugging. */
 
+                    pxNewTCB->pxEndOfStack = pxTopOfStack;
 
+                }
 
+            #endif /* configRECORD_STACK_HIGH_ADDRESS */
 
+        }
 
+    #else /* portSTACK_GROWTH */
 
+        {
 
+            pxTopOfStack = pxNewTCB->pxStack;
 
+
 
+            /* Check the alignment of the stack buffer is correct. */
 
+            configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxNewTCB->pxStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
 
+
 
+            /* The other extreme of the stack space is required if stack checking is
 
+             * performed. */
 
+            pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
 
+        }
 
+    #endif /* portSTACK_GROWTH */
 
+
 
+    /* Store the task name in the TCB. */
 
+    if( pcName != NULL )
 
+    {
 
+        for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 
+        {
 
+            pxNewTCB->pcTaskName[ x ] = pcName[ x ];
 
+
 
+            /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
 
+             * configMAX_TASK_NAME_LEN characters just in case the memory after the
 
+             * string is not accessible (extremely unlikely). */
 
+            if( pcName[ x ] == ( char ) 0x00 )
 
+            {
 
+                break;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+
 
+        /* Ensure the name string is terminated in the case that the string length
 
+         * was greater or equal to configMAX_TASK_NAME_LEN. */
 
+        pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
 
+    }
 
+    else
 
+    {
 
+        /* The task has not been given a name, so just ensure there is a NULL
 
+         * terminator when it is read out. */
 
+        pxNewTCB->pcTaskName[ 0 ] = 0x00;
 
+    }
 
+
 
+    /* This is used as an array index so must ensure it's not too large. */
 
+    configASSERT( uxPriority < configMAX_PRIORITIES );
 
+    if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
 
+    {
 
+        uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    pxNewTCB->uxPriority = uxPriority;
 
+    #if ( configUSE_MUTEXES == 1 )
 
+        {
 
+            pxNewTCB->uxBasePriority = uxPriority;
 
+            pxNewTCB->uxMutexesHeld = 0;
 
+        }
 
+    #endif /* configUSE_MUTEXES */
 
+
 
+    vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
 
+    vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
 
+
 
+    /* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
 
+     * back to  the containing TCB from a generic item in a list. */
 
+    listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
 
+
 
+    /* Event lists are always in priority order. */
 
+    listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+    listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
 
+
 
+    #if ( portCRITICAL_NESTING_IN_TCB == 1 )
 
+        {
 
+            pxNewTCB->uxCriticalNesting = ( UBaseType_t ) 0U;
 
+        }
 
+    #endif /* portCRITICAL_NESTING_IN_TCB */
 
+
 
+    #if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
+        {
 
+            pxNewTCB->pxTaskTag = NULL;
 
+        }
 
+    #endif /* configUSE_APPLICATION_TASK_TAG */
 
+
 
+    #if ( configGENERATE_RUN_TIME_STATS == 1 )
 
+        {
 
+            pxNewTCB->ulRunTimeCounter = 0UL;
 
+        }
 
+    #endif /* configGENERATE_RUN_TIME_STATS */
 
+
 
+    #if ( portUSING_MPU_WRAPPERS == 1 )
 
+        {
 
+            vPortStoreTaskMPUSettings( &( pxNewTCB->xMPUSettings ), xRegions, pxNewTCB->pxStack, ulStackDepth );
 
+        }
 
+    #else
 
+        {
 
+            /* Avoid compiler warning about unreferenced parameter. */
 
+            ( void ) xRegions;
 
+        }
 
+    #endif
 
+
 
+    #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
 
+        {
 
+            memset( ( void * ) &( pxNewTCB->pvThreadLocalStoragePointers[ 0 ] ), 0x00, sizeof( pxNewTCB->pvThreadLocalStoragePointers ) );
 
+        }
 
+    #endif
 
+
 
+    #if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+        {
 
+            memset( ( void * ) &( pxNewTCB->ulNotifiedValue[ 0 ] ), 0x00, sizeof( pxNewTCB->ulNotifiedValue ) );
 
+            memset( ( void * ) &( pxNewTCB->ucNotifyState[ 0 ] ), 0x00, sizeof( pxNewTCB->ucNotifyState ) );
 
+        }
 
+    #endif
 
+
 
+    #if ( configUSE_NEWLIB_REENTRANT == 1 )
 
+        {
 
+            /* Initialise this task's Newlib reent structure.
 
+             * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
 
+             * for additional information. */
 
+            _REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
 
+        }
 
+    #endif
 
+
 
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
 
+        {
 
+            pxNewTCB->ucDelayAborted = pdFALSE;
 
+        }
 
+    #endif
 
+
 
+    /* Initialize the TCB stack to look as if the task was already running,
 
+     * but had been interrupted by the scheduler.  The return address is set
 
+     * to the start of the task function. Once the stack has been initialised
 
+     * the top of stack variable is updated. */
 
+    #if ( portUSING_MPU_WRAPPERS == 1 )
 
+        {
 
+            /* If the port has capability to detect stack overflow,
 
+             * pass the stack end address to the stack initialization
 
+             * function as well. */
 
+            #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
 
+                {
 
+                    #if ( portSTACK_GROWTH < 0 )
 
+                        {
 
+                            pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxStack, pxTaskCode, pvParameters, xRunPrivileged );
 
+                        }
 
+                    #else /* portSTACK_GROWTH */
 
+                        {
 
+                            pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxEndOfStack, pxTaskCode, pvParameters, xRunPrivileged );
 
+                        }
 
+                    #endif /* portSTACK_GROWTH */
 
+                }
 
+            #else /* portHAS_STACK_OVERFLOW_CHECKING */
 
+                {
 
+                    pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );
 
+                }
 
+            #endif /* portHAS_STACK_OVERFLOW_CHECKING */
 
+        }
 
+    #else /* portUSING_MPU_WRAPPERS */
 
+        {
 
+            /* If the port has capability to detect stack overflow,
 
+             * pass the stack end address to the stack initialization
 
+             * function as well. */
 
+            #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
 
+                {
 
+                    #if ( portSTACK_GROWTH < 0 )
 
+                        {
 
+                            pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxStack, pxTaskCode, pvParameters );
 
+                        }
 
+                    #else /* portSTACK_GROWTH */
 
+                        {
 
+                            pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxEndOfStack, pxTaskCode, pvParameters );
 
+                        }
 
+                    #endif /* portSTACK_GROWTH */
 
+                }
 
+            #else /* portHAS_STACK_OVERFLOW_CHECKING */
 
+                {
 
+                    pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
 
+                }
 
+            #endif /* portHAS_STACK_OVERFLOW_CHECKING */
 
+        }
 
+    #endif /* portUSING_MPU_WRAPPERS */
 
+
 
+    if( pxCreatedTask != NULL )
 
+    {
 
+        /* Pass the handle out in an anonymous way.  The handle can be used to
 
+         * change the created task's priority, delete the created task, etc.*/
 
+        *pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB )
 
+{
 
+    /* Ensure interrupts don't access the task lists while the lists are being
 
+     * updated. */
 
+    taskENTER_CRITICAL();
 
+    {
 
+        uxCurrentNumberOfTasks++;
 
+
 
+        if( pxCurrentTCB == NULL )
 
+        {
 
+            /* There are no other tasks, or all the other tasks are in
 
+             * the suspended state - make this the current task. */
 
+            pxCurrentTCB = pxNewTCB;
 
+
 
+            if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
 
+            {
 
+                /* This is the first task to be created so do the preliminary
 
+                 * initialisation required.  We will not recover if this call
 
+                 * fails, but we will report the failure. */
 
+                prvInitialiseTaskLists();
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            /* If the scheduler is not already running, make this task the
 
+             * current task if it is the highest priority task to be created
 
+             * so far. */
 
+            if( xSchedulerRunning == pdFALSE )
 
+            {
 
+                if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
 
+                {
 
+                    pxCurrentTCB = pxNewTCB;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+
 
+        uxTaskNumber++;
 
+
 
+        #if ( configUSE_TRACE_FACILITY == 1 )
 
+            {
 
+                /* Add a counter into the TCB for tracing only. */
 
+                pxNewTCB->uxTCBNumber = uxTaskNumber;
 
+            }
 
+        #endif /* configUSE_TRACE_FACILITY */
 
+        traceTASK_CREATE( pxNewTCB );
 
+
 
+        prvAddTaskToReadyList( pxNewTCB );
 
+
 
+        portSETUP_TCB( pxNewTCB );
 
+    }
 
+    taskEXIT_CRITICAL();
 
+
 
+    if( xSchedulerRunning != pdFALSE )
 
+    {
 
+        /* If the created task is of a higher priority than the current task
 
+         * then it should run now. */
 
+        if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
 
+        {
 
+            taskYIELD_IF_USING_PREEMPTION();
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_vTaskDelete == 1 )
 
+
 
+    void vTaskDelete( TaskHandle_t xTaskToDelete )
 
+    {
 
+        TCB_t * pxTCB;
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            /* If null is passed in here then it is the calling task that is
 
+             * being deleted. */
 
+            pxTCB = prvGetTCBFromHandle( xTaskToDelete );
 
+
 
+            /* Remove task from the ready/delayed list. */
 
+            if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 
+            {
 
+                taskRESET_READY_PRIORITY( pxTCB->uxPriority );
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            /* Is the task waiting on an event also? */
 
+            if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 
+            {
 
+                ( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            /* Increment the uxTaskNumber also so kernel aware debuggers can
 
+             * detect that the task lists need re-generating.  This is done before
 
+             * portPRE_TASK_DELETE_HOOK() as in the Windows port that macro will
 
+             * not return. */
 
+            uxTaskNumber++;
 
+
 
+            if( pxTCB == pxCurrentTCB )
 
+            {
 
+                /* A task is deleting itself.  This cannot complete within the
 
+                 * task itself, as a context switch to another task is required.
 
+                 * Place the task in the termination list.  The idle task will
 
+                 * check the termination list and free up any memory allocated by
 
+                 * the scheduler for the TCB and stack of the deleted task. */
 
+                vListInsertEnd( &xTasksWaitingTermination, &( pxTCB->xStateListItem ) );
 
+
 
+                /* Increment the ucTasksDeleted variable so the idle task knows
 
+                 * there is a task that has been deleted and that it should therefore
 
+                 * check the xTasksWaitingTermination list. */
 
+                ++uxDeletedTasksWaitingCleanUp;
 
+
 
+                /* Call the delete hook before portPRE_TASK_DELETE_HOOK() as
 
+                 * portPRE_TASK_DELETE_HOOK() does not return in the Win32 port. */
 
+                traceTASK_DELETE( pxTCB );
 
+
 
+                /* The pre-delete hook is primarily for the Windows simulator,
 
+                 * in which Windows specific clean up operations are performed,
 
+                 * after which it is not possible to yield away from this task -
 
+                 * hence xYieldPending is used to latch that a context switch is
 
+                 * required. */
 
+                portPRE_TASK_DELETE_HOOK( pxTCB, &xYieldPending );
 
+            }
 
+            else
 
+            {
 
+                --uxCurrentNumberOfTasks;
 
+                traceTASK_DELETE( pxTCB );
 
+                prvDeleteTCB( pxTCB );
 
+
 
+                /* Reset the next expected unblock time in case it referred to
 
+                 * the task that has just been deleted. */
 
+                prvResetNextTaskUnblockTime();
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        /* Force a reschedule if it is the currently running task that has just
 
+         * been deleted. */
 
+        if( xSchedulerRunning != pdFALSE )
 
+        {
 
+            if( pxTCB == pxCurrentTCB )
 
+            {
 
+                configASSERT( uxSchedulerSuspended == 0 );
 
+                portYIELD_WITHIN_API();
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+    }
 
+
 
+#endif /* INCLUDE_vTaskDelete */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_xTaskDelayUntil == 1 )
 
+
 
+    BaseType_t xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
 
+                                const TickType_t xTimeIncrement )
 
+    {
 
+        TickType_t xTimeToWake;
 
+        BaseType_t xAlreadyYielded, xShouldDelay = pdFALSE;
 
+
 
+        configASSERT( pxPreviousWakeTime );
 
+        configASSERT( ( xTimeIncrement > 0U ) );
 
+        configASSERT( uxSchedulerSuspended == 0 );
 
+
 
+        vTaskSuspendAll();
 
+        {
 
+            /* Minor optimisation.  The tick count cannot change in this
 
+             * block. */
 
+            const TickType_t xConstTickCount = xTickCount;
 
+
 
+            /* Generate the tick time at which the task wants to wake. */
 
+            xTimeToWake = *pxPreviousWakeTime + xTimeIncrement;
 
+
 
+            if( xConstTickCount < *pxPreviousWakeTime )
 
+            {
 
+                /* The tick count has overflowed since this function was
 
+                 * lasted called.  In this case the only time we should ever
 
+                 * actually delay is if the wake time has also  overflowed,
 
+                 * and the wake time is greater than the tick time.  When this
 
+                 * is the case it is as if neither time had overflowed. */
 
+                if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xConstTickCount ) )
 
+                {
 
+                    xShouldDelay = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                /* The tick time has not overflowed.  In this case we will
 
+                 * delay if either the wake time has overflowed, and/or the
 
+                 * tick time is less than the wake time. */
 
+                if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xConstTickCount ) )
 
+                {
 
+                    xShouldDelay = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+
 
+            /* Update the wake time ready for the next call. */
 
+            *pxPreviousWakeTime = xTimeToWake;
 
+
 
+            if( xShouldDelay != pdFALSE )
 
+            {
 
+                traceTASK_DELAY_UNTIL( xTimeToWake );
 
+
 
+                /* prvAddCurrentTaskToDelayedList() needs the block time, not
 
+                 * the time to wake, so subtract the current tick count. */
 
+                prvAddCurrentTaskToDelayedList( xTimeToWake - xConstTickCount, pdFALSE );
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        xAlreadyYielded = xTaskResumeAll();
 
+
 
+        /* Force a reschedule if xTaskResumeAll has not already done so, we may
 
+         * have put ourselves to sleep. */
 
+        if( xAlreadyYielded == pdFALSE )
 
+        {
 
+            portYIELD_WITHIN_API();
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return xShouldDelay;
 
+    }
 
+
 
+#endif /* INCLUDE_xTaskDelayUntil */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_vTaskDelay == 1 )
 
+
 
+    void vTaskDelay( const TickType_t xTicksToDelay )
 
+    {
 
+        BaseType_t xAlreadyYielded = pdFALSE;
 
+
 
+        /* A delay time of zero just forces a reschedule. */
 
+        if( xTicksToDelay > ( TickType_t ) 0U )
 
+        {
 
+            configASSERT( uxSchedulerSuspended == 0 );
 
+            vTaskSuspendAll();
 
+            {
 
+                traceTASK_DELAY();
 
+
 
+                /* A task that is removed from the event list while the
 
+                 * scheduler is suspended will not get placed in the ready
 
+                 * list or removed from the blocked list until the scheduler
 
+                 * is resumed.
 
+                 *
 
+                 * This task cannot be in an event list as it is the currently
 
+                 * executing task. */
 
+                prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
 
+            }
 
+            xAlreadyYielded = xTaskResumeAll();
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        /* Force a reschedule if xTaskResumeAll has not already done so, we may
 
+         * have put ourselves to sleep. */
 
+        if( xAlreadyYielded == pdFALSE )
 
+        {
 
+            portYIELD_WITHIN_API();
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+#endif /* INCLUDE_vTaskDelay */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( INCLUDE_eTaskGetState == 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_xTaskAbortDelay == 1 ) )
 
+
 
+    eTaskState eTaskGetState( TaskHandle_t xTask )
 
+    {
 
+        eTaskState eReturn;
 
+        List_t const * pxStateList, * pxDelayedList, * pxOverflowedDelayedList;
 
+        const TCB_t * const pxTCB = xTask;
 
+
 
+        configASSERT( pxTCB );
 
+
 
+        if( pxTCB == pxCurrentTCB )
 
+        {
 
+            /* The task calling this function is querying its own state. */
 
+            eReturn = eRunning;
 
+        }
 
+        else
 
+        {
 
+            taskENTER_CRITICAL();
 
+            {
 
+                pxStateList = listLIST_ITEM_CONTAINER( &( pxTCB->xStateListItem ) );
 
+                pxDelayedList = pxDelayedTaskList;
 
+                pxOverflowedDelayedList = pxOverflowDelayedTaskList;
 
+            }
 
+            taskEXIT_CRITICAL();
 
+
 
+            if( ( pxStateList == pxDelayedList ) || ( pxStateList == pxOverflowedDelayedList ) )
 
+            {
 
+                /* The task being queried is referenced from one of the Blocked
 
+                 * lists. */
 
+                eReturn = eBlocked;
 
+            }
 
+
 
+            #if ( INCLUDE_vTaskSuspend == 1 )
 
+                else if( pxStateList == &xSuspendedTaskList )
 
+                {
 
+                    /* The task being queried is referenced from the suspended
 
+                     * list.  Is it genuinely suspended or is it blocked
 
+                     * indefinitely? */
 
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL )
 
+                    {
 
+                        #if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+                            {
 
+                                BaseType_t x;
 
+
 
+                                /* The task does not appear on the event list item of
 
+                                 * and of the RTOS objects, but could still be in the
 
+                                 * blocked state if it is waiting on its notification
 
+                                 * rather than waiting on an object.  If not, is
 
+                                 * suspended. */
 
+                                eReturn = eSuspended;
 
+
 
+                                for( x = 0; x < configTASK_NOTIFICATION_ARRAY_ENTRIES; x++ )
 
+                                {
 
+                                    if( pxTCB->ucNotifyState[ x ] == taskWAITING_NOTIFICATION )
 
+                                    {
 
+                                        eReturn = eBlocked;
 
+                                        break;
 
+                                    }
 
+                                }
 
+                            }
 
+                        #else /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
 
+                            {
 
+                                eReturn = eSuspended;
 
+                            }
 
+                        #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
 
+                    }
 
+                    else
 
+                    {
 
+                        eReturn = eBlocked;
 
+                    }
 
+                }
 
+            #endif /* if ( INCLUDE_vTaskSuspend == 1 ) */
 
+
 
+            #if ( INCLUDE_vTaskDelete == 1 )
 
+                else if( ( pxStateList == &xTasksWaitingTermination ) || ( pxStateList == NULL ) )
 
+                {
 
+                    /* The task being queried is referenced from the deleted
 
+                     * tasks list, or it is not referenced from any lists at
 
+                     * all. */
 
+                    eReturn = eDeleted;
 
+                }
 
+            #endif
 
+
 
+            else /*lint !e525 Negative indentation is intended to make use of pre-processor clearer. */
 
+            {
 
+                /* If the task is not in any other state, it must be in the
 
+                 * Ready (including pending ready) state. */
 
+                eReturn = eReady;
 
+            }
 
+        }
 
+
 
+        return eReturn;
 
+    } /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
 
+
 
+#endif /* INCLUDE_eTaskGetState */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_uxTaskPriorityGet == 1 )
 
+
 
+    UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask )
 
+    {
 
+        TCB_t const * pxTCB;
 
+        UBaseType_t uxReturn;
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            /* If null is passed in here then it is the priority of the task
 
+             * that called uxTaskPriorityGet() that is being queried. */
 
+            pxTCB = prvGetTCBFromHandle( xTask );
 
+            uxReturn = pxTCB->uxPriority;
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return uxReturn;
 
+    }
 
+
 
+#endif /* INCLUDE_uxTaskPriorityGet */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_uxTaskPriorityGet == 1 )
 
+
 
+    UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask )
 
+    {
 
+        TCB_t const * pxTCB;
 
+        UBaseType_t uxReturn, uxSavedInterruptState;
 
+
 
+        /* RTOS ports that support interrupt nesting have the concept of a
 
+         * maximum  system call (or maximum API call) interrupt priority.
 
+         * Interrupts that are  above the maximum system call priority are keep
 
+         * permanently enabled, even when the RTOS kernel is in a critical section,
 
+         * but cannot make any calls to FreeRTOS API functions.  If configASSERT()
 
+         * is defined in FreeRTOSConfig.h then
 
+         * portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
 
+         * failure if a FreeRTOS API function is called from an interrupt that has
 
+         * been assigned a priority above the configured maximum system call
 
+         * priority.  Only FreeRTOS functions that end in FromISR can be called
 
+         * from interrupts  that have been assigned a priority at or (logically)
 
+         * below the maximum system call interrupt priority.  FreeRTOS maintains a
 
+         * separate interrupt safe API to ensure interrupt entry is as fast and as
 
+         * simple as possible.  More information (albeit Cortex-M specific) is
 
+         * provided on the following link:
 
+         * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 
+        portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
+
 
+        uxSavedInterruptState = portSET_INTERRUPT_MASK_FROM_ISR();
 
+        {
 
+            /* If null is passed in here then it is the priority of the calling
 
+             * task that is being queried. */
 
+            pxTCB = prvGetTCBFromHandle( xTask );
 
+            uxReturn = pxTCB->uxPriority;
 
+        }
 
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptState );
 
+
 
+        return uxReturn;
 
+    }
 
+
 
+#endif /* INCLUDE_uxTaskPriorityGet */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_vTaskPrioritySet == 1 )
 
+
 
+    void vTaskPrioritySet( TaskHandle_t xTask,
 
+                           UBaseType_t uxNewPriority )
 
+    {
 
+        TCB_t * pxTCB;
 
+        UBaseType_t uxCurrentBasePriority, uxPriorityUsedOnEntry;
 
+        BaseType_t xYieldRequired = pdFALSE;
 
+
 
+        configASSERT( uxNewPriority < configMAX_PRIORITIES );
 
+
 
+        /* Ensure the new priority is valid. */
 
+        if( uxNewPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
 
+        {
 
+            uxNewPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            /* If null is passed in here then it is the priority of the calling
 
+             * task that is being changed. */
 
+            pxTCB = prvGetTCBFromHandle( xTask );
 
+
 
+            traceTASK_PRIORITY_SET( pxTCB, uxNewPriority );
 
+
 
+            #if ( configUSE_MUTEXES == 1 )
 
+                {
 
+                    uxCurrentBasePriority = pxTCB->uxBasePriority;
 
+                }
 
+            #else
 
+                {
 
+                    uxCurrentBasePriority = pxTCB->uxPriority;
 
+                }
 
+            #endif
 
+
 
+            if( uxCurrentBasePriority != uxNewPriority )
 
+            {
 
+                /* The priority change may have readied a task of higher
 
+                 * priority than the calling task. */
 
+                if( uxNewPriority > uxCurrentBasePriority )
 
+                {
 
+                    if( pxTCB != pxCurrentTCB )
 
+                    {
 
+                        /* The priority of a task other than the currently
 
+                         * running task is being raised.  Is the priority being
 
+                         * raised above that of the running task? */
 
+                        if( uxNewPriority >= pxCurrentTCB->uxPriority )
 
+                        {
 
+                            xYieldRequired = pdTRUE;
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                    else
 
+                    {
 
+                        /* The priority of the running task is being raised,
 
+                         * but the running task must already be the highest
 
+                         * priority task able to run so no yield is required. */
 
+                    }
 
+                }
 
+                else if( pxTCB == pxCurrentTCB )
 
+                {
 
+                    /* Setting the priority of the running task down means
 
+                     * there may now be another task of higher priority that
 
+                     * is ready to execute. */
 
+                    xYieldRequired = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    /* Setting the priority of any other task down does not
 
+                     * require a yield as the running task must be above the
 
+                     * new priority of the task being modified. */
 
+                }
 
+
 
+                /* Remember the ready list the task might be referenced from
 
+                 * before its uxPriority member is changed so the
 
+                 * taskRESET_READY_PRIORITY() macro can function correctly. */
 
+                uxPriorityUsedOnEntry = pxTCB->uxPriority;
 
+
 
+                #if ( configUSE_MUTEXES == 1 )
 
+                    {
 
+                        /* Only change the priority being used if the task is not
 
+                         * currently using an inherited priority. */
 
+                        if( pxTCB->uxBasePriority == pxTCB->uxPriority )
 
+                        {
 
+                            pxTCB->uxPriority = uxNewPriority;
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+
 
+                        /* The base priority gets set whatever. */
 
+                        pxTCB->uxBasePriority = uxNewPriority;
 
+                    }
 
+                #else /* if ( configUSE_MUTEXES == 1 ) */
 
+                    {
 
+                        pxTCB->uxPriority = uxNewPriority;
 
+                    }
 
+                #endif /* if ( configUSE_MUTEXES == 1 ) */
 
+
 
+                /* Only reset the event list item value if the value is not
 
+                 * being used for anything else. */
 
+                if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 
+                {
 
+                    listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxNewPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                /* If the task is in the blocked or suspended list we need do
 
+                 * nothing more than change its priority variable. However, if
 
+                 * the task is in a ready list it needs to be removed and placed
 
+                 * in the list appropriate to its new priority. */
 
+                if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
 
+                {
 
+                    /* The task is currently in its ready list - remove before
 
+                     * adding it to its new ready list.  As we are in a critical
 
+                     * section we can do this even if the scheduler is suspended. */
 
+                    if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 
+                    {
 
+                        /* It is known that the task is in its ready list so
 
+                         * there is no need to check again and the port level
 
+                         * reset macro can be called directly. */
 
+                        portRESET_READY_PRIORITY( uxPriorityUsedOnEntry, uxTopReadyPriority );
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+
 
+                    prvAddTaskToReadyList( pxTCB );
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                if( xYieldRequired != pdFALSE )
 
+                {
 
+                    taskYIELD_IF_USING_PREEMPTION();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                /* Remove compiler warning about unused variables when the port
 
+                 * optimised task selection is not being used. */
 
+                ( void ) uxPriorityUsedOnEntry;
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+    }
 
+
 
+#endif /* INCLUDE_vTaskPrioritySet */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_vTaskSuspend == 1 )
 
+
 
+    void vTaskSuspend( TaskHandle_t xTaskToSuspend )
 
+    {
 
+        TCB_t * pxTCB;
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            /* If null is passed in here then it is the running task that is
 
+             * being suspended. */
 
+            pxTCB = prvGetTCBFromHandle( xTaskToSuspend );
 
+
 
+            traceTASK_SUSPEND( pxTCB );
 
+
 
+            /* Remove task from the ready/delayed list and place in the
 
+             * suspended list. */
 
+            if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 
+            {
 
+                taskRESET_READY_PRIORITY( pxTCB->uxPriority );
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            /* Is the task waiting on an event also? */
 
+            if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 
+            {
 
+                ( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            vListInsertEnd( &xSuspendedTaskList, &( pxTCB->xStateListItem ) );
 
+
 
+            #if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+                {
 
+                    BaseType_t x;
 
+
 
+                    for( x = 0; x < configTASK_NOTIFICATION_ARRAY_ENTRIES; x++ )
 
+                    {
 
+                        if( pxTCB->ucNotifyState[ x ] == taskWAITING_NOTIFICATION )
 
+                        {
 
+                            /* The task was blocked to wait for a notification, but is
 
+                             * now suspended, so no notification was received. */
 
+                            pxTCB->ucNotifyState[ x ] = taskNOT_WAITING_NOTIFICATION;
 
+                        }
 
+                    }
 
+                }
 
+            #endif /* if ( configUSE_TASK_NOTIFICATIONS == 1 ) */
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        if( xSchedulerRunning != pdFALSE )
 
+        {
 
+            /* Reset the next expected unblock time in case it referred to the
 
+             * task that is now in the Suspended state. */
 
+            taskENTER_CRITICAL();
 
+            {
 
+                prvResetNextTaskUnblockTime();
 
+            }
 
+            taskEXIT_CRITICAL();
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        if( pxTCB == pxCurrentTCB )
 
+        {
 
+            if( xSchedulerRunning != pdFALSE )
 
+            {
 
+                /* The current task has just been suspended. */
 
+                configASSERT( uxSchedulerSuspended == 0 );
 
+                portYIELD_WITHIN_API();
 
+            }
 
+            else
 
+            {
 
+                /* The scheduler is not running, but the task that was pointed
 
+                 * to by pxCurrentTCB has just been suspended and pxCurrentTCB
 
+                 * must be adjusted to point to a different task. */
 
+                if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == uxCurrentNumberOfTasks ) /*lint !e931 Right has no side effect, just volatile. */
 
+                {
 
+                    /* No other tasks are ready, so set pxCurrentTCB back to
 
+                     * NULL so when the next task is created pxCurrentTCB will
 
+                     * be set to point to it no matter what its relative priority
 
+                     * is. */
 
+                    pxCurrentTCB = NULL;
 
+                }
 
+                else
 
+                {
 
+                    vTaskSwitchContext();
 
+                }
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+#endif /* INCLUDE_vTaskSuspend */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_vTaskSuspend == 1 )
 
+
 
+    static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask )
 
+    {
 
+        BaseType_t xReturn = pdFALSE;
 
+        const TCB_t * const pxTCB = xTask;
 
+
 
+        /* Accesses xPendingReadyList so must be called from a critical
 
+         * section. */
 
+
 
+        /* It does not make sense to check if the calling task is suspended. */
 
+        configASSERT( xTask );
 
+
 
+        /* Is the task being resumed actually in the suspended list? */
 
+        if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xStateListItem ) ) != pdFALSE )
 
+        {
 
+            /* Has the task already been resumed from within an ISR? */
 
+            if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) == pdFALSE )
 
+            {
 
+                /* Is it in the suspended list because it is in the Suspended
 
+                 * state, or because is is blocked with no timeout? */
 
+                if( listIS_CONTAINED_WITHIN( NULL, &( pxTCB->xEventListItem ) ) != pdFALSE ) /*lint !e961.  The cast is only redundant when NULL is used. */
 
+                {
 
+                    xReturn = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return xReturn;
 
+    } /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
 
+
 
+#endif /* INCLUDE_vTaskSuspend */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_vTaskSuspend == 1 )
 
+
 
+    void vTaskResume( TaskHandle_t xTaskToResume )
 
+    {
 
+        TCB_t * const pxTCB = xTaskToResume;
 
+
 
+        /* It does not make sense to resume the calling task. */
 
+        configASSERT( xTaskToResume );
 
+
 
+        /* The parameter cannot be NULL as it is impossible to resume the
 
+         * currently executing task. */
 
+        if( ( pxTCB != pxCurrentTCB ) && ( pxTCB != NULL ) )
 
+        {
 
+            taskENTER_CRITICAL();
 
+            {
 
+                if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
 
+                {
 
+                    traceTASK_RESUME( pxTCB );
 
+
 
+                    /* The ready list can be accessed even if the scheduler is
 
+                     * suspended because this is inside a critical section. */
 
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 
+                    prvAddTaskToReadyList( pxTCB );
 
+
 
+                    /* A higher priority task may have just been resumed. */
 
+                    if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 
+                    {
 
+                        /* This yield may not cause the task just resumed to run,
 
+                         * but will leave the lists in the correct state for the
 
+                         * next yield. */
 
+                        taskYIELD_IF_USING_PREEMPTION();
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            taskEXIT_CRITICAL();
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+#endif /* INCLUDE_vTaskSuspend */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) )
 
+
 
+    BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume )
 
+    {
 
+        BaseType_t xYieldRequired = pdFALSE;
 
+        TCB_t * const pxTCB = xTaskToResume;
 
+        UBaseType_t uxSavedInterruptStatus;
 
+
 
+        configASSERT( xTaskToResume );
 
+
 
+        /* RTOS ports that support interrupt nesting have the concept of a
 
+         * maximum  system call (or maximum API call) interrupt priority.
 
+         * Interrupts that are  above the maximum system call priority are keep
 
+         * permanently enabled, even when the RTOS kernel is in a critical section,
 
+         * but cannot make any calls to FreeRTOS API functions.  If configASSERT()
 
+         * is defined in FreeRTOSConfig.h then
 
+         * portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
 
+         * failure if a FreeRTOS API function is called from an interrupt that has
 
+         * been assigned a priority above the configured maximum system call
 
+         * priority.  Only FreeRTOS functions that end in FromISR can be called
 
+         * from interrupts  that have been assigned a priority at or (logically)
 
+         * below the maximum system call interrupt priority.  FreeRTOS maintains a
 
+         * separate interrupt safe API to ensure interrupt entry is as fast and as
 
+         * simple as possible.  More information (albeit Cortex-M specific) is
 
+         * provided on the following link:
 
+         * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 
+        portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
+
 
+        uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 
+        {
 
+            if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
 
+            {
 
+                traceTASK_RESUME_FROM_ISR( pxTCB );
 
+
 
+                /* Check the ready lists can be accessed. */
 
+                if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 
+                {
 
+                    /* Ready lists can be accessed so move the task from the
 
+                     * suspended list to the ready list directly. */
 
+                    if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 
+                    {
 
+                        xYieldRequired = pdTRUE;
 
+
 
+                        /* Mark that a yield is pending in case the user is not
 
+                         * using the return value to initiate a context switch
 
+                         * from the ISR using portYIELD_FROM_ISR. */
 
+                        xYieldPending = pdTRUE;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+
 
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 
+                    prvAddTaskToReadyList( pxTCB );
 
+                }
 
+                else
 
+                {
 
+                    /* The delayed or ready lists cannot be accessed so the task
 
+                     * is held in the pending ready list until the scheduler is
 
+                     * unsuspended. */
 
+                    vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+        return xYieldRequired;
 
+    }
 
+
 
+#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+void vTaskStartScheduler( void )
 
+{
 
+    BaseType_t xReturn;
 
+
 
+    /* Add the idle task at the lowest priority. */
 
+    #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+        {
 
+            StaticTask_t * pxIdleTaskTCBBuffer = NULL;
 
+            StackType_t * pxIdleTaskStackBuffer = NULL;
 
+            uint32_t ulIdleTaskStackSize;
 
+
 
+            /* The Idle task is created using user provided RAM - obtain the
 
+             * address of the RAM then create the idle task. */
 
+            vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
 
+            xIdleTaskHandle = xTaskCreateStatic( prvIdleTask,
 
+                                                 configIDLE_TASK_NAME,
 
+                                                 ulIdleTaskStackSize,
 
+                                                 ( void * ) NULL,       /*lint !e961.  The cast is not redundant for all compilers. */
 
+                                                 portPRIVILEGE_BIT,     /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
 
+                                                 pxIdleTaskStackBuffer,
 
+                                                 pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
 
+
 
+            if( xIdleTaskHandle != NULL )
 
+            {
 
+                xReturn = pdPASS;
 
+            }
 
+            else
 
+            {
 
+                xReturn = pdFAIL;
 
+            }
 
+        }
 
+    #else /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
 
+        {
 
+            /* The Idle task is being created using dynamically allocated RAM. */
 
+            xReturn = xTaskCreate( prvIdleTask,
 
+                                   configIDLE_TASK_NAME,
 
+                                   configMINIMAL_STACK_SIZE,
 
+                                   ( void * ) NULL,
 
+                                   portPRIVILEGE_BIT,  /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
 
+                                   &xIdleTaskHandle ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
 
+        }
 
+    #endif /* configSUPPORT_STATIC_ALLOCATION */
 
+
 
+    #if ( configUSE_TIMERS == 1 )
 
+        {
 
+            if( xReturn == pdPASS )
 
+            {
 
+                xReturn = xTimerCreateTimerTask();
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+    #endif /* configUSE_TIMERS */
 
+
 
+    if( xReturn == pdPASS )
 
+    {
 
+        /* freertos_tasks_c_additions_init() should only be called if the user
 
+         * definable macro FREERTOS_TASKS_C_ADDITIONS_INIT() is defined, as that is
 
+         * the only macro called by the function. */
 
+        #ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
 
+            {
 
+                freertos_tasks_c_additions_init();
 
+            }
 
+        #endif
 
+
 
+        /* Interrupts are turned off here, to ensure a tick does not occur
 
+         * before or during the call to xPortStartScheduler().  The stacks of
 
+         * the created tasks contain a status word with interrupts switched on
 
+         * so interrupts will automatically get re-enabled when the first task
 
+         * starts to run. */
 
+        portDISABLE_INTERRUPTS();
 
+
 
+        #if ( configUSE_NEWLIB_REENTRANT == 1 )
 
+            {
 
+                /* Switch Newlib's _impure_ptr variable to point to the _reent
 
+                 * structure specific to the task that will run first.
 
+                 * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
 
+                 * for additional information. */
 
+                _impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 
+            }
 
+        #endif /* configUSE_NEWLIB_REENTRANT */
 
+
 
+        xNextTaskUnblockTime = portMAX_DELAY;
 
+        xSchedulerRunning = pdTRUE;
 
+        xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
 
+
 
+        /* If configGENERATE_RUN_TIME_STATS is defined then the following
 
+         * macro must be defined to configure the timer/counter used to generate
 
+         * the run time counter time base.   NOTE:  If configGENERATE_RUN_TIME_STATS
 
+         * is set to 0 and the following line fails to build then ensure you do not
 
+         * have portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() defined in your
 
+         * FreeRTOSConfig.h file. */
 
+        portCONFIGURE_TIMER_FOR_RUN_TIME_STATS();
 
+
 
+        traceTASK_SWITCHED_IN();
 
+
 
+        /* Setting up the timer tick is hardware specific and thus in the
 
+         * portable interface. */
 
+        if( xPortStartScheduler() != pdFALSE )
 
+        {
 
+            /* Should not reach here as if the scheduler is running the
 
+             * function will not return. */
 
+        }
 
+        else
 
+        {
 
+            /* Should only reach here if a task calls xTaskEndScheduler(). */
 
+        }
 
+    }
 
+    else
 
+    {
 
+        /* This line will only be reached if the kernel could not be started,
 
+         * because there was not enough FreeRTOS heap to create the idle task
 
+         * or the timer task. */
 
+        configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
 
+    }
 
+
 
+    /* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
 
+     * meaning xIdleTaskHandle is not used anywhere else. */
 
+    ( void ) xIdleTaskHandle;
 
+
 
+    /* OpenOCD makes use of uxTopUsedPriority for thread debugging. Prevent uxTopUsedPriority
 
+     * from getting optimized out as it is no longer used by the kernel. */
 
+    ( void ) uxTopUsedPriority;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vTaskEndScheduler( void )
 
+{
 
+    /* Stop the scheduler interrupts and call the portable scheduler end
 
+     * routine so the original ISRs can be restored if necessary.  The port
 
+     * layer must ensure interrupts enable  bit is left in the correct state. */
 
+    portDISABLE_INTERRUPTS();
 
+    xSchedulerRunning = pdFALSE;
 
+    vPortEndScheduler();
 
+}
 
+/*----------------------------------------------------------*/
 
+
 
+void vTaskSuspendAll( void )
 
+{
 
+    /* A critical section is not required as the variable is of type
 
+     * BaseType_t.  Please read Richard Barry's reply in the following link to a
 
+     * post in the FreeRTOS support forum before reporting this as a bug! -
 
+     * https://goo.gl/wu4acr */
 
+
 
+    /* portSOFRWARE_BARRIER() is only implemented for emulated/simulated ports that
 
+     * do not otherwise exhibit real time behaviour. */
 
+    portSOFTWARE_BARRIER();
 
+
 
+    /* The scheduler is suspended if uxSchedulerSuspended is non-zero.  An increment
 
+     * is used to allow calls to vTaskSuspendAll() to nest. */
 
+    ++uxSchedulerSuspended;
 
+
 
+    /* Enforces ordering for ports and optimised compilers that may otherwise place
 
+     * the above increment elsewhere. */
 
+    portMEMORY_BARRIER();
 
+}
 
+/*----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TICKLESS_IDLE != 0 )
 
+
 
+    static TickType_t prvGetExpectedIdleTime( void )
 
+    {
 
+        TickType_t xReturn;
 
+        UBaseType_t uxHigherPriorityReadyTasks = pdFALSE;
 
+
 
+        /* uxHigherPriorityReadyTasks takes care of the case where
 
+         * configUSE_PREEMPTION is 0, so there may be tasks above the idle priority
 
+         * task that are in the Ready state, even though the idle task is
 
+         * running. */
 
+        #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
 
+            {
 
+                if( uxTopReadyPriority > tskIDLE_PRIORITY )
 
+                {
 
+                    uxHigherPriorityReadyTasks = pdTRUE;
 
+                }
 
+            }
 
+        #else
 
+            {
 
+                const UBaseType_t uxLeastSignificantBit = ( UBaseType_t ) 0x01;
 
+
 
+                /* When port optimised task selection is used the uxTopReadyPriority
 
+                 * variable is used as a bit map.  If bits other than the least
 
+                 * significant bit are set then there are tasks that have a priority
 
+                 * above the idle priority that are in the Ready state.  This takes
 
+                 * care of the case where the co-operative scheduler is in use. */
 
+                if( uxTopReadyPriority > uxLeastSignificantBit )
 
+                {
 
+                    uxHigherPriorityReadyTasks = pdTRUE;
 
+                }
 
+            }
 
+        #endif /* if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 ) */
 
+
 
+        if( pxCurrentTCB->uxPriority > tskIDLE_PRIORITY )
 
+        {
 
+            xReturn = 0;
 
+        }
 
+        else if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > 1 )
 
+        {
 
+            /* There are other idle priority tasks in the ready state.  If
 
+             * time slicing is used then the very next tick interrupt must be
 
+             * processed. */
 
+            xReturn = 0;
 
+        }
 
+        else if( uxHigherPriorityReadyTasks != pdFALSE )
 
+        {
 
+            /* There are tasks in the Ready state that have a priority above the
 
+             * idle priority.  This path can only be reached if
 
+             * configUSE_PREEMPTION is 0. */
 
+            xReturn = 0;
 
+        }
 
+        else
 
+        {
 
+            xReturn = xNextTaskUnblockTime - xTickCount;
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_TICKLESS_IDLE */
 
+/*----------------------------------------------------------*/
 
+
 
+BaseType_t xTaskResumeAll( void )
 
+{
 
+    TCB_t * pxTCB = NULL;
 
+    BaseType_t xAlreadyYielded = pdFALSE;
 
+
 
+    /* If uxSchedulerSuspended is zero then this function does not match a
 
+     * previous call to vTaskSuspendAll(). */
 
+    configASSERT( uxSchedulerSuspended );
 
+
 
+    /* It is possible that an ISR caused a task to be removed from an event
 
+     * list while the scheduler was suspended.  If this was the case then the
 
+     * removed task will have been added to the xPendingReadyList.  Once the
 
+     * scheduler has been resumed it is safe to move all the pending ready
 
+     * tasks from this list into their appropriate ready list. */
 
+    taskENTER_CRITICAL();
 
+    {
 
+        --uxSchedulerSuspended;
 
+
 
+        if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 
+        {
 
+            if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
 
+            {
 
+                /* Move any readied tasks from the pending list into the
 
+                 * appropriate ready list. */
 
+                while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 
+                {
 
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+                    listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
 
+                    portMEMORY_BARRIER();
 
+                    listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
 
+                    prvAddTaskToReadyList( pxTCB );
 
+
 
+                    /* If the moved task has a priority higher than or equal to
 
+                     * the current task then a yield must be performed. */
 
+                    if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 
+                    {
 
+                        xYieldPending = pdTRUE;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+
 
+                if( pxTCB != NULL )
 
+                {
 
+                    /* A task was unblocked while the scheduler was suspended,
 
+                     * which may have prevented the next unblock time from being
 
+                     * re-calculated, in which case re-calculate it now.  Mainly
 
+                     * important for low power tickless implementations, where
 
+                     * this can prevent an unnecessary exit from low power
 
+                     * state. */
 
+                    prvResetNextTaskUnblockTime();
 
+                }
 
+
 
+                /* If any ticks occurred while the scheduler was suspended then
 
+                 * they should be processed now.  This ensures the tick count does
 
+                 * not  slip, and that any delayed tasks are resumed at the correct
 
+                 * time. */
 
+                {
 
+                    TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
 
+
 
+                    if( xPendedCounts > ( TickType_t ) 0U )
 
+                    {
 
+                        do
 
+                        {
 
+                            if( xTaskIncrementTick() != pdFALSE )
 
+                            {
 
+                                xYieldPending = pdTRUE;
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+
 
+                            --xPendedCounts;
 
+                        } while( xPendedCounts > ( TickType_t ) 0U );
 
+
 
+                        xPendedTicks = 0;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+
 
+                if( xYieldPending != pdFALSE )
 
+                {
 
+                    #if ( configUSE_PREEMPTION != 0 )
 
+                        {
 
+                            xAlreadyYielded = pdTRUE;
 
+                        }
 
+                    #endif
 
+                    taskYIELD_IF_USING_PREEMPTION();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+    taskEXIT_CRITICAL();
 
+
 
+    return xAlreadyYielded;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+TickType_t xTaskGetTickCount( void )
 
+{
 
+    TickType_t xTicks;
 
+
 
+    /* Critical section required if running on a 16 bit processor. */
 
+    portTICK_TYPE_ENTER_CRITICAL();
 
+    {
 
+        xTicks = xTickCount;
 
+    }
 
+    portTICK_TYPE_EXIT_CRITICAL();
 
+
 
+    return xTicks;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+TickType_t xTaskGetTickCountFromISR( void )
 
+{
 
+    TickType_t xReturn;
 
+    UBaseType_t uxSavedInterruptStatus;
 
+
 
+    /* RTOS ports that support interrupt nesting have the concept of a maximum
 
+     * system call (or maximum API call) interrupt priority.  Interrupts that are
 
+     * above the maximum system call priority are kept permanently enabled, even
 
+     * when the RTOS kernel is in a critical section, but cannot make any calls to
 
+     * FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
 
+     * then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
 
+     * failure if a FreeRTOS API function is called from an interrupt that has been
 
+     * assigned a priority above the configured maximum system call priority.
 
+     * Only FreeRTOS functions that end in FromISR can be called from interrupts
 
+     * that have been assigned a priority at or (logically) below the maximum
 
+     * system call  interrupt priority.  FreeRTOS maintains a separate interrupt
 
+     * safe API to ensure interrupt entry is as fast and as simple as possible.
 
+     * More information (albeit Cortex-M specific) is provided on the following
 
+     * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 
+    portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
+
 
+    uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
 
+    {
 
+        xReturn = xTickCount;
 
+    }
 
+    portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+UBaseType_t uxTaskGetNumberOfTasks( void )
 
+{
 
+    /* A critical section is not required because the variables are of type
 
+     * BaseType_t. */
 
+    return uxCurrentNumberOfTasks;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+char * pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+{
 
+    TCB_t * pxTCB;
 
+
 
+    /* If null is passed in here then the name of the calling task is being
 
+     * queried. */
 
+    pxTCB = prvGetTCBFromHandle( xTaskToQuery );
 
+    configASSERT( pxTCB );
 
+    return &( pxTCB->pcTaskName[ 0 ] );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_xTaskGetHandle == 1 )
 
+
 
+    static TCB_t * prvSearchForNameWithinSingleList( List_t * pxList,
 
+                                                     const char pcNameToQuery[] )
 
+    {
 
+        TCB_t * pxNextTCB, * pxFirstTCB, * pxReturn = NULL;
 
+        UBaseType_t x;
 
+        char cNextChar;
 
+        BaseType_t xBreakLoop;
 
+
 
+        /* This function is called with the scheduler suspended. */
 
+
 
+        if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
 
+        {
 
+            listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+
 
+            do
 
+            {
 
+                listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+
 
+                /* Check each character in the name looking for a match or
 
+                 * mismatch. */
 
+                xBreakLoop = pdFALSE;
 
+
 
+                for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 
+                {
 
+                    cNextChar = pxNextTCB->pcTaskName[ x ];
 
+
 
+                    if( cNextChar != pcNameToQuery[ x ] )
 
+                    {
 
+                        /* Characters didn't match. */
 
+                        xBreakLoop = pdTRUE;
 
+                    }
 
+                    else if( cNextChar == ( char ) 0x00 )
 
+                    {
 
+                        /* Both strings terminated, a match must have been
 
+                         * found. */
 
+                        pxReturn = pxNextTCB;
 
+                        xBreakLoop = pdTRUE;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+
 
+                    if( xBreakLoop != pdFALSE )
 
+                    {
 
+                        break;
 
+                    }
 
+                }
 
+
 
+                if( pxReturn != NULL )
 
+                {
 
+                    /* The handle has been found. */
 
+                    break;
 
+                }
 
+            } while( pxNextTCB != pxFirstTCB );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return pxReturn;
 
+    }
 
+
 
+#endif /* INCLUDE_xTaskGetHandle */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_xTaskGetHandle == 1 )
 
+
 
+    TaskHandle_t xTaskGetHandle( const char * pcNameToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+    {
 
+        UBaseType_t uxQueue = configMAX_PRIORITIES;
 
+        TCB_t * pxTCB;
 
+
 
+        /* Task names will be truncated to configMAX_TASK_NAME_LEN - 1 bytes. */
 
+        configASSERT( strlen( pcNameToQuery ) < configMAX_TASK_NAME_LEN );
 
+
 
+        vTaskSuspendAll();
 
+        {
 
+            /* Search the ready lists. */
 
+            do
 
+            {
 
+                uxQueue--;
 
+                pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) &( pxReadyTasksLists[ uxQueue ] ), pcNameToQuery );
 
+
 
+                if( pxTCB != NULL )
 
+                {
 
+                    /* Found the handle. */
 
+                    break;
 
+                }
 
+            } while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+
 
+            /* Search the delayed lists. */
 
+            if( pxTCB == NULL )
 
+            {
 
+                pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxDelayedTaskList, pcNameToQuery );
 
+            }
 
+
 
+            if( pxTCB == NULL )
 
+            {
 
+                pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxOverflowDelayedTaskList, pcNameToQuery );
 
+            }
 
+
 
+            #if ( INCLUDE_vTaskSuspend == 1 )
 
+                {
 
+                    if( pxTCB == NULL )
 
+                    {
 
+                        /* Search the suspended list. */
 
+                        pxTCB = prvSearchForNameWithinSingleList( &xSuspendedTaskList, pcNameToQuery );
 
+                    }
 
+                }
 
+            #endif
 
+
 
+            #if ( INCLUDE_vTaskDelete == 1 )
 
+                {
 
+                    if( pxTCB == NULL )
 
+                    {
 
+                        /* Search the deleted list. */
 
+                        pxTCB = prvSearchForNameWithinSingleList( &xTasksWaitingTermination, pcNameToQuery );
 
+                    }
 
+                }
 
+            #endif
 
+        }
 
+        ( void ) xTaskResumeAll();
 
+
 
+        return pxTCB;
 
+    }
 
+
 
+#endif /* INCLUDE_xTaskGetHandle */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
 
+                                      const UBaseType_t uxArraySize,
 
+                                      uint32_t * const pulTotalRunTime )
 
+    {
 
+        UBaseType_t uxTask = 0, uxQueue = configMAX_PRIORITIES;
 
+
 
+        vTaskSuspendAll();
 
+        {
 
+            /* Is there a space in the array for each task in the system? */
 
+            if( uxArraySize >= uxCurrentNumberOfTasks )
 
+            {
 
+                /* Fill in an TaskStatus_t structure with information on each
 
+                 * task in the Ready state. */
 
+                do
 
+                {
 
+                    uxQueue--;
 
+                    uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &( pxReadyTasksLists[ uxQueue ] ), eReady );
 
+                } while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+
 
+                /* Fill in an TaskStatus_t structure with information on each
 
+                 * task in the Blocked state. */
 
+                uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxDelayedTaskList, eBlocked );
 
+                uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxOverflowDelayedTaskList, eBlocked );
 
+
 
+                #if ( INCLUDE_vTaskDelete == 1 )
 
+                    {
 
+                        /* Fill in an TaskStatus_t structure with information on
 
+                         * each task that has been deleted but not yet cleaned up. */
 
+                        uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xTasksWaitingTermination, eDeleted );
 
+                    }
 
+                #endif
 
+
 
+                #if ( INCLUDE_vTaskSuspend == 1 )
 
+                    {
 
+                        /* Fill in an TaskStatus_t structure with information on
 
+                         * each task in the Suspended state. */
 
+                        uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xSuspendedTaskList, eSuspended );
 
+                    }
 
+                #endif
 
+
 
+                #if ( configGENERATE_RUN_TIME_STATS == 1 )
 
+                    {
 
+                        if( pulTotalRunTime != NULL )
 
+                        {
 
+                            #ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
 
+                                portALT_GET_RUN_TIME_COUNTER_VALUE( ( *pulTotalRunTime ) );
 
+                            #else
 
+                                *pulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
 
+                            #endif
 
+                        }
 
+                    }
 
+                #else /* if ( configGENERATE_RUN_TIME_STATS == 1 ) */
 
+                    {
 
+                        if( pulTotalRunTime != NULL )
 
+                        {
 
+                            *pulTotalRunTime = 0;
 
+                        }
 
+                    }
 
+                #endif /* if ( configGENERATE_RUN_TIME_STATS == 1 ) */
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        ( void ) xTaskResumeAll();
 
+
 
+        return uxTask;
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
 
+
 
+    TaskHandle_t xTaskGetIdleTaskHandle( void )
 
+    {
 
+        /* If xTaskGetIdleTaskHandle() is called before the scheduler has been
 
+         * started, then xIdleTaskHandle will be NULL. */
 
+        configASSERT( ( xIdleTaskHandle != NULL ) );
 
+        return xIdleTaskHandle;
 
+    }
 
+
 
+#endif /* INCLUDE_xTaskGetIdleTaskHandle */
 
+/*----------------------------------------------------------*/
 
+
 
+/* This conditional compilation should use inequality to 0, not equality to 1.
 
+ * This is to ensure vTaskStepTick() is available when user defined low power mode
 
+ * implementations require configUSE_TICKLESS_IDLE to be set to a value other than
 
+ * 1. */
 
+#if ( configUSE_TICKLESS_IDLE != 0 )
 
+
 
+    void vTaskStepTick( const TickType_t xTicksToJump )
 
+    {
 
+        /* Correct the tick count value after a period during which the tick
 
+         * was suppressed.  Note this does *not* call the tick hook function for
 
+         * each stepped tick. */
 
+        configASSERT( ( xTickCount + xTicksToJump ) <= xNextTaskUnblockTime );
 
+        xTickCount += xTicksToJump;
 
+        traceINCREASE_TICK_COUNT( xTicksToJump );
 
+    }
 
+
 
+#endif /* configUSE_TICKLESS_IDLE */
 
+/*----------------------------------------------------------*/
 
+
 
+BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp )
 
+{
 
+    BaseType_t xYieldOccurred;
 
+
 
+    /* Must not be called with the scheduler suspended as the implementation
 
+     * relies on xPendedTicks being wound down to 0 in xTaskResumeAll(). */
 
+    configASSERT( uxSchedulerSuspended == 0 );
 
+
 
+    /* Use xPendedTicks to mimic xTicksToCatchUp number of ticks occurring when
 
+     * the scheduler is suspended so the ticks are executed in xTaskResumeAll(). */
 
+    vTaskSuspendAll();
 
+    xPendedTicks += xTicksToCatchUp;
 
+    xYieldOccurred = xTaskResumeAll();
 
+
 
+    return xYieldOccurred;
 
+}
 
+/*----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_xTaskAbortDelay == 1 )
 
+
 
+    BaseType_t xTaskAbortDelay( TaskHandle_t xTask )
 
+    {
 
+        TCB_t * pxTCB = xTask;
 
+        BaseType_t xReturn;
 
+
 
+        configASSERT( pxTCB );
 
+
 
+        vTaskSuspendAll();
 
+        {
 
+            /* A task can only be prematurely removed from the Blocked state if
 
+             * it is actually in the Blocked state. */
 
+            if( eTaskGetState( xTask ) == eBlocked )
 
+            {
 
+                xReturn = pdPASS;
 
+
 
+                /* Remove the reference to the task from the blocked list.  An
 
+                 * interrupt won't touch the xStateListItem because the
 
+                 * scheduler is suspended. */
 
+                ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 
+
 
+                /* Is the task waiting on an event also?  If so remove it from
 
+                 * the event list too.  Interrupts can touch the event list item,
 
+                 * even though the scheduler is suspended, so a critical section
 
+                 * is used. */
 
+                taskENTER_CRITICAL();
 
+                {
 
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 
+                    {
 
+                        ( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 
+
 
+                        /* This lets the task know it was forcibly removed from the
 
+                         * blocked state so it should not re-evaluate its block time and
 
+                         * then block again. */
 
+                        pxTCB->ucDelayAborted = pdTRUE;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                taskEXIT_CRITICAL();
 
+
 
+                /* Place the unblocked task into the appropriate ready list. */
 
+                prvAddTaskToReadyList( pxTCB );
 
+
 
+                /* A task being unblocked cannot cause an immediate context
 
+                 * switch if preemption is turned off. */
 
+                #if ( configUSE_PREEMPTION == 1 )
 
+                    {
 
+                        /* Preemption is on, but a context switch should only be
 
+                         * performed if the unblocked task has a priority that is
 
+                         * higher than the currently executing task. */
 
+                        if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 
+                        {
 
+                            /* Pend the yield to be performed when the scheduler
 
+                             * is unsuspended. */
 
+                            xYieldPending = pdTRUE;
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                #endif /* configUSE_PREEMPTION */
 
+            }
 
+            else
 
+            {
 
+                xReturn = pdFAIL;
 
+            }
 
+        }
 
+        ( void ) xTaskResumeAll();
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* INCLUDE_xTaskAbortDelay */
 
+/*----------------------------------------------------------*/
 
+
 
+BaseType_t xTaskIncrementTick( void )
 
+{
 
+    TCB_t * pxTCB;
 
+    TickType_t xItemValue;
 
+    BaseType_t xSwitchRequired = pdFALSE;
 
+
 
+    /* Called by the portable layer each time a tick interrupt occurs.
 
+     * Increments the tick then checks to see if the new tick value will cause any
 
+     * tasks to be unblocked. */
 
+    traceTASK_INCREMENT_TICK( xTickCount );
 
+
 
+    if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 
+    {
 
+        /* Minor optimisation.  The tick count cannot change in this
 
+         * block. */
 
+        const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
 
+
 
+        /* Increment the RTOS tick, switching the delayed and overflowed
 
+         * delayed lists if it wraps to 0. */
 
+        xTickCount = xConstTickCount;
 
+
 
+        if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
 
+        {
 
+            taskSWITCH_DELAYED_LISTS();
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        /* See if this tick has made a timeout expire.  Tasks are stored in
 
+         * the  queue in the order of their wake time - meaning once one task
 
+         * has been found whose block time has not expired there is no need to
 
+         * look any further down the list. */
 
+        if( xConstTickCount >= xNextTaskUnblockTime )
 
+        {
 
+            for( ; ; )
 
+            {
 
+                if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 
+                {
 
+                    /* The delayed list is empty.  Set xNextTaskUnblockTime
 
+                     * to the maximum possible value so it is extremely
 
+                     * unlikely that the
 
+                     * if( xTickCount >= xNextTaskUnblockTime ) test will pass
 
+                     * next time through. */
 
+                    xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+                    break;
 
+                }
 
+                else
 
+                {
 
+                    /* The delayed list is not empty, get the value of the
 
+                     * item at the head of the delayed list.  This is the time
 
+                     * at which the task at the head of the delayed list must
 
+                     * be removed from the Blocked state. */
 
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+                    xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
 
+
 
+                    if( xConstTickCount < xItemValue )
 
+                    {
 
+                        /* It is not time to unblock this item yet, but the
 
+                         * item value is the time at which the task at the head
 
+                         * of the blocked list must be removed from the Blocked
 
+                         * state -  so record the item value in
 
+                         * xNextTaskUnblockTime. */
 
+                        xNextTaskUnblockTime = xItemValue;
 
+                        break; /*lint !e9011 Code structure here is deemed easier to understand with multiple breaks. */
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+
 
+                    /* It is time to remove the item from the Blocked state. */
 
+                    listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
 
+
 
+                    /* Is the task waiting on an event also?  If so remove
 
+                     * it from the event list. */
 
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 
+                    {
 
+                        listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+
 
+                    /* Place the unblocked task into the appropriate ready
 
+                     * list. */
 
+                    prvAddTaskToReadyList( pxTCB );
 
+
 
+                    /* A task being unblocked cannot cause an immediate
 
+                     * context switch if preemption is turned off. */
 
+                    #if ( configUSE_PREEMPTION == 1 )
 
+                        {
 
+                            /* Preemption is on, but a context switch should
 
+                             * only be performed if the unblocked task has a
 
+                             * priority that is equal to or higher than the
 
+                             * currently executing task. */
 
+                            if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 
+                            {
 
+                                xSwitchRequired = pdTRUE;
 
+                            }
 
+                            else
 
+                            {
 
+                                mtCOVERAGE_TEST_MARKER();
 
+                            }
 
+                        }
 
+                    #endif /* configUSE_PREEMPTION */
 
+                }
 
+            }
 
+        }
 
+
 
+        /* Tasks of equal priority to the currently running task will share
 
+         * processing time (time slice) if preemption is on, and the application
 
+         * writer has not explicitly turned time slicing off. */
 
+        #if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
 
+            {
 
+                if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
 
+                {
 
+                    xSwitchRequired = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        #endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) ) */
 
+
 
+        #if ( configUSE_TICK_HOOK == 1 )
 
+            {
 
+                /* Guard against the tick hook being called when the pended tick
 
+                 * count is being unwound (when the scheduler is being unlocked). */
 
+                if( xPendedTicks == ( TickType_t ) 0 )
 
+                {
 
+                    vApplicationTickHook();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        #endif /* configUSE_TICK_HOOK */
 
+
 
+        #if ( configUSE_PREEMPTION == 1 )
 
+            {
 
+                if( xYieldPending != pdFALSE )
 
+                {
 
+                    xSwitchRequired = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        #endif /* configUSE_PREEMPTION */
 
+    }
 
+    else
 
+    {
 
+        ++xPendedTicks;
 
+
 
+        /* The tick hook gets called at regular intervals, even if the
 
+         * scheduler is locked. */
 
+        #if ( configUSE_TICK_HOOK == 1 )
 
+            {
 
+                vApplicationTickHook();
 
+            }
 
+        #endif
 
+    }
 
+
 
+    return xSwitchRequired;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
+
 
+    void vTaskSetApplicationTaskTag( TaskHandle_t xTask,
 
+                                     TaskHookFunction_t pxHookFunction )
 
+    {
 
+        TCB_t * xTCB;
 
+
 
+        /* If xTask is NULL then it is the task hook of the calling task that is
 
+         * getting set. */
 
+        if( xTask == NULL )
 
+        {
 
+            xTCB = ( TCB_t * ) pxCurrentTCB;
 
+        }
 
+        else
 
+        {
 
+            xTCB = xTask;
 
+        }
 
+
 
+        /* Save the hook function in the TCB.  A critical section is required as
 
+         * the value can be accessed from an interrupt. */
 
+        taskENTER_CRITICAL();
 
+        {
 
+            xTCB->pxTaskTag = pxHookFunction;
 
+        }
 
+        taskEXIT_CRITICAL();
 
+    }
 
+
 
+#endif /* configUSE_APPLICATION_TASK_TAG */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
+
 
+    TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask )
 
+    {
 
+        TCB_t * pxTCB;
 
+        TaskHookFunction_t xReturn;
 
+
 
+        /* If xTask is NULL then set the calling task's hook. */
 
+        pxTCB = prvGetTCBFromHandle( xTask );
 
+
 
+        /* Save the hook function in the TCB.  A critical section is required as
 
+         * the value can be accessed from an interrupt. */
 
+        taskENTER_CRITICAL();
 
+        {
 
+            xReturn = pxTCB->pxTaskTag;
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_APPLICATION_TASK_TAG */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
+
 
+    TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask )
 
+    {
 
+        TCB_t * pxTCB;
 
+        TaskHookFunction_t xReturn;
 
+        UBaseType_t uxSavedInterruptStatus;
 
+
 
+        /* If xTask is NULL then set the calling task's hook. */
 
+        pxTCB = prvGetTCBFromHandle( xTask );
 
+
 
+        /* Save the hook function in the TCB.  A critical section is required as
 
+         * the value can be accessed from an interrupt. */
 
+        uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 
+        {
 
+            xReturn = pxTCB->pxTaskTag;
 
+        }
 
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_APPLICATION_TASK_TAG */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
+
 
+    BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask,
 
+                                             void * pvParameter )
 
+    {
 
+        TCB_t * xTCB;
 
+        BaseType_t xReturn;
 
+
 
+        /* If xTask is NULL then we are calling our own task hook. */
 
+        if( xTask == NULL )
 
+        {
 
+            xTCB = pxCurrentTCB;
 
+        }
 
+        else
 
+        {
 
+            xTCB = xTask;
 
+        }
 
+
 
+        if( xTCB->pxTaskTag != NULL )
 
+        {
 
+            xReturn = xTCB->pxTaskTag( pvParameter );
 
+        }
 
+        else
 
+        {
 
+            xReturn = pdFAIL;
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_APPLICATION_TASK_TAG */
 
+/*-----------------------------------------------------------*/
 
+
 
+void vTaskSwitchContext( void )
 
+{
 
+    if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
 
+    {
 
+        /* The scheduler is currently suspended - do not allow a context
 
+         * switch. */
 
+        xYieldPending = pdTRUE;
 
+    }
 
+    else
 
+    {
 
+        xYieldPending = pdFALSE;
 
+        traceTASK_SWITCHED_OUT();
 
+
 
+        #if ( configGENERATE_RUN_TIME_STATS == 1 )
 
+            {
 
+                #ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
 
+                    portALT_GET_RUN_TIME_COUNTER_VALUE( ulTotalRunTime );
 
+                #else
 
+                    ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
 
+                #endif
 
+
 
+                /* Add the amount of time the task has been running to the
 
+                 * accumulated time so far.  The time the task started running was
 
+                 * stored in ulTaskSwitchedInTime.  Note that there is no overflow
 
+                 * protection here so count values are only valid until the timer
 
+                 * overflows.  The guard against negative values is to protect
 
+                 * against suspect run time stat counter implementations - which
 
+                 * are provided by the application, not the kernel. */
 
+                if( ulTotalRunTime > ulTaskSwitchedInTime )
 
+                {
 
+                    pxCurrentTCB->ulRunTimeCounter += ( ulTotalRunTime - ulTaskSwitchedInTime );
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                ulTaskSwitchedInTime = ulTotalRunTime;
 
+            }
 
+        #endif /* configGENERATE_RUN_TIME_STATS */
 
+
 
+        /* Check for stack overflow, if configured. */
 
+        taskCHECK_FOR_STACK_OVERFLOW();
 
+
 
+        /* Before the currently running task is switched out, save its errno. */
 
+        #if ( configUSE_POSIX_ERRNO == 1 )
 
+            {
 
+                pxCurrentTCB->iTaskErrno = FreeRTOS_errno;
 
+            }
 
+        #endif
 
+
 
+        /* Select a new task to run using either the generic C or port
 
+         * optimised asm code. */
 
+        taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+        traceTASK_SWITCHED_IN();
 
+
 
+        /* After the new task is switched in, update the global errno. */
 
+        #if ( configUSE_POSIX_ERRNO == 1 )
 
+            {
 
+                FreeRTOS_errno = pxCurrentTCB->iTaskErrno;
 
+            }
 
+        #endif
 
+
 
+        #if ( configUSE_NEWLIB_REENTRANT == 1 )
 
+            {
 
+                /* Switch Newlib's _impure_ptr variable to point to the _reent
 
+                 * structure specific to this task.
 
+                 * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
 
+                 * for additional information. */
 
+                _impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 
+            }
 
+        #endif /* configUSE_NEWLIB_REENTRANT */
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vTaskPlaceOnEventList( List_t * const pxEventList,
 
+                            const TickType_t xTicksToWait )
 
+{
 
+    configASSERT( pxEventList );
 
+
 
+    /* THIS FUNCTION MUST BE CALLED WITH EITHER INTERRUPTS DISABLED OR THE
 
+     * SCHEDULER SUSPENDED AND THE QUEUE BEING ACCESSED LOCKED. */
 
+
 
+    /* Place the event list item of the TCB in the appropriate event list.
 
+     * This is placed in the list in priority order so the highest priority task
 
+     * is the first to be woken by the event.
 
+     *
 
+     * Note: Lists are sorted in ascending order by ListItem_t.xItemValue.
 
+     * Normally, the xItemValue of a TCB's ListItem_t members is:
 
+     *      xItemValue = ( configMAX_PRIORITIES - uxPriority )
 
+     * Therefore, the event list is sorted in descending priority order.
 
+     *
 
+     * The queue that contains the event list is locked, preventing
 
+     * simultaneous access from interrupts. */
 
+    vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 
+
 
+    prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vTaskPlaceOnUnorderedEventList( List_t * pxEventList,
 
+                                     const TickType_t xItemValue,
 
+                                     const TickType_t xTicksToWait )
 
+{
 
+    configASSERT( pxEventList );
 
+
 
+    /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
 
+     * the event groups implementation. */
 
+    configASSERT( uxSchedulerSuspended != 0 );
 
+
 
+    /* Store the item value in the event list item.  It is safe to access the
 
+     * event list item here as interrupts won't access the event list item of a
 
+     * task that is not in the Blocked state. */
 
+    listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
 
+
 
+    /* Place the event list item of the TCB at the end of the appropriate event
 
+     * list.  It is safe to access the event list here because it is part of an
 
+     * event group implementation - and interrupts don't access event groups
 
+     * directly (instead they access them indirectly by pending function calls to
 
+     * the task level). */
 
+    listINSERT_END( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 
+
 
+    prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TIMERS == 1 )
 
+
 
+    void vTaskPlaceOnEventListRestricted( List_t * const pxEventList,
 
+                                          TickType_t xTicksToWait,
 
+                                          const BaseType_t xWaitIndefinitely )
 
+    {
 
+        configASSERT( pxEventList );
 
+
 
+        /* This function should not be called by application code hence the
 
+         * 'Restricted' in its name.  It is not part of the public API.  It is
 
+         * designed for use by kernel code, and has special calling requirements -
 
+         * it should be called with the scheduler suspended. */
 
+
 
+
 
+        /* Place the event list item of the TCB in the appropriate event list.
 
+         * In this case it is assume that this is the only task that is going to
 
+         * be waiting on this event list, so the faster vListInsertEnd() function
 
+         * can be used in place of vListInsert. */
 
+        listINSERT_END( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 
+
 
+        /* If the task should block indefinitely then set the block time to a
 
+         * value that will be recognised as an indefinite delay inside the
 
+         * prvAddCurrentTaskToDelayedList() function. */
 
+        if( xWaitIndefinitely != pdFALSE )
 
+        {
 
+            xTicksToWait = portMAX_DELAY;
 
+        }
 
+
 
+        traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
 
+        prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
 
+    }
 
+
 
+#endif /* configUSE_TIMERS */
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
 
+{
 
+    TCB_t * pxUnblockedTCB;
 
+    BaseType_t xReturn;
 
+
 
+    /* THIS FUNCTION MUST BE CALLED FROM A CRITICAL SECTION.  It can also be
 
+     * called from a critical section within an ISR. */
 
+
 
+    /* The event list is sorted in priority order, so the first in the list can
 
+     * be removed as it is known to be the highest priority.  Remove the TCB from
 
+     * the delayed list, and add it to the ready list.
 
+     *
 
+     * If an event is for a queue that is locked then this function will never
 
+     * get called - the lock count on the queue will get modified instead.  This
 
+     * means exclusive access to the event list is guaranteed here.
 
+     *
 
+     * This function assumes that a check has already been made to ensure that
 
+     * pxEventList is not empty. */
 
+    pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+    configASSERT( pxUnblockedTCB );
 
+    listREMOVE_ITEM( &( pxUnblockedTCB->xEventListItem ) );
 
+
 
+    if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 
+    {
 
+        listREMOVE_ITEM( &( pxUnblockedTCB->xStateListItem ) );
 
+        prvAddTaskToReadyList( pxUnblockedTCB );
 
+
 
+        #if ( configUSE_TICKLESS_IDLE != 0 )
 
+            {
 
+                /* If a task is blocked on a kernel object then xNextTaskUnblockTime
 
+                 * might be set to the blocked task's time out time.  If the task is
 
+                 * unblocked for a reason other than a timeout xNextTaskUnblockTime is
 
+                 * normally left unchanged, because it is automatically reset to a new
 
+                 * value when the tick count equals xNextTaskUnblockTime.  However if
 
+                 * tickless idling is used it might be more important to enter sleep mode
 
+                 * at the earliest possible time - so reset xNextTaskUnblockTime here to
 
+                 * ensure it is updated at the earliest possible time. */
 
+                prvResetNextTaskUnblockTime();
 
+            }
 
+        #endif
 
+    }
 
+    else
 
+    {
 
+        /* The delayed and ready lists cannot be accessed, so hold this task
 
+         * pending until the scheduler is resumed. */
 
+        listINSERT_END( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
 
+    }
 
+
 
+    if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
 
+    {
 
+        /* Return true if the task removed from the event list has a higher
 
+         * priority than the calling task.  This allows the calling task to know if
 
+         * it should force a context switch now. */
 
+        xReturn = pdTRUE;
 
+
 
+        /* Mark that a yield is pending in case the user is not using the
 
+         * "xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
 
+        xYieldPending = pdTRUE;
 
+    }
 
+    else
 
+    {
 
+        xReturn = pdFALSE;
 
+    }
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem,
 
+                                        const TickType_t xItemValue )
 
+{
 
+    TCB_t * pxUnblockedTCB;
 
+
 
+    /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
 
+     * the event flags implementation. */
 
+    configASSERT( uxSchedulerSuspended != pdFALSE );
 
+
 
+    /* Store the new item value in the event list. */
 
+    listSET_LIST_ITEM_VALUE( pxEventListItem, xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
 
+
 
+    /* Remove the event list form the event flag.  Interrupts do not access
 
+     * event flags. */
 
+    pxUnblockedTCB = listGET_LIST_ITEM_OWNER( pxEventListItem ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+    configASSERT( pxUnblockedTCB );
 
+    listREMOVE_ITEM( pxEventListItem );
 
+
 
+    #if ( configUSE_TICKLESS_IDLE != 0 )
 
+        {
 
+            /* If a task is blocked on a kernel object then xNextTaskUnblockTime
 
+             * might be set to the blocked task's time out time.  If the task is
 
+             * unblocked for a reason other than a timeout xNextTaskUnblockTime is
 
+             * normally left unchanged, because it is automatically reset to a new
 
+             * value when the tick count equals xNextTaskUnblockTime.  However if
 
+             * tickless idling is used it might be more important to enter sleep mode
 
+             * at the earliest possible time - so reset xNextTaskUnblockTime here to
 
+             * ensure it is updated at the earliest possible time. */
 
+            prvResetNextTaskUnblockTime();
 
+        }
 
+    #endif
 
+
 
+    /* Remove the task from the delayed list and add it to the ready list.  The
 
+     * scheduler is suspended so interrupts will not be accessing the ready
 
+     * lists. */
 
+    listREMOVE_ITEM( &( pxUnblockedTCB->xStateListItem ) );
 
+    prvAddTaskToReadyList( pxUnblockedTCB );
 
+
 
+    if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
 
+    {
 
+        /* The unblocked task has a priority above that of the calling task, so
 
+         * a context switch is required.  This function is called with the
 
+         * scheduler suspended so xYieldPending is set so the context switch
 
+         * occurs immediately that the scheduler is resumed (unsuspended). */
 
+        xYieldPending = pdTRUE;
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
 
+{
 
+    configASSERT( pxTimeOut );
 
+    taskENTER_CRITICAL();
 
+    {
 
+        pxTimeOut->xOverflowCount = xNumOfOverflows;
 
+        pxTimeOut->xTimeOnEntering = xTickCount;
 
+    }
 
+    taskEXIT_CRITICAL();
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
 
+{
 
+    /* For internal use only as it does not use a critical section. */
 
+    pxTimeOut->xOverflowCount = xNumOfOverflows;
 
+    pxTimeOut->xTimeOnEntering = xTickCount;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
 
+                                 TickType_t * const pxTicksToWait )
 
+{
 
+    BaseType_t xReturn;
 
+
 
+    configASSERT( pxTimeOut );
 
+    configASSERT( pxTicksToWait );
 
+
 
+    taskENTER_CRITICAL();
 
+    {
 
+        /* Minor optimisation.  The tick count cannot change in this block. */
 
+        const TickType_t xConstTickCount = xTickCount;
 
+        const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
 
+
 
+        #if ( INCLUDE_xTaskAbortDelay == 1 )
 
+            if( pxCurrentTCB->ucDelayAborted != ( uint8_t ) pdFALSE )
 
+            {
 
+                /* The delay was aborted, which is not the same as a time out,
 
+                 * but has the same result. */
 
+                pxCurrentTCB->ucDelayAborted = pdFALSE;
 
+                xReturn = pdTRUE;
 
+            }
 
+            else
 
+        #endif
 
+
 
+        #if ( INCLUDE_vTaskSuspend == 1 )
 
+            if( *pxTicksToWait == portMAX_DELAY )
 
+            {
 
+                /* If INCLUDE_vTaskSuspend is set to 1 and the block time
 
+                 * specified is the maximum block time then the task should block
 
+                 * indefinitely, and therefore never time out. */
 
+                xReturn = pdFALSE;
 
+            }
 
+            else
 
+        #endif
 
+
 
+        if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
 
+        {
 
+            /* The tick count is greater than the time at which
 
+             * vTaskSetTimeout() was called, but has also overflowed since
 
+             * vTaskSetTimeOut() was called.  It must have wrapped all the way
 
+             * around and gone past again. This passed since vTaskSetTimeout()
 
+             * was called. */
 
+            xReturn = pdTRUE;
 
+            *pxTicksToWait = ( TickType_t ) 0;
 
+        }
 
+        else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
 
+        {
 
+            /* Not a genuine timeout. Adjust parameters for time remaining. */
 
+            *pxTicksToWait -= xElapsedTime;
 
+            vTaskInternalSetTimeOutState( pxTimeOut );
 
+            xReturn = pdFALSE;
 
+        }
 
+        else
 
+        {
 
+            *pxTicksToWait = ( TickType_t ) 0;
 
+            xReturn = pdTRUE;
 
+        }
 
+    }
 
+    taskEXIT_CRITICAL();
 
+
 
+    return xReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+void vTaskMissedYield( void )
 
+{
 
+    xYieldPending = pdTRUE;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask )
 
+    {
 
+        UBaseType_t uxReturn;
 
+        TCB_t const * pxTCB;
 
+
 
+        if( xTask != NULL )
 
+        {
 
+            pxTCB = xTask;
 
+            uxReturn = pxTCB->uxTaskNumber;
 
+        }
 
+        else
 
+        {
 
+            uxReturn = 0U;
 
+        }
 
+
 
+        return uxReturn;
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    void vTaskSetTaskNumber( TaskHandle_t xTask,
 
+                             const UBaseType_t uxHandle )
 
+    {
 
+        TCB_t * pxTCB;
 
+
 
+        if( xTask != NULL )
 
+        {
 
+            pxTCB = xTask;
 
+            pxTCB->uxTaskNumber = uxHandle;
 
+        }
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+
 
+/*
 
+ * -----------------------------------------------------------
 
+ * The Idle task.
 
+ * ----------------------------------------------------------
 
+ *
 
+ * The portTASK_FUNCTION() macro is used to allow port/compiler specific
 
+ * language extensions.  The equivalent prototype for this function is:
 
+ *
 
+ * void prvIdleTask( void *pvParameters );
 
+ *
 
+ */
 
+static portTASK_FUNCTION( prvIdleTask, pvParameters )
 
+{
 
+    /* Stop warnings. */
 
+    ( void ) pvParameters;
 
+
 
+    /** THIS IS THE RTOS IDLE TASK - WHICH IS CREATED AUTOMATICALLY WHEN THE
 
+     * SCHEDULER IS STARTED. **/
 
+
 
+    /* In case a task that has a secure context deletes itself, in which case
 
+     * the idle task is responsible for deleting the task's secure context, if
 
+     * any. */
 
+    portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
 
+
 
+    for( ; ; )
 
+    {
 
+        /* See if any tasks have deleted themselves - if so then the idle task
 
+         * is responsible for freeing the deleted task's TCB and stack. */
 
+        prvCheckTasksWaitingTermination();
 
+
 
+        #if ( configUSE_PREEMPTION == 0 )
 
+            {
 
+                /* If we are not using preemption we keep forcing a task switch to
 
+                 * see if any other task has become available.  If we are using
 
+                 * preemption we don't need to do this as any task becoming available
 
+                 * will automatically get the processor anyway. */
 
+                taskYIELD();
 
+            }
 
+        #endif /* configUSE_PREEMPTION */
 
+
 
+        #if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) )
 
+            {
 
+                /* When using preemption tasks of equal priority will be
 
+                 * timesliced.  If a task that is sharing the idle priority is ready
 
+                 * to run then the idle task should yield before the end of the
 
+                 * timeslice.
 
+                 *
 
+                 * A critical region is not required here as we are just reading from
 
+                 * the list, and an occasional incorrect value will not matter.  If
 
+                 * the ready list at the idle priority contains more than one task
 
+                 * then a task other than the idle task is ready to execute. */
 
+                if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
 
+                {
 
+                    taskYIELD();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        #endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) */
 
+
 
+        #if ( configUSE_IDLE_HOOK == 1 )
 
+            {
 
+                extern void vApplicationIdleHook( void );
 
+
 
+                /* Call the user defined function from within the idle task.  This
 
+                 * allows the application designer to add background functionality
 
+                 * without the overhead of a separate task.
 
+                 * NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES,
 
+                 * CALL A FUNCTION THAT MIGHT BLOCK. */
 
+                vApplicationIdleHook();
 
+            }
 
+        #endif /* configUSE_IDLE_HOOK */
 
+
 
+        /* This conditional compilation should use inequality to 0, not equality
 
+         * to 1.  This is to ensure portSUPPRESS_TICKS_AND_SLEEP() is called when
 
+         * user defined low power mode  implementations require
 
+         * configUSE_TICKLESS_IDLE to be set to a value other than 1. */
 
+        #if ( configUSE_TICKLESS_IDLE != 0 )
 
+            {
 
+                TickType_t xExpectedIdleTime;
 
+
 
+                /* It is not desirable to suspend then resume the scheduler on
 
+                 * each iteration of the idle task.  Therefore, a preliminary
 
+                 * test of the expected idle time is performed without the
 
+                 * scheduler suspended.  The result here is not necessarily
 
+                 * valid. */
 
+                xExpectedIdleTime = prvGetExpectedIdleTime();
 
+
 
+                if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
 
+                {
 
+                    vTaskSuspendAll();
 
+                    {
 
+                        /* Now the scheduler is suspended, the expected idle
 
+                         * time can be sampled again, and this time its value can
 
+                         * be used. */
 
+                        configASSERT( xNextTaskUnblockTime >= xTickCount );
 
+                        xExpectedIdleTime = prvGetExpectedIdleTime();
 
+
 
+                        /* Define the following macro to set xExpectedIdleTime to 0
 
+                         * if the application does not want
 
+                         * portSUPPRESS_TICKS_AND_SLEEP() to be called. */
 
+                        configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( xExpectedIdleTime );
 
+
 
+                        if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
 
+                        {
 
+                            traceLOW_POWER_IDLE_BEGIN();
 
+                            portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime );
 
+                            traceLOW_POWER_IDLE_END();
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                    ( void ) xTaskResumeAll();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        #endif /* configUSE_TICKLESS_IDLE */
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TICKLESS_IDLE != 0 )
 
+
 
+    eSleepModeStatus eTaskConfirmSleepModeStatus( void )
 
+    {
 
+        /* The idle task exists in addition to the application tasks. */
 
+        const UBaseType_t uxNonApplicationTasks = 1;
 
+        eSleepModeStatus eReturn = eStandardSleep;
 
+
 
+        /* This function must be called from a critical section. */
 
+
 
+        if( listCURRENT_LIST_LENGTH( &xPendingReadyList ) != 0 )
 
+        {
 
+            /* A task was made ready while the scheduler was suspended. */
 
+            eReturn = eAbortSleep;
 
+        }
 
+        else if( xYieldPending != pdFALSE )
 
+        {
 
+            /* A yield was pended while the scheduler was suspended. */
 
+            eReturn = eAbortSleep;
 
+        }
 
+        else if( xPendedTicks != 0 )
 
+        {
 
+            /* A tick interrupt has already occurred but was held pending
 
+             * because the scheduler is suspended. */
 
+            eReturn = eAbortSleep;
 
+        }
 
+        else
 
+        {
 
+            /* If all the tasks are in the suspended list (which might mean they
 
+             * have an infinite block time rather than actually being suspended)
 
+             * then it is safe to turn all clocks off and just wait for external
 
+             * interrupts. */
 
+            if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == ( uxCurrentNumberOfTasks - uxNonApplicationTasks ) )
 
+            {
 
+                eReturn = eNoTasksWaitingTimeout;
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+
 
+        return eReturn;
 
+    }
 
+
 
+#endif /* configUSE_TICKLESS_IDLE */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
 
+
 
+    void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
 
+                                            BaseType_t xIndex,
 
+                                            void * pvValue )
 
+    {
 
+        TCB_t * pxTCB;
 
+
 
+        if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
 
+        {
 
+            pxTCB = prvGetTCBFromHandle( xTaskToSet );
 
+            configASSERT( pxTCB != NULL );
 
+            pxTCB->pvThreadLocalStoragePointers[ xIndex ] = pvValue;
 
+        }
 
+    }
 
+
 
+#endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
 
+
 
+    void * pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
 
+                                               BaseType_t xIndex )
 
+    {
 
+        void * pvReturn = NULL;
 
+        TCB_t * pxTCB;
 
+
 
+        if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
 
+        {
 
+            pxTCB = prvGetTCBFromHandle( xTaskToQuery );
 
+            pvReturn = pxTCB->pvThreadLocalStoragePointers[ xIndex ];
 
+        }
 
+        else
 
+        {
 
+            pvReturn = NULL;
 
+        }
 
+
 
+        return pvReturn;
 
+    }
 
+
 
+#endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( portUSING_MPU_WRAPPERS == 1 )
 
+
 
+    void vTaskAllocateMPURegions( TaskHandle_t xTaskToModify,
 
+                                  const MemoryRegion_t * const xRegions )
 
+    {
 
+        TCB_t * pxTCB;
 
+
 
+        /* If null is passed in here then we are modifying the MPU settings of
 
+         * the calling task. */
 
+        pxTCB = prvGetTCBFromHandle( xTaskToModify );
 
+
 
+        vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, NULL, 0 );
 
+    }
 
+
 
+#endif /* portUSING_MPU_WRAPPERS */
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvInitialiseTaskLists( void )
 
+{
 
+    UBaseType_t uxPriority;
 
+
 
+    for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 
+    {
 
+        vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
 
+    }
 
+
 
+    vListInitialise( &xDelayedTaskList1 );
 
+    vListInitialise( &xDelayedTaskList2 );
 
+    vListInitialise( &xPendingReadyList );
 
+
 
+    #if ( INCLUDE_vTaskDelete == 1 )
 
+        {
 
+            vListInitialise( &xTasksWaitingTermination );
 
+        }
 
+    #endif /* INCLUDE_vTaskDelete */
 
+
 
+    #if ( INCLUDE_vTaskSuspend == 1 )
 
+        {
 
+            vListInitialise( &xSuspendedTaskList );
 
+        }
 
+    #endif /* INCLUDE_vTaskSuspend */
 
+
 
+    /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
 
+     * using list2. */
 
+    pxDelayedTaskList = &xDelayedTaskList1;
 
+    pxOverflowDelayedTaskList = &xDelayedTaskList2;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvCheckTasksWaitingTermination( void )
 
+{
 
+    /** THIS FUNCTION IS CALLED FROM THE RTOS IDLE TASK **/
 
+
 
+    #if ( INCLUDE_vTaskDelete == 1 )
 
+        {
 
+            TCB_t * pxTCB;
 
+
 
+            /* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
 
+             * being called too often in the idle task. */
 
+            while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 
+            {
 
+                taskENTER_CRITICAL();
 
+                {
 
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 
+                    --uxCurrentNumberOfTasks;
 
+                    --uxDeletedTasksWaitingCleanUp;
 
+                }
 
+                taskEXIT_CRITICAL();
 
+
 
+                prvDeleteTCB( pxTCB );
 
+            }
 
+        }
 
+    #endif /* INCLUDE_vTaskDelete */
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    void vTaskGetInfo( TaskHandle_t xTask,
 
+                       TaskStatus_t * pxTaskStatus,
 
+                       BaseType_t xGetFreeStackSpace,
 
+                       eTaskState eState )
 
+    {
 
+        TCB_t * pxTCB;
 
+
 
+        /* xTask is NULL then get the state of the calling task. */
 
+        pxTCB = prvGetTCBFromHandle( xTask );
 
+
 
+        pxTaskStatus->xHandle = ( TaskHandle_t ) pxTCB;
 
+        pxTaskStatus->pcTaskName = ( const char * ) &( pxTCB->pcTaskName[ 0 ] );
 
+        pxTaskStatus->uxCurrentPriority = pxTCB->uxPriority;
 
+        pxTaskStatus->pxStackBase = pxTCB->pxStack;
 
+        pxTaskStatus->xTaskNumber = pxTCB->uxTCBNumber;
 
+
 
+        #if ( configUSE_MUTEXES == 1 )
 
+            {
 
+                pxTaskStatus->uxBasePriority = pxTCB->uxBasePriority;
 
+            }
 
+        #else
 
+            {
 
+                pxTaskStatus->uxBasePriority = 0;
 
+            }
 
+        #endif
 
+
 
+        #if ( configGENERATE_RUN_TIME_STATS == 1 )
 
+            {
 
+                pxTaskStatus->ulRunTimeCounter = pxTCB->ulRunTimeCounter;
 
+            }
 
+        #else
 
+            {
 
+                pxTaskStatus->ulRunTimeCounter = 0;
 
+            }
 
+        #endif
 
+
 
+        /* Obtaining the task state is a little fiddly, so is only done if the
 
+         * value of eState passed into this function is eInvalid - otherwise the
 
+         * state is just set to whatever is passed in. */
 
+        if( eState != eInvalid )
 
+        {
 
+            if( pxTCB == pxCurrentTCB )
 
+            {
 
+                pxTaskStatus->eCurrentState = eRunning;
 
+            }
 
+            else
 
+            {
 
+                pxTaskStatus->eCurrentState = eState;
 
+
 
+                #if ( INCLUDE_vTaskSuspend == 1 )
 
+                    {
 
+                        /* If the task is in the suspended list then there is a
 
+                         *  chance it is actually just blocked indefinitely - so really
 
+                         *  it should be reported as being in the Blocked state. */
 
+                        if( eState == eSuspended )
 
+                        {
 
+                            vTaskSuspendAll();
 
+                            {
 
+                                if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 
+                                {
 
+                                    pxTaskStatus->eCurrentState = eBlocked;
 
+                                }
 
+                            }
 
+                            ( void ) xTaskResumeAll();
 
+                        }
 
+                    }
 
+                #endif /* INCLUDE_vTaskSuspend */
 
+            }
 
+        }
 
+        else
 
+        {
 
+            pxTaskStatus->eCurrentState = eTaskGetState( pxTCB );
 
+        }
 
+
 
+        /* Obtaining the stack space takes some time, so the xGetFreeStackSpace
 
+         * parameter is provided to allow it to be skipped. */
 
+        if( xGetFreeStackSpace != pdFALSE )
 
+        {
 
+            #if ( portSTACK_GROWTH > 0 )
 
+                {
 
+                    pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxEndOfStack );
 
+                }
 
+            #else
 
+                {
 
+                    pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxStack );
 
+                }
 
+            #endif
 
+        }
 
+        else
 
+        {
 
+            pxTaskStatus->usStackHighWaterMark = 0;
 
+        }
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+    static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t * pxTaskStatusArray,
 
+                                                     List_t * pxList,
 
+                                                     eTaskState eState )
 
+    {
 
+        configLIST_VOLATILE TCB_t * pxNextTCB, * pxFirstTCB;
 
+        UBaseType_t uxTask = 0;
 
+
 
+        if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
 
+        {
 
+            listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+
 
+            /* Populate an TaskStatus_t structure within the
 
+             * pxTaskStatusArray array for each task that is referenced from
 
+             * pxList.  See the definition of TaskStatus_t in task.h for the
 
+             * meaning of each TaskStatus_t structure member. */
 
+            do
 
+            {
 
+                listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+                vTaskGetInfo( ( TaskHandle_t ) pxNextTCB, &( pxTaskStatusArray[ uxTask ] ), pdTRUE, eState );
 
+                uxTask++;
 
+            } while( pxNextTCB != pxFirstTCB );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return uxTask;
 
+    }
 
+
 
+#endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) )
 
+
 
+    static configSTACK_DEPTH_TYPE prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte )
 
+    {
 
+        uint32_t ulCount = 0U;
 
+
 
+        while( *pucStackByte == ( uint8_t ) tskSTACK_FILL_BYTE )
 
+        {
 
+            pucStackByte -= portSTACK_GROWTH;
 
+            ulCount++;
 
+        }
 
+
 
+        ulCount /= ( uint32_t ) sizeof( StackType_t ); /*lint !e961 Casting is not redundant on smaller architectures. */
 
+
 
+        return ( configSTACK_DEPTH_TYPE ) ulCount;
 
+    }
 
+
 
+#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 )
 
+
 
+/* uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
 
+ * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
 
+ * user to determine the return type.  It gets around the problem of the value
 
+ * overflowing on 8-bit types without breaking backward compatibility for
 
+ * applications that expect an 8-bit return type. */
 
+    configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask )
 
+    {
 
+        TCB_t * pxTCB;
 
+        uint8_t * pucEndOfStack;
 
+        configSTACK_DEPTH_TYPE uxReturn;
 
+
 
+        /* uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are
 
+         * the same except for their return type.  Using configSTACK_DEPTH_TYPE
 
+         * allows the user to determine the return type.  It gets around the
 
+         * problem of the value overflowing on 8-bit types without breaking
 
+         * backward compatibility for applications that expect an 8-bit return
 
+         * type. */
 
+
 
+        pxTCB = prvGetTCBFromHandle( xTask );
 
+
 
+        #if portSTACK_GROWTH < 0
 
+            {
 
+                pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;
 
+            }
 
+        #else
 
+            {
 
+                pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;
 
+            }
 
+        #endif
 
+
 
+        uxReturn = prvTaskCheckFreeStackSpace( pucEndOfStack );
 
+
 
+        return uxReturn;
 
+    }
 
+
 
+#endif /* INCLUDE_uxTaskGetStackHighWaterMark2 */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
 
+
 
+    UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask )
 
+    {
 
+        TCB_t * pxTCB;
 
+        uint8_t * pucEndOfStack;
 
+        UBaseType_t uxReturn;
 
+
 
+        pxTCB = prvGetTCBFromHandle( xTask );
 
+
 
+        #if portSTACK_GROWTH < 0
 
+            {
 
+                pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;
 
+            }
 
+        #else
 
+            {
 
+                pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;
 
+            }
 
+        #endif
 
+
 
+        uxReturn = ( UBaseType_t ) prvTaskCheckFreeStackSpace( pucEndOfStack );
 
+
 
+        return uxReturn;
 
+    }
 
+
 
+#endif /* INCLUDE_uxTaskGetStackHighWaterMark */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( INCLUDE_vTaskDelete == 1 )
 
+
 
+    static void prvDeleteTCB( TCB_t * pxTCB )
 
+    {
 
+        /* This call is required specifically for the TriCore port.  It must be
 
+         * above the vPortFree() calls.  The call is also used by ports/demos that
 
+         * want to allocate and clean RAM statically. */
 
+        portCLEAN_UP_TCB( pxTCB );
 
+
 
+        /* Free up the memory allocated by the scheduler for the task.  It is up
 
+         * to the task to free any memory allocated at the application level.
 
+         * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
 
+         * for additional information. */
 
+        #if ( configUSE_NEWLIB_REENTRANT == 1 )
 
+            {
 
+                _reclaim_reent( &( pxTCB->xNewLib_reent ) );
 
+            }
 
+        #endif /* configUSE_NEWLIB_REENTRANT */
 
+
 
+        #if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( portUSING_MPU_WRAPPERS == 0 ) )
 
+            {
 
+                /* The task can only have been allocated dynamically - free both
 
+                 * the stack and TCB. */
 
+                vPortFreeStack( pxTCB->pxStack );
 
+                vPortFree( pxTCB );
 
+            }
 
+        #elif ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
 
+            {
 
+                /* The task could have been allocated statically or dynamically, so
 
+                 * check what was statically allocated before trying to free the
 
+                 * memory. */
 
+                if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
 
+                {
 
+                    /* Both the stack and TCB were allocated dynamically, so both
 
+                     * must be freed. */
 
+                    vPortFreeStack( pxTCB->pxStack );
 
+                    vPortFree( pxTCB );
 
+                }
 
+                else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
 
+                {
 
+                    /* Only the stack was statically allocated, so the TCB is the
 
+                     * only memory that must be freed. */
 
+                    vPortFree( pxTCB );
 
+                }
 
+                else
 
+                {
 
+                    /* Neither the stack nor the TCB were allocated dynamically, so
 
+                     * nothing needs to be freed. */
 
+                    configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB );
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
+    }
 
+
 
+#endif /* INCLUDE_vTaskDelete */
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvResetNextTaskUnblockTime( void )
 
+{
 
+    if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 
+    {
 
+        /* The new current delayed list is empty.  Set xNextTaskUnblockTime to
 
+         * the maximum possible value so it is  extremely unlikely that the
 
+         * if( xTickCount >= xNextTaskUnblockTime ) test will pass until
 
+         * there is an item in the delayed list. */
 
+        xNextTaskUnblockTime = portMAX_DELAY;
 
+    }
 
+    else
 
+    {
 
+        /* The new current delayed list is not empty, get the value of
 
+         * the item at the head of the delayed list.  This is the time at
 
+         * which the task at the head of the delayed list should be removed
 
+         * from the Blocked state. */
 
+        xNextTaskUnblockTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxDelayedTaskList );
 
+    }
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )
 
+
 
+    TaskHandle_t xTaskGetCurrentTaskHandle( void )
 
+    {
 
+        TaskHandle_t xReturn;
 
+
 
+        /* A critical section is not required as this is not called from
 
+         * an interrupt and the current TCB will always be the same for any
 
+         * individual execution thread. */
 
+        xReturn = pxCurrentTCB;
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
 
+
 
+    BaseType_t xTaskGetSchedulerState( void )
 
+    {
 
+        BaseType_t xReturn;
 
+
 
+        if( xSchedulerRunning == pdFALSE )
 
+        {
 
+            xReturn = taskSCHEDULER_NOT_STARTED;
 
+        }
 
+        else
 
+        {
 
+            if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 
+            {
 
+                xReturn = taskSCHEDULER_RUNNING;
 
+            }
 
+            else
 
+            {
 
+                xReturn = taskSCHEDULER_SUSPENDED;
 
+            }
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_MUTEXES == 1 )
 
+
 
+    BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
 
+    {
 
+        TCB_t * const pxMutexHolderTCB = pxMutexHolder;
 
+        BaseType_t xReturn = pdFALSE;
 
+
 
+        /* If the mutex was given back by an interrupt while the queue was
 
+         * locked then the mutex holder might now be NULL.  _RB_ Is this still
 
+         * needed as interrupts can no longer use mutexes? */
 
+        if( pxMutexHolder != NULL )
 
+        {
 
+            /* If the holder of the mutex has a priority below the priority of
 
+             * the task attempting to obtain the mutex then it will temporarily
 
+             * inherit the priority of the task attempting to obtain the mutex. */
 
+            if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
 
+            {
 
+                /* Adjust the mutex holder state to account for its new
 
+                 * priority.  Only reset the event list item value if the value is
 
+                 * not being used for anything else. */
 
+                if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 
+                {
 
+                    listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                /* If the task being modified is in the ready state it will need
 
+                 * to be moved into a new list. */
 
+                if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
 
+                {
 
+                    if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 
+                    {
 
+                        /* It is known that the task is in its ready list so
 
+                         * there is no need to check again and the port level
 
+                         * reset macro can be called directly. */
 
+                        portRESET_READY_PRIORITY( pxMutexHolderTCB->uxPriority, uxTopReadyPriority );
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+
 
+                    /* Inherit the priority before being moved into the new list. */
 
+                    pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 
+                    prvAddTaskToReadyList( pxMutexHolderTCB );
 
+                }
 
+                else
 
+                {
 
+                    /* Just inherit the priority. */
 
+                    pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 
+                }
 
+
 
+                traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );
 
+
 
+                /* Inheritance occurred. */
 
+                xReturn = pdTRUE;
 
+            }
 
+            else
 
+            {
 
+                if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
 
+                {
 
+                    /* The base priority of the mutex holder is lower than the
 
+                     * priority of the task attempting to take the mutex, but the
 
+                     * current priority of the mutex holder is not lower than the
 
+                     * priority of the task attempting to take the mutex.
 
+                     * Therefore the mutex holder must have already inherited a
 
+                     * priority, but inheritance would have occurred if that had
 
+                     * not been the case. */
 
+                    xReturn = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_MUTEXES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_MUTEXES == 1 )
 
+
 
+    BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
 
+    {
 
+        TCB_t * const pxTCB = pxMutexHolder;
 
+        BaseType_t xReturn = pdFALSE;
 
+
 
+        if( pxMutexHolder != NULL )
 
+        {
 
+            /* A task can only have an inherited priority if it holds the mutex.
 
+             * If the mutex is held by a task then it cannot be given from an
 
+             * interrupt, and if a mutex is given by the holding task then it must
 
+             * be the running state task. */
 
+            configASSERT( pxTCB == pxCurrentTCB );
 
+            configASSERT( pxTCB->uxMutexesHeld );
 
+            ( pxTCB->uxMutexesHeld )--;
 
+
 
+            /* Has the holder of the mutex inherited the priority of another
 
+             * task? */
 
+            if( pxTCB->uxPriority != pxTCB->uxBasePriority )
 
+            {
 
+                /* Only disinherit if no other mutexes are held. */
 
+                if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
 
+                {
 
+                    /* A task can only have an inherited priority if it holds
 
+                     * the mutex.  If the mutex is held by a task then it cannot be
 
+                     * given from an interrupt, and if a mutex is given by the
 
+                     * holding task then it must be the running state task.  Remove
 
+                     * the holding task from the ready list. */
 
+                    if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 
+                    {
 
+                        portRESET_READY_PRIORITY( pxTCB->uxPriority, uxTopReadyPriority );
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+
 
+                    /* Disinherit the priority before adding the task into the
 
+                     * new  ready list. */
 
+                    traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
 
+                    pxTCB->uxPriority = pxTCB->uxBasePriority;
 
+
 
+                    /* Reset the event list item value.  It cannot be in use for
 
+                     * any other purpose if this task is running, and it must be
 
+                     * running to give back the mutex. */
 
+                    listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+                    prvAddTaskToReadyList( pxTCB );
 
+
 
+                    /* Return true to indicate that a context switch is required.
 
+                     * This is only actually required in the corner case whereby
 
+                     * multiple mutexes were held and the mutexes were given back
 
+                     * in an order different to that in which they were taken.
 
+                     * If a context switch did not occur when the first mutex was
 
+                     * returned, even if a task was waiting on it, then a context
 
+                     * switch should occur when the last mutex is returned whether
 
+                     * a task is waiting on it or not. */
 
+                    xReturn = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_MUTEXES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_MUTEXES == 1 )
 
+
 
+    void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder,
 
+                                              UBaseType_t uxHighestPriorityWaitingTask )
 
+    {
 
+        TCB_t * const pxTCB = pxMutexHolder;
 
+        UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
 
+        const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
 
+
 
+        if( pxMutexHolder != NULL )
 
+        {
 
+            /* If pxMutexHolder is not NULL then the holder must hold at least
 
+             * one mutex. */
 
+            configASSERT( pxTCB->uxMutexesHeld );
 
+
 
+            /* Determine the priority to which the priority of the task that
 
+             * holds the mutex should be set.  This will be the greater of the
 
+             * holding task's base priority and the priority of the highest
 
+             * priority task that is waiting to obtain the mutex. */
 
+            if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
 
+            {
 
+                uxPriorityToUse = uxHighestPriorityWaitingTask;
 
+            }
 
+            else
 
+            {
 
+                uxPriorityToUse = pxTCB->uxBasePriority;
 
+            }
 
+
 
+            /* Does the priority need to change? */
 
+            if( pxTCB->uxPriority != uxPriorityToUse )
 
+            {
 
+                /* Only disinherit if no other mutexes are held.  This is a
 
+                 * simplification in the priority inheritance implementation.  If
 
+                 * the task that holds the mutex is also holding other mutexes then
 
+                 * the other mutexes may have caused the priority inheritance. */
 
+                if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
 
+                {
 
+                    /* If a task has timed out because it already holds the
 
+                     * mutex it was trying to obtain then it cannot of inherited
 
+                     * its own priority. */
 
+                    configASSERT( pxTCB != pxCurrentTCB );
 
+
 
+                    /* Disinherit the priority, remembering the previous
 
+                     * priority to facilitate determining the subject task's
 
+                     * state. */
 
+                    traceTASK_PRIORITY_DISINHERIT( pxTCB, uxPriorityToUse );
 
+                    uxPriorityUsedOnEntry = pxTCB->uxPriority;
 
+                    pxTCB->uxPriority = uxPriorityToUse;
 
+
 
+                    /* Only reset the event list item value if the value is not
 
+                     * being used for anything else. */
 
+                    if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 
+                    {
 
+                        listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+
 
+                    /* If the running task is not the task that holds the mutex
 
+                     * then the task that holds the mutex could be in either the
 
+                     * Ready, Blocked or Suspended states.  Only remove the task
 
+                     * from its current state list if it is in the Ready state as
 
+                     * the task's priority is going to change and there is one
 
+                     * Ready list per priority. */
 
+                    if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
 
+                    {
 
+                        if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 
+                        {
 
+                            /* It is known that the task is in its ready list so
 
+                             * there is no need to check again and the port level
 
+                             * reset macro can be called directly. */
 
+                            portRESET_READY_PRIORITY( pxTCB->uxPriority, uxTopReadyPriority );
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+
 
+                        prvAddTaskToReadyList( pxTCB );
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+#endif /* configUSE_MUTEXES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( portCRITICAL_NESTING_IN_TCB == 1 )
 
+
 
+    void vTaskEnterCritical( void )
 
+    {
 
+        portDISABLE_INTERRUPTS();
 
+
 
+        if( xSchedulerRunning != pdFALSE )
 
+        {
 
+            ( pxCurrentTCB->uxCriticalNesting )++;
 
+
 
+            /* This is not the interrupt safe version of the enter critical
 
+             * function so  assert() if it is being called from an interrupt
 
+             * context.  Only API functions that end in "FromISR" can be used in an
 
+             * interrupt.  Only assert if the critical nesting count is 1 to
 
+             * protect against recursive calls if the assert function also uses a
 
+             * critical section. */
 
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
 
+            {
 
+                portASSERT_IF_IN_ISR();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+#endif /* portCRITICAL_NESTING_IN_TCB */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( portCRITICAL_NESTING_IN_TCB == 1 )
 
+
 
+    void vTaskExitCritical( void )
 
+    {
 
+        if( xSchedulerRunning != pdFALSE )
 
+        {
 
+            if( pxCurrentTCB->uxCriticalNesting > 0U )
 
+            {
 
+                ( pxCurrentTCB->uxCriticalNesting )--;
 
+
 
+                if( pxCurrentTCB->uxCriticalNesting == 0U )
 
+                {
 
+                    portENABLE_INTERRUPTS();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+#endif /* portCRITICAL_NESTING_IN_TCB */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
 
+
 
+    static char * prvWriteNameToBuffer( char * pcBuffer,
 
+                                        const char * pcTaskName )
 
+    {
 
+        size_t x;
 
+
 
+        /* Start by copying the entire string. */
 
+        strcpy( pcBuffer, pcTaskName );
 
+
 
+        /* Pad the end of the string with spaces to ensure columns line up when
 
+         * printed out. */
 
+        for( x = strlen( pcBuffer ); x < ( size_t ) ( configMAX_TASK_NAME_LEN - 1 ); x++ )
 
+        {
 
+            pcBuffer[ x ] = ' ';
 
+        }
 
+
 
+        /* Terminate. */
 
+        pcBuffer[ x ] = ( char ) 0x00;
 
+
 
+        /* Return the new end of string. */
 
+        return &( pcBuffer[ x ] );
 
+    }
 
+
 
+#endif /* ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
+
 
+    void vTaskList( char * pcWriteBuffer )
 
+    {
 
+        TaskStatus_t * pxTaskStatusArray;
 
+        UBaseType_t uxArraySize, x;
 
+        char cStatus;
 
+
 
+        /*
 
+         * PLEASE NOTE:
 
+         *
 
+         * This function is provided for convenience only, and is used by many
 
+         * of the demo applications.  Do not consider it to be part of the
 
+         * scheduler.
 
+         *
 
+         * vTaskList() calls uxTaskGetSystemState(), then formats part of the
 
+         * uxTaskGetSystemState() output into a human readable table that
 
+         * displays task: names, states, priority, stack usage and task number.
 
+         * Stack usage specified as the number of unused StackType_t words stack can hold
 
+         * on top of stack - not the number of bytes.
 
+         *
 
+         * vTaskList() has a dependency on the sprintf() C library function that
 
+         * might bloat the code size, use a lot of stack, and provide different
 
+         * results on different platforms.  An alternative, tiny, third party,
 
+         * and limited functionality implementation of sprintf() is provided in
 
+         * many of the FreeRTOS/Demo sub-directories in a file called
 
+         * printf-stdarg.c (note printf-stdarg.c does not provide a full
 
+         * snprintf() implementation!).
 
+         *
 
+         * It is recommended that production systems call uxTaskGetSystemState()
 
+         * directly to get access to raw stats data, rather than indirectly
 
+         * through a call to vTaskList().
 
+         */
 
+
 
+
 
+        /* Make sure the write buffer does not contain a string. */
 
+        *pcWriteBuffer = ( char ) 0x00;
 
+
 
+        /* Take a snapshot of the number of tasks in case it changes while this
 
+         * function is executing. */
 
+        uxArraySize = uxCurrentNumberOfTasks;
 
+
 
+        /* Allocate an array index for each task.  NOTE!  if
 
+         * configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
 
+         * equate to NULL. */
 
+        pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation allocates a struct that has the alignment requirements of a pointer. */
 
+
 
+        if( pxTaskStatusArray != NULL )
 
+        {
 
+            /* Generate the (binary) data. */
 
+            uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, NULL );
 
+
 
+            /* Create a human readable table from the binary data. */
 
+            for( x = 0; x < uxArraySize; x++ )
 
+            {
 
+                switch( pxTaskStatusArray[ x ].eCurrentState )
 
+                {
 
+                    case eRunning:
 
+                        cStatus = tskRUNNING_CHAR;
 
+                        break;
 
+
 
+                    case eReady:
 
+                        cStatus = tskREADY_CHAR;
 
+                        break;
 
+
 
+                    case eBlocked:
 
+                        cStatus = tskBLOCKED_CHAR;
 
+                        break;
 
+
 
+                    case eSuspended:
 
+                        cStatus = tskSUSPENDED_CHAR;
 
+                        break;
 
+
 
+                    case eDeleted:
 
+                        cStatus = tskDELETED_CHAR;
 
+                        break;
 
+
 
+                    case eInvalid: /* Fall through. */
 
+                    default:       /* Should not get here, but it is included
 
+                                    * to prevent static checking errors. */
 
+                        cStatus = ( char ) 0x00;
 
+                        break;
 
+                }
 
+
 
+                /* Write the task name to the string, padding with spaces so it
 
+                 * can be printed in tabular form more easily. */
 
+                pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
 
+
 
+                /* Write the rest of the string. */
 
+                sprintf( pcWriteBuffer, "\t%c\t%u\t%u\t%u\r\n", cStatus, ( unsigned int ) pxTaskStatusArray[ x ].uxCurrentPriority, ( unsigned int ) pxTaskStatusArray[ x ].usStackHighWaterMark, ( unsigned int ) pxTaskStatusArray[ x ].xTaskNumber ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
 
+                pcWriteBuffer += strlen( pcWriteBuffer );                                                                                                                                                                                                /*lint !e9016 Pointer arithmetic ok on char pointers especially as in this case where it best denotes the intent of the code. */
 
+            }
 
+
 
+            /* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
 
+             * is 0 then vPortFree() will be #defined to nothing. */
 
+            vPortFree( pxTaskStatusArray );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
 
+/*----------------------------------------------------------*/
 
+
 
+#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
 
+
 
+    void vTaskGetRunTimeStats( char * pcWriteBuffer )
 
+    {
 
+        TaskStatus_t * pxTaskStatusArray;
 
+        UBaseType_t uxArraySize, x;
 
+        uint32_t ulTotalTime, ulStatsAsPercentage;
 
+
 
+        #if ( configUSE_TRACE_FACILITY != 1 )
 
+            {
 
+                #error configUSE_TRACE_FACILITY must also be set to 1 in FreeRTOSConfig.h to use vTaskGetRunTimeStats().
 
+            }
 
+        #endif
 
+
 
+        /*
 
+         * PLEASE NOTE:
 
+         *
 
+         * This function is provided for convenience only, and is used by many
 
+         * of the demo applications.  Do not consider it to be part of the
 
+         * scheduler.
 
+         *
 
+         * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part
 
+         * of the uxTaskGetSystemState() output into a human readable table that
 
+         * displays the amount of time each task has spent in the Running state
 
+         * in both absolute and percentage terms.
 
+         *
 
+         * vTaskGetRunTimeStats() has a dependency on the sprintf() C library
 
+         * function that might bloat the code size, use a lot of stack, and
 
+         * provide different results on different platforms.  An alternative,
 
+         * tiny, third party, and limited functionality implementation of
 
+         * sprintf() is provided in many of the FreeRTOS/Demo sub-directories in
 
+         * a file called printf-stdarg.c (note printf-stdarg.c does not provide
 
+         * a full snprintf() implementation!).
 
+         *
 
+         * It is recommended that production systems call uxTaskGetSystemState()
 
+         * directly to get access to raw stats data, rather than indirectly
 
+         * through a call to vTaskGetRunTimeStats().
 
+         */
 
+
 
+        /* Make sure the write buffer does not contain a string. */
 
+        *pcWriteBuffer = ( char ) 0x00;
 
+
 
+        /* Take a snapshot of the number of tasks in case it changes while this
 
+         * function is executing. */
 
+        uxArraySize = uxCurrentNumberOfTasks;
 
+
 
+        /* Allocate an array index for each task.  NOTE!  If
 
+         * configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
 
+         * equate to NULL. */
 
+        pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation allocates a struct that has the alignment requirements of a pointer. */
 
+
 
+        if( pxTaskStatusArray != NULL )
 
+        {
 
+            /* Generate the (binary) data. */
 
+            uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalTime );
 
+
 
+            /* For percentage calculations. */
 
+            ulTotalTime /= 100UL;
 
+
 
+            /* Avoid divide by zero errors. */
 
+            if( ulTotalTime > 0UL )
 
+            {
 
+                /* Create a human readable table from the binary data. */
 
+                for( x = 0; x < uxArraySize; x++ )
 
+                {
 
+                    /* What percentage of the total run time has the task used?
 
+                     * This will always be rounded down to the nearest integer.
 
+                     * ulTotalRunTimeDiv100 has already been divided by 100. */
 
+                    ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalTime;
 
+
 
+                    /* Write the task name to the string, padding with
 
+                     * spaces so it can be printed in tabular form more
 
+                     * easily. */
 
+                    pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
 
+
 
+                    if( ulStatsAsPercentage > 0UL )
 
+                    {
 
+                        #ifdef portLU_PRINTF_SPECIFIER_REQUIRED
 
+                            {
 
+                                sprintf( pcWriteBuffer, "\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
 
+                            }
 
+                        #else
 
+                            {
 
+                                /* sizeof( int ) == sizeof( long ) so a smaller
 
+                                 * printf() library can be used. */
 
+                                sprintf( pcWriteBuffer, "\t%u\t\t%u%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter, ( unsigned int ) ulStatsAsPercentage ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
 
+                            }
 
+                        #endif
 
+                    }
 
+                    else
 
+                    {
 
+                        /* If the percentage is zero here then the task has
 
+                         * consumed less than 1% of the total run time. */
 
+                        #ifdef portLU_PRINTF_SPECIFIER_REQUIRED
 
+                            {
 
+                                sprintf( pcWriteBuffer, "\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter );
 
+                            }
 
+                        #else
 
+                            {
 
+                                /* sizeof( int ) == sizeof( long ) so a smaller
 
+                                 * printf() library can be used. */
 
+                                sprintf( pcWriteBuffer, "\t%u\t\t<1%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
 
+                            }
 
+                        #endif
 
+                    }
 
+
 
+                    pcWriteBuffer += strlen( pcWriteBuffer ); /*lint !e9016 Pointer arithmetic ok on char pointers especially as in this case where it best denotes the intent of the code. */
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            /* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
 
+             * is 0 then vPortFree() will be #defined to nothing. */
 
+            vPortFree( pxTaskStatusArray );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+    }
 
+
 
+#endif /* ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) */
 
+/*-----------------------------------------------------------*/
 
+
 
+TickType_t uxTaskResetEventItemValue( void )
 
+{
 
+    TickType_t uxReturn;
 
+
 
+    uxReturn = listGET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ) );
 
+
 
+    /* Reset the event list item to its normal value - so it can be used with
 
+     * queues and semaphores. */
 
+    listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+
 
+    return uxReturn;
 
+}
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_MUTEXES == 1 )
 
+
 
+    TaskHandle_t pvTaskIncrementMutexHeldCount( void )
 
+    {
 
+        /* If xSemaphoreCreateMutex() is called before any tasks have been created
 
+         * then pxCurrentTCB will be NULL. */
 
+        if( pxCurrentTCB != NULL )
 
+        {
 
+            ( pxCurrentTCB->uxMutexesHeld )++;
 
+        }
 
+
 
+        return pxCurrentTCB;
 
+    }
 
+
 
+#endif /* configUSE_MUTEXES */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+
 
+    uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWait,
 
+                                      BaseType_t xClearCountOnExit,
 
+                                      TickType_t xTicksToWait )
 
+    {
 
+        uint32_t ulReturn;
 
+
 
+        configASSERT( uxIndexToWait < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            /* Only block if the notification count is not already non-zero. */
 
+            if( pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] == 0UL )
 
+            {
 
+                /* Mark this task as waiting for a notification. */
 
+                pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskWAITING_NOTIFICATION;
 
+
 
+                if( xTicksToWait > ( TickType_t ) 0 )
 
+                {
 
+                    prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 
+                    traceTASK_NOTIFY_TAKE_BLOCK( uxIndexToWait );
 
+
 
+                    /* All ports are written to allow a yield in a critical
 
+                     * section (some will yield immediately, others wait until the
 
+                     * critical section exits) - but it is not something that
 
+                     * application code should ever do. */
 
+                    portYIELD_WITHIN_API();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            traceTASK_NOTIFY_TAKE( uxIndexToWait );
 
+            ulReturn = pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ];
 
+
 
+            if( ulReturn != 0UL )
 
+            {
 
+                if( xClearCountOnExit != pdFALSE )
 
+                {
 
+                    pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] = 0UL;
 
+                }
 
+                else
 
+                {
 
+                    pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] = ulReturn - ( uint32_t ) 1;
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+
 
+            pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskNOT_WAITING_NOTIFICATION;
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return ulReturn;
 
+    }
 
+
 
+#endif /* configUSE_TASK_NOTIFICATIONS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+
 
+    BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWait,
 
+                                       uint32_t ulBitsToClearOnEntry,
 
+                                       uint32_t ulBitsToClearOnExit,
 
+                                       uint32_t * pulNotificationValue,
 
+                                       TickType_t xTicksToWait )
 
+    {
 
+        BaseType_t xReturn;
 
+
 
+        configASSERT( uxIndexToWait < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            /* Only block if a notification is not already pending. */
 
+            if( pxCurrentTCB->ucNotifyState[ uxIndexToWait ] != taskNOTIFICATION_RECEIVED )
 
+            {
 
+                /* Clear bits in the task's notification value as bits may get
 
+                 * set  by the notifying task or interrupt.  This can be used to
 
+                 * clear the value to zero. */
 
+                pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] &= ~ulBitsToClearOnEntry;
 
+
 
+                /* Mark this task as waiting for a notification. */
 
+                pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskWAITING_NOTIFICATION;
 
+
 
+                if( xTicksToWait > ( TickType_t ) 0 )
 
+                {
 
+                    prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 
+                    traceTASK_NOTIFY_WAIT_BLOCK( uxIndexToWait );
 
+
 
+                    /* All ports are written to allow a yield in a critical
 
+                     * section (some will yield immediately, others wait until the
 
+                     * critical section exits) - but it is not something that
 
+                     * application code should ever do. */
 
+                    portYIELD_WITHIN_API();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            traceTASK_NOTIFY_WAIT( uxIndexToWait );
 
+
 
+            if( pulNotificationValue != NULL )
 
+            {
 
+                /* Output the current notification value, which may or may not
 
+                 * have changed. */
 
+                *pulNotificationValue = pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ];
 
+            }
 
+
 
+            /* If ucNotifyValue is set then either the task never entered the
 
+             * blocked state (because a notification was already pending) or the
 
+             * task unblocked because of a notification.  Otherwise the task
 
+             * unblocked because of a timeout. */
 
+            if( pxCurrentTCB->ucNotifyState[ uxIndexToWait ] != taskNOTIFICATION_RECEIVED )
 
+            {
 
+                /* A notification was not received. */
 
+                xReturn = pdFALSE;
 
+            }
 
+            else
 
+            {
 
+                /* A notification was already pending or a notification was
 
+                 * received while the task was waiting. */
 
+                pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] &= ~ulBitsToClearOnExit;
 
+                xReturn = pdTRUE;
 
+            }
 
+
 
+            pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskNOT_WAITING_NOTIFICATION;
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_TASK_NOTIFICATIONS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+
 
+    BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
 
+                                   UBaseType_t uxIndexToNotify,
 
+                                   uint32_t ulValue,
 
+                                   eNotifyAction eAction,
 
+                                   uint32_t * pulPreviousNotificationValue )
 
+    {
 
+        TCB_t * pxTCB;
 
+        BaseType_t xReturn = pdPASS;
 
+        uint8_t ucOriginalNotifyState;
 
+
 
+        configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
+        configASSERT( xTaskToNotify );
 
+        pxTCB = xTaskToNotify;
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            if( pulPreviousNotificationValue != NULL )
 
+            {
 
+                *pulPreviousNotificationValue = pxTCB->ulNotifiedValue[ uxIndexToNotify ];
 
+            }
 
+
 
+            ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ];
 
+
 
+            pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED;
 
+
 
+            switch( eAction )
 
+            {
 
+                case eSetBits:
 
+                    pxTCB->ulNotifiedValue[ uxIndexToNotify ] |= ulValue;
 
+                    break;
 
+
 
+                case eIncrement:
 
+                    ( pxTCB->ulNotifiedValue[ uxIndexToNotify ] )++;
 
+                    break;
 
+
 
+                case eSetValueWithOverwrite:
 
+                    pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue;
 
+                    break;
 
+
 
+                case eSetValueWithoutOverwrite:
 
+
 
+                    if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 
+                    {
 
+                        pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue;
 
+                    }
 
+                    else
 
+                    {
 
+                        /* The value could not be written to the task. */
 
+                        xReturn = pdFAIL;
 
+                    }
 
+
 
+                    break;
 
+
 
+                case eNoAction:
 
+
 
+                    /* The task is being notified without its notify value being
 
+                     * updated. */
 
+                    break;
 
+
 
+                default:
 
+
 
+                    /* Should not get here if all enums are handled.
 
+                     * Artificially force an assert by testing a value the
 
+                     * compiler can't assume is const. */
 
+                    configASSERT( xTickCount == ( TickType_t ) 0 );
 
+
 
+                    break;
 
+            }
 
+
 
+            traceTASK_NOTIFY( uxIndexToNotify );
 
+
 
+            /* If the task is in the blocked state specifically to wait for a
 
+             * notification then unblock it now. */
 
+            if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 
+            {
 
+                listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
 
+                prvAddTaskToReadyList( pxTCB );
 
+
 
+                /* The task should not have been on an event list. */
 
+                configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 
+
 
+                #if ( configUSE_TICKLESS_IDLE != 0 )
 
+                    {
 
+                        /* If a task is blocked waiting for a notification then
 
+                         * xNextTaskUnblockTime might be set to the blocked task's time
 
+                         * out time.  If the task is unblocked for a reason other than
 
+                         * a timeout xNextTaskUnblockTime is normally left unchanged,
 
+                         * because it will automatically get reset to a new value when
 
+                         * the tick count equals xNextTaskUnblockTime.  However if
 
+                         * tickless idling is used it might be more important to enter
 
+                         * sleep mode at the earliest possible time - so reset
 
+                         * xNextTaskUnblockTime here to ensure it is updated at the
 
+                         * earliest possible time. */
 
+                        prvResetNextTaskUnblockTime();
 
+                    }
 
+                #endif
 
+
 
+                if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 
+                {
 
+                    /* The notified task has a priority above the currently
 
+                     * executing task so a yield is required. */
 
+                    taskYIELD_IF_USING_PREEMPTION();
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_TASK_NOTIFICATIONS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+
 
+    BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
 
+                                          UBaseType_t uxIndexToNotify,
 
+                                          uint32_t ulValue,
 
+                                          eNotifyAction eAction,
 
+                                          uint32_t * pulPreviousNotificationValue,
 
+                                          BaseType_t * pxHigherPriorityTaskWoken )
 
+    {
 
+        TCB_t * pxTCB;
 
+        uint8_t ucOriginalNotifyState;
 
+        BaseType_t xReturn = pdPASS;
 
+        UBaseType_t uxSavedInterruptStatus;
 
+
 
+        configASSERT( xTaskToNotify );
 
+        configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
+
 
+        /* RTOS ports that support interrupt nesting have the concept of a
 
+         * maximum  system call (or maximum API call) interrupt priority.
 
+         * Interrupts that are  above the maximum system call priority are keep
 
+         * permanently enabled, even when the RTOS kernel is in a critical section,
 
+         * but cannot make any calls to FreeRTOS API functions.  If configASSERT()
 
+         * is defined in FreeRTOSConfig.h then
 
+         * portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
 
+         * failure if a FreeRTOS API function is called from an interrupt that has
 
+         * been assigned a priority above the configured maximum system call
 
+         * priority.  Only FreeRTOS functions that end in FromISR can be called
 
+         * from interrupts  that have been assigned a priority at or (logically)
 
+         * below the maximum system call interrupt priority.  FreeRTOS maintains a
 
+         * separate interrupt safe API to ensure interrupt entry is as fast and as
 
+         * simple as possible.  More information (albeit Cortex-M specific) is
 
+         * provided on the following link:
 
+         * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 
+        portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
+
 
+        pxTCB = xTaskToNotify;
 
+
 
+        uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 
+        {
 
+            if( pulPreviousNotificationValue != NULL )
 
+            {
 
+                *pulPreviousNotificationValue = pxTCB->ulNotifiedValue[ uxIndexToNotify ];
 
+            }
 
+
 
+            ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ];
 
+            pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED;
 
+
 
+            switch( eAction )
 
+            {
 
+                case eSetBits:
 
+                    pxTCB->ulNotifiedValue[ uxIndexToNotify ] |= ulValue;
 
+                    break;
 
+
 
+                case eIncrement:
 
+                    ( pxTCB->ulNotifiedValue[ uxIndexToNotify ] )++;
 
+                    break;
 
+
 
+                case eSetValueWithOverwrite:
 
+                    pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue;
 
+                    break;
 
+
 
+                case eSetValueWithoutOverwrite:
 
+
 
+                    if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 
+                    {
 
+                        pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue;
 
+                    }
 
+                    else
 
+                    {
 
+                        /* The value could not be written to the task. */
 
+                        xReturn = pdFAIL;
 
+                    }
 
+
 
+                    break;
 
+
 
+                case eNoAction:
 
+
 
+                    /* The task is being notified without its notify value being
 
+                     * updated. */
 
+                    break;
 
+
 
+                default:
 
+
 
+                    /* Should not get here if all enums are handled.
 
+                     * Artificially force an assert by testing a value the
 
+                     * compiler can't assume is const. */
 
+                    configASSERT( xTickCount == ( TickType_t ) 0 );
 
+                    break;
 
+            }
 
+
 
+            traceTASK_NOTIFY_FROM_ISR( uxIndexToNotify );
 
+
 
+            /* If the task is in the blocked state specifically to wait for a
 
+             * notification then unblock it now. */
 
+            if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 
+            {
 
+                /* The task should not have been on an event list. */
 
+                configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 
+
 
+                if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 
+                {
 
+                    listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
 
+                    prvAddTaskToReadyList( pxTCB );
 
+                }
 
+                else
 
+                {
 
+                    /* The delayed and ready lists cannot be accessed, so hold
 
+                     * this task pending until the scheduler is resumed. */
 
+                    listINSERT_END( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
 
+                }
 
+
 
+                if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 
+                {
 
+                    /* The notified task has a priority above the currently
 
+                     * executing task so a yield is required. */
 
+                    if( pxHigherPriorityTaskWoken != NULL )
 
+                    {
 
+                        *pxHigherPriorityTaskWoken = pdTRUE;
 
+                    }
 
+
 
+                    /* Mark that a yield is pending in case the user is not
 
+                     * using the "xHigherPriorityTaskWoken" parameter to an ISR
 
+                     * safe FreeRTOS function. */
 
+                    xYieldPending = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        }
 
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_TASK_NOTIFICATIONS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+
 
+    void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
 
+                                        UBaseType_t uxIndexToNotify,
 
+                                        BaseType_t * pxHigherPriorityTaskWoken )
 
+    {
 
+        TCB_t * pxTCB;
 
+        uint8_t ucOriginalNotifyState;
 
+        UBaseType_t uxSavedInterruptStatus;
 
+
 
+        configASSERT( xTaskToNotify );
 
+        configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
+
 
+        /* RTOS ports that support interrupt nesting have the concept of a
 
+         * maximum  system call (or maximum API call) interrupt priority.
 
+         * Interrupts that are  above the maximum system call priority are keep
 
+         * permanently enabled, even when the RTOS kernel is in a critical section,
 
+         * but cannot make any calls to FreeRTOS API functions.  If configASSERT()
 
+         * is defined in FreeRTOSConfig.h then
 
+         * portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
 
+         * failure if a FreeRTOS API function is called from an interrupt that has
 
+         * been assigned a priority above the configured maximum system call
 
+         * priority.  Only FreeRTOS functions that end in FromISR can be called
 
+         * from interrupts  that have been assigned a priority at or (logically)
 
+         * below the maximum system call interrupt priority.  FreeRTOS maintains a
 
+         * separate interrupt safe API to ensure interrupt entry is as fast and as
 
+         * simple as possible.  More information (albeit Cortex-M specific) is
 
+         * provided on the following link:
 
+         * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
 
+        portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 
+
 
+        pxTCB = xTaskToNotify;
 
+
 
+        uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 
+        {
 
+            ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ];
 
+            pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED;
 
+
 
+            /* 'Giving' is equivalent to incrementing a count in a counting
 
+             * semaphore. */
 
+            ( pxTCB->ulNotifiedValue[ uxIndexToNotify ] )++;
 
+
 
+            traceTASK_NOTIFY_GIVE_FROM_ISR( uxIndexToNotify );
 
+
 
+            /* If the task is in the blocked state specifically to wait for a
 
+             * notification then unblock it now. */
 
+            if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 
+            {
 
+                /* The task should not have been on an event list. */
 
+                configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 
+
 
+                if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 
+                {
 
+                    listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
 
+                    prvAddTaskToReadyList( pxTCB );
 
+                }
 
+                else
 
+                {
 
+                    /* The delayed and ready lists cannot be accessed, so hold
 
+                     * this task pending until the scheduler is resumed. */
 
+                    listINSERT_END( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
 
+                }
 
+
 
+                if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 
+                {
 
+                    /* The notified task has a priority above the currently
 
+                     * executing task so a yield is required. */
 
+                    if( pxHigherPriorityTaskWoken != NULL )
 
+                    {
 
+                        *pxHigherPriorityTaskWoken = pdTRUE;
 
+                    }
 
+
 
+                    /* Mark that a yield is pending in case the user is not
 
+                     * using the "xHigherPriorityTaskWoken" parameter in an ISR
 
+                     * safe FreeRTOS function. */
 
+                    xYieldPending = pdTRUE;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+        }
 
+        portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
 
+    }
 
+
 
+#endif /* configUSE_TASK_NOTIFICATIONS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+
 
+    BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask,
 
+                                             UBaseType_t uxIndexToClear )
 
+    {
 
+        TCB_t * pxTCB;
 
+        BaseType_t xReturn;
 
+
 
+        configASSERT( uxIndexToClear < configTASK_NOTIFICATION_ARRAY_ENTRIES );
 
+
 
+        /* If null is passed in here then it is the calling task that is having
 
+         * its notification state cleared. */
 
+        pxTCB = prvGetTCBFromHandle( xTask );
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            if( pxTCB->ucNotifyState[ uxIndexToClear ] == taskNOTIFICATION_RECEIVED )
 
+            {
 
+                pxTCB->ucNotifyState[ uxIndexToClear ] = taskNOT_WAITING_NOTIFICATION;
 
+                xReturn = pdPASS;
 
+            }
 
+            else
 
+            {
 
+                xReturn = pdFAIL;
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return xReturn;
 
+    }
 
+
 
+#endif /* configUSE_TASK_NOTIFICATIONS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( configUSE_TASK_NOTIFICATIONS == 1 )
 
+
 
+    uint32_t ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
 
+                                            UBaseType_t uxIndexToClear,
 
+                                            uint32_t ulBitsToClear )
 
+    {
 
+        TCB_t * pxTCB;
 
+        uint32_t ulReturn;
 
+
 
+        /* If null is passed in here then it is the calling task that is having
 
+         * its notification state cleared. */
 
+        pxTCB = prvGetTCBFromHandle( xTask );
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            /* Return the notification as it was before the bits were cleared,
 
+             * then clear the bit mask. */
 
+            ulReturn = pxTCB->ulNotifiedValue[ uxIndexToClear ];
 
+            pxTCB->ulNotifiedValue[ uxIndexToClear ] &= ~ulBitsToClear;
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return ulReturn;
 
+    }
 
+
 
+#endif /* configUSE_TASK_NOTIFICATIONS */
 
+/*-----------------------------------------------------------*/
 
+
 
+#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) )
 
+
 
+    uint32_t ulTaskGetIdleRunTimeCounter( void )
 
+    {
 
+        return xIdleTaskHandle->ulRunTimeCounter;
 
+    }
 
+
 
+#endif
 
+/*-----------------------------------------------------------*/
 
+
 
+static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait,
 
+                                            const BaseType_t xCanBlockIndefinitely )
 
+{
 
+    TickType_t xTimeToWake;
 
+    const TickType_t xConstTickCount = xTickCount;
 
+
 
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
 
+        {
 
+            /* About to enter a delayed list, so ensure the ucDelayAborted flag is
 
+             * reset to pdFALSE so it can be detected as having been set to pdTRUE
 
+             * when the task leaves the Blocked state. */
 
+            pxCurrentTCB->ucDelayAborted = pdFALSE;
 
+        }
 
+    #endif
 
+
 
+    /* Remove the task from the ready list before adding it to the blocked list
 
+     * as the same list item is used for both lists. */
 
+    if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 
+    {
 
+        /* The current task must be in a ready list, so there is no need to
 
+         * check, and the port reset macro can be called directly. */
 
+        portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority ); /*lint !e931 pxCurrentTCB cannot change as it is the calling task.  pxCurrentTCB->uxPriority and uxTopReadyPriority cannot change as called with scheduler suspended or in a critical section. */
 
+    }
 
+    else
 
+    {
 
+        mtCOVERAGE_TEST_MARKER();
 
+    }
 
+
 
+    #if ( INCLUDE_vTaskSuspend == 1 )
 
+        {
 
+            if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
 
+            {
 
+                /* Add the task to the suspended task list instead of a delayed task
 
+                 * list to ensure it is not woken by a timing event.  It will block
 
+                 * indefinitely. */
 
+                listINSERT_END( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
 
+            }
 
+            else
 
+            {
 
+                /* Calculate the time at which the task should be woken if the event
 
+                 * does not occur.  This may overflow but this doesn't matter, the
 
+                 * kernel will manage it correctly. */
 
+                xTimeToWake = xConstTickCount + xTicksToWait;
 
+
 
+                /* The list item will be inserted in wake time order. */
 
+                listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
 
+
 
+                if( xTimeToWake < xConstTickCount )
 
+                {
 
+                    /* Wake time has overflowed.  Place this item in the overflow
 
+                     * list. */
 
+                    vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 
+                }
 
+                else
 
+                {
 
+                    /* The wake time has not overflowed, so the current block list
 
+                     * is used. */
 
+                    vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 
+
 
+                    /* If the task entering the blocked state was placed at the
 
+                     * head of the list of blocked tasks then xNextTaskUnblockTime
 
+                     * needs to be updated too. */
 
+                    if( xTimeToWake < xNextTaskUnblockTime )
 
+                    {
 
+                        xNextTaskUnblockTime = xTimeToWake;
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+            }
 
+        }
 
+    #else /* INCLUDE_vTaskSuspend */
 
+        {
 
+            /* Calculate the time at which the task should be woken if the event
 
+             * does not occur.  This may overflow but this doesn't matter, the kernel
 
+             * will manage it correctly. */
 
+            xTimeToWake = xConstTickCount + xTicksToWait;
 
+
 
+            /* The list item will be inserted in wake time order. */
 
+            listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
 
+
 
+            if( xTimeToWake < xConstTickCount )
 
+            {
 
+                /* Wake time has overflowed.  Place this item in the overflow list. */
 
+                vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 
+            }
 
+            else
 
+            {
 
+                /* The wake time has not overflowed, so the current block list is used. */
 
+                vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 
+
 
+                /* If the task entering the blocked state was placed at the head of the
 
+                 * list of blocked tasks then xNextTaskUnblockTime needs to be updated
 
+                 * too. */
 
+                if( xTimeToWake < xNextTaskUnblockTime )
 
+                {
 
+                    xNextTaskUnblockTime = xTimeToWake;
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+            }
 
+
 
+            /* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
 
+            ( void ) xCanBlockIndefinitely;
 
+        }
 
+    #endif /* INCLUDE_vTaskSuspend */
 
+}
 
+
 
+/* Code below here allows additional code to be inserted into this source file,
 
+ * especially where access to file scope functions and data is needed (for example
 
+ * when performing module tests). */
 
+
 
+#ifdef FREERTOS_MODULE_TEST
 
+    #include "tasks_test_access_functions.h"
 
+#endif
 
+
 
+
 
+#if ( configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H == 1 )
 
+
 
+    #include "freertos_tasks_c_additions.h"
 
+
 
+    #ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
 
+        static void freertos_tasks_c_additions_init( void )
 
+        {
 
+            FREERTOS_TASKS_C_ADDITIONS_INIT();
 
+        }
 
+    #endif
 
+
 
+#endif /* if ( configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H == 1 ) */

+ 1118 - 0
FreeRTOS/Source/timers.c
Vedi File 

@@ -0,0 +1,1118 @@
 
+/*
 
+ * FreeRTOS Kernel V10.4.4
 
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 
+ *
 
+ * SPDX-License-Identifier: MIT
 
+ *
 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
 
+ * this software and associated documentation files (the "Software"), to deal in
 
+ * the Software without restriction, including without limitation the rights to
 
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 
+ * the Software, and to permit persons to whom the Software is furnished to do so,
 
+ * subject to the following conditions:
 
+ *
 
+ * The above copyright notice and this permission notice shall be included in all
 
+ * copies or substantial portions of the Software.
 
+ *
 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+ *
 
+ * https://www.FreeRTOS.org
 
+ * https://github.com/FreeRTOS
 
+ *
 
+ */
 
+
 
+/* Standard includes. */
 
+#include <stdlib.h>
 
+
 
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
 
+ * all the API functions to use the MPU wrappers.  That should only be done when
 
+ * task.h is included from an application file. */
 
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
+
 
+#include "FreeRTOS.h"
 
+#include "task.h"
 
+#include "queue.h"
 
+#include "timers.h"
 
+
 
+#if ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 0 )
 
+    #error configUSE_TIMERS must be set to 1 to make the xTimerPendFunctionCall() function available.
 
+#endif
 
+
 
+/* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
 
+ * because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
 
+ * for the header files above, but not in this file, in order to generate the
 
+ * correct privileged Vs unprivileged linkage and placement. */
 
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e9021 !e961 !e750. */
 
+
 
+
 
+/* This entire source file will be skipped if the application is not configured
 
+ * to include software timer functionality.  This #if is closed at the very bottom
 
+ * of this file.  If you want to include software timer functionality then ensure
 
+ * configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
 
+#if ( configUSE_TIMERS == 1 )
 
+
 
+/* Misc definitions. */
 
+    #define tmrNO_DELAY                      ( ( TickType_t ) 0U )
 
+    #define tmrMAX_TIME_BEFORE_OVERFLOW      ( ( TickType_t ) -1 )
 
+
 
+/* The name assigned to the timer service task.  This can be overridden by
 
+ * defining trmTIMER_SERVICE_TASK_NAME in FreeRTOSConfig.h. */
 
+    #ifndef configTIMER_SERVICE_TASK_NAME
 
+        #define configTIMER_SERVICE_TASK_NAME    "Tmr Svc"
 
+    #endif
 
+
 
+/* Bit definitions used in the ucStatus member of a timer structure. */
 
+    #define tmrSTATUS_IS_ACTIVE                  ( ( uint8_t ) 0x01 )
 
+    #define tmrSTATUS_IS_STATICALLY_ALLOCATED    ( ( uint8_t ) 0x02 )
 
+    #define tmrSTATUS_IS_AUTORELOAD              ( ( uint8_t ) 0x04 )
 
+
 
+/* The definition of the timers themselves. */
 
+    typedef struct tmrTimerControl                  /* The old naming convention is used to prevent breaking kernel aware debuggers. */
 
+    {
 
+        const char * pcTimerName;                   /*<< Text name.  This is not used by the kernel, it is included simply to make debugging easier. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+        ListItem_t xTimerListItem;                  /*<< Standard linked list item as used by all kernel features for event management. */
 
+        TickType_t xTimerPeriodInTicks;             /*<< How quickly and often the timer expires. */
 
+        void * pvTimerID;                           /*<< An ID to identify the timer.  This allows the timer to be identified when the same callback is used for multiple timers. */
 
+        TimerCallbackFunction_t pxCallbackFunction; /*<< The function that will be called when the timer expires. */
 
+        #if ( configUSE_TRACE_FACILITY == 1 )
 
+            UBaseType_t uxTimerNumber;              /*<< An ID assigned by trace tools such as FreeRTOS+Trace */
 
+        #endif
 
+        uint8_t ucStatus;                           /*<< Holds bits to say if the timer was statically allocated or not, and if it is active or not. */
 
+    } xTIMER;
 
+
 
+/* The old xTIMER name is maintained above then typedefed to the new Timer_t
 
+ * name below to enable the use of older kernel aware debuggers. */
 
+    typedef xTIMER Timer_t;
 
+
 
+/* The definition of messages that can be sent and received on the timer queue.
 
+ * Two types of message can be queued - messages that manipulate a software timer,
 
+ * and messages that request the execution of a non-timer related callback.  The
 
+ * two message types are defined in two separate structures, xTimerParametersType
 
+ * and xCallbackParametersType respectively. */
 
+    typedef struct tmrTimerParameters
 
+    {
 
+        TickType_t xMessageValue; /*<< An optional value used by a subset of commands, for example, when changing the period of a timer. */
 
+        Timer_t * pxTimer;        /*<< The timer to which the command will be applied. */
 
+    } TimerParameter_t;
 
+
 
+
 
+    typedef struct tmrCallbackParameters
 
+    {
 
+        PendedFunction_t pxCallbackFunction; /* << The callback function to execute. */
 
+        void * pvParameter1;                 /* << The value that will be used as the callback functions first parameter. */
 
+        uint32_t ulParameter2;               /* << The value that will be used as the callback functions second parameter. */
 
+    } CallbackParameters_t;
 
+
 
+/* The structure that contains the two message types, along with an identifier
 
+ * that is used to determine which message type is valid. */
 
+    typedef struct tmrTimerQueueMessage
 
+    {
 
+        BaseType_t xMessageID; /*<< The command being sent to the timer service task. */
 
+        union
 
+        {
 
+            TimerParameter_t xTimerParameters;
 
+
 
+            /* Don't include xCallbackParameters if it is not going to be used as
 
+             * it makes the structure (and therefore the timer queue) larger. */
 
+            #if ( INCLUDE_xTimerPendFunctionCall == 1 )
 
+                CallbackParameters_t xCallbackParameters;
 
+            #endif /* INCLUDE_xTimerPendFunctionCall */
 
+        } u;
 
+    } DaemonTaskMessage_t;
 
+
 
+/*lint -save -e956 A manual analysis and inspection has been used to determine
 
+ * which static variables must be declared volatile. */
 
+
 
+/* The list in which active timers are stored.  Timers are referenced in expire
 
+ * time order, with the nearest expiry time at the front of the list.  Only the
 
+ * timer service task is allowed to access these lists.
 
+ * xActiveTimerList1 and xActiveTimerList2 could be at function scope but that
 
+ * breaks some kernel aware debuggers, and debuggers that reply on removing the
 
+ * static qualifier. */
 
+    PRIVILEGED_DATA static List_t xActiveTimerList1;
 
+    PRIVILEGED_DATA static List_t xActiveTimerList2;
 
+    PRIVILEGED_DATA static List_t * pxCurrentTimerList;
 
+    PRIVILEGED_DATA static List_t * pxOverflowTimerList;
 
+
 
+/* A queue that is used to send commands to the timer service task. */
 
+    PRIVILEGED_DATA static QueueHandle_t xTimerQueue = NULL;
 
+    PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL;
 
+
 
+/*lint -restore */
 
+
 
+/*-----------------------------------------------------------*/
 
+
 
+/*
 
+ * Initialise the infrastructure used by the timer service task if it has not
 
+ * been initialised already.
 
+ */
 
+    static void prvCheckForValidListAndQueue( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * The timer service task (daemon).  Timer functionality is controlled by this
 
+ * task.  Other tasks communicate with the timer service task using the
 
+ * xTimerQueue queue.
 
+ */
 
+    static portTASK_FUNCTION_PROTO( prvTimerTask, pvParameters ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Called by the timer service task to interpret and process a command it
 
+ * received on the timer queue.
 
+ */
 
+    static void prvProcessReceivedCommands( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Insert the timer into either xActiveTimerList1, or xActiveTimerList2,
 
+ * depending on if the expire time causes a timer counter overflow.
 
+ */
 
+    static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer,
 
+                                                  const TickType_t xNextExpiryTime,
 
+                                                  const TickType_t xTimeNow,
 
+                                                  const TickType_t xCommandTime ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Reload the specified auto-reload timer.  If the reloading is backlogged,
 
+ * clear the backlog, calling the callback for each additional reload.  When
 
+ * this function returns, the next expiry time is after xTimeNow.
 
+ */
 
+    static void prvReloadTimer( Timer_t * const pxTimer,
 
+                                TickType_t xExpiredTime,
 
+                                const TickType_t xTimeNow ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * An active timer has reached its expire time.  Reload the timer if it is an
 
+ * auto-reload timer, then call its callback.
 
+ */
 
+    static void prvProcessExpiredTimer( const TickType_t xNextExpireTime,
 
+                                        const TickType_t xTimeNow ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * The tick count has overflowed.  Switch the timer lists after ensuring the
 
+ * current timer list does not still reference some timers.
 
+ */
 
+    static void prvSwitchTimerLists( void ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Obtain the current tick count, setting *pxTimerListsWereSwitched to pdTRUE
 
+ * if a tick count overflow occurred since prvSampleTimeNow() was last called.
 
+ */
 
+    static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * If the timer list contains any active timers then return the expire time of
 
+ * the timer that will expire first and set *pxListWasEmpty to false.  If the
 
+ * timer list does not contain any timers then return 0 and set *pxListWasEmpty
 
+ * to pdTRUE.
 
+ */
 
+    static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * If a timer has expired, process it.  Otherwise, block the timer service task
 
+ * until either a timer does expire or a command is received.
 
+ */
 
+    static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime,
 
+                                            BaseType_t xListWasEmpty ) PRIVILEGED_FUNCTION;
 
+
 
+/*
 
+ * Called after a Timer_t structure has been allocated either statically or
 
+ * dynamically to fill in the structure's members.
 
+ */
 
+    static void prvInitialiseNewTimer( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                                       const TickType_t xTimerPeriodInTicks,
 
+                                       const UBaseType_t uxAutoReload,
 
+                                       void * const pvTimerID,
 
+                                       TimerCallbackFunction_t pxCallbackFunction,
 
+                                       Timer_t * pxNewTimer ) PRIVILEGED_FUNCTION;
 
+/*-----------------------------------------------------------*/
 
+
 
+    BaseType_t xTimerCreateTimerTask( void )
 
+    {
 
+        BaseType_t xReturn = pdFAIL;
 
+
 
+        /* This function is called when the scheduler is started if
 
+         * configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
 
+         * timer service task has been created/initialised.  If timers have already
 
+         * been created then the initialisation will already have been performed. */
 
+        prvCheckForValidListAndQueue();
 
+
 
+        if( xTimerQueue != NULL )
 
+        {
 
+            #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+                {
 
+                    StaticTask_t * pxTimerTaskTCBBuffer = NULL;
 
+                    StackType_t * pxTimerTaskStackBuffer = NULL;
 
+                    uint32_t ulTimerTaskStackSize;
 
+
 
+                    vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
 
+                    xTimerTaskHandle = xTaskCreateStatic( prvTimerTask,
 
+                                                          configTIMER_SERVICE_TASK_NAME,
 
+                                                          ulTimerTaskStackSize,
 
+                                                          NULL,
 
+                                                          ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
 
+                                                          pxTimerTaskStackBuffer,
 
+                                                          pxTimerTaskTCBBuffer );
 
+
 
+                    if( xTimerTaskHandle != NULL )
 
+                    {
 
+                        xReturn = pdPASS;
 
+                    }
 
+                }
 
+            #else /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
 
+                {
 
+                    xReturn = xTaskCreate( prvTimerTask,
 
+                                           configTIMER_SERVICE_TASK_NAME,
 
+                                           configTIMER_TASK_STACK_DEPTH,
 
+                                           NULL,
 
+                                           ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
 
+                                           &xTimerTaskHandle );
 
+                }
 
+            #endif /* configSUPPORT_STATIC_ALLOCATION */
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        configASSERT( xReturn );
 
+        return xReturn;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+
 
+        TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                                    const TickType_t xTimerPeriodInTicks,
 
+                                    const UBaseType_t uxAutoReload,
 
+                                    void * const pvTimerID,
 
+                                    TimerCallbackFunction_t pxCallbackFunction )
 
+        {
 
+            Timer_t * pxNewTimer;
 
+
 
+            pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's mame. */
 
+
 
+            if( pxNewTimer != NULL )
 
+            {
 
+                /* Status is thus far zero as the timer is not created statically
 
+                 * and has not been started.  The auto-reload bit may get set in
 
+                 * prvInitialiseNewTimer. */
 
+                pxNewTimer->ucStatus = 0x00;
 
+                prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
 
+            }
 
+
 
+            return pxNewTimer;
 
+        }
 
+
 
+    #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
+/*-----------------------------------------------------------*/
 
+
 
+    #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+
 
+        TimerHandle_t xTimerCreateStatic( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                                          const TickType_t xTimerPeriodInTicks,
 
+                                          const UBaseType_t uxAutoReload,
 
+                                          void * const pvTimerID,
 
+                                          TimerCallbackFunction_t pxCallbackFunction,
 
+                                          StaticTimer_t * pxTimerBuffer )
 
+        {
 
+            Timer_t * pxNewTimer;
 
+
 
+            #if ( configASSERT_DEFINED == 1 )
 
+                {
 
+                    /* Sanity check that the size of the structure used to declare a
 
+                     * variable of type StaticTimer_t equals the size of the real timer
 
+                     * structure. */
 
+                    volatile size_t xSize = sizeof( StaticTimer_t );
 
+                    configASSERT( xSize == sizeof( Timer_t ) );
 
+                    ( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
 
+                }
 
+            #endif /* configASSERT_DEFINED */
 
+
 
+            /* A pointer to a StaticTimer_t structure MUST be provided, use it. */
 
+            configASSERT( pxTimerBuffer );
 
+            pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
 
+
 
+            if( pxNewTimer != NULL )
 
+            {
 
+                /* Timers can be created statically or dynamically so note this
 
+                 * timer was created statically in case it is later deleted.  The
 
+                 * auto-reload bit may get set in prvInitialiseNewTimer(). */
 
+                pxNewTimer->ucStatus = tmrSTATUS_IS_STATICALLY_ALLOCATED;
 
+
 
+                prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
 
+            }
 
+
 
+            return pxNewTimer;
 
+        }
 
+
 
+    #endif /* configSUPPORT_STATIC_ALLOCATION */
 
+/*-----------------------------------------------------------*/
 
+
 
+    static void prvInitialiseNewTimer( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+                                       const TickType_t xTimerPeriodInTicks,
 
+                                       const UBaseType_t uxAutoReload,
 
+                                       void * const pvTimerID,
 
+                                       TimerCallbackFunction_t pxCallbackFunction,
 
+                                       Timer_t * pxNewTimer )
 
+    {
 
+        /* 0 is not a valid value for xTimerPeriodInTicks. */
 
+        configASSERT( ( xTimerPeriodInTicks > 0 ) );
 
+
 
+        /* Ensure the infrastructure used by the timer service task has been
 
+            * created/initialised. */
 
+        prvCheckForValidListAndQueue();
 
+
 
+        /* Initialise the timer structure members using the function
 
+            * parameters. */
 
+        pxNewTimer->pcTimerName = pcTimerName;
 
+        pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
 
+        pxNewTimer->pvTimerID = pvTimerID;
 
+        pxNewTimer->pxCallbackFunction = pxCallbackFunction;
 
+        vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
 
+
 
+        if( uxAutoReload != pdFALSE )
 
+        {
 
+            pxNewTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
 
+        }
 
+
 
+        traceTIMER_CREATE( pxNewTimer );
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    BaseType_t xTimerGenericCommand( TimerHandle_t xTimer,
 
+                                     const BaseType_t xCommandID,
 
+                                     const TickType_t xOptionalValue,
 
+                                     BaseType_t * const pxHigherPriorityTaskWoken,
 
+                                     const TickType_t xTicksToWait )
 
+    {
 
+        BaseType_t xReturn = pdFAIL;
 
+        DaemonTaskMessage_t xMessage;
 
+
 
+        configASSERT( xTimer );
 
+
 
+        /* Send a message to the timer service task to perform a particular action
 
+         * on a particular timer definition. */
 
+        if( xTimerQueue != NULL )
 
+        {
 
+            /* Send a command to the timer service task to start the xTimer timer. */
 
+            xMessage.xMessageID = xCommandID;
 
+            xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
 
+            xMessage.u.xTimerParameters.pxTimer = xTimer;
 
+
 
+            if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
 
+            {
 
+                if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
 
+                {
 
+                    xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
 
+                }
 
+                else
 
+                {
 
+                    xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
 
+                }
 
+            }
 
+            else
 
+            {
 
+                xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
 
+            }
 
+
 
+            traceTIMER_COMMAND_SEND( xTimer, xCommandID, xOptionalValue, xReturn );
 
+        }
 
+        else
 
+        {
 
+            mtCOVERAGE_TEST_MARKER();
 
+        }
 
+
 
+        return xReturn;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    TaskHandle_t xTimerGetTimerDaemonTaskHandle( void )
 
+    {
 
+        /* If xTimerGetTimerDaemonTaskHandle() is called before the scheduler has been
 
+         * started, then xTimerTaskHandle will be NULL. */
 
+        configASSERT( ( xTimerTaskHandle != NULL ) );
 
+        return xTimerTaskHandle;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    TickType_t xTimerGetPeriod( TimerHandle_t xTimer )
 
+    {
 
+        Timer_t * pxTimer = xTimer;
 
+
 
+        configASSERT( xTimer );
 
+        return pxTimer->xTimerPeriodInTicks;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    void vTimerSetReloadMode( TimerHandle_t xTimer,
 
+                              const UBaseType_t uxAutoReload )
 
+    {
 
+        Timer_t * pxTimer = xTimer;
 
+
 
+        configASSERT( xTimer );
 
+        taskENTER_CRITICAL();
 
+        {
 
+            if( uxAutoReload != pdFALSE )
 
+            {
 
+                pxTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
 
+            }
 
+            else
 
+            {
 
+                pxTimer->ucStatus &= ~tmrSTATUS_IS_AUTORELOAD;
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer )
 
+    {
 
+        Timer_t * pxTimer = xTimer;
 
+        UBaseType_t uxReturn;
 
+
 
+        configASSERT( xTimer );
 
+        taskENTER_CRITICAL();
 
+        {
 
+            if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) == 0 )
 
+            {
 
+                /* Not an auto-reload timer. */
 
+                uxReturn = ( UBaseType_t ) pdFALSE;
 
+            }
 
+            else
 
+            {
 
+                /* Is an auto-reload timer. */
 
+                uxReturn = ( UBaseType_t ) pdTRUE;
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return uxReturn;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer )
 
+    {
 
+        Timer_t * pxTimer = xTimer;
 
+        TickType_t xReturn;
 
+
 
+        configASSERT( xTimer );
 
+        xReturn = listGET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ) );
 
+        return xReturn;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    const char * pcTimerGetName( TimerHandle_t xTimer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
+    {
 
+        Timer_t * pxTimer = xTimer;
 
+
 
+        configASSERT( xTimer );
 
+        return pxTimer->pcTimerName;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static void prvReloadTimer( Timer_t * const pxTimer,
 
+                                TickType_t xExpiredTime,
 
+                                const TickType_t xTimeNow )
 
+    {
 
+        /* Insert the timer into the appropriate list for the next expiry time.
 
+         * If the next expiry time has already passed, advance the expiry time,
 
+         * call the callback function, and try again. */
 
+        while ( prvInsertTimerInActiveList( pxTimer, ( xExpiredTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xExpiredTime ) != pdFALSE )
 
+        {
 
+            /* Advance the expiry time. */
 
+            xExpiredTime += pxTimer->xTimerPeriodInTicks;
 
+
 
+            /* Call the timer callback. */
 
+            traceTIMER_EXPIRED( pxTimer );
 
+            pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 
+        }
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static void prvProcessExpiredTimer( const TickType_t xNextExpireTime,
 
+                                        const TickType_t xTimeNow )
 
+    {
 
+        Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 
+
 
+        /* Remove the timer from the list of active timers.  A check has already
 
+         * been performed to ensure the list is not empty. */
 
+        ( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 
+
 
+        /* If the timer is an auto-reload timer then calculate the next
 
+         * expiry time and re-insert the timer in the list of active timers. */
 
+        if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 
+        {
 
+            prvReloadTimer( pxTimer, xNextExpireTime, xTimeNow );
 
+        }
 
+        else
 
+        {
 
+            pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 
+        }
 
+
 
+        /* Call the timer callback. */
 
+        traceTIMER_EXPIRED( pxTimer );
 
+        pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static portTASK_FUNCTION( prvTimerTask, pvParameters )
 
+    {
 
+        TickType_t xNextExpireTime;
 
+        BaseType_t xListWasEmpty;
 
+
 
+        /* Just to avoid compiler warnings. */
 
+        ( void ) pvParameters;
 
+
 
+        #if ( configUSE_DAEMON_TASK_STARTUP_HOOK == 1 )
 
+            {
 
+                extern void vApplicationDaemonTaskStartupHook( void );
 
+
 
+                /* Allow the application writer to execute some code in the context of
 
+                 * this task at the point the task starts executing.  This is useful if the
 
+                 * application includes initialisation code that would benefit from
 
+                 * executing after the scheduler has been started. */
 
+                vApplicationDaemonTaskStartupHook();
 
+            }
 
+        #endif /* configUSE_DAEMON_TASK_STARTUP_HOOK */
 
+
 
+        for( ; ; )
 
+        {
 
+            /* Query the timers list to see if it contains any timers, and if so,
 
+             * obtain the time at which the next timer will expire. */
 
+            xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 
+
 
+            /* If a timer has expired, process it.  Otherwise, block this task
 
+             * until either a timer does expire, or a command is received. */
 
+            prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
 
+
 
+            /* Empty the command queue. */
 
+            prvProcessReceivedCommands();
 
+        }
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime,
 
+                                            BaseType_t xListWasEmpty )
 
+    {
 
+        TickType_t xTimeNow;
 
+        BaseType_t xTimerListsWereSwitched;
 
+
 
+        vTaskSuspendAll();
 
+        {
 
+            /* Obtain the time now to make an assessment as to whether the timer
 
+             * has expired or not.  If obtaining the time causes the lists to switch
 
+             * then don't process this timer as any timers that remained in the list
 
+             * when the lists were switched will have been processed within the
 
+             * prvSampleTimeNow() function. */
 
+            xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 
+
 
+            if( xTimerListsWereSwitched == pdFALSE )
 
+            {
 
+                /* The tick count has not overflowed, has the timer expired? */
 
+                if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
 
+                {
 
+                    ( void ) xTaskResumeAll();
 
+                    prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
 
+                }
 
+                else
 
+                {
 
+                    /* The tick count has not overflowed, and the next expire
 
+                     * time has not been reached yet.  This task should therefore
 
+                     * block to wait for the next expire time or a command to be
 
+                     * received - whichever comes first.  The following line cannot
 
+                     * be reached unless xNextExpireTime > xTimeNow, except in the
 
+                     * case when the current timer list is empty. */
 
+                    if( xListWasEmpty != pdFALSE )
 
+                    {
 
+                        /* The current timer list is empty - is the overflow list
 
+                         * also empty? */
 
+                        xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
 
+                    }
 
+
 
+                    vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
 
+
 
+                    if( xTaskResumeAll() == pdFALSE )
 
+                    {
 
+                        /* Yield to wait for either a command to arrive, or the
 
+                         * block time to expire.  If a command arrived between the
 
+                         * critical section being exited and this yield then the yield
 
+                         * will not cause the task to block. */
 
+                        portYIELD_WITHIN_API();
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+            }
 
+            else
 
+            {
 
+                ( void ) xTaskResumeAll();
 
+            }
 
+        }
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
 
+    {
 
+        TickType_t xNextExpireTime;
 
+
 
+        /* Timers are listed in expiry time order, with the head of the list
 
+         * referencing the task that will expire first.  Obtain the time at which
 
+         * the timer with the nearest expiry time will expire.  If there are no
 
+         * active timers then just set the next expire time to 0.  That will cause
 
+         * this task to unblock when the tick count overflows, at which point the
 
+         * timer lists will be switched and the next expiry time can be
 
+         * re-assessed.  */
 
+        *pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
 
+
 
+        if( *pxListWasEmpty == pdFALSE )
 
+        {
 
+            xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 
+        }
 
+        else
 
+        {
 
+            /* Ensure the task unblocks when the tick count rolls over. */
 
+            xNextExpireTime = ( TickType_t ) 0U;
 
+        }
 
+
 
+        return xNextExpireTime;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
 
+    {
 
+        TickType_t xTimeNow;
 
+        PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */
 
+
 
+        xTimeNow = xTaskGetTickCount();
 
+
 
+        if( xTimeNow < xLastTime )
 
+        {
 
+            prvSwitchTimerLists();
 
+            *pxTimerListsWereSwitched = pdTRUE;
 
+        }
 
+        else
 
+        {
 
+            *pxTimerListsWereSwitched = pdFALSE;
 
+        }
 
+
 
+        xLastTime = xTimeNow;
 
+
 
+        return xTimeNow;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer,
 
+                                                  const TickType_t xNextExpiryTime,
 
+                                                  const TickType_t xTimeNow,
 
+                                                  const TickType_t xCommandTime )
 
+    {
 
+        BaseType_t xProcessTimerNow = pdFALSE;
 
+
 
+        listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
 
+        listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 
+
 
+        if( xNextExpiryTime <= xTimeNow )
 
+        {
 
+            /* Has the expiry time elapsed between the command to start/reset a
 
+             * timer was issued, and the time the command was processed? */
 
+            if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 
+            {
 
+                /* The time between a command being issued and the command being
 
+                 * processed actually exceeds the timers period.  */
 
+                xProcessTimerNow = pdTRUE;
 
+            }
 
+            else
 
+            {
 
+                vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
 
+            }
 
+        }
 
+        else
 
+        {
 
+            if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
 
+            {
 
+                /* If, since the command was issued, the tick count has overflowed
 
+                 * but the expiry time has not, then the timer must have already passed
 
+                 * its expiry time and should be processed immediately. */
 
+                xProcessTimerNow = pdTRUE;
 
+            }
 
+            else
 
+            {
 
+                vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 
+            }
 
+        }
 
+
 
+        return xProcessTimerNow;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static void prvProcessReceivedCommands( void )
 
+    {
 
+        DaemonTaskMessage_t xMessage;
 
+        Timer_t * pxTimer;
 
+        BaseType_t xTimerListsWereSwitched;
 
+        TickType_t xTimeNow;
 
+
 
+        while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 
+        {
 
+            #if ( INCLUDE_xTimerPendFunctionCall == 1 )
 
+                {
 
+                    /* Negative commands are pended function calls rather than timer
 
+                     * commands. */
 
+                    if( xMessage.xMessageID < ( BaseType_t ) 0 )
 
+                    {
 
+                        const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
 
+
 
+                        /* The timer uses the xCallbackParameters member to request a
 
+                         * callback be executed.  Check the callback is not NULL. */
 
+                        configASSERT( pxCallback );
 
+
 
+                        /* Call the function. */
 
+                        pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
 
+                    }
 
+                    else
 
+                    {
 
+                        mtCOVERAGE_TEST_MARKER();
 
+                    }
 
+                }
 
+            #endif /* INCLUDE_xTimerPendFunctionCall */
 
+
 
+            /* Commands that are positive are timer commands rather than pended
 
+             * function calls. */
 
+            if( xMessage.xMessageID >= ( BaseType_t ) 0 )
 
+            {
 
+                /* The messages uses the xTimerParameters member to work on a
 
+                 * software timer. */
 
+                pxTimer = xMessage.u.xTimerParameters.pxTimer;
 
+
 
+                if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
 
+                {
 
+                    /* The timer is in a list, remove it. */
 
+                    ( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 
+                }
 
+                else
 
+                {
 
+                    mtCOVERAGE_TEST_MARKER();
 
+                }
 
+
 
+                traceTIMER_COMMAND_RECEIVED( pxTimer, xMessage.xMessageID, xMessage.u.xTimerParameters.xMessageValue );
 
+
 
+                /* In this case the xTimerListsWereSwitched parameter is not used, but
 
+                 *  it must be present in the function call.  prvSampleTimeNow() must be
 
+                 *  called after the message is received from xTimerQueue so there is no
 
+                 *  possibility of a higher priority task adding a message to the message
 
+                 *  queue with a time that is ahead of the timer daemon task (because it
 
+                 *  pre-empted the timer daemon task after the xTimeNow value was set). */
 
+                xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 
+
 
+                switch( xMessage.xMessageID )
 
+                {
 
+                    case tmrCOMMAND_START:
 
+                    case tmrCOMMAND_START_FROM_ISR:
 
+                    case tmrCOMMAND_RESET:
 
+                    case tmrCOMMAND_RESET_FROM_ISR:
 
+                        /* Start or restart a timer. */
 
+                        pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 
+
 
+                        if( prvInsertTimerInActiveList( pxTimer, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
 
+                        {
 
+                            /* The timer expired before it was added to the active
 
+                             * timer list.  Process it now. */
 
+                            if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 
+                            {
 
+                                prvReloadTimer( pxTimer, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow );
 
+                            }
 
+                            else
 
+                            {
 
+                                pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 
+                            }
 
+
 
+                            /* Call the timer callback. */
 
+                            traceTIMER_EXPIRED( pxTimer );
 
+                            pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+
 
+                        break;
 
+
 
+                    case tmrCOMMAND_STOP:
 
+                    case tmrCOMMAND_STOP_FROM_ISR:
 
+                        /* The timer has already been removed from the active list. */
 
+                        pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 
+                        break;
 
+
 
+                    case tmrCOMMAND_CHANGE_PERIOD:
 
+                    case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR:
 
+                        pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 
+                        pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
 
+                        configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
 
+
 
+                        /* The new period does not really have a reference, and can
 
+                         * be longer or shorter than the old one.  The command time is
 
+                         * therefore set to the current time, and as the period cannot
 
+                         * be zero the next expiry time can only be in the future,
 
+                         * meaning (unlike for the xTimerStart() case above) there is
 
+                         * no fail case that needs to be handled here. */
 
+                        ( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
 
+                        break;
 
+
 
+                    case tmrCOMMAND_DELETE:
 
+                        #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
+                            {
 
+                                /* The timer has already been removed from the active list,
 
+                                 * just free up the memory if the memory was dynamically
 
+                                 * allocated. */
 
+                                if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
 
+                                {
 
+                                    vPortFree( pxTimer );
 
+                                }
 
+                                else
 
+                                {
 
+                                    pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 
+                                }
 
+                            }
 
+                        #else /* if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) */
 
+                            {
 
+                                /* If dynamic allocation is not enabled, the memory
 
+                                 * could not have been dynamically allocated. So there is
 
+                                 * no need to free the memory - just mark the timer as
 
+                                 * "not active". */
 
+                                pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 
+                            }
 
+                        #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
 
+                        break;
 
+
 
+                    default:
 
+                        /* Don't expect to get here. */
 
+                        break;
 
+                }
 
+            }
 
+        }
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static void prvSwitchTimerLists( void )
 
+    {
 
+        TickType_t xNextExpireTime;
 
+        List_t * pxTemp;
 
+
 
+        /* The tick count has overflowed.  The timer lists must be switched.
 
+         * If there are any timers still referenced from the current timer list
 
+         * then they must have expired and should be processed before the lists
 
+         * are switched. */
 
+        while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 
+        {
 
+            xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 
+
 
+            /* Process the expired timer.  For auto-reload timers, be careful to
 
+             * process only expirations that occur on the current list.  Further
 
+             * expirations must wait until after the lists are switched. */
 
+            prvProcessExpiredTimer( xNextExpireTime, tmrMAX_TIME_BEFORE_OVERFLOW );
 
+        }
 
+
 
+        pxTemp = pxCurrentTimerList;
 
+        pxCurrentTimerList = pxOverflowTimerList;
 
+        pxOverflowTimerList = pxTemp;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    static void prvCheckForValidListAndQueue( void )
 
+    {
 
+        /* Check that the list from which active timers are referenced, and the
 
+         * queue used to communicate with the timer service, have been
 
+         * initialised. */
 
+        taskENTER_CRITICAL();
 
+        {
 
+            if( xTimerQueue == NULL )
 
+            {
 
+                vListInitialise( &xActiveTimerList1 );
 
+                vListInitialise( &xActiveTimerList2 );
 
+                pxCurrentTimerList = &xActiveTimerList1;
 
+                pxOverflowTimerList = &xActiveTimerList2;
 
+
 
+                #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
+                    {
 
+                        /* The timer queue is allocated statically in case
 
+                         * configSUPPORT_DYNAMIC_ALLOCATION is 0. */
 
+                        PRIVILEGED_DATA static StaticQueue_t xStaticTimerQueue;                                                                          /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
 
+                        PRIVILEGED_DATA static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
 
+
 
+                        xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
 
+                    }
 
+                #else
 
+                    {
 
+                        xTimerQueue = xQueueCreate( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ) );
 
+                    }
 
+                #endif /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
 
+
 
+                #if ( configQUEUE_REGISTRY_SIZE > 0 )
 
+                    {
 
+                        if( xTimerQueue != NULL )
 
+                        {
 
+                            vQueueAddToRegistry( xTimerQueue, "TmrQ" );
 
+                        }
 
+                        else
 
+                        {
 
+                            mtCOVERAGE_TEST_MARKER();
 
+                        }
 
+                    }
 
+                #endif /* configQUEUE_REGISTRY_SIZE */
 
+            }
 
+            else
 
+            {
 
+                mtCOVERAGE_TEST_MARKER();
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
 
+    {
 
+        BaseType_t xReturn;
 
+        Timer_t * pxTimer = xTimer;
 
+
 
+        configASSERT( xTimer );
 
+
 
+        /* Is the timer in the list of active timers? */
 
+        taskENTER_CRITICAL();
 
+        {
 
+            if( ( pxTimer->ucStatus & tmrSTATUS_IS_ACTIVE ) == 0 )
 
+            {
 
+                xReturn = pdFALSE;
 
+            }
 
+            else
 
+            {
 
+                xReturn = pdTRUE;
 
+            }
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return xReturn;
 
+    } /*lint !e818 Can't be pointer to const due to the typedef. */
 
+/*-----------------------------------------------------------*/
 
+
 
+    void * pvTimerGetTimerID( const TimerHandle_t xTimer )
 
+    {
 
+        Timer_t * const pxTimer = xTimer;
 
+        void * pvReturn;
 
+
 
+        configASSERT( xTimer );
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            pvReturn = pxTimer->pvTimerID;
 
+        }
 
+        taskEXIT_CRITICAL();
 
+
 
+        return pvReturn;
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    void vTimerSetTimerID( TimerHandle_t xTimer,
 
+                           void * pvNewID )
 
+    {
 
+        Timer_t * const pxTimer = xTimer;
 
+
 
+        configASSERT( xTimer );
 
+
 
+        taskENTER_CRITICAL();
 
+        {
 
+            pxTimer->pvTimerID = pvNewID;
 
+        }
 
+        taskEXIT_CRITICAL();
 
+    }
 
+/*-----------------------------------------------------------*/
 
+
 
+    #if ( INCLUDE_xTimerPendFunctionCall == 1 )
 
+
 
+        BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
 
+                                                  void * pvParameter1,
 
+                                                  uint32_t ulParameter2,
 
+                                                  BaseType_t * pxHigherPriorityTaskWoken )
 
+        {
 
+            DaemonTaskMessage_t xMessage;
 
+            BaseType_t xReturn;
 
+
 
+            /* Complete the message with the function parameters and post it to the
 
+             * daemon task. */
 
+            xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR;
 
+            xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
 
+            xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
 
+            xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
 
+
 
+            xReturn = xQueueSendFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
 
+
 
+            tracePEND_FUNC_CALL_FROM_ISR( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
 
+
 
+            return xReturn;
 
+        }
 
+
 
+    #endif /* INCLUDE_xTimerPendFunctionCall */
 
+/*-----------------------------------------------------------*/
 
+
 
+    #if ( INCLUDE_xTimerPendFunctionCall == 1 )
 
+
 
+        BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
 
+                                           void * pvParameter1,
 
+                                           uint32_t ulParameter2,
 
+                                           TickType_t xTicksToWait )
 
+        {
 
+            DaemonTaskMessage_t xMessage;
 
+            BaseType_t xReturn;
 
+
 
+            /* This function can only be called after a timer has been created or
 
+             * after the scheduler has been started because, until then, the timer
 
+             * queue does not exist. */
 
+            configASSERT( xTimerQueue );
 
+
 
+            /* Complete the message with the function parameters and post it to the
 
+             * daemon task. */
 
+            xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK;
 
+            xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
 
+            xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
 
+            xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
 
+
 
+            xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
 
+
 
+            tracePEND_FUNC_CALL( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
 
+
 
+            return xReturn;
 
+        }
 
+
 
+    #endif /* INCLUDE_xTimerPendFunctionCall */
 
+/*-----------------------------------------------------------*/
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+        UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer )
 
+        {
 
+            return ( ( Timer_t * ) xTimer )->uxTimerNumber;
 
+        }
 
+
 
+    #endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+    #if ( configUSE_TRACE_FACILITY == 1 )
 
+
 
+        void vTimerSetTimerNumber( TimerHandle_t xTimer,
 
+                                   UBaseType_t uxTimerNumber )
 
+        {
 
+            ( ( Timer_t * ) xTimer )->uxTimerNumber = uxTimerNumber;
 
+        }
 
+
 
+    #endif /* configUSE_TRACE_FACILITY */
 
+/*-----------------------------------------------------------*/
 
+
 
+/* This entire source file will be skipped if the application is not configured
 
+ * to include software timer functionality.  If you want to include software timer
 
+ * functionality then ensure configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
 
+#endif /* configUSE_TIMERS == 1 */

+ 219 - 0
Project_Settings/Debugger/S32K146_4G_Debug_FLASH_PNE.launch
Vedi File 

@@ -0,0 +1,219 @@
 
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
 
+<launchConfiguration type="com.pemicro.debug.gdbjtag.pne.launchConfigurationType">
 
+<booleanAttribute key="com.nxp.s32ds.ext.cdt.debug.svd.ask_before_clean" value="false"/>
 
+<booleanAttribute key="com.nxp.s32ds.ext.cdt.debug.svd.clean_watch_view" value="false"/>
 
+<stringAttribute key="com.nxp.s32ds.ext.cdt.debug.svd.merge_strategy" value="ALL"/>
 
+<stringAttribute key="com.nxp.s32ds.ext.cdt.debug.svd.svd_path" value=""/>
 
+<booleanAttribute key="com.nxp.s32ds.ext.cdt.debug.svd.use_default" value="true"/>
 
+<listAttribute key="com.pemicro.debug.gdbjtag.pne.ELVES"/>
 
+<listAttribute key="com.pemicro.debug.gdbjtag.pne.ELVES_OFFSET"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.NUMBER_ELVES" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.BUSERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.CHKERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.CORERESET" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.DEVICE_NAME" value="NXP_S32K1xx_S32K146F1M0M11"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.GDB_OPTIONS" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.HARDERR" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.PE.HARDWARE_INTERFACE" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.INTERR" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.LAST_ATTRIBUTE_HEADER" value="com.pemicro.debug.gdbjtag.pne.ml."/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.MMERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.NOCPERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STATERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STREAMING_ENABLE_PORT1" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STREAMING_SERVER_PORT1" value="10224"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.USE_EXTERNAL_SERVER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.algorithmIndex" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.alternativeAlgorithmPath" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.attachToRunning" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.customTrimFrequency" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doContinue" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doGdbServerAllocateSemihostingConsole" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doPartitioning" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihosting" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihostingIoclientGdbClient" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihostingIoclientTelnet" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.eraseCommandParam" value="EM"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.eraseOptionIndex" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.eraseOptionsenabled" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.executeUnlockCommand" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set tcp auto-retry on&#13;&#10;set tcp connect-timeout 240&#13;&#10;set remotetimeout 60"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.gdbClientOtherOptions" value=""/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.gdbServerTelnetPortNumber" value="51794"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.gdbmiPortNumber" value="6224"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.jtagPreIrBits" value="0"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.jtagTapNumber" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.macScript" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.macScriptEnable" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.ml.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.INTERFACE_PORT_STRING" value="USB1"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_UP_DELAY" value="1000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.ml.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.STARTUP_USE_SWD" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SWO_BAUDRATE_SWITCH_MULTILINK_VALUE" value="-1.000000"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SWO_BAUDRATE_SWITCH_TARGET_VALUE" value="-1.000000"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.otherRunCommands" value=""/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.partitionParam" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory0" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory1" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory2" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom0" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom1" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom2" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo0" value="3"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo1" value="3"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo2" value="3"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preservePartioning" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.programtrim" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.sda.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_DOWN_DELAY" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_UP_DELAY" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.sda.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.STARTUP_USE_SWD" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.selectedCoreNumber" value="1"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.serverPortNumber" value="7224"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useAlternativeAlgorithm" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useCustomTrim" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useDaisyChain" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU ARM PEMicro Interface"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDeviceId" value="com.pemicro.debug.gdbjtag.pne.jtagdeviceid"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${S32DS_GDB_ARM32_EXE}"/>
 
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
 
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug_FLASH/S32K146_4G.elf"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="S32K146_4G"/>
 
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.222968549"/>
 
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
 
+<listEntry value="/S32K146_4G"/>
 
+</listAttribute>
 
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
 
+<listEntry value="4"/>
 
+</listAttribute>
 
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;&#13;&#10;"/>
 
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
 
+</launchConfiguration>

+ 210 - 0
Project_Settings/Debugger/S32K146_4G_Debug_RAM_PNE.launch
Vedi File 

@@ -0,0 +1,210 @@
 
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
 
+<launchConfiguration type="com.pemicro.debug.gdbjtag.pne.launchConfigurationType">
 
+<stringAttribute key="com.nxp.s32ds.ext.cdt.debug.svd.merge_strategy" value="ALL"/>
 
+<listAttribute key="com.pemicro.debug.gdbjtag.pne.ELVES"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.NUMBER_ELVES" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.BUSERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.CHKERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.CORERESET" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.DEVICE_NAME" value="NXP_S32K1xx_S32K146F1M0M11"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.GDB_OPTIONS" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.HARDERR" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.PE.HARDWARE_INTERFACE" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.INTERR" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.LAST_ATTRIBUTE_HEADER" value="com.pemicro.debug.gdbjtag.pne.ml."/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.MMERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.NOCPERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STATERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STREAMING_ENABLE_PORT1" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STREAMING_SERVER_PORT1" value="10224"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.USE_EXTERNAL_SERVER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.algorithmIndex" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.alternativeAlgorithmPath" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.attachToRunning" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.customTrimFrequency" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.INTERFACE_PORT_STRING" value="COM1"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doContinue" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doGdbServerAllocateSemihostingConsole" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doPartitioning" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihosting" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihostingIoclientGdbClient" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihostingIoclientTelnet" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.eraseCommandParam" value="EM"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.eraseOptionIndex" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.eraseOptionsenabled" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.executeUnlockCommand" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set tcp auto-retry on&#13;&#10;set tcp connect-timeout 240&#13;&#10;set remotetimeout 60"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.gdbClientOtherOptions" value=""/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.gdbServerTelnetPortNumber" value="51794"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.gdbmiPortNumber" value="6224"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.jtagPreIrBits" value="0"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.jtagTapNumber" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.macScript" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.macScriptEnable" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.ml.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_UP_DELAY" value="1000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.ml.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.STARTUP_USE_SWD" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.otherRunCommands" value=""/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.partitionParam" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory0" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory1" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory2" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom0" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom1" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom2" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo0" value="3"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo1" value="3"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo2" value="3"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preservePartioning" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.programtrim" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.sda.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_DOWN_DELAY" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_UP_DELAY" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.sda.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.STARTUP_USE_SWD" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.selectedCoreNumber" value="1"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.serverPortNumber" value="7224"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useAlternativeAlgorithm" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useCustomTrim" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useDaisyChain" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU ARM PEMicro Interface"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${S32DS_GDB_ARM32_EXE}"/>
 
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
 
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug_RAM/S32K146_4G.elf"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="S32K146_4G"/>
 
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.debug.ram.800707771"/>
 
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
 
+<listEntry value="/S32K146_4G"/>
 
+</listAttribute>
 
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
 
+<listEntry value="4"/>
 
+</listAttribute>
 
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
 
+</launchConfiguration>

+ 210 - 0
Project_Settings/Debugger/S32K146_4G_Release_FLASH_PNE.launch
Vedi File 

@@ -0,0 +1,210 @@
 
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
 
+<launchConfiguration type="com.pemicro.debug.gdbjtag.pne.launchConfigurationType">
 
+<stringAttribute key="com.nxp.s32ds.ext.cdt.debug.svd.merge_strategy" value="ALL"/>
 
+<listAttribute key="com.pemicro.debug.gdbjtag.pne.ELVES"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.NUMBER_ELVES" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.BUSERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.CHKERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.CORERESET" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.DEVICE_NAME" value="NXP_S32K1xx_S32K146F1M0M11"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.GDB_OPTIONS" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.HARDERR" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.PE.HARDWARE_INTERFACE" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.INTERR" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.LAST_ATTRIBUTE_HEADER" value="com.pemicro.debug.gdbjtag.pne.ml."/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.MMERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.NOCPERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STATERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STREAMING_ENABLE_PORT1" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STREAMING_SERVER_PORT1" value="10224"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.USE_EXTERNAL_SERVER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.algorithmIndex" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.alternativeAlgorithmPath" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.attachToRunning" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.customTrimFrequency" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.INTERFACE_PORT_STRING" value="COM1"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doContinue" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doGdbServerAllocateSemihostingConsole" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doPartitioning" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihosting" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihostingIoclientGdbClient" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihostingIoclientTelnet" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.eraseCommandParam" value="EM"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.eraseOptionIndex" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.eraseOptionsenabled" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.executeUnlockCommand" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set tcp auto-retry on&#13;&#10;set tcp connect-timeout 240&#13;&#10;set remotetimeout 60"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.gdbClientOtherOptions" value=""/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.gdbServerTelnetPortNumber" value="51794"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.gdbmiPortNumber" value="6224"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.jtagPreIrBits" value="0"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.jtagTapNumber" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.macScript" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.macScriptEnable" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.ml.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_UP_DELAY" value="1000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.ml.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.STARTUP_USE_SWD" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.otherRunCommands" value=""/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.partitionParam" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory0" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory1" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory2" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom0" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom1" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom2" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo0" value="3"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo1" value="3"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo2" value="3"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preservePartioning" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.programtrim" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.sda.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_DOWN_DELAY" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_UP_DELAY" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.sda.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.STARTUP_USE_SWD" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.selectedCoreNumber" value="1"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.serverPortNumber" value="7224"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useAlternativeAlgorithm" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useCustomTrim" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useDaisyChain" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU ARM PEMicro Interface"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${S32DS_GDB_ARM32_EXE}"/>
 
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
 
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Release_FLASH/S32K146_4G.elf"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="S32K146_4G"/>
 
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.95203412"/>
 
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
 
+<listEntry value="/S32K146_4G"/>
 
+</listAttribute>
 
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
 
+<listEntry value="4"/>
 
+</listAttribute>
 
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
 
+</launchConfiguration>

+ 210 - 0
Project_Settings/Debugger/S32K146_4G_Release_RAM_PNE.launch
Vedi File 

@@ -0,0 +1,210 @@
 
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
 
+<launchConfiguration type="com.pemicro.debug.gdbjtag.pne.launchConfigurationType">
 
+<stringAttribute key="com.nxp.s32ds.ext.cdt.debug.svd.merge_strategy" value="ALL"/>
 
+<listAttribute key="com.pemicro.debug.gdbjtag.pne.ELVES"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.NUMBER_ELVES" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.BUSERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.CHKERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.CORERESET" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.DEVICE_NAME" value="NXP_S32K1xx_S32K146F1M0M11"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.GDB_OPTIONS" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.HARDERR" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.PE.HARDWARE_INTERFACE" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.INTERR" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.LAST_ATTRIBUTE_HEADER" value="com.pemicro.debug.gdbjtag.pne.ml."/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.MMERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.NOCPERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STATERR" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STREAMING_ENABLE_PORT1" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.PE.STREAMING_SERVER_PORT1" value="10224"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.PE.USE_EXTERNAL_SERVER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.algorithmIndex" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.alternativeAlgorithmPath" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.attachToRunning" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.customTrimFrequency" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_eth.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.INTERFACE_PORT_STRING" value="COM1"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_ser.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.cyc_usb.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doContinue" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doGdbServerAllocateSemihostingConsole" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.doPartitioning" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihosting" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihostingIoclientGdbClient" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.enableSemihostingIoclientTelnet" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.eraseCommandParam" value="EM"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.eraseOptionIndex" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.eraseOptionsenabled" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.executeUnlockCommand" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set tcp auto-retry on&#13;&#10;set tcp connect-timeout 240&#13;&#10;set remotetimeout 60"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.gdbClientOtherOptions" value=""/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.gdbServerTelnetPortNumber" value="51794"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.gdbmiPortNumber" value="6224"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.jtagPreIrBits" value="0"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.jtagTapNumber" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.macScript" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.macScriptEnable" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.ml.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.POWER_UP_DELAY" value="1000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.ml.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.ml.STARTUP_USE_SWD" value="true"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.otherRunCommands" value=""/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.partitionParam" value="0"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory0" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory1" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemory2" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom0" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom1" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryFrom2" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo0" value="3"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo1" value="3"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.preserveMemoryTo2" value="3"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.preservePartioning" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.programtrim" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.sda.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_DOWN_DELAY" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.POWER_UP_DELAY" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.sda.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.sda.STARTUP_USE_SWD" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.selectedCoreNumber" value="1"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.serverPortNumber" value="7224"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_eth.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.ALWAYS_ERASE" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.CYCLONE_IP" value=""/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.DO_RESET_DELAY" value="false"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.INTERFACE_PORT" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.INTERFACE_PORT_STRING" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.NETWORK_CARD_IP" value=""/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_DOWN_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_OFF" value="false"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.POWER_UP_DELAY" value="250"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.PROVIDE_POWER" value="true"/>
 
+<intAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.REGULATOR_VOLTAGE" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.RESET_DELAY" value="0"/>
 
+<stringAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SHIFT_FREQ" value="5000"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SPECIFY_IP" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.SPECIFY_NETWORK_CARD" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.trc_usb.STARTUP_USE_SWD" value="true"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useAlternativeAlgorithm" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useCustomTrim" value="false"/>
 
+<booleanAttribute key="com.pemicro.debug.gdbjtag.pne.useDaisyChain" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU ARM PEMicro Interface"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/>
 
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
 
+<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${S32DS_GDB_ARM32_EXE}"/>
 
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
 
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Release_RAM/S32K146_4G.elf"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="S32K146_4G"/>
 
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
 
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="com.nxp.s32ds.cle.arm.mbs.arm32.bare.gnu.9.2.exe.release.ram.883375570"/>
 
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
 
+<listEntry value="/S32K146_4G"/>
 
+</listAttribute>
 
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
 
+<listEntry value="4"/>
 
+</listAttribute>
 
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
 
+</launchConfiguration>

+ 230 - 0
Project_Settings/Linker_Files/linker_flash_s32k146.ld
Vedi File 

@@ -0,0 +1,230 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*
 
+* GCC Linker Command File:
 
+* 0x00000000    0x000FFFFF  1024KB   Flash
 
+* 0x1FFF0000    0x1FFFFFFF  65536  SRAM_L
 
+* 0x20000000    0x2000EFFF  61440  SRAM_U
 
+*/
 
+
 
+
 
+MEMORY
 
+{         
+    int_flash_interrupts    : ORIGIN = 0x00000000, LENGTH = 0x00000400    /* 1K */    /* Do not change this section */
 
+    int_flash_config        : ORIGIN = 0x00000400, LENGTH = 0x00000010    /* 16bytes */ /* Do not change this section */
 
+    int_flash               : ORIGIN = 0x00000410, LENGTH = 0x000FFBF0    /* ~1.0MB */ 
+    int_sram_results        : ORIGIN = 0x1FFF0000, LENGTH = 0x00000100    /* 256bytes */
 
+    int_sram                : ORIGIN = 0x1FFF0100, LENGTH = 0x0001DF00    /* ~120K */
 
+    int_sram_stack_c0       : ORIGIN = 0x2000E000, LENGTH = 0x00001000    /* 4K  */
 
+    ram_rsvd2               : ORIGIN = 0x2000F000, LENGTH = 0             /* End of SRAM */
 
+}
 
+
 
+
 
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x00000200;
 
+
 
+ENTRY(Reset_Handler)
 
+
 
+SECTIONS
 
+{
 
+    
+	.flash_interrupts :
 
+	{
 
+		. = ALIGN(4096);
 
+        __interrupts_rom_start = .;
 
+        KEEP(*(.intc_vector))    
+        . = ALIGN(4);
 
+        __interrupts_rom_end = .;
 
+	} > int_flash_interrupts
 
+	
+	.flash_config :
 
+	{
 
+		KEEP(*(.flash_config))
 
+	} > int_flash_config
 
+	
+	.flash :
 
+	{
 
+        . = ALIGN(4);
 
+        *(.startup) 
+        . = ALIGN(4);
 
+        *(.systeminit) 
+        . = ALIGN(4);
 
+        *(.text.startup) 
+        . = ALIGN(4);
 
+        *(.text)
 
+        *(.text*) 
+        . = ALIGN(4);
 
+        *(.mcal_text) 
+        . = ALIGN(4);
 
+        acfls_code_rom_start = .;
 
+        . = ALIGN(0x4);
 
+        *(.acfls_code_rom)
 
+        acfls_code_rom_end = .;
 
+        KEEP(*(.init))
 
+        . = ALIGN(4);
 
+        KEEP(*(.fini)) 
+         
+        . = ALIGN(4);
 
+        *(.rodata)  
+        *(.rodata*)  
+        . = ALIGN(4);
 
+        *(.mcal_const_cfg)  
+        . = ALIGN(4);
 
+        *(.mcal_const)
 
+        . = ALIGN(4);
 
+        *(.mcal_const_no_cacheable)		
+        . = ALIGN(4);
 
+        __init_table = .;
 
+        KEEP(*(.init_table))  
+        . = ALIGN(4);
 
+        __zero_table = .;
 
+        KEEP(*(.zero_table))
 
+
 
+        . = ALIGN(4);
 
+        *(.acmcu_code_rom) 	
+		. = ALIGN(4);
 
+		_etext = .;
 
+		__DATA_ROM = .;
 
+	} > int_flash
 
+    
+    . = ALIGN(4);
 
+    PROVIDE(__exidx_start = .);
 
+    .ARM.exidx :
 
+    {
 
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
 
+    }> int_sram
 
+    . = ALIGN(4);
 
+    PROVIDE(__exidx_end = .);
 
+    
+    .ARM.extab :
 
+    {
 
+        *(.ARM.extab*)
 
+        . = ALIGN(4);
 
+    } > int_sram
 
+    
+	.sram_interrupts :
 
+    {
 
+		. = ALIGN(4096);
 
+		__interrupts_ram_start = .;
 
+		. += (__interrupts_rom_end - __interrupts_rom_start);
 
+		. = ALIGN(4);
 
+		__interrupts_ram_end = .;
 
+	} > int_sram
 
+       
+    .sram_data :  AT(__DATA_ROM)
 
+    {
 
+        . = ALIGN(4);
 
+		__data_ram_start = .;
 
+        *(.ramcode)    
+        . = ALIGN(4);
 
+        *(.data)  
+        *(.data*)
 
+        . = ALIGN(4);
 
+        *(.mcal_data)  
+		. = ALIGN(4);
 
+        *(.mcal_data_no_cacheable)     
+		. = ALIGN(4);
 
+		__data_ram_end = .;
 
+	} > int_sram
 
+	
+	__DATA_ROM_END = __DATA_ROM + (__data_ram_end - __data_ram_start);
 
+	
+	.sram_bss (NOLOAD) :
 
+	{
 
+        . = ALIGN(16);
 
+        __sram_bss_start = .;
 
+        *(.bss)
 
+        *(.bss*)
 
+        . = ALIGN(16);
 
+        *(.mcal_bss)
 
+		. = ALIGN(16);
 
+        __non_cacheable_bss_start = .;
 
+        *(.mcal_bss_no_cacheable)      
+        . = ALIGN(4);
 
+        __non_cacheable_bss_end = .;   
+        __sram_bss_end = .;
 
+    } > int_sram
 
+
 
+    
+    .acfls_code_ram :
 
+    {
 
+        . += (acfls_code_rom_end - acfls_code_rom_start );
 
+    } > int_sram
 
+	
+    /* heap section */
 
+    .heap (NOLOAD):
 
+    {
 
+    	.  = ALIGN(4);
 
+	    _end = .;
 
+	    end = .;
 
+        _heap_start = .;
 
+        . += HEAP_SIZE;
 
+        _heap_end = .;
 
+    } > int_sram
 
+    
+
 
+	int_results (NOLOAD):
 
+	{
 
+		. = ALIGN(4);
 
+        KEEP(*(.int_results))  
+        . += 0x100;
 
+	} > int_sram_results
 
+
 
+    __Stack_end_c0           = ORIGIN(int_sram_stack_c0);
 
+    __Stack_start_c0         = ORIGIN(int_sram_stack_c0) + LENGTH(int_sram_stack_c0);
 
+
 
+    __INT_SRAM_START         = ORIGIN(int_sram_results);
 
+    __INT_SRAM_END           = ORIGIN(ram_rsvd2);
 
+    
+    __RAM_INIT_START    = __data_ram_start;
 
+    __RAM_INIT_END      = __data_ram_end;
 
+    __ROM_INIT_START    = __DATA_ROM;
 
+    __ROM_INIT_END      = __DATA_ROM_END;
 
+    
+    __BSS_SRAM_START         = __sram_bss_start;
 
+    __BSS_SRAM_END           = __sram_bss_end;
 
+    __BSS_SRAM_SIZE          = __sram_bss_end - __sram_bss_start;
 
+
 
+    __RAM_INTERRUPT_START    = __interrupts_ram_start;
 
+    __ROM_INTERRUPT_START    = __interrupts_rom_start;
 
+    __ROM_INTERRUPT_END      = __interrupts_rom_end;
 
+
 
+    __INIT_TABLE             = __init_table;
 
+    __ZERO_TABLE             = __zero_table;
 
+    
+    __RAM_INIT               = 1;
 
+	
+    /* Fls module access code support */    
+    Fls_ACEraseRomStart         = acfls_code_rom_start;
 
+    Fls_ACEraseRomEnd           = acfls_code_rom_end;
 
+    Fls_ACEraseSize             = acfls_code_rom_end - acfls_code_rom_start;
 
+
 
+    Fls_ACWriteRomStart         = acfls_code_rom_start;
 
+    Fls_ACWriteRomEnd           = acfls_code_rom_end;
 
+    Fls_ACWriteSize             = acfls_code_rom_end - acfls_code_rom_start;
 
+    
+    _ERASE_FUNC_ADDRESS_        = ADDR(.acfls_code_ram);
 
+    _WRITE_FUNC_ADDRESS_        = ADDR(.acfls_code_ram);
 
+	
+    __ENTRY_VTABLE              = __RAM_INTERRUPT_START;
 
+}

+ 183 - 0
Project_Settings/Linker_Files/linker_ram_s32k146.ld
Vedi File 

@@ -0,0 +1,183 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*
 
+* GCC Linker Command File:
 
+* 0x1FFF0000    0x1FFFFFFF  65536  SRAM_L
 
+* 0x20000000    0x2000EFFF  61440  SRAM_U
 
+*/
 
+
 
+
 
+MEMORY
 
+{         
+    int_sram_results        : ORIGIN = 0x1FFF0000, LENGTH = 0x00000100    /* 256bytes */
 
+    int_sram                : ORIGIN = 0x1FFF0100, LENGTH = 0x0001DF00    /* ~120K */
 
+    int_sram_stack_c0       : ORIGIN = 0x2000E000, LENGTH = 0x00001000    /* 4K  */
 
+    ram_rsvd2               : ORIGIN = 0x2000F000, LENGTH = 0             /* End of SRAM */
 
+}
 
+
 
+
 
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x00000200;
 
+
 
+ENTRY(Reset_Handler)
 
+
 
+SECTIONS
 
+{
 
+    
+    .sram :
 
+    {
 
+		. = ALIGN(4096);
 
+        __interrupts_ram_start = .;
 
+        KEEP(*(.intc_vector))    
+        . = ALIGN(4);
 
+        __interrupts_ram_end = .;
 
+        . = ALIGN(4);
 
+        *(.startup) 
+        . = ALIGN(4);
 
+        *(.systeminit) 
+        . = ALIGN(4);
 
+        *(.text.startup) 
+        . = ALIGN(4);
 
+        *(.text)
 
+        *(.text*) 
+        . = ALIGN(4);
 
+        *(.mcal_text) 
+        . = ALIGN(4);
 
+        KEEP(*(.init))
 
+        . = ALIGN(4);
 
+        KEEP(*(.fini)) 
+         
+        . = ALIGN(4);
 
+        *(.rodata)  
+        *(.rodata*)  
+        . = ALIGN(4);
 
+        *(.mcal_const_cfg)  
+        . = ALIGN(4);
 
+        *(.mcal_const)
 
+        . = ALIGN(4);
 
+        *(.mcal_const_no_cacheable)		
+        . = ALIGN(4);
 
+        __init_table = .;
 
+        KEEP(*(.init_table))  
+        . = ALIGN(4);
 
+        __zero_table = .;
 
+        KEEP(*(.zero_table))
 
+
 
+        . = ALIGN(4);
 
+        *(.acmcu_code_rom) 
+        . = ALIGN(4);
 
+        *(.ramcode)    
+        . = ALIGN(4);
 
+        *(.data)  
+        *(.data*)
 
+        . = ALIGN(4);
 
+        *(.mcal_data)  
+		. = ALIGN(4);
 
+        *(.mcal_data_no_cacheable)     
+        . = ALIGN(16);
 
+        __sram_bss_start = .;
 
+        *(.bss)
 
+        *(.bss*)
 
+        . = ALIGN(16);
 
+        *(.mcal_bss)
 
+		. = ALIGN(16);
 
+        __non_cacheable_bss_start = .;
 
+        *(.mcal_bss_no_cacheable)      
+        . = ALIGN(4);
 
+        __non_cacheable_bss_end = .;   
+        __sram_bss_end = .;
 
+    } > int_sram
 
+
 
+    .acfls_code_rom :
 
+    {
 
+        acfls_code_rom_start = .;
 
+        . = ALIGN(0x4);
 
+        *(.acfls_code_rom)
 
+        acfls_code_rom_end = .;
 
+    } > int_sram
 
+    
+    .acfls_code_ram :
 
+    {
 
+        . += (acfls_code_rom_end - acfls_code_rom_start );
 
+    } > int_sram
 
+	
+    /* heap section */
 
+    .heap (NOLOAD):
 
+    {
 
+    	.  = ALIGN(4);
 
+	    _end = .;
 
+	    end = .;
 
+        _heap_start = .;
 
+        . += HEAP_SIZE;
 
+        _heap_end = .;
 
+    } > int_sram
 
+    
+
 
+	int_results (NOLOAD):
 
+	{
 
+		. = ALIGN(4);
 
+        KEEP(*(.int_results))  
+        . += 0x100;
 
+	} > int_sram_results
 
+
 
+    __Stack_end_c0           = ORIGIN(int_sram_stack_c0);
 
+    __Stack_start_c0         = ORIGIN(int_sram_stack_c0) + LENGTH(int_sram_stack_c0);
 
+
 
+    __INT_SRAM_START         = ORIGIN(int_sram_results);
 
+    __INT_SRAM_END           = ORIGIN(ram_rsvd2);
 
+    
+    __RAM_INIT_START    = ORIGIN(int_sram);
 
+    __RAM_INIT_END      = ORIGIN(int_sram) + LENGTH(int_sram) - 1;
 
+    __ROM_INIT_START    = 0;
 
+    __ROM_INIT_END      = 0;
 
+    
+    __BSS_SRAM_START         = __sram_bss_start;
 
+    __BSS_SRAM_END           = __sram_bss_end;
 
+    __BSS_SRAM_SIZE          = __sram_bss_end - __sram_bss_start;
 
+
 
+    __RAM_INTERRUPT_START    = __interrupts_ram_start;
 
+    __ROM_INTERRUPT_START    = 0;
 
+    __ROM_INTERRUPT_END      = 0;
 
+
 
+    __INIT_TABLE             = __init_table;
 
+    __ZERO_TABLE             = __zero_table;
 
+    
+    __RAM_INIT               = 0;
 
+	
+    /* Discard boot header in RAM */
 
+    /DISCARD/ : { *(.flash_config) }
 
+	
+    /* Fls module access code support */    
+    Fls_ACEraseRomStart         = ADDR(.acfls_code_rom);
 
+    Fls_ACEraseRomEnd           = ADDR(.acfls_code_rom) + SIZEOF(.acfls_code_rom);
 
+    Fls_ACEraseSize             = (SIZEOF(.acfls_code_rom)+3) / 4; /* Copy 4 bytes at a time*/
 
+
 
+    Fls_ACWriteRomStart         = ADDR(.acfls_code_rom);
 
+    Fls_ACWriteRomEnd           = ADDR(.acfls_code_rom) + SIZEOF(.acfls_code_rom);
 
+    Fls_ACWriteSize             = (SIZEOF(.acfls_code_rom)+3) / 4; /* Copy 4 bytes at a time*/
 
+    
+    _ERASE_FUNC_ADDRESS_        = ADDR(.acfls_code_ram);
 
+    _WRITE_FUNC_ADDRESS_        = ADDR(.acfls_code_ram);
 
+	
+    __ENTRY_VTABLE              = __RAM_INTERRUPT_START;
 
+}

+ 247 - 0
Project_Settings/Startup_Code/Vector_Table.s
Vedi File 

@@ -0,0 +1,247 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+.section  ".intc_vector","ax"
 
+.align 2
 
+.thumb
 
+.globl undefined_handler
 
+.globl undefined_handler
 
+.globl VTABLE
 
+.globl __Stack_start_c0          /* Top of Stack for Initial Stack Pointer */
 
+.globl Reset_Handler             /* Reset Handler */
 
+.globl NMI_Handler               /* NMI Handler */
 
+.globl HardFault_Handler         /* Hard Fault Handler */
 
+.globl MemManage_Handler         /* Reserved */
 
+.globl BusFault_Handler          /* Bus Fault Handler */
 
+.globl UsageFault_Handler        /* Usage Fault Handler */
 
+.globl SVC_Handler               /* SVCall Handler */
 
+.globl DebugMon_Handler          /* Debug Monitor Handler */
 
+.globl PendSV_Handler            /* PendSV Handler */
 
+.globl SysTick_Handler           /* SysTick Handler */ /* 15*/
 
+
 
+VTABLE:
 
+
 
+.long __Stack_start_c0          /* Top of Stack for Initial Stack Pointer */
 
+.long Reset_Handler+1           /* Reset Handler need plus 1 because Reset_Handler is generated with LSB bit =0*/
 
+.long NMI_Handler               /* NMI Handler */
 
+.long HardFault_Handler         /* Hard Fault Handler */
 
+.long MemManage_Handler         /* Reserved */
 
+.long BusFault_Handler          /* Bus Fault Handler */
 
+.long UsageFault_Handler        /* Usage Fault Handler */
 
+.long 0                         /* Reserved */
 
+.long 0                         /* Reserved */
 
+.long 0                         /* Reserved */
 
+.long 0                         /* Reserved */
 
+.long SVC_Handler+1             /* SVCall Handler */
 
+.long DebugMon_Handler          /* Debug Monitor Handler */
 
+.long 0                         /* Reserved */
 
+.long PendSV_Handler            /* PendSV Handler */
 
+.long SysTick_Handler           /* SysTick Handler */ /* 15*/
 
+
 
+.long undefined_handler /*0*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*10*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*20*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*30*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler 
+.long undefined_handler /*40*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler 
+.long undefined_handler
 
+.long undefined_handler /*50*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*60*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*70*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*80*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*90*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*100*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*110*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*120*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*130*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*140*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*150*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*160*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler /*170*/
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+.long undefined_handler
 
+
 
+
 
+
 
+
 
+.size VTABLE, . - VTABLE
 
+

+ 191 - 0
Project_Settings/Startup_Code/exceptions.c
Vedi File 

@@ -0,0 +1,191 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifdef __cplusplus
 
+extern "C" {
 
+#endif
 
+
 
+#include "Platform_Types.h"
 
+#include "Mcal.h"
 
+#ifdef __ICCARM__ 
+    #pragma default_function_attributes = @ ".systeminit"
 
+#else
 
+    __attribute__ ((section (".systeminit")))
 
+#endif 
+
 
+#ifdef __ICCARM__ 
+    #pragma default_function_attributes = @ ".systeminit"
 
+#else
 
+    __attribute__ ((section (".systeminit")))
 
+#endif 
+
 
+void NMI_Handler(void)                  __attribute__ ((weak));               /* NMI Handler */
 
+void HardFault_Handler(void)            __attribute__ ((weak));         /* Hard Fault Handler */
 
+void MemManage_Handler(void)            __attribute__ ((weak));         /* Reserved */
 
+void BusFault_Handler(void)             __attribute__ ((weak));          /* Bus Fault Handler */
 
+void UsageFault_Handler(void)           __attribute__ ((weak));        /* Usage Fault Handler */
 
+void DebugMon_Handler(void)             __attribute__ ((weak));          /* Debug Monitor Handler */
 
+void PendSV_Handler(void)               __attribute__ ((weak));            /* PendSV Handler */
 
+void SysTick_Handler(void)              __attribute__ ((weak));           /* SysTick Handler */
 
+void undefined_handler(void);         /* Undefined Handler */
 
+#ifdef MCAL_ENABLE_USER_MODE_SUPPORT
 
+void SVCHandler_main(uint32 * svc_args);
 
+void Suspend_Interrupts(void);
 
+void Resume_Interrupts(void);
 
+#endif
 
+
 
+#ifdef MCAL_ENABLE_USER_MODE_SUPPORT
 
+#ifndef __ICCARM__
 
+/* Define the SVC handler in assembly, to ensure there is no extra PUSH instruction at the beginning of the C handler.*/
 
+ASM_KEYWORD(".globl SVC_Handler");
 
+ASM_KEYWORD(".weak SVC_Handler");
 
+ASM_KEYWORD("SVC_Handler:");
 
+/*Load in R0 the stack pointer (depneding on context from which SVC is called)*/
 
+ASM_KEYWORD("tst     lr, #4");
 
+ASM_KEYWORD("ite eq");
 
+ASM_KEYWORD("mrseq   r0, MSP");
 
+ASM_KEYWORD("mrsne   r0, PSP");
 
+/* stack pointer is passed to SVCHandler_main, it will be used to extract the parameter given to svc call*/
 
+ASM_KEYWORD("b       SVCHandler_main");
 
+#else
 
+void SVC_Handler(void) __attribute__((naked, weak));
 
+void SVC_Handler(void)
 
+{
 
+    ASM_KEYWORD("tst lr, #4\n"\
 
+                "ite eq\n" \
 
+                "mrseq   r0, MSP\n" \
 
+                "mrsne   r0, PSP\n");
 
+    /* stack pointer is passed to SVCHandler_main, it will be used to extract the parameter given to svc call*/
 
+    ASM_KEYWORD("b       SVCHandler_main");
 
+}
 
+#endif
 
+#endif
 
+
 
+
 
+void NMI_Handler(void)
 
+{
 
+    while(TRUE){};
 
+}
 
+void HardFault_Handler(void)
 
+{
 
+    while(TRUE){};
 
+}
 
+void MemManage_Handler(void)
 
+{
 
+    while(TRUE){};
 
+}
 
+void BusFault_Handler(void)
 
+{
 
+    while(TRUE){};
 
+}
 
+void UsageFault_Handler(void)
 
+{
 
+    while(TRUE){};
 
+}
 
+
 
+#ifndef MCAL_ENABLE_USER_MODE_SUPPORT
 
+void SVC_Handler(void)  __attribute__ ((weak));               /* SVCall Handler */
 
+void SVC_Handler(void)
 
+{
 
+    while(TRUE){};
 
+}
 
+#else
 
+void SVCHandler_main(uint32 * svc_args)
 
+{
 
+    uint32 svc_number;    /* Stack contains:    * r0, r1, r2, r3, r12, r14, the return address and xPSR   */
 
+                                /* First argument (r0) is svc_args[0]  */
 
+    /* svc_args[6] =  SP + 0x18  PC(r15) */
 
+    /* ((char *)svc_args[6])[-2]; = first two bytes, lsb, of the instruction which caused the SVC */
 
+    /* this will nto work if optimization compiler options are changed*/
 
+    svc_number = ((uint8 *)svc_args[6])[-2];
 
+    switch(svc_number)
 
+    {
 
+        case 1:
 
+            /* Handle SVC 01*/
 
+            ASM_KEYWORD("mov   r0, #0x1");   /* Set User mode for Thread mode */
 
+            ASM_KEYWORD("msr   CONTROL, r0");
 
+            break;
 
+        case 0:
 
+            /* Handle SVC 00*/
 
+            ASM_KEYWORD("mov   r0, #0x0");   /* Set Supervisor mode for Thread mode */
 
+            ASM_KEYWORD("msr   CONTROL, r0");
 
+            break;
 
+        case 2:
 
+            /* Handle SVC 02*/
 
+            Resume_Interrupts();
 
+            break;
 
+        case 3:
 
+            /* Handle SVC 03*/
 
+            Suspend_Interrupts();
 
+
 
+            break;
 
+        default:
 
+            /* Unknown SVC*/
 
+            break;
 
+    }
 
+}
 
+
 
+void Suspend_Interrupts(void)
 
+{
 
+    ASM_KEYWORD("push {r0}");
 
+    ASM_KEYWORD("mov   r0, #0x10");
 
+    ASM_KEYWORD(" msr BASEPRI, r0");
 
+    ASM_KEYWORD("pop {r0}");
 
+}
 
+
 
+void Resume_Interrupts(void)
 
+{
 
+    ASM_KEYWORD("push {r0}");
 
+    ASM_KEYWORD("mov   r0, #0x0");
 
+    ASM_KEYWORD("msr BASEPRI, r0");
 
+    ASM_KEYWORD("pop {r0}");
 
+}
 
+#endif
 
+void DebugMon_Handler(void)
 
+{
 
+    while(TRUE){};
 
+}
 
+void PendSV_Handler(void)
 
+{
 
+    while(TRUE){};
 
+}
 
+void SysTick_Handler(void)
 
+{
 
+    while(TRUE){};
 
+}
 
+void undefined_handler(void)
 
+{
 
+   while(TRUE){};
 
+}
 
+
 
+#ifdef __ICCARM__ 
+    #pragma default_function_attributes =
 
+#endif
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+
 
+

+ 126 - 0
Project_Settings/Startup_Code/nvic.c
Vedi File 

@@ -0,0 +1,126 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#include "Std_Types.h"
 
+#include "nvic.h"
 
+
 
+/*==================================================================================================
 
+*                                        LOCAL MACROS
 
+==================================================================================================*/
 
+/*==================================================================================================
 
+*                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       LOCAL CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       LOCAL VARIABLES
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       LOCAL VARIABLES
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       GLOBAL CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       GLOBAL VARIABLES
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                   LOCAL FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       LOCAL FUNCTIONS
 
+==================================================================================================*/
 
+#ifdef FEATURE_NVIC_PRIORITY_GROUPING
 
+/*================================================================================================*/
 
+/** 
+* @brief Set Priority Grouping
 
+* @details The function sets the priority grouping field using the required unlock sequence.
 
+*  The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
 
+*   Only values from 0..7 are used.
 
+*   In case of a conflict between priority grouping and available
 
+*   priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set
 
+*/
 
+/*================================================================================================*/
 
+void NVIC_SetPriorityGrouping(uint32 PriorityGroup)
 
+{
 
+    /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
 
+    S32_SCB->AIRCR = (S32_SCB->AIRCR & (~0x700UL)) | PriorityGroup;
 
+}
 
+#endif
 
+/*================================================================================================*/
 
+/** 
+* @brief Enable External Interrupt
 
+* @details The function enables a device-specific interrupt in the NVIC interrupt controller.
 
+*/
 
+/*================================================================================================*/ 
+void NVIC_EnableIRQ(uint8 IRQn)
 
+{
 
+    S32_NVIC->ISER[FEATURE_NVIC_REGISTER_INDEX(IRQn)] = (uint32)(1UL << ((uint32)(IRQn) & (uint32)0x1FU));
 
+}
 
+
 
+/*================================================================================================*/
 
+/** 
+* @brief Disable External Interrupt
 
+* @details The function disables a device-specific interrupt in the NVIC interrupt controller
 
+*/
 
+/*================================================================================================*/  
+void NVIC_DisableIRQ(uint8 IRQn)
 
+{
 
+    S32_NVIC->ICER[FEATURE_NVIC_REGISTER_INDEX(IRQn)] = (uint32)(1UL << ((uint32)(IRQn) & (uint32)0x1FU));
 
+}
 
+ 
+ 
+/*================================================================================================*/
 
+/** 
+* @brief Set Interrupt Priority
 
+* @details The function sets the priority of an interrupt.
 
+*/
 
+/*================================================================================================*/  
+void NVIC_SetPriority(uint8 IRQn, uint8 priority)
 
+{
 
+     uint8 shift = (uint8) (8U - FEATURE_NVIC_PRIO_BITS);
 
+#ifdef FEATURE_NVIC_CORTEX_M4  
+    S32_NVIC->IP[(uint32)(IRQn)] = (uint8)(((((uint32)priority) << shift)) & 0xFFUL);
 
+#else
 
+    uint32 iprVectorId = (uint32)(IRQn) >> 2U;
 
+    uint8  priByteShift = (uint8)((((uint8)IRQn) & 0x3U) << 3U);
 
+    S32_NVIC->IP[iprVectorId] &= ~(3U << priByteShift);
 
+    S32_NVIC->IP[iprVectorId] |= ((uint32)(((((uint32)priority) << shift)) & 0xFFUL)) << priByteShift;
 
+#endif
 
+}
 
+ 
+ 
+

+ 186 - 0
Project_Settings/Startup_Code/startup.c
Vedi File 

@@ -0,0 +1,186 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/**
 
+*   @implements startup.c_Artifact
 
+*/
 
+/**
 
+ * @page misra_violations MISRA-C:2012 violations
 
+ *
 
+ * @section [global]
 
+ * Violates MISRA 2012 Advisory Rule 8.9, An object should be defined at block
 
+ * scope if its identifier only appears in a single function.
 
+ * All variables with this problem are defined in the linker files.
 
+ *
 
+ * @section [global]
 
+ * Violates MISRA 2012 Advisory Rule 8.11, When an array with external linkage
 
+ * is declared, its size should be explicitly specified.
 
+ * The size of the arrays can not be explicitly determined.
 
+ *
 
+ * @section [global]
 
+ * Violates MISRA 2012 Advisory Rule 11.4, A conversion should not be performed
 
+ * between a pointer to object and an integer type.
 
+ * The cast is required to initialize a pointer with an unsigned int define,
 
+ * representing an address.
 
+ *
 
+ * @section [global]
 
+ * Violates MISRA 2012 Required Rule 11.6, A cast shall not be performed
 
+ * between pointer to void and an arithmetic type.
 
+ * The cast is required to initialize a pointer with an unsigned int define,
 
+ * representing an address.
 
+ *
 
+ * @section [global]
 
+ * Violates MISRA 2012 Required Rule 2.1, A project shall not contain unreachable
 
+ * code.
 
+ * The condition compares two address defined in linker files that can be different.
 
+ *
 
+ * @section [global]
 
+ * Violates MISRA 2012 Advisory Rule 8.7, External could be made static.
 
+ * Function is defined for usage by application code.
 
+ *
 
+ * @section [global]
 
+ * Violates MISRA 2012 Required Rule 1.3, Unusual pointer cast (incompatible
 
+ * indirect types).
 
+ * The cast is required to cast the address of linker section to initialization layout.
 
+ *
 
+ * @section [global]
 
+ * Violates MISRA 2012 Required Rule 11.3, Cast performed between a pointer
 
+ * to object type and a pointer to a different object type.
 
+ * The cast is required to cast the address of linker section to initialization layout.
 
+ *
 
+ * @section [global]
 
+ * Violates MISRA 2012 Required Rule 11.8, Attempt to cast away const/volatile from a pointer or reference.
 
+ * The cast is required to cast the initialization layout structure.
 
+ *
 
+ * @section [global]
 
+ * Violates MISRA 2012 Advisory Rule 18.4, Pointer arithmetic other than array indexing used.
 
+ * This is required to increment the source address.
 
+ *
 
+ */
 
+#include "Std_Types.h"
 
+
 
+/*******************************************************************************
 
+ * Definitions
 
+ *******************************************************************************/
 
+ /*!
 
+ * @brief Defines the init table layout
 
+ */
 
+typedef struct
 
+{
 
+    uint8 * ram_start; /*!< Start address of section in RAM */
 
+    uint8 * rom_start; /*!< Start address of section in ROM */
 
+    uint8 * rom_end;   /*!< End address of section in ROM */
 
+} Sys_CopyLayoutType;
 
+
 
+/*!
 
+ * @brief Defines the zero table layout
 
+ */
 
+typedef struct
 
+{
 
+    uint8 * ram_start; /*!< Start address of section in RAM */
 
+    uint8 * ram_end;   /*!< End address of section in RAM */
 
+} Sys_ZeroLayoutType;
 
+
 
+extern uint32 __INIT_TABLE[];
 
+extern uint32 __ZERO_TABLE[];
 
+#if (defined(__ARMCC_VERSION))
 
+    extern uint32 __VECTOR_RAM;
 
+#else
 
+    extern uint32 __VECTOR_RAM[];
 
+#endif
 
+
 
+/*******************************************************************************
 
+ * Static Variables
 
+ ******************************************************************************/
 
+
 
+/*******************************************************************************
 
+ * Code
 
+ ******************************************************************************/
 
+/*FUNCTION**********************************************************************
 
+ *
 
+ * Function Name : init_data_bss
 
+ * Description   : Make necessary initializations for RAM.
 
+ * - Copy the vector table from ROM to RAM.
 
+ * - Copy initialized data from ROM to RAM.
 
+ * - Copy code that should reside in RAM from ROM
 
+ * - Clear the zero-initialized data section.
 
+ *
 
+ * Tool Chains:
 
+ *   __GNUC__           : GNU Compiler Collection
 
+ *   __ghs__            : Green Hills ARM Compiler
 
+ *   __ICCARM__         : IAR ARM Compiler
 
+ *   __DCC__            : Wind River Diab Compiler
 
+ *   __ARMCC_VERSION    : ARMC Compiler
 
+ *
 
+ * Implements    : init_data_bss_Activity
 
+ *END**************************************************************************/
 
+void init_data_bss(void);
 
+
 
+void init_data_bss(void)
 
+{
 
+    const Sys_CopyLayoutType * copy_layout;
 
+    const Sys_ZeroLayoutType * zero_layout;
 
+    const uint8 * rom;
 
+    uint8 * ram;
 
+    uint32 len = 0U;
 
+    uint32 size = 0U;
 
+    uint32 i = 0U;
 
+    uint32 j = 0U;
 
+
 
+    const uint32 * initTable_Ptr = (uint32 *)__INIT_TABLE;
 
+    const uint32 * zeroTable_Ptr = (uint32*)__ZERO_TABLE;
 
+
 
+    /* Copy initialized table */
 
+    len = *initTable_Ptr;
 
+    initTable_Ptr++;
 
+    copy_layout = (const Sys_CopyLayoutType *)initTable_Ptr;
 
+    for(i = 0; i < len; i++)
 
+    {
 
+        rom = copy_layout[i].rom_start;
 
+        ram = copy_layout[i].ram_start;
 
+        size = (uint32)copy_layout[i].rom_end - (uint32)copy_layout[i].rom_start;
 
+
 
+        for(j = 0UL; j < size; j++)
 
+        {
 
+            ram[j] = rom[j];
 
+        }
 
+    }
 
+    
+    /* Clear zero table */
 
+    len = *zeroTable_Ptr;
 
+    zeroTable_Ptr++;
 
+    zero_layout = (const Sys_ZeroLayoutType *)zeroTable_Ptr;
 
+    for(i = 0; i < len; i++)
 
+    {
 
+        ram = zero_layout[i].ram_start;
 
+        size = (uint32)zero_layout[i].ram_end - (uint32)zero_layout[i].ram_start;
 
+
 
+        for(j = 0UL; j < size; j++)
 
+        {
 
+            ram[j] = 0U;
 
+        }
 
+    }
 
+}
 
+/*******************************************************************************
 
+ * EOF
 
+ ******************************************************************************/

+ 345 - 0
Project_Settings/Startup_Code/startup_cm4.s
Vedi File 

@@ -0,0 +1,345 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+#define WDOG_CS (0x40052000)
 
+#define WDOG_TOVAL (0x40052008)
 
+
 
+#define WDOG_CS_DISABLE (0x00002520)
 
+ 
+	.syntax unified
 
+    .arch armv7-m
 
+/* Table for copying and zeroing */
 
+/* Copy table:
 
+  - Table entries count
 
+    - entry one ram start
 
+    - entry one rom start
 
+    - entry one rom end
 
+    ...
 
+    - entry n ram start
 
+    - entry n rom start
 
+    - entry n rom end
 
+  Zero Table:
 
+    - Table entries count
 
+      - entry one ram start
 
+      - entry one ram end
 
+*/
 
+.section ".init_table", "a"
 
+  .long 2
 
+  .long __RAM_INIT_START
 
+  .long __ROM_INIT_START
 
+  .long __ROM_INIT_END
 
+  .long __RAM_INTERRUPT_START
 
+  .long __ROM_INTERRUPT_START
 
+  .long __ROM_INTERRUPT_END  
+.section ".zero_table", "a"
 
+  .long 1
 
+  .long __BSS_SRAM_START
 
+  .long __BSS_SRAM_END
 
+
 
+/* Flash Configuration */
 
+    .section .flash_config, "a"
 
+    .long 0xFFFFFFFF     /* 8 bytes backdoor comparison key           */
 
+    .long 0xFFFFFFFF     /*                                           */
 
+    .long 0xFFFFFFFF     /* 4 bytes program flash protection bytes    */
 
+    .long 0xFFFF7FFE     /* FDPROT:FEPROT:FOPT:FSEC(0xFE = unsecured) */
 
+
 
+.globl VTABLE
 
+.section ".startup","ax"
 
+.thumb
 
+/************************************************************************/
 
+/* Autosar synopsis of startup code (See MCU Specification):            */
 
+/*                                                                      */
 
+/*   Before the MCU driver can be initialized, a basic initialization   */
 
+/*   of the MCU has to be executed. This MCU specific initialization is */
 
+/*   typically executed in a start-up code. The start-up code of the    */
 
+/*   MCU shall be executed after power up and any kind of micro-        */
 
+/*   controller reset. It shall perform very basic and microcontroller  */
 
+/*   specific start-up initialization and shall be kept short, because  */
 
+/*   the MCU clock and PLL is not yet initialized. The start-up code    */
 
+/*   shall cover MCU specific initialization, which is not part of      */
 
+/*   other MCU services or other MCAL drivers. The following steps      */
 
+/*   summarizes basic functionality which shall be included in the      */
 
+/*   start-up code. They are listed for guidance, because some          */
 
+/*   functionality might not be supported. No code will be found in     */
 
+/*   case.                                                              */
 
+/************************************************************************/
 
+.set VTOR_REG, 0xE000ED08
 
+.set CHIPCTL, 0x40048004
 
+.set DISRAMRE, 0x00300000
 
+.thumb 
+.thumb_func
 
+.globl Reset_Handler
 
+.globl _start
 
+_start:
 
+Reset_Handler:
 
+/*****************************************************/
 
+/* Skip normal entry point as nothing is initialized */
 
+/*****************************************************/
 
+ cpsid i
 
+ mov   r0, #0
 
+ mov   r1, #0
 
+ mov   r2, #0
 
+ mov   r3, #0
 
+ mov   r4, #0
 
+ mov   r5, #0
 
+ mov   r6, #0
 
+ mov   r7, #0
 
+ 
+/*****************************************************/
 
+/* Configuring sram retention out of reset */
 
+/*****************************************************/
 
+
 
+/* Disable SRAM retention */
 
+ldr  r0, =CHIPCTL
 
+ldr  r1, =DISRAMRE
 
+str  r1,[r0]
 
+
 
+/*******************************************************************/
 
+/* NXP Guidance 1 - Init registers to avoid lock-step issues */
 
+/* N/A                                                             */
 
+/*******************************************************************/
 
+
 
+/*******************************************************************/
 
+/* NXP Guidance 2 - MMU Initialization for CPU               */
 
+/*  TLB0 - PbridgeB                                                */
 
+/*  TLB1 - Internal Flash                                          */
 
+/*  TLB2 - External SRAM                                           */
 
+/*  TLB3 - Internal SRAM                                           */
 
+/*  TLB4 - PbridgeA                                                */
 
+/*******************************************************************/
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 1 - The start-up code shall initialize the    */
 
+/* base addresses for interrupt and trap vector tables. These base*/
 
+/* addresses are provided as configuration parameters or          */
 
+/* linker/locator setting.                                        */
 
+/******************************************************************/
 
+
 
+SetVTOR:
 
+/* relocate vector table to RAM */
 
+ldr  r0, =VTOR_REG
 
+ldr  r1, =__RAM_INTERRUPT_START
 
+str  r1,[r0]
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 2 - The start-up code shall initialize the    */
 
+/* interrupt stack pointer, if an interrupt stack is              */
 
+/* supported by the MCU. The interrupt stack pointer base address */
 
+/* and the stack size are provided as configuration parameter or  */
 
+/* linker/locator setting.                                        */
 
+/*                                                                */
 
+/******************************************************************/
 
+
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 3 - The start-up code shall initialize the    */
 
+/* user stack pointer. The user stack pointer base address and    */
 
+/* the stack size are provided as configuration parameter or      */
 
+/* linker/locator setting.                                        */
 
+/******************************************************************/
 
+
 
+SetCore0Stack:
 
+  /* set up stack; r13 SP*/
 
+  ldr  r0, =__Stack_start_c0
 
+  msr MSP, r0
 
+  b DisableSWT0
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 4 - If the MCU supports context save          */
 
+/* operation, the start-up code shall initialize the memory which */
 
+/* is used for context save operation. The maximum amount of      */
 
+/* consecutive context save operations is provided as             */
 
+/* configuration parameter or linker/locator setting.             */
 
+/*                                                                */
 
+/******************************************************************/
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 5 - The start-up code shall ensure that the   */
 
+/* MCU internal watchdog shall not be serviced until the watchdog */
 
+/* is initialized from the MCAL watchdog driver. This can be      */
 
+/* done for example by increasing the watchdog service time.      */
 
+/*                                                                */
 
+/******************************************************************/
 
+
 
+/* Note from manual: For any operation to be performed on an SWT  */
 
+/* instance, its respective core must be enabled.                 */
 
+DisableSWT0:
 
+  ldr  r0, =WDOG_CS
 
+  ldr  r1, =WDOG_CS_DISABLE
 
+  str  r1, [r0]
 
+  ldr  r0, =WDOG_TOVAL
 
+  ldr  r1, =0xFFFF
 
+  str  r1, [r0]
 
+  b    RamInit
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 13 - The start-up code shall initialize a     */
 
+/* minimum amount of RAM in order to allow proper execution of    */
 
+/* the MCU driver services and the caller of these services.      */
 
+/******************************************************************/
 
+RamInit:
 
+    /* Initialize SRAM ECC */
 
+    ldr  r0, =__RAM_INIT
 
+    cmp  r0, 0
 
+    /* Skip if __SRAM_INIT is not set */
 
+    beq SRAM_LOOP_END
 
+    ldr r1, =__INT_SRAM_START
 
+    ldr r2, =__INT_SRAM_END
 
+    
+    subs    r2, r1
 
+    subs    r2, #1
 
+    ble SRAM_LOOP_END
 
+
 
+    movs    r0, 0
 
+    movs    r3, 0
 
+SRAM_LOOP:
 
+    stm r1!, {r0,r3}
 
+    subs r2, 8
 
+    bge SRAM_LOOP
 
+SRAM_LOOP_END:
 
+
 
+DebuggerHeldCoreLoop:
 
+  ldr  r0, =RESET_CATCH_CORE
 
+  ldr  r0, [r0]
 
+  ldr  r1, =0x5A5A5A5A
 
+  cmp  r0, r1
 
+  beq	DebuggerHeldCoreLoop
 
+
 
+/************************/
 
+/* Erase ".bss Section" */
 
+/************************/
 
+_DATA_INIT:
 
+    b	 _INIT_DATA_BSS
 
+
 
+_INIT_DATA_BSS:
 
+  bl init_data_bss
 
+
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 6 - If the MCU supports cache memory for data */
 
+/* and/or code, it shall be initialized and enabled in the        */
 
+/* start-up code.                                                 */
 
+/*                                                                */
 
+/******************************************************************/
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 7 - The start-up code shall initialize MCU    */
 
+/* specific features of internal memory like memory protection.   */
 
+/*                                                                */
 
+/******************************************************************/
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 8 - If external memory is used, the memory    */
 
+/* shall be initialized in the start-up code. The start-up code   */
 
+/* shall be prepared to support different memory configurations   */
 
+/* depending on code location. Different configuration options    */
 
+/* shall be taken into account for code execution from            */
 
+/* external/internal memory.                                      */
 
+/* N/A - external memory is not used                              */
 
+/******************************************************************/
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 9 - The settings of the different memories    */
 
+/* shall be provided to the start-up code as configuration        */
 
+/* parameters.                                                    */
 
+/* N/A - all memories are already configured                      */
 
+/******************************************************************/
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 10 - In the start-up code a default           */
 
+/* initialization of the MCU clock system shall be performed      */
 
+/* including global clock prescalers.                             */
 
+/******************************************************************/
 
+__SYSTEM_INIT:
 
+  bl SystemInit
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 5 - The start-up code shall ensure that the   */
 
+/* MCU internal watchdog shall not be serviced until the watchdog */
 
+/* is initialized from the MCAL watchdog driver. This can be      */
 
+/* done for example by increasing the watchdog service time.      */
 
+/*                                                                */
 
+/******************************************************************/
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 11 - The start-up code shall enable           */
 
+/* protection mechanisms for special function registers(SFR's),   */
 
+/* if supported by the MCU.                                       */
 
+/* N/A - will be handled by Autosar OS                            */
 
+/******************************************************************/
 
+
 
+/******************************************************************/
 
+/* Autosar Guidance 12 - The start-up code shall initialize all   */
 
+/* necessary write once registers or registers common to several  */
 
+/* drivers where one write, rather than repeated writes, to the   */
 
+/* register is required or highly desirable.                      */
 
+/******************************************************************/
 
+
 
+/*********************************/
 
+/* Set the small ro data pointer */
 
+/*********************************/
 
+
 
+
 
+/*********************************/
 
+/* Set the small rw data pointer */
 
+/*********************************/
 
+
 
+/******************************************************************/
 
+/* Call Main Routine                                              */
 
+/******************************************************************/
 
+_MAIN:
 
+  cpsie i
 
+  bl startup_go_to_user_mode
 
+  bl main
 
+
 
+/******************************************************************/
 
+/* Init runtime check data space                                  */
 
+/******************************************************************/
 
+.globl MCAL_LTB_TRACE_OFF
 
+ MCAL_LTB_TRACE_OFF:
 
+    nop
 
+
 
+#ifdef CCOV_ENABLE
 
+    /* code coverage is requested */
 
+    bl ccov_main
 
+#endif
 
+
 
+    /*BKPT #1 - removed to avoid debug fault being escalated to hardfault when debugger is not attached or on VDK*/ /* last instruction for the debugger to dump results data */
 
+.globl _end_of_eunit_test
 
+_end_of_eunit_test:
 
+    b .
 
+
 
+#ifdef MCAL_ENABLE_USER_MODE_SUPPORT
 
+.globl startup_getControlRegisterValue
 
+startup_getControlRegisterValue:
 
+mrs r0, CONTROL
 
+bx r14
 
+
 
+.globl startup_getAipsRegisterValue
 
+startup_getAipsRegisterValue:
 
+mrs r0, IPSR
 
+bx r14
 
+#endif
 
+
 
+.align 4
 
+.ltorg

+ 397 - 0
Project_Settings/Startup_Code/system.c
Vedi File 

@@ -0,0 +1,397 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifdef __cplusplus
 
+extern "C" {
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                         INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Platform_Types.h"
 
+#include "Mcal.h"
 
+#include "system.h"
 
+
 
+#ifdef S32K116
 
+    #include "S32K116.h"
 
+#endif
 
+#ifdef S32K118
 
+    #include "S32K118.h"
 
+#endif
 
+#ifdef S32K142
 
+    #include "S32K142.h"
 
+    #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
 
+#endif
 
+#ifdef S32K142W
 
+    #include "S32K142W.h"
 
+    #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
 
+#endif
 
+#ifdef S32K144
 
+    #include "S32K144.h"
 
+    #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
 
+#endif
 
+#ifdef S32K144W
 
+    #include "S32K144W.h"
 
+    #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
 
+#endif
 
+#ifdef S32K146
 
+    #include "S32K146.h"
 
+    #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION    
+#endif
 
+#ifdef S32K148
 
+    #include "S32K148.h"
 
+    #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION    
+#endif
 
+
 
+/*==================================================================================================
 
+*                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       LOCAL CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       LOCAL MACROS
 
+==================================================================================================*/
 
+#define SVC_GoToSupervisor()      ASM_KEYWORD("svc 0x0")
 
+#define SVC_GoToUser()            ASM_KEYWORD("svc 0x1")
 
+
 
+#define S32_SCB_CPACR_CPx_MASK(CpNum)             (0x3U << S32_SCB_CPACR_CPx_SHIFT(CpNum))
 
+#define S32_SCB_CPACR_CPx_SHIFT(CpNum)            ((uint32)(2U*((uint32)CpNum)))
 
+#define S32_SCB_CPACR_CPx(CpNum, x)               (((uint32)(((uint32)(x))<<S32_SCB_CPACR_CPx_SHIFT((CpNum))))&S32_SCB_CPACR_CPx_MASK((CpNum)))
 
+
 
+#define CODE_CACHE      0u
 
+
 
+#define CACHE_OK               0u
 
+#define CACHE_INVALID_PARAM    1u
 
+/*==================================================================================================
 
+*                                       LOCAL VARIABLES
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================-
 
+*                                       GLOBAL CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       GLOBAL VARIABLES
 
+==================================================================================================*/
 
+/* Allocate a global variable which will be overwritten by the debugger if attached(in CMM), to catch the core after reset. */
 
+uint32 RESET_CATCH_CORE=0x00U;
 
+
 
+/*==================================================================================================
 
+*                                   LOCAL FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+/*  Instruction cache initialization
 
+ *  sys_m4_cache_init(CODE_CACHE);
 
+ */
 
+#ifdef I_CACHE_ENABLE  
+static uint8 sys_m4_cache_init(uint8 cache);
 
+#endif
 
+#ifdef MCAL_ENABLE_USER_MODE_SUPPORT
 
+LOCAL_INLINE void Direct_GoToUser(void);
 
+#endif
 
+/*==================================================================================================
 
+*                                       LOCAL FUNCTIONS
 
+==================================================================================================*/
 
+/*  Instruction cache initialization
 
+ *  sys_m4_cache_init(CODE_CACHE);
 
+ */
 
+#ifdef I_CACHE_ENABLE  
+static uint8 sys_m4_cache_init(uint8 cache)
 
+{
 
+    uint8 RetValue = CACHE_OK;
 
+
 
+  if (cache == CODE_CACHE)
 
+  {
 
+      /* Code Cache Init */
 
+
 
+      /* Cache Set Command: set command bits in CCR */
 
+      /* set invalidate way 1 and invalidate way 0 bits */
 
+      IP_LMEM->PCCCR = 0x05000000UL;
 
+
 
+      /* set ccr[go] bit to initiate command to invalidate cache */
 
+      IP_LMEM->PCCCR |= LMEM_PCCCR_GO(1);
 
+
 
+      /* wait until the ccr[go] bit clears to indicate command complete */
 
+      while((IP_LMEM->PCCCR & LMEM_PCCCR_GO_MASK) == LMEM_PCCCR_GO_MASK){};
 
+
 
+      /* enable cache */
 
+      IP_LMEM->PCCCR |= LMEM_PCCCR_ENCACHE(1);
 
+  } 
+  else
 
+  {
 
+     RetValue = CACHE_INVALID_PARAM;
 
+  }
 
+
 
+  return RetValue;
 
+}
 
+#endif
 
+
 
+#ifdef MCAL_ENABLE_USER_MODE_SUPPORT
 
+LOCAL_INLINE void Direct_GoToUser(void)
 
+{
 
+    ASM_KEYWORD("push {r0}");
 
+    ASM_KEYWORD("ldr r0, =0x1");
 
+    ASM_KEYWORD("msr CONTROL, r0");
 
+    ASM_KEYWORD("pop {r0}");
 
+}
 
+#endif
 
+/*==================================================================================================
 
+*                                       GLOBAL FUNCTIONS
 
+==================================================================================================*/
 
+#ifdef MCAL_ENABLE_USER_MODE_SUPPORT  
+    extern uint32 startup_getControlRegisterValue(void);
 
+    extern uint32 startup_getAipsRegisterValue(void);
 
+    extern void Suspend_Interrupts(void);
 
+    extern void Resume_Interrupts(void);
 
+#endif /*MCAL_ENABLE_USER_MODE_SUPPORT*/
 
+
 
+
 
+/*================================================================================================*/
 
+/**
 
+* @brief    startup_go_to_user_mode
 
+* @details  Function called from startup.s to switch to user mode if MCAL_ENABLE_USER_MODE_SUPPORT
 
+*           is defined
 
+*/
 
+/*================================================================================================*/
 
+void startup_go_to_user_mode(void);
 
+void startup_go_to_user_mode(void)
 
+{
 
+#ifdef MCAL_ENABLE_USER_MODE_SUPPORT
 
+    ASM_KEYWORD("svc 0x1");
 
+#endif
 
+}
 
+
 
+/*================================================================================================*/
 
+/**
 
+* @brief   Default IRQ handler
 
+* @details Infinite Loop
 
+*/
 
+/*================================================================================================*/
 
+void default_interrupt_routine(void)
 
+{
 
+    while(TRUE){};
 
+}
 
+
 
+/*================================================================================================*/
 
+/**
 
+* @brief Sys_GoToSupervisor
 
+* @details function used to enter to supervisor mode.
 
+*           check if it's needed to switch to supervisor mode and make the switch.
 
+*           Return 1 if switch was done
 
+*/
 
+/*================================================================================================*/
 
+
 
+#ifdef MCAL_ENABLE_USER_MODE_SUPPORT
 
+uint32 Sys_GoToSupervisor(void)
 
+{
 
+    uint32 u32ControlRegValue;
 
+    uint32 u32AipsRegValue;
 
+    uint32 u32SwitchToSupervisor;
 
+
 
+    /* if it's 0 then Thread mode is already in supervisor mode */
 
+    u32ControlRegValue = startup_getControlRegisterValue();
 
+    /* if it's 0 the core is in Thread mode, otherwise in Handler mode */
 
+    u32AipsRegValue = startup_getAipsRegisterValue();
 
+
 
+    /* if core is already in supervisor mode for Thread mode, or running form Handler mode, there is no need to make the switch */
 
+    if((0U == (u32ControlRegValue & 1u)) || (0u < (u32AipsRegValue & 0xFFu)))
 
+    {
 
+        u32SwitchToSupervisor = 0U;
 
+    }
 
+    else
 
+    {
 
+        u32SwitchToSupervisor = 1U;
 
+        SVC_GoToSupervisor();
 
+    }
 
+
 
+    return u32SwitchToSupervisor;
 
+}
 
+
 
+/*================================================================================================*/
 
+/**
 
+* @brief Sys_GoToUser_Return
 
+* @details function used to switch back to user mode for Thread mode, return a uint32 value passed as parameter
 
+*/
 
+/*================================================================================================*/
 
+uint32 Sys_GoToUser_Return(uint32 u32SwitchToSupervisor, uint32 u32returnValue)
 
+{
 
+    if (1UL == u32SwitchToSupervisor)
 
+    {
 
+        Direct_GoToUser();
 
+    }
 
+
 
+    return u32returnValue;
 
+}
 
+
 
+uint32 Sys_GoToUser(void)
 
+{
 
+    Direct_GoToUser();
 
+    return 0UL;
 
+}
 
+
 
+/*================================================================================================*/
 
+/**
 
+* @brief Sys_SuspendInterrupts
 
+* @details Suspend Interrupts
 
+*/
 
+/*================================================================================================*/
 
+void Sys_SuspendInterrupts(void)
 
+{
 
+    uint32 u32ControlRegValue;
 
+    uint32 u32AipsRegValue;
 
+
 
+    /* if it's 0 then Thread mode is already in supervisor mode */
 
+    u32ControlRegValue = startup_getControlRegisterValue();
 
+    /* if it's 0 the core is in Thread mode, otherwise in Handler mode */
 
+    u32AipsRegValue = startup_getAipsRegisterValue();
 
+
 
+    if((0U == (u32ControlRegValue & 1u)) || (0u < (u32AipsRegValue & 0xFFu)))
 
+    {
 
+        Suspend_Interrupts();
 
+    }
 
+    else
 
+    {
 
+        ASM_KEYWORD(" svc 0x3");
 
+    }
 
+}
 
+
 
+
 
+/*================================================================================================*/
 
+/**
 
+* @brief Sys_ResumeInterrupts
 
+* @details Resume Interrupts
 
+*/
 
+/*================================================================================================*/
 
+void Sys_ResumeInterrupts(void)
 
+{
 
+    uint32 u32ControlRegValue;
 
+    uint32 u32AipsRegValue;
 
+
 
+    /* if it's 0 then Thread mode is already in supervisor mode */
 
+    u32ControlRegValue = startup_getControlRegisterValue();
 
+    /* if it's 0 the core is in Thread mode, otherwise in Handler mode */
 
+    u32AipsRegValue = startup_getAipsRegisterValue();
 
+
 
+    if((0U == (u32ControlRegValue & 1u)) || (0u < (u32AipsRegValue & 0xFFu)))
 
+    {
 
+        Resume_Interrupts();
 
+    }
 
+    else
 
+    {
 
+        ASM_KEYWORD(" svc 0x2");
 
+    }
 
+}
 
+#endif
 
+
 
+
 
+/*================================================================================================*/
 
+/**
 
+* @brief Sys_GetCoreID
 
+* @details Function used to get the ID of the currently executing thread
 
+*/
 
+/*================================================================================================*/
 
+#if !defined(USING_OS_AUTOSAROS)
 
+uint8 Sys_GetCoreID(void)
 
+{
 
+    return 0U;
 
+}
 
+#endif
 
+
 
+/*================================================================================================*/
 
+/*
 
+ * system initialization : system clock, interrupt router ...
 
+ */
 
+#ifdef __ICCARM__ 
+    #pragma default_function_attributes = @ ".systeminit"
 
+#else
 
+    __attribute__ ((section (".systeminit")))
 
+#endif 
+
 
+void SystemInit(void)
 
+{
 
+/**************************************************************************/
 
+                      /* FPU ENABLE*/
 
+/**************************************************************************/
 
+#ifdef ENABLE_FPU
 
+    /* Enable CP10 and CP11 coprocessors */
 
+    S32_SCB->CPACR |= (S32_SCB_CPACR_CPx(10U, 3U) | S32_SCB_CPACR_CPx(11U, 3U)); 
+
 
+    ASM_KEYWORD("dsb");
 
+    ASM_KEYWORD("isb");
 
+#endif /* ENABLE_FPU */
 
+
 
+#ifdef ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
 
+    S32_SCB->CCR    |=  1u;       /**< processor can enter Thread mode from any level under the 
+                                   control of an EXC_RETURN value, PendSV priority set to 0*/
 
+#endif
 
+    S32_SCB->SHPR3 &= ~S32_SCB_SHPR3_PRI_14_MASK; 
+    
+    /* enable the AIPS */
 
+    IP_AIPS->MPRA = 0x77777777;      
+    IP_AIPS->PACRA  = 0x0; 
+    IP_AIPS->PACRB  = 0x0; 
+    IP_AIPS->PACRD  = 0x0;
 
+    IP_AIPS->OPACR[0] = 0x0; 
+    IP_AIPS->OPACR[1] = 0x0; 
+    IP_AIPS->OPACR[2] = 0x0; 
+    IP_AIPS->OPACR[3] = 0x0; 
+    IP_AIPS->OPACR[4] = 0x0; 
+    IP_AIPS->OPACR[5] = 0x0; 
+    IP_AIPS->OPACR[6] = 0x0; 
+    IP_AIPS->OPACR[7] = 0x0; 
+    IP_AIPS->OPACR[8] = 0x0; 
+    IP_AIPS->OPACR[9] = 0x0; 
+    IP_AIPS->OPACR[10] = 0x0;
 
+    IP_AIPS->OPACR[11] = 0x0;
 
+
 
+/**************************************************************************/
 
+                      /* DEFAULT MEMORY ENABLE*/
 
+/**************************************************************************/
 
+    ASM_KEYWORD("dsb");
 
+    ASM_KEYWORD("isb");
 
+
 
+#ifdef I_CACHE_ENABLE  
+/**************************************************************************/
 
+            /* ENABLE CACHE */
 
+/**************************************************************************/
 
+    (void)sys_m4_cache_init(CODE_CACHE);    
+#endif
 
+}
 
+
 
+#ifdef __ICCARM__ 
+    #pragma default_function_attributes =
 
+#endif
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif

+ 1993 - 0
RTD/include/CDD_Mcl.h
Vedi File 

@@ -0,0 +1,1993 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef CDD_MCL_H_
 
+#define CDD_MCL_H_
 
+
 
+/**
 
+*   @file    CDD_Mcl.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - MCL driver header file.
 
+*   @details
 
+*
 
+*   @addtogroup MCL_DRIVER MCL Driver
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"
 
+{
 
+#endif
 
+
 
+/**
 
+* @page misra_violations MISRA-C:2012 violations
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+*  1) system and project includes
 
+*  2) needed interfaces from external units
 
+*  3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "CDD_Mcl_Cfg.h"
 
+#include "CDD_Mcl_Ipw.h"
 
+
 
+/*==================================================================================================
 
+*                                SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CDD_MCL_MODULE_ID_H                       255
 
+#define CDD_MCL_VENDOR_ID_H                       43
 
+#define CDD_MCL_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define CDD_MCL_AR_RELEASE_MINOR_VERSION_H        4
 
+#define CDD_MCL_AR_RELEASE_REVISION_VERSION_H     0
 
+#define CDD_MCL_SW_MAJOR_VERSION_H                1
 
+#define CDD_MCL_SW_MINOR_VERSION_H                0
 
+#define CDD_MCL_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+*                                       FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if header file and CDD_Mcl_Cfg.h file are of the same vendor */
 
+#if (CDD_MCL_VENDOR_ID_H != CDD_MCL_CFG_VENDOR_ID_H)
 
+    #error "CDD_Mcl.h and CDD_Mcl_Cfg.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and CDD_Mcl_Cfg.h file are of the same Autosar version */
 
+#if ((CDD_MCL_AR_RELEASE_MAJOR_VERSION_H != CDD_MCL_CFG_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CDD_MCL_AR_RELEASE_MINOR_VERSION_H != CDD_MCL_CFG_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CDD_MCL_AR_RELEASE_REVISION_VERSION_H != CDD_MCL_CFG_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of CDD_Mcl.h and CDD_Mcl_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if header file and CDD_Mcl_Cfg.h file are of the same Software version */
 
+#if ((CDD_MCL_SW_MAJOR_VERSION_H != CDD_MCL_CFG_SW_MAJOR_VERSION_H) || \
 
+     (CDD_MCL_SW_MINOR_VERSION_H != CDD_MCL_CFG_SW_MINOR_VERSION_H) || \
 
+     (CDD_MCL_SW_PATCH_VERSION_H != CDD_MCL_CFG_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of CDD_Mcl.h and CDD_Mcl_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if header file and CDD_Mcl_Ipw.h file are of the same vendor */
 
+#if (CDD_MCL_VENDOR_ID_H != CDD_MCL_IPW_VENDOR_ID_H)
 
+    #error "CDD_Mcl.h and CDD_Mcl_Ipw.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and CDD_Mcl_Ipw.h file are of the same Autosar version */
 
+#if ((CDD_MCL_AR_RELEASE_MAJOR_VERSION_H != CDD_MCL_IPW_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CDD_MCL_AR_RELEASE_MINOR_VERSION_H != CDD_MCL_IPW_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CDD_MCL_AR_RELEASE_REVISION_VERSION_H != CDD_MCL_IPW_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of CDD_Mcl.h and CDD_Mcl_Ipw.h are different"
 
+#endif
 
+
 
+/* Check if header file and CDD_Mcl_Ipw.h file are of the same Software version */
 
+#if ((CDD_MCL_SW_MAJOR_VERSION_H != CDD_MCL_IPW_SW_MAJOR_VERSION_H) || \
 
+     (CDD_MCL_SW_MINOR_VERSION_H != CDD_MCL_IPW_SW_MINOR_VERSION_H) || \
 
+     (CDD_MCL_SW_PATCH_VERSION_H != CDD_MCL_IPW_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of CDD_Mcl.h and CDD_Mcl_Ipw.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                            CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                        DEFINES AND MACROS
 
+==================================================================================================*/
 
+/* DET APIs */
 
+/**
 
+* @brief API service ID for Mcl_Init function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_INIT                                 ((uint8)0x00U)
 
+
 
+#if (MCL_DMA_IS_AVAILABLE == STD_ON)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetDmaInstanceCommand function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DMA_INSTANCE_COMMAND                 ((uint8)0x01U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_GetDmaInstanceStatus function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DMA_INSTANCE_STATUS                  ((uint8)0x02U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetDmaChannelCommand function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DMA_CHANNEL_COMMAND                  ((uint8)0x03U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_GetDmaChannelStatus function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DMA_CHANNEL_STATUS                   ((uint8)0x04U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetDmaChannelGlobalList function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DMA_GLOBAL                           ((uint8)0x05U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetDmaChannelTransferList function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DMA_TRANSFER                         ((uint8)0x06U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetDmaChannelScatterGatherList function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DMA_SCATTER_GATHER_LIST              ((uint8)0x07U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_GetDmaChannelParam function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DMA_INFORMATION                      ((uint8)0x08U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetDmaChannelScatterGatherConfig function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DMA_SCATTER_GATHER_CONFIG            ((uint8)0x09U)
 
+
 
+#if (MCL_DMA_CRC_IS_AVAILABLE == STD_ON)
 
+/**
 
+* @brief API service ID for Mcl_SetDmaChannelCrcList function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DMA_CRC                              ((uint8)0x0AU)
 
+#endif /* (MCL_DMA_CRC_IS_AVAILABLE == STD_ON) */
 
+#endif /* (MCL_DMA_IS_AVAILABLE == STD_ON) */
 
+
 
+/**
 
+* @brief API service ID for Mcl_DeInit function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_DEINIT                               ((uint8)0x0BU)
 
+
 
+#if (MCL_CACHE_IS_AVAILABLE == STD_ON)
 
+/**
 
+* @brief API service ID for Mcl_CacheEnable function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_CACHE_ENABLE                         ((uint8)0x10U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_CacheDisable function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_CACHE_DISABLE                        ((uint8)0x11U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_CacheInvalidate function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_CACHE_INVALIDATE                     ((uint8)0x12U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_CacheClean function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_CACHE_CLEAN                          ((uint8)0x13U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_CacheInvalidateByAddr function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_CACHE_INVALIDATE_BY_ADDRESS          ((uint8)0x14U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_CacheCleanByAddr function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_CACHE_CLEAN_BY_ADDRESS               ((uint8)0x15U)
 
+#endif /* if (MCL_CACHE_IS_AVAILABLE == STD_ON) */
 
+
 
+
 
+#if (MCL_TRGMUX_IS_AVAILABLE == STD_ON)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetTrgMuxInput function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_TRGMUX_INPUT                         ((uint8)0x20U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetTrgMuxLock function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_TRGMUX_LOCK                          ((uint8)0x21U)
 
+
 
+#endif /* MCL_TRGMUX_IS_AVAILABLE */
 
+
 
+
 
+#if (MCL_LCU_IS_AVAILABLE == STD_ON)
 
+
 
+#if (MCL_LCU_ASYNC_FUNC_IS_AVAILABLE == STD_ON)
 
+/**
 
+* @brief API service ID for Mcl_SetLcuAsyncInputList function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_ASYNC_SET_INPUT                  ((uint8)0x47U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuAsyncOutputList function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_ASYNC_SET_OUTPUT                 ((uint8)0x48U)
 
+
 
+#endif /* #if (MCL_LCU_ASYNC_FUNC_IS_AVAILABLE == STD_ON) */
 
+
 
+
 
+#if (MCL_LCU_SYNC_FUNC_IS_AVAILABLE == STD_ON)
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncInputSwOverrideEnable function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_INPUT_SW_OVERRIDE_EN     ((uint8)0x30U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncInputSwOverrideValue function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_INPUT_SW_OVERRIDE_VALUE  ((uint8)0x31U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncInputMuxSelect function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_INPUT_MUX_SEL            ((uint8)0x32U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncInputSwSyncMode function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_INPUT_SW_SYNC_MODE       ((uint8)0x33U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputDebugMode function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_DEBUG_MODE_EN     ((uint8)0x34U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputEnable function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_ENABLE            ((uint8)0x35U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputForceInputSensitivity function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_FORCE_SENSITIVITY ((uint8)0x36U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputForceClearingMode function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_FORCE_CLEAR_MODE  ((uint8)0x37U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputForceSyncSelect function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_FORCE_SYNC_SEL    ((uint8)0x38U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputPolarity function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_POLARITY          ((uint8)0x39U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputForceDma function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_FORCE_DMA         ((uint8)0x3AU)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputForceInt function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_FORCE_INT         ((uint8)0x3CU)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputLutDma function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_LUT_DMA           ((uint8)0x3BU)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputLutInt function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_LUT_INT           ((uint8)0x3DU)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputFallFilter function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_FALL_FILTER       ((uint8)0x3EU)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputRiseFilter function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_RISE_FILTER       ((uint8)0x3FU)
 
+
 
+/**
 
+* @brief API service ID for Mcl_SetLcuSyncOutputLutControl function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_SET_OUTPUT_LUT_CONTROL       ((uint8)0x40U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_ClearLcuSyncOutputForceEvent function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_CLEAR_OUTPUT_FORCE_EVENT     ((uint8)0x49U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_GetLcuSyncLogicInput function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_GET_LOGIC_INPUT              ((uint8)0x41U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_GetLcuSyncSwOverrideInput function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_GET_SW_OVERRIDE_INPUT        ((uint8)0x42U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_GetLcuSyncLogicOutput function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_GET_LOGIC_OUTPUT             ((uint8)0x43U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_GetLcuSyncForceOutput function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_GET_FORCE_OUTPUT             ((uint8)0x44U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_GetLcuSyncForceStatus function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_GET_FORCE_STATUS             ((uint8)0x45U)
 
+
 
+/**
 
+* @brief API service ID for Mcl_GetLcuSyncCombineForceInput function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SYNC_GET_COMBINE_FORCE_INPUT      ((uint8)0x46U)
 
+
 
+#endif /* #if (MCL_LCU_SYNC_FUNC_IS_AVAILABLE == STD_ON) */
 
+
 
+/**
 
+* @brief API service ID for Mcl_GetLcuSyncCombineForceInput function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_SET_WRITE_PROTECT                 ((uint8)0x4CU)
 
+
 
+#if (MCL_LCU_ASYNC_FUNC_IS_AVAILABLE == STD_ON)
 
+/**
 
+* @brief API service ID for Mcl_SetLcuAsyncInputList function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_ASYNC_GET_INPUT_INFO              ((uint8)0x4AU)
 
+/**
 
+* @brief API service ID for Mcl_SetLcuAsyncOutputList function
 
+* @details Parameters used when raising an error/exception
 
+* */
 
+#define MCL_DET_LCU_ASYNC_GET_OUTPUT_INFO             ((uint8)0x4BU)
 
+
 
+#endif /* #if (MCL_LCU_ASYNC_FUNC_IS_AVAILABLE == STD_ON) */
 
+
 
+
 
+#endif /* #if (MCL_LCU_IS_AVAILABLE == STD_ON) */
 
+
 
+#if (MCL_EMIOS_IS_AVAILABLE == STD_ON)
 
+
 
+/** @brief All API's called with wrong logic channel shall return this error. */
 
+#define MCL_DET_EMIOS_E_INVALID_CHANNEL               ((uint8)0x50)
 
+
 
+/** @brief All API's called with wrong logic channel shall return this error. */
 
+#define MCL_DET_EMIOS_E_INVALID_SET                   ((uint8)0x51)
 
+
 
+#endif /* MCL_EMIOS_IS_AVAILABLE == STD_ON */
 
+
 
+
 
+/* DET ERRORS */
 
+/**
 
+* @brief   All API's having pointers as parameters shall return this error if
 
+*          called with with a NULL value
 
+* @implements MCL_E_UNINIT_define
 
+* */
 
+#define MCL_E_UNINIT                         ((uint8)0x00)
 
+
 
+/**
 
+* @brief   All API's having pointers as parameters shall return this error if
 
+*          called with with a NULL value
 
+* @implements MCL_E_PARAM_POINTER_define
 
+* */
 
+#define MCL_E_PARAM_POINTER                  ((uint8)0x01)
 
+
 
+/**
 
+* @brief   All API's called with wrong instance shall return this error
 
+* @implements MCL_E_INVALID_INSTANCE_define
 
+* */
 
+#define MCL_E_INVALID_INSTANCE               ((uint8)0x02)
 
+
 
+/**
 
+* @brief   All API's called with wrong channel shall return this error
 
+* @implements MCL_E_INVALID_CHANNEL_define
 
+* */
 
+#define MCL_E_INVALID_CHANNEL                ((uint8)0x03)
 
+
 
+/**
 
+* @brief   All API's called with wrong instance shall return this error
 
+* @implements MCL_E_INVALID_COMMAND_define
 
+* */
 
+#define MCL_E_INVALID_COMMAND                ((uint8)0x04)
 
+
 
+/**
 
+* @brief   All API's called with wrong read parameter shall return this error
 
+* @implements MCL_E_INVALID_PARAMETER_define
 
+* */
 
+#define MCL_E_INVALID_PARAMETER              ((uint8)0x05)
 
+
 
+/**
 
+* @brief   All API's called in wrong sequence shall return this error
 
+* @implements MCL_E_INVALID_STATE_define
 
+* */
 
+#define MCL_E_INVALID_STATE                  ((uint8)0x06)
 
+
 
+/**
 
+* @brief   All API's called while hardware has error status shall return this error
 
+* @implements MCL_E_INCONSISTENCY_define
 
+* */
 
+#define MCL_E_INCONSISTENCY                  ((uint8)0x07)
 
+
 
+/**
 
+* @brief   All API's called with a timeout value shall return this error if execution
 
+*          is not finished in the allocated timeframe
 
+* @implements MCL_E_TIMEOUT_define
 
+* */
 
+#define MCL_E_TIMEOUT                        ((uint8)0x08)
 
+
 
+/**
 
+* @brief   If DET error reporting is enabled, the MCL will check upon each API call
 
+*          if the requested resource is configured to be available on the current core,
 
+*          and in case of error will return MCL_E_PARAM_CONFIG.
 
+* @implements MCL_E_PARAM_CONFIG_define
 
+* */
 
+#define MCL_E_PARAM_CONFIG                   ((uint8)0x09)
 
+
 
+/**
 
+* @brief   If DET error reporting is enabled, the MCL will check if registers are protected
 
+* */
 
+#define MCL_E_PROTECTED                      ((uint8)0x0A)
 
+
 
+/**
 
+* @brief   If VariantPreCompile is used, the configuration pointer shall have a NULL_PTR value.
 
+*          If VariantPostBuild is used, the configuration pointer shall be different from NULL_PTR.
 
+*          And in case of violate will return MCL_E_INIT_FAILED.
 
+* */
 
+#define MCL_E_INIT_FAILED                    ((uint8)0x0B)
 
+
 
+/*==================================================================================================
 
+*                                              ENUMS
 
+==================================================================================================*/
 
+#if (MCL_DMA_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This type contains the Mcl Dma Instance Commands.
 
+ * @details The Commands trigger specific actions in the Dma Instance.
 
+ *
 
+ * @implements Mcl_DmaInstanceCmdType_enum
 
+ * */
 
+typedef enum{
 
+    MCL_DMA_INST_STOP       = 0U, /**< @brief The Stop Command stops the executing channel and forces the Minor Loop to finish. */
 
+    MCL_DMA_INST_STOP_ERROR = 1U, /**< @brief The StopError Command stops the executing channel, forces the Minor Loop to finish and generates an error interrupt. */
 
+    MCL_DMA_INST_PAUSE      = 2U, /**< @brief The Pause Command allows the ongoing transfer to finish and pauses any new transfer. */
 
+    MCL_DMA_INST_RESUME     = 3U, /**< @brief The Resume Command allows the transfer to continue. */
 
+}Mcl_DmaInstanceCmdType;
 
+
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel Commands.
 
+ * @details The Commands trigger specific actions in the Dma Channel.
 
+ *
 
+ * @implements Mcl_DmaChannelCmdType_enum
 
+ * */
 
+typedef enum{
 
+    MCL_DMA_CH_START_REQUEST = 0U, /**< @brief The Start Request Command enables the Dma Channel to be triggered by hardware requests. */
 
+    MCL_DMA_CH_STOP_REQUEST  = 1U, /**< @brief The Stop Request Command disables the Dma Channel to be triggered by hardware requests. */
 
+    MCL_DMA_CH_START_SERVICE = 2U, /**< @brief The Start Service Command sends a start request to the Dma Channel. */
 
+    MCL_DMA_CH_ACK_DONE      = 3U, /**< @brief The Ack Done Command resets the Dma Channel Done status. */
 
+    MCL_DMA_CH_ACK_ERROR     = 4U, /**< @brief The Ack Error Command resets the Dma Channel Error status. */
 
+}Mcl_DmaChannelCmdType;
 
+
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel Global Parameters.
 
+ * @details The Parameters set specific functionalities.
 
+ *
 
+ * @implements Mcl_DmaChannelGlobalParamType_enum
 
+ * */
 
+typedef enum{
 
+#if (MCL_DMA_MASTER_ID_REPLICATION_IS_AVAILABLE == STD_ON)
 
+    MCL_DMA_CH_SET_EN_MASTER_ID_REPLICATION =  0U, /**< @brief [BOOLEAN] The EnMasterIdReplication Parameter sets the Dma Channel to use the same protection level and system bus ID of the master programming the Dma Channel. */
 
+#endif
 
+#if (MCL_DMA_BUFFERED_WRITES_IS_AVAILABLE == STD_ON)
 
+    MCL_DMA_CH_SET_EN_BUFFERED_WRITES       =  1U, /**< @brief [BOOLEAN] The EnBufferedWrites Parameter sets the Dma Channel writes to be bufferable. */
 
+#endif
 
+    MCL_DMA_CH_SET_EN_MUX_SOURCE_REQ        =  2U, /**< @brief [BOOLEAN] The EnMuxSource Parameter enables the Dma Channel Mux Source. */
 
+    MCL_DMA_CH_SET_MUX_SOURCE_REQ           =  3U, /**< @brief [VALUE]   The MuxSource Parameter sets the Dma Channel Mux Source value. */
 
+    MCL_DMA_CH_SET_EN_MUX_TRIGGER           =  4U, /**< @brief [BOOLEAN] The EnMuxTrigger Parameter enables the Dma Channel Mux Trigger. */
 
+    MCL_DMA_CH_SET_EN_HARDWARE_REQ          =  5U, /**< @brief [BOOLEAN] The EnRequest Parameter enables the Dma Channel Request. */
 
+    MCL_DMA_CH_SET_EN_ERROR_INTERRUPT       =  6U, /**< @brief [BOOLEAN] The EnError Parameter enables the Dma Channel Error Interrupt. */
 
+    MCL_DMA_CH_SET_GROUP_PRIORITY           =  7U, /**< @brief [VALUE]   The Group Parameter sets the Dma Channel Group Priority. */
 
+    MCL_DMA_CH_SET_LEVEL_PRIORITY           =  8U, /**< @brief [VALUE]   The Level Parameter sets the Dma Channel Level Priority. */
 
+#if (MCL_DMA_PREEMPTION_IS_AVAILABLE == STD_ON)
 
+    MCL_DMA_CH_SET_EN_PREEMPTION_PRIORITY   =  9U, /**< @brief [BOOLEAN] The EnPreemption Parameter enables the Dma Channel Preemption. */
 
+#endif
 
+#if (MCL_DMA_DISABLE_PREEMPT_IS_AVAILABLE == STD_ON)
 
+    MCL_DMA_CH_SET_DIS_PREEMPT_PRIORITY     = 10U, /**< @brief [BOOLEAN] The DisPreempt Parameter disables the Dma Channel Preempt. */
 
+#endif
 
+}Mcl_DmaChannelGlobalParamType;
 
+
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel Transfer Parameters.
 
+ * @details The Parameters set specific functionalities.
 
+ *
 
+ * @implements Mcl_DmaChannelTransferParamType_enum
 
+ * */
 
+typedef enum{
 
+    MCL_DMA_CH_SET_SOURCE_ADDRESS                    =  0U, /**< @brief [VALUE]   The Source Address Parameter sets the Dma Channel source address value. */
 
+    MCL_DMA_CH_SET_SOURCE_SIGNED_OFFSET              =  1U, /**< @brief [VALUE]   The Source Signed Offset Parameter sets the Dma Channel source signed offset value. */
 
+    MCL_DMA_CH_SET_SOURCE_SIGNED_LAST_ADDR_ADJ       =  2U, /**< @brief [VALUE]   The Source Signed Last Address Adjustment Parameter sets the Dma Channel source signed last address adjustment. */
 
+    MCL_DMA_CH_SET_SOURCE_TRANSFER_SIZE              =  3U, /**< @brief [VALUE]   The Source Transfer Size Parameter sets the Dma Channel source transfer size. */
 
+    MCL_DMA_CH_SET_SOURCE_MODULO                     =  4U, /**< @brief [VALUE]   The Source Modulo Parameter sets the Dma Channel source modulo. */
 
+    MCL_DMA_CH_SET_DESTINATION_ADDRESS               =  5U, /**< @brief [VALUE]   The Destination Address Parameter sets the Dma Channel destination address value. */
 
+    MCL_DMA_CH_SET_DESTINATION_SIGNED_OFFSET         =  6U, /**< @brief [VALUE]   The Destination Signed Offset Parameter sets the Dma Channel destination signed offset value. */
 
+    MCL_DMA_CH_SET_DESTINATION_SIGNED_LAST_ADDR_ADJ  =  7U, /**< @brief [VALUE]   The Destination Signed Last Address Adjustment Parameter sets the Dma Channel destination signed last address adjustment. */
 
+    MCL_DMA_CH_SET_DESTINATION_TRANSFER_SIZE         =  8U, /**< @brief [VALUE]   The Destination Transfer Size Parameter sets the Dma Channel destination transfer size. */
 
+    MCL_DMA_CH_SET_DESTINATION_MODULO                =  9U, /**< @brief [VALUE]   The Destination Modulo Parameter sets the Dma Channel destination modulo. */
 
+    MCL_DMA_CH_SET_MINORLOOP_EN_SRC_OFFSET           = 10U, /**< @brief [BOOLEAN] The Minor Loop Enable Source Offset Parameter enables the Dma Channel minor loop source offset. */
 
+    MCL_DMA_CH_SET_MINORLOOP_EN_DST_OFFSET           = 11U, /**< @brief [BOOLEAN] The Minor Loop Enable Destination Offset Parameter enables the Dma Channel minor loop destination offset. */
 
+    MCL_DMA_CH_SET_MINORLOOP_SIGNED_OFFSET           = 12U, /**< @brief [VALUE]   The Minor Loop Signed Offset Parameter sets the Dma Channel minor loop signed offset. */
 
+    MCL_DMA_CH_SET_MINORLOOP_EN_LINK                 = 13U, /**< @brief [BOOLEAN] The Minor Loop Enable Link Parameter enables the Dma Channel minor loop logic channel linking. */
 
+    MCL_DMA_CH_SET_MINORLOOP_LOGIC_LINK_CH           = 14U, /**< @brief [VALUE]   The Minor Loop Logic Channel Link Parameter sets the Dma Channel minor loop logic channel link. */
 
+    MCL_DMA_CH_SET_MINORLOOP_SIZE                    = 15U, /**< @brief [VALUE]   The Minor Loop Size Parameter sets the Dma Channel minor loop transfer size. */
 
+    MCL_DMA_CH_SET_MAJORLOOP_EN_LINK                 = 16U, /**< @brief [BOOLEAN] The Major Loop Enable Link Parameter enables the Dma Channel major loop logic channel linking. */
 
+    MCL_DMA_CH_SET_MAJORLOOP_LOGIC_LINK_CH           = 17U, /**< @brief [VALUE]   The Major Loop Logic Channel Link Parameter sets the Dma Channel major loop logic channel link. */
 
+    MCL_DMA_CH_SET_MAJORLOOP_COUNT                   = 18U, /**< @brief [VALUE]   The Major Loop Count Parameter sets the Dma Channel major loop count. */
 
+#if (MCL_DMA_STORE_DST_ADDR_IS_AVAILABLE == STD_ON)
 
+    MCL_DMA_CH_SET_CONTROL_STORE_DST_ADDR            = 19U, /**< @brief [VALUE]   The Store Destination Address Parameter saves the final destination address in system memory. */
 
+#endif
 
+    MCL_DMA_CH_SET_CONTROL_SOFTWARE_REQUEST          = 20U, /**< @brief [BOOLEAN] The Enable Start Parameter enables the Dma Channel start service request. */
 
+    MCL_DMA_CH_SET_CONTROL_EN_MAJOR_INTERRUPT        = 21U, /**< @brief [BOOLEAN] The Enable Major Interrupt Parameter enables the Dma Channel major interrupt. */
 
+    MCL_DMA_CH_SET_CONTROL_EN_HALF_MAJOR_INTERRUPT   = 22U, /**< @brief [BOOLEAN] The Enable Half Interrupt Parameter enables the Dma Channel half major interrupt. */
 
+    MCL_DMA_CH_SET_CONTROL_DIS_AUTO_REQUEST          = 23U, /**< @brief [BOOLEAN] The Disable Automatic Request Parameter disables the Dma Channel automatic request. */
 
+#if (MCL_DMA_END_OF_PACKET_SIGNAL_IS_AVAILABLE == STD_ON)
 
+    MCL_DMA_CH_SET_CONTROL_EN_END_OF_PACKET_SIGNAL   = 24U, /**< @brief [BOOLEAN] The Enable End Of Packet Signal Parameter enables the Dma Channel end of packet signal. */
 
+#endif
 
+    MCL_DMA_CH_SET_CONTROL_BANDWIDTH                 = 25U, /**< @brief [VALUE]   The Bandwidth Control Parameter sets the Dma Channel bandwidth control. */
 
+}Mcl_DmaChannelTransferParamType;
 
+
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel State values.
 
+ * @details The states represent the Channel status during runtime.
 
+ *
 
+ * @implements Mcl_DmaChannelStateType_enum
 
+ * */
 
+typedef enum{
 
+    MCL_DMA_CH_RESET_STATE         = 0U,
 
+    MCL_DMA_CH_READY_STATE         = 1U,
 
+    MCL_DMA_CH_TRANSFER_STATE      = 2U,
 
+    MCL_DMA_CH_SCATTERGATHER_STATE = 3U,
 
+    MCL_DMA_CH_ERROR_STATE         = 4U,
 
+}Mcl_DmaChannelStateType;
 
+
 
+#if (MCL_DMA_CRC_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel Crc Parameters.
 
+ * @details The Parameters set specific functionalities.
 
+ *
 
+ * @implements Mcl_DmaChannelCrcParamType_enum
 
+ * */
 
+typedef enum{
 
+    MCL_DMA_CH_SET_CRC_MODE             = 0U,
 
+    MCL_DMA_CH_SET_CRC_POLYNOMIAL       = 1U,
 
+    MCL_DMA_CH_SET_CRC_EN_INITIAL_VALUE = 2U,
 
+    MCL_DMA_CH_SET_CRC_INITIAL_VALUE    = 3U,
 
+    MCL_DMA_CH_SET_CRC_EN_LOGIC         = 4U,
 
+}Mcl_DmaChannelCrcParamType;
 
+#endif
 
+
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel Information Parameters.
 
+ * @details The Parameters get specific information.
 
+ *
 
+ * @implements Mcl_DmaChannelInfoParamType_enum
 
+ * */
 
+typedef enum{
 
+    MCL_DMA_CH_GET_SOURCE_ADDRESS       = 0U, /**< @brief [VALUE]   The Source Address Parameter gets the Dma Channel source address. */
 
+    MCL_DMA_CH_GET_DESTINATION_ADDRESS  = 1U, /**< @brief [VALUE]   The Destination Address Parameter gets the Dma Channel destination address. */
 
+    MCL_DMA_CH_GET_BEGIN_ITER_COUNT     = 2U, /**< @brief [VALUE]   The Begin Iteration Count Parameter gets the Dma Channel begin iteration count. */
 
+    MCL_DMA_CH_GET_CURRENT_ITER_COUNT   = 3U, /**< @brief [VALUE]   The Current Iteration Count Parameter gets the Dma Channel current iteration count. */
 
+#if (MCL_DMA_STORE_DST_ADDR_IS_AVAILABLE == STD_ON)
 
+    MCL_DMA_CH_GET_STORE_DST_ADDR       = 4U, /**< @brief [VALUE]   The Store Destination Address Parameter gets the Dma Channel stored destination address. */
 
+#endif
 
+#if (MCL_DMA_MASTER_ID_REPLICATION_IS_AVAILABLE == STD_ON)
 
+    MCL_DMA_CH_GET_MASTER_ID            = 5U, /**< @brief [VALUE]   The Master Id Parameter gets the Dma Channel master id. */
 
+#endif
 
+    MCL_DMA_CH_GET_MAJOR_INTERRUPT      = 6U, /**< @brief [BOOLEAN] The Major Interrupt Parameter gets the Dma Channel major interrupt. */
 
+    MCL_DMA_CH_GET_HALF_MAJOR_INTERRUPT = 7U, /**< @brief [BOOLEAN] The Half Major Interrupt Parameter gets the Dma Channel half major interrupt. */
 
+#if (MCL_DMA_CRC_IS_AVAILABLE == STD_ON)
 
+    MCL_DMA_CH_GET_FINAL_CRC            = 8U,
 
+#endif
 
+}Mcl_DmaChannelInfoParamType;
 
+#endif /* #if (MCL_DMA_IS_AVAILABLE == STD_ON) */
 
+
 
+#if (MCL_CACHE_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This type contains the Mcl Cache Type selection.
 
+ * @details The Cache Types select specific cache memory types.
 
+ *
 
+ * @implements Mcl_CacheType_enum
 
+ * */
 
+typedef enum{
 
+    MCL_CACHE_ALL         = 0U, /**< @brief The Cache All Parameter selects all cache types. */
 
+    MCL_CACHE_INSTRUCTION = 1U, /**< @brief The Cache Instruction Parameter selects instruction cache type. */
 
+    MCL_CACHE_DATA        = 2U, /**< @brief The Cache Data Parameter selects data cache type. */
 
+}Mcl_CacheType;
 
+#endif /* #if (MCL_CACHE_IS_AVAILABLE == STD_ON) */
 
+
 
+#if (MCL_LCU_IS_AVAILABLE == STD_ON)
 
+
 
+/**
 
+ * @brief This type contains the LCU Input Param Type.
 
+ * @details The Parameters set specific functionalities for Input
 
+ *
 
+ * @implements Mcl_LcuInputParamType_enum
 
+ * */
 
+typedef enum
 
+{
 
+    MCL_LCU_IP_INPUT_SET_MUX_SEL                   = 0U,    /**< @brief [MUXSEL] Input MUX Select. */
 
+    MCL_LCU_IP_INPUT_SET_SW_SYNC_MODE              = 1U,    /**< @brief [SW_MODE] Specifies the software sync mode for the inputs to this LC.When Software Override is enabled (SWEN),these bits control whether Software Override Value (SWVALUE) changes occur immediately or on the rising edge of the selected sync pulse */
 
+    MCL_LCU_IP_INPUT_SET_SW_OVERRIDE_EN            = 2U,    /**< @brief [SWEN] Software override input enable */
 
+    MCL_LCU_IP_INPUT_SET_SW_VALUE                  = 3U     /**< @brief [SWVALUE] Software override input value */
 
+}Mcl_LcuInputParamType;
 
+
 
+/**
 
+ * @brief This type contains the LCU Output Param Type.
 
+ * @details The Parameters set specific functionalities for Output
 
+ *
 
+ * @implements Mcl_LcuOutputParamType_enum
 
+ * */
 
+typedef enum
 
+{
 
+    MCL_LCU_IP_OUTPUT_SET_EN_DEBUG_MODE            =  0U,   /**< @brief [DBGEN] Enables outputs to continue operation in Debug mode */
 
+    MCL_LCU_IP_OUTPUT_SET_OUTPUT_ENABLE            =  1U,   /**< @brief [OUTEN] Enables LC outputs */
 
+    MCL_LCU_IP_OUTPUT_SET_LUT_CONTROL              =  2U,   /**< @brief [LUTCTRL] LUT control */
 
+    MCL_LCU_IP_OUTPUT_SET_LUT_RISE_FILTER          =  3U,   /**< @brief [LUT_RISE_FILT] LUT Rise Filter */
 
+    MCL_LCU_IP_OUTPUT_SET_LUT_FALL_FILTER          =  4U,   /**< @brief [LUT_FALL_FILT] LUT Fall Filter */
 
+    MCL_LCU_IP_OUTPUT_SET_EN_FORCE_DMA             =  5U,   /**< @brief [LUT_DMA_EN] Enables the generation of a DMA request when an LUT event occurs */
 
+    MCL_LCU_IP_OUTPUT_SET_EN_LUT_DMA               =  6U,   /**< @brief [FORCE_DMA_EN] Enables the generation of a DMA request when a force event occurs */
 
+    MCL_LCU_IP_OUTPUT_SET_EN_FORCE_INT             =  7U,   /**< @brief [LUT_INT_EN] Enables the generation of an interrupt request when an LUT event */
 
+    MCL_LCU_IP_OUTPUT_SET_EN_LUT_INT               =  8U,   /**< @brief [FORCE_INT_EN] Enables the generation of an interrupt request when a force event occurs */
 
+    MCL_LCU_IP_OUTPUT_SET_INVERT_OUTPUT            =  9U,   /**< @brief [OUTPOL] Set Output Polarity: invert or not. */
 
+    MCL_LCU_IP_OUTPUT_SET_FORCE_SIGNAL_SEL         = 10U,   /**< @brief [FORCE_SENSE] Select Force signal */
 
+    MCL_LCU_IP_OUTPUT_SET_CLEAR_FORCE_MODE         = 11U,   /**< @brief [FORCE_MODE] Force Clearing Mode */
 
+    MCL_LCU_IP_OUTPUT_SET_FORCE_SYNC_SEL           = 12U,   /**< @brief [SYNC_SEL] The Force Sync Select Parameter specifies which sync input to use for this output */
 
+    MCL_LCU_IP_OUTPUT_CLEAR_FORCE_STS              = 13U    /**< @brief [FORCESTS] Clear force event in STS */
 
+}Mcl_LcuOutputParamType;
 
+
 
+/**
 
+ * @brief This type contains the LCU Param Type to get information for input
 
+ * @details The Parameters get specific functionalities for Input
 
+ *
 
+ * @implements Mcl_LcuInputInfoParamType_enum
 
+ * */
 
+typedef enum
 
+{
 
+    MCL_LCU_IP_INPUT_GET_LOGIC_INPUT_STATE         = 0U,
 
+    MCL_LCU_IP_INPUT_GET_SW_OVERRIDE_STATE         = 1U,
 
+}Mcl_LcuInputInfoParamType;
 
+
 
+/**
 
+ * @brief This type contains the LCU Param Type to get information for output
 
+ * @details The Parameters get specific functionalities for Output
 
+ *
 
+ * @implements Mcl_LcuOutputInfoParamType_enum
 
+ * */
 
+typedef enum
 
+{
 
+    MCL_LCU_IP_OUTPUT_GET_LOGIC_OUTPUT_STATE       = 0U,
 
+    MCL_LCU_IP_OUTPUT_GET_FORCE_OUTPUT             = 1U,
 
+    MCL_LCU_IP_OUTPUT_GET_FORCE_STATUS             = 2U,
 
+    MCL_LCU_IP_OUTPUT_GET_LUT_STATUS               = 3U,
 
+    MCL_LCU_IP_OUTPUT_GET_COMBINE_FORCE_INPUT      = 4U,
 
+}Mcl_LcuOutputInfoParamType;
 
+
 
+#endif /* #if (MCL_LCU_IS_AVAILABLE == STD_ON) */
 
+
 
+/*==================================================================================================
 
+*                                  STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+#if (MCL_DMA_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel Global List.
 
+ * @details The Mcl Dma Channel Global List contains a pair composed from Dma Channel Global Parameter
 
+ *          Type and the Value of the parameter.
 
+ *
 
+ * @implements Mcl_DmaChannelGlobalListType_struct
 
+ * */
 
+typedef struct{
 
+    Mcl_DmaChannelGlobalParamType Param;   /**< @brief The Mcl Dma Channel Global Parameter Type selects a parameter form the Global Parameter enum type. */
 
+    uint32 Value;                          /**< @brief The Value stores the parameter's value. */
 
+}Mcl_DmaChannelGlobalListType;
 
+
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel Transfer List.
 
+ * @details The Mcl Dma Channel Transfer List contains a pair composed from Dma Channel Transfer
 
+ *          Parameter Type and the Value of the parameter.
 
+ *
 
+ * @implements Mcl_DmaChannelTransferListType_struct
 
+ * */
 
+typedef struct{
 
+    Mcl_DmaChannelTransferParamType Param; /**< @brief The Mcl Dma Channel Transfer Parameter Type selects a parameter form the Transfer Parameter enum type. */
 
+    uint32 Value;                          /**< @brief The Value stores the parameter's value. */
 
+}Mcl_DmaChannelTransferListType;
 
+
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel Scatter/Gather List.
 
+ * @details The Mcl Dma Channel Scatter/Gather List contains a pair composed from Dma Channel Scatter/Gather
 
+ *          Parameter Type and the Value of the parameter.
 
+ *
 
+ * @implements Mcl_DmaChannelScatterGatherListType_struct
 
+ * */
 
+typedef struct{
 
+    Mcl_DmaChannelTransferParamType Param; /**< @brief The Mcl Dma Channel Transfer Parameter Type selects a parameter form the Transfer Parameter enum type. */
 
+    uint32 Value;                          /**< @brief The Value stores the parameter's value. */
 
+}Mcl_DmaChannelScatterGatherListType;
 
+
 
+#if (MCL_DMA_CRC_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel Crc List.
 
+ * @details The Mcl Dma Channel Crc List contains a pair composed from Dma Channel Crc
 
+ *          Parameter Type and the Value of the parameter.
 
+ *
 
+ * @implements Mcl_DmaChannelCrcListType_struct
 
+ * */
 
+typedef struct{
 
+    Mcl_DmaChannelCrcParamType Param;      /**< @brief The Mcl Dma Channel Crc Parameter Type selects a parameter form the Crc Parameter enum type. */
 
+    uint32 Value;                          /**< @brief The Value stores the parameter's value. */
 
+}Mcl_DmaChannelCrcListType;
 
+#endif
 
+
 
+/**
 
+ * @brief This type contains the Mcl Dma Instance Status.
 
+ * @details The Mcl Dma Instance Status contains the Hardware Errors, Active Id and Active indication for
 
+ *          the running Dma Channel.
 
+ *
 
+ * @implements Mcl_DmaInstanceStatusType_struct
 
+ * */
 
+typedef struct{
 
+    uint32  Errors;                        /**< @brief [VALUE]   The Errors value is read from the DMA Instance Error Register (ES) as it is. */
 
+    uint8   ActiveId;                      /**< @brief [VALUE]   The ActiveId value is read from the DMA Instance Control Register (CR) field ACTIVE_ID. */
 
+    boolean Active;                        /**< @brief [BOOLEAN] The Active value is read from the DMA Instance Control Register (CR) field ACTIVE. */
 
+}Mcl_DmaInstanceStatusType;
 
+
 
+/**
 
+ * @brief This type contains the Mcl Dma Channel Status.
 
+ * @details The Mcl Dma Channel Status contains the Hardware Errors, Active status and Done indication for
 
+ *          the running Dma Channel.
 
+ *
 
+ * @implements Mcl_DmaChannelStatusType_struct
 
+ * */
 
+typedef struct{
 
+    Mcl_DmaChannelStateType ChannelState;  /**< @brief [VALUE]   The ChStateValue value is read from the internal DMA Driver Channel State Machine. Check UM for additional information. */
 
+    uint32  Errors;                        /**< @brief [VALUE]   The Errors value is read from the DMA Channel Error Register (CHx_ES) as it is. */
 
+    boolean Active;                        /**< @brief [BOOLEAN] The Active value is read from the DMA Channel Control and Status Register (CHx_CSR) field ACTIVE. */
 
+    boolean Done;                          /**< @brief [BOOLEAN] The Active value is read from the DMA Channel Control and Status Register (CHx_CSR) field DONE. */
 
+}Mcl_DmaChannelStatusType;
 
+#endif /* #if (MCL_DMA_IS_AVAILABLE == STD_ON) */
 
+
 
+#if (MCL_LCU_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This type contains the Mcl Lcu Multiple Inputs and Multiple Value.
 
+ * @details The Mcl Lcu Multi Input Value contains a pair composed from Logic Input ID and the
 
+ *          Value of configuration.
 
+ *          The LogicInputId selects a Logic Input
 
+ *          The Value stores the configuration's value.
 
+ * @implements Mcl_LcuSyncInputValueType_struct
 
+ * */
 
+typedef struct{
 
+    uint8 LogicInputId;
 
+    uint8 Value;
 
+}Mcl_LcuSyncInputValueType;
 
+
 
+/**
 
+ * @brief This type contains the Mcl Lcu Multiple Outputs and Multiple Value.
 
+ * @details The Mcl Lcu Multi Output Value contains a pair composed from Logic Output ID and the
 
+ *          Value of configuration.
 
+ *          The LogicOutputId selects a Logic Output
 
+ *          The Value stores the configuration's value.
 
+ * @implements Mcl_LcuSyncOutputValueType_struct
 
+ * */
 
+typedef struct{
 
+    uint8 LogicOutputId;
 
+    uint16 Value;
 
+}Mcl_LcuSyncOutputValueType;
 
+
 
+/**
 
+ * @brief This type contains the Mcl Lcu Input with multiple value
 
+ * @details The Mcl Lcu Input with Multiple Value contains a pair composed from Input Parameter and
 
+ *          Value of the Parameter.
 
+ *          The Mcl Lcu Input Param Type selects a parameter from the Lcu_Ip_InputParamType enum
 
+ *          The Value stores the configuration's value.
 
+ * @implements Mcl_LcuAsyncInputValueType_struct
 
+ * */
 
+typedef struct{
 
+    Mcl_LcuInputParamType Param;
 
+    uint8 Value;
 
+}Mcl_LcuAsyncInputValueType;
 
+
 
+/**
 
+ * @brief This type contains the Mcl Lcu Output with multiple value
 
+ * @details The Mcl Lcu Output with Multiple Value contains a pair composed from Output Parameter
 
+ *          and Value of the Parameter.
 
+ *          The Mcl Lcu Output Param Type selects a parameter from the Lcu_Ip_OutputParamType enum
 
+ *          The Value stores the configuration's value.
 
+ * @implements Mcl_LcuAsyncOutputValueType_struct
 
+ * */
 
+typedef struct{
 
+    Mcl_LcuOutputParamType Param;
 
+    uint16 Value;
 
+}Mcl_LcuAsyncOutputValueType;
 
+
 
+#endif /* #if (MCL_LCU_IS_AVAILABLE == STD_ON) */
 
+
 
+/*==================================================================================================
 
+*                                  GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define MCL_START_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+/**
 
+ * @brief This function initializes the Mcl Driver.
 
+ * @details This service is a non reentrant function that shall initialize the Mcl driver.
 
+ *             The initialization is applied for the enabled IPs, configured statically.
 
+ *
 
+ * @param[in]  ConfigPtr         Pointer to the configuration structure.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_Init_Activity
 
+ * */
 
+void Mcl_Init(const Mcl_ConfigType * const ConfigPtr);
 
+
 
+/**
 
+ * @brief This function deinitializes the Mcl Driver.
 
+ * @details This service is a non reentrant function that shall deinitialize the Mcl driver.
 
+ *          The deinitialization is applied for the enabled IPs, configured statically.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_DeInit_Activity
 
+ * */
 
+void Mcl_DeInit(void);
 
+
 
+#if (MCL_DMA_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This function sets Dma Instance Command.
 
+ * @details This service is a reentrant function that shall command the Dma Instance.
 
+ *          The command shall trigger specific functionalities of the Dma Instance.
 
+ *
 
+ * @param[in]  Instance          Selection value of the Logic Instance.
 
+ * @param[in]  Command           The command for the Logic Instance.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetDmaInstanceCommand_Activity
 
+ * */
 
+void Mcl_SetDmaInstanceCommand(const uint32 Instance, const Mcl_DmaInstanceCmdType Command);
 
+
 
+/**
 
+ * @brief This function gets Dma Instance Status.
 
+ * @details This service is a reentrant function that shall get the Dma Instance status.
 
+ *          The command shall read specific functionalities of the Dma Instance.
 
+ *
 
+ * @param[in]  Instance          Selection value of the Logic Instance.
 
+ * @param[out] Status            Pointer to the Dma Instance status.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_GetDmaInstanceStatus_Activity
 
+ * */
 
+void Mcl_GetDmaInstanceStatus(const uint32 Instance, Mcl_DmaInstanceStatusType * const Status);
 
+
 
+/**
 
+ * @brief This function sets Dma Channel Command.
 
+ * @details This service is a reentrant function that shall command the Dma Channel.
 
+ *          The command shall trigger specific functionalities of the Dma Channel.
 
+ *
 
+ * @param[in]  Channel           Specifies the Logic Channel Tag defined by the user.
 
+ * @param[in]  Command           The command for the Logic Channel.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetDmaChannelCommand_Activity
 
+ * */
 
+void Mcl_SetDmaChannelCommand(const uint32 Channel, const Mcl_DmaChannelCmdType Command);
 
+
 
+/**
 
+ * @brief This function gets Dma Channel Status.
 
+ * @details This service is a reentrant function that shall get the Dma Channel status.
 
+ *          The command shall read specific functionalities of the Dma Channel.
 
+ *
 
+ * @param[in]  Channel           Specifies the Logic Channel Tag defined by the user.
 
+ * @param[out] Status            Pointer to the Dma Channel status.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_GetDmaChannelStatus_Activity
 
+ * */
 
+void Mcl_GetDmaChannelStatus(const uint32 Channel, Mcl_DmaChannelStatusType * const Status);
 
+
 
+/**
 
+ * @brief This function sets Dma Channel Global List settings.
 
+ * @details This service is a reentrant function that shall set the Dma Channel
 
+ *          global parameters list.
 
+ *          The list is composed of an array of Dma Channel global parameters settings.
 
+ *          The settings list(array) is defined by the user needs: it contains the
 
+ *          desired parameters to be configured, in any desired order.
 
+ *
 
+ *          How to use this interface:
 
+ *          1. Use the "Mcl_DmaChannelGlobalListType" to create a list(array) with the desired
 
+ *          paramaters to configure (see parameters: "Mcl_DmaChannelGlobalParamType")
 
+ *            The list can declared globally or locally:
 
+ *          Global example:
 
+ *              Mcl_DmaChannelGlobalListType global_Mcl_DmaChannelGlobalList0[NUMBER_OF_PARAMETERS] = {...};
 
+ *          Local example:
 
+ *              Mcl_DmaChannelGlobalListType Mcl_DmaChannelGlobalList[NUMBER_OF_PARAMETERS];
 
+ *              Mcl_DmaChannelGlobalList[PARAMETER0].Param = MCL_DMA_CH_SET_EN_BUFFERED_WRITES;
 
+ *              Mcl_DmaChannelGlobalList[PARAMETER0].Value = TRUE;
 
+ *              Mcl_DmaChannelGlobalList[PARAMETER1].Param = ...;
 
+ *              Mcl_DmaChannelGlobalList[PARAMETER1].Value = ...;
 
+ *          2. Call the "Mcl_SetDmaChannelGlobalList()" interface:
 
+ *              Mcl_SetDmaChannelGlobalList(LOGIC_CHANNELx, Mcl_DmaChannelGlobalList, NUMBER_OF_PARAMETERS);
 
+ *
 
+ * @param[in]  Channel           Specifies the Logic Channel Tag defined by the user.
 
+ * @param[in]  List              Pointer to the Global List Array.
 
+ * @param[in]  ListDimension     Number of entries in the List.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetDmaChannelGlobalList_Activity
 
+ * */
 
+void Mcl_SetDmaChannelGlobalList(const uint32 Channel, const Mcl_DmaChannelGlobalListType List[], const uint32 ListDimension);
 
+
 
+/**
 
+ * @brief This function sets Dma Channel Transfer List settings.
 
+ * @details This service is a reentrant function that shall set the Dma Channel
 
+ *          transfer parameters list.
 
+ *          The list is composed of an array of Dma Channel transfer parameters settings.
 
+ *          The settings array is defined by the user needs: it contains entries for each desired
 
+ *          parameter to be configured, in any suitable order.
 
+ *
 
+ *          How to use this interface:
 
+ *          1. Use the "Mcl_DmaChannelTransferListType" to create a list(array) with the desired
 
+ *          paramaters to configure (see parameters: "Mcl_DmaChannelTransferParamType")
 
+ *            The list can declared globally or locally:
 
+ *          Global example:
 
+ *              Mcl_DmaChannelTransferListType global_Mcl_DmaChannelTransferList0[NUMBER_OF_PARAMETERS] = {...};
 
+ *          Local example:
 
+ *              Mcl_DmaChannelTransferListType Mcl_DmaChannelTransferList[NUMBER_OF_PARAMETERS];
 
+ *              Mcl_DmaChannelTransferList[PARAMETER0].Param = MCL_DMA_CH_SET_SOURCE_ADDRESS;
 
+ *              Mcl_DmaChannelTransferList[PARAMETER0].Value = &SourceBuffer;
 
+ *              Mcl_DmaChannelTransferList[PARAMETER1].Param = MCL_DMA_CH_SET_DESTINATION_ADDRESS;
 
+ *              Mcl_DmaChannelTransferList[PARAMETER1].Value = &DestinationBuffer;
 
+ *          2. Call the "Mcl_SetDmaChannelTransferList()" interface:
 
+ *              Mcl_SetDmaChannelTransferList(LOGIC_CHANNELx, Mcl_DmaChannelTransferList, NUMBER_OF_PARAMETERS);
 
+ *
 
+ * @param[in]  Channel           Specifies the Logic Channel Tag defined by the user.
 
+ * @param[in]  List              Pointer to the Transfer List Array.
 
+ * @param[in]  ListDimension     Number of entries in the List.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetDmaChannelTransferList_Activity
 
+ * */
 
+void Mcl_SetDmaChannelTransferList(const uint32 Channel, const Mcl_DmaChannelTransferListType List[], const uint32 ListDimension);
 
+
 
+/**
 
+ * @brief This function sets Dma Channel Scatter/Gather List settings.
 
+ * @details This service is a reentrant function that shall set the Dma Channel
 
+ *          scatter/gather parameters list.
 
+ *          The Scatter/Gather List configures Logic Elements belonging to the same
 
+ *          Dma Logic Channel.
 
+ *          The settings array is defined by the user needs: it contains entries for
 
+ *          each desired parameter to be configured, in any suitable order.
 
+ *
 
+ *          How to use this interface:
 
+ *          1. Use the "Mcl_DmaChannelScatterGatherListType" to create a list(array) with the desired
 
+ *          paramaters to configure (see parameters: "Mcl_DmaChannelTransferParamType")
 
+ *            The list can declared globally or locally:
 
+ *          Global example:
 
+ *              Mcl_DmaChannelScatterGatherListType global_Mcl_DmaChannelScatterGatherList0[NUMBER_OF_PARAMETERS] = {...};
 
+ *          Local example:
 
+ *              Mcl_DmaChannelScatterGatherListType Mcl_DmaChannelScatterGatherList[NUMBER_OF_PARAMETERS];
 
+ *              Mcl_DmaChannelScatterGatherList[PARAMETER0].Param = MCL_DMA_CH_SET_SOURCE_ADDRESS;
 
+ *              Mcl_DmaChannelScatterGatherList[PARAMETER0].Value = &SourceBuffer;
 
+ *              Mcl_DmaChannelScatterGatherList[PARAMETER1].Param = MCL_DMA_CH_SET_DESTINATION_ADDRESS;
 
+ *              Mcl_DmaChannelScatterGatherList[PARAMETER1].Value = &DestinationBuffer;
 
+ *          2. Call the "Mcl_SetDmaChannelScatterGatherList()" interface:
 
+ *              Mcl_SetDmaChannelScatterGatherList(LOGIC_CHANNELx, LOGIC_ELEMENTy, Mcl_DmaChannelScatterGatherList, NUMBER_OF_PARAMETERS);
 
+ *
 
+ * @param[in]  Channel           Specifies the Logic Channel Tag defined by the user.
 
+ * @param[in]  Element           Specifies the Logic Element Id.
 
+ * @param[in]  List              Pointer to the Scatter/Gather List Array.
 
+ * @param[in]  ListDimension     Number of entries in the List.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetDmaChannelScatterGatherList_Activity
 
+ * */
 
+void Mcl_SetDmaChannelScatterGatherList(const uint32 Channel, const uint32 Element, const Mcl_DmaChannelScatterGatherListType List[],const uint32 ListDimension);
 
+
 
+#if (MCL_DMA_CRC_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This function sets Dma Channel Crc List settings.
 
+ * @details This service is a reentrant function that shall set the Dma Channel
 
+ *          Crc parameters list.
 
+ *          The list is composed of an array of Dma Channel Crc parameters settings.
 
+ *          The settings array is defined by the user needs: it contains entries for each desired
 
+ *          parameter to be configured, in any suitable order.
 
+ *
 
+ *          How to use this interface:
 
+ *          1. Use the "Mcl_DmaChannelCrcListType" to create a list(array) with the desired
 
+ *          paramaters to configure (see parameters: "Mcl_DmaChannelCrcParamType")
 
+ *            The list can declared globally or locally:
 
+ *          Global example:
 
+ *              Mcl_DmaChannelCrcListType global_Mcl_DmaChannelCrcList0[NUMBER_OF_PARAMETERS] = {...};
 
+ *          Local example:
 
+ *              Mcl_DmaChannelCrcListType Mcl_DmaChannelCrcList[NUMBER_OF_PARAMETERS];
 
+ *              Mcl_DmaChannelCrcList[PARAMETER0].Param = MCL_DMA_CH_SET_CRC_POLYNOMIAL;
 
+ *              Mcl_DmaChannelCrcList[PARAMETER0].Value = ISCSICRC;
 
+ *              Mcl_DmaChannelCrcList[PARAMETER1].Param = MCL_DMA_CH_SET_CRC_EN_LOGIC;
 
+ *              Mcl_DmaChannelCrcList[PARAMETER1].Value = TRUE;
 
+ *          2. Call the "Mcl_SetDmaChannelCrcList()" interface:
 
+ *              Mcl_SetDmaChannelCrcList(LOGIC_CHANNELx, Mcl_DmaChannelCrcList, NUMBER_OF_PARAMETERS);
 
+ *
 
+ * @param[in]  Channel           Specifies the Logic Channel Tag defined by the user.
 
+ * @param[in]  List              Pointer to the Crc List Array.
 
+ * @param[in]  ListDimension     Number of entries in the List.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetDmaChannelCrcList_Activity
 
+ * */
 
+void Mcl_SetDmaChannelCrcList(const uint32 Channel, const Mcl_DmaChannelCrcListType List[], const uint32 ListDimension);
 
+#endif
 
+
 
+/**
 
+ * @brief This function gets the Dma Channel Parameter value.
 
+ * @details This service is a reentrant function that shall get the Dma Channel
 
+ *          parameters value.
 
+ *
 
+ * @param[in]  Channel           Specifies the Logic Channel Tag defined by the user.
 
+ * @param[in]  Param             Selection parameter.
 
+ * @param[out] Value             Pointer to the parameter value.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_GetDmaChannelParam_Activity
 
+ * */
 
+void Mcl_GetDmaChannelParam(const uint32 Channel, const Mcl_DmaChannelInfoParamType Param, uint32 * const Value);
 
+
 
+/**
 
+ * @brief This function configures the Dma Channel Scatter/Gather.
 
+ * @details This service is a reentrant function that shall configure the Dma Channel
 
+ *          scatter/gather functionality.
 
+ *          The Scatter/Gather settings, for the specified Dma Logic Channel, are loaded
 
+ *          into the Software TCDs. Each software TCD corresponds to a Logic Element.
 
+ *          The specified Logic Element shall be loaded into the Dma Logic Channel's
 
+ *          Hardware TCD.
 
+ *          The Logic Elements (describing the Software TCDs) form a simple chained list,
 
+ *          the "Element" function parameter representing the lists's head.
 
+ *
 
+ * @param[in]  Channel           Specifies the Logic Channel Tag defined by the user.
 
+ * @param[in]  Element           Specifies the Logic Element Id representing the
 
+ *                               list's head.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetDmaChannelScatterGatherConfig_Activity
 
+ * */
 
+void Mcl_SetDmaChannelScatterGatherConfig(const uint32 Channel, const uint32 Element);
 
+#endif /* #if (MCL_DMA_IS_AVAILABLE == STD_ON) */
 
+
 
+
 
+
 
+#if (MCL_TRGMUX_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This function sets the Trgmux Trigger Input selection.
 
+ * @details This service is a reentrant function that shall configure the Trgmux Trigger
 
+ *          functionality.
 
+ *
 
+ * @param[in]  Trigger           Selection value of the Logic Trigger.
 
+ * @param[in]  Input             Selection value for the Logic Trigger's Input.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetTrgMuxInput_Activity
 
+ * */
 
+void Mcl_SetTrgMuxInput(const uint32 Trigger, const uint32 Input);
 
+
 
+/**
 
+ * @brief This function sets the Trgmux Trigger Lock.
 
+ * @details This service is a reentrant function that shall configure the Trgmux Trigger
 
+ *          Lock functionality.
 
+ *
 
+ * @param[in]  Trigger           Selection value of the Logic Trigger.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetTrgMuxLock_Activity
 
+ * */
 
+void Mcl_SetTrgMuxLock(const uint32 Trigger);
 
+#endif /* MCL_TRGMUX_IS_AVAILABLE */
 
+
 
+#if (MCL_CACHE_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This function enables the Cache.
 
+ * @details This service is a reentrant function that shall enable the Cache functionality.
 
+ *
 
+ * @param[in]  CacheType         Selection value of the Cache Type.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_CacheEnable_Activity
 
+ * */
 
+void Mcl_CacheEnable(Mcl_CacheType CacheType);
 
+
 
+/**
 
+ * @brief This function disables the Cache.
 
+ * @details This service is a reentrant function that shall disable the Cache functionality.
 
+ *
 
+ * @param[in]  CacheType         Selection value of the Cache Type.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_CacheDisable_Activity
 
+ * */
 
+void Mcl_CacheDisable(Mcl_CacheType CacheType);
 
+
 
+/**
 
+ * @brief This function Invalidates the Cache.
 
+ * @details This service is a reentrant function that shall Invalidate the Cache functionality.
 
+ *          The Invalidation applies to the entire Cache.
 
+ *
 
+ * @param[in]  CacheType         Selection value of the Cache Type.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_CacheInvalidate_Activity
 
+ * */
 
+void Mcl_CacheInvalidate(Mcl_CacheType CacheType);
 
+
 
+/**
 
+ * @brief This function Cleans the Cache.
 
+ * @details This service is a reentrant function that shall Clean the Cache functionality.
 
+ *          The Clean applies to the entire Cache.
 
+ *          By enabling the Invalidation, the function shall execute specific Cache
 
+ *          Clean&Invalidate function.
 
+ *
 
+ * @param[in]  CacheType         Selection value of the Cache Type.
 
+ * @param[in]  EnInvalidate      Enable the Invalidation specific functionality.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_CacheClean_Activity
 
+ * */
 
+void Mcl_CacheClean(Mcl_CacheType CacheType, boolean EnInvalidate);
 
+
 
+/**
 
+ * @brief This function Invalidates the Cache by address.
 
+ * @details This service is a reentrant function that shall Invalidate the Cache
 
+ *          by address.
 
+ *          The Invalidation applies to the area in Cache specified by the address and length.
 
+ *          The buffer shall be aligned to the Cache Line size.
 
+ *
 
+ * @param[in]  CacheType         Selection value of the Cache Type.
 
+ * @param[in]  Addr              Address value of the buffer.
 
+ * @param[in]  Length            Length value of the buffer.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_CacheInvalidateByAddr_Activity
 
+ * */
 
+void Mcl_CacheInvalidateByAddr(Mcl_CacheType CacheType, uint32 Addr, uint32 Length);
 
+
 
+/**
 
+ * @brief This function Cleans the Cache by address.
 
+ * @details This service is a reentrant function that shall Clean the Cache by address.
 
+ *          The Clean applies to the area in Cache specified by the address and length.
 
+ *          By enabling the Invalidation, the function shall execute specific Cache
 
+ *          Clean&Invalidate function.
 
+ *
 
+ * @param[in]  CacheType         Selection value of the Cache Type.
 
+ * @param[in]  EnInvalidate      Enable the Invalidation specific functionality.
 
+ * @param[in]  Addr              Address value of the buffer.
 
+ * @param[in]  Length            Length value of the buffer.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_CacheCleanByAddr_Activity
 
+ * */
 
+void Mcl_CacheCleanByAddr(Mcl_CacheType CacheType, boolean EnInvalidate, uint32 Addr, uint32 Length);
 
+#endif /* #if (MCL_CACHE_IS_AVAILABLE == STD_ON) */
 
+
 
+#if (MCL_EMIOS_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief Allow the user to specify the number of bus reload events skipped. Reload Signal Output Delay Interval.
 
+ *
 
+ * @param logicChannel Should be used the generated define MCL_EMIOS_LOGIC_CH[number]
 
+ *                          - [number] can be indentied by (uint16)((0U << hwNumber) + hwChannel) from define
 
+ *                     A list with this generated defines can be found on Emios_Mcl_Ip_Cfg_Defines.h
 
+ * @param interval      00000b - Every event
 
+ *                      00001b - Every 2nd event
 
+ *                      00010b - Every 3rd event
 
+ *                      . . .
 
+ *                      11111b - Every 32nd event
 
+ */
 
+void Mcl_Emios_SetReloadInterval(uint16 logicChannel, uint8 interval);
 
+
 
+/**
 
+ * @brief Change the period on active/intialized EMIOS counter(master) bus.
 
+ *
 
+ * @param logicChannel Should be used the generated define MCL_EMIOS_LOGIC_CH[number]
 
+ *                          - [number] can be indentied by (uint16)((0U << hwNumber) + hwChannel) from define
 
+ *                     A list with this generated defines can be found on Emios_Mcl_Ip_Cfg_Defines.h
 
+ * @param period       New period value.
 
+ * @param syncUpdate   Stop the channel output if syncronus start is chose.
 
+ *                         FALSE - the function will update the period and the transfer compartor will be enable
 
+ *                         TRUE  - the function will disable the comparator transfer and after that update the period
 
+ *                     After the function is called with syncUpdate=TRUE, it will be needed to call a function
 
+ *                     which will enable the transfer comparator.
 
+ * 
+ *                 !!! Running the following code will NOT DISABLE AND after ENABLE compartor transfer.
 
+ *                     Mcl_Emios_SetCounterBusPeriod(logicChannel, period, syncUpdate=TRUE);
 
+ *                     Mcl_Emios_SetCounterBusPeriod(logicChannel, period, syncUpdate=FALSE);
 
+ */
 
+void Mcl_Emios_SetCounterBusPeriod(uint16 logicChannel, uint16 period, boolean syncUpdate);
 
+
 
+#endif /* MCL_EMIOS_IS_AVAILABLE == STD_ON */
 
+
 
+#if (MCL_COMMON_TIMEBASE_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief       Implementation specific function to updates the Global Timebase bits of configured modules.
 
+ * @details     This function is used to set the global timebase bits for modules that support
 
+ *              the global timebase feature. The function selects the module that gives the common timebase
 
+ *              and the modules that are use this timebase (as bits in elementSyncList).
 
+ *              Then it synchronizes the modules.
 
+ *              example:
 
+ *                     elementSyncList is 0x0003 - modules 0 and 1 use the timebase given by instance
 
+ *                     elementSyncList is 0x0005 - modules 0 and 2 use the timebase given by instance
 
+ *
 
+ * @param[in]   instance        FTM module id
 
+ * @param[in]   elementSyncList FTM module mask value
 
+ * @return      void
 
+ */
 
+void Mcl_SelectCommonTimebase(uint8 instance, uint16 elementSyncList);
 
+#endif /* MCL_COMMON_TIMEBASE_IS_AVAILABLE */
 
+
 
+#if (MCL_LCU_IS_AVAILABLE == STD_ON)
 
+
 
+/* Instance configuration */
 
+/**
 
+ * @brief [WP]This function Enable Write Protect feature for the Logic Instance.
 
+ * @details This service is a reentrant function that shall turns on write protection for all LCU
 
+ *          registers except SWVALUE, LCn_STS, and FORCEST.
 
+ *
 
+ * @param[in]  LogicInstance         Specifies the Logic Instance.Using define generated by the
 
+ *                                   configurator (Example : LCU_LOGIC_INSTANCE_0)
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuWriteProtect_Activity
 
+ * */
 
+void Mcl_SetLcuWriteProtect(const uint8 LogicInstance);
 
+
 
+#if (MCL_LCU_SYNC_FUNC_IS_AVAILABLE == STD_ON)
 
+
 
+/* Input configuration */
 
+
 
+/**
 
+ * @brief [SWEN] This function Enable/Disable software override of LC input.
 
+ * @details This service is a reentrant function that shall Enable/Disable software override of LC
 
+ *          input. When enable multi cores, the API shall write the values into the register only
 
+ *          if the list contains all the Inputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicInputId -> The Logic Input Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_SW_OVERRIDE_DISABLE/LCU_IP_SW_OVERRIDE_ENABLE
 
+ *
 
+ * @param[in]  List         Specifies the input configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncInputSwOverrideEnable_Activity
 
+ * */
 
+void Mcl_SetLcuSyncInputSwOverrideEnable(const Mcl_LcuSyncInputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [SWVALUE] This function specifies the software override value for each LC input.
 
+ * @details This service is a reentrant function that shall specifies the software override value
 
+ *          for each LC input. When enable multi cores, the API shall write the values into the
 
+ *          register only if the list contains all the Inputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicInputId -> The Logic Input Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_SW_OVERRIDE_LOGIC_LOW/LCU_IP_SW_OVERRIDE_LOGIC_HIGH
 
+ *
 
+ * @param[in]  List         Specifies the input configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncInputSwOverrideValue_Activity
 
+ * */
 
+void Mcl_SetLcuSyncInputSwOverrideValue(const Mcl_LcuSyncInputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [MUXSEL] This function selects the source of the LC input.
 
+ * @details This service is a reentrant function that shall selects the source of the LC input.
 
+ *          When enable multi cores, the API shall write the values into the register only if the
 
+ *          list contains all the Inputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicInputId -> The Logic Input Id generated by the configurator
 
+ *          List[x].Value -> Unsigned Integer: [0, 255]
 
+ *
 
+ * @param[in]  List         Specifies the input configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncInputMuxSelect_Activity
 
+ * */
 
+void Mcl_SetLcuSyncInputMuxSelect(const Mcl_LcuSyncInputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [SW_MODE] specifies the software sync mode for the inputs to this LC.
 
+ * @details This service is a reentrant function that shall specifies the software sync mode for
 
+ *          the inputs to this LC.When Software Override is enabled (SWEN), these bits control
 
+ *          whether Software Override Value (SWVALUE) changes occur immediately or on the rising
 
+ *          edge of the selected sync pulse. When enable multi cores, the API shall write the
 
+ *          values into the register only if the list contains all the Inputs related to the same
 
+ *          partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicInputId -> The Logic Input Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_SW_SYNC_IMMEDIATE/LCU_IP_SW_SYNC_ON_RISING_EDGE
 
+ *
 
+ * @param[in]  List         Specifies the input configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncInputSwSyncMode_Activity
 
+ * */
 
+void Mcl_SetLcuSyncInputSwSyncMode(const Mcl_LcuSyncInputValueType List[], const uint8 Dimension);
 
+
 
+/* Output configuration */
 
+
 
+/**
 
+ * @brief [DBGEN] This function Enables/Disables outputs to continue operation in Debug mode.
 
+ * @details This service is a reentrant function that shall Enables/Disables outputs to continue
 
+ *          operation in Debug mode. When enable multi cores, the API shall write the values into
 
+ *          the register only if the list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_DEBUG_DISABLE/LCU_IP_DEBUG_ENABLE
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputDebugMode_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputDebugMode(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [OUTEN] This function Enables/Disables LC outputs.
 
+ * @details This service is a reentrant function that shall Enables/Disables LC outputs. When
 
+ *          enable multi cores, the API shall write the values into the register only if the list
 
+ *          contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_OUTPUT_DISABLE/LCU_IP_OUTPUT_ENABLE
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputEnable_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputEnable(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [FORCE_SENSE] This function specifies which force inputs affect output.
 
+ * @details This service is a reentrant function that shall specifies which force inputs affect
 
+ *          output. When enable multi cores, the API shall write the values into the register only
 
+ *          if the list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Unsigned Integer: [0, 255]
 
+ *          For each bit:
 
+ *              0b - Does not affect
 
+ *              1b - Affects
 
+.*          Example: 011b specifies: force inputs 0 and 1 will affect for this logic output,
 
+.*          but force inputs 2 will not affect
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputForceInputSensitivity_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputForceInputSensitivity(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/* [FORCE_MODE] Specifies the timing for clearing force events for output */
 
+/**
 
+ * @brief [FORCE_MODE] This function specifies the timing for clearing force events for output.
 
+ * @details This service is a reentrant function that shall specifies the timing for clearing
 
+ *          force events for output. When enable multi cores, the API shall write the values into
 
+ *          the register only if the list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_CLEAR_FORCE_SIGNAL_IMMEDIATE/
 
+ *          LCU_IP_CLEAR_FORCE_SIGNAL_ON_RISING_EDGE/
 
+ *          LCU_IP_CLEAR_FORCE_SIGNAL_AFTER_CLEAR_STATUS/
 
+ *          LCU_IP_CLEAR_FORCE_SIGNAL_ON_RISING_EDGE_AFTER_CLEAR_STATUS
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputForceClearingMode_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputForceClearingMode(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [SYNC_SEL] This function specifies which sync input to use for Force signal.
 
+ * @details This service is a reentrant function that shall specifies which sync input to use for
 
+ *          Force signal. When enable multi cores, the API shall write the values into the
 
+ *          register only if the list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value ->  Unsigned Integer: [0, 255]
 
+ *                            00b - Sync input 0
 
+ *                            01b - Sync input 1
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputForceSyncSelect_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputForceSyncSelect(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [OUTPOL] This function specifies the polarity of the outputs.
 
+ * @details This service is a reentrant function that shall specifies the polarity of the outputs
 
+ *          When enable multi cores, the API shall write the values into the register only if the
 
+ *          list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_FORCE_POL_NOT_INVERTED/LCU_IP_FORCE_POL_INVERTED
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputPolarity_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputPolarity(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [FORCE_DMA_EN] This function Enables/Disable the generation of a DMA request when a
 
+ *          force event occurs.
 
+ * @details This service is a reentrant function that shall Enables/Disable the generation of a
 
+ *          DMA request when a force event occurs. When enable multi cores, the API shall write
 
+ *          the values into the register only if the list contains all the Outputs related to the
 
+ *          same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_DMA_DISABLE/LCU_IP_DMA_ENABLE
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputForceDma_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputForceDma(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [FORCE_INT_EN] This function Enables/Disable the generation of an interrupt request when
 
+ *          force event occurs.
 
+ * @details This service is a reentrant function that shall Enables/Disable the generation of an
 
+ *          interrupt request when force event occurs. When enable multi cores, the API shall
 
+ *          write the values into the register only if the list contains all the Outputs related
 
+ *          to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_INT_DISABLE/LCU_IP_INT_ENABLE
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputForceInt_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputForceInt(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [LUT_DMA_EN] This function Enables/Disable the generation of a DMA request when a
 
+ *          LUT event occurs.
 
+ * @details This service is a reentrant function that shall Enables/Disable the generation of a
 
+ *          DMA request when a LUT event occurs. When enable multi cores, the API shall write the
 
+ *          values into the register only if the list contains all the Outputs related to the same
 
+ *          partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_DMA_DISABLE/LCU_IP_DMA_ENABLE
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputLutDma_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputLutDma(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [LUT_INT_EN] This function Enables/Disable the generation of an interrupt request when
 
+ *          LUT event occurs.
 
+ * @details This service is a reentrant function that shall Enables/Disable the generation of an
 
+ *          interrupt request when LUT event occurs. When enable multi cores, the API shall write
 
+ *          the values into the register only if the list contains all the Outputs related to the
 
+ *          same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Using define generated by the configurator :
 
+ *          LCU_IP_INT_DISABLE/LCU_IP_INT_ENABLE
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputLutInt_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputLutInt(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [LUT_FALL_FILT] This function specifies the number of consecutive clock cycles the
 
+ *          filter output must be logic 0 before the output signal goes low
 
+ * @details This service is a reentrant function that shall specifies the number of consecutive
 
+ *          clock cycles the filter output must be logic 0 before the output signal goes low
 
+ *          When enable multi cores, the API shall write the values into the register only if the
 
+ *          list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Unsigned Integer: [0, 65535]
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputFallFilter_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputFallFilter(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [LUT_RISE_FILT] This function specifies the number of consecutive clock cycles the
 
+ *          filter output must be logic 1 before the output signal goes high
 
+ * @details This service is a reentrant function that shall Specifies the number of consecutive
 
+ *          clock cycles the filter output must be logic 1 before the output signal goes high
 
+ *          When enable multi cores, the API shall write the values into the register only if the
 
+ *          list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Unsigned Integer: [0, 65535]
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputRiseFilter_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputRiseFilter(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [LUTCTRL] This function specifies the LUT positions, based on the combined LC input value
 
+ * @details This service is a reentrant function that shall Specifies the LUT positions, based on
 
+ *          the combined LC input value
 
+ *          When enable multi cores, the API shall write the values into the register only if the
 
+ *          list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *          List[x].Value -> Unsigned Integer: [0, 65535]
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuSyncOutputLutControl_Activity
 
+ * */
 
+void Mcl_SetLcuSyncOutputLutControl(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [FORCESTS] This function Clear Force Event
 
+ * @details This service is a reentrant function that shall Clear Force Event
 
+ *          When enable multi cores, the API shall write the values into the register only if the
 
+ *          list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].LogicOutputId -> The Logic Output Id generated by the configurator
 
+ *
 
+ * @param[in]  List         Specifies the Output configuration.
 
+ * @param[in]  Dimension    Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_ClearLcuSyncOutputForceEvent_Activity
 
+ * */
 
+void Mcl_ClearLcuSyncOutputForceEvent(const Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [LC_INPUTS] This function Indicates states of LC inputs
 
+ * @details This service is a reentrant function that shall Indicates states of LC inputs
 
+ *          When enable multi cores, the API shall get the values from the register only if the
 
+ *          list contains all the Inputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          [in] List[x].LogicInputId -> The Logic Input Id generated by the
 
+ *               configurator
 
+ *          [out] List[x].Value -> Store the states of LC inputs
 
+ *
 
+ * @param[in/out]  List    Pointer to the configuration structure
 
+ * @param[in]      Dimension            Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_GetLcuSyncLogicInput_Activity
 
+ * */
 
+void Mcl_GetLcuSyncLogicInput(Mcl_LcuSyncInputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [SWOUT] This function Indicates states of LC inputs or software-overridden inputs
 
+ * @details This service is a reentrant function that shall Indicates states of LC inputs or
 
+ *          software-overridden inputs
 
+ *          When enable multi cores, the API shall get the values from the register only if the
 
+ *          list contains all the Inputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          [in] List[x].LogicInputId -> The Logic Input Id generated by the
 
+ *               configurator
 
+ *          [out] List[x].Value -> Store the states of LC inputs or
 
+ *                                              software-overridden inputs
 
+ *
 
+ * @param[in/out]  List    Pointer to the configuration structure
 
+ * @param[in]      Dimension            Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_GetLcuSyncSwOverrideInput_Activity
 
+ * */
 
+void Mcl_GetLcuSyncSwOverrideInput(Mcl_LcuSyncInputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [LCOUT] This function Indicates states of LC outputs
 
+ * @details This service is a reentrant function that shall Indicates states of LC outputs
 
+ *          When enable multi cores, the API shall get the values from the register only if the
 
+ *          list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          [in] List[x].LogicOutputId -> The Logic Output Id generated by the
 
+ *               configurator
 
+ *          [out] List[x].Value -> Store the states of LC outputs
 
+ *
 
+ * @param[in/out]  List    Pointer to the configuration structure
 
+ * @param[in]      Dimension            Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_GetLcuSyncLogicOutput_Activity
 
+ * */
 
+void Mcl_GetLcuSyncLogicOutput(Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [FORCEOUT] This function Indicates the current state of force outputs for the logic
 
+ *                   outputs
 
+ * @details This service is a reentrant function that shall the current state of force outputs for
 
+ *          the logic outputs
 
+ *          When enable multi cores, the API shall get the values from the register only if the
 
+ *          list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          [in] List[x].LogicOutputId -> The Logic Output Id generated by the
 
+ *               configurator
 
+ *          [out] List[x].Value -> Store the current state of force outputs for the
 
+ *                logic outputs
 
+ *
 
+ * @param[in/out]  List    Pointer to the configuration structure
 
+ * @param[in]      Dimension            Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_GetLcuSyncForceOutput_Activity
 
+ * */
 
+void Mcl_GetLcuSyncForceOutput(Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [FORCESTS] This function Indicates that a force event has occurred on the associated
 
+          output
 
+ * @details This service is a reentrant function that shall Indicates that a force event has
 
+ *          occurred on the associated output
 
+ *          When enable multi cores, the API shall get the values from the register only if the
 
+ *          list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          [in] List[x].LogicOutputId -> The Logic Output Id generated by the
 
+ *               configurator
 
+ *          [out] List[x].Value -> Store the force event value.
 
+ *                Value = 0: force event not occurs
 
+ *                Value = 1: force event occurs
 
+ *
 
+ * @param[in/out]  List    Pointer to the configuration structure
 
+ * @param[in]      Dimension            Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_GetLcuSyncForceStatus_Activity
 
+ * */
 
+void Mcl_GetLcuSyncForceStatus(Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief [COMB_FORCE] This function Indicates the combined value of force inputs to each output
 
+ * @details This service is a reentrant function that shall Indicates the combined value of force
 
+ *          inputs to each output
 
+ *          When enable multi cores, the API shall get the values from the register only if the
 
+ *          list contains all the Outputs related to the same partition
 
+ *
 
+ *          How to use this interface:
 
+ *          [in] List[x].LogicOutputId -> The Logic Output Id generated by the
 
+ *               configurator
 
+ *          [out] List[x].Value -> Store the combined value of force inputs to each
 
+ *                output
 
+ *
 
+ * @param[in/out]  List    Pointer to the configuration structure
 
+ * @param[in]      Dimension            Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_GetLcuSyncCombineForceInput_Activity
 
+ * */
 
+void Mcl_GetLcuSyncCombineForceInput(Mcl_LcuSyncOutputValueType List[], const uint8 Dimension);
 
+#endif /* #if (MCL_LCU_SYNC_FUNC_IS_AVAILABLE == STD_ON) */
 
+
 
+#if (MCL_LCU_ASYNC_FUNC_IS_AVAILABLE == STD_ON)
 
+
 
+/**
 
+ * @brief This function configure multiple configuration for one logic input
 
+ * @details This service is a reentrant function that shall configure multiple configuration for
 
+ *          one logic input
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].Param -> Select member of Mcl_LcuInputParamType
 
+ *          List[x].Value -> Unsigned Integer: [0, 255] or some defines generated by configurator
 
+ *                           base on Param
 
+ *
 
+ * @param[in]  LogicInput    Logic input Id
 
+ * @param[in]  List          List of param and value
 
+ * @param[in]  Dimension     Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuAsyncInputList_Activity
 
+ * */
 
+void Mcl_SetLcuAsyncInputList(const uint8 LogicInput, const Mcl_LcuAsyncInputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief This function configure multiple configuration for one logic output
 
+ * @details This service is a reentrant function that shall configure multiple configuration for
 
+ *          one logic output
 
+ *
 
+ *          How to use this interface:
 
+ *          List[x].Param -> Select member of Mcl_LcuOutputParamType
 
+ *          List[x].Value -> Unsigned Integer: [0, 255] or some defines generated by configurator
 
+ *                           base on Param
 
+ *
 
+ * @param[in]  LogicOutput    Logic output Id
 
+ * @param[in]  List           List of param and value
 
+ * @param[in]  Dimension      Number of entries in the List
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_SetLcuAsyncOutputList_Activity
 
+ * */
 
+void Mcl_SetLcuAsyncOutputList(const uint8 LogicOutput, const Mcl_LcuAsyncOutputValueType List[], const uint8 Dimension);
 
+
 
+/**
 
+ * @brief This function get information of Logic Input
 
+ * @details This service is a reentrant function that shall get states of Logic Inputs
 
+ *          How to use this interface:
 
+ *          [in] LogicInput -> The Logic Input Name generated by the configurator.
 
+ *                             By default: LCU_LOGIC_INPUT_0, LCU_LOGIC_INPUT_1,...
 
+ *          [in] Param -> Select parameter. Example: MCL_LCU_IP_INPUT_GET_LOGIC_INPUT_STATE
 
+ *          [out] Value -> Store the states of LC inputs
 
+ *
 
+ * @param[in]  LogicInput    The Logic Input Name
 
+ * @param[in]  Param         Selection parameter
 
+ * @param[out] Value         Output value
 
+ *
 
+ * @return void
 
+ *
 
+ *
 
+ * @implements Mcl_GetLcuAsyncLogicInputInfo_Activity
 
+ * */
 
+void Mcl_GetLcuAsyncLogicInputInfo(const uint8 LogicInput, const Mcl_LcuInputInfoParamType Param, uint8 * const Value);
 
+
 
+/**
 
+ * @brief This function get information of Logic Output
 
+ * @details This service is a reentrant function that shall get states of Logic Outputs
 
+ *          How to use this interface:
 
+ *          [in] LogicOutput -> The Logic Output Name generated by the configurator.
 
+ *                              By default: LCU_LOGIC_OUTPUT_0, LCU_LOGIC_OUTPUT_1,...
 
+ *          [in] Param -> Select parameter. Example: MCL_LCU_IP_OUTPUT_GET_LOGIC_OUTPUT_STATE
 
+ *          [out] Value -> Store the states of LC inputs
 
+ *
 
+ * @param[in]  LogicOutput    The Logic Output Name
 
+ * @param[in]  Param          Selection parameter
 
+ * @param[out] Value          Output value
 
+ *
 
+ * @return void
 
+ *
 
+ *
 
+ * @implements Mcl_GetLcuAsyncLogicOutputInfo_Activity
 
+ * */
 
+void Mcl_GetLcuAsyncLogicOutputInfo(const uint8 LogicOutput, const Mcl_LcuOutputInfoParamType Param, uint8 * const Value);
 
+
 
+#endif /* #if (MCL_LCU_ASYNC_FUNC_IS_AVAILABLE == STD_ON) */
 
+#endif /* #if (MCL_LCU_IS_AVAILABLE == STD_ON) */
 
+
 
+#if (MCL_VERSION_INFO_API_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief   Returns the version information of this module.
 
+ * @details Returns the version information of MCL module.
 
+ *
 
+ * @param[out]  VersionInfo    A pointer to a structure used to get version information.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Mcl_GetVersionInfo_Activity
 
+ * */
 
+void Mcl_GetVersionInfo(Std_VersionInfoType * const VersionInfo);
 
+#endif /* MCL_VERSION_INFO_API_IS_AVAILABLE == STD_ON */
 
+
 
+#define MCL_STOP_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif  /* CDD_MCL_H_ */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/

+ 100 - 0
RTD/include/CDD_Mcl_Ipw.h
Vedi File 

@@ -0,0 +1,100 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/* Prevention from multiple including the same header */
 
+#ifndef CDD_MCL_IPW_H_
 
+#define CDD_MCL_IPW_H_
 
+
 
+/**
 
+*   @file    CDD_Mcl_Ipw.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - CDD MCL Ipw header file.
 
+*   @details
 
+*
 
+*   @addtogroup MCL_DRIVER MCL IPW Driver
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+                                         INCLUDE FILES
 
+ 1) system and project includes
 
+ 2) needed interfaces from external units
 
+ 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Ftm_Mcl_Ip.h"
 
+
 
+/*==================================================================================================
 
+*                                SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CDD_MCL_IPW_VENDOR_ID_H                       43
 
+#define CDD_MCL_IPW_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define CDD_MCL_IPW_AR_RELEASE_MINOR_VERSION_H        4
 
+#define CDD_MCL_IPW_AR_RELEASE_REVISION_VERSION_H     0
 
+#define CDD_MCL_IPW_SW_MAJOR_VERSION_H                1
 
+#define CDD_MCL_IPW_SW_MINOR_VERSION_H                0
 
+#define CDD_MCL_IPW_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+*                                       FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if header file and Ftm_Mcl_Ip.h file are of the same vendor */
 
+#if (CDD_MCL_IPW_VENDOR_ID_H != FTM_MCL_IP_VENDOR_ID_H)
 
+    #error "CDD_Mcl_Ipw.h and Ftm_Mcl_Ip.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Ftm_Mcl_Ip.h file are of the same Autosar version */
 
+#if ((CDD_MCL_IPW_AR_RELEASE_MAJOR_VERSION_H != FTM_MCL_IP_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CDD_MCL_IPW_AR_RELEASE_MINOR_VERSION_H != FTM_MCL_IP_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CDD_MCL_IPW_AR_RELEASE_REVISION_VERSION_H != FTM_MCL_IP_AR_RELEASE_REVISION_VERSION_H))
 
+    #error "AutoSar Version Numbers of CDD_Mcl_Ipw.h and Ftm_Mcl_Ip.h are different"
 
+#endif
 
+
 
+/* Check if header file and Ftm_Mcl_Ip.h file are of the same Software version */
 
+#if ((CDD_MCL_IPW_SW_MAJOR_VERSION_H != FTM_MCL_IP_SW_MAJOR_VERSION_H) || \
 
+     (CDD_MCL_IPW_SW_MINOR_VERSION_H != FTM_MCL_IP_SW_MINOR_VERSION_H) || \
 
+     (CDD_MCL_IPW_SW_PATCH_VERSION_H != FTM_MCL_IP_SW_PATCH_VERSION_H))
 
+    #error "Software Version Numbers of CDD_Mcl_Ipw.h and Ftm_Mcl_Ip.h are different"
 
+#endif
 
+
 
+/*===============================================================================================
 
+                                           ENUMS
 
+===============================================================================================*/
 
+
 
+/*===============================================================================================
 
+                                           STRUCTS
 
+===============================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                   GLOBAL FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+/** @} */
 
+
 
+#endif  /* #ifndef CDD_MCL_IPW_H_ */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/

+ 128 - 0
RTD/include/CDD_Mcl_Irq.h
Vedi File 

@@ -0,0 +1,128 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef MCL_IRQ_H
 
+#define MCL_IRQ_H
 
+
 
+/**
 
+*   @file CDD_Mcl_Irq.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - MCL driver header file.
 
+*   @details
 
+*
 
+*   @addtogroup MCL_DRIVER MCL Driver
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"
 
+{
 
+#endif
 
+
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+*  1) system and project includes
 
+*  2) needed interfaces from external units
 
+*  3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#if (MCL_EMIOS_IS_AVAILABLE == STD_ON)
 
+#include "Emios_Mcl_Ip_Irq.h"
 
+#endif /* MCL_EMIOS_IS_AVAILABLE == STD_ON */
 
+
 
+/*==================================================================================================
 
+*                                SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CDD_MCL_IRQ_VENDOR_ID_H                       43
 
+#define CDD_MCL_IRQ_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define CDD_MCL_IRQ_AR_RELEASE_MINOR_VERSION_H        4
 
+#define CDD_MCL_IRQ_AR_RELEASE_REVISION_VERSION_H     0
 
+#define CDD_MCL_IRQ_SW_MAJOR_VERSION_H                1
 
+#define CDD_MCL_IRQ_SW_MINOR_VERSION_H                0
 
+#define CDD_MCL_IRQ_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+*                                       FILE VERSION CHECKS
 
+==================================================================================================*/
 
+#if (MCL_EMIOS_IS_AVAILABLE == STD_ON)
 
+/* Check if header file and Emios_Mcl_Ip_Irq.h file are of the same vendor */
 
+#if (CDD_MCL_IRQ_VENDOR_ID_H != EMIOS_MCL_IP_IRQ_VENDOR_ID_H)
 
+    #error "CDD_Mcl_Irq.h and Emios_Mcl_Ip_Irq.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Emios_Mcl_Ip_Irq.h file are of the same Autosar version */
 
+#if ((CDD_MCL_IRQ_AR_RELEASE_MAJOR_VERSION_H != EMIOS_MCL_IP_IRQ_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CDD_MCL_IRQ_AR_RELEASE_MINOR_VERSION_H != EMIOS_MCL_IP_IRQ_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CDD_MCL_IRQ_AR_RELEASE_REVISION_VERSION_H != EMIOS_MCL_IP_IRQ_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of CDD_Mcl_Irq.h and Emios_Mcl_Ip_Irq.h are different"
 
+#endif
 
+
 
+/* Check if header file and Emios_Mcl_Ip_Irq.h file are of the same Software version */
 
+#if ((CDD_MCL_IRQ_SW_MAJOR_VERSION_H != EMIOS_MCL_IP_IRQ_SW_MAJOR_VERSION_H) || \
 
+     (CDD_MCL_IRQ_SW_MINOR_VERSION_H != EMIOS_MCL_IP_IRQ_SW_MINOR_VERSION_H) || \
 
+     (CDD_MCL_IRQ_SW_PATCH_VERSION_H != EMIOS_MCL_IP_IRQ_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of CDD_Mcl_Irq.h and Emios_Mcl_Ip_Irq.h are different"
 
+#endif
 
+#endif /* MCL_EMIOS_IS_AVAILABLE == STD_ON */
 
+
 
+
 
+/*==================================================================================================
 
+*                                            CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                        DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                              ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                  STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                  GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif  /* MCL_IRQ_H */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/

+ 250 - 0
RTD/include/Cache_Ip.h
Vedi File 

@@ -0,0 +1,250 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/* Prevention from multiple including the same header */
 
+#ifndef CACHE_IP_DRIVER_H_
 
+#define CACHE_IP_DRIVER_H_
 
+
 
+/**
 
+*   @file    Cache_Ip.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - Cache Ip driver header file.
 
+*   @details
 
+*
 
+*   @addtogroup CACHE_IP_DRIVER CACHE IP Driver
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+*  1) system and project includes
 
+*  2) needed interfaces from external units
 
+*  3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Cache_Ip_Cfg_Defines.h"
 
+
 
+#if (CACHE_IP_IS_AVAILABLE == STD_ON)
 
+
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CACHE_IP_VENDOR_ID_H                       43
 
+#define CACHE_IP_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define CACHE_IP_AR_RELEASE_MINOR_VERSION_H        4
 
+#define CACHE_IP_AR_RELEASE_REVISION_VERSION_H     0
 
+#define CACHE_IP_SW_MAJOR_VERSION_H                1
 
+#define CACHE_IP_SW_MINOR_VERSION_H                0
 
+#define CACHE_IP_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if header file and Cache_Ip_Cfg_Defines.h file are of the same vendor */
 
+#if (CACHE_IP_VENDOR_ID_H != CACHE_IP_CFG_DEFINES_VENDOR_ID_H)
 
+    #error "Cache_Ip.h and Cache_Ip_Cfg_Defines.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Cache_Ip_Cfg_Defines.h file are of the same Autosar version */
 
+#if ((CACHE_IP_AR_RELEASE_MAJOR_VERSION_H != CACHE_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CACHE_IP_AR_RELEASE_MINOR_VERSION_H != CACHE_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CACHE_IP_AR_RELEASE_REVISION_VERSION_H != CACHE_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Cache_Ip.h and Cache_Ip_Cfg_Defines.h are different"
 
+#endif
 
+
 
+/* Check if header file and Cache_Ip_Cfg_Defines.h file are of the same Software version */
 
+#if ((CACHE_IP_SW_MAJOR_VERSION_H != CACHE_IP_CFG_DEFINES_SW_MAJOR_VERSION_H) || \
 
+     (CACHE_IP_SW_MINOR_VERSION_H != CACHE_IP_CFG_DEFINES_SW_MINOR_VERSION_H) || \
 
+     (CACHE_IP_SW_PATCH_VERSION_H != CACHE_IP_CFG_DEFINES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Cache_Ip.h and Cache_Ip_Cfg_Defines.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+                                            ENUM
 
+==================================================================================================*/
 
+/**
 
+ * @brief This type contains the Cache Ip types.
 
+ * @details The cache types specifies what type of cache shall be used when calling the interface.
 
+ *          The CACHE_IP_ALL specifies both Instruction and Data caches.
 
+ *          The CACHE_IP_INSTRUCTION specifies the Instruction cache.
 
+ *          The CACHE_IP_DATA specifies the Data cache.
 
+ *
 
+ * */
 
+typedef enum{
 
+    CACHE_IP_ALL         = 0U,
 
+    CACHE_IP_INSTRUCTION = 1U,
 
+    CACHE_IP_DATA        = 2U,
 
+}Cache_Ip_Type;
 
+
 
+/*==================================================================================================
 
+*                                   GLOBAL FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define MCL_START_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+/**
 
+ * @brief This function enables the Cache Ip Driver.
 
+ * @details This service is a reentrant function that shall enable the Cache Ip driver.
 
+ *
 
+ * @param[in]  CacheType         Specifies the cache type.
 
+ *
 
+ * @return   E_OK is returned if the enable action finished correctly.
 
+ *           E_NOT_OK is returned if the enable action finished incorrectly.
 
+ *
 
+ * @implements Cache_Ip_Enable_Activity
 
+ * */
 
+Std_ReturnType Cache_Ip_Enable(const Cache_Ip_Type CacheType);
 
+
 
+/**
 
+ * @brief This function disables the Cache Ip Driver.
 
+ * @details This service is a reentrant function that shall disables the Cache Ip driver.
 
+ *
 
+ * @param[in]  CacheType         Specifies the cache type.
 
+ *
 
+ * @return   E_OK is returned if the disable action finished correctly.
 
+ *           E_NOT_OK is returned if the disable action finished incorrectly.
 
+ *
 
+ * @implements Cache_Ip_Disable_Activity
 
+ * */
 
+Std_ReturnType Cache_Ip_Disable(const Cache_Ip_Type CacheType);
 
+
 
+/**
 
+ * @brief This function Invalidates the Cache Ip Driver.
 
+ * @details This service is a reentrant function that shall Invalidates the Cache Ip driver.
 
+ *          The Invalidate operation applies for the entire selected Cache Type.
 
+ *
 
+ *          A cache invalidate operation ensures that updates made visible by observers that access memory at
 
+ *          the point to which the invalidate is defined are made visible to an observer that controls the cache.
 
+ *          This might result in the loss of updates to the locations affected by the invalidate operation that have
 
+ *          been written by observers that access the cache. If the address of an entry on which the invalidate
 
+ *          operates does not have a Normal Cacheable attribute, or if the cache is disabled, then an invalidate
 
+ *          operation also ensures that this address is not present in the cache.
 
+ *
 
+ * @param[in]  CacheType         Specifies the cache type.
 
+ *
 
+ * @return   E_OK is returned if the invalidation finished correctly.
 
+ *           E_NOT_OK is returned if the invalidation finished incorrectly.
 
+ *
 
+ * @implements Cache_Ip_Invalidate_Activity
 
+ * */
 
+Std_ReturnType Cache_Ip_Invalidate(const Cache_Ip_Type CacheType);
 
+
 
+/**
 
+ * @brief This function Clean the Cache Ip Driver.
 
+ * @details This service is a reentrant function that shall Clean the Cache Ip driver.
 
+ *          The Clean operation applies for the entire selected Cache Type.
 
+ *
 
+ *          A cache clean operation ensures that updates made by an observer that controls the cache are made
 
+ *          visible to other observers that can access memory at the point to which the operation is performed.
 
+ *          Once the Clean has completed, the new memory values are guaranteed to be visible to the point to
 
+ *          which the operation is performed, for example to the point of unification. The cleaning of a cache
 
+ *          entry from a cache can overwrite memory that has been written by another observer only if the entry
 
+ *          contains a location that has been written to by an observer in the shareability domain of that memory
 
+ *          location.
 
+ *
 
+ *          A cache clean and invalidate operation behaves as the execution of a clean operation followed
 
+ *          immediately by an invalidate operation. Both operations are performed to the same location.
 
+ *
 
+ * @param[in]  CacheType         Specifies the cache type.
 
+ * @param[in]  enInvalidate      Specifies to execute operation Clean&Invalidate.
 
+ *
 
+ * @return   E_OK is returned if the cleaning finished correctly.
 
+ *           E_NOT_OK is returned if the cleaning finished incorrectly.
 
+ *
 
+ * @implements Cache_Ip_Clean_Activity
 
+ * */
 
+Std_ReturnType Cache_Ip_Clean(const Cache_Ip_Type CacheType, const boolean EnInvalidate);
 
+
 
+/**
 
+ * @brief This function Invalidates By Address the Cache Ip Driver.
 
+ * @details This service is a reentrant function that shall Invalidates By Address the Cache Ip driver.
 
+ *          The Invalidate By Address operation applies for the memory segment specified by the
 
+ *          start Address and Length. The operation Invalidates only multiple of Cache Line Size, thus the
 
+ *          specified memory segment shall be aligned and multiple of the Cache Line Size.
 
+ *
 
+ *          A cache invalidate operation ensures that updates made visible by observers that access memory at
 
+ *          the point to which the invalidate is defined are made visible to an observer that controls the cache.
 
+ *          This might result in the loss of updates to the locations affected by the invalidate operation that have
 
+ *          been written by observers that access the cache. If the address of an entry on which the invalidate
 
+ *          operates does not have a Normal Cacheable attribute, or if the cache is disabled, then an invalidate
 
+ *          operation also ensures that this address is not present in the cache.
 
+ *
 
+ * @param[in]  CacheType         Specifies the cache type.
 
+ * @param[in]  Addr              Specifies the memory segment start address.
 
+ * @param[in]  Length            Specifies the memory segment length.
 
+ *
 
+ * @return   E_OK is returned if the invalidation finished correctly.
 
+ *           E_NOT_OK is returned if the invalidation finished incorrectly.
 
+ *
 
+ * @implements Cache_Ip_InvalidateByAddr_Activity
 
+ * */
 
+Std_ReturnType Cache_Ip_InvalidateByAddr(const Cache_Ip_Type CacheType, const uint32 Addr, const uint32 Length);
 
+
 
+/**
 
+ * @brief This function Clean By Address the Cache Ip Driver.
 
+ * @details This service is a reentrant function that shall Clean By Address the Cache Ip driver.
 
+ *          The Clean By Address operation applies for the memory segment specified by the
 
+ *          start Address and Length. The operation Cleans only multiple of Cache Line Size, thus the
 
+ *          specified memory segment shall be aligned and multiple of the Cache Line Size.
 
+ *
 
+ *          A cache clean operation ensures that updates made by an observer that controls the cache are made
 
+ *          visible to other observers that can access memory at the point to which the operation is performed.
 
+ *          Once the Clean has completed, the new memory values are guaranteed to be visible to the point to
 
+ *          which the operation is performed, for example to the point of unification. The cleaning of a cache
 
+ *          entry from a cache can overwrite memory that has been written by another observer only if the entry
 
+ *          contains a location that has been written to by an observer in the shareability domain of that memory
 
+ *          location.
 
+ *
 
+ *          A cache clean and invalidate operation behaves as the execution of a clean operation followed
 
+ *          immediately by an invalidate operation. Both operations are performed to the same location.
 
+ *
 
+ * @param[in]  CacheType         Specifies the cache type.
 
+ * @param[in]  enInvalidate      Specifies to execute operation Clean&Invalidate.
 
+ * @param[in]  Addr              Specifies the memory segment start address.
 
+ * @param[in]  Length            Specifies the memory segment length.
 
+ *
 
+ * @return   E_OK is returned if the cleaning finished correctly.
 
+ *           E_NOT_OK is returned if the cleaning finished incorrectly.
 
+ *
 
+ * @implements Cache_Ip_CleanByAddr_Activity
 
+ * */
 
+Std_ReturnType Cache_Ip_CleanByAddr(const Cache_Ip_Type CacheType, const boolean EnInvalidate, const uint32 Addr, const uint32 Length);
 
+
 
+#define MCL_STOP_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+#endif /* #if (CACHE_IP_IS_AVAILABLE == STD_ON) */
 
+
 
+/** @} */
 
+
 
+#endif  /* #ifndef CACHE_IP_DRIVER_H_ */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/

+ 116 - 0
RTD/include/Cache_Ip_Devassert.h
Vedi File 

@@ -0,0 +1,116 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/* Prevention from multiple including the same header */
 
+#ifndef CACHE_IP_DEVASSERT_H_
 
+#define CACHE_IP_DEVASSERT_H_
 
+
 
+/**
 
+*   @file    Cache_Ip_Devassert.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - Cache Ip driver header file.
 
+*   @details
 
+*
 
+*   @addtogroup CACHE_IP_DRIVER CACHE IP Driver
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+*  1) system and project includes
 
+*  2) needed interfaces from external units
 
+*  3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Cache_Ip_Types.h"
 
+
 
+#if (CACHE_IP_IS_AVAILABLE == STD_ON)
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CACHE_IP_DEVASSERT_VENDOR_ID_H                       43
 
+#define CACHE_IP_DEVASSERT_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define CACHE_IP_DEVASSERT_AR_RELEASE_MINOR_VERSION_H        4
 
+#define CACHE_IP_DEVASSERT_AR_RELEASE_REVISION_VERSION_H     0
 
+#define CACHE_IP_DEVASSERT_SW_MAJOR_VERSION_H                1
 
+#define CACHE_IP_DEVASSERT_SW_MINOR_VERSION_H                0
 
+#define CACHE_IP_DEVASSERT_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if header file and Cache_Ip_Types.h file are of the same vendor */
 
+#if (CACHE_IP_DEVASSERT_VENDOR_ID_H != CACHE_IP_TYPES_VENDOR_ID_H)
 
+    #error "Cache_Ip_Devassert.h and Cache_Ip_Types.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Cache_Ip_Types.h file are of the same Autosar version */
 
+#if ((CACHE_IP_DEVASSERT_AR_RELEASE_MAJOR_VERSION_H != CACHE_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CACHE_IP_DEVASSERT_AR_RELEASE_MINOR_VERSION_H != CACHE_IP_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CACHE_IP_DEVASSERT_AR_RELEASE_REVISION_VERSION_H != CACHE_IP_TYPES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Cache_Ip_Devassert.h and Cache_Ip_Types.h are different"
 
+#endif
 
+
 
+/* Check if header file and Cache_Ip_Types.h file are of the same Software version */
 
+#if ((CACHE_IP_DEVASSERT_SW_MAJOR_VERSION_H != CACHE_IP_TYPES_SW_MAJOR_VERSION_H) || \
 
+     (CACHE_IP_DEVASSERT_SW_MINOR_VERSION_H != CACHE_IP_TYPES_SW_MINOR_VERSION_H) || \
 
+     (CACHE_IP_DEVASSERT_SW_PATCH_VERSION_H != CACHE_IP_TYPES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Cache_Ip_Devassert.h and Cache_Ip_Types.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+                                           TYPEDEF
 
+==================================================================================================*/
 
+#define MCL_START_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+#if (CACHE_IP_DEV_ERROR_DETECT == STD_ON)
 
+    /* Implement default assert macro */
 
+    static inline void Cache_Ip_DevAssert(volatile boolean x)
 
+    {
 
+        if(x) { } else { ASM_KEYWORD("BKPT #0"); for(;;) {} }
 
+    }
 
+    #define CACHE_IP_DEV_ASSERT(x) Cache_Ip_DevAssert(x)
 
+#else
 
+    /* Assert macro does nothing */
 
+    #define CACHE_IP_DEV_ASSERT(x) ((void)0)
 
+#endif /* CACHE_IP_DEV_ERROR_DETECT == STD_ON */
 
+
 
+#define MCL_STOP_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+#endif /* #if (CACHE_IP_IS_AVAILABLE == STD_ON) */
 
+
 
+/** @} */
 
+
 
+#endif  /* #ifndef CACHE_IP_DEVASSERT_H_ */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/

+ 99 - 0
RTD/include/Cache_Ip_Types.h
Vedi File 

@@ -0,0 +1,99 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/* Prevention from multiple including the same header */
 
+#ifndef CACHE_IP_TYPES_H_
 
+#define CACHE_IP_TYPES_H_
 
+
 
+/**
 
+*   @file    Cache_Ip_Types.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - Cache Ip driver header file.
 
+*   @details
 
+*
 
+*   @addtogroup CACHE_IP_DRIVER CACHE IP Driver
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+*  1) system and project includes
 
+*  2) needed interfaces from external units
 
+*  3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "StandardTypes.h"
 
+#include "Cache_Ip_Cfg_DeviceRegisters.h"
 
+
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CACHE_IP_TYPES_VENDOR_ID_H                       43
 
+#define CACHE_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define CACHE_IP_TYPES_AR_RELEASE_MINOR_VERSION_H        4
 
+#define CACHE_IP_TYPES_AR_RELEASE_REVISION_VERSION_H     0
 
+#define CACHE_IP_TYPES_SW_MAJOR_VERSION_H                1
 
+#define CACHE_IP_TYPES_SW_MINOR_VERSION_H                0
 
+#define CACHE_IP_TYPES_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+/* Check if header file and StandardTypes header file are of the same Autosar version */
 
+#if ((CACHE_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H != STD_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CACHE_IP_TYPES_AR_RELEASE_MINOR_VERSION_H != STD_AR_RELEASE_MINOR_VERSION))
 
+    #error "AutoSar Version Numbers of Dma_Ip_Cfg_Defines.h and StandardTypes.h are different"
 
+#endif
 
+#endif
 
+
 
+/* Check if header file and Cache_Ip_DeviceRegisters.h file are of the same vendor */
 
+#if (CACHE_IP_TYPES_VENDOR_ID_H != CACHE_IP_CFG_DEVICEREGISTERS_VENDOR_ID_H)
 
+    #error "Cache_Ip_Types.h and Cache_Ip_DeviceRegisters.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Cache_Ip_DeviceRegisters.h file are of the same Autosar version */
 
+#if ((CACHE_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H != CACHE_IP_CFG_DEVICEREGISTERS_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CACHE_IP_TYPES_AR_RELEASE_MINOR_VERSION_H != CACHE_IP_CFG_DEVICEREGISTERS_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CACHE_IP_TYPES_AR_RELEASE_REVISION_VERSION_H != CACHE_IP_CFG_DEVICEREGISTERS_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Cache_Ip_Types.h and Cache_Ip_DeviceRegisters.h are different"
 
+#endif
 
+
 
+/* Check if header file and Cache_Ip_DeviceRegisters.h file are of the same Software version */
 
+#if ((CACHE_IP_TYPES_SW_MAJOR_VERSION_H != CACHE_IP_CFG_DEVICEREGISTERS_SW_MAJOR_VERSION_H) || \
 
+     (CACHE_IP_TYPES_SW_MINOR_VERSION_H != CACHE_IP_CFG_DEVICEREGISTERS_SW_MINOR_VERSION_H) || \
 
+     (CACHE_IP_TYPES_SW_PATCH_VERSION_H != CACHE_IP_CFG_DEVICEREGISTERS_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Cache_Ip_Types.h and Cache_Ip_DeviceRegisters.h are different"
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif  /* #ifndef CACHE_IP_TYPES_H_ */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/

+ 630 - 0
RTD/include/Can.h
Vedi File 

@@ -0,0 +1,630 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*==================================================================================================
 
+==================================================================================================*/
 
+
 
+#ifndef CAN_H
 
+#define CAN_H
 
+
 
+/**
 
+*   @file    Can.h
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Can - module interface.
 
+*   @details API header for CAN driver.
 
+*
 
+*   @addtogroup CAN_DRIVER
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*
 
+* @page misra_violations MISRA-C:2012 violations
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.1, External identifiers shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.2, Identifiers declared in the same scope and name space shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.4, Macro identifiers shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.5, Identifiers shall be distinct from macro names.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section Can_h_REF_1
 
+* Violates MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents
 
+* of a header file being included more than once.
 
+* This violation is not fixed since the inclusion of <MA>_MemMap.h is as per AUTOSAR requirement [SWS_MemMap_00003].
 
+*
 
+* @section Can_h_REF_2
 
+* Violates MISRA 2012 Advisory Rule 2.5, A project should not contain unused macro declarations.
 
+* Declaration is reserved for future feature.
 
+*
 
+* @section Can_h_REF_3
 
+* Violates MISRA 2012 Advisory Rule 4.9, A function should be used in preference to a function-like macro where they are interchangeable.
 
+* Function like macro are used to reduce code complexity
 
+*
 
+* @section Can_h_REF_4
 
+* Violates MISRA 2012 Advisory Rule 2.3, A project should not contain unused type declarations.
 
+* The declarations are used depend on user configuration.
 
+*
 
+* @section Can_h_REF_5
 
+* Violates MISRA 2012 Advisory Rule 8.9, An object should be defined at block scope if identifier only appears in a single function.
 
+* These objects are used when Precompile is supported.
 
+*
 
+* @section Can_h_REF_6
 
+* Violates MISRA 2012 Advisory Rule 20.1, #include directives should only be preceded by preprocessor
 
+* directives or comments.
 
+*/
 
+
 
+/*
 
+(CAN043) The file Can.h contains the declaration of the Can module API.
 
+(CAN037) The file Can.h only contains 'extern' declarations of constants, global data, type definitions and services
 
+            that are specified in the Can module SWS.
 
+*/
 
+
 
+/**
 
+*
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+/**
 
+*
 
+*/
 
+#include "ComStackTypes.h"
 
+#include "Soc_Ips.h"
 
+#include "Can_Flexcan_Types.h"
 
+#include "Can_Ipw_Types.h"
 
+
 
+
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+/*
 
+    Internal micro-dependent versioning. Check of AUTOSAR & Vendor specification version.
 
+*/
 
+/**
 
+* @{
 
+*
 
+*/
 
+#define CAN_VENDOR_ID                   43
 
+/* @violates @ref Can_h_REF_2 MISRA 2012 Advisory Rule 2.5 */
 
+#define CAN_MODULE_ID                   80
 
+#define CAN_AR_RELEASE_MAJOR_VERSION    4
 
+#define CAN_AR_RELEASE_MINOR_VERSION    4
 
+#define CAN_AR_RELEASE_REVISION_VERSION 0
 
+#define CAN_SW_MAJOR_VERSION            1
 
+#define CAN_SW_MINOR_VERSION            0
 
+#define CAN_SW_PATCH_VERSION            0
 
+/**@}*/
 
+
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and Can_Ipw_Types header file are of the same vendor */
 
+#if (CAN_VENDOR_ID != CAN_IPW_TYPES_VENDOR_ID_H)
 
+    #error "Can.h and Can_Ipw_Types.h have different vendor ids"
 
+#endif
 
+/* Check if current file and Can_Ipw_Types header file are of the same Autosar version */
 
+#if ((CAN_AR_RELEASE_MAJOR_VERSION != CAN_IPW_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CAN_AR_RELEASE_MINOR_VERSION != CAN_IPW_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CAN_AR_RELEASE_REVISION_VERSION != CAN_IPW_TYPES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Can.h and Can_Ipw_Types.h are different"
 
+#endif
 
+
 
+/* Check if current file and Can_Ipw_Types header file are of the same software version */
 
+#if ((CAN_SW_MAJOR_VERSION != CAN_IPW_TYPES_SW_MAJOR_VERSION_H) || \
 
+     (CAN_SW_MINOR_VERSION != CAN_IPW_TYPES_SW_MINOR_VERSION_H) || \
 
+     (CAN_SW_PATCH_VERSION != CAN_IPW_TYPES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Can.h and Can_Ipw_Types.h are different"
 
+#endif
 
+
 
+/* Check if current file and Can_Flexcan_Types header file are of the same vendor */
 
+#if (CAN_VENDOR_ID != CAN_FLEXCAN_TYPES_VENDOR_ID_H)
 
+    #error "Can.h and Can_Flexcan_Types.h have different vendor ids"
 
+#endif
 
+/* Check if current file and Can_Flexcan_Types header file are of the same Autosar version */
 
+#if ((CAN_AR_RELEASE_MAJOR_VERSION != CAN_FLEXCAN_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CAN_AR_RELEASE_MINOR_VERSION != CAN_FLEXCAN_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CAN_AR_RELEASE_REVISION_VERSION != CAN_FLEXCAN_TYPES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Can.h and Can_Flexcan_Types.h are different"
 
+#endif
 
+
 
+/* Check if current file and Can_Ipw_Types header file are of the same software version */
 
+#if ((CAN_SW_MAJOR_VERSION != CAN_FLEXCAN_TYPES_SW_MAJOR_VERSION_H) || \
 
+     (CAN_SW_MINOR_VERSION != CAN_FLEXCAN_TYPES_SW_MINOR_VERSION_H) || \
 
+     (CAN_SW_PATCH_VERSION != CAN_FLEXCAN_TYPES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Can.h and Can_Flexcan_Types.h are different"
 
+#endif
 
+
 
+/* Check if current file and CAN configuration header file are of the same software version */
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    #if ((CAN_AR_RELEASE_MAJOR_VERSION != SOC_IPS_AR_RELEASE_MAJOR_VERSION) || \
 
+         (CAN_AR_RELEASE_MINOR_VERSION != SOC_IPS_AR_RELEASE_MINOR_VERSION) \
 
+        )
 
+        #error "Software Version Numbers of Can.h and Soc_Ips.h are different"
 
+    #endif
 
+
 
+    /* Check if current file and ComStackTypes header file are of the same Autosar version */
 
+    #if ((CAN_AR_RELEASE_MAJOR_VERSION != COMTYPE_AR_RELEASE_MAJOR_VERSION) || \
 
+         (CAN_AR_RELEASE_MINOR_VERSION != COMTYPE_AR_RELEASE_MINOR_VERSION) \
 
+        )
 
+        #error "AutoSar Version Numbers of Can.h and ComStackTypes.h are different"
 
+    #endif
 
+
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+#if (CAN_DEV_ERROR_DETECT == STD_ON)
 
+    /**
 
+    * @brief          Can_StatusType
 
+    * @details        CAN Driver status used for checking and preventing double driver intialization.
 
+    *                 CAN_UNINIT = The CAN controller is not initialized. The CAN Controller is not participating on the CAN bus.
 
+    *                              All registers belonging to the CAN module are in reset state, CAN interrupts are disabled.
 
+    *                 CAN_READY = Controller has initialized: static variables, including flags;
 
+    *                             Common setting for the complete CAN HW unit; CAN controller specific settings for each CAN controller.
 
+    *
 
+    */
 
+    typedef enum
 
+    {
 
+        CAN_UNINIT = 0U, /**< @brief Driver not initialized */
 
+        CAN_READY       /**< @brief Driver ready */
 
+    }Can_DriverStatusType;
 
+#endif /* CAN_DEV_ERROR_DETECT == STD_ON */
 
+
 
+/*==================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+/** @brief Can Configuration */
 
+typedef struct
 
+{
 
+    /** @brief Configuration Core ID */
 
+    const uint32 Can_u32CoreID;
 
+    /** @brief The first Hth after Hrh consecutive */
 
+    const Can_HwHandleType Can_uHthFirstIndex;
 
+    /** @brief Mapping Controller ID to Controller hardware offset */
 
+    const uint8 * Can_pCtrlOffsetToCtrlIDMap;
 
+    /** @brief Mapping Controller ID to Hardware Object ID */
 
+    const uint8 * Can_pHwObjIDToCtrlIDMap;
 
+    /** @brief Pointer to Can Hardware Object Config */
 
+    const Can_HwObjectConfigType * Can_pHwObjectConfig;
 
+#if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON)
 
+    /** @brief The size of Can Pn Configs */
 
+    const uint8 u8NumCanIcomConfigs;
 
+    /** brief Pointer point to Can Pn Configs */
 
+    const Can_IcomConfigsType * pCanIcomConfigs;
 
+#endif /* (!!CAN##!!_##PUBLIC_ICOM_SUPPORT == STD_ON) */
 
+    /** @brief Pointer to Can Controller Config */
 
+    const Can_ControllerConfigType * const * Can_ppController;
 
+}Can_ConfigType;
 
+
 
+/*==================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+#define CAN_START_SEC_CONFIG_DATA_UNSPECIFIED
 
+/* @violates @ref Can_h_REF_1 MISRA 2012 Required Directive 4.10 */
 
+#include "Can_MemMap.h"
 
+
 
+CAN_CONFIG_EXT
 
+
 
+#define CAN_STOP_SEC_CONFIG_DATA_UNSPECIFIED
 
+/* @violates @ref Can_h_REF_1 MISRA 2012 Required Directive 4.10 */
 
+/* @violates @ref Can_h_REF_6 MISRA 2012 Advisory Rule 20.1 */
 
+#include "Can_MemMap.h"
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+#define CAN_START_SEC_CODE
 
+/* @violates @ref Can_h_REF_1 MISRA 2012 Required Directive 4.10 */
 
+/* @violates @ref Can_h_REF_6 MISRA 2012 Advisory Rule 20.1 */
 
+#include "Can_MemMap.h"
 
+
 
+#if (CAN_VERSION_INFO_API == STD_ON)
 
+    /**
 
+    * @brief          Returns the version information of this module. SID is 0x07
 
+    * @details        This routine is called by:
 
+    *                - CanIf or an upper layer according to Autosar requirements.
 
+    *
 
+    * @param[in]      versioninfo A pointer to location to store version info
 
+    *                             Must be omitted if the function does not have parameters.
 
+    *
 
+    * @return         void
 
+    *
 
+    *
 
+    * @pre            The CAN_VERSION_INFO_API define must be configured on.
 
+    * @post           The version information is return if the parameter versionInfo is not a null pointer.
 
+    *
 
+    *
 
+    */
 
+    void Can_GetVersionInfo(Std_VersionInfoType * versioninfo);
 
+#endif /* CAN_VERSION_INFO_API == STD_ON */
 
+
 
+/**
 
+* @brief          Initialize the CAN driver. SID is 0x00.
 
+* @details        Initialize all the controllers.
 
+*                 The CAN module shall be initialized by Can_Init(<&Can_Configuration>) service call during the start-up.
 
+*                 This routine is called by:
 
+*                - CanIf or an upper layer according to Autosar requirements.
 
+*
 
+* @param[in]      Config Pointer to driver configuration.
 
+*
 
+* @return         void
 
+*
 
+*
 
+* @pre            Can_Init shall be called at most once during runtime.
 
+* @post           Can_Init shall initialize all the controllers and set the driver in READY state.
 
+*
 
+*/
 
+void Can_Init(const Can_ConfigType * Config);
 
+
 
+/**
 
+* @brief          De-initialize the CAN driver. SID is 0x10.
 
+* @details        De-initialize all the controllers.
 
+*                 The CAN module shall be de-initialized by Can_DeInit() service call during the start-up.
 
+*                 This routine is called by:
 
+*                - CanIf or an upper layer according to Autosar requirements.
 
+*
 
+* @param[in]      None
 
+*
 
+* @return         void
 
+*
 
+*
 
+* @pre            Before controller de-initalization, the driver must be initialized and the controllers must be not in Start state.
 
+* @post           Can_DeInit shall de-initialize all the controllers and set the driver in UNINIT state.
 
+*
 
+*/
 
+void Can_DeInit(void);
 
+
 
+#if (CAN_SET_BAUDRATE_API == STD_ON)
 
+    /**
 
+    * @brief         This function set baudrate
 
+    * @details       This routine is called by an upper layer.
 
+    *
 
+    * @param[in]     Controller controller ID
 
+    * @param[in]     BaudRateConfigID baudrateID selection
 
+    *
 
+    * @return        Std_ReturnType  Result of the transition.
 
+    * @retval        E_OK  Switch baudrate operation was ok.
 
+    * @retval        E_NOT_OK  Switch baudrate operation was not ok.
 
+    *
 
+    * @pre           Driver must be initialized.
 
+    */
 
+    Std_ReturnType Can_SetBaudrate
 
+    (
 
+        uint8 Controller,
 
+        uint16 BaudRateConfigID
 
+    );
 
+#endif /* CAN_SET_BAUDRATE_API == STD_ON */
 
+
 
+/**
 
+* @brief          Put the controller into a required state. SID is 0x03.
 
+* @details        Switch the controller from one state to another.
 
+*                 This routine is called by:
 
+*                 - CanIf or an upper layer according to Autosar requirements.
 
+*
 
+* @param[in]      Controller - Can controller for which the status shall be changed - based on configuration order list (CanControllerId).
 
+* @param[in]      Transition - Possible transitions (CAN_CS_STOPPED , CAN_CS_STARTED , CAN_CS_SLEEP)
 
+* @return         Std_ReturnType  Result of the transition.
 
+* @retval         E_OK   request accepted.
 
+* @retval         E_NOT_OK  request not accepted, a development error occurred.
 
+*
 
+*
 
+* @pre            Before changing the controller state the driver must be initialized.
 
+* @post           After the transition to the new state the interrupts required for that state must be enebaled.
 
+*
 
+*
 
+*/
 
+Std_ReturnType Can_SetControllerMode(uint8 Controller, Can_ControllerStateType Transition);
 
+
 
+#if (CAN_LISTEN_ONLY_MODE == STD_ON)
 
+/**
 
+* @brief          Enable or disable Listen Only Mode. SID is 0x32.
 
+* @details        Enable or disable Listen Only Mode.
 
+* @param[in]      Controller - Controller in which ListenOnlyMode will be enabled/disabled.
 
+* @param[in]      State - Enable or Disable the feature (NORMAL_MODE , LISTEN_ONLY_MODE)
 
+* @return         Std_ReturnType  Result of the transition.
 
+* @retval         E_OK   request accepted.
 
+* @retval         E_NOT_OK  request not accepted, a development error occurred.
 
+*
 
+* @pre
 
+* @post
 
+*
 
+*
 
+*/
 
+Std_ReturnType Can_ListenOnlyMode(uint8 Controller, Can_ListenOnlyType State);
 
+#endif /* (CAN_LISTEN_ONLY_MODE == STD_ON) */
 
+
 
+/**
 
+* @brief          Disable INTs. SID is 0x04.
 
+* @details        Switch OFF the controller's interrupts.
 
+*                 This routine is called by:
 
+*                 - CanIf or an upper layer according to Autosar requirements.
 
+*
 
+* @param[in]      Controller Can controller for which interrupts shall be disabled - based on configuration order list (CanControllerId).
 
+*
 
+* @return         void
 
+*
 
+*
 
+* @pre            Driver must be initalzied before changing the interrupts state (en or dis).
 
+* @post           Controller must not respond to any interrupt assertion.
 
+*
 
+*
 
+*/
 
+void Can_DisableControllerInterrupts(uint8 Controller);
 
+
 
+/**
 
+* @brief          Enable INTs. SID is 0x05.
 
+* @details        Switch ON the controller's interrupts.
 
+*                 This routine is called by:
 
+*                 - CanIf or an upper layer according to Autosar requirements.
 
+*
 
+* @param[in]      Controller Can controller for which interrupts shall be disabled - based on configuration order list (CanControllerId).
 
+*
 
+* @return         void
 
+*
 
+*
 
+* @pre            Driver must be initalzied before changing the interrupts state (en or dis).
 
+* @post           Controller must respond to interrupt assertion.
 
+*
 
+*/
 
+void Can_EnableControllerInterrupts(uint8 Controller);
 
+
 
+#if (CAN_CHECK_WAKEUP_API == STD_ON)
 
+    Std_ReturnType Can_CheckWakeup(uint8 Controller);
 
+#endif
 
+
 
+/**
 
+* @brief          Obtains the error state of the CAN controller.. SID is 0x11
 
+* @details        This routine is called by:
 
+*                - CanIf or an upper layer according to Autosar requirements.
 
+*
 
+* @param[in]      ControllerId: Abstracted CanIf ControllerId which is assigned to a CAN controller, which is requested for ErrorState.
 
+*
 
+* @param[out]     ErrorStatePtr: Pointer to a memory location, where the error state of the CAN controller will be stored.
 
+*
 
+* @return         Std_ReturnType  Result of the transition.
 
+* @retval         E_OK : Error state request has been accepted.
 
+* @retval         E_NOT_OK : Error state request has not been accepted.
 
+*
 
+* @pre
 
+* @post
 
+*
 
+*
 
+*/
 
+Std_ReturnType Can_GetControllerErrorState
 
+(
 
+    uint8 ControllerId,
 
+    Can_ErrorStateType * ErrorStatePtr
 
+);
 
+
 
+/**
 
+* @brief          Reports about the current status of the requested CAN controller. SID is 0x12
 
+* @details        This routine is called by:
 
+*                - CanIf or an upper layer according to Autosar requirements.
 
+*
 
+* @param[in]      Controller: CAN controller for which the status shall be requested.
 
+*
 
+* @param[out]     ControllerModePtr: Pointer to a memory location, where the current mode of the CAN controller will be stored.
 
+*
 
+* @return         Std_ReturnType  Result of the transition.
 
+* @retval         E_OK : Controller mode request has been accepted.
 
+* @retval         E_NOT_OK : Controller mode request has not been accepted.
 
+*
 
+* @pre
 
+* @post
 
+*
 
+*
 
+*/
 
+Std_ReturnType Can_GetControllerMode
 
+(
 
+    uint8 Controller,
 
+    Can_ControllerStateType * ControllerModePtr
 
+);
 
+
 
+/**
 
+* @brief            Return the Rx error counter for a CAN controller
 
+* @details          Return the Rx error counter for a CAN controller. This value might not be
 
+*                   available for all CAN controller, in which case E_NOT_OK would be returned.
 
+*                   Please note that the value of the counter might not be correct at the moment
 
+*                   the API returns it, because the Rx counter is handled asynchronously in hardware.
 
+*                   Applications should not trust this value for any assumption about the current bus state.
 
+*
 
+* @param[in]        ControllerId: CAN controller, whose current Rx error counter shall be acquired.
 
+* @param[out]       RxErrorCounterPtr: Pointer to a memory location, where the current Rx error
 
+*                       counter of the CAN controller will be stored.
 
+*
 
+* @return           Std_ReturnType  Result of the transition.
 
+* @retval           E_OK:  Rx error counter available.
 
+* @retval           E_NOT_OK: Wrong ControllerId, or Rx error counter not available.
 
+*
 
+* @pre
 
+* @post
 
+*
 
+*/
 
+Std_ReturnType Can_GetControllerRxErrorCounter
 
+(
 
+    uint8 ControllerId,
 
+    uint8 * RxErrorCounterPtr
 
+);
 
+
 
+/**
 
+* @brief            Return the Tx error counter for a CAN controller
 
+* @details          Return the Tx error counter for a CAN controller. This value might not be
 
+*                   available for all CAN controller, in which case E_NOT_OK would be returned.
 
+*                   Please note that the value of the counter might not be correct at the moment
 
+*                   the API returns it, because the Tx counter is handled asynchronously in hardware.
 
+*                   Applications should not trust this value for any assumption about the current bus state.
 
+*
 
+* @param[in]        ControllerId: CAN controller, whose current Tx error counter shall be acquired.
 
+* @param[out]       TxErrorCounterPtr: Pointer to a memory location, where the current Tx error
 
+*                       counter of the CAN controller will be stored.
 
+*
 
+* @return           Std_ReturnType  Result of the transition.
 
+* @retval           E_OK:  Tx error counter available.
 
+* @retval           E_NOT_OK: Wrong ControllerId, or Tx error counter not available.
 
+*
 
+* @pre
 
+* @post
 
+*
 
+*/
 
+Std_ReturnType Can_GetControllerTxErrorCounter
 
+(
 
+    uint8 ControllerId,
 
+    uint8 * TxErrorCounterPtr
 
+);
 
+
 
+/**
 
+* @brief          Transmit information on CAN bus. SID is 0x06.
 
+* @details        Can_Write checks if hardware transmit object that is identified by the HTH is free.
 
+*                    Can_Write checks if another Can_Write is ongoing for the same HTH.
 
+*                     a) hardware transmit object is free:
 
+*                         The mutex for that HTH is set to 'signaled' the ID, DLC and SDU are put in a format appropriate for
 
+*                           the hardware (if necessary) and copied in the appropriate hardware registers or buffers.
 
+*                        All necessary control operations to initiate the transmit are done.
 
+*                         The mutex for that HTH is released. The function returns with E_OK.
 
+*                    b) hardware transmit object is busy with another transmit request.
 
+*                         The function returns with CAN_BUSY.
 
+*                     c) A preemptive call of Can_Write has been issued, that could not be handled reentrant (i.e. a call with the same HTH).
 
+*                        The function returns with CAN_BUSY the function is non blocking
 
+*                     d) The hardware transmit object is busy with another transmit request for an L-PDU that has lower priority than that for the current request
 
+*                        The transmission of the previous L-PDU is cancelled (asynchronously).
 
+*                        The function returns with CAN_BUSY.
 
+*                   This routine is called by:
 
+*                   - CanIf or an upper layer according to Autosar requirements.
 
+*
 
+* @param[in]      Hth Information which HW-transmit handle shall be used for transmit.
 
+*                 Implicitly this is also the information about the controller to use because the Hth numbers are unique inside one hardware unit.
 
+* @param[in]      PduInfo Pointer to SDU user memory, DLC and Identifier.
 
+* @return         Std_ReturnType   Result of the write operation.
 
+* @retval         E_OK   Write command has been accepted.
 
+* @retval         E_NOT_OK  Development error occured.
 
+* @retval         CAN_BUSY   No of TX hardware buffer available or preemtive call of Can_Write() that can't be implemented reentrant.
 
+*
 
+*
 
+* @pre            Driver must be initialized and MB must be configured for Tx.
 
+* @post           The data can be transmitted or rejected because of another data with a higher priority.
 
+*
 
+*
 
+*/
 
+Std_ReturnType Can_Write
 
+(
 
+    Can_HwHandleType Hth,
 
+    const Can_PduType * PduInfo
 
+);
 
+
 
+#if (CAN_ABORT_MB_API == STD_ON)
 
+    /**
 
+    * @brief          Process a message buffer abort
 
+    * @details        This function write a abort code (b'1001) to MBCS[CODE] field of the MB.
 
+    *                This routine is called by:
 
+    *                - CanIf or an upper layer according to Autosar requirements.
 
+    *
 
+    * @param[in]      Hth - HW-transmit handler
 
+    *
 
+    *
 
+    * @pre            Driver must be initialized and the current MB transmission should be ready for transmit.
 
+    *
 
+    *
 
+    * @note           Not AUTOSAR required. This is user implementation.
 
+    */
 
+    void Can_AbortMb(Can_HwHandleType Hth);
 
+#endif /* CAN_ABORT_MB_API == STD_ON */
 
+
 
+#if (CAN_DUAL_CLOCK_MODE == STD_ON)
 
+    /**
 
+    * @brief          Function switch between two prescaler that was configured when Clock Source value to driver changed to another one.
 
+    * @details        Function sets all controllers' prescaller based on input parameter.
 
+    *
 
+    * @param[in]      eClkMode - prescaler setting (NORMAL or ALTERNATE)
 
+    *
 
+    * @pre            Can_Init must be called before, all controllers must be in STOPPED.
 
+    *
 
+    */
 
+    void Can_SetClockMode(Can_ClockModeType eClkMode);
 
+#endif
 
+
 
+#if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON)
 
+/**
 
+* @brief          Set controller into Pretended Networking mode with the ConfigurationID valid.
 
+* @details        This function is API which support the Pretended Networking featrue. After this function is called,
 
+*                 it will configure for controller with information in the configurationIDs (corresponding with ID valid )
 
+
 
+*
 
+* @param[in]      Controller    CAN controller for which the init shall be done. Based on configuration order list (CanControllerId).
 
+* @param[in]      ConfigurationId the ID of CanIcomConfig
 
+*
 
+* @return        Std_ReturnType
 
+* @retval        E_OK       PNET is Enabled/disabled successfully.
 
+* @retval        E_NOT_OK   PNET is not Enabled/disabled successfully.
 
+*
 
+* @pre            Driver must be initialized
 
+*
 
+* @note           In order to activate PNET (ConfigurationId != 0) the controller must be in START mode.
 
+* @implements    Can_SetIcomConfiguration_Activity
 
+*/
 
+Std_ReturnType Can_SetIcomConfiguration(uint8 Controller, IcomConfigIdType ConfigurationId);
 
+#endif /* (CAN_PUBLIC_ICOM_SUPPORT == STD_ON) */
 
+
 
+#define CAN_STOP_SEC_CODE
 
+/* @violates @ref Can_h_REF_1 MISRA 2012 Required Directive 4.10 */
 
+/* @violates @ref Can_h_REF_6 MISRA 2012 Advisory Rule 20.1 */
 
+#include "Can_MemMap.h"
 
+
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* CAN_H */

+ 124 - 0
RTD/include/CanIf.h
Vedi File 

@@ -0,0 +1,124 @@
 
+/**
 
+*   @file    CanIf.h
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR CanIf - CanIf module interface
 
+*   @details AUTOSAR CanIf module interface.- Stub Version
 
+*   This file contains sample code only. It is not part of the production code deliverables.
 
+*
 
+*   @addtogroup CANIF_MODULE
 
+*   @{
 
+*/
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : generic
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*==================================================================================================
 
+==================================================================================================*/
 
+
 
+#ifndef CANIF_H
 
+#define CANIF_H
 
+
 
+#ifdef __cplusplus
 
+extern "C"
 
+{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                         INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "CanIf_Types.h"
 
+#include "EcuM.h"
 
+
 
+/*==================================================================================================
 
+*                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CANIF_VENDOR_ID                         43
 
+#define CANIF_MODULE_ID                         60
 
+#define CANIF_AR_RELEASE_MAJOR_VERSION          4
 
+#define CANIF_AR_RELEASE_MINOR_VERSION          4
 
+#define CANIF_AR_RELEASE_REVISION_VERSION       0
 
+#define CANIF_SW_MAJOR_VERSION                  1
 
+#define CANIF_SW_MINOR_VERSION                  0
 
+#define CANIF_SW_PATCH_VERSION                  0
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and CanIf_Types.h header file are of the same vendor */
 
+#if (CANIF_VENDOR_ID != CANIF_TYPES_VENDOR_ID)
 
+#error "CanIf.h and CanIf_Types.h have different vendor ids"
 
+#endif
 
+/* Check if current file and CanIf_Types.h header file are of the same Autosar version */
 
+#if ((CANIF_AR_RELEASE_MAJOR_VERSION != CANIF_TYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CANIF_AR_RELEASE_MINOR_VERSION != CANIF_TYPES_AR_RELEASE_MINOR_VERSION) || \
 
+     (CANIF_AR_RELEASE_REVISION_VERSION != CANIF_TYPES_AR_RELEASE_REVISION_VERSION))
 
+  #error "AutoSar Version Numbers of CanIf.h and CanIf_Types.h are different"
 
+#endif
 
+/* Check if current file and CanIf_Types.h header file are of the same software version */
 
+#if ((CANIF_SW_MAJOR_VERSION != CANIF_TYPES_SW_MAJOR_VERSION) || \
 
+     (CANIF_SW_MINOR_VERSION != CANIF_TYPES_SW_MINOR_VERSION) || \
 
+     (CANIF_SW_PATCH_VERSION != CANIF_TYPES_SW_PATCH_VERSION))
 
+  #error "Software Version Numbers of CanIf.h and CanIf_Types.h are different"
 
+#endif
 
+
 
+/* Check if current file and EcuM.h header file are of the same version */
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    #if ((CANIF_AR_RELEASE_MAJOR_VERSION != ECUM_AR_RELEASE_MAJOR_VERSION) || \
 
+        (CANIF_AR_RELEASE_MINOR_VERSION != ECUM_AR_RELEASE_MINOR_VERSION))
 
+        #error "AutoSar Version Numbers of CanIf.h and EcuM.h are different"
 
+    #endif
 
+#endif
 
+/*==================================================================================================
 
+*                                           CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+           
+/*==================================================================================================
 
+*                                 STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                 GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                     FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+Std_ReturnType CanIf_TriggerTransmit(PduIdType TxPduId, PduInfoType * PduInfoPtr);
 
+Std_ReturnType CanIf_CheckWakeup(EcuM_WakeupSourceType WakeupSource);
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+#endif                          /* CANIF_H */
 
+
 
+/** @} */

+ 104 - 0
RTD/include/CanIf_Can.h
Vedi File 

@@ -0,0 +1,104 @@
 
+/**
 
+*   @file    CanIf_Can.h
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR CanIf - CanIf Cbk module interface
 
+*   @details AUTOSAR CanIf Cbk module interface.- Stub Version
 
+*   This file contains sample code only. It is not part of the production code deliverables.
 
+*
 
+*   @addtogroup CANIF_MODULE
 
+*   @{
 
+*/
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : generic
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*==================================================================================================
 
+==================================================================================================*/
 
+#ifndef CANIF_CAN_H
 
+#define CANIF_CAN_H
 
+
 
+#ifdef  __cplusplus
 
+extern "C"
 
+{
 
+#endif
 
+#include "CanIf_Types.h"
 
+/*==================================================================================================
 
+*                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CANIF_CAN_VENDOR_ID                         43
 
+#define CANIF_CAN_MODULE_ID                         60
 
+#define CANIF_CAN_AR_RELEASE_MAJOR_VERSION          4
 
+#define CANIF_CAN_AR_RELEASE_MINOR_VERSION          4
 
+#define CANIF_CAN_AR_RELEASE_REVISION_VERSION       0
 
+#define CANIF_CAN_SW_MAJOR_VERSION                  1
 
+#define CANIF_CAN_SW_MINOR_VERSION                  0
 
+#define CANIF_CAN_SW_PATCH_VERSION                  0
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and CanIf_Types.h header file are of the same vendor */
 
+#if (CANIF_CAN_VENDOR_ID != CANIF_TYPES_VENDOR_ID)
 
+#error "CanIf_Can.h and CanIf_Types.h have different vendor ids"
 
+#endif
 
+/* Check if current file and CanIf_Types.h header file are of the same Autosar version */
 
+#if ((CANIF_CAN_AR_RELEASE_MAJOR_VERSION != CANIF_TYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CANIF_CAN_AR_RELEASE_MINOR_VERSION != CANIF_TYPES_AR_RELEASE_MINOR_VERSION) || \
 
+     (CANIF_CAN_AR_RELEASE_REVISION_VERSION != CANIF_TYPES_AR_RELEASE_REVISION_VERSION))
 
+  #error "AutoSar Version Numbers of CanIf_Can.h and CanIf_Types.h are different"
 
+#endif
 
+/* Check if current file and CanIf_Types.h header file are of the same software version */
 
+#if ((CANIF_CAN_SW_MAJOR_VERSION != CANIF_TYPES_SW_MAJOR_VERSION) || \
 
+     (CANIF_CAN_SW_MINOR_VERSION != CANIF_TYPES_SW_MINOR_VERSION) || \
 
+     (CANIF_CAN_SW_PATCH_VERSION != CANIF_TYPES_SW_PATCH_VERSION))
 
+  #error "Software Version Numbers of CanIf_Can.h and CanIf_Types.h are different"
 
+#endif
 
+/*==================================================================================================
 
+*                                           CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                 STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                     FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+void CanIf_TxConfirmation(PduIdType CanTxPduId);
 
+void CanIf_RxIndication( const Can_HwType * Mailbox, const PduInfoType * PduInfoPtr );
 
+void CanIf_ControllerBusOff(uint8 ControllerId);
 
+void CanIf_ControllerModeIndication( uint8 ControllerId, Can_ControllerStateType ControllerMode );
 
+void CanIf_CurrentIcomConfiguration( uint8 ControllerId, IcomConfigIdType  ConfigurationId, IcomSwitch_ErrorType Error);
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+#endif                          /* CANIF_CBK_H */
 
+
 
+/** @} */
 
+

+ 77 - 0
RTD/include/CanIf_Types.h
Vedi File 

@@ -0,0 +1,77 @@
 
+/**
 
+*   @file    CanIf_Types.h
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR CanIf - CanIf module interface
 
+*   @details AUTOSAR CanIf module interface.- Stub Version
 
+*   This file contains sample code only. It is not part of the production code deliverables.
 
+*
 
+*   @addtogroup CANIF_MODULE
 
+*   @{
 
+*/
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : generic
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*==================================================================================================
 
+==================================================================================================*/
 
+#ifndef CANIF_TYPES_H
 
+#define CANIF_TYPES_H
 
+
 
+#ifdef __cplusplus
 
+extern "C"
 
+{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                         INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "ComStackTypes.h"
 
+#include "Can_GeneralTypes.h"
 
+/*==================================================================================================
 
+*                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CANIF_TYPES_VENDOR_ID                         43
 
+#define CANIF_TYPES_AR_RELEASE_MAJOR_VERSION          4
 
+#define CANIF_TYPES_AR_RELEASE_MINOR_VERSION          4
 
+#define CANIF_TYPES_AR_RELEASE_REVISION_VERSION       0
 
+#define CANIF_TYPES_SW_MAJOR_VERSION                  1
 
+#define CANIF_TYPES_SW_MINOR_VERSION                  0
 
+#define CANIF_TYPES_SW_PATCH_VERSION                  0
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    /* Check if current file and Can_GeneralTypes.h header file are of the same version */
 
+    #if ((CANIF_TYPES_AR_RELEASE_MAJOR_VERSION != CAN_GENERALTYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+        (CANIF_TYPES_AR_RELEASE_MINOR_VERSION != CAN_GENERALTYPES_AR_RELEASE_MINOR_VERSION))
 
+        #error "AutoSar Version Numbers of CanIf_Types.h and Can_GeneralTypes.h are different"
 
+    #endif
 
+#endif
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+#endif

+ 478 - 0
RTD/include/Can_Flexcan_Types.h
Vedi File 

@@ -0,0 +1,478 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*==================================================================================================
 
+==================================================================================================*/
 
+
 
+#ifndef CAN_FLEXCAN_TYPES_H
 
+#define CAN_FLEXCAN_TYPES_H
 
+
 
+/**
 
+*   @file    Can_Flexcan_Types.h
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Can - module interface
 
+*   @details Main header file - can include different IPV models.
 
+*
 
+*   @addtogroup CAN_DRIVER
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*
 
+* @page misra_violations MISRA-C:2012 violations
 
+*
 
+* @section Can_Flexcan_Types_h_REF_1
 
+* Violates MISRA 2012 Advisory Rule 2.5, A project should not contain unused macro declarations.
 
+* Declaration is reserved for future feature.
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Can_GeneralTypes.h"
 
+#include "Can_Ipw_Types.h"
 
+#include "Can_Cfg.h"
 
+#include "Mcal.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+/**
 
+* @{
 
+*
 
+*/
 
+#define CAN_FLEXCAN_TYPES_VENDOR_ID_H                    43
 
+/* @violates @ref Can_Flexcan_Types_h_REF_1 MISRA 2012 Advisory Rule 2.5 */
 
+#define CAN_FLEXCAN_TYPES_MODULE_ID_H                    80
 
+#define CAN_FLEXCAN_TYPES_AR_RELEASE_MAJOR_VERSION_H     4
 
+#define CAN_FLEXCAN_TYPES_AR_RELEASE_MINOR_VERSION_H     4
 
+#define CAN_FLEXCAN_TYPES_AR_RELEASE_REVISION_VERSION_H  0
 
+#define CAN_FLEXCAN_TYPES_SW_MAJOR_VERSION_H             1
 
+#define CAN_FLEXCAN_TYPES_SW_MINOR_VERSION_H             0
 
+#define CAN_FLEXCAN_TYPES_SW_PATCH_VERSION_H             0
 
+/**@}*/
 
+
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and Can_Cfg.h are of the same vendor */
 
+#if (CAN_FLEXCAN_TYPES_VENDOR_ID_H != CAN_VENDOR_ID_CFG_H)
 
+    #error "Can_Flexcan_Types.h and Can_Cfg.h have different vendor ids"
 
+#endif
 
+/* Check if current file and Can_Cfg.h are of the same Autosar version */
 
+#if ((CAN_FLEXCAN_TYPES_AR_RELEASE_MAJOR_VERSION_H    != CAN_AR_RELEASE_MAJOR_VERSION_CFG_H) || \
 
+     (CAN_FLEXCAN_TYPES_AR_RELEASE_MINOR_VERSION_H    != CAN_AR_RELEASE_MINOR_VERSION_CFG_H) || \
 
+     (CAN_FLEXCAN_TYPES_AR_RELEASE_REVISION_VERSION_H != CAN_AR_RELEASE_REVISION_VERSION_CFG_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Can_Flexcan_Types.h and Can_Cfg.h are different"
 
+#endif
 
+/* Check if current file and Can_Cfg.h are of the same Software version */
 
+#if ((CAN_FLEXCAN_TYPES_SW_MAJOR_VERSION_H != CAN_SW_MAJOR_VERSION_CFG_H) || \
 
+     (CAN_FLEXCAN_TYPES_SW_MINOR_VERSION_H != CAN_SW_MINOR_VERSION_CFG_H) || \
 
+     (CAN_FLEXCAN_TYPES_SW_PATCH_VERSION_H != CAN_SW_PATCH_VERSION_CFG_H) \
 
+    )
 
+    #error "Software Version Numbers of Can_Flexcan_Types.h and Can_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if current file and Can_Ipw_Types.h are of the same vendor */
 
+#if (CAN_FLEXCAN_TYPES_VENDOR_ID_H != CAN_IPW_TYPES_VENDOR_ID_H)
 
+    #error "Can_Flexcan_Types.h and Can_Ipw_Types.h have different vendor ids"
 
+#endif
 
+/* Check if current file and Can_Ipw_Types.h are of the same Autosar version */
 
+#if ((CAN_FLEXCAN_TYPES_AR_RELEASE_MAJOR_VERSION_H    != CAN_IPW_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CAN_FLEXCAN_TYPES_AR_RELEASE_MINOR_VERSION_H    != CAN_IPW_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CAN_FLEXCAN_TYPES_AR_RELEASE_REVISION_VERSION_H != CAN_IPW_TYPES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Can_Flexcan_Types.h and Can_Ipw_Types.h are different"
 
+#endif
 
+/* Check if current file and Can_Ipw_Types.h are of the same Software version */
 
+#if ((CAN_FLEXCAN_TYPES_SW_MAJOR_VERSION_H != CAN_IPW_TYPES_SW_MAJOR_VERSION_H) || \
 
+     (CAN_FLEXCAN_TYPES_SW_MINOR_VERSION_H != CAN_IPW_TYPES_SW_MINOR_VERSION_H) || \
 
+     (CAN_FLEXCAN_TYPES_SW_PATCH_VERSION_H != CAN_IPW_TYPES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Can_Flexcan_Types.h and Can_Ipw_Types.h are different"
 
+#endif
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    #if ((CAN_FLEXCAN_TYPES_AR_RELEASE_MAJOR_VERSION_H != MCAL_AR_RELEASE_MAJOR_VERSION) || \
 
+        (CAN_FLEXCAN_TYPES_AR_RELEASE_MINOR_VERSION_H != MCAL_AR_RELEASE_MINOR_VERSION) \
 
+        )
 
+        #error "Software Version Numbers of Can_Flexcan_Types.h and Mcal.h are different"
 
+    #endif
 
+    #if ((CAN_FLEXCAN_TYPES_AR_RELEASE_MAJOR_VERSION_H != CAN_GENERALTYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+        (CAN_FLEXCAN_TYPES_AR_RELEASE_MINOR_VERSION_H != CAN_GENERALTYPES_AR_RELEASE_MINOR_VERSION) \
 
+        )
 
+        #error "Software Version Numbers of Can_Flexcan_Types.h and Can_GeneralTypes.h are different"
 
+    #endif
 
+#endif
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+#if (CAN_DEV_ERROR_DETECT == STD_ON)
 
+    /*
 
+    *                 Development errors.
 
+    *                 (CAN104) The Can module shall be able to detect the following errors and exceptions depending on its configuration (development/production).
 
+    *                 (CAN026) Development Errors shall indicate errors that are caused by erroneous usage of the Can module API. This covers API
 
+    *                 parameter checks and call sequence errors.
 
+    *                 (CAN080) Development error values are of type uint8.
 
+    */
 
+
 
+    /*! @brief Development Error ID for "API Service called with wrong parameter" */
 
+    #define CAN_E_PARAM_POINTER         ((uint8)0x01U)
 
+    /*! @brief Development Error ID for "API Service called with wrong parameter" */
 
+    #define CAN_E_PARAM_HANDLE          ((uint8)0x02U)
 
+    /*! @brief Development Error ID for "API Service called with wrong parameter" */
 
+    #define CAN_E_PARAM_DATA_LENGTH     ((uint8)0x03U)
 
+    /*! @brief Development Error ID for "API Service called with wrong parameter" */
 
+    #define CAN_E_PARAM_CONTROLLER      ((uint8)0x04U)
 
+    /*! @brief Development Error ID for "API Service used without initialization" */
 
+    #define CAN_E_UNINIT                ((uint8)0x05U)
 
+    /*! @brief Development Error ID for "Invalid transition for the current mode" */
 
+    #define CAN_E_TRANSITION            ((uint8)0x06U)
 
+    #if (CAN_SET_BAUDRATE_API == STD_ON)
 
+        /*! @brief Development Error ID for "Parameter Baudrate has an invalid value" */
 
+        #define CAN_E_PARAM_BAUDRATE        ((uint8)0x07U)
 
+    #endif
 
+    /* @violates @ref Can_Flexcan_Types_h_REF_1 MISRA 2012 Advisory Rule 2.5 */
 
+    #define CAN_E_ICOM_CONFIG_INVALID   ((uint8)0x08U)
 
+    /*! @brief Development Error ID for "Invalid configuration set selection" */
 
+    #define CAN_E_INIT_FAILED           ((uint8)0x09U)
 
+    #if (CAN_MULTICORE_ENABLED == STD_ON)
 
+    /*! @brief Development Error ID for "Requested resource is not available on the current core" */
 
+    #define CAN_E_PARAM_CONFIG          ((uint8)0x0AU)
 
+    #endif /* (CAN_MULTICORE_ENABLED == STD_ON) */
 
+#endif /* CAN_DEV_ERROR_DETECT == STD_ON */
 
+/*! @brief Runtime Error ID for "Received CAN message is lost" */
 
+#define CAN_E_DATALOST              ((uint8)0x01U)
 
+
 
+#if (CAN_DEV_ERROR_DETECT == STD_ON)
 
+    /*
 
+    *           Service ID (APIs) for Det reporting
 
+    *           Service ID (APIs) for Det reporting
 
+    *
 
+    */
 
+    /*! @brief Service ID of Can_Init */
 
+    #define CAN_SID_INIT                                ((uint8)0x00U)
 
+    /* @violates @ref Can_Flexcan_Types_h_REF_1 MISRA 2012 Advisory Rule 2.5 */
 
+    /*! @brief Service ID of Can_MainFunction_Write */
 
+    #define CAN_SID_MAIN_FUNCTION_WRITE                 ((uint8)0x01U)
 
+    /*! @brief Service ID of Can_SetControllerMode */
 
+    #define CAN_SID_SET_CONTROLLER_MODE                 ((uint8)0x03U)
 
+    /*! @brief Service ID of Can_DisableControllerInterrupts */
 
+    #define CAN_SID_DISABLE_CONTROLLER_INTERRUPTS       ((uint8)0x04U)
 
+    /*! @brief Service ID of Can_EnableControllerInterrupts */
 
+    #define CAN_SID_ENABLE_CONTROLLER_INTERRUPTS        ((uint8)0x05U)
 
+    /*! @brief Service ID of Can_Write */
 
+    #define CAN_SID_WRITE                               ((uint8)0x06U)
 
+    #if (CAN_VERSION_INFO_API == STD_ON)
 
+        /*! @brief Service ID of Can_GetVersionInfo */
 
+        #define CAN_SID_GET_VERSION_INFO                    ((uint8)0x07U)
 
+    #endif
 
+    /* @violates @ref Can_Flexcan_Types_h_REF_1 MISRA 2012 Advisory Rule 2.5 */
 
+    /*! @brief Service ID of Can_MainFunction_BusOff */
 
+    #define CAN_SID_MAIN_FUNCTION_BUS_OFF               ((uint8)0x09U)
 
+    #if (CAN_WAKEUP_SUPPORT == STD_ON)
 
+        #define CAN_SID_MAIN_FUNCTION_WAKEUP                ((uint8)0x0AU)
 
+    #endif
 
+    #if (CAN_CHECK_WAKEUP_API == STD_ON)
 
+        #define CAN_SID_CHECK_WAKEUP                        ((uint8)0x0BU)
 
+    #endif
 
+    /* @violates @ref Can_Flexcan_Types_h_REF_1 MISRA 2012 Advisory Rule 2.5 */
 
+    /*! @brief Service ID of Can_MainFunction_Mode */
 
+    #define CAN_SID_MAIN_FUNCTION_MODE                  ((uint8)0x0CU)
 
+    #if (CAN_SET_BAUDRATE_API == STD_ON)
 
+        /*! @brief Service ID of Can_SetBaudrate */
 
+        #define CAN_SID_SET_BAUDRATE                        ((uint8)0x0FU)
 
+    #endif
 
+    /*! @brief Service ID of Can_DeInit */
 
+    #define CAN_SID_DEINIT                              ((uint8)0x10U)
 
+    /*! @brief Service ID of Can_GetControllerErrorState */
 
+    #define CAN_SID_GET_CONTROLLER_ERROR_STATE          ((uint8)0x11U)
 
+    /*! @brief Service ID of Can_GetControllerMode */
 
+    #define CAN_SID_GET_CONTROLLER_MODE                 ((uint8)0x12U)
 
+    #if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON)
 
+        #define CAN_SID_SET_ICOM_CONFIG                     ((uint8)0x21U)
 
+    #endif
 
+    /*! @brief Service ID of Can_GetControllerRxErrorCounter */
 
+    #define CAN_SID_GET_CONTROLLER_RX_ERROR_COUNTER     ((uint8)0x30U)
 
+    /*! @brief Service ID of Can_GetControllerTxErrorCounter */
 
+    #define CAN_SID_GET_CONTROLLER_TX_ERROR_COUNTER     ((uint8)0x31U)
 
+    #if (CAN_DUAL_CLOCK_MODE == STD_ON)
 
+        /*! @brief Service ID of Can_SetClockMode */
 
+        #define CAN_SID_SETCLOCKMODE                        ((uint8)0x13U)
 
+    #endif
 
+    #if (CAN_ABORT_MB_API == STD_ON)
 
+        /*! @brief Service ID of Can_AbortMb */
 
+        #define CAN_SID_ABORT_MB                            ((uint8)0x14U)
 
+    #endif
 
+#endif /* CAN_DEV_ERROR_DETECT == STD_ON */
 
+/*! @brief Service ID of Can_MainFunction_Read */
 
+#define CAN_SID_MAIN_FUNCTION_READ                  ((uint8)0x08U)
 
+#if (CAN_LISTEN_ONLY_MODE == STD_ON)
 
+#define CAN_SID_LISTEN_ONLY_MODE                        ((uint8)0x32U)
 
+#endif /* (CAN_LISTEN_ONLY_MODE == STD_ON) */
 
+
 
+#define CAN_FD_FRAME_U32        ((uint32)0x40000000U)
 
+#define CAN_EXTENDED_ID_U32     ((uint32)0x80000000U)
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+#if (CAN_DUAL_CLOCK_MODE == STD_ON)
 
+    /**
 
+    * @brief          Can_ClockModeType
 
+    * @details        CAN source clock selection used in Can_SetClockMode Non-Autosar API.
 
+    *
 
+    */
 
+    typedef enum
 
+    {
 
+        CAN_CLOCKMODE_NORMAL = 0U, /**< @brief Standard configuration (Default) */
 
+        CAN_CLOCKMODE_ALTERNATE    /**< @brief Second configuration (Alternate) */
 
+    }Can_ClockModeType;
 
+#endif
 
+
 
+/** @brief Can Hardware Object Handle*/
 
+typedef enum
 
+{
 
+    CAN_RECEIVE = 0,    /**< @brief Specifies the HardwareObject is used as Receive */
 
+    CAN_TRANSMIT        /**< @brief Specifies the HardwareObject is used as Transmit */
 
+}Can_HwObjectHandleType;
 
+
 
+/** @brief Can Id Message */
 
+typedef enum
 
+{
 
+    CAN_STANDARD = 0,   /**< @brief All the CANIDs are of type standard only (11bit). */
 
+    CAN_EXTENDED,       /**< @brief All the CANIDs are of type extended only (29 bit) */
 
+    CAN_MIXED           /**< @brief All the CANIDs are of type extended only (29 bit) */
 
+}Can_IdMessageType;
 
+
 
+/** @brief Message Buffer Type: TX, RX, RX FIFO */
 
+typedef enum
 
+{
 
+    CAN_RX_NORMAL = 0,            /**< @brief Specifies the HardwareObject is used as Normal Receive Object */
 
+    CAN_RX_LEGACY_FIFO,           /**< @brief Specifies the HardwareObject is used as Legacy FIFO Receive Object */
 
+    CAN_RX_ENHANCED_FIFO,         /**< @brief Specifies the HardwareObject is used as Enhanced FIFO Receive Object */
 
+    CAN_TX_NORMAL                 /**< @brief Specifies the HardwareObject is used as Normal Transmit Object */
 
+}Can_MbType;
 
+
 
+/** @brief Legacy FIFO ID Acceptance Mode */
 
+typedef enum
 
+{
 
+    CAN_LEGACY_FIFO_FORMAT_A = 0U,  /**< @brief One full ID (standard and extended) per ID filter table element. */
 
+    CAN_LEGACY_FIFO_FORMAT_B = 1U,  /**< @brief Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID filter table element. */
 
+    CAN_LEGACY_FIFO_FORMAT_C = 2U   /**< @brief Four partial 8-bit standard IDs per ID filter table element. */
 
+}Can_LegacyFIFOAcceptanceModeType;
 
+
 
+#if (CAN_TIMESTAMP_ENABLE == STD_ON)
 
+    typedef void (*Can_TxTimestampPCallBackType)(Can_HwHandleType Hoh, uint32 CanTxPduId, uint32 u32TimestampVal);
 
+    typedef void (*Can_RxTimestampPCallBackType)(Can_HwHandleType Hoh, uint32 u32TimestampVal);
 
+#endif
 
+
 
+#if (CAN_LISTEN_ONLY_MODE == STD_ON)
 
+/** @brief Listen Only Type */
 
+typedef enum
 
+{
 
+    NORMAL_MODE          = 0U,     /**< @brief Nomal mode. */
 
+    LISTEN_ONLY_MODE     = 1U      /**< @brief Enable Listen Only mode. */
 
+}Can_ListenOnlyType;
 
+#endif /* (CAN_LISTEN_ONLY_MODE == STD_ON) */
 
+
 
+/*==================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+typedef void (*Can_NotifyType)(void);
 
+
 
+/** @brief Can Hardware Filter */
 
+typedef struct
 
+{
 
+    const uint32 Can_u32HwFilterCode;   /**< @brief Specifies (together with the filter mask) the identifiers range that passes the hardware filter. */
 
+    const uint32 Can_u32HwFilterMask;   /**< @brief Describes a mask for hardware-based filtering of CAN identifiers. */
 
+}Can_HwFilterType;
 
+
 
+/** @brief Can Hardware Object */
 
+typedef struct
 
+{
 
+    /** @brief Can Hardware Object ID */
 
+    const Can_HwHandleType Can_HwObjectID;
 
+    /** @brief Specifies Hardware Object is used as Tansmit or as Receive Object */
 
+    const Can_HwObjectHandleType Can_HohType;
 
+    /** @brief Specifies the type of Message ID: STANDARD, EXTENDED, MIXED */
 
+    const Can_IdMessageType Can_IdMessage;
 
+    /** @brief Specifies the processing of HOH is Polling or Interrupt */
 
+    const boolean Can_bHwObjectUsesPolling;
 
+    /** @brief Specifies the Hw object is enable/disable Trigger Transmit */
 
+    const boolean Can_bTriggerTransmit;
 
+    /** @brief Number of Hardware Objects used to implement one HOH */
 
+    const uint8 Can_u8ObjectCount;
 
+    /** @brief Can MainFunction RW period reference */
 
+    const uint8 Can_MainFuncPeriodIndex;
 
+    /** @brief Specifies the Max data length of Hw Object */
 
+    const uint8 Can_u8PayloadLength;
 
+    /** @brief Specifies the value which is used to pad unspecified data */
 
+    const uint8 Can_u8PaddingValue;
 
+    /** @brief The number of Can Hw Filter Config */
 
+    const uint8 Can_u8HwFilterCount;
 
+    /** @brief Pointer to Hw Filter Config */
 
+    const Can_HwFilterType * Can_pHwFilterConfig;
 
+    /** @brief Specifies the Message Buffer is TX, RX or RX FIFO */
 
+    const Can_MbType Can_eReceiveType;
 
+    /** @brief Buffer Index in Message buffer ram */
 
+    const uint8 Can_u8HwBufferIndex;
 
+    /** @brief Pointer to Hw Buffer Address */
 
+    const uint32 * Can_pHwBufferAddr;
 
+     /** @brief The parameter is used to detect the MB which is use to get Timestamp or not */
 
+#if (CAN_TIMESTAMP_ENABLE == STD_ON)
 
+    const boolean CanTimestampEnable;
 
+#endif
 
+}Can_HwObjectConfigType;
 
+
 
+/** @brief Can Bit Rate */
 
+typedef struct
 
+{
 
+    /** @brief Propagation Segment */
 
+    const uint8 Can_u8PropSeg;
 
+    /** @brief Phase Segment 1 */
 
+    const uint8 Can_u8PhaseSeg1;
 
+    /** @brief Phase Segment 2 */
 
+    const uint8 Can_u8PhaseSeg2;
 
+    /** @brief Prescaler Devider */
 
+    const uint16 Can_u16Prescaler;
 
+#if (CAN_DUAL_CLOCK_MODE == STD_ON)
 
+    /** @brief Alternative Baudrate Prescaller */
 
+    const uint16 Can_u16PrescalerAlternate;
 
+#endif
 
+    /** @brief Synchronization Jump Width*/
 
+    const uint8 Can_u8ResyncJumpWidth;
 
+}Can_TimeSegmentType;
 
+
 
+/** @brief Can Baudrate */
 
+typedef struct
 
+{
 
+    /** @brief enhance CBT support */
 
+    const boolean Can_bEnhanceCBTEnable;
 
+    /** @brief Tx Bit Rate Switch */
 
+    const boolean Can_bBitRateSwitch;
 
+    /** @brief Can FD support */
 
+    const boolean Can_bFDFrame;
 
+    /** @brief Nominal Bit Rate */
 
+    const Can_TimeSegmentType Can_NominalBitRate;
 
+    /** @brief Data Bit Rate (using when support FD and Bit Rate Swith is set) */
 
+    const Can_TimeSegmentType Can_DataBitRate;
 
+    /** @brief Specifies the Transmission Arbitration start delay */
 
+    const uint8 Can_u8TxArbitrationStartDelay;
 
+    /** @brief Transmiter Delay Compensation Enable */
 
+    const boolean Can_bTrcvDelayEnable;
 
+    /** @brief Specifies the Transmiter Delay Compensation Offset */
 
+    const uint8 Can_u8TrcvDelayCompOffset;
 
+}Can_BaudrateConfigType;
 
+
 
+/** @brief Can Controller */
 
+typedef struct
 
+{
 
+    /** @brief Abstracted CanIf Controller ID */
 
+    const uint8 Can_u8AbstControllerID;
 
+    /** @brief Controller ID */
 
+    const uint8 Can_u8ControllerID;
 
+    /** @brief Controller Offset */
 
+    const uint8 Can_u8ControllerOffset;
 
+    /** @brief Controller Base Address */
 
+    const uint32 Can_u32BaseAddress;
 
+    /** @brief Define Controller is used in Config */
 
+    const boolean Can_bActivation;
 
+    /** @brief Bus Off uses Polling */
 
+    const boolean Can_bBusOffUsesPolling;
 
+    /** @brief Specifies the Global mask of Legacy FIFO */
 
+    const uint32 Can_u32LegacyGlobalMask;
 
+    /** @brief ID Acceptance Mode */
 
+    const Can_LegacyFIFOAcceptanceModeType Can_eLegacyAcceptanceMode;
 
+    /** @brief Legacy FIFO Warning Notification */
 
+    const Can_NotifyType Can_pLegacyFiFoWarnNotif;
 
+    /** @brief Legacy FIFO Overflow Notification */
 
+    const Can_NotifyType Can_pLegacyFiFoOvfNotif;
 
+    /** @brief Enhance FIFO Overflow Notification */
 
+    const Can_NotifyType Can_pEnhanceFiFoOvfNotif;
 
+#if (CAN_FEATURE_HAS_DMA_ENABLE == STD_ON)
 
+    /** @brief Enhance FIFO Dma Error Notification */
 
+    const Can_NotifyType Can_pDmaErrorNotif;
 
+    /** @brief Pointer to DMA destination address */
 
+    Flexcan_Ip_MsgBuffType * pDmaDstAddr;
 
+#endif
 
+    /** @brief Error Interrupt enable */
 
+    const boolean bErrEn;
 
+    /** @brief Error Notification */
 
+    const Can_NotifyType Can_pErrNotif;
 
+    /** @brief Error FD Notification */
 
+    const Can_NotifyType Can_pFDErrNotif;
 
+    /** @brief Default Baudrate ID */
 
+    const uint16 Can_u16DefaultBaudrateID;
 
+     /** @brief Number of Baurate Configured */
 
+    const uint16 Can_u16BaudrateConfigCount;
 
+    /** @brief Pointer to Baudrate Config */
 
+    const Can_BaudrateConfigType * Can_pBaudrateConfig;
 
+    /** @brief Pointer to Controller config */
 
+    const Can_Ipw_HwChannelConfigType * HwChannelIpConfig;
 
+    /** @brief The number of Hw Objects referred to Controller */
 
+    const uint8 Can_u8HwObjectRefCount;
 
+    /** @brief Pointer point to Pointer to Hw Object that refer to Controller */
 
+    const Can_HwObjectConfigType * const * Can_ppHwObject;
 
+#if (CAN_TIMESTAMP_ENABLE == STD_ON)
 
+    /** @brief Pointer to TX Timestamp notification function. */
 
+    const Can_TxTimestampPCallBackType CanTxTimestampNotification;
 
+    /** @brief Pointer to RX Timestamp notification function. */
 
+    const Can_RxTimestampPCallBackType CanRxTimestampNotification;
 
+#endif
 
+}Can_ControllerConfigType;
 
+
 
+#if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON)
 
+typedef struct
 
+{
 
+    const uint8 u8CanIcomConfigId;
 
+    const boolean bCanIcomWakeOnBusOff;
 
+    const uint8 u8NumberCanIcomRxMessage;
 
+    const Can_Ipw_IcomRxMessageConfigsType * pCanIcomRxMessageConfigs;
 
+} Can_IcomConfigsType;
 
+#endif /* (CAN_PUBLIC_ICOM_SUPPORT == STD_ON) */
 
+/*==================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* CAN_FLEXCAN_TYPES_H */

+ 327 - 0
RTD/include/Can_Ipw.h
Vedi File 

@@ -0,0 +1,327 @@
 
+/**
 
+*   @file    Can_Ipw.h
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Can - module interface
 
+*   @details Main header file - can include different IPV models.
 
+*
 
+*   @addtogroup CAN_DRIVER
 
+*   @{
 
+*/
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*==================================================================================================
 
+==================================================================================================*/
 
+
 
+#ifndef CAN_IPW_H
 
+#define CAN_IPW_H
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*
 
+* @page misra_violations MISRA-C:2012 violations
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.1, External identifiers shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.2, Identifiers declared in the same scope and name space shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.4, Macro identifiers shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.5, Identifiers shall be distinct from macro names.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section Can_Ipw_h_REF_1
 
+* Violates MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents
 
+* of a header file being included more than once. This comes from the order of includes in the .c file
 
+* and from include dependencies. As a safe approach, any file must include all its dependencies.
 
+* Header files are already protected against double inclusions. The inclusion of Can_Memmap.h is as
 
+* per AUTOSAR requirement (SWS_MemMap_00003)
 
+*
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "FlexCAN_Ip.h"
 
+#include "Can_Flexcan_Types.h"
 
+#include "Can_Ipw_Cfg.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+/**
 
+* @{
 
+*
 
+*/
 
+#define CAN_IPW_VENDOR_ID_H                    43
 
+#define CAN_IPW_MODULE_ID                      80
 
+#define CAN_IPW_AR_RELEASE_MAJOR_VERSION_H     4
 
+#define CAN_IPW_AR_RELEASE_MINOR_VERSION_H     4
 
+#define CAN_IPW_AR_RELEASE_REVISION_VERSION_H  0
 
+#define CAN_IPW_SW_MAJOR_VERSION_H             1
 
+#define CAN_IPW_SW_MINOR_VERSION_H             0
 
+#define CAN_IPW_SW_PATCH_VERSION_H             0
 
+/**@}*/
 
+
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and FlexCAN_Ip header file are of the same vendor */
 
+#if (CAN_IPW_VENDOR_ID_H != FLEXCAN_IP_VENDOR_ID_H)
 
+    #error "Can_Ipw.h and FlexCAN_Ip.h have different vendor ids"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip header file are of the same Autosar version */
 
+#if ((CAN_IPW_AR_RELEASE_MAJOR_VERSION_H    != FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CAN_IPW_AR_RELEASE_MINOR_VERSION_H    != FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CAN_IPW_AR_RELEASE_REVISION_VERSION_H != FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_H))
 
+    #error "AutoSar Version Numbers of Can_Ipw.h and FlexCAN_Ip.h are different"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip header file are of the same Software version */
 
+#if ((CAN_IPW_SW_MAJOR_VERSION_H != FLEXCAN_IP_SW_MAJOR_VERSION_H) || \
 
+     (CAN_IPW_SW_MINOR_VERSION_H != FLEXCAN_IP_SW_MINOR_VERSION_H) || \
 
+     (CAN_IPW_SW_PATCH_VERSION_H != FLEXCAN_IP_SW_PATCH_VERSION_H))
 
+    #error "Software Version Numbers of Can_Ipw.h and FlexCAN_Ip.h are different"
 
+#endif
 
+
 
+
 
+/* Check if current file and Can_Ipw_Cfg header file are of the same vendor */
 
+#if (CAN_IPW_VENDOR_ID_H != CAN_IPW_CFG_VENDOR_ID)
 
+    #error "Can_Ipw.h and Can_Ipw_Cfg.h have different vendor ids"
 
+#endif
 
+/* Check if current file and Can_Ipw_Cfg header file are of the same Autosar version */
 
+#if ((CAN_IPW_AR_RELEASE_MAJOR_VERSION_H    != CAN_IPW_CFG_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CAN_IPW_AR_RELEASE_MINOR_VERSION_H    != CAN_IPW_CFG_AR_RELEASE_MINOR_VERSION) || \
 
+     (CAN_IPW_AR_RELEASE_REVISION_VERSION_H != CAN_IPW_CFG_AR_RELEASE_REVISION_VERSION))
 
+    #error "AutoSar Version Numbers of Can_Ipw.h and Can_Ipw_Cfg.h are different"
 
+#endif
 
+/* Check if current file and Can_Ipw_Cfg header file are of the same Software version */
 
+#if ((CAN_IPW_SW_MAJOR_VERSION_H != CAN_IPW_CFG_SW_MAJOR_VERSION) || \
 
+     (CAN_IPW_SW_MINOR_VERSION_H != CAN_IPW_CFG_SW_MINOR_VERSION) || \
 
+     (CAN_IPW_SW_PATCH_VERSION_H != CAN_IPW_CFG_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Can_Ipw.h and Can_Ipw_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if current file and Can_Flexcan_Types header file are of the same vendor */
 
+#if (CAN_IPW_VENDOR_ID_H != CAN_FLEXCAN_TYPES_VENDOR_ID_H)
 
+    #error "Can_Ipw.h and Can_Flexcan_Types.h have different vendor ids"
 
+#endif
 
+/* Check if current file and Can_Flexcan_Types header file are of the same Autosar version */
 
+#if ((CAN_IPW_AR_RELEASE_MAJOR_VERSION_H    != CAN_FLEXCAN_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CAN_IPW_AR_RELEASE_MINOR_VERSION_H    != CAN_FLEXCAN_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CAN_IPW_AR_RELEASE_REVISION_VERSION_H != CAN_FLEXCAN_TYPES_AR_RELEASE_REVISION_VERSION_H))
 
+    #error "AutoSar Version Numbers of Can_Ipw.h and Can_Flexcan_Types.h are different"
 
+#endif
 
+/* Check if current file and Can_Flexcan_Types header file are of the same Software version */
 
+#if ((CAN_IPW_SW_MAJOR_VERSION_H != CAN_FLEXCAN_TYPES_SW_MAJOR_VERSION_H) || \
 
+     (CAN_IPW_SW_MINOR_VERSION_H != CAN_FLEXCAN_TYPES_SW_MINOR_VERSION_H) || \
 
+     (CAN_IPW_SW_PATCH_VERSION_H != CAN_FLEXCAN_TYPES_SW_PATCH_VERSION_H))
 
+    #error "Software Version Numbers of Can_Ipw.h and Can_Flexcan_Types.h are different"
 
+#endif
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+/* @violates @ref Can_Flexcan_h_REF_2 MISRA 2012 Advisory Rule 4.9 */
 
+#define Call_Can_FlexCan_Init(instance, status, Can_pControllerConfig)         FlexCAN_Ip_Init(instance, status, Can_pControllerConfig)
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define CAN_START_SEC_CODE
 
+/* @violates @ref Can_Ipw_h_REF_1 MISRA 2012 Required Directive 4.10. */
 
+#include "Can_MemMap.h"
 
+/* Initialize Controller */
 
+Std_ReturnType Can_Ipw_Init(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+/* Initialize Rx Fifo or MBs for reception ready */
 
+Std_ReturnType  Can_Ipw_InitRx(const Can_ControllerConfigType * Can_pController);
 
+
 
+/* De-Initialize Controller */
 
+void Can_Ipw_DeInit(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+#if (CAN_SET_BAUDRATE_API == STD_ON)
 
+/* Set Baud Rate of Controller */
 
+Std_ReturnType Can_Ipw_SetBaudrate
 
+    (
 
+        const Can_ControllerConfigType * Can_pControllerConfig,
 
+        uint16 BaudRateConfigID
 
+    );
 
+#endif
 
+/* Set Controller to participate the CAN network */
 
+Std_ReturnType Can_Ipw_SetControllerToStartMode(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+/* Set Controller to stop participating the CAN network */
 
+Std_ReturnType Can_Ipw_SetControllerToStopMode(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+/* Disable Can Controller Interrupt */
 
+void Can_Ipw_DisableControllerInterrupts(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+/* Enable Can Controller Interrupt */
 
+void Can_Ipw_EnableControllerInterrupts(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+/* Get Controller Error State */
 
+uint8 Can_Ipw_GetControllerErrorState(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+/* Get Controller Rx Error Counter */
 
+uint8 Can_Ipw_GetControllerRxErrorCounter(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+/* Get Controller Tx Error Counter */
 
+uint8 Can_Ipw_GetControllerTxErrorCounter(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+#if (CAN_LISTEN_ONLY_MODE == STD_ON)
 
+/* Enable or disable Listen Only Mode */
 
+Std_ReturnType Can_Ipw_ListenOnlyMode(const Can_ControllerConfigType * Can_pControllerConfig, const Can_ListenOnlyType State);
 
+#endif /* (CAN_LISTEN_ONLY_MODE == STD_ON) */
 
+
 
+/* Write Pduinfo to Hw Buffer and request transmission */
 
+Std_ReturnType Can_Ipw_Write
 
+(
 
+    const Can_ControllerConfigType * Can_pControllerConfig,
 
+    const Can_HwObjectConfigType * Can_pHwObjectConfig,
 
+    const Can_PduType * PduInfo
 
+);
 
+
 
+#if (CAN_ABORT_MB_API == STD_ON)
 
+    /* Cancel of a pending CAN transmission */
 
+    void Can_Ipw_AbortMb
 
+    (
 
+        const Can_ControllerConfigType * Can_pControllerConfig,
 
+        const Can_HwObjectConfigType * Can_pHwObjectConfig
 
+    );
 
+#endif
 
+
 
+#if (CAN_DUAL_CLOCK_MODE == STD_ON)
 
+    /* Switch to another clock by changing controller's prescaler */
 
+    void Can_Ipw_SetClockMode
 
+    (
 
+        const Can_ControllerConfigType * Can_pControllerConfig,
 
+        uint16 Can_u16BaudrateID,
 
+        Can_ClockModeType Can_eClkMode
 
+    );
 
+#endif
 
+/* Polling Tx Confirmation */
 
+void Can_Ipw_MainFunction_Write
 
+(
 
+    const Can_ControllerConfigType * Can_pControllerConfig,
 
+    const Can_HwObjectConfigType * Can_pHwObjectConfig
 
+);
 
+
 
+/* Polling Rx Indication */
 
+void Can_Ipw_MainFunction_Read
 
+(
 
+    const Can_ControllerConfigType * Can_pControllerConfig,
 
+    const Can_HwObjectConfigType * Can_pHwObjectConfig
 
+);
 
+
 
+/* Polling Bus Off */
 
+void Can_Ipw_MainFunction_BusOff(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+/* Polling Controller Mode Transitions */
 
+void Can_Ipw_MainFunction_Mode
 
+(
 
+    const Can_ControllerConfigType * Can_pControllerConfig,
 
+    Can_ControllerStateType * Can_pControllerState
 
+);
 
+
 
+#if (CAN_MB_INTERRUPT_SUPPORT == STD_ON)
 
+    /* Process Tx Interrupt */
 
+    void Can_Ipw_ProcessTxMesgBuffer
 
+    (
 
+        const Can_ControllerConfigType * Can_pControllerConfig,
 
+        const Can_HwObjectConfigType * Can_pHwObjectConfig,
 
+        uint8 u8MbIdx
 
+    );
 
+
 
+    /* Process Rx Interrupt */
 
+    void Can_Ipw_ProcessRxMesgBuffer
 
+    (
 
+        const Can_ControllerConfigType * Can_pControllerConfig,
 
+        const Can_HwObjectConfigType * Can_pHwObjectConfig,
 
+        uint8 u8MbIdx
 
+    );
 
+
 
+    #if (CAN_ENHANCED_FIFO_ENABLED == STD_ON)
 
+        /* Process Rx Enhance FIFO Interrupt */
 
+        void Can_Ipw_ProcessRxEnhance
 
+        (
 
+            const Can_ControllerConfigType * Can_pControllerConfig,
 
+            const Can_HwObjectConfigType * Can_pHwObjectConfig,
 
+            uint8 u8Event
 
+        );
 
+    #endif
 
+    #if (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON)
 
+        void Can_Ipw_ProcessRxLegacyDma
 
+        (
 
+            const Can_ControllerConfigType * Can_pControllerConfig,
 
+            const Can_HwObjectConfigType * Can_pHwObjectConfig,
 
+            uint8 u8Event
 
+        );
 
+    #endif
 
+
 
+
 
+#endif
 
+
 
+#if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON)
 
+Std_ReturnType Can_Ipw_DeactivateIcomConfiguration(const Can_ControllerConfigType * Can_pControllerConfig);
 
+
 
+Std_ReturnType Can_Ipw_SetIcomConfiguration(const Can_ControllerConfigType * Can_pControllerConfig, const Can_IcomConfigsType * pIcomConfig);
 
+void Can_Ipw_ProcessPN(const Can_ControllerConfigType * Can_pControllerConfig, const Can_IcomConfigsType * pIcomConfig);
 
+#endif /* (CAN_PUBLIC_ICOM_SUPPORT == STD_ON) */
 
+
 
+#define CAN_STOP_SEC_CODE
 
+/* @violates @ref Can_Ipw_h_REF_1 MISRA 2012 Required Directive 4.10. */
 
+#include "Can_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+#endif /*TEMPLATE_H*/
 
+
 
+/** @} */

+ 133 - 0
RTD/include/Can_Ipw_Irq.h
Vedi File 

@@ -0,0 +1,133 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*==================================================================================================
 
+==================================================================================================*/
 
+
 
+#ifndef CAN_IPW_IRQ_H
 
+#define CAN_IPW_IRQ_H
 
+
 
+/**
 
+*   @file    Can_Ipw_Irq.h
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Can - module interface.
 
+*   @details API header for CAN driver.
 
+*
 
+*   @addtogroup CAN_DRIVER
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+/*
 
+* @page misra_violations MISRA-C:2012 violations
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.1, External identifiers shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.2, Identifiers declared in the same scope and name space shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.4, Macro identifiers shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.5, Identifiers shall be distinct from macro names.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section Can_Ipw_Irq_h_REF_1
 
+* Violates MISRA 2012 Advisory Rule 4.9, A function should be used in preference to a function-like macro where they are interchangeable.
 
+* Function like macro are used to reduce code complexity.
 
+*
 
+* @section Can_Ipw_Irq_h_REF_2
 
+* Violates MISRA 2012 Advisory Rule 2.5, A project should not contain unused macro declarations.
 
+* The macro is used as depending on configuration.
 
+*/
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Can_Irq.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CAN_IPW_IRQ_VENDOR_ID                   43
 
+#define CAN_IPW_IRQ_AR_RELEASE_MAJOR_VERSION    4
 
+#define CAN_IPW_IRQ_AR_RELEASE_MINOR_VERSION    4
 
+#define CAN_IPW_IRQ_AR_RELEASE_REVISION_VERSION 0
 
+#define CAN_IPW_IRQ_SW_MAJOR_VERSION            1
 
+#define CAN_IPW_IRQ_SW_MINOR_VERSION            0
 
+#define CAN_IPW_IRQ_SW_PATCH_VERSION            0
 
+
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and Can_Irq.h are of the same vendor */
 
+#if (CAN_IPW_IRQ_VENDOR_ID != CAN_IRQ_VENDOR_ID)
 
+#error "Can_IPW_Irq.h and Can_Irq.h have different vendor ids"
 
+#endif
 
+/* Check if current file and Can_Irq.h are of the same Autosar version */
 
+#if ((CAN_IPW_IRQ_AR_RELEASE_MAJOR_VERSION != CAN_IRQ_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CAN_IPW_IRQ_AR_RELEASE_MINOR_VERSION != CAN_IRQ_AR_RELEASE_MINOR_VERSION) || \
 
+     (CAN_IPW_IRQ_AR_RELEASE_REVISION_VERSION != CAN_IRQ_AR_RELEASE_REVISION_VERSION) \
 
+    )
 
+  #error "AutoSar Version Numbers of Can_IPW_Irq.h and Can_Irq.h are different"
 
+#endif
 
+
 
+/* Check if current file and Can_Irq.h are of the same software version */
 
+#if ((CAN_IPW_IRQ_SW_MAJOR_VERSION != CAN_IRQ_SW_MAJOR_VERSION) || \
 
+     (CAN_IPW_IRQ_SW_MINOR_VERSION != CAN_IRQ_SW_MINOR_VERSION) || \
 
+     (CAN_IPW_IRQ_SW_PATCH_VERSION != CAN_IRQ_SW_PATCH_VERSION) \
 
+    )
 
+  #error "Software Version Numbers of Can_IPW_Irq.h and Can_Irq.h are different"
 
+#endif
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+/* @violates @ref Can_Ipw_Irq_h_REF_1 MISRA 2012 Advisory Rule 4.9 */
 
+/* @violates @ref Can_Ipw_Irq_h_REF_2 MISRA 2012 Advisory Rule 2.5 */
 
+#define Can_Ipw_ProcessMesgBufferCommonInterrupt(u8CtrlOffset, u8FirstMbIdx, u8LastMbIdx)    Can_ProcessMesgBufferCommonInterrupt((u8CtrlOffset), (u8FirstMbIdx), (u8LastMbIdx))
 
+/* @violates @ref Can_Ipw_Irq_h_REF_1 MISRA 2012 Advisory Rule 4.9 */
 
+/* @violates @ref Can_Ipw_Irq_h_REF_2 MISRA 2012 Advisory Rule 2.5 */
 
+#define Can_Ipw_ProcessBusOffInterrupt(u8CtrlOffset)    Can_ProcessBusOffInterrupt(u8CtrlOffset)
 
+/* @violates @ref Can_Ipw_Irq_h_REF_1 MISRA 2012 Advisory Rule 4.9 */
 
+/* @violates @ref Can_Ipw_Irq_h_REF_2 MISRA 2012 Advisory Rule 2.5 */
 
+#define Can_Ipw_ProcessErrorInterrupt(u8CtrlOffset, bIsErrFast)     Can_ProcessErrorInterrupt(u8CtrlOffset, bIsErrFast)
 
+/* @violates @ref Can_Ipw_Irq_h_REF_1 MISRA 2012 Advisory Rule 4.9 */
 
+/* @violates @ref Can_Ipw_Irq_h_REF_2 MISRA 2012 Advisory Rule 2.5 */
 
+#define Can_Ipw_ProcessEnhancedFiFoInterrupt(u8CtrlOffset)     Can_ProcessEnhancedFiFoInterrupt(u8CtrlOffset)
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* CAN_IPW_IRQ_H */

+ 176 - 0
RTD/include/Can_Ipw_Types.h
Vedi File 

@@ -0,0 +1,176 @@
 
+/**
 
+*   @file    Can_IPW_Types.h
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Can - module interface
 
+*   @details Main header file - can include different IPV models.
 
+*
 
+*   @addtogroup CAN_DRIVER
 
+*   @{
 
+*/
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*==================================================================================================
 
+==================================================================================================*/
 
+
 
+#ifndef CAN_IPW_TYPES_H
 
+#define CAN_IPW_TYPES_H
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*
 
+* @page misra_violations MISRA-C:2012 violations
 
+* @section Can_IPW_Types_h_REF_1
 
+* Violates MISRA 2012 Advisory Rule 2.5, A project should not contain unused macro declarations.
 
+* Declaration is reserved for future feature.
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Can_Ipw_Cfg.h"
 
+#include "Can_Cfg.h"
 
+#if (CAN_USE_FLEXCAN_IP  == STD_ON)
 
+#include "FlexCAN_Ip.h"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+/**
 
+* @{
 
+* @file           Can_IPW_Types.h
 
+*/
 
+#define CAN_IPW_TYPES_VENDOR_ID_H                    43
 
+/* @violates @ref Can_IPW_Types_h_REF_1 2012 Advisory Rule 2.5. */
 
+#define CAN_IPW_TYPES_MODULE_ID_H                    80
 
+#define CAN_IPW_TYPES_AR_RELEASE_MAJOR_VERSION_H     4
 
+#define CAN_IPW_TYPES_AR_RELEASE_MINOR_VERSION_H     4
 
+#define CAN_IPW_TYPES_AR_RELEASE_REVISION_VERSION_H  0
 
+#define CAN_IPW_TYPES_SW_MAJOR_VERSION_H             1
 
+#define CAN_IPW_TYPES_SW_MINOR_VERSION_H             0
 
+#define CAN_IPW_TYPES_SW_PATCH_VERSION_H             0
 
+/**@}*/
 
+
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+#if (CAN_USE_FLEXCAN_IP  == STD_ON)
 
+/* Check if current file and FlexCAN_Ip.h are of the same vendor */
 
+#if (CAN_IPW_TYPES_VENDOR_ID_H != FLEXCAN_IP_VENDOR_ID_H)
 
+#error "Can_IPW_Types.h and FlexCAN_Ip.h have different vendor ids"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip.h are of the same Autosar version */
 
+#if ((CAN_IPW_TYPES_AR_RELEASE_MAJOR_VERSION_H != FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (CAN_IPW_TYPES_AR_RELEASE_MINOR_VERSION_H != FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (CAN_IPW_TYPES_AR_RELEASE_REVISION_VERSION_H != FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_H))
 
+  #error "AutoSar Version Numbers of Can_IPW_Types.h and FlexCAN_Ip.h are different"
 
+#endif
 
+
 
+/* Check if current file and FlexCAN_Ip.h are of the same software version */
 
+#if ((CAN_IPW_TYPES_SW_MAJOR_VERSION_H != FLEXCAN_IP_SW_MAJOR_VERSION_H) || \
 
+     (CAN_IPW_TYPES_SW_MINOR_VERSION_H != FLEXCAN_IP_SW_MINOR_VERSION_H) || \
 
+     (CAN_IPW_TYPES_SW_PATCH_VERSION_H != FLEXCAN_IP_SW_PATCH_VERSION_H))
 
+  #error "Software Version Numbers of Can_IPW_Types.h and FlexCAN_Ip.h are different"
 
+#endif
 
+#endif /* (CAN_USE_FLEXCAN_IP  == STD_ON) */
 
+
 
+/* Check if current file and Can_Ipw_Cfg.h are of the same vendor */
 
+#if (CAN_IPW_TYPES_VENDOR_ID_H != CAN_IPW_CFG_VENDOR_ID)
 
+#error "Can_IPW_Types.h and Can_Ipw_Cfg.h have different vendor ids"
 
+#endif
 
+/* Check if current file and Can_Ipw_Cfg.h are of the same Autosar version */
 
+#if ((CAN_IPW_TYPES_AR_RELEASE_MAJOR_VERSION_H !=    CAN_IPW_CFG_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CAN_IPW_TYPES_AR_RELEASE_MINOR_VERSION_H !=    CAN_IPW_CFG_AR_RELEASE_MINOR_VERSION) || \
 
+     (CAN_IPW_TYPES_AR_RELEASE_REVISION_VERSION_H != CAN_IPW_CFG_AR_RELEASE_REVISION_VERSION))
 
+  #error "AutoSar Version Numbers of Can_IPW_Types.h and Can_Ipw_Cfg.h are different"
 
+#endif
 
+/* Check if current file and Can_Ipw_Cfg.h are of the same software version */
 
+#if ((CAN_IPW_TYPES_SW_MAJOR_VERSION_H != CAN_IPW_CFG_SW_MAJOR_VERSION) || \
 
+     (CAN_IPW_TYPES_SW_MINOR_VERSION_H != CAN_IPW_CFG_SW_MINOR_VERSION) || \
 
+     (CAN_IPW_TYPES_SW_PATCH_VERSION_H != CAN_IPW_CFG_SW_PATCH_VERSION))
 
+  #error "Software Version Numbers of Can_IPW_Types.h and Can_Ipw_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if current file and Can_Cfg.h are of the same vendor */
 
+#if (CAN_IPW_TYPES_VENDOR_ID_H != CAN_VENDOR_ID_CFG_H)
 
+#error "Can_IPW_Types.h and Can_Cfg.h have different vendor ids"
 
+#endif
 
+/* Check if current file and Can_Cfg.h are of the same Autosar version */
 
+#if ((CAN_IPW_TYPES_AR_RELEASE_MAJOR_VERSION_H !=    CAN_AR_RELEASE_MAJOR_VERSION_CFG_H) || \
 
+     (CAN_IPW_TYPES_AR_RELEASE_MINOR_VERSION_H !=    CAN_AR_RELEASE_MINOR_VERSION_CFG_H) || \
 
+     (CAN_IPW_TYPES_AR_RELEASE_REVISION_VERSION_H != CAN_AR_RELEASE_REVISION_VERSION_CFG_H))
 
+  #error "AutoSar Version Numbers of Can_IPW_Types.h and Can_Cfg.h are different"
 
+#endif
 
+/* Check if current file and Can_Cfg.h are of the same software version */
 
+#if ((CAN_IPW_TYPES_SW_MAJOR_VERSION_H != CAN_SW_MAJOR_VERSION_CFG_H) || \
 
+     (CAN_IPW_TYPES_SW_MINOR_VERSION_H != CAN_SW_MINOR_VERSION_CFG_H) || \
 
+     (CAN_IPW_TYPES_SW_PATCH_VERSION_H != CAN_SW_PATCH_VERSION_CFG_H))
 
+  #error "Software Version Numbers of Can_IPW_Types.h and Can_Cfg.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+typedef struct {
 
+const Flexcan_Ip_ConfigType * pFlexcanIpHwConfig;
 
+} Can_Ipw_HwChannelConfigType;
 
+
 
+#if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON)
 
+typedef struct {
 
+const Flexcan_Ip_PnConfigType * pFlexcanIpPnConfig;
 
+} Can_Ipw_IcomRxMessageConfigsType;
 
+#endif /* (CAN_PUBLIC_ICOM_SUPPORT == STD_ON) */
 
+/*==================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+#endif /*CAN_IPW_TYPES_H */
 
+
 
+/** @} */

+ 158 - 0
RTD/include/Can_Irq.h
Vedi File 

@@ -0,0 +1,158 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/*==================================================================================================
 
+==================================================================================================*/
 
+
 
+#ifndef CAN_IRQ_H
 
+#define CAN_IRQ_H
 
+
 
+/**
 
+*   @file    Can_Irq.h
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Can - module interface.
 
+*   @details API header for CAN driver.
 
+*
 
+*   @addtogroup CAN_DRIVER
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*
 
+* @page misra_violations MISRA-C:2012 violations
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.1, External identifiers shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.2, Identifiers declared in the same scope and name space shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.4, Macro identifiers shall be distinct.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section [global]
 
+* Violates MISRA 2012 Required Rule 5.5, Identifiers shall be distinct from macro names.
 
+* The used compilers use more than 31 chars for identifiers.
 
+*
 
+* @section Can_Irq_h_REF_1
 
+* Violates MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents
 
+* of a header file being included more than once.
 
+* This violation is not fixed since the inclusion of <MA>_MemMap.h is as per AUTOSAR requirement [SWS_MemMap_00003].
 
+**
 
+* @section Can_Irq_h_REF_2
 
+* Violates MISRA 2012 Advisory Rule 20.1, #include directives should only be preceded by preprocessor
 
+* directives or comments.
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Can_Ipw_Cfg.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CAN_IRQ_VENDOR_ID                   43
 
+#define CAN_IRQ_AR_RELEASE_MAJOR_VERSION    4
 
+#define CAN_IRQ_AR_RELEASE_MINOR_VERSION    4
 
+#define CAN_IRQ_AR_RELEASE_REVISION_VERSION 0
 
+#define CAN_IRQ_SW_MAJOR_VERSION            1
 
+#define CAN_IRQ_SW_MINOR_VERSION            0
 
+#define CAN_IRQ_SW_PATCH_VERSION            0
 
+
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and Can_Ipw_Cfg.h header file are of the same vendor */
 
+#if (CAN_IRQ_VENDOR_ID != CAN_IPW_CFG_VENDOR_ID)
 
+    #error "Can_Irq.h and Can_Ipw_Cfg.h have different vendor ids"
 
+#endif
 
+/* Check if current file and Can_Ipw_Cfg.h file are of the same Autosar version */
 
+#if ((CAN_IRQ_AR_RELEASE_MAJOR_VERSION    != CAN_IPW_CFG_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CAN_IRQ_AR_RELEASE_MINOR_VERSION    != CAN_IPW_CFG_AR_RELEASE_MINOR_VERSION) || \
 
+     (CAN_IRQ_AR_RELEASE_REVISION_VERSION != CAN_IPW_CFG_AR_RELEASE_REVISION_VERSION))
 
+    #error "AutoSar Version Numbers of Can_Irq.h and Can_Ipw_Cfg.h are different"
 
+#endif
 
+/* Check if current file and Can_Ipw_Cfg header file are of the same Software version */
 
+#if ((CAN_IRQ_SW_MAJOR_VERSION != CAN_IPW_CFG_SW_MAJOR_VERSION) || \
 
+     (CAN_IRQ_SW_MINOR_VERSION != CAN_IPW_CFG_SW_MINOR_VERSION) || \
 
+     (CAN_IRQ_SW_PATCH_VERSION != CAN_IPW_CFG_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Can_Irq.h and Can_Ipw_Cfg.h are different"
 
+#endif
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define CAN_START_SEC_CODE
 
+/* @violates @ref Can_Irq_h_REF_1 MISRA 2012 Required Directive 4.10 */
 
+#include "Can_MemMap.h"
 
+
 
+#if (CAN_MB_INTERRUPT_SUPPORT == STD_ON)
 
+/* Function process Message Buffer Interrupt */
 
+void Can_ProcessMesgBufferCommonInterrupt
 
+(
 
+    uint8 u8CtrlOffset,
 
+    uint8 u8MbIdx,
 
+    Can_MbType mbType
 
+);
 
+#endif /* (CAN_MB_INTERRUPT_SUPPORT == STD_ON) */
 
+
 
+/* Function process Bus Off Interrupt */
 
+void Can_ProcessBusOffInterrupt
 
+(
 
+    uint8 u8CtrlOffset
 
+);
 
+
 
+#if (CAN_ERROR_INTERRUPT_SUPPORT == STD_ON)
 
+/* Function process Error Interrupt */
 
+void Can_ProcessErrorInterrupt
 
+(
 
+    uint8 u8CtrlOffset,
 
+    boolean bIsErrFast
 
+);
 
+#endif /* (CAN_ERROR_INTERRUPT_SUPPORT == STD_ON) */
 
+
 
+#if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON)
 
+void Can_ProcessPNInterrupt(uint8 u8CtrlOffset);
 
+#endif /* (CAN_PUBLIC_ICOM_SUPPORT == STD_OFF) */
 
+
 
+#define CAN_STOP_SEC_CODE
 
+/* @violates @ref Can_Irq_h_REF_1 MISRA 2012 Required Directive 4.10 */
 
+/* @violates @ref Can_Irq_h_REF_2 MISRA 2012 Advisory Rule 20.1 */
 
+#include "Can_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* CAN_IRQ_H */

+ 298 - 0
RTD/include/Clock_Ip.h
Vedi File 

@@ -0,0 +1,298 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/**
 
+*   @file    Clock_Ip.h
 
+*   @version    1.0.0
 
+*
 
+*   @brief   CLOCK IP driver header file.
 
+*   @details CLOCK IP driver header file.
 
+*
 
+*   @addtogroup CLOCK_DRIVER Clock Ip Driver
 
+*   @{
 
+*/
 
+
 
+
 
+#ifndef CLOCK_IP_H
 
+#define CLOCK_IP_H
 
+
 
+
 
+#include "Clock_Ip_Types.h"
 
+#include "Clock_Ip_Cfg.h"
 
+
 
+
 
+#if defined(__cplusplus)
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CLOCK_IP_VENDOR_ID                       43
 
+#define CLOCK_IP_AR_RELEASE_MAJOR_VERSION        4
 
+#define CLOCK_IP_AR_RELEASE_MINOR_VERSION        4
 
+#define CLOCK_IP_AR_RELEASE_REVISION_VERSION     0
 
+#define CLOCK_IP_SW_MAJOR_VERSION                1
 
+#define CLOCK_IP_SW_MINOR_VERSION                0
 
+#define CLOCK_IP_SW_PATCH_VERSION                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if Clock_Ip.h file and Clock_Ip_Types.h file have same versions */
 
+#if (CLOCK_IP_VENDOR_ID  != CLOCK_IP_TYPES_VENDOR_ID)
 
+    #error "Clock_Ip.h and Clock_Ip_Types.h have different vendor IDs"
 
+#endif
 
+
 
+/* Check if Clock_Ip.h file and Clock_Ip_Types.h file are of the same Autosar version */
 
+#if ((CLOCK_IP_AR_RELEASE_MAJOR_VERSION    != CLOCK_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CLOCK_IP_AR_RELEASE_MINOR_VERSION    != CLOCK_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
 
+     (CLOCK_IP_AR_RELEASE_REVISION_VERSION != CLOCK_IP_TYPES_AR_RELEASE_REVISION_VERSION))
 
+    #error "AutoSar Version Numbers of Clock_Ip.h and Clock_Ip_Types.h are different"
 
+#endif
 
+
 
+/* Check if Clock_Ip.h file and Clock_Ip_Types.h file are of the same Software version */
 
+#if ((CLOCK_IP_SW_MAJOR_VERSION != CLOCK_IP_TYPES_SW_MAJOR_VERSION) || \
 
+     (CLOCK_IP_SW_MINOR_VERSION != CLOCK_IP_TYPES_SW_MINOR_VERSION) || \
 
+     (CLOCK_IP_SW_PATCH_VERSION != CLOCK_IP_TYPES_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Clock_Ip.h and Clock_Ip_Types.h are different"
 
+#endif
 
+
 
+/* Check if Clock_Ip.h file and Clock_Ip_Cfg.h file have same versions */
 
+#if (CLOCK_IP_VENDOR_ID  != CLOCK_IP_CFG_VENDOR_ID)
 
+    #error "Clock_Ip.h and Clock_Ip_Cfg.h have different vendor IDs"
 
+#endif
 
+
 
+/* Check if Clock_Ip.h file and Clock_Ip_Cfg.h file are of the same Autosar version */
 
+#if ((CLOCK_IP_AR_RELEASE_MAJOR_VERSION    != CLOCK_IP_CFG_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CLOCK_IP_AR_RELEASE_MINOR_VERSION    != CLOCK_IP_CFG_AR_RELEASE_MINOR_VERSION) || \
 
+     (CLOCK_IP_AR_RELEASE_REVISION_VERSION != CLOCK_IP_CFG_AR_RELEASE_REVISION_VERSION))
 
+    #error "AutoSar Version Numbers of Clock_Ip.h and Clock_Ip_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if Clock_Ip.h file and Clock_Ip_Cfg.h file are of the same Software version */
 
+#if ((CLOCK_IP_SW_MAJOR_VERSION != CLOCK_IP_CFG_SW_MAJOR_VERSION) || \
 
+     (CLOCK_IP_SW_MINOR_VERSION != CLOCK_IP_CFG_SW_MINOR_VERSION) || \
 
+     (CLOCK_IP_SW_PATCH_VERSION != CLOCK_IP_CFG_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Clock_Ip.h and Clock_Ip_Cfg.h are different"
 
+#endif
 
+
 
+/*******************************************************************************
 
+ *                    GLOBAL FUNCTION PROTOTYPES
 
+ ******************************************************************************/
 
+
 
+/*******************************************************************************
 
+ * API
 
+ ******************************************************************************/
 
+/* Clock start section code */
 
+#define MCU_START_SEC_CODE
 
+
 
+#include "Mcu_MemMap.h"
 
+
 
+#if (defined(CLOCK_IP_GET_FREQUENCY_API) && (CLOCK_IP_GET_FREQUENCY_API == STD_ON))
 
+ /*!
 
+ * @brief Gets the clock frequency for a specific clock name.
 
+ *
 
+ * This function checks the current clock configurations and then calculates
 
+ * the clock frequency for a specific clock name defined in Clock_Ip_NameType.
 
+ * Clock modules must be properly configured before using this function.
 
+ * See features.h for supported clock names for different chip families.
 
+ * The returned value is in Hertz. If frequency is required for a peripheral and the
 
+ * module is not clocked, then 0 Hz frequency is returned.
 
+ *
 
+ * @param[in] clockName Clock names defined in Clock_Ip_NameType
 
+ * @return frequency    Returned clock frequency value in Hertz
 
+ */
 
+uint32 Clock_Ip_GetClockFrequency(Clock_Ip_NameType clockName);
 
+#endif
 
+
 
+/*!
 
+ * @brief Set clock configuration according to pre-defined structure.
 
+ *
 
+ * This function sets system to target clock configuration; It sets the
 
+ * clock modules registers for clock mode change.
 
+ *
 
+ * @param[in] config  Pointer to configuration structure.
 
+ *
 
+ * @return void
 
+ *
 
+ * @note If external clock is used in the target mode, please make sure it is
 
+ * enabled, for example, if the external oscillator is used, please setup correctly.
 
+ */
 
+Clock_Ip_StatusType Clock_Ip_Init(Clock_Ip_ClockConfigType const * config);
 
+
 
+/*!
 
+ * @brief Set the PLL and other MCU specific clock options.
 
+ *
 
+ * This function initializes the PLL and other MCU specific clock options.
 
+ * The clock configuration parameters are provided via the configuration structure.
 
+ *
 
+ * This function shall start the PLL lock procedure (if PLL
 
+ * shall be initialized) and shall return without waiting until the PLL is locked.
 
+ *
 
+ * @param[in] config  Pointer to configuration structure.
 
+ *
 
+ * @return void
 
+ */
 
+void Clock_Ip_InitClock(Clock_Ip_ClockConfigType const * config);
 
+
 
+/*!
 
+ * @brief Returns the lock status of the PLL.
 
+ *
 
+ * This function returns status of the PLL: undefined, unlocked or locked.
 
+ * This function returns undefined status if this function is called prior
 
+ * to calling of the function Clock_Ip_InitClock
 
+ *
 
+ * @return Status.  Pll lock status
 
+ */
 
+Clock_Ip_PllStatusType Clock_Ip_GetPllStatus(void);
 
+
 
+#if (STD_OFF == CLOCK_IP_NO_PLL)
 
+/*!
 
+ * @brief Activates the PLL in MCU clock distribution.
 
+ *
 
+ * This function activates the PLL clock to
 
+ * the MCU clock distribution.
 
+ *
 
+ * This function removes the current clock source
 
+ * (for example internal oscillator clock) from MCU clock distribution.
 
+ *
 
+ * Application layer calls this function after the status of the PLL has been detected as
 
+ * locked by the function Clock_Ip_GetPllStatus.
 
+ *
 
+ * The function Clock_Ip_DistributePll shall return without affecting
 
+ * the MCU hardware if the PLL clock has been automatically activated by the MCU
 
+ * hardware.
 
+ *
 
+ * @return void
 
+ */
 
+void Clock_Ip_DistributePll(void);
 
+#endif
 
+
 
+/*!
 
+ * @brief Sends notifications regarding power mode transition
 
+ *
 
+ * This function sends notifications regarding power mode transition.
 
+ * It is called by power driver each time power mode is changed.
 
+ *
 
+ *
 
+ * @param[in] powerMode  Power mode.
 
+ * @param[in] powerMode  Power mode notification.
 
+ *
 
+ * @return void
 
+ */
 
+void Clock_Ip_PowerModeChangeNotification(power_modes_t powerMode,power_notification_t notification);
 
+
 
+/*!
 
+ * @brief Install a clock notifications callback
 
+ *
 
+ * This function installs a callback for
 
+ * reporting notifications from clock driver
 
+ *
 
+ *
 
+ * @param[in] Clock_Ip_NotificationsCallbackType  notifications callback
 
+ *
 
+ * @return void
 
+ */
 
+void Clock_Ip_InstallNotificationsCallback(Clock_Ip_NotificationsCallbackType callback);
 
+
 
+/*!
 
+ * @brief Clears status flags for a monitor clock.
 
+ *
 
+ * This function clears status flags for a monitor clock.
 
+ *
 
+ * @param[in] clockName  Clock Name.
 
+ *
 
+ * @return void
 
+ */
 
+void Clock_Ip_ClearClockMonitorStatus(Clock_Ip_NameType clockName);
 
+
 
+/*!
 
+ * @brief Returns the clock monitor status.
 
+ *
 
+ * This function returns status of the clock monitor: undefined, lower, higher, in range.
 
+ * This function returns undefined status if this function is called when corresponding
 
+ * cmu is not enabled.
 
+ *
 
+ * @return Status.  Cmu status
 
+ */
 
+Clock_Ip_CmuStatusType Clock_Ip_GetClockMonitorStatus(Clock_Ip_NameType clockName);
 
+
 
+/*!
 
+ * @brief Disables a clock monitor.
 
+ *
 
+ * This function disables a clock monitor.
 
+ *
 
+ * @param[in] clockName  Clock Name.
 
+ *
 
+ * @return void
 
+ */
 
+void Clock_Ip_DisableClockMonitor(Clock_Ip_NameType clockName);
 
+
 
+/*!
 
+ * @brief Disables clock for a peripheral.
 
+ *
 
+ * This function disables clock for a peripheral.
 
+ *
 
+ * @param[in] clockName  Clock Name.
 
+ *
 
+ * @return void
 
+ */
 
+void Clock_Ip_DisableModuleClock(Clock_Ip_NameType clockName);
 
+
 
+/*!
 
+ * @brief Enables clock for a peripheral.
 
+ *
 
+ * This function enables clock for a peripheral.
 
+ *
 
+ * @param[in] clockName  Clock Name.
 
+ *
 
+ * @return void
 
+ */
 
+void Clock_Ip_EnableModuleClock(Clock_Ip_NameType clockName);
 
+
 
+#if (defined(CLOCK_IP_ENABLE_USER_MODE_SUPPORT))
 
+  #if (STD_ON == CLOCK_IP_ENABLE_USER_MODE_SUPPORT)
 
+    #if !(defined (CLOCK_IP_S32K1))
 
+void Clock_Ip_SetUserAccessAllowed(void);
 
+    #endif
 
+  #endif
 
+#endif
 
+
 
+/* Clock stop section code */
 
+#define MCU_STOP_SEC_CODE
 
+
 
+#include "Mcu_MemMap.h"
 
+
 
+#if defined(__cplusplus)
 
+}
 
+#endif /* __cplusplus*/
 
+
 
+/*! @}*/
 
+
 
+#endif /* CLOCK_IP_H */
 
+/*******************************************************************************
 
+ * EOF
 
+ ******************************************************************************/
 
+

+ 509 - 0
RTD/include/Clock_Ip_Private.h
Vedi File 

@@ -0,0 +1,509 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/**
 
+*   @file    Clock_Ip_Private.h
 
+*   @version    1.0.0
 
+*
 
+*   @brief   CLOCK IP driver private header file.
 
+*   @details CLOCK IP driver private header file.
 
+
 
+*   @addtogroup CLOCK_DRIVER Clock Ip Driver
 
+*   @{
 
+*/
 
+
 
+#if !defined(CLOCK_IP_PRIVATE_H)
 
+#define CLOCK_IP_PRIVATE_H
 
+
 
+#include "Clock_Ip.h"
 
+
 
+#if defined(CLOCK_IP_PLATFORM_S32R45)
 
+    #include "Clock_Ip_Specific1.h"
 
+#else
 
+    #include "Clock_Ip_Specific.h"
 
+#endif
 
+
 
+#ifdef CLOCK_IP_DEV_ERROR_DETECT
 
+#if (STD_ON == CLOCK_IP_DEV_ERROR_DETECT)
 
+    #include "Devassert.h"
 
+#endif /* (STD_ON == CLOCK_IP_DEV_ERROR_DETECT) */
 
+#endif /* #ifdef CLOCK_IP_DEV_ERROR_DETECT */
 
+
 
+/*==================================================================================================
 
+                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+
 
+#define CLOCK_IP_PRIVATE_VENDOR_ID                    43
 
+#define CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION     4
 
+#define CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION     4
 
+#define CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION  0
 
+#define CLOCK_IP_PRIVATE_SW_MAJOR_VERSION             1
 
+#define CLOCK_IP_PRIVATE_SW_MINOR_VERSION             0
 
+#define CLOCK_IP_PRIVATE_SW_PATCH_VERSION             0
 
+
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if Clock_Ip_Private.h file and Clock_Ip.h file are of the same Autosar version */
 
+#if ((CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION    != CLOCK_IP_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION    != CLOCK_IP_AR_RELEASE_MINOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION != CLOCK_IP_AR_RELEASE_REVISION_VERSION))
 
+    #error "AutoSar Version Numbers of Clock_Ip_Private.h and Clock_Ip.h are different"
 
+#endif
 
+
 
+/* Check if Clock_Ip_Private.h file and Clock_Ip.h file have same versions */
 
+#if (CLOCK_IP_PRIVATE_VENDOR_ID  != CLOCK_IP_VENDOR_ID)
 
+    #error "Clock_Ip_Private.h and Clock_Ip.h have different vendor IDs"
 
+#endif
 
+
 
+/* Check if Clock_Ip_Private.h file and Clock_Ip.h file are of the same Software version */
 
+#if ((CLOCK_IP_PRIVATE_SW_MAJOR_VERSION != CLOCK_IP_SW_MAJOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_SW_MINOR_VERSION != CLOCK_IP_SW_MINOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_SW_PATCH_VERSION != CLOCK_IP_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Clock_Ip_Private.h and Clock_Ip.h are different"
 
+#endif
 
+
 
+#if defined(CLOCK_IP_PLATFORM_S32R45)
 
+/* Check if Clock_Ip_Private.h file and Clock_Ip_Specific1.h file are of the same Autosar version */
 
+#if ((CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION    != CLOCK_IP_SPECIFIC1_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION    != CLOCK_IP_SPECIFIC1_AR_RELEASE_MINOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION != CLOCK_IP_SPECIFIC1_AR_RELEASE_REVISION_VERSION))
 
+    #error "AutoSar Version Numbers of Clock_Ip_Private.h and Clock_Ip_Specific1.h are different"
 
+#endif
 
+
 
+/* Check if Clock_Ip_Private.h file and Clock_Ip_Specific1.h file have same versions */
 
+#if (CLOCK_IP_PRIVATE_VENDOR_ID  != CLOCK_IP_SPECIFIC1_VENDOR_ID)
 
+    #error "Clock_Ip_Private.h and Clock_Ip_Specific1.h have different vendor IDs"
 
+#endif
 
+
 
+/* Check if Clock_Ip_Private.h file and Clock_Ip_Specific1.h file are of the same Software version */
 
+#if ((CLOCK_IP_PRIVATE_SW_MAJOR_VERSION != CLOCK_IP_SPECIFIC1_SW_MAJOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_SW_MINOR_VERSION != CLOCK_IP_SPECIFIC1_SW_MINOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_SW_PATCH_VERSION != CLOCK_IP_SPECIFIC1_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Clock_Ip_Private.h and Clock_Ip_Specific1.h are different"
 
+#endif
 
+
 
+#else
 
+/* Check if Clock_Ip_Private.h file and Clock_Ip_Specific.h file are of the same Autosar version */
 
+#if ((CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION    != CLOCK_IP_SPECIFIC_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION    != CLOCK_IP_SPECIFIC_AR_RELEASE_MINOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION != CLOCK_IP_SPECIFIC_AR_RELEASE_REVISION_VERSION))
 
+    #error "AutoSar Version Numbers of Clock_Ip_Private.h and Clock_Ip_Specific.h are different"
 
+#endif
 
+
 
+/* Check if Clock_Ip_Private.h file and Clock_Ip_Specific.h file have same versions */
 
+#if (CLOCK_IP_PRIVATE_VENDOR_ID  != CLOCK_IP_SPECIFIC_VENDOR_ID)
 
+    #error "Clock_Ip_Private.h and Clock_Ip_Specific.h have different vendor IDs"
 
+#endif
 
+
 
+/* Check if Clock_Ip_Private.h file and Clock_Ip_Specific.h file are of the same Software version */
 
+#if ((CLOCK_IP_PRIVATE_SW_MAJOR_VERSION != CLOCK_IP_SPECIFIC_SW_MAJOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_SW_MINOR_VERSION != CLOCK_IP_SPECIFIC_SW_MINOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_SW_PATCH_VERSION != CLOCK_IP_SPECIFIC_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Clock_Ip_Private.h and Clock_Ip_Specific.h are different"
 
+#endif
 
+
 
+#endif
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+#ifdef CLOCK_IP_DEV_ERROR_DETECT
 
+#if (STD_ON == CLOCK_IP_DEV_ERROR_DETECT)
 
+/* Check if Clock_Ip_Private.h file and Devassert.h file are of the same Autosar version */
 
+#if ((CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION    != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION    != DEVASSERT_AR_RELEASE_MINOR_VERSION))
 
+    #error "AutoSar Version Numbers of Clock_Ip_Private.h and Devassert.h are different"
 
+#endif
 
+#endif /* (STD_ON == CLOCK_IP_DEV_ERROR_DETECT) */
 
+#endif /* #ifdef CLOCK_IP_DEV_ERROR_DETECT */
 
+#endif
 
+
 
+
 
+#if defined(__cplusplus)
 
+extern "C" {
 
+#endif /* __cplusplus*/
 
+
 
+
 
+
 
+/* Total number of clocks */
 
+#define CLOCK_NAMES_NO                    FEATURE_CLOCKS_NO
 
+/* Total number of producer clocks */
 
+#define CLOCK_PRODUCERS_NO                FEATURE_CLOCK_PRODUCERS_NO
 
+
 
+/* Define clock features */
 
+#define CLOCK_MODULE_INSTANCE       0U              /* Instance of the module where clock element is implemented. */
 
+#define CLOCK_CALLBACK              1U              /* Actions to be done for different implementations of a clock element. */
 
+#define EXTENSION_INDEX             2U              /* Specific clock feature extension */
 
+#define POWER_MODE_INDEX            3U              /* Index of power mode for multiplexed clock option */
 
+#define SELECTOR_INDEX              4U              /* Selector index. */
 
+#define DIVIDER_INDEX               5U              /* Divider index. */
 
+#define GATE_INDEX                  6U              /* Gate index */
 
+#define PCFS_INDEX                  7U              /* Pcfs index */
 
+#define CMU_INDEX                   8U              /* Cmu index */
 
+
 
+
 
+
 
+
 
+/* Maximum number of clock features for each clock name */
 
+#define CLOCK_FEATURES_NO           9U
 
+
 
+#if (defined (CLOCK_IP_S32K3))
 
+#define INV_VAL                     255U            /* Invalid value */
 
+#define NO_TRIGGER                  0U              /* No trigger is supported by divider. */
 
+#define TRIGGER                     1U              /* Trigger is supported by divider. */
 
+#define TRIGGER_VALUE               0xFFFFFFFFU     /* Trigger value. */
 
+#endif
 
+
 
+#if (defined(CLOCK_IP_DEV_ERROR_DETECT))
 
+    #if (CLOCK_IP_DEV_ERROR_DETECT == STD_ON)
 
+#define IRCOSC_OBJECT                 (1UL << 0U)
 
+#define XOSC_OBJECT                   (1UL << 1U)
 
+#define PLL_OBJECT                    (1UL << 2U)
 
+#define SELECTOR_OBJECT               (1UL << 3U)
 
+#define DIVIDER_OBJECT                (1UL << 4U)
 
+#define DIVIDER_TRIGGER_OBJECT        (1UL << 5U)
 
+#define FRAC_DIV_OBJECT               (1UL << 6U)
 
+#define EXT_SIG_OBJECT                (1UL << 7U)
 
+#define GATE_OBJECT                   (1UL << 8U)
 
+#define PCFS_OBJECT                   (1UL << 9U)
 
+#define CMU_OBJECT                    (1UL << 10U)
 
+    #endif
 
+#endif /* CLOCK_IP_DEV_ERROR_DETECT */
 
+
 
+#if (defined(CLOCK_IP_DEV_ERROR_DETECT))
 
+  #if (CLOCK_IP_DEV_ERROR_DETECT == STD_ON)
 
+    #define CLOCK_DEV_ASSERT(x)      DevAssert(x)
 
+  #else
 
+    #define CLOCK_DEV_ASSERT(x)
 
+  #endif
 
+#else
 
+    #define CLOCK_DEV_ASSERT(x)
 
+#endif
 
+
 
+/*! @brief Clock ip source type.
 
+ */
 
+typedef enum
 
+{
 
+    /* Generic error codes */
 
+    UKNOWN_TYPE                                    = 0x00U,    /*!< Clock path from source to this clock name has at least one selector. */
 
+    IRCOSC_TYPE                                    = 0x01U,    /*!< Source is an internal oscillator. */
 
+    XOSC_TYPE                                      = 0x02U,    /*!< Source is an external oscillator. */
 
+    PLL_TYPE                                       = 0x03U,    /*!< Source is a pll. */
 
+    EXT_CLK_TYPE                                   = 0x04U,    /*!< Source is an external clock. */
 
+    SERDES_TYPE                                    = 0x04U,    /*!< Source is a SERDES. */
 
+
 
+} clock_name_source_type;
 
+
 
+/*! @brief Clock pll status return codes.
 
+ */
 
+typedef enum
 
+{
 
+    STATUS_PLL_NOT_ENABLED                         = 0x00U,    /*!< Not enabled */
 
+    STATUS_PLL_UNLOCKED                            = 0x01U,    /*!< Unlocked */
 
+    STATUS_PLL_LOCKED                              = 0x02U,    /*!< Locked */
 
+
 
+} clock_pll_status_t;
 
+
 
+/*! @brief Clock dfs status return codes.
 
+ */
 
+typedef enum
 
+{
 
+    STATUS_DFS_NOT_ENABLED                         = 0x00U,    /*!< Not enabled */
 
+    STATUS_DFS_UNLOCKED                            = 0x01U,    /*!< Unlocked */
 
+    STATUS_DFS_LOCKED                              = 0x02U,    /*!< Locked */
 
+
 
+} clock_dfs_status_t;
 
+
 
+typedef void (*intOscSetCallback)(Clock_Ip_IrcoscConfigType const * config);
 
+typedef void (*intOscDisableCallback)(Clock_Ip_NameType IrcoscName);
 
+typedef void (*intOscEnableCallback)(Clock_Ip_IrcoscConfigType const * config);
 
+typedef struct
 
+{
 
+    intOscSetCallback Set;
 
+    intOscEnableCallback Enable;
 
+    intOscDisableCallback Disable;
 
+
 
+}intOscCallback;
 
+
 
+typedef void (*extOscSetCallback)(Clock_Ip_XoscConfigType const * config);
 
+typedef void (*extOscResetCallback)(Clock_Ip_XoscConfigType const * config);
 
+typedef void (*extOscDisableCallback)(Clock_Ip_NameType ExtoscName);
 
+typedef void (*extOscEnableCallback)(Clock_Ip_XoscConfigType const * config);
 
+
 
+typedef struct
 
+{
 
+    extOscResetCallback Reset;
 
+    extOscSetCallback Set;
 
+    extOscSetCallback Complete;
 
+    extOscDisableCallback Disable;
 
+    extOscEnableCallback Enable;
 
+
 
+}extOscCallback;
 
+
 
+
 
+typedef void (*dividerSetCallback)(Clock_Ip_DividerConfigType const * config);
 
+typedef struct
 
+{
 
+    dividerSetCallback Set;
 
+
 
+}dividerCallback;
 
+
 
+typedef void (*dividerConfigureCallback)(Clock_Ip_DividerTriggerConfigType const * config);
 
+typedef void (*dividerTriggerUpdateCallback)(Clock_Ip_DividerTriggerConfigType const * config);
 
+typedef struct
 
+{
 
+    dividerConfigureCallback Configure;
 
+    dividerTriggerUpdateCallback TriggerUpdate;
 
+
 
+}dividerTriggerCallback;
 
+
 
+
 
+typedef void (*fracDivSetCallback)(Clock_Ip_FracDivConfigType const * config);
 
+typedef void (*fracDivResetCallback)(Clock_Ip_FracDivConfigType const * config);
 
+typedef clock_dfs_status_t (*fracDivCompleteCallback)(Clock_Ip_NameType DfsName);
 
+typedef struct
 
+{
 
+    fracDivResetCallback Reset;
 
+    fracDivSetCallback Set;
 
+    fracDivCompleteCallback Complete;
 
+
 
+}fracDivCallback;
 
+
 
+typedef void (*pllSetCallback)(Clock_Ip_PllConfigType const * config);
 
+typedef void (*pllResetCallback)(Clock_Ip_PllConfigType const * config);
 
+typedef clock_pll_status_t (*pllCompleteCallback)(Clock_Ip_NameType PllName);
 
+typedef void (*pllEnableCallback)(Clock_Ip_PllConfigType const * config);
 
+typedef void (*pllDisableCallback)(Clock_Ip_NameType PllName);
 
+typedef struct
 
+{
 
+    pllResetCallback Reset;
 
+    pllSetCallback Set;
 
+    pllCompleteCallback Complete;
 
+    pllEnableCallback Enable;
 
+    pllDisableCallback Disable;
 
+
 
+}pllCallback;
 
+
 
+typedef void (*selectorSetCallback)(Clock_Ip_SelectorConfigType const * config);
 
+typedef void (*selectorResetCallback)(Clock_Ip_SelectorConfigType const * config);
 
+typedef struct
 
+{
 
+    selectorResetCallback Reset;
 
+    selectorSetCallback Set;
 
+
 
+}selectorCallback;
 
+
 
+typedef void (*gateSetCallback)(Clock_Ip_GateConfigType const * config);
 
+typedef void (*gateUpdateCallback)(Clock_Ip_NameType clockName, boolean gate);
 
+typedef struct
 
+{
 
+    gateSetCallback Set;
 
+    gateUpdateCallback Update;
 
+
 
+}gateCallback;
 
+
 
+typedef void (*clockMonitorSetCallback)(Clock_Ip_CmuConfigType const * config);
 
+typedef void (*clockMonitorResetCallback)(Clock_Ip_CmuConfigType const * config);
 
+typedef void (*clockMonitorClearStatusCallback)(Clock_Ip_NameType name);
 
+typedef void (*clockMonitorDisableCallback)(Clock_Ip_NameType name);
 
+typedef Clock_Ip_CmuStatusType (*clockMonitorGetMonitorStatusCallback)(Clock_Ip_NameType name);
 
+typedef void (*clockMonitorEnableCallback)(Clock_Ip_CmuConfigType const * config);
 
+typedef struct
 
+{
 
+    clockMonitorResetCallback Reset;
 
+    clockMonitorSetCallback Set;
 
+    clockMonitorDisableCallback Disable;
 
+    clockMonitorClearStatusCallback Clear;
 
+    clockMonitorGetMonitorStatusCallback GetStatus;
 
+    clockMonitorEnableCallback Enable;
 
+
 
+}clockMonitorCallback;
 
+
 
+
 
+typedef void (*pcfsSetCallback)(Clock_Ip_PcfsConfigType const * config);
 
+typedef struct
 
+{
 
+    pcfsSetCallback Set;
 
+
 
+}pcfsCallback;
 
+
 
+#if (defined (CLOCK_IP_S32K3))
 
+typedef uint32 (*consumerClockCallback)(void);
 
+typedef void (*CalcFreqCallback)(void);
 
+#endif
 
+
 
+/* Clock start constant section data */
 
+#define MCU_START_SEC_CONST_8
 
+#include "Mcu_MemMap.h"
 
+
 
+extern const uint8 xoscCallbackIndex[ALL_CALLBACKS_COUNT];
 
+extern const uint8 dividerCallbackIndex[ALL_CALLBACKS_COUNT];
 
+extern const uint8 dividertriggerCallbackIndex[ALL_CALLBACKS_COUNT];
 
+extern const uint8 fractional_dividerCallbackIndex[ALL_CALLBACKS_COUNT];
 
+extern const uint8 pllCallbackIndex[ALL_CALLBACKS_COUNT];
 
+extern const uint8 selectorCallbackIndex[ALL_CALLBACKS_COUNT];
 
+extern const uint8 ircoscCallbackIndex[ALL_CALLBACKS_COUNT];
 
+extern const uint8 cmuCallbackIndex[ALL_CALLBACKS_COUNT];
 
+extern const uint8 gateCallbackIndex[ALL_CALLBACKS_COUNT];
 
+extern const uint8 pcfsCallbackIndex[ALL_CALLBACKS_COUNT];
 
+extern const uint8 clockFeatures[CLOCK_NAMES_NO][CLOCK_FEATURES_NO];
 
+
 
+/* Clock stop constant section data */
 
+#define MCU_STOP_SEC_CONST_8
 
+#include "Mcu_MemMap.h"
 
+
 
+
 
+
 
+/* Clock start constant section data */
 
+#define MCU_START_SEC_CONST_32
 
+#include "Mcu_MemMap.h"
 
+
 
+#if (defined(CLOCK_IP_DEV_ERROR_DETECT))
 
+    #if (CLOCK_IP_DEV_ERROR_DETECT == STD_ON)
 
+extern const uint32 clockNameTypes[CLOCK_NAMES_NO];
 
+    #endif
 
+#endif
 
+
 
+/* Clock stop constant section data */
 
+#define MCU_STOP_SEC_CONST_32
 
+#include "Mcu_MemMap.h"
 
+
 
+
 
+
 
+
 
+/* Clock start constant section data */
 
+#define MCU_START_SEC_CONST_UNSPECIFIED
 
+
 
+#include "Mcu_MemMap.h"
 
+
 
+extern const extOscCallback extOscCallbacks[XOSC_CALLBACKS_COUNT];
 
+
 
+extern const dividerCallback dividerCallbacks[DIVIDER_CALLBACKS_COUNT];
 
+
 
+extern const dividerTriggerCallback dividerTriggerCallbacks[DIVIDERTRIGGER_CALLBACKS_COUNT];
 
+
 
+extern const fracDivCallback fracDivCallbacks[FRACTIONAL_DIVIDER_CALLBACKS_COUNT];
 
+
 
+extern const pllCallback pllCallbacks[PLL_CALLBACKS_COUNT];
 
+
 
+#if (STD_OFF == CLOCK_IP_NO_PLL)
 
+extern const Clock_Ip_NameType HwPllName[NUMBER_OF_HARDWARE_PLL];
 
+#endif
 
+
 
+extern const selectorCallback selectorCallbacks[SELECTOR_CALLBACKS_COUNT];
 
+
 
+extern const intOscCallback intOscCallbacks[IRCOSC_CALLBACKS_COUNT];
 
+
 
+extern const clockMonitorCallback cmuCallbacks[CMU_CALLBACKS_COUNT];
 
+
 
+extern const gateCallback gateCallbacks[GATE_CALLBACKS_COUNT];
 
+
 
+extern const pcfsCallback pcfsCallbacks[PCFS_CALLBACKS_COUNT];
 
+
 
+extern const clock_name_source_type sourceType_clockName[CLOCK_PRODUCERS_NO + 1U];
 
+
 
+/* Clock stop constant section data */
 
+#define MCU_STOP_SEC_CONST_UNSPECIFIED
 
+
 
+#include "Mcu_MemMap.h"
 
+
 
+#define MCU_START_SEC_VAR_CLEARED_UNSPECIFIED
 
+
 
+#include "Mcu_MemMap.h"
 
+
 
+#if CMU_INSTANCES_ARRAY_SIZE > 0U
 
+extern const Clock_Ip_ClockConfigType *clockConfig;
 
+#endif
 
+
 
+#define MCU_STOP_SEC_VAR_CLEARED_UNSPECIFIED
 
+
 
+#include "Mcu_MemMap.h"
 
+
 
+/* Clock start section code */
 
+#define MCU_START_SEC_CODE
 
+
 
+#include "Mcu_MemMap.h"
 
+
 
+
 
+void ClockInitializeObjects(void);
 
+void ClockPowerModeChangeNotification(power_modes_t powerMode, power_notification_t notification);
 
+void ReportClockErrors(Clock_Ip_ClockNotificationType error, Clock_Ip_NameType clockName);
 
+void SpecificPeripheralClockInitialization(Clock_IP_SpecificPeriphConfigType const * config);
 
+void SpecificPlatformInitClock(Clock_Ip_ClockConfigType const * config);
 
+#if (defined(CMU_FC_FCE_REF_CNT_LFREF_HFREF) || defined(CGM_X_PCFS_SDUR_DIVC_DIVE_DIVS) || defined(FEATURE_CLOCK_IP_HAS_RAM_WAIT_STATES))
 
+uint32 GetConfiguredFrequencyValue(Clock_Ip_NameType clockName);
 
+#endif
 
+#if (defined(CLOCK_IP_GET_FREQUENCY_API) && (CLOCK_IP_GET_FREQUENCY_API == STD_ON))
 
+uint32 GetFreq(Clock_Ip_NameType clockName);
 
+void SetExternalOscillatorFrequency(Clock_Ip_NameType extOscName, uint32 frequency);
 
+void SetExternalSignalFrequency(Clock_Ip_NameType signalName, uint32 frequency);
 
+#endif
 
+#if CMU_INSTANCES_ARRAY_SIZE > 0U
 
+uint32 Mcu_CMU_GetInterruptStatus(uint8 u8IndexCmu);
 
+void Mcu_CMU_ClockFailInt(void);
 
+#endif
 
+#ifdef FEATURE_CLOCK_IP_HAS_RAM_WAIT_STATES
 
+    void SetRamWaitStates(void);
 
+#endif
 
+#ifdef FEATURE_CLOCK_IP_HAS_FLASH_WAIT_STATES
 
+    void SetFlashWaitStates(void);
 
+#endif
 
+/*!
 
+ * @brief Initializes a starting reference point for timeout
 
+ *
 
+ * @param[out] startTimeOut    The starting time from which elapsed time is measured
 
+ * @param[out] elapsedTimeOut  The elapsed time to be passed to ClockTimeoutExpired
 
+ * @param[out] timeoutTicksOut The timeout value (in ticks) to be passed to ClockTimeoutExpired
 
+ * @param[in]  timeoutUs       The timeout value (in microseconds)
 
+ */
 
+void ClockStartTimeout(uint32 *startTimeOut,
 
+                       uint32 *elapsedTimeOut,
 
+                       uint32 *timeoutTicksOut,
 
+                       uint32 timeoutUs);
 
+/*!
 
+ * @brief Checks for timeout condition.
 
+ *
 
+ * @param[in,out] startTimeInOut    The starting time from which elapsed time is measured
 
+ * @param[in,out] elapsedTimeInOut  The accumulated elapsed time from the starting time reference
 
+ * @param[in]     TimeoutTicks      The timeout limit (in ticks)
 
+ */
 
+boolean ClockTimeoutExpired(uint32 *startTimeInOut,
 
+                            uint32 *elapsedTimeInOut,
 
+                            uint32 TimeoutTicks);
 
+
 
+/* Clock stop section code */
 
+#define MCU_STOP_SEC_CODE
 
+
 
+#include "Mcu_MemMap.h"
 
+
 
+#if defined(__cplusplus)
 
+}
 
+#endif /* __cplusplus*/
 
+
 
+/*! @}*/
 
+
 
+#endif /* CLOCK_IP_PRIVATE_H */
 
+/*******************************************************************************
 
+ * EOF
 
+ ******************************************************************************/

+ 453 - 0
RTD/include/Clock_Ip_Specific.h
Vedi File 

@@ -0,0 +1,453 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/**
 
+*   @file    Clock_Ip_Specific.h
 
+*   @version    1.0.0
 
+*
 
+*   @brief   CLOCK IP specific header file.
 
+*   @details CLOCK IP specific header file.
 
+
 
+*   @addtogroup CLOCK_DRIVER Clock Ip Driver
 
+*   @{
 
+*/
 
+
 
+#if !defined(SPECIFIC_CLOCK_SPECIFIC_H)
 
+#define SPECIFIC_CLOCK_SPECIFIC_H
 
+
 
+#include "Clock_Ip_Cfg_Defines.h"
 
+
 
+#if defined (CLOCK_IP_S32K148)
 
+#include "S32K148_SIM.h"
 
+#include "S32K148_SCG.h"
 
+#include "S32K148_PCC.h"
 
+#include "S32K148_SMC.h"
 
+#include "S32K148_QUADSPI.h"
 
+
 
+#elif defined (CLOCK_IP_S32K116)
 
+#include "S32K116_SIM.h"
 
+#include "S32K116_SCG.h"
 
+#include "S32K116_PCC.h"
 
+#include "S32K116_SMC.h"
 
+#include "S32K116_CMU.h"
 
+
 
+#elif defined (CLOCK_IP_S32K118)
 
+#include "S32K118_SIM.h"
 
+#include "S32K118_SCG.h"
 
+#include "S32K118_PCC.h"
 
+#include "S32K118_SMC.h"
 
+#include "S32K118_CMU.h"
 
+
 
+#elif defined (CLOCK_IP_S32K142)
 
+#include "S32K142_SIM.h"
 
+#include "S32K142_SCG.h"
 
+#include "S32K142_PCC.h"
 
+#include "S32K142_SMC.h"
 
+
 
+#elif defined (CLOCK_IP_S32K142W)
 
+#include "S32K142W_SIM.h"
 
+#include "S32K142W_SCG.h"
 
+#include "S32K142W_PCC.h"
 
+#include "S32K142W_SMC.h"
 
+
 
+#elif defined (CLOCK_IP_S32K144)
 
+#include "S32K144_SIM.h"
 
+#include "S32K144_SCG.h"
 
+#include "S32K144_PCC.h"
 
+#include "S32K144_SMC.h"
 
+
 
+#elif defined (CLOCK_IP_S32K144W)
 
+#include "S32K144W_SIM.h"
 
+#include "S32K144W_SCG.h"
 
+#include "S32K144W_PCC.h"
 
+#include "S32K144W_SMC.h"
 
+
 
+#elif defined (CLOCK_IP_S32K146)
 
+#include "S32K146_SIM.h"
 
+#include "S32K146_SCG.h"
 
+#include "S32K146_PCC.h"
 
+#include "S32K146_SMC.h"
 
+
 
+#endif
 
+
 
+#include "Mcal.h"
 
+
 
+#if defined(__cplusplus)
 
+extern "C" {
 
+#endif /* __cplusplus*/
 
+/*==================================================================================================
 
+                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CLOCK_IP_SPECIFIC_VENDOR_ID                       43
 
+#define CLOCK_IP_SPECIFIC_AR_RELEASE_MAJOR_VERSION        4
 
+#define CLOCK_IP_SPECIFIC_AR_RELEASE_MINOR_VERSION        4
 
+#define CLOCK_IP_SPECIFIC_AR_RELEASE_REVISION_VERSION     0
 
+#define CLOCK_IP_SPECIFIC_SW_MAJOR_VERSION                1
 
+#define CLOCK_IP_SPECIFIC_SW_MINOR_VERSION                0
 
+#define CLOCK_IP_SPECIFIC_SW_PATCH_VERSION                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if Clock_Ip_Specific.h file and Clock_Ip_Cfg_Defines.h file are of the same vendor */
 
+#if (CLOCK_IP_SPECIFIC_VENDOR_ID != CLOCK_IP_CFG_DEFINES_VENDOR_ID)
 
+    #error "Clock_Ip_Specific.h and Clock_Ip_Cfg_Defines.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if Clock_Ip_Specific.h file and Clock_Ip_Cfg_Defines.h file are of the same Autosar version */
 
+#if ((CLOCK_IP_SPECIFIC_AR_RELEASE_MAJOR_VERSION != CLOCK_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CLOCK_IP_SPECIFIC_AR_RELEASE_MINOR_VERSION != CLOCK_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \
 
+     (CLOCK_IP_SPECIFIC_AR_RELEASE_REVISION_VERSION != CLOCK_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION) \
 
+    )
 
+    #error "AutoSar Version Numbers of Clock_Ip_Specific.h and Clock_Ip_Cfg_Defines.h are different"
 
+#endif
 
+
 
+/* Check if Clock_Ip_Specific.h file and Clock_Ip_Cfg_Defines.h file are of the same Software version */
 
+#if ((CLOCK_IP_SPECIFIC_SW_MAJOR_VERSION != CLOCK_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \
 
+     (CLOCK_IP_SPECIFIC_SW_MINOR_VERSION != CLOCK_IP_CFG_DEFINES_SW_MINOR_VERSION) || \
 
+     (CLOCK_IP_SPECIFIC_SW_PATCH_VERSION != CLOCK_IP_CFG_DEFINES_SW_PATCH_VERSION) \
 
+    )
 
+    #error "Software Version Numbers of Clock_Ip_Specific.h and Clock_Ip_Cfg_Defines.h are different"
 
+#endif
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+/* Check if Clock_Ip_Specific.h file and Mcal.h file are of the same Autosar version */
 
+#if ((CLOCK_IP_SPECIFIC_AR_RELEASE_MAJOR_VERSION    != MCAL_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CLOCK_IP_SPECIFIC_AR_RELEASE_MINOR_VERSION    != MCAL_AR_RELEASE_MINOR_VERSION))
 
+    #error "AutoSar Version Numbers of Clock_Ip_Specific.h and Mcal.h are different"
 
+#endif
 
+#endif
 
+
 
+#if (defined (CLOCK_IP_S32K118) || defined(CLOCK_IP_S32K116))
 
+
 
+    #define DIVIDER_CALLBACKS_COUNT                                               11U
 
+    #define SCG_ASYNC_DIV1                                                        1U
 
+    #define SCG_ASYNC_DIV2                                                        2U
 
+    #define SCG_DIVCORE_RUN                                                       3U
 
+    #define SCG_DIVBUS_RUN                                                        4U
 
+    #define SCG_DIVSLOW_RUN                                                       5U
 
+    #define SCG_DIVCORE_VLPR                                                      6U
 
+    #define SCG_DIVBUS_VLPR                                                       7U
 
+    #define SCG_DIVSLOW_VLPR                                                      8U
 
+    #define SIM_CLKOUT_DIV                                                        9U
 
+    #define PCC_PCD_FRAC                                                          10U
 
+
 
+    #define DIVIDERTRIGGER_CALLBACKS_COUNT                                        1U
 
+
 
+    #define XOSC_CALLBACKS_COUNT                                                  2U
 
+    #define SOSC_ENABLE                                                           1U
 
+
 
+    #define IRCOSC_CALLBACKS_COUNT                                                5U
 
+    #define SIRC_ENABLE                                                           1U
 
+    #define SIRC_VLP_ENABLE                                                       2U
 
+    #define SIRC_STOP_ENABLE                                                      3U
 
+    #define FIRC_ENABLE                                                           4U
 
+
 
+    #define GATE_CALLBACKS_COUNT                                                  6U
 
+    #define PCC_CGC_ENABLE                                                        1U
 
+    #define SIM_CLKOUT_ENABLE                                                     2U
 
+    #define SIM_LPO32K_ENABLE                                                     3U
 
+    #define SIM_LPO1K_ENABLE                                                      4U
 
+    #define SIM_PLATCGC_CGC                                                       5U
 
+
 
+    #define FRACTIONAL_DIVIDER_CALLBACKS_COUNT                                    1U
 
+
 
+    #define PLL_CALLBACKS_COUNT                                                   1U
 
+
 
+    #define SELECTOR_CALLBACKS_COUNT                                              9U
 
+    #define SCG_SCS_RUN_SEL                                                       1U
 
+    #define SCG_SCS_VLPR_SEL                                                      2U
 
+    #define SIM_RTC_SEL                                                           3U
 
+    #define SIM_LPO_SEL                                                           4U
 
+    #define SCG_CLKOUT_SEL                                                        5U
 
+    #define SIM_FTMOPT_SEL                                                        6U
 
+    #define SIM_CLKOUT_SEL                                                        7U
 
+    #define PCC_PCS_SELECT                                                        8U
 
+
 
+    #define PCFS_CALLBACKS_COUNT                                                  1U
 
+
 
+    #define CMU_CALLBACKS_COUNT                                                   2U
 
+    #define CMU_FC_FCE_REF_CNT_LFREF_HFREF                                        1U
 
+
 
+    #define ALL_CALLBACKS_COUNT                                                   11U
 
+
 
+#elif (defined (CLOCK_IP_S32K142W) || defined(CLOCK_IP_S32K144W))
 
+
 
+    #define DIVIDER_CALLBACKS_COUNT                                               12U
 
+    #define SCG_ASYNC_DIV1                                                        1U
 
+    #define SCG_ASYNC_DIV2                                                        2U
 
+    #define SCG_DIVCORE_RUN                                                       3U
 
+    #define SCG_DIVBUS_RUN                                                        4U
 
+    #define SCG_DIVSLOW_RUN                                                       5U
 
+    #define SCG_DIVCORE_VLPR                                                      6U
 
+    #define SCG_DIVBUS_VLPR                                                       7U
 
+    #define SCG_DIVSLOW_VLPR                                                      8U
 
+    #define SIM_CLKOUT_DIV                                                        9U
 
+    #define PCC_PCD_FRAC                                                          10U
 
+    #define SIM_TRACE_DIV_MUL                                                     11U
 
+
 
+    #define DIVIDERTRIGGER_CALLBACKS_COUNT                                        1U
 
+
 
+    #define XOSC_CALLBACKS_COUNT                                                  2U
 
+    #define SOSC_ENABLE                                                           1U
 
+
 
+    #define IRCOSC_CALLBACKS_COUNT                                                5U
 
+    #define SIRC_ENABLE                                                           1U
 
+    #define SIRC_VLP_ENABLE                                                       2U
 
+    #define SIRC_STOP_ENABLE                                                      3U
 
+    #define FIRC_ENABLE                                                           4U
 
+
 
+    #define GATE_CALLBACKS_COUNT                                                  7U
 
+    #define PCC_CGC_ENABLE                                                        1U
 
+    #define SIM_CLKOUT_ENABLE                                                     2U
 
+    #define SIM_LPO32K_ENABLE                                                     3U
 
+    #define SIM_LPO1K_ENABLE                                                      4U
 
+    #define SIM_PLATCGC_CGC                                                       5U
 
+    #define SIM_TRACE_ENABLE                                                      6U
 
+
 
+    #define FRACTIONAL_DIVIDER_CALLBACKS_COUNT                                    1U
 
+
 
+    #define PLL_CALLBACKS_COUNT                                                   2U
 
+    #define SPLL_ENABLE                                                           1U
 
+
 
+    #define SELECTOR_CALLBACKS_COUNT                                              10U
 
+    #define SCG_SCS_RUN_SEL                                                       1U
 
+    #define SCG_SCS_VLPR_SEL                                                      2U
 
+    #define SIM_RTC_SEL                                                           3U
 
+    #define SIM_LPO_SEL                                                           4U
 
+    #define SCG_CLKOUT_SEL                                                        5U
 
+    #define SIM_FTMOPT_SEL                                                        6U
 
+    #define SIM_CLKOUT_SEL                                                        7U
 
+    #define PCC_PCS_SELECT                                                        8U
 
+    #define SIM_TRACE_SEL                                                         9U
 
+
 
+    #define PCFS_CALLBACKS_COUNT                                                  1U
 
+
 
+    #define CMU_CALLBACKS_COUNT                                                   1U
 
+
 
+    #define ALL_CALLBACKS_COUNT                                                   12U
 
+
 
+#elif (defined (CLOCK_IP_S32K142) || defined(CLOCK_IP_S32K144) || defined(CLOCK_IP_S32K146) || defined(CLOCK_IP_S32K148))
 
+
 
+    #define DIVIDER_CALLBACKS_COUNT                                               15U
 
+    #define SCG_ASYNC_DIV1                                                        1U
 
+    #define SCG_ASYNC_DIV2                                                        2U
 
+    #define SCG_DIVCORE_RUN                                                       3U
 
+    #define SCG_DIVBUS_RUN                                                        4U
 
+    #define SCG_DIVSLOW_RUN                                                       5U
 
+    #define SCG_DIVCORE_VLPR                                                      6U
 
+    #define SCG_DIVBUS_VLPR                                                       7U
 
+    #define SCG_DIVSLOW_VLPR                                                      8U
 
+    #define SCG_DIVCORE_HSRUN                                                     9U
 
+    #define SCG_DIVBUS_HSRUN                                                      10U
 
+    #define SCG_DIVSLOW_HSRUN                                                     11U
 
+    #define SIM_CLKOUT_DIV                                                        12U
 
+    #define PCC_PCD_FRAC                                                          13U
 
+    #define SIM_TRACE_DIV_MUL                                                     14U
 
+    
+    #define DIVIDERTRIGGER_CALLBACKS_COUNT                                        1U
 
+    
+    #define XOSC_CALLBACKS_COUNT                                                  2U
 
+    #define SOSC_ENABLE                                                           1U
 
+
 
+    #define IRCOSC_CALLBACKS_COUNT                                                5U
 
+    #define SIRC_ENABLE                                                           1U
 
+    #define SIRC_VLP_ENABLE                                                       2U
 
+    #define SIRC_STOP_ENABLE                                                      3U
 
+    #define FIRC_ENABLE                                                           4U
 
+
 
+    #define GATE_CALLBACKS_COUNT                                                  7U
 
+    #define PCC_CGC_ENABLE                                                        1U
 
+    #define SIM_CLKOUT_ENABLE                                                     2U
 
+    #define SIM_LPO32K_ENABLE                                                     3U
 
+    #define SIM_LPO1K_ENABLE                                                      4U
 
+    #define SIM_PLATCGC_CGC                                                       5U
 
+    #define SIM_TRACE_ENABLE                                                      6U
 
+    
+    #define FRACTIONAL_DIVIDER_CALLBACKS_COUNT                                    1U
 
+    
+    #define PLL_CALLBACKS_COUNT                                                   2U
 
+    #define SPLL_ENABLE                                                           1U
 
+    
+    #define SELECTOR_CALLBACKS_COUNT                                              11U
 
+    #define SCG_SCS_RUN_SEL                                                       1U
 
+    #define SCG_SCS_VLPR_SEL                                                      2U
 
+    #define SCG_SCS_HSRUN_SEL                                                     3U
 
+    #define SIM_RTC_SEL                                                           4U
 
+    #define SIM_LPO_SEL                                                           5U
 
+    #define SCG_CLKOUT_SEL                                                        6U
 
+    #define SIM_FTMOPT_SEL                                                        7U
 
+    #define SIM_CLKOUT_SEL                                                        8U
 
+    #define PCC_PCS_SELECT                                                        9U
 
+    #define SIM_TRACE_SEL                                                         10U
 
+    
+    #define PCFS_CALLBACKS_COUNT                                                  1U
 
+    
+    #define CMU_CALLBACKS_COUNT                                                   1U
 
+    
+    #define ALL_CALLBACKS_COUNT                                                   15U
 
+
 
+#endif
 
+
 
+/* The source of HCLK is CORE_CLK. */
 
+#define HCLK        CORE_CLK
 
+
 
+typedef struct {
 
+
 
+    uint32  ASYNC_DIV;    /* Peripheral asynchronous clock register */
 
+
 
+}scgPeriphAsyncDiv_Type;
 
+
 
+#if (defined(CLOCK_IP_S32K116) || defined(CLOCK_IP_S32K118))
 
+#define PERIPH_ASYNC_COUNT          3U
 
+#else
 
+#define PERIPH_ASYNC_COUNT             4U
 
+#endif
 
+
 
+#if defined(FEATURE_CLOCK_IP_HAS_FIRC_MON1_CLK) || defined(FEATURE_CLOCK_IP_HAS_FIRC_MON2_CLK)
 
+/** CMU - Register Layout Typedef */
 
+typedef struct {
 
+  uint32 GCR;                               /**< Global Configuration Register, offset: 0x0 */
 
+  uint32 RCCR;                              /**< Reference Count Configuration Register, offset: 0x4 */
 
+  uint32 HTCR;                              /**< High Threshold Configuration Register, offset: 0x8 */
 
+  uint32 LTCR;                              /**< Low Threshold Configuration Register, offset: 0xC */
 
+  uint32 SR;                                /**< Status Register, offset: 0x10 */
 
+  uint32 IER;                               /**< Interrupt Enable Register, offset: 0x14 */
 
+
 
+} ClockMonitor_Type;
 
+
 
+typedef struct{
 
+
 
+    Clock_Ip_NameType name;       /* Name of the clock that can be monitored/supports cmu (clock monitor) */
 
+    Clock_Ip_NameType reference;  /* Name of the reference clock */
 
+    Clock_Ip_NameType bus;        /* Name of the bus clock */
 
+
 
+    volatile ClockMonitor_Type* cmuInstance;
 
+
 
+}cmuInfoType;
 
+#endif
 
+
 
+#if (defined(CLOCK_IP_S32K116) || defined(CLOCK_IP_S32K118))
 
+#define NUMBER_OF_HARDWARE_PLL      0U
 
+#define CMU_INSTANCES_ARRAY_SIZE    2U
 
+#define CMU_INFO_SIZE               2U
 
+#else
 
+#define NUMBER_OF_HARDWARE_PLL      1U
 
+#define CMU_INSTANCES_ARRAY_SIZE    0U
 
+#define CMU_INFO_SIZE               0U
 
+#endif
 
+
 
+#ifdef CMU_GCR_FCE_MASK
 
+    #define CMU_FC_GCR_FCE_MASK CMU_GCR_FCE_MASK
 
+#endif
 
+#ifdef CMU_GCR_FCE_SHIFT
 
+    #define CMU_FC_GCR_FCE_SHIFT CMU_GCR_FCE_SHIFT
 
+#endif
 
+#ifdef CMU_IER_FHHAIE_MASK
 
+    #define CMU_FC_IER_FHHAIE_MASK CMU_IER_FHHAIE_MASK
 
+#endif
 
+#ifdef CMU_IER_FHHIE_MASK
 
+    #define CMU_FC_IER_FHHIE_MASK CMU_IER_FHHIE_MASK
 
+#endif
 
+#ifdef CMU_IER_FLLAIE_MASK
 
+    #define CMU_FC_IER_FLLAIE_MASK CMU_IER_FLLAIE_MASK
 
+#endif
 
+#ifdef CMU_IER_FLLIE_MASK
 
+    #define CMU_FC_IER_FLLIE_MASK CMU_IER_FLLIE_MASK
 
+#endif
 
+#ifdef CMU_SR_FHH_MASK
 
+    #define CMU_FC_SR_FHH_MASK CMU_SR_FHH_MASK
 
+#endif
 
+#ifdef CMU_SR_FLL_MASK
 
+    #define CMU_FC_SR_FLL_MASK CMU_SR_FLL_MASK
 
+#endif
 
+#ifdef CMU_SR_RS_MASK
 
+    #define CMU_FC_SR_RS_MASK CMU_SR_RS_MASK
 
+#endif
 
+
 
+#ifdef CMU_FC_FCE_REF_CNT_LFREF_HFREF
 
+#define CMU_FREQUENCY_CHECK_ENABLED          CMU_FC_GCR_FCE_MASK
 
+#define CMU_FREQUENCY_CHECK_STOPPED          0U
 
+#define CMU_ISR_MASK                         3U
 
+#define CMU_RESET_COUNTER_VALUE              0U
 
+#define CMU_RESET_LOW_LIMIT                  3U
 
+#define CMU_RESET_HIGH_LIMIT                 0x00FFFFFCU
 
+#endif
 
+
 
+/* Clock start constant section data */
 
+#define MCU_START_SEC_CONST_UNSPECIFIED
 
+#include "Mcu_MemMap.h"
 
+
 
+extern volatile  scgPeriphAsyncDiv_Type* const scgPeriphAsyncDivs[PERIPH_ASYNC_COUNT];
 
+#if CMU_INSTANCES_ARRAY_SIZE > 0U
 
+extern volatile ClockMonitor_Type * const cmu[CMU_INSTANCES_ARRAY_SIZE];
 
+extern Clock_Ip_NameType const cmuNames[CMU_INSTANCES_ARRAY_SIZE];
 
+#endif
 
+
 
+#if CMU_INFO_SIZE > 0U
 
+extern const cmuInfoType cmuInfo[CMU_INFO_SIZE];
 
+#endif
 
+/* Clock stop constant section data */
 
+#define MCU_STOP_SEC_CONST_UNSPECIFIED
 
+#include "Mcu_MemMap.h"
 
+
 
+/* Clock start constant section data */
 
+#define MCU_START_SEC_CONST_16
 
+#include "Mcu_MemMap.h"
 
+
 
+extern const uint8 selectorEntry_hardwareValue[FEATURE_CLOCKS_NO];
 
+extern const uint8 selectorEntrySCS_hardwareValue[FEATURE_CLOCK_PRODUCERS_NO + 1U];
 
+extern const uint8 selectorEntryPCS_hardwareValue[FEATURE_CLOCK_PRODUCERS_NO + 1U];
 
+extern const uint8 dividerValue_hardwareValue[65U];
 
+
 
+/* Clock stop constant section data */
 
+#define MCU_STOP_SEC_CONST_16
 
+#include "Mcu_MemMap.h"
 
+
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+/* Clock start section code */
 
+#define MCU_START_SEC_CODE
 
+
 
+#include "Mcu_MemMap.h"
 
+
 
+void DisableSafeClock(Clock_Ip_ClockConfigType const * config);
 
+
 
+/* Clock stop section code */
 
+#define MCU_STOP_SEC_CODE
 
+
 
+#include "Mcu_MemMap.h"
 
+#if defined(__cplusplus)
 
+}
 
+#endif /* __cplusplus*/
 
+
 
+
 
+/*! @}*/
 
+
 
+#endif /* SPECIFIC_CLOCK_SPECIFIC_H */
 
+/*******************************************************************************
 
+ * EOF
 
+ ******************************************************************************/

+ 2502 - 0
RTD/include/Clock_Ip_Types.h
Vedi File 

@@ -0,0 +1,2502 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/**
 
+*   @file    Clock_Ip_Types.h
 
+*   @version    1.0.0
 
+*
 
+*   @brief   CLOCK IP type header file.
 
+*   @details CLOCK IP type header file.
 
+
 
+*   @addtogroup CLOCK_DRIVER Clock Ip Driver
 
+*   @{
 
+*/
 
+
 
+#ifndef CLOCK_IP_TYPES_H
 
+#define CLOCK_IP_TYPES_H
 
+
 
+
 
+
 
+#include "StandardTypes.h"
 
+#include "Clock_Ip_Cfg_Defines.h"
 
+
 
+/*==================================================================================================
 
+                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define CLOCK_IP_TYPES_VENDOR_ID                       43
 
+#define CLOCK_IP_TYPES_AR_RELEASE_MAJOR_VERSION        4
 
+#define CLOCK_IP_TYPES_AR_RELEASE_MINOR_VERSION        4
 
+#define CLOCK_IP_TYPES_AR_RELEASE_REVISION_VERSION     0
 
+#define CLOCK_IP_TYPES_SW_MAJOR_VERSION                1
 
+#define CLOCK_IP_TYPES_SW_MINOR_VERSION                0
 
+#define CLOCK_IP_TYPES_SW_PATCH_VERSION                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+/* Check if Clock_Ip_Types.h file and StandardTypes.h file are of the same Autosar version */
 
+#if ((CLOCK_IP_TYPES_AR_RELEASE_MAJOR_VERSION    != STD_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CLOCK_IP_TYPES_AR_RELEASE_MINOR_VERSION    != STD_AR_RELEASE_MINOR_VERSION))
 
+    #error "AutoSar Version Numbers of Clock_Ip_Types.h and StandardTypes.h are different"
 
+#endif
 
+#endif
 
+
 
+/* Check if Clock_Ip_Types.h file and Clock_Ip_Cfg_Defines.h file have same versions */
 
+#if (CLOCK_IP_TYPES_VENDOR_ID  != CLOCK_IP_CFG_DEFINES_VENDOR_ID)
 
+    #error "Clock_Ip_Types.h and Clock_Ip_Cfg_Defines.h have different vendor IDs"
 
+#endif
 
+
 
+/* Check if Clock_Ip_Types.h file and Clock_Ip_Cfg_Defines.h file are of the same Autosar version */
 
+#if ((CLOCK_IP_TYPES_AR_RELEASE_MAJOR_VERSION    != CLOCK_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (CLOCK_IP_TYPES_AR_RELEASE_MINOR_VERSION    != CLOCK_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \
 
+     (CLOCK_IP_TYPES_AR_RELEASE_REVISION_VERSION != CLOCK_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION))
 
+    #error "AutoSar Version Numbers of Clock_Ip_Types.h and Clock_Ip_Cfg_Defines.h are different"
 
+#endif
 
+
 
+/* Check if Clock_Ip_Types.h file and Clock_Ip_Cfg_Defines.h file are of the same Software version */
 
+#if ((CLOCK_IP_TYPES_SW_MAJOR_VERSION != CLOCK_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \
 
+     (CLOCK_IP_TYPES_SW_MINOR_VERSION != CLOCK_IP_CFG_DEFINES_SW_MINOR_VERSION) || \
 
+     (CLOCK_IP_TYPES_SW_PATCH_VERSION != CLOCK_IP_CFG_DEFINES_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Clock_Ip_Types.h and Clock_Ip_Cfg_Defines.h are different"
 
+#endif
 
+/*==================================================================================================
 
+                                             DEFINES
 
+==================================================================================================*/
 
+
 
+/* Number of internal oscillators */
 
+#if FEATURE_CLOCK_IRCOSCS_COUNT > 0U
 
+    #define CLOCK_IRCOSCS_NO                  FEATURE_CLOCK_IRCOSCS_COUNT
 
+#else
 
+    #define CLOCK_IRCOSCS_NO                  1U
 
+#endif
 
+
 
+/* Number of external oscillators */
 
+#if FEATURE_CLOCK_XOSCS_COUNT > 0U
 
+    #define CLOCK_XOSCS_NO                  FEATURE_CLOCK_XOSCS_COUNT
 
+#else
 
+    #define CLOCK_XOSCS_NO                  1U
 
+#endif
 
+
 
+/* Number of pllS */
 
+#if FEATURE_CLOCK_PLLS_COUNT > 0U
 
+    #define CLOCK_PLLS_NO                  FEATURE_CLOCK_PLLS_COUNT
 
+#else
 
+    #define CLOCK_PLLS_NO                  1U
 
+#endif
 
+
 
+/* Number of selectors */
 
+#if FEATURE_CLOCK_SELECTORS_COUNT > 0U
 
+    #define CLOCK_SELECTORS_NO                  FEATURE_CLOCK_SELECTORS_COUNT
 
+#else
 
+    #define CLOCK_SELECTORS_NO                  1U
 
+#endif
 
+
 
+/* Number of dividers */
 
+#if FEATURE_CLOCK_DIVIDERS_COUNT > 0U
 
+    #define CLOCK_DIVIDERS_NO                  FEATURE_CLOCK_DIVIDERS_COUNT
 
+#else
 
+    #define CLOCK_DIVIDERS_NO                  1U
 
+#endif
 
+
 
+/* Number of dividers */
 
+#if FEATURE_CLOCK_DIVIDER_TRIGGERS_COUNT > 0U
 
+    #define CLOCK_DIVIDER_TRIGGERS_NO                  FEATURE_CLOCK_DIVIDER_TRIGGERS_COUNT
 
+#else
 
+    #define CLOCK_DIVIDER_TRIGGERS_NO          1U
 
+#endif
 
+
 
+/* Number of fractional dividers */
 
+#if FEATURE_CLOCK_FRACTIONAL_DIVIDERS_COUNT > 0U
 
+    #define CLOCK_FRACTIONAL_DIVIDERS_NO                  FEATURE_CLOCK_FRACTIONAL_DIVIDERS_COUNT
 
+#else
 
+    #define CLOCK_FRACTIONAL_DIVIDERS_NO                  1U
 
+#endif
 
+
 
+/* Number of external clocks */
 
+#if FEATURE_CLOCK_EXT_CLKS_COUNT > 0U
 
+    #define CLOCK_EXT_CLKS_NO                  FEATURE_CLOCK_EXT_CLKS_COUNT
 
+#else
 
+    #define CLOCK_EXT_CLKS_NO                  1U
 
+#endif
 
+
 
+/* Number of external clocks */
 
+#if FEATURE_CLOCK_GATES_COUNT > 0U
 
+    #define CLOCK_GATES_NO                  FEATURE_CLOCK_GATES_COUNT
 
+#else
 
+    #define CLOCK_GATES_NO                  1U
 
+#endif
 
+
 
+/* Number of progressive frequemcy clock switching */
 
+#if FEATURE_CLOCK_PCFS_COUNT > 0U
 
+    #define CLOCK_PCFS_NO                  FEATURE_CLOCK_PCFS_COUNT
 
+#else
 
+    #define CLOCK_PCFS_NO                  1U
 
+#endif
 
+
 
+/* Number of external clocks */
 
+#if FEATURE_CLOCK_CMUS_COUNT > 0U
 
+    #define CLOCK_CMUS_NO                  FEATURE_CLOCK_CMUS_COUNT
 
+#else
 
+    #define CLOCK_CMUS_NO                  1U
 
+#endif
 
+
 
+/* Number of configured frequencies values */
 
+#if FEATURE_CLOCK_CONFIGURED_FREQUENCIES_COUNT > 0U
 
+    #define CLOCK_CONFIGURED_FREQUENCIES_NO     FEATURE_CLOCK_CONFIGURED_FREQUENCIES_COUNT
 
+#else
 
+    #define CLOCK_CONFIGURED_FREQUENCIES_NO     1U
 
+#endif
 
+
 
+
 
+
 
+/* Number of special peripheral clocks */
 
+#if FEATURE_CLOCK_SPECIFIC_PERIPH_COUNT > 0U
 
+    #define CLOCK_SPECIFIC_PERIPH_NO       FEATURE_CLOCK_SPECIFIC_PERIPH_COUNT
 
+#else
 
+    #define CLOCK_SPECIFIC_PERIPH_NO       1U
 
+#endif
 
+
 
+/**
 
+* @brief            This parameter shall be set True, if the H/W does not have a PLL.
 
+*/
 
+#if FEATURE_CLOCK_PLLS_COUNT > 0U
 
+    #define CLOCK_IP_NO_PLL     STD_OFF
 
+#else
 
+    #define CLOCK_IP_NO_PLL     STD_ON
 
+#endif
 
+/*==================================================================================================
 
+                                     CONFIGURATION STRUCTURE
 
+==================================================================================================*/
 
+
 
+/** @brief Power modes. */
 
+typedef enum {
 
+
 
+#if defined(FEATURE_CLOCK_IP_HAS_RUN_MODE)
 
+    RUN_MODE                              = FEATURE_CLOCK_IP_HAS_RUN_MODE,
 
+    VLPR_MODE                             = 1U,
 
+    VLPS_MODE                             = 2U,
 
+    HSRUN_MODE                            = 3U,
 
+#endif
 
+} power_modes_t;
 
+
 
+/** @brief Power mode notification. */
 
+typedef enum {
 
+
 
+    BEFORE_POWER_MODE_CHANGE,                /* Before power mode change command is sent */
 
+    POWER_MODE_CHANGE_IN_PROGRESS,         /* Power mode transition is in progress */
 
+    POWER_MODE_CHANGED,                    /* Power mode transition completed */
 
+
 
+} power_notification_t;
 
+
 
+/** @brief Clock names. */
 
+typedef enum {
 
+    
+    CLOCK_IS_OFF              = 0U,
 
+    
+#if defined(FEATURE_CLOCK_IP_HAS_FIRC_CLK)
 
+    FIRC_CLK                  = FEATURE_CLOCK_IP_HAS_FIRC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FIRC_VLP_CLK)
 
+    FIRC_VLP_CLK              = FEATURE_CLOCK_IP_HAS_FIRC_VLP_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FIRC_STOP_CLK)
 
+    FIRC_STOP_CLK             = FEATURE_CLOCK_IP_HAS_FIRC_STOP_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FIRC_STANDBY_CLK)
 
+    FIRC_STANDBY_CLK          = FEATURE_CLOCK_IP_HAS_FIRC_STANDBY_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIRC_CLK)
 
+    SIRC_CLK                  = FEATURE_CLOCK_IP_HAS_SIRC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIRC_VLP_CLK)
 
+    SIRC_VLP_CLK              = FEATURE_CLOCK_IP_HAS_SIRC_VLP_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIRC_STOP_CLK)
 
+    SIRC_STOP_CLK             = FEATURE_CLOCK_IP_HAS_SIRC_STOP_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIRC_STANDBY_CLK)
 
+    SIRC_STANDBY_CLK          = FEATURE_CLOCK_IP_HAS_SIRC_STANDBY_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPO_128K_CLK)
 
+    LPO_128K_CLK              = FEATURE_CLOCK_IP_HAS_LPO_128K_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FXOSC_CLK)
 
+    FXOSC_CLK                 = FEATURE_CLOCK_IP_HAS_FXOSC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SXOSC_CLK)
 
+    SXOSC_CLK                 = FEATURE_CLOCK_IP_HAS_SXOSC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SOSC_CLK)
 
+    SOSC_CLK                  = FEATURE_CLOCK_IP_HAS_SOSC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ACCELPLL_CLK)
 
+    ACCELPLL_CLK              = FEATURE_CLOCK_IP_HAS_ACCELPLL_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_COREPLL_CLK)
 
+    COREPLL_CLK               = FEATURE_CLOCK_IP_HAS_COREPLL_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DDRPLL_CLK)
 
+    DDRPLL_CLK                = FEATURE_CLOCK_IP_HAS_DDRPLL_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_CLK)
 
+    PERIPHPLL_CLK             = FEATURE_CLOCK_IP_HAS_PERIPHPLL_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PLL_CLK)
 
+    PLL_CLK                   = FEATURE_CLOCK_IP_HAS_PLL_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPLL_CLK)
 
+    SPLL_CLK                  = FEATURE_CLOCK_IP_HAS_SPLL_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ACCEL_PLL_PHI0_CLK)
 
+    ACCEL_PLL_PHI0_CLK        = FEATURE_CLOCK_IP_HAS_ACCEL_PLL_PHI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ACCEL_PLL_PHI1_CLK)
 
+    ACCEL_PLL_PHI1_CLK        = FEATURE_CLOCK_IP_HAS_ACCEL_PLL_PHI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_PLL_PHI0_CLK)
 
+    CORE_PLL_PHI0_CLK         = FEATURE_CLOCK_IP_HAS_CORE_PLL_PHI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_PLL_PHI1_CLK)
 
+    CORE_PLL_PHI1_CLK         = FEATURE_CLOCK_IP_HAS_CORE_PLL_PHI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS0_CLK)
 
+    CORE_PLL_DFS0_CLK         = FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS1_CLK)
 
+    CORE_PLL_DFS1_CLK         = FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS2_CLK)
 
+    CORE_PLL_DFS2_CLK         = FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS3_CLK)
 
+    CORE_PLL_DFS3_CLK         = FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS4_CLK)
 
+    CORE_PLL_DFS4_CLK         = FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS5_CLK)
 
+    CORE_PLL_DFS5_CLK         = FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS6_CLK)
 
+    CORE_PLL_DFS6_CLK         = FEATURE_CLOCK_IP_HAS_CORE_PLL_DFS6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DDR_PLL_PHI0_CLK)
 
+    DDR_PLL_PHI0_CLK          = FEATURE_CLOCK_IP_HAS_DDR_PLL_PHI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI0_CLK)
 
+    PERIPH_PLL_PHI0_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI1_CLK)
 
+    PERIPH_PLL_PHI1_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI2_CLK)
 
+    PERIPH_PLL_PHI2_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI3_CLK)
 
+    PERIPH_PLL_PHI3_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI4_CLK)
 
+    PERIPH_PLL_PHI4_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI5_CLK)
 
+    PERIPH_PLL_PHI5_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI6_CLK)
 
+    PERIPH_PLL_PHI6_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI7_CLK)
 
+    PERIPH_PLL_PHI7_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_PHI7_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS0_CLK)
 
+    PERIPH_PLL_DFS0_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS1_CLK)
 
+    PERIPH_PLL_DFS1_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS2_CLK)
 
+    PERIPH_PLL_DFS2_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS3_CLK)
 
+    PERIPH_PLL_DFS3_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS4_CLK)
 
+    PERIPH_PLL_DFS4_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS5_CLK)
 
+    PERIPH_PLL_DFS5_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS6_CLK)
 
+    PERIPH_PLL_DFS6_CLK       = FEATURE_CLOCK_IP_HAS_PERIPH_PLL_DFS6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_COREPLL_PHI0_CLK)
 
+    COREPLL_PHI0_CLK          = FEATURE_CLOCK_IP_HAS_COREPLL_PHI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_COREPLL_PHI1_CLK)
 
+    COREPLL_PHI1_CLK          = FEATURE_CLOCK_IP_HAS_COREPLL_PHI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_COREPLL_DFS0_CLK)
 
+    COREPLL_DFS0_CLK          = FEATURE_CLOCK_IP_HAS_COREPLL_DFS0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_COREPLL_DFS1_CLK)
 
+    COREPLL_DFS1_CLK          = FEATURE_CLOCK_IP_HAS_COREPLL_DFS1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_COREPLL_DFS2_CLK)
 
+    COREPLL_DFS2_CLK          = FEATURE_CLOCK_IP_HAS_COREPLL_DFS2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_COREPLL_DFS3_CLK)
 
+    COREPLL_DFS3_CLK          = FEATURE_CLOCK_IP_HAS_COREPLL_DFS3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_COREPLL_DFS4_CLK)
 
+    COREPLL_DFS4_CLK          = FEATURE_CLOCK_IP_HAS_COREPLL_DFS4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_COREPLL_DFS5_CLK)
 
+    COREPLL_DFS5_CLK          = FEATURE_CLOCK_IP_HAS_COREPLL_DFS5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_COREPLL_DFS6_CLK)
 
+    COREPLL_DFS6_CLK          = FEATURE_CLOCK_IP_HAS_COREPLL_DFS6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DDRPLL_PHI0_CLK)
 
+    DDRPLL_PHI0_CLK           = FEATURE_CLOCK_IP_HAS_DDRPLL_PHI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI0_CLK)
 
+    PERIPHPLL_PHI0_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI1_CLK)
 
+    PERIPHPLL_PHI1_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI2_CLK)
 
+    PERIPHPLL_PHI2_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI3_CLK)
 
+    PERIPHPLL_PHI3_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI4_CLK)
 
+    PERIPHPLL_PHI4_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI5_CLK)
 
+    PERIPHPLL_PHI5_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI6_CLK)
 
+    PERIPHPLL_PHI6_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI7_CLK)
 
+    PERIPHPLL_PHI7_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_PHI7_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS0_CLK)
 
+    PERIPHPLL_DFS0_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS1_CLK)
 
+    PERIPHPLL_DFS1_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS2_CLK)
 
+    PERIPHPLL_DFS2_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS3_CLK)
 
+    PERIPHPLL_DFS3_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS4_CLK)
 
+    PERIPHPLL_DFS4_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS5_CLK)
 
+    PERIPHPLL_DFS5_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS6_CLK)
 
+    PERIPHPLL_DFS6_CLK        = FEATURE_CLOCK_IP_HAS_PERIPHPLL_DFS6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PLL_PHI0_CLK)
 
+    PLL_PHI0_CLK              = FEATURE_CLOCK_IP_HAS_PLL_PHI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PLL_PHI1_CLK)
 
+    PLL_PHI1_CLK              = FEATURE_CLOCK_IP_HAS_PLL_PHI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PLL_POSTDIV_CLK)
 
+    PLL_POSTDIV_CLK           = FEATURE_CLOCK_IP_HAS_PLL_POSTDIV_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIRCDIV1_CLK)
 
+    SIRCDIV1_CLK              = FEATURE_CLOCK_IP_HAS_SIRCDIV1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIRCDIV2_CLK)
 
+    SIRCDIV2_CLK              = FEATURE_CLOCK_IP_HAS_SIRCDIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FIRCDIV1_CLK)
 
+    FIRCDIV1_CLK              = FEATURE_CLOCK_IP_HAS_FIRCDIV1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FIRCDIV2_CLK)
 
+    FIRCDIV2_CLK              = FEATURE_CLOCK_IP_HAS_FIRCDIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SOSCDIV1_CLK)
 
+    SOSCDIV1_CLK              = FEATURE_CLOCK_IP_HAS_SOSCDIV1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SOSCDIV2_CLK)
 
+    SOSCDIV2_CLK              = FEATURE_CLOCK_IP_HAS_SOSCDIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPLLDIV1_CLK)
 
+    SPLLDIV1_CLK              = FEATURE_CLOCK_IP_HAS_SPLLDIV1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPLLDIV2_CLK)
 
+    SPLLDIV2_CLK              = FEATURE_CLOCK_IP_HAS_SPLLDIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPO_32K_CLK)
 
+    LPO_32K_CLK               = FEATURE_CLOCK_IP_HAS_LPO_32K_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPO_1K_CLK)
 
+    LPO_1K_CLK                = FEATURE_CLOCK_IP_HAS_LPO_1K_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_0_LANE_0_TX)
 
+    SERDES_0_LANE_0_TX        = FEATURE_CLOCK_IP_HAS_SERDES_0_LANE_0_TX,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_0_LANE_0_CDR)
 
+    SERDES_0_LANE_0_CDR       = FEATURE_CLOCK_IP_HAS_SERDES_0_LANE_0_CDR,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_0_LANE_1_TX)
 
+    SERDES_0_LANE_1_TX        = FEATURE_CLOCK_IP_HAS_SERDES_0_LANE_1_TX,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_0_LANE_1_CDR)
 
+    SERDES_0_LANE_1_CDR       = FEATURE_CLOCK_IP_HAS_SERDES_0_LANE_1_CDR,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_1_LANE_0_TX)
 
+    SERDES_1_LANE_0_TX        = FEATURE_CLOCK_IP_HAS_SERDES_1_LANE_0_TX,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_1_LANE_0_CDR)
 
+    SERDES_1_LANE_0_CDR       = FEATURE_CLOCK_IP_HAS_SERDES_1_LANE_0_CDR,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_1_LANE_1_TX)
 
+    SERDES_1_LANE_1_TX        = FEATURE_CLOCK_IP_HAS_SERDES_1_LANE_1_TX,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_1_LANE_1_CDR)
 
+    SERDES_1_LANE_1_CDR       = FEATURE_CLOCK_IP_HAS_SERDES_1_LANE_1_CDR,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_0_XPCS_0_TX)
 
+    SERDES_0_XPCS_0_TX        = FEATURE_CLOCK_IP_HAS_SERDES_0_XPCS_0_TX,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_0_XPCS_0_CDR)
 
+    SERDES_0_XPCS_0_CDR       = FEATURE_CLOCK_IP_HAS_SERDES_0_XPCS_0_CDR,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_0_XPCS_1_TX)
 
+    SERDES_0_XPCS_1_TX        = FEATURE_CLOCK_IP_HAS_SERDES_0_XPCS_1_TX,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_0_XPCS_1_CDR)
 
+    SERDES_0_XPCS_1_CDR       = FEATURE_CLOCK_IP_HAS_SERDES_0_XPCS_1_CDR,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_1_XPCS_0_TX)
 
+    SERDES_1_XPCS_0_TX        = FEATURE_CLOCK_IP_HAS_SERDES_1_XPCS_0_TX,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_1_XPCS_0_CDR)
 
+    SERDES_1_XPCS_0_CDR       = FEATURE_CLOCK_IP_HAS_SERDES_1_XPCS_0_CDR,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_1_XPCS_1_TX)
 
+    SERDES_1_XPCS_1_TX        = FEATURE_CLOCK_IP_HAS_SERDES_1_XPCS_1_TX,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_1_XPCS_1_CDR)
 
+    SERDES_1_XPCS_1_CDR       = FEATURE_CLOCK_IP_HAS_SERDES_1_XPCS_1_CDR,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMAC_MII_RX_CLK)
 
+    EMAC_MII_RX_CLK           = FEATURE_CLOCK_IP_HAS_EMAC_MII_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMAC_MII_RMII_TX_CLK)
 
+    EMAC_MII_RMII_TX_CLK      = FEATURE_CLOCK_IP_HAS_EMAC_MII_RMII_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH_RGMII_REF_CLK)
 
+    ETH_RGMII_REF_CLK         = FEATURE_CLOCK_IP_HAS_ETH_RGMII_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH_EXT_TS_CLK)
 
+    ETH_EXT_TS_CLK            = FEATURE_CLOCK_IP_HAS_ETH_EXT_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH0_EXT_RX_CLK)
 
+    ETH0_EXT_RX_CLK           = FEATURE_CLOCK_IP_HAS_ETH0_EXT_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH0_EXT_TX_CLK)
 
+    ETH0_EXT_TX_CLK           = FEATURE_CLOCK_IP_HAS_ETH0_EXT_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH1_EXT_RX_CLK)
 
+    ETH1_EXT_RX_CLK           = FEATURE_CLOCK_IP_HAS_ETH1_EXT_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH1_EXT_TX_CLK)
 
+    ETH1_EXT_TX_CLK           = FEATURE_CLOCK_IP_HAS_ETH1_EXT_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LFAST0_EXT_REF_CLK)
 
+    LFAST0_EXT_REF_CLK        = FEATURE_CLOCK_IP_HAS_LFAST0_EXT_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LFAST1_EXT_REF_CLK)
 
+    LFAST1_EXT_REF_CLK        = FEATURE_CLOCK_IP_HAS_LFAST1_EXT_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM_0_EXT_REF_CLK)
 
+    FTM_0_EXT_REF_CLK         = FEATURE_CLOCK_IP_HAS_FTM_0_EXT_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM_1_EXT_REF_CLK)
 
+    FTM_1_EXT_REF_CLK         = FEATURE_CLOCK_IP_HAS_FTM_1_EXT_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC_0_EXT_REF_CLK)
 
+    GMAC_0_EXT_REF_CLK        = FEATURE_CLOCK_IP_HAS_GMAC_0_EXT_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC_0_EXT_RX_CLK)
 
+    GMAC_0_EXT_RX_CLK         = FEATURE_CLOCK_IP_HAS_GMAC_0_EXT_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC_0_EXT_TX_CLK)
 
+    GMAC_0_EXT_TX_CLK         = FEATURE_CLOCK_IP_HAS_GMAC_0_EXT_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC_1_EXT_REF_CLK)
 
+    GMAC_1_EXT_REF_CLK        = FEATURE_CLOCK_IP_HAS_GMAC_1_EXT_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC_1_EXT_RX_CLK)
 
+    GMAC_1_EXT_RX_CLK         = FEATURE_CLOCK_IP_HAS_GMAC_1_EXT_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC_1_EXT_TX_CLK)
 
+    GMAC_1_EXT_TX_CLK         = FEATURE_CLOCK_IP_HAS_GMAC_1_EXT_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC_EXT_TS_CLK)
 
+    GMAC_EXT_TS_CLK           = FEATURE_CLOCK_IP_HAS_GMAC_EXT_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_MAC_0_EXT_REF_CLK)
 
+    PFE_MAC_0_EXT_REF_CLK     = FEATURE_CLOCK_IP_HAS_PFE_MAC_0_EXT_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_MAC_0_EXT_RX_CLK)
 
+    PFE_MAC_0_EXT_RX_CLK      = FEATURE_CLOCK_IP_HAS_PFE_MAC_0_EXT_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_MAC_0_EXT_TX_CLK)
 
+    PFE_MAC_0_EXT_TX_CLK      = FEATURE_CLOCK_IP_HAS_PFE_MAC_0_EXT_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_MAC_1_EXT_REF_CLK)
 
+    PFE_MAC_1_EXT_REF_CLK     = FEATURE_CLOCK_IP_HAS_PFE_MAC_1_EXT_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_MAC_1_EXT_RX_CLK)
 
+    PFE_MAC_1_EXT_RX_CLK      = FEATURE_CLOCK_IP_HAS_PFE_MAC_1_EXT_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_MAC_1_EXT_TX_CLK)
 
+    PFE_MAC_1_EXT_TX_CLK      = FEATURE_CLOCK_IP_HAS_PFE_MAC_1_EXT_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_MAC_2_EXT_REF_CLK)
 
+    PFE_MAC_2_EXT_REF_CLK     = FEATURE_CLOCK_IP_HAS_PFE_MAC_2_EXT_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_MAC_2_EXT_RX_CLK)
 
+    PFE_MAC_2_EXT_RX_CLK      = FEATURE_CLOCK_IP_HAS_PFE_MAC_2_EXT_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_MAC_2_EXT_TX_CLK)
 
+    PFE_MAC_2_EXT_TX_CLK      = FEATURE_CLOCK_IP_HAS_PFE_MAC_2_EXT_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_TCLK0_REF_CLK)
 
+    TCLK0_REF_CLK             = FEATURE_CLOCK_IP_HAS_TCLK0_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_TCLK1_REF_CLK)
 
+    TCLK1_REF_CLK             = FEATURE_CLOCK_IP_HAS_TCLK1_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_TCLK2_REF_CLK)
 
+    TCLK2_REF_CLK             = FEATURE_CLOCK_IP_HAS_TCLK2_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTC_CLKIN)
 
+    RTC_CLKIN                 = FEATURE_CLOCK_IP_HAS_RTC_CLKIN,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_A53_CORE_CLK)
 
+    A53_CORE_CLK              = FEATURE_CLOCK_IP_HAS_A53_CORE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_A53_CORE_DIV2_CLK)
 
+    A53_CORE_DIV2_CLK         = FEATURE_CLOCK_IP_HAS_A53_CORE_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_A53_CORE_DIV10_CLK)
 
+    A53_CORE_DIV10_CLK        = FEATURE_CLOCK_IP_HAS_A53_CORE_DIV10_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_AIPS_PLAT_CLK)
 
+    AIPS_PLAT_CLK             = FEATURE_CLOCK_IP_HAS_AIPS_PLAT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_AIPS_SLOW_CLK)
 
+    AIPS_SLOW_CLK             = FEATURE_CLOCK_IP_HAS_AIPS_SLOW_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ACCEL3_CLK)
 
+    ACCEL3_CLK                = FEATURE_CLOCK_IP_HAS_ACCEL3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ACCEL3_DIV3_CLK)
 
+    ACCEL3_DIV3_CLK           = FEATURE_CLOCK_IP_HAS_ACCEL3_DIV3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ACCEL4_CLK)
 
+    ACCEL4_CLK                = FEATURE_CLOCK_IP_HAS_ACCEL4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CLKOUT_RUN_CLK)
 
+    CLKOUT_RUN_CLK            = FEATURE_CLOCK_IP_HAS_CLKOUT_RUN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DCM_CLK)
 
+    DCM_CLK                   = FEATURE_CLOCK_IP_HAS_DCM_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DDR_CLK)
 
+    DDR_CLK                   = FEATURE_CLOCK_IP_HAS_DDR_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC_REF_DIV_CLK)
 
+    GMAC_REF_DIV_CLK          = FEATURE_CLOCK_IP_HAS_GMAC_REF_DIV_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC0_REF_DIV_CLK)
 
+    GMAC0_REF_DIV_CLK         = FEATURE_CLOCK_IP_HAS_GMAC0_REF_DIV_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC1_REF_DIV_CLK)
 
+    GMAC1_REF_DIV_CLK         = FEATURE_CLOCK_IP_HAS_GMAC1_REF_DIV_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_HSE_CLK)
 
+    HSE_CLK                   = FEATURE_CLOCK_IP_HAS_HSE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LBIST_CLK)
 
+    LBIST_CLK                 = FEATURE_CLOCK_IP_HAS_LBIST_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_PE_CLK)
 
+    PFE_PE_CLK                = FEATURE_CLOCK_IP_HAS_PFE_PE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFE_SYS_CLK)
 
+    PFE_SYS_CLK                = FEATURE_CLOCK_IP_HAS_PFE_SYS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PER_CLK)
 
+    PER_CLK                   = FEATURE_CLOCK_IP_HAS_PER_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFEMAC0_REF_DIV_CLK)
 
+    PFEMAC0_REF_DIV_CLK       = FEATURE_CLOCK_IP_HAS_PFEMAC0_REF_DIV_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFEMAC1_REF_DIV_CLK)
 
+    PFEMAC1_REF_DIV_CLK       = FEATURE_CLOCK_IP_HAS_PFEMAC1_REF_DIV_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFEMAC2_REF_DIV_CLK)
 
+    PFEMAC2_REF_DIV_CLK       = FEATURE_CLOCK_IP_HAS_PFEMAC2_REF_DIV_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI_MEM_CLK)
 
+    QSPI_MEM_CLK              = FEATURE_CLOCK_IP_HAS_QSPI_MEM_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SCS_CLK)
 
+    SCS_CLK                   = FEATURE_CLOCK_IP_HAS_SCS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_XBAR_2X_CLK)
 
+    XBAR_2X_CLK               = FEATURE_CLOCK_IP_HAS_XBAR_2X_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_XBAR_CLK)
 
+    XBAR_CLK                  = FEATURE_CLOCK_IP_HAS_XBAR_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_XBAR_DIV2_CLK)
 
+    XBAR_DIV2_CLK             = FEATURE_CLOCK_IP_HAS_XBAR_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_XBAR_DIV3_CLK)
 
+    XBAR_DIV3_CLK             = FEATURE_CLOCK_IP_HAS_XBAR_DIV3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_XBAR_DIV4_CLK)
 
+    XBAR_DIV4_CLK             = FEATURE_CLOCK_IP_HAS_XBAR_DIV4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_XBAR_DIV6_CLK)
 
+    XBAR_DIV6_CLK             = FEATURE_CLOCK_IP_HAS_XBAR_DIV6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES_REF_CLK)
 
+    SERDES_REF_CLK            = FEATURE_CLOCK_IP_HAS_SERDES_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES0_REF_CLK)
 
+    SERDES0_REF_CLK            = FEATURE_CLOCK_IP_HAS_SERDES0_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SERDES1_REF_CLK)
 
+    SERDES1_REF_CLK            = FEATURE_CLOCK_IP_HAS_SERDES1_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SCS_RUN_CLK)
 
+    SCS_RUN_CLK               = FEATURE_CLOCK_IP_HAS_SCS_RUN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SCS_VLPR_CLK)
 
+    SCS_VLPR_CLK              = FEATURE_CLOCK_IP_HAS_SCS_VLPR_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SCS_HSRUN_CLK)
 
+    SCS_HSRUN_CLK             = FEATURE_CLOCK_IP_HAS_SCS_HSRUN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_CLK)
 
+    CORE_CLK                  = FEATURE_CLOCK_IP_HAS_CORE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_RUN_CLK)
 
+    CORE_RUN_CLK              = FEATURE_CLOCK_IP_HAS_CORE_RUN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_VLPR_CLK)
 
+    CORE_VLPR_CLK             = FEATURE_CLOCK_IP_HAS_CORE_VLPR_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_HSRUN_CLK)
 
+    CORE_HSRUN_CLK             = FEATURE_CLOCK_IP_HAS_CORE_HSRUN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_BUS_CLK)
 
+    BUS_CLK                   = FEATURE_CLOCK_IP_HAS_BUS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_BUS_RUN_CLK)
 
+    BUS_RUN_CLK               = FEATURE_CLOCK_IP_HAS_BUS_RUN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_BUS_VLPR_CLK)
 
+    BUS_VLPR_CLK              = FEATURE_CLOCK_IP_HAS_BUS_VLPR_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_BUS_HSRUN_CLK)
 
+    BUS_HSRUN_CLK              = FEATURE_CLOCK_IP_HAS_BUS_HSRUN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SLOW_CLK)
 
+    SLOW_CLK                  = FEATURE_CLOCK_IP_HAS_SLOW_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SLOW_RUN_CLK)
 
+    SLOW_RUN_CLK              = FEATURE_CLOCK_IP_HAS_SLOW_RUN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SLOW_VLPR_CLK)
 
+    SLOW_VLPR_CLK             = FEATURE_CLOCK_IP_HAS_SLOW_VLPR_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SLOW_HSRUN_CLK)
 
+    SLOW_HSRUN_CLK             = FEATURE_CLOCK_IP_HAS_SLOW_HSRUN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPO_CLK)
 
+    LPO_CLK                   = FEATURE_CLOCK_IP_HAS_LPO_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SCG_CLKOUT_CLK)
 
+    SCG_CLKOUT_CLK            = FEATURE_CLOCK_IP_HAS_SCG_CLKOUT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM0_EXT_CLK)
 
+    FTM0_EXT_CLK              = FEATURE_CLOCK_IP_HAS_FTM0_EXT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM1_EXT_CLK)
 
+    FTM1_EXT_CLK              = FEATURE_CLOCK_IP_HAS_FTM1_EXT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM2_EXT_CLK)
 
+    FTM2_EXT_CLK              = FEATURE_CLOCK_IP_HAS_FTM2_EXT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM3_EXT_CLK)
 
+    FTM3_EXT_CLK              = FEATURE_CLOCK_IP_HAS_FTM3_EXT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM4_EXT_CLK)
 
+    FTM4_EXT_CLK              = FEATURE_CLOCK_IP_HAS_FTM4_EXT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM5_EXT_CLK)
 
+    FTM5_EXT_CLK              = FEATURE_CLOCK_IP_HAS_FTM5_EXT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM6_EXT_CLK)
 
+    FTM6_EXT_CLK              = FEATURE_CLOCK_IP_HAS_FTM6_EXT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM7_EXT_CLK)
 
+    FTM7_EXT_CLK              = FEATURE_CLOCK_IP_HAS_FTM7_EXT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_Px_CLKOUT_SRC_CLK)
 
+    Px_CLKOUT_SRC_CLK         = FEATURE_CLOCK_IP_HAS_Px_CLKOUT_SRC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_Px_PSI5_S_UTIL_CLK)
 
+    Px_PSI5_S_UTIL_CLK        = FEATURE_CLOCK_IP_HAS_Px_PSI5_S_UTIL_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SHIFT_LBIST_CLK)
 
+    SHIFT_LBIST_CLK           = FEATURE_CLOCK_IP_HAS_SHIFT_LBIST_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_SYS_CLK)
 
+    P0_SYS_CLK                = FEATURE_CLOCK_IP_HAS_P0_SYS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_SYS_CLK)
 
+    P1_SYS_CLK                = FEATURE_CLOCK_IP_HAS_P1_SYS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_SYS_DIV2_CLK)
 
+    P1_SYS_DIV2_CLK           = FEATURE_CLOCK_IP_HAS_P1_SYS_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_SYS_DIV4_CLK)
 
+    P1_SYS_DIV4_CLK           = FEATURE_CLOCK_IP_HAS_P1_SYS_DIV4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P2_SYS_CLK)
 
+    P2_SYS_CLK                = FEATURE_CLOCK_IP_HAS_P2_SYS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_M33_CLK)
 
+    CORE_M33_CLK              = FEATURE_CLOCK_IP_HAS_CORE_M33_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P2_SYS_DIV2_CLK)
 
+    P2_SYS_DIV2_CLK           = FEATURE_CLOCK_IP_HAS_P2_SYS_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P2_SYS_DIV4_CLK)
 
+    P2_SYS_DIV4_CLK           = FEATURE_CLOCK_IP_HAS_P2_SYS_DIV4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_SYS_CLK)
 
+    P3_SYS_CLK                = FEATURE_CLOCK_IP_HAS_P3_SYS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CE_SYS_DIV2_CLK)
 
+    CE_SYS_DIV2_CLK           = FEATURE_CLOCK_IP_HAS_CE_SYS_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CE_SYS_DIV4_CLK)
 
+    CE_SYS_DIV4_CLK           = FEATURE_CLOCK_IP_HAS_CE_SYS_DIV4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_SYS_DIV2_NOC_CLK)
 
+    P3_SYS_DIV2_NOC_CLK       = FEATURE_CLOCK_IP_HAS_P3_SYS_DIV2_NOC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_SYS_DIV4_CLK)
 
+    P3_SYS_DIV4_CLK           = FEATURE_CLOCK_IP_HAS_P3_SYS_DIV4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_SYS_CLK)
 
+    P4_SYS_CLK                = FEATURE_CLOCK_IP_HAS_P4_SYS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_SYS_DIV2_CLK)
 
+    P4_SYS_DIV2_CLK           = FEATURE_CLOCK_IP_HAS_P4_SYS_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_HSE_SYS_DIV2_CLK)
 
+    HSE_SYS_DIV2_CLK          = FEATURE_CLOCK_IP_HAS_HSE_SYS_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_SYS_CLK)
 
+    P5_SYS_CLK                = FEATURE_CLOCK_IP_HAS_P5_SYS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_SYS_DIV2_CLK)
 
+    P5_SYS_DIV2_CLK           = FEATURE_CLOCK_IP_HAS_P5_SYS_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_SYS_DIV4_CLK)
 
+    P5_SYS_DIV4_CLK           = FEATURE_CLOCK_IP_HAS_P5_SYS_DIV4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P2_MATH_CLK)
 
+    P2_MATH_CLK               = FEATURE_CLOCK_IP_HAS_P2_MATH_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P2_MATH_DIV3_CLK)
 
+    P2_MATH_DIV3_CLK          = FEATURE_CLOCK_IP_HAS_P2_MATH_DIV3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU0_CORE_CLK)
 
+    RTU0_CORE_CLK             = FEATURE_CLOCK_IP_HAS_RTU0_CORE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU0_CORE_DIV2_CLK)
 
+    RTU0_CORE_DIV2_CLK        = FEATURE_CLOCK_IP_HAS_RTU0_CORE_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU1_CORE_CLK)
 
+    RTU1_CORE_CLK             = FEATURE_CLOCK_IP_HAS_RTU1_CORE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU1_CORE_DIV2_CLK)
 
+    RTU1_CORE_DIV2_CLK        = FEATURE_CLOCK_IP_HAS_RTU1_CORE_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_UTIL_CLK)
 
+    P0_PSI5_S_UTIL_CLK        = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_UTIL_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_UTIL_CLK)
 
+    P4_PSI5_S_UTIL_CLK        = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_UTIL_CLK,
 
+#endif
 
+THE_LAST_PRODUCER_CLK         = FEATURE_CLOCK_PRODUCERS_NO,     /* Number of producers clocks */
 
+#if defined(FEATURE_CLOCK_IP_HAS_ACCEL4_LAX0_CLK)
 
+    ACCEL4_LAX0_CLK           = FEATURE_CLOCK_IP_HAS_ACCEL4_LAX0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ACCEL4_LAX1_CLK)
 
+    ACCEL4_LAX1_CLK           = FEATURE_CLOCK_IP_HAS_ACCEL4_LAX1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ADC0_CLK)
 
+    ADC0_CLK                  = FEATURE_CLOCK_IP_HAS_ADC0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ADC1_CLK)
 
+    ADC1_CLK                  = FEATURE_CLOCK_IP_HAS_ADC1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ADC2_CLK)
 
+    ADC2_CLK                  = FEATURE_CLOCK_IP_HAS_ADC2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_BCTU0_CLK)
 
+    BCTU0_CLK                 = FEATURE_CLOCK_IP_HAS_BCTU0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CE_SYS_DIV2_MON_CLK)
 
+    CE_SYS_DIV2_MON_CLK       = FEATURE_CLOCK_IP_HAS_CE_SYS_DIV2_MON_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CLKOUT_STANDBY_CLK)
 
+    CLKOUT_STANDBY_CLK        = FEATURE_CLOCK_IP_HAS_CLKOUT_STANDBY_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CLKOUT0_CLK)
 
+    CLKOUT0_CLK               = FEATURE_CLOCK_IP_HAS_CLKOUT0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CLKOUT1_CLK)
 
+    CLKOUT1_CLK               = FEATURE_CLOCK_IP_HAS_CLKOUT1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CLKOUT2_CLK)
 
+    CLKOUT2_CLK               = FEATURE_CLOCK_IP_HAS_CLKOUT2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CLKOUT3_CLK)
 
+    CLKOUT3_CLK               = FEATURE_CLOCK_IP_HAS_CLKOUT3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CLKOUT4_CLK)
 
+    CLKOUT4_CLK               = FEATURE_CLOCK_IP_HAS_CLKOUT4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CLKOUT5_CLK)
 
+    CLKOUT5_CLK               = FEATURE_CLOCK_IP_HAS_CLKOUT5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CMP0_CLK)
 
+    CMP0_CLK                  = FEATURE_CLOCK_IP_HAS_CMP0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CMP1_CLK)
 
+    CMP1_CLK                  = FEATURE_CLOCK_IP_HAS_CMP1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CMP2_CLK)
 
+    CMP2_CLK                  = FEATURE_CLOCK_IP_HAS_CMP2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CMU0_CLK)
 
+    CMU0_CLK                  = FEATURE_CLOCK_IP_HAS_CMU0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CMU1_CLK)
 
+    CMU1_CLK                  = FEATURE_CLOCK_IP_HAS_CMU1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_A53_CLUSTER_0_CLK)
 
+    CORE_A53_CLUSTER_0_CLK    = FEATURE_CLOCK_IP_HAS_CORE_A53_CLUSTER_0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_A53_CLUSTER_1_CLK)
 
+    CORE_A53_CLUSTER_1_CLK    = FEATURE_CLOCK_IP_HAS_CORE_A53_CLUSTER_1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_M7_0_CLK)
 
+    CORE_M7_0_CLK             = FEATURE_CLOCK_IP_HAS_CORE_M7_0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_M7_1_CLK)
 
+    CORE_M7_1_CLK             = FEATURE_CLOCK_IP_HAS_CORE_M7_1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CORE_M7_2_CLK)
 
+    CORE_M7_2_CLK             = FEATURE_CLOCK_IP_HAS_CORE_M7_2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CRC0_CLK)
 
+    CRC0_CLK                  = FEATURE_CLOCK_IP_HAS_CRC0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CTU0_CLK)
 
+    CTU0_CLK                  = FEATURE_CLOCK_IP_HAS_CTU0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_CTU1_CLK)
 
+    CTU1_CLK                  = FEATURE_CLOCK_IP_HAS_CTU1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DAPB_CLK)
 
+    DAPB_CLK                  = FEATURE_CLOCK_IP_HAS_DAPB_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DCM0_CLK)
 
+    DCM0_CLK                  = FEATURE_CLOCK_IP_HAS_DCM0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DMA_CRC0_CLK)
 
+    DMA_CRC0_CLK              = FEATURE_CLOCK_IP_HAS_DMA_CRC0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DMA_CRC1_CLK)
 
+    DMA_CRC1_CLK              = FEATURE_CLOCK_IP_HAS_DMA_CRC1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DMA0_CLK)
 
+    DMA0_CLK                  = FEATURE_CLOCK_IP_HAS_DMA0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DMA1_CLK)
 
+    DMA1_CLK                  = FEATURE_CLOCK_IP_HAS_DMA1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DMAMUX0_CLK)
 
+    DMAMUX0_CLK               = FEATURE_CLOCK_IP_HAS_DMAMUX0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DMAMUX1_CLK)
 
+    DMAMUX1_CLK               = FEATURE_CLOCK_IP_HAS_DMAMUX1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DMAMUX2_CLK)
 
+    DMAMUX2_CLK               = FEATURE_CLOCK_IP_HAS_DMAMUX2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_DMAMUX3_CLK)
 
+    DMAMUX3_CLK               = FEATURE_CLOCK_IP_HAS_DMAMUX3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA_CLK)
 
+    EDMA_CLK                  = FEATURE_CLOCK_IP_HAS_EDMA_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_CLK)
 
+    EDMA0_CLK                 = FEATURE_CLOCK_IP_HAS_EDMA0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD0_CLK)
 
+    EDMA0_TCD0_CLK            = FEATURE_CLOCK_IP_HAS_EDMA0_TCD0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD1_CLK)
 
+    EDMA0_TCD1_CLK            = FEATURE_CLOCK_IP_HAS_EDMA0_TCD1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD10_CLK)
 
+    EDMA0_TCD10_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD10_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD11_CLK)
 
+    EDMA0_TCD11_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD11_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD12_CLK)
 
+    EDMA0_TCD12_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD12_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD13_CLK)
 
+    EDMA0_TCD13_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD13_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD14_CLK)
 
+    EDMA0_TCD14_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD14_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD15_CLK)
 
+    EDMA0_TCD15_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD15_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD16_CLK)
 
+    EDMA0_TCD16_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD16_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD17_CLK)
 
+    EDMA0_TCD17_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD17_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD18_CLK)
 
+    EDMA0_TCD18_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD18_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD19_CLK)
 
+    EDMA0_TCD19_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD19_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD2_CLK)
 
+    EDMA0_TCD2_CLK            = FEATURE_CLOCK_IP_HAS_EDMA0_TCD2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD20_CLK)
 
+    EDMA0_TCD20_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD20_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD21_CLK)
 
+    EDMA0_TCD21_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD21_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD22_CLK)
 
+    EDMA0_TCD22_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD22_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD23_CLK)
 
+    EDMA0_TCD23_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD23_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD24_CLK)
 
+    EDMA0_TCD24_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD24_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD25_CLK)
 
+    EDMA0_TCD25_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD25_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD26_CLK)
 
+    EDMA0_TCD26_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD26_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD27_CLK)
 
+    EDMA0_TCD27_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD27_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD28_CLK)
 
+    EDMA0_TCD28_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD28_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD29_CLK)
 
+    EDMA0_TCD29_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD29_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD3_CLK)
 
+    EDMA0_TCD3_CLK            = FEATURE_CLOCK_IP_HAS_EDMA0_TCD3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD30_CLK)
 
+    EDMA0_TCD30_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD30_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD31_CLK)
 
+    EDMA0_TCD31_CLK           = FEATURE_CLOCK_IP_HAS_EDMA0_TCD31_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD4_CLK)
 
+    EDMA0_TCD4_CLK            = FEATURE_CLOCK_IP_HAS_EDMA0_TCD4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD5_CLK)
 
+    EDMA0_TCD5_CLK            = FEATURE_CLOCK_IP_HAS_EDMA0_TCD5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD6_CLK)
 
+    EDMA0_TCD6_CLK            = FEATURE_CLOCK_IP_HAS_EDMA0_TCD6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD7_CLK)
 
+    EDMA0_TCD7_CLK            = FEATURE_CLOCK_IP_HAS_EDMA0_TCD7_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD8_CLK)
 
+    EDMA0_TCD8_CLK            = FEATURE_CLOCK_IP_HAS_EDMA0_TCD8_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA0_TCD9_CLK)
 
+    EDMA0_TCD9_CLK            = FEATURE_CLOCK_IP_HAS_EDMA0_TCD9_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA1_CLK)
 
+    EDMA1_CLK                 = FEATURE_CLOCK_IP_HAS_EDMA1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA3_CLK)
 
+    EDMA3_CLK                 = FEATURE_CLOCK_IP_HAS_EDMA3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA4_CLK)
 
+    EDMA4_CLK                 = FEATURE_CLOCK_IP_HAS_EDMA4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EDMA5_CLK)
 
+    EDMA5_CLK                 = FEATURE_CLOCK_IP_HAS_EDMA5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FDMA0_CLK)
 
+    FDMA0_CLK                 = FEATURE_CLOCK_IP_HAS_FDMA0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ENET_CLK)
 
+    ENET_CLK                  = FEATURE_CLOCK_IP_HAS_ENET_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EIM_CLK)
 
+    EIM_CLK                   = FEATURE_CLOCK_IP_HAS_EIM_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EIM0_CLK)
 
+    EIM0_CLK                  = FEATURE_CLOCK_IP_HAS_EIM0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EIM1_CLK)
 
+    EIM1_CLK                  = FEATURE_CLOCK_IP_HAS_EIM1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EIM2_CLK)
 
+    EIM2_CLK                  = FEATURE_CLOCK_IP_HAS_EIM2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EIM3_CLK)
 
+    EIM3_CLK                  = FEATURE_CLOCK_IP_HAS_EIM3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EIM_BBE32DSP_CLK)
 
+    EIM_BBE32DSP_CLK          = FEATURE_CLOCK_IP_HAS_EIM_BBE32DSP_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EIM_LAX0_CLK)
 
+    EIM_LAX0_CLK              = FEATURE_CLOCK_IP_HAS_EIM_LAX0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EIM_LAX1_CLK)
 
+    EIM_LAX1_CLK              = FEATURE_CLOCK_IP_HAS_EIM_LAX1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EIM_PER1_CLK)
 
+    EIM_PER1_CLK              = FEATURE_CLOCK_IP_HAS_EIM_PER1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ENET0_CLK)
 
+    ENET0_CLK                 = FEATURE_CLOCK_IP_HAS_ENET0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ENET1_CLK)
 
+    ENET1_CLK                 = FEATURE_CLOCK_IP_HAS_ENET1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMAC_RX_CLK)
 
+    EMAC_RX_CLK               = FEATURE_CLOCK_IP_HAS_EMAC_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMAC_TS_CLK)
 
+    EMAC_TS_CLK               = FEATURE_CLOCK_IP_HAS_EMAC_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMAC_TX_CLK)
 
+    EMAC_TX_CLK               = FEATURE_CLOCK_IP_HAS_EMAC_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMAC0_RX_CLK)
 
+    EMAC0_RX_CLK              = FEATURE_CLOCK_IP_HAS_EMAC0_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMAC0_TS_CLK)
 
+    EMAC0_TS_CLK              = FEATURE_CLOCK_IP_HAS_EMAC0_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMAC0_TX_CLK)
 
+    EMAC0_TX_CLK              = FEATURE_CLOCK_IP_HAS_EMAC0_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMIOS0_CLK)
 
+    EMIOS0_CLK                = FEATURE_CLOCK_IP_HAS_EMIOS0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMIOS1_CLK)
 
+    EMIOS1_CLK                = FEATURE_CLOCK_IP_HAS_EMIOS1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EMIOS2_CLK)
 
+    EMIOS2_CLK                = FEATURE_CLOCK_IP_HAS_EMIOS2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM0_CLK)
 
+    ERM0_CLK                  = FEATURE_CLOCK_IP_HAS_ERM0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM_CPU0_CLK)
 
+    ERM_CPU0_CLK              = FEATURE_CLOCK_IP_HAS_ERM_CPU0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM_CPU1_CLK)
 
+    ERM_CPU1_CLK              = FEATURE_CLOCK_IP_HAS_ERM_CPU1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM_CPU2_CLK)
 
+    ERM_CPU2_CLK              = FEATURE_CLOCK_IP_HAS_ERM_CPU2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM_EDMA0_CLK)
 
+    ERM_EDMA0_CLK             = FEATURE_CLOCK_IP_HAS_ERM_EDMA0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM_EDMA1_CLK)
 
+    ERM_EDMA1_CLK             = FEATURE_CLOCK_IP_HAS_ERM_EDMA1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM_LAX0_CLK)
 
+    ERM_LAX0_CLK              = FEATURE_CLOCK_IP_HAS_ERM_LAX0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM_LAX1_CLK)
 
+    ERM_LAX1_CLK              = FEATURE_CLOCK_IP_HAS_ERM_LAX1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM_PER_CLK)
 
+    ERM_PER_CLK               = FEATURE_CLOCK_IP_HAS_ERM_PER_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM_PER1_CLK)
 
+    ERM_PER1_CLK              = FEATURE_CLOCK_IP_HAS_ERM_PER1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ERM_CLK)
 
+    ERM_CLK                   = FEATURE_CLOCK_IP_HAS_ERM_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_EWM0_CLK)
 
+    EWM0_CLK                  = FEATURE_CLOCK_IP_HAS_EWM0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FIRC_MON1_CLK)
 
+    FIRC_MON1_CLK             = FEATURE_CLOCK_IP_HAS_FIRC_MON1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FIRC_MON2_CLK)
 
+    FIRC_MON2_CLK             = FEATURE_CLOCK_IP_HAS_FIRC_MON2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLASH0_CLK)
 
+    FLASH0_CLK                = FEATURE_CLOCK_IP_HAS_FLASH0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN_CLK)
 
+    FLEXCAN_CLK               = FEATURE_CLOCK_IP_HAS_FLEXCAN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN0_CLK)
 
+    FLEXCAN0_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCAN0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN1_CLK)
 
+    FLEXCAN1_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCAN1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN2_CLK)
 
+    FLEXCAN2_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCAN2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN3_CLK)
 
+    FLEXCAN3_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCAN3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN4_CLK)
 
+    FLEXCAN4_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCAN4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN5_CLK)
 
+    FLEXCAN5_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCAN5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN6_CLK)
 
+    FLEXCAN6_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCAN6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN7_CLK)
 
+    FLEXCAN7_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCAN7_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN8_CLK)
 
+    FLEXCAN8_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCAN8_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN9_CLK)
 
+    FLEXCAN9_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCAN9_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN10_CLK)
 
+    FLEXCAN10_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN10_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN11_CLK)
 
+    FLEXCAN11_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN11_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN12_CLK)
 
+    FLEXCAN12_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN12_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN13_CLK)
 
+    FLEXCAN13_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN13_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN14_CLK)
 
+    FLEXCAN14_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN14_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN15_CLK)
 
+    FLEXCAN15_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN15_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN16_CLK)
 
+    FLEXCAN16_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN16_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN17_CLK)
 
+    FLEXCAN17_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN17_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN18_CLK)
 
+    FLEXCAN18_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN18_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN19_CLK)
 
+    FLEXCAN19_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN19_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN20_CLK)
 
+    FLEXCAN20_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN20_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN21_CLK)
 
+    FLEXCAN21_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN21_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN22_CLK)
 
+    FLEXCAN22_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN22_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCAN23_CLK)
 
+    FLEXCAN23_CLK             = FEATURE_CLOCK_IP_HAS_FLEXCAN23_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCANA_CLK)
 
+    FLEXCANA_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCANA_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXCANB_CLK)
 
+    FLEXCANB_CLK              = FEATURE_CLOCK_IP_HAS_FLEXCANB_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FlexIO_CLK)
 
+    FlexIO_CLK                = FEATURE_CLOCK_IP_HAS_FlexIO_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FlexIO0_CLK)
 
+    FlexIO0_CLK               = FEATURE_CLOCK_IP_HAS_FlexIO0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXIO0_CLK)
 
+    FLEXIO0_CLK               = FEATURE_CLOCK_IP_HAS_FLEXIO0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXRAY_CLK)
 
+    FLEXRAY_CLK               = FEATURE_CLOCK_IP_HAS_FLEXRAY_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXTIMERA_CLK)
 
+    FLEXTIMERA_CLK            = FEATURE_CLOCK_IP_HAS_FLEXTIMERA_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FLEXTIMERB_CLK)
 
+    FLEXTIMERB_CLK            = FEATURE_CLOCK_IP_HAS_FLEXTIMERB_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FRAY0_CLK)
 
+    FRAY0_CLK                 = FEATURE_CLOCK_IP_HAS_FRAY0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FRAY1_CLK)
 
+    FRAY1_CLK                 = FEATURE_CLOCK_IP_HAS_FRAY1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTFC_CLK)
 
+    FTFC_CLK                  = FEATURE_CLOCK_IP_HAS_FTFC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTFM_CLK)
 
+    FTFM_CLK                  = FEATURE_CLOCK_IP_HAS_FTFM_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTIMER0_CLK)
 
+    FTIMER0_CLK               = FEATURE_CLOCK_IP_HAS_FTIMER0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTIMER1_CLK)
 
+    FTIMER1_CLK               = FEATURE_CLOCK_IP_HAS_FTIMER1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM0_CLK)
 
+    FTM0_CLK                  = FEATURE_CLOCK_IP_HAS_FTM0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM1_CLK)
 
+    FTM1_CLK                  = FEATURE_CLOCK_IP_HAS_FTM1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM2_CLK)
 
+    FTM2_CLK                  = FEATURE_CLOCK_IP_HAS_FTM2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM3_CLK)
 
+    FTM3_CLK                  = FEATURE_CLOCK_IP_HAS_FTM3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM4_CLK)
 
+    FTM4_CLK                  = FEATURE_CLOCK_IP_HAS_FTM4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM5_CLK)
 
+    FTM5_CLK                  = FEATURE_CLOCK_IP_HAS_FTM5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM6_CLK)
 
+    FTM6_CLK                  = FEATURE_CLOCK_IP_HAS_FTM6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_FTM7_CLK)
 
+    FTM7_CLK                  = FEATURE_CLOCK_IP_HAS_FTM7_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GLB_LBIST_CLK)
 
+    GLB_LBIST_CLK             = FEATURE_CLOCK_IP_HAS_GLB_LBIST_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC_TS_CLK)
 
+    GMAC_TS_CLK               = FEATURE_CLOCK_IP_HAS_GMAC_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC0_RX_CLK)
 
+    GMAC0_RX_CLK              = FEATURE_CLOCK_IP_HAS_GMAC0_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC0_TX_CLK)
 
+    GMAC0_TX_CLK              = FEATURE_CLOCK_IP_HAS_GMAC0_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC0_TS_CLK)
 
+    GMAC0_TS_CLK              = FEATURE_CLOCK_IP_HAS_GMAC0_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC1_RX_CLK)
 
+    GMAC1_RX_CLK              = FEATURE_CLOCK_IP_HAS_GMAC1_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC1_TX_CLK)
 
+    GMAC1_TX_CLK              = FEATURE_CLOCK_IP_HAS_GMAC1_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC1_TS_CLK)
 
+    GMAC1_TS_CLK              = FEATURE_CLOCK_IP_HAS_GMAC1_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GPIO0_CLK)
 
+    GPIO0_CLK                 = FEATURE_CLOCK_IP_HAS_GPIO0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_GMAC1_TS_CLK)
 
+    GMAC1_TS_CLK              = FEATURE_CLOCK_IP_HAS_GMAC1_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_IIIC0_CLK)
 
+    IIIC0_CLK                 = FEATURE_CLOCK_IP_HAS_IIIC0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_IIIC1_CLK)
 
+    IIIC1_CLK                 = FEATURE_CLOCK_IP_HAS_IIIC1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_IIIC2_CLK)
 
+    IIIC2_CLK                 = FEATURE_CLOCK_IP_HAS_IIIC2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_IIC0_CLK)
 
+    IIC0_CLK                  = FEATURE_CLOCK_IP_HAS_IIC0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_IIC1_CLK)
 
+    IIC1_CLK                  = FEATURE_CLOCK_IP_HAS_IIC1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_IIC2_CLK)
 
+    IIC2_CLK                  = FEATURE_CLOCK_IP_HAS_IIC2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_IIC3_CLK)
 
+    IIC3_CLK                  = FEATURE_CLOCK_IP_HAS_IIC3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_IIC4_CLK)
 
+    IIC4_CLK                  = FEATURE_CLOCK_IP_HAS_IIC4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_INTM_CLK)
 
+    INTM_CLK                  = FEATURE_CLOCK_IP_HAS_INTM_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LBIST0_CLK)
 
+    LBIST0_CLK                = FEATURE_CLOCK_IP_HAS_LBIST0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LBIST1_CLK)
 
+    LBIST1_CLK                = FEATURE_CLOCK_IP_HAS_LBIST1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LBIST2_CLK)
 
+    LBIST2_CLK                = FEATURE_CLOCK_IP_HAS_LBIST2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LBIST3_CLK)
 
+    LBIST3_CLK                = FEATURE_CLOCK_IP_HAS_LBIST3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LBIST4_CLK)
 
+    LBIST4_CLK                = FEATURE_CLOCK_IP_HAS_LBIST4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LBIST5_CLK)
 
+    LBIST5_CLK                = FEATURE_CLOCK_IP_HAS_LBIST5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LBIST6_CLK)
 
+    LBIST6_CLK                = FEATURE_CLOCK_IP_HAS_LBIST6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LBIST7_CLK)
 
+    LBIST7_CLK                = FEATURE_CLOCK_IP_HAS_LBIST7_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LCU0_CLK)
 
+    LCU0_CLK                  = FEATURE_CLOCK_IP_HAS_LCU0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LCU1_CLK)
 
+    LCU1_CLK                  = FEATURE_CLOCK_IP_HAS_LCU1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN_BAUD_CLK)
 
+    LIN_BAUD_CLK                   = FEATURE_CLOCK_IP_HAS_LIN_BAUD_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LINFLEXD_CLK)
 
+    LINFLEXD_CLK                   = FEATURE_CLOCK_IP_HAS_LINFLEXD_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN0_CLK)
 
+    LIN0_CLK                  = FEATURE_CLOCK_IP_HAS_LIN0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN1_CLK)
 
+    LIN1_CLK                  = FEATURE_CLOCK_IP_HAS_LIN1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN2_CLK)
 
+    LIN2_CLK                  = FEATURE_CLOCK_IP_HAS_LIN2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN3_CLK)
 
+    LIN3_CLK                  = FEATURE_CLOCK_IP_HAS_LIN3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN4_CLK)
 
+    LIN4_CLK                  = FEATURE_CLOCK_IP_HAS_LIN4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN5_CLK)
 
+    LIN5_CLK                  = FEATURE_CLOCK_IP_HAS_LIN5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN6_CLK)
 
+    LIN6_CLK                  = FEATURE_CLOCK_IP_HAS_LIN6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN7_CLK)
 
+    LIN7_CLK                  = FEATURE_CLOCK_IP_HAS_LIN7_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN8_CLK)
 
+    LIN8_CLK                  = FEATURE_CLOCK_IP_HAS_LIN8_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN9_CLK)
 
+    LIN9_CLK                  = FEATURE_CLOCK_IP_HAS_LIN9_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN10_CLK)
 
+    LIN10_CLK                 = FEATURE_CLOCK_IP_HAS_LIN10_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LIN11_CLK)
 
+    LIN11_CLK                 = FEATURE_CLOCK_IP_HAS_LIN11_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPI2C0_CLK)
 
+    LPI2C0_CLK                = FEATURE_CLOCK_IP_HAS_LPI2C0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPI2C1_CLK)
 
+    LPI2C1_CLK                = FEATURE_CLOCK_IP_HAS_LPI2C1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPIT0_CLK)
 
+    LPIT0_CLK                 = FEATURE_CLOCK_IP_HAS_LPIT0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPSPI0_CLK)
 
+    LPSPI0_CLK                = FEATURE_CLOCK_IP_HAS_LPSPI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPSPI1_CLK)
 
+    LPSPI1_CLK                = FEATURE_CLOCK_IP_HAS_LPSPI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPSPI2_CLK)
 
+    LPSPI2_CLK                = FEATURE_CLOCK_IP_HAS_LPSPI2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPSPI3_CLK)
 
+    LPSPI3_CLK                = FEATURE_CLOCK_IP_HAS_LPSPI3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPSPI4_CLK)
 
+    LPSPI4_CLK                = FEATURE_CLOCK_IP_HAS_LPSPI4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPSPI5_CLK)
 
+    LPSPI5_CLK                = FEATURE_CLOCK_IP_HAS_LPSPI5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPTMR0_CLK)
 
+    LPTMR0_CLK                = FEATURE_CLOCK_IP_HAS_LPTMR0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART0_CLK)
 
+    LPUART0_CLK               = FEATURE_CLOCK_IP_HAS_LPUART0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART1_CLK)
 
+    LPUART1_CLK               = FEATURE_CLOCK_IP_HAS_LPUART1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART10_CLK)
 
+    LPUART10_CLK              = FEATURE_CLOCK_IP_HAS_LPUART10_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART11_CLK)
 
+    LPUART11_CLK              = FEATURE_CLOCK_IP_HAS_LPUART11_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART12_CLK)
 
+    LPUART12_CLK              = FEATURE_CLOCK_IP_HAS_LPUART12_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART13_CLK)
 
+    LPUART13_CLK              = FEATURE_CLOCK_IP_HAS_LPUART13_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART14_CLK)
 
+    LPUART14_CLK              = FEATURE_CLOCK_IP_HAS_LPUART14_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART15_CLK)
 
+    LPUART15_CLK              = FEATURE_CLOCK_IP_HAS_LPUART15_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART2_CLK)
 
+    LPUART2_CLK               = FEATURE_CLOCK_IP_HAS_LPUART2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART3_CLK)
 
+    LPUART3_CLK               = FEATURE_CLOCK_IP_HAS_LPUART3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART4_CLK)
 
+    LPUART4_CLK               = FEATURE_CLOCK_IP_HAS_LPUART4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART5_CLK)
 
+    LPUART5_CLK               = FEATURE_CLOCK_IP_HAS_LPUART5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART6_CLK)
 
+    LPUART6_CLK               = FEATURE_CLOCK_IP_HAS_LPUART6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART7_CLK)
 
+    LPUART7_CLK               = FEATURE_CLOCK_IP_HAS_LPUART7_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART8_CLK)
 
+    LPUART8_CLK               = FEATURE_CLOCK_IP_HAS_LPUART8_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_LPUART9_CLK)
 
+    LPUART9_CLK               = FEATURE_CLOCK_IP_HAS_LPUART9_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_MPU0_CLK)
 
+    MPU0_CLK                  = FEATURE_CLOCK_IP_HAS_MPU0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_MSCM_CLK)
 
+    MSCM_CLK                  = FEATURE_CLOCK_IP_HAS_MSCM_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_MSCM0_CLK)
 
+    MSCM0_CLK                 = FEATURE_CLOCK_IP_HAS_MSCM0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_MUA_CLK)
 
+    MUA_CLK                   = FEATURE_CLOCK_IP_HAS_MUA_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_MUB_CLK)
 
+    MUB_CLK                   = FEATURE_CLOCK_IP_HAS_MUB_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_OCOTP0_CLK)
 
+    OCOTP0_CLK                = FEATURE_CLOCK_IP_HAS_OCOTP0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PDB0_CLK)
 
+    PDB0_CLK                  = FEATURE_CLOCK_IP_HAS_PDB0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PDB1_CLK)
 
+    PDB1_CLK                  = FEATURE_CLOCK_IP_HAS_PDB1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFEMAC0_RX_CLK)
 
+    PFEMAC0_RX_CLK            = FEATURE_CLOCK_IP_HAS_PFEMAC0_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFEMAC0_TX_DIV_CLK)
 
+    PFEMAC0_TX_DIV_CLK            = FEATURE_CLOCK_IP_HAS_PFEMAC0_TX_DIV_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFEMAC0_TX_CLK)
 
+    PFEMAC0_TX_CLK            = FEATURE_CLOCK_IP_HAS_PFEMAC0_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFEMAC1_RX_CLK)
 
+    PFEMAC1_RX_CLK            = FEATURE_CLOCK_IP_HAS_PFEMAC1_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFEMAC1_TX_CLK)
 
+    PFEMAC1_TX_CLK            = FEATURE_CLOCK_IP_HAS_PFEMAC1_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFEMAC2_RX_CLK)
 
+    PFEMAC2_RX_CLK            = FEATURE_CLOCK_IP_HAS_PFEMAC2_RX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PFEMAC2_TX_CLK)
 
+    PFEMAC2_TX_CLK            = FEATURE_CLOCK_IP_HAS_PFEMAC2_TX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PIT0_CLK)
 
+    PIT0_CLK                  = FEATURE_CLOCK_IP_HAS_PIT0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PIT1_CLK)
 
+    PIT1_CLK                  = FEATURE_CLOCK_IP_HAS_PIT1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PIT2_CLK)
 
+    PIT2_CLK                  = FEATURE_CLOCK_IP_HAS_PIT2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PIT3_CLK)
 
+    PIT3_CLK                  = FEATURE_CLOCK_IP_HAS_PIT3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PIT4_CLK)
 
+    PIT4_CLK                  = FEATURE_CLOCK_IP_HAS_PIT4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PIT5_CLK)
 
+    PIT5_CLK                  = FEATURE_CLOCK_IP_HAS_PIT5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PORTA_CLK)
 
+    PORTA_CLK                 = FEATURE_CLOCK_IP_HAS_PORTA_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PORTB_CLK)
 
+    PORTB_CLK                 = FEATURE_CLOCK_IP_HAS_PORTB_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PORTC_CLK)
 
+    PORTC_CLK                 = FEATURE_CLOCK_IP_HAS_PORTC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PORTD_CLK)
 
+    PORTD_CLK                 = FEATURE_CLOCK_IP_HAS_PORTD_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PORTE_CLK)
 
+    PORTE_CLK                 = FEATURE_CLOCK_IP_HAS_PORTE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PSI5_0_CLK)
 
+    PSI5_0_CLK                = FEATURE_CLOCK_IP_HAS_PSI5_0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PSI5_1_CLK)
 
+    PSI5_1_CLK                = FEATURE_CLOCK_IP_HAS_PSI5_1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PSI5S_0_CLK)
 
+    PSI5S_0_CLK               = FEATURE_CLOCK_IP_HAS_PSI5S_0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_PSI5S_1_CLK)
 
+    PSI5S_1_CLK               = FEATURE_CLOCK_IP_HAS_PSI5S_1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI_CLK)
 
+    QSPI_CLK             = FEATURE_CLOCK_IP_HAS_QSPI_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI_SFIF_CLK_HYP_PREMUX_CLK)
 
+    QSPI_SFIF_CLK_HYP_PREMUX_CLK = FEATURE_CLOCK_IP_HAS_QSPI_SFIF_CLK_HYP_PREMUX_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI_SFIF_CLK)
 
+    QSPI_SFIF_CLK             = FEATURE_CLOCK_IP_HAS_QSPI_SFIF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI_2xSFIF_CLK)
 
+    QSPI_2xSFIF_CLK           = FEATURE_CLOCK_IP_HAS_QSPI_2xSFIF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI_2X_CLK)
 
+    QSPI_2X_CLK                  = FEATURE_CLOCK_IP_HAS_QSPI_2X_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI_1X_CLK)
 
+    QSPI_1X_CLK                  = FEATURE_CLOCK_IP_HAS_QSPI_1X_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI_SFCK_CLK)
 
+    QSPI_SFCK_CLK             = FEATURE_CLOCK_IP_HAS_QSPI_SFCK_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI0_CLK)
 
+    QSPI0_CLK                 = FEATURE_CLOCK_IP_HAS_QSPI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI0_RAM_CLK)
 
+    QSPI0_RAM_CLK             = FEATURE_CLOCK_IP_HAS_QSPI0_RAM_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI0_SFCK_CLK)
 
+    QSPI0_SFCK_CLK            = FEATURE_CLOCK_IP_HAS_QSPI0_SFCK_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI0_TX_MEM_CLK)
 
+    QSPI0_TX_MEM_CLK          = FEATURE_CLOCK_IP_HAS_QSPI0_TX_MEM_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_QSPI1_CLK)
 
+    QSPI1_CLK                 = FEATURE_CLOCK_IP_HAS_QSPI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_CLKOUT_SRC_CLK)
 
+    P0_CLKOUT_SRC_CLK         = FEATURE_CLOCK_IP_HAS_P0_CLKOUT_SRC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_CTU_PER_CLK)
 
+    P0_CTU_PER_CLK            = FEATURE_CLOCK_IP_HAS_P0_CTU_PER_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_DSPI_CLK)
 
+    P0_DSPI_CLK               = FEATURE_CLOCK_IP_HAS_P0_DSPI_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_DSPI_MSC_CLK)
 
+    P0_DSPI_MSC_CLK           = FEATURE_CLOCK_IP_HAS_P0_DSPI_MSC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_EMIOS_LCU_CLK)
 
+    P0_EMIOS_LCU_CLK          = FEATURE_CLOCK_IP_HAS_P0_EMIOS_LCU_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_FR_PE_CLK)
 
+    P0_FR_PE_CLK              = FEATURE_CLOCK_IP_HAS_P0_FR_PE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_GTM_CLK)
 
+    P0_GTM_CLK                = FEATURE_CLOCK_IP_HAS_P0_GTM_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_GTM_NOC_CLK)
 
+    P0_GTM_NOC_CLK            = FEATURE_CLOCK_IP_HAS_P0_GTM_NOC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_GTM_TS_CLK)
 
+    P0_GTM_TS_CLK             = FEATURE_CLOCK_IP_HAS_P0_GTM_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_LIN_BAUD_CLK)
 
+    P0_LIN_BAUD_CLK           = FEATURE_CLOCK_IP_HAS_P0_LIN_BAUD_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_LIN_CLK)
 
+    P0_LIN_CLK                = FEATURE_CLOCK_IP_HAS_P0_LIN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_NANO_CLK)
 
+    P0_NANO_CLK               = FEATURE_CLOCK_IP_HAS_P0_NANO_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_125K_CLK)
 
+    P0_PSI5_125K_CLK          = FEATURE_CLOCK_IP_HAS_P0_PSI5_125K_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_189K_CLK)
 
+    P0_PSI5_189K_CLK          = FEATURE_CLOCK_IP_HAS_P0_PSI5_189K_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_1US_CLK)
 
+    P0_PSI5_1US_CLK           = FEATURE_CLOCK_IP_HAS_P0_PSI5_1US_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_BAUD_CLK)
 
+    P0_PSI5_S_BAUD_CLK        = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_BAUD_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_CORE_CLK)
 
+    P0_PSI5_S_CORE_CLK        = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_CORE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_TRIG0_CLK)
 
+    P0_PSI5_S_TRIG0_CLK       = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_TRIG0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_TRIG1_CLK)
 
+    P0_PSI5_S_TRIG1_CLK       = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_TRIG1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_TRIG2_CLK)
 
+    P0_PSI5_S_TRIG2_CLK       = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_TRIG2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_TRIG3_CLK)
 
+    P0_PSI5_S_TRIG3_CLK       = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_TRIG3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_UART_CLK)
 
+    P0_PSI5_S_UART_CLK        = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_UART_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_WDOG0_CLK)
 
+    P0_PSI5_S_WDOG0_CLK       = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_WDOG0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_WDOG1_CLK)
 
+    P0_PSI5_S_WDOG1_CLK       = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_WDOG1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_WDOG2_CLK)
 
+    P0_PSI5_S_WDOG2_CLK       = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_WDOG2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_PSI5_S_WDOG3_CLK)
 
+    P0_PSI5_S_WDOG3_CLK       = FEATURE_CLOCK_IP_HAS_P0_PSI5_S_WDOG3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_REG_INTF_2X_CLK)
 
+    P0_REG_INTF_2X_CLK        = FEATURE_CLOCK_IP_HAS_P0_REG_INTF_2X_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P0_REG_INTF_CLK)
 
+    P0_REG_INTF_CLK           = FEATURE_CLOCK_IP_HAS_P0_REG_INTF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_CLKOUT_SRC_CLK)
 
+    P1_CLKOUT_SRC_CLK         = FEATURE_CLOCK_IP_HAS_P1_CLKOUT_SRC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_DSPI_CLK)
 
+    P1_DSPI_CLK               = FEATURE_CLOCK_IP_HAS_P1_DSPI_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_DSPI60_CLK)
 
+    P1_DSPI60_CLK             = FEATURE_CLOCK_IP_HAS_P1_DSPI60_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_LFAST0_REF_CLK)
 
+    P1_LFAST0_REF_CLK         = FEATURE_CLOCK_IP_HAS_P1_LFAST0_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_LFAST1_REF_CLK)
 
+    P1_LFAST1_REF_CLK         = FEATURE_CLOCK_IP_HAS_P1_LFAST1_REF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_LFAST_DFT_CLK)
 
+    P1_LFAST_DFT_CLK          = FEATURE_CLOCK_IP_HAS_P1_LFAST_DFT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_NETC_AXI_CLK)
 
+    P1_NETC_AXI_CLK           = FEATURE_CLOCK_IP_HAS_P1_NETC_AXI_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_LIN_BAUD_CLK)
 
+    P1_LIN_BAUD_CLK           = FEATURE_CLOCK_IP_HAS_P1_LIN_BAUD_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_LIN_CLK)
 
+    P1_LIN_CLK                = FEATURE_CLOCK_IP_HAS_P1_LIN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH_TS_CLK)
 
+    ETH_TS_CLK                = FEATURE_CLOCK_IP_HAS_ETH_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH_TS_DIV4_CLK)
 
+    ETH_TS_DIV4_CLK           = FEATURE_CLOCK_IP_HAS_ETH_TS_DIV4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH0_REF_RMII_CLK)
 
+    ETH0_REF_RMII_CLK         = FEATURE_CLOCK_IP_HAS_ETH0_REF_RMII_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH0_RX_MII_CLK)
 
+    ETH0_RX_MII_CLK           = FEATURE_CLOCK_IP_HAS_ETH0_RX_MII_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH0_RX_RGMII_CLK)
 
+    ETH0_RX_RGMII_CLK         = FEATURE_CLOCK_IP_HAS_ETH0_RX_RGMII_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH0_TX_MII_CLK)
 
+    ETH0_TX_MII_CLK           = FEATURE_CLOCK_IP_HAS_ETH0_TX_MII_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH0_TX_RGMII_CLK)
 
+    ETH0_TX_RGMII_CLK         = FEATURE_CLOCK_IP_HAS_ETH0_TX_RGMII_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH0_TX_RGMII_LPBK_CLK)
 
+    ETH0_TX_RGMII_LPBK_CLK    = FEATURE_CLOCK_IP_HAS_ETH0_TX_RGMII_LPBK_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH1_REF_RMII_CLK)
 
+    ETH1_REF_RMII_CLK         = FEATURE_CLOCK_IP_HAS_ETH1_REF_RMII_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH1_RX_MII_CLK)
 
+    ETH1_RX_MII_CLK           = FEATURE_CLOCK_IP_HAS_ETH1_RX_MII_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH1_RX_RGMII_CLK)
 
+    ETH1_RX_RGMII_CLK         = FEATURE_CLOCK_IP_HAS_ETH1_RX_RGMII_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH1_TX_MII_CLK)
 
+    ETH1_TX_MII_CLK           = FEATURE_CLOCK_IP_HAS_ETH1_TX_MII_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH1_TX_RGMII_CLK)
 
+    ETH1_TX_RGMII_CLK         = FEATURE_CLOCK_IP_HAS_ETH1_TX_RGMII_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_ETH1_TX_RGMII_LPBK_CLK)
 
+    ETH1_TX_RGMII_LPBK_CLK    = FEATURE_CLOCK_IP_HAS_ETH1_TX_RGMII_LPBK_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P1_REG_INTF_CLK)
 
+    P1_REG_INTF_CLK           = FEATURE_CLOCK_IP_HAS_P1_REG_INTF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P2_DBG_ATB_CLK)
 
+    P2_DBG_ATB_CLK            = FEATURE_CLOCK_IP_HAS_P2_DBG_ATB_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P2_REG_INTF_CLK)
 
+    P2_REG_INTF_CLK           = FEATURE_CLOCK_IP_HAS_P2_REG_INTF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_AES_CLK)
 
+    P3_AES_CLK                = FEATURE_CLOCK_IP_HAS_P3_AES_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_CAN_PE_CLK)
 
+    P3_CAN_PE_CLK             = FEATURE_CLOCK_IP_HAS_P3_CAN_PE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_CLKOUT_SRC_CLK)
 
+    P3_CLKOUT_SRC_CLK         = FEATURE_CLOCK_IP_HAS_P3_CLKOUT_SRC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_DBG_TS_CLK)
 
+    P3_DBG_TS_CLK             = FEATURE_CLOCK_IP_HAS_P3_DBG_TS_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_REG_INTF_CLK)
 
+    P3_REG_INTF_CLK           = FEATURE_CLOCK_IP_HAS_P3_REG_INTF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_SYS_MON1_CLK)
 
+    P3_SYS_MON1_CLK           = FEATURE_CLOCK_IP_HAS_P3_SYS_MON1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_SYS_MON2_CLK)
 
+    P3_SYS_MON2_CLK           = FEATURE_CLOCK_IP_HAS_P3_SYS_MON2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P3_SYS_MON3_CLK)
 
+    P3_SYS_MON3_CLK           = FEATURE_CLOCK_IP_HAS_P3_SYS_MON3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_CLKOUT_SRC_CLK)
 
+    P4_CLKOUT_SRC_CLK         = FEATURE_CLOCK_IP_HAS_P4_CLKOUT_SRC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_DSPI_CLK)
 
+    P4_DSPI_CLK               = FEATURE_CLOCK_IP_HAS_P4_DSPI_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_DSPI60_CLK)
 
+    P4_DSPI60_CLK             = FEATURE_CLOCK_IP_HAS_P4_DSPI60_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_EMIOS_LCU_CLK)
 
+    P4_EMIOS_LCU_CLK          = FEATURE_CLOCK_IP_HAS_P4_EMIOS_LCU_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_LIN_BAUD_CLK)
 
+    P4_LIN_BAUD_CLK           = FEATURE_CLOCK_IP_HAS_P4_LIN_BAUD_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_LIN_CLK)
 
+    P4_LIN_CLK                = FEATURE_CLOCK_IP_HAS_P4_LIN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_125K_CLK)
 
+    P4_PSI5_125K_CLK          = FEATURE_CLOCK_IP_HAS_P4_PSI5_125K_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_189K_CLK)
 
+    P4_PSI5_189K_CLK          = FEATURE_CLOCK_IP_HAS_P4_PSI5_189K_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_1US_CLK)
 
+    P4_PSI5_1US_CLK           = FEATURE_CLOCK_IP_HAS_P4_PSI5_1US_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_BAUD_CLK)
 
+    P4_PSI5_S_BAUD_CLK        = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_BAUD_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_CORE_CLK)
 
+    P4_PSI5_S_CORE_CLK        = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_CORE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_TRIG0_CLK)
 
+    P4_PSI5_S_TRIG0_CLK       = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_TRIG0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_TRIG1_CLK)
 
+    P4_PSI5_S_TRIG1_CLK       = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_TRIG1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_TRIG2_CLK)
 
+    P4_PSI5_S_TRIG2_CLK       = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_TRIG2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_TRIG3_CLK)
 
+    P4_PSI5_S_TRIG3_CLK       = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_TRIG3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_UART_CLK)
 
+    P4_PSI5_S_UART_CLK        = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_UART_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_WDOG0_CLK)
 
+    P4_PSI5_S_WDOG0_CLK       = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_WDOG0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_WDOG1_CLK)
 
+    P4_PSI5_S_WDOG1_CLK       = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_WDOG1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_WDOG2_CLK)
 
+    P4_PSI5_S_WDOG2_CLK       = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_WDOG2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_PSI5_S_WDOG3_CLK)
 
+    P4_PSI5_S_WDOG3_CLK       = FEATURE_CLOCK_IP_HAS_P4_PSI5_S_WDOG3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_QSPI0_2X_CLK)
 
+    P4_QSPI0_2X_CLK           = FEATURE_CLOCK_IP_HAS_P4_QSPI0_2X_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_QSPI0_1X_CLK)
 
+    P4_QSPI0_1X_CLK           = FEATURE_CLOCK_IP_HAS_P4_QSPI0_1X_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_QSPI1_2X_CLK)
 
+    P4_QSPI1_2X_CLK           = FEATURE_CLOCK_IP_HAS_P4_QSPI1_2X_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_QSPI1_1X_CLK)
 
+    P4_QSPI1_1X_CLK           = FEATURE_CLOCK_IP_HAS_P4_QSPI1_1X_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_REG_INTF_2X_CLK)
 
+    P4_REG_INTF_2X_CLK        = FEATURE_CLOCK_IP_HAS_P4_REG_INTF_2X_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_REG_INTF_CLK)
 
+    P4_REG_INTF_CLK           = FEATURE_CLOCK_IP_HAS_P4_REG_INTF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_SDHC_CLK)
 
+    P4_SDHC_CLK               = FEATURE_CLOCK_IP_HAS_P4_SDHC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_SDHC_IP_CLK)
 
+    P4_SDHC_IP_CLK            = FEATURE_CLOCK_IP_HAS_P4_SDHC_IP_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P4_SDHC_IP_DIV2_CLK)
 
+    P4_SDHC_IP_DIV2_CLK       = FEATURE_CLOCK_IP_HAS_P4_SDHC_IP_DIV2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_AE_CLK)
 
+    P5_AE_CLK           = FEATURE_CLOCK_IP_HAS_P5_AE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_CANXL_PE_CLK)
 
+    P5_CANXL_PE_CLK           = FEATURE_CLOCK_IP_HAS_P5_CANXL_PE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_CLKOUT_SRC_CLK)
 
+    P5_CLKOUT_SRC_CLK         = FEATURE_CLOCK_IP_HAS_P5_CLKOUT_SRC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_DSPI_CLK)
 
+    P5_DSPI_CLK               = FEATURE_CLOCK_IP_HAS_P5_DSPI_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_DIPORT_CLK)
 
+    P5_DIPORT_CLK               = FEATURE_CLOCK_IP_HAS_P5_DIPORT_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_LIN_BAUD_CLK)
 
+    P5_LIN_BAUD_CLK           = FEATURE_CLOCK_IP_HAS_P5_LIN_BAUD_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_LIN_CLK)
 
+    P5_LIN_CLK                = FEATURE_CLOCK_IP_HAS_P5_LIN_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P5_REG_INTF_CLK)
 
+    P5_REG_INTF_CLK           = FEATURE_CLOCK_IP_HAS_P5_REG_INTF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_P6_REG_INTF_CLK)
 
+    P6_REG_INTF_CLK           = FEATURE_CLOCK_IP_HAS_P6_REG_INTF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU0_REG_INTF_CLK)
 
+    RTU0_REG_INTF_CLK         = FEATURE_CLOCK_IP_HAS_RTU0_REG_INTF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU0_CORE_MON_CLK)
 
+    RTU0_CORE_MON_CLK         = FEATURE_CLOCK_IP_HAS_RTU0_CORE_MON_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU0_CORE_DIV2_MON1_CLK)
 
+    RTU0_CORE_DIV2_MON1_CLK   = FEATURE_CLOCK_IP_HAS_RTU0_CORE_DIV2_MON1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU0_CORE_DIV2_MON2_CLK)
 
+    RTU0_CORE_DIV2_MON2_CLK   = FEATURE_CLOCK_IP_HAS_RTU0_CORE_DIV2_MON2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU0_CORE_DIV2_MON3_CLK)
 
+    RTU0_CORE_DIV2_MON3_CLK   = FEATURE_CLOCK_IP_HAS_RTU0_CORE_DIV2_MON3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU0_CORE_DIV2_MON4_CLK)
 
+    RTU0_CORE_DIV2_MON4_CLK   = FEATURE_CLOCK_IP_HAS_RTU0_CORE_DIV2_MON4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU1_REG_INTF_CLK)
 
+    RTU1_REG_INTF_CLK         = FEATURE_CLOCK_IP_HAS_RTU1_REG_INTF_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU1_CORE_MON_CLK)
 
+    RTU1_CORE_MON_CLK         = FEATURE_CLOCK_IP_HAS_RTU1_CORE_MON_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU1_CORE_DIV2_MON1_CLK)
 
+    RTU1_CORE_DIV2_MON1_CLK   = FEATURE_CLOCK_IP_HAS_RTU1_CORE_DIV2_MON1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU1_CORE_DIV2_MON2_CLK)
 
+    RTU1_CORE_DIV2_MON2_CLK   = FEATURE_CLOCK_IP_HAS_RTU1_CORE_DIV2_MON2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU1_CORE_DIV2_MON3_CLK)
 
+    RTU1_CORE_DIV2_MON3_CLK   = FEATURE_CLOCK_IP_HAS_RTU1_CORE_DIV2_MON3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTU1_CORE_DIV2_MON4_CLK)
 
+    RTU1_CORE_DIV2_MON4_CLK   = FEATURE_CLOCK_IP_HAS_RTU1_CORE_DIV2_MON4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTC_CLK)
 
+    RTC_CLK                   = FEATURE_CLOCK_IP_HAS_RTC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_RTC0_CLK)
 
+    RTC0_CLK                  = FEATURE_CLOCK_IP_HAS_RTC0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SAI0_CLK)
 
+    SAI0_CLK                  = FEATURE_CLOCK_IP_HAS_SAI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SAI1_CLK)
 
+    SAI1_CLK                  = FEATURE_CLOCK_IP_HAS_SAI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SDHC0_CLK)
 
+    SDHC0_CLK                 = FEATURE_CLOCK_IP_HAS_SDHC0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SEMA42_CLK)
 
+    SEMA42_CLK                = FEATURE_CLOCK_IP_HAS_SEMA42_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIPI0_CLK)
 
+    SIPI0_CLK                 = FEATURE_CLOCK_IP_HAS_SIPI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIPI1_CLK)
 
+    SIPI1_CLK                 = FEATURE_CLOCK_IP_HAS_SIPI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIUL0_CLK)
 
+    SIUL0_CLK                 = FEATURE_CLOCK_IP_HAS_SIUL0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIUL1_CLK)
 
+    SIUL1_CLK                 = FEATURE_CLOCK_IP_HAS_SIUL1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIUL2_0_CLK)
 
+    SIUL2_0_CLK               = FEATURE_CLOCK_IP_HAS_SIUL2_0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIUL2_1_CLK)
 
+    SIUL2_1_CLK               = FEATURE_CLOCK_IP_HAS_SIUL2_1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIUL2_4_CLK)
 
+    SIUL2_4_CLK               = FEATURE_CLOCK_IP_HAS_SIUL2_4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SIUL2_5_CLK)
 
+    SIUL2_5_CLK               = FEATURE_CLOCK_IP_HAS_SIUL2_5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI_CLK)
 
+    SPI_CLK                   = FEATURE_CLOCK_IP_HAS_SPI_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI0_CLK)
 
+    SPI0_CLK                  = FEATURE_CLOCK_IP_HAS_SPI0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI1_CLK)
 
+    SPI1_CLK                  = FEATURE_CLOCK_IP_HAS_SPI1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI2_CLK)
 
+    SPI2_CLK                  = FEATURE_CLOCK_IP_HAS_SPI2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI3_CLK)
 
+    SPI3_CLK                  = FEATURE_CLOCK_IP_HAS_SPI3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI4_CLK)
 
+    SPI4_CLK                  = FEATURE_CLOCK_IP_HAS_SPI4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI5_CLK)
 
+    SPI5_CLK                  = FEATURE_CLOCK_IP_HAS_SPI5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI6_CLK)
 
+    SPI6_CLK                  = FEATURE_CLOCK_IP_HAS_SPI6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI7_CLK)
 
+    SPI7_CLK                  = FEATURE_CLOCK_IP_HAS_SPI7_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI8_CLK)
 
+    SPI8_CLK                  = FEATURE_CLOCK_IP_HAS_SPI8_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SPI9_CLK)
 
+    SPI9_CLK                  = FEATURE_CLOCK_IP_HAS_SPI9_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SRX0_CLK)
 
+    SRX0_CLK                  = FEATURE_CLOCK_IP_HAS_SRX0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SRX1_CLK)
 
+    SRX1_CLK                  = FEATURE_CLOCK_IP_HAS_SRX1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STCU0_CLK)
 
+    STCU0_CLK                 = FEATURE_CLOCK_IP_HAS_STCU0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STM0_CLK)
 
+    STM0_CLK                  = FEATURE_CLOCK_IP_HAS_STM0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STM1_CLK)
 
+    STM1_CLK                  = FEATURE_CLOCK_IP_HAS_STM1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STM2_CLK)
 
+    STM2_CLK                  = FEATURE_CLOCK_IP_HAS_STM2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STM3_CLK)
 
+    STM3_CLK                  = FEATURE_CLOCK_IP_HAS_STM3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STM4_CLK)
 
+    STM4_CLK                  = FEATURE_CLOCK_IP_HAS_STM4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STM5_CLK)
 
+    STM5_CLK                  = FEATURE_CLOCK_IP_HAS_STM5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STM6_CLK)
 
+    STM6_CLK                  = FEATURE_CLOCK_IP_HAS_STM6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STM7_CLK)
 
+    STM7_CLK                  = FEATURE_CLOCK_IP_HAS_STM7_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STMA_CLK)
 
+    STMA_CLK                  = FEATURE_CLOCK_IP_HAS_STMA_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_STMB_CLK)
 
+    STMB_CLK                  = FEATURE_CLOCK_IP_HAS_STMB_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SWT0_CLK)
 
+    SWT0_CLK                  = FEATURE_CLOCK_IP_HAS_SWT0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SWT1_CLK)
 
+    SWT1_CLK                  = FEATURE_CLOCK_IP_HAS_SWT1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SWT2_CLK)
 
+    SWT2_CLK                  = FEATURE_CLOCK_IP_HAS_SWT2_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SWT3_CLK)
 
+    SWT3_CLK                  = FEATURE_CLOCK_IP_HAS_SWT3_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SWT4_CLK)
 
+    SWT4_CLK                  = FEATURE_CLOCK_IP_HAS_SWT4_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SWT5_CLK)
 
+    SWT5_CLK                  = FEATURE_CLOCK_IP_HAS_SWT5_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SWT6_CLK)
 
+    SWT6_CLK                  = FEATURE_CLOCK_IP_HAS_SWT6_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_TCM_CM7_0_CLK)
 
+    TCM_CM7_0_CLK             = FEATURE_CLOCK_IP_HAS_TCM_CM7_0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_TCM_CM7_1_CLK)
 
+    TCM_CM7_1_CLK             = FEATURE_CLOCK_IP_HAS_TCM_CM7_1_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_TEMPSENSE_CLK)
 
+    TEMPSENSE_CLK             = FEATURE_CLOCK_IP_HAS_TEMPSENSE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_TRACE_CLK)
 
+    TRACE_CLK                 = FEATURE_CLOCK_IP_HAS_TRACE_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_TRGMUX0_CLK)
 
+    TRGMUX0_CLK               = FEATURE_CLOCK_IP_HAS_TRGMUX0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_TSENSE0_CLK)
 
+    TSENSE0_CLK               = FEATURE_CLOCK_IP_HAS_TSENSE0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_SDHC_CLK)
 
+    SDHC_CLK                  = FEATURE_CLOCK_IP_HAS_SDHC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_USDHC_CLK)
 
+    USDHC_CLK                 = FEATURE_CLOCK_IP_HAS_USDHC_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_USDHC0_CLK)
 
+    USDHC0_CLK                = FEATURE_CLOCK_IP_HAS_USDHC0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_WKPU0_CLK)
 
+    WKPU0_CLK                 = FEATURE_CLOCK_IP_HAS_WKPU0_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_XBAR_DIV3_FAIL_CLK)
 
+    XBAR_DIV3_FAIL_CLK        = FEATURE_CLOCK_IP_HAS_XBAR_DIV3_FAIL_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_XBAR_MIPICSI201_CLK)
 
+    XBAR_MIPICSI201_CLK       = FEATURE_CLOCK_IP_HAS_XBAR_MIPICSI201_CLK,
 
+#endif
 
+#if defined(FEATURE_CLOCK_IP_HAS_XBAR_MIPICSI223_CLK)
 
+    XBAR_MIPICSI223_CLK       = FEATURE_CLOCK_IP_HAS_XBAR_MIPICSI223_CLK,
 
+#endif
 
+RESERVED_CLK                  = FEATURE_CLOCKS_NO,  /* Invalid clock name */
 
+} Clock_Ip_NameType;
 
+
 
+/** @brief Clock ip status return codes. */
 
+typedef enum
 
+{
 
+    CLOCK_IP_SUCCESS                            = 0x00U,    /**< Clock tree was initialized successfully. */
 
+    CLOCK_IP_ERROR                              = 0x01U,    /**< One of the elements timeout, clock tree couldn't be initialized. */
 
+
 
+} Clock_Ip_StatusType;
 
+
 
+/** @brief Clock ip pll status return codes. */
 
+typedef enum
 
+{
 
+    CLOCK_IP_PLL_LOCKED                         = 0x00U,    /**< PLL is locked */
 
+    CLOCK_IP_PLL_UNLOCKED                       = 0x01U,    /**< PLL is unlocked */
 
+    CLOCK_IP_PLL_STATUS_UNDEFINED               = 0x02U,    /**< PLL Status is unknown */
 
+
 
+} Clock_Ip_PllStatusType;
 
+
 
+/** @brief Clock ip cmu status return codes. */
 
+typedef enum
 
+{
 
+    CLOCK_IP_CMU_IN_RANGE                        = 0x00U,    /**< Frequency is in range */
 
+    CLOCK_IP_CMU_HIGH_FREQ                       = 0x01U,    /**< Frequency is higher than high limit */
 
+    CLOCK_IP_CMU_LOW_FREQ                        = 0x02U,    /**< Frequency is lower than low limit */
 
+    CLOCK_IP_CMU_STATUS_UNDEFINED                = 0X03U,    /**< CMU status is unknown */
 
+} Clock_Ip_CmuStatusType;
 
+
 
+/** @brief Clock ip report error types. */
 
+typedef enum
 
+{
 
+    CLOCK_IP_CMU_NOTIFICATION                   = 0U,   /**< @brief Cmu Fccu notification. */
 
+    CLOCK_IP_REPORT_TIMEOUT_ERROR               = 1U,   /**< @brief Report Timeout Error. */
 
+    CLOCK_IP_REPORT_FXOSC_CONFIGURATION_ERROR   = 2U,   /**< @brief Report Fxosc Configuration Error. */
 
+    CLOCK_IP_REPORT_CLOCK_MUX_SWITCH_ERROR      = 3U,   /**< @brief Report Clock Mux Switch Error. */
 
+    CLOCK_IP_RAM_MEMORY_CONFIG_ENTRY_POINT      = 4U,   /**< @brief Ram config entry point. */
 
+    CLOCK_IP_RAM_MEMORY_CONFIG_EXIT_POINT       = 5U,   /**< @brief Ram config exit point. */
 
+    CLOCK_IP_FLASH_MEMORY_CONFIG_ENTRY_POINT    = 6U,   /**< @brief Flash config entry point. */
 
+    CLOCK_IP_FLASH_MEMORY_CONFIG_EXIT_POINT     = 7U,   /**< @brief Flash config exit point. */
 
+
 
+} Clock_Ip_ClockNotificationType;
 
+
 
+/*!
 
+ * @brief Clock notifications callback type.
 
+ * Implements ClockNotificationsCallbackType_Class
 
+ */
 
+typedef void (*Clock_Ip_NotificationsCallbackType)(Clock_Ip_ClockNotificationType error, Clock_Ip_NameType clockName);
 
+
 
+/*!
 
+ * @brief Clock Source IRCOSC configuration structure.
 
+ * Implements Clock_Ip_IrcoscConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType             name;               /**< Clock name associated to ircosc */
 
+    uint16                        enable;             /**< Enable ircosc. */
 
+
 
+    uint8                         regulator;          /**< Enable regulator. */
 
+    uint8                         range;              /**< Ircosc range. */
 
+    uint8                         lowPowerModeEnable; /**< Ircosc enable in VLP mode */
 
+    uint8                         stopModeEnable;     /**< Ircosc enable in STOP mode */
 
+
 
+} Clock_Ip_IrcoscConfigType;
 
+
 
+/*!
 
+ * @brief CGM Clock Source XOSC configuration structure.
 
+ * Implements Clock_Ip_XoscConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType       name;               /**< Clock name associated to xosc */
 
+
 
+    uint32                  freq;               /**< External oscillator frequency. */
 
+
 
+    uint16                  enable;             /**< Enable xosc. */
 
+
 
+    uint16                  startupDelay;       /**< Startup stabilization time. */
 
+    uint8                   bypassOption;       /**< XOSC bypass option */
 
+    uint8                   compEn;             /**< Comparator enable */
 
+    uint8                   transConductance;   /**< Crystal overdrive protection */
 
+
 
+    uint8                   gain;               /**< Gain value */
 
+    uint8                   monitor;            /**< Monitor type */
 
+
 
+
 
+} Clock_Ip_XoscConfigType;
 
+
 
+/*!
 
+ * @brief CGM Clock Source PLLDIG configuration structure.
 
+ * Implements Clock_Ip_PllConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType        name;                           /**< Clock name associated to pll */
 
+
 
+    uint16                   enable;                         /**< Enable pll. */
 
+
 
+    Clock_Ip_NameType        inputReference;                 /**< Input reference. */
 
+
 
+    uint8                    bypass;                         /**< Bypass pll. */
 
+
 
+    uint8                    predivider;                     /**< Input clock predivider. (PREDIV) */
 
+    uint16                   numeratorFracLoopDiv;           /**< Numerator of fractional loop division factor (MFN) */
 
+    uint8                    mulFactorDiv;                   /**< Multiplication factor divider (MFD) */
 
+
 
+    uint8                    modulationFrequency;            /**< Enable/disable modulation */
 
+    uint8                    modulationType;                 /**< Modulation type */
 
+    uint16                   modulationPeriod;               /**< Stepsize - modulation period */
 
+    uint16                   incrementStep;                  /**< Stepno  - step no */
 
+
 
+    uint8                    sigmaDelta;                     /**< Sigma Delta Modulation Enable */
 
+
 
+    uint8                    ditherControl;                  /**< Dither control enable */
 
+    uint8                    ditherControlValue;             /**< Dither control value */
 
+
 
+    uint8                    monitor;                        /**< Monitor type */
 
+
 
+} Clock_Ip_PllConfigType;
 
+
 
+/*!
 
+ * @brief Clock selector configuration structure.
 
+ * Implements Clock_Ip_SelectorConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType               name;                           /**< Clock name associated to selector */
 
+    Clock_Ip_NameType               value;                          /**< Name of the selected input source */
 
+
 
+} Clock_Ip_SelectorConfigType;
 
+
 
+/*!
 
+ * @brief Clock divider configuration structure.
 
+ * Implements Clock_Ip_DividerConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType         name;                           /**< Clock name associated to divider. */
 
+    uint32                    value;                          /**< Divider value - if value is zero then divider is disabled. */
 
+    uint8                     options[1U];
 
+} Clock_Ip_DividerConfigType;
 
+
 
+
 
+/** @brief Clock ip trigger divider type. */
 
+typedef enum
 
+{
 
+    IMMEDIATE_DIVIDER_UPDATE,          /**< @brief Immediate divider update. */
 
+    COMMON_TRIGGER_DIVIDER_UPDATE,     /**< @brief Common trigger divider update.  */
 
+
 
+} Clock_Ip_TriggerDividerType;
 
+
 
+/*!
 
+ * @brief Clock divider trigger configuration structure.
 
+ * Implements Clock_Ip_DividerTriggerConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType             name;                           /**< Clock name associated to divider for which trigger is configured. */
 
+    Clock_Ip_TriggerDividerType   triggerType;                    /**< Trigger value - if value is zero then divider is updated immediately, divider is not triggered. */
 
+    Clock_Ip_NameType             source;                         /**< Clock name of the common input source of all dividers from the same group that support a common update */
 
+
 
+} Clock_Ip_DividerTriggerConfigType;
 
+
 
+
 
+
 
+/*!
 
+ * @brief Clock fractional divider configuration structure.
 
+ * Implements Clock_Ip_FracDivConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType         name;                           /**< Clock name associated to fractional divider. */
 
+    uint8                     enable;                         /**< Enable control for port n */
 
+    uint32                    value[2U];                      /**< Fractional dividers */
 
+
 
+} Clock_Ip_FracDivConfigType;
 
+
 
+/*!
 
+ * @brief Clock external clock configuration structure.
 
+ * Implements Clock_Ip_ExtClkConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType         name;                           /**< Clock name of the external clock. */
 
+    uint32                    value;                          /**< Enable value - if value is zero then clock is gated, otherwise is enabled in different modes. */
 
+
 
+} Clock_Ip_ExtClkConfigType;
 
+
 
+/*!
 
+ * @brief Clock Source PCFS configuration structure.
 
+ * Implements Clock_Ip_PcfsConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType             name;                        /**<  Clock source from which ramp-down and to which ramp-up are processed. */
 
+    uint32                        maxAllowableIDDchange;       /**<  Maximum variation of current per time (mA/microsec) -  max allowable IDD change is determined by the user's power supply design. */
 
+    uint32                        stepDuration;                /**<  Step duration of each PCFS step */
 
+    Clock_Ip_NameType             selectorName;                /**<  Name of the selector that supports PCFS and name is one the inputs that can be selected */
 
+    uint32                        clockSourceFrequency;        /**<  Frequency of the clock source from which ramp-down and to which ramp-up are processed. */
 
+
 
+} Clock_Ip_PcfsConfigType;
 
+
 
+/*!
 
+ * @brief Clock gate clock configuration structure.
 
+ * Implements Clock_Ip_GateConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType         name;                           /**< Clock name associated to clock gate. */
 
+    uint16                    enable;                         /**< Enable or disable clock */
 
+
 
+} Clock_Ip_GateConfigType;
 
+
 
+/*!
 
+ * @brief Clock cmu configuration structure.
 
+ * Implements Clock_Ip_CmuConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType               name;                           /**< Clock name associated to clock monitor. */
 
+    uint8                           enable;                         /**< Enable/disable clock monitor */
 
+    uint32                          interrupt;                      /**< Enable/disable interrupt */
 
+    uint32                          monitoredClockFrequency;        /**< Frequency of the clock source from which ramp-down and to which ramp-up are processed. */
 
+} Clock_Ip_CmuConfigType;
 
+
 
+/*!
 
+ * @brief Configured frequency structure.
 
+ * Implements Clock_Ip_ConfiguredFrequencyType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_NameType               name;                           /**< Clock name of the configured frequency value */
 
+    uint32                          configuredFrequencyValue;       /**< Configured frequency value */
 
+} Clock_Ip_ConfiguredFrequencyType;
 
+
 
+/** @brief specific peripheral. */
 
+typedef enum
 
+{
 
+    RESERVED_VALUE,
 
+} Clock_Ip_SpecificPeriphParamType;
 
+
 
+/*!
 
+ * @brief Clock Specific peripheral configure.
 
+ * Implements Clock_Ip_SpecificPerpihParamType_Class
 
+ */
 
+typedef struct
 
+{
 
+    Clock_Ip_SpecificPeriphParamType     paramsType;
 
+    uint32                               paramsValue;
 
+} Clock_Ip_SpecificPerpihParamType;
 
+
 
+/*!
 
+ * @brief Clock Specific peripheral structure.
 
+ * Implements Clock_IP_SpecificPeriphConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    uint8                                  paramsNo;
 
+    Clock_Ip_SpecificPerpihParamType       params[CLOCK_SPECIFIC_PERIPH_NO];
 
+} Clock_IP_SpecificPeriphConfigType;
 
+
 
+/*!
 
+ * @brief Clock configuration structure.
 
+ * Implements Clock_Ip_ClockConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    uint32                          ClkConfigId;                                        /**< The ID for Clock configuration */
 
+
 
+    uint8   ircoscsCount;                                                               /**< IRCOSCs count */
 
+    uint8   xoscsCount;                                                                 /**< XOSCs count */
 
+    uint8   pllsCount;                                                                  /**< PLLs count */
 
+    uint8   selectorsCount;                                                             /**< Selectors count */
 
+    uint8   dividersCount;                                                              /**< Dividers count */
 
+    uint8   dividerTriggersCount;                                                       /**< Divider triggers count */
 
+    uint8   fracDivsCount;                                                              /**< Fractional dividers count */
 
+    uint8   extClksCount;                                                               /**< External clocks count */
 
+    uint8   gatesCount;                                                                 /**< Clock gates count */
 
+    uint8   pcfsCount;                                                                  /**< Clock pcfs count */
 
+    uint8   cmusCount;                                                                  /**< Clock cmus count */
 
+    uint8   configureFrequenciesCount;                                                  /**< Configured frequencies count */
 
+
 
+    Clock_Ip_IrcoscConfigType          ircoscs[CLOCK_IRCOSCS_NO];                       /**< IRCOSCs */
 
+    Clock_Ip_XoscConfigType            xoscs[CLOCK_XOSCS_NO];                           /**< XOSCs */
 
+    Clock_Ip_PllConfigType             plls[CLOCK_PLLS_NO];                             /**< PLLs */
 
+    Clock_Ip_SelectorConfigType        selectors[CLOCK_SELECTORS_NO];                   /**< Selectors */
 
+    Clock_Ip_DividerConfigType         dividers[CLOCK_DIVIDERS_NO];                     /**< Dividers */
 
+    Clock_Ip_DividerTriggerConfigType  dividerTriggers[CLOCK_DIVIDER_TRIGGERS_NO];      /**< Divider triggers */
 
+    Clock_Ip_FracDivConfigType         fracDivs[CLOCK_FRACTIONAL_DIVIDERS_NO];          /**< Fractional dividers */
 
+    Clock_Ip_ExtClkConfigType          extClks[CLOCK_EXT_CLKS_NO];                      /**< External clocks */
 
+    Clock_Ip_GateConfigType            gates[CLOCK_GATES_NO];                           /**< Clock gates */
 
+    Clock_Ip_PcfsConfigType            pcfs[CLOCK_PCFS_NO];                             /**< Progressive clock switching */
 
+    Clock_Ip_CmuConfigType             cmus[CLOCK_CMUS_NO];                             /**< Clock cmus */
 
+    Clock_IP_SpecificPeriphConfigType  specificPeriphalConfiguration;                   /**< Clock specific peripheral configuration */
 
+    
+    Clock_Ip_ConfiguredFrequencyType   configuredFrequencies[CLOCK_CONFIGURED_FREQUENCIES_NO];     /**< Configured frequency values */
 
+} Clock_Ip_ClockConfigType;
 
+
 
+
 
+/*! @}*/
 
+
 
+#endif /* CLOCK_IP_TYPES_H */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/
 
+

+ 167 - 0
RTD/include/Det.h
Vedi File 

@@ -0,0 +1,167 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef DET_H
 
+#define DET_H
 
+
 
+/**
 
+*   @file Det.h
 
+*
 
+*   @addtogroup DET_MODULE
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*
 
+* @page misra_violations MISRA-C:2012 violations
 
+*
 
+* @section Det_h_REF_1
 
+* Violates MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once.
 
+* This violation is not fixed since the inclusion of <MA>_MemMap.h is as per AUTOSAR requirement [SWS_MemMap_00003].
 
+*
 
+* @section Det_h_REF_2
 
+* Violates MISRA 2012 Advisory Rule 20.1, #Include directives should only be preceded by preprocessor directives or comments.
 
+* <MA>_MemMap.h is included after each section define in order to set the current memory section as defined by AUTOSAR.
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                         INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Std_Types.h"
 
+
 
+/*==================================================================================================
 
+*                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+/**
 
+* @file           Det.h
 
+* @requirements   DET001_PI
 
+*/
 
+
 
+#define DET_VENDOR_ID                       43
 
+#define DET_MODULE_ID                       15
 
+#define DET_AR_RELEASE_MAJOR_VERSION        4
 
+#define DET_AR_RELEASE_MINOR_VERSION        4
 
+#define DET_AR_RELEASE_REVISION_VERSION     0
 
+#define DET_SW_MAJOR_VERSION                1
 
+#define DET_SW_MINOR_VERSION                0
 
+#define DET_SW_PATCH_VERSION                0
 
+
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                           CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       DEFINES AND MACROS
 
+==================================================================================================*/
 
+/* Max numbers of ECU cores supported */
 
+#define DET_NO_ECU_CORES                        (uint8)(10U)
 
+
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                 STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+
 
+/*==================================================================================================
 
+*                                 GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+#define DET_START_SEC_VAR_CLEARED_8_NO_CACHEABLE
 
+/*
 
+ * @violates @ref Det_h_REF_1 Precautions shall be taken in order to prevent the contents of a header file being included more than once
 
+ * @violates @ref Det_h_REF_2 #Include directives should only be preceded by preprocessor directives or comments
 
+ */
 
+#include "Det_MemMap.h"
 
+/* Variables to store last DET error */
 
+extern uint8 Det_InstanceId[DET_NO_ECU_CORES];                /**< @brief DET instance ID*/
 
+extern uint8 Det_ApiId[DET_NO_ECU_CORES];                     /**< @brief DET API ID*/
 
+extern uint8 Det_ErrorId[DET_NO_ECU_CORES];                   /**< @brief DET Error ID*/
 
+/* Variables to store last DET runtime error */
 
+extern uint8 Det_RuntimeInstanceId[DET_NO_ECU_CORES];         /**< @brief DET instance ID*/
 
+extern uint8 Det_RuntimeApiId[DET_NO_ECU_CORES];              /**< @brief DET API ID*/
 
+extern uint8 Det_RuntimeErrorId[DET_NO_ECU_CORES];            /**< @brief DET Error ID*/
 
+/* Variables to store last DET transient error */
 
+extern uint8 Det_TransientInstanceId[DET_NO_ECU_CORES];       /**< @brief DET instance ID*/
 
+extern uint8 Det_TransientApiId[DET_NO_ECU_CORES];            /**< @brief DET API ID*/
 
+extern uint8 Det_TransientFaultId[DET_NO_ECU_CORES];          /**< @brief DET Error ID*/
 
+#define DET_STOP_SEC_VAR_CLEARED_8_NO_CACHEABLE
 
+/*
 
+ * @violates @ref Det_h_REF_1 Precautions shall be taken in order to prevent the contents of a header file being included more than once
 
+ * @violates @ref Det_h_REF_2 #Include directives should only be preceded by preprocessor directives or comments
 
+ */
 
+#include "Det_MemMap.h"
 
+
 
+#define DET_START_SEC_VAR_CLEARED_16_NO_CACHEABLE
 
+/*
 
+ * @violates @ref Det_h_REF_1 Precautions shall be taken in order to prevent the contents of a header file being included more than once
 
+ * @violates @ref Det_h_REF_2 #Include directives should only be preceded by preprocessor directives or comments
 
+ */
 
+#include "Det_MemMap.h"
 
+extern uint16 Det_TransientModuleId[DET_NO_ECU_CORES];       /**< @brief DET module ID*/
 
+extern uint16 Det_ModuleId[DET_NO_ECU_CORES];       /**< @brief DET module ID*/
 
+extern uint16 Det_RuntimeModuleId[DET_NO_ECU_CORES];       /**< @brief DET module ID*/
 
+#define DET_STOP_SEC_VAR_CLEARED_16_NO_CACHEABLE
 
+/*
 
+ * @violates @ref Det_h_REF_1 Precautions shall be taken in order to prevent the contents of a header file being included more than once
 
+ * @violates @ref Det_h_REF_2 #Include directives should only be preceded by preprocessor directives or comments
 
+ */
 
+#include "Det_MemMap.h"
 
+
 
+/*==================================================================================================
 
+*                                     FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define DET_START_SEC_CODE
 
+#include "Det_MemMap.h"
 
+
 
+void Det_Init(void);
 
+Std_ReturnType Det_ReportError(uint16 ModuleId, uint8 InstanceId, uint8 ApiId, uint8 ErrorId);
 
+#if defined(ASR_REL_4_0_REV_0003)
 
+#else
 
+Std_ReturnType Det_ReportRuntimeError(uint16 ModuleId, uint8 InstanceId, uint8 ApiId, uint8 ErrorId);
 
+Std_ReturnType Det_ReportTransientFault(uint16 ModuleId, uint8 InstanceId, uint8 ApiId, uint8 FaultId);
 
+#endif /*if defined(ASR_REL_4_0_REV_0003)*/
 
+void Det_Start(void);
 
+
 
+#define DET_STOP_SEC_CODE
 
+#include "Det_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* DET_H */

+ 100 - 0
RTD/include/Det_stub.h
Vedi File 

@@ -0,0 +1,100 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef DET_STUB_H
 
+#define DET_STUB_H
 
+
 
+/**
 
+*   @file Det_stub.h
 
+*
 
+*   @addtogroup DET_MODULE
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C" {
 
+#endif
 
+
 
+
 
+
 
+/*===============================================================================================
 
+*                                         INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+===============================================================================================*/
 
+#include "Det.h"
 
+
 
+/*===============================================================================================
 
+*                               SOURCE FILE VERSION INFORMATION
 
+===============================================================================================*/
 
+
 
+
 
+/*===============================================================================================
 
+*                                      FILE VERSION CHECKS
 
+===============================================================================================*/
 
+
 
+/*===============================================================================================
 
+*                                           CONSTANTS
 
+===============================================================================================*/
 
+
 
+/*===============================================================================================
 
+*                                       DEFINES AND MACROS
 
+===============================================================================================*/
 
+
 
+/*===============================================================================================
 
+*                                             ENUMS
 
+===============================================================================================*/
 
+
 
+/*===============================================================================================
 
+*                            STRUCTURES AND OTHER TYPEDEFS
 
+===============================================================================================*/
 
+
 
+/*===============================================================================================
 
+*                                 GLOBAL VARIABLE DECLARATIONS
 
+===============================================================================================*/
 
+
 
+/*===============================================================================================
 
+                                     FUNCTION PROTOTYPES
 
+===============================================================================================*/
 
+#define DET_START_SEC_CODE
 
+#include "Det_MemMap.h"
 
+
 
+extern boolean Det_TestLastReportError(uint16 ModuleId, uint8 InstanceId, uint8 ApiId, uint8 ErrorId);
 
+extern boolean Det_TestLastReportRuntimeError(uint16 ModuleId, uint8 InstanceId, uint8 ApiId, uint8 ErrorId);
 
+extern boolean Det_TestLastReportTransientFault(uint16 ModuleId, uint8 InstanceId, uint8 ApiId, uint8 FaultId);
 
+extern boolean Det_TestNoError(void);
 
+extern boolean Det_TestNoRuntimeError(void);
 
+extern boolean Det_TestNoTransientFault(void);
 
+
 
+#define DET_STOP_SEC_CODE
 
+#include "Det_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* DET_STUB_H */

+ 401 - 0
RTD/include/Dio.h
Vedi File 

@@ -0,0 +1,401 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : GPIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef DIO_H
 
+#define DIO_H
 
+
 
+/**
 
+*   @file Dio.h
 
+*   @implements Dio.h_Artifact
 
+*
 
+*   @defgroup DIO_HLD Dio HLD
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*=================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+=================================================================================================*/
 
+#include "StandardTypes.h"
 
+#include "Mcal.h"
 
+#include "Dio_Cfg.h"
 
+
 
+/*=================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+=================================================================================================*/
 
+
 
+#define DIO_VENDOR_ID                    43
 
+#define DIO_MODULE_ID                    120
 
+#define DIO_AR_RELEASE_MAJOR_VERSION     4
 
+#define DIO_AR_RELEASE_MINOR_VERSION     4
 
+#define DIO_AR_RELEASE_REVISION_VERSION  0
 
+#define DIO_SW_MAJOR_VERSION             1
 
+#define DIO_SW_MINOR_VERSION             0
 
+#define DIO_SW_PATCH_VERSION             0
 
+
 
+
 
+/*=================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+=================================================================================================*/
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    /* Check if header file and StandardTypes.h file are of the same Autosar version */
 
+    #if ((DIO_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
 
+         (DIO_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION)    \
 
+        )
 
+        #error "AutoSar Version Numbers of Dio.h and StandardTypes.h are different"
 
+    #endif
 
+    /* Check if source file and Mcal.h header file are of the same Autosar version */
 
+    #if ((DIO_AR_RELEASE_MAJOR_VERSION != MCAL_AR_RELEASE_MAJOR_VERSION) || \
 
+         (DIO_AR_RELEASE_MINOR_VERSION != MCAL_AR_RELEASE_MINOR_VERSION)    \
 
+        )
 
+        #error "AutoSar Version Numbers of Dio.h and Mcal.h are different"
 
+    #endif
 
+#endif
 
+
 
+/* Check if Dio header file and Dio configuration header file are of the same vendor */
 
+#if (DIO_VENDOR_ID != DIO_VENDOR_ID_CFG_H)
 
+    #error "Dio.h and Dio_Cfg.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if Dio header file and Dio configuration header file are of the same Autosar version */
 
+#if ((DIO_AR_RELEASE_MAJOR_VERSION    != DIO_AR_RELEASE_MAJOR_VERSION_CFG_H) || \
 
+     (DIO_AR_RELEASE_MINOR_VERSION    != DIO_AR_RELEASE_MINOR_VERSION_CFG_H) || \
 
+     (DIO_AR_RELEASE_REVISION_VERSION != DIO_AR_RELEASE_REVISION_VERSION_CFG_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Dio.h and Dio_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if Dio source file and Dio configuration header file are of the same Software version */
 
+#if ((DIO_SW_MAJOR_VERSION != DIO_SW_MAJOR_VERSION_CFG_H) || \
 
+     (DIO_SW_MINOR_VERSION != DIO_SW_MINOR_VERSION_CFG_H) || \
 
+     (DIO_SW_PATCH_VERSION != DIO_SW_PATCH_VERSION_CFG_H)    \
 
+    )
 
+    #error "Software Version Numbers of Dio.h and Dio_Cfg.h are different"
 
+#endif
 
+/*=================================================================================================
 
+*                                          CONSTANTS
 
+=================================================================================================*/
 
+/**
 
+* @brief          The DIO module is not properly configured
 
+*/
 
+#define DIO_E_PARAM_CONFIG                      ((uint8)0xF0)
 
+
 
+/**
 
+* @brief          Invalid channel name requested.
 
+*
 
+* @implements     Dio_ErrorCodes_define
 
+*/
 
+#define DIO_E_PARAM_INVALID_CHANNEL_ID          ((uint8)0x0A)
 
+
 
+/**
 
+* @brief          Invalid port name requested.
 
+*
 
+* @implements     Dio_ErrorCodes_define
 
+*/
 
+#define DIO_E_PARAM_INVALID_PORT_ID             ((uint8)0x14)
 
+
 
+/**
 
+* @brief          Invalid ChannelGroup id passed.
 
+*
 
+* @implements     Dio_ErrorCodes_define
 
+*/
 
+#define DIO_E_PARAM_INVALID_GROUP_ID            ((uint8)0x1F)
 
+
 
+/**
 
+* @brief          API service called with a NULL pointer.
 
+* @details        In case of this error, the API service shall return
 
+*                 immediately without any further action, beside reporting
 
+*                 this development error.
 
+*
 
+* @implements     Dio_ErrorCodes_define
 
+*/
 
+#define DIO_E_PARAM_POINTER                     ((uint8)0x20)
 
+
 
+/**
 
+* @brief          API service called with invalid channel level value.
 
+* @details        In case of this error, the API service shall return
 
+*                 immediately without any further action, beside reporting
 
+*                 this development error.
 
+*
 
+* @implements     Dio_ErrorCodes_define
 
+*/
 
+#define DIO_E_PARAM_LEVEL                       ((uint8)0x21)
 
+
 
+
 
+/**
 
+* @brief          API service ID for @p Dio_ReadChannel() function.
 
+* @details        Parameters used when raising an error/exception.
 
+*/
 
+#define DIO_READCHANNEL_ID                      ((uint8)0x00)
 
+
 
+/**
 
+* @brief          API service ID for @p Dio_WriteChannel() function.
 
+* @details        Parameters used when raising an error/exception.
 
+*/
 
+#define DIO_WRITECHANNEL_ID                     ((uint8)0x01)
 
+
 
+/**
 
+* @brief          API service ID for @p Dio_FlipChannel() function.
 
+* @details        Parameters used when raising an error/exception.
 
+*/
 
+#define DIO_FLIPCHANNEL_ID                      ((uint8)0x11)
 
+
 
+/**
 
+* @brief          API service ID for @p Dio_ReadPort() function.
 
+* @details        Parameters used when raising an error/exception.
 
+*/
 
+#define DIO_READPORT_ID                         ((uint8)0x02)
 
+
 
+/**
 
+* @brief          API service ID for @p Dio_WritePort() function.
 
+* @details        Parameters used when raising an error/exception.
 
+*/
 
+#define DIO_WRITEPORT_ID                        ((uint8)0x03)
 
+
 
+/**
 
+* @brief          API service ID for @p Dio_ReadChannel() Group function.
 
+* @details        Parameters used when raising an error/exception.
 
+*/
 
+#define DIO_READCHANNELGROUP_ID                 ((uint8)0x04)
 
+
 
+/**
 
+* @brief          API service ID for @p Dio_WriteChannel() Group function.
 
+* @details        Parameters used when raising an error/exception.
 
+*/
 
+#define DIO_WRITECHANNELGROUP_ID                ((uint8)0x05)
 
+
 
+/**
 
+* @brief          API service ID for DIO Get Version() Info function.
 
+* @details        Parameters used when raising an error/exception.
 
+*/
 
+#define DIO_GETVERSIONINFO_ID                   ((uint8)0x12)
 
+
 
+/**
 
+* @brief          API service ID for @p Dio_MaskedWritePort() function.
 
+* @details        Parameters used when raising an error/exception.
 
+*/
 
+#define DIO_MASKEDWRITEPORT_ID                  ((uint8)0x13)
 
+
 
+/**
 
+* @brief          Instance ID of the Dio driver.
 
+*
 
+* @implements     .
 
+*/
 
+#define DIO_INSTANCE_ID                         ((uint8)0x00)
 
+
 
+
 
+/*=================================================================================================
 
+*                                      DEFINES AND MACROS
 
+=================================================================================================*/
 
+
 
+/*=================================================================================================
 
+*                                             ENUMS
 
+=================================================================================================*/
 
+
 
+/*=================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+=================================================================================================*/
 
+
 
+/*=================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+=================================================================================================*/
 
+
 
+/*=================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+=================================================================================================*/
 
+
 
+#define DIO_START_SEC_CODE
 
+#include "Dio_MemMap.h"
 
+
 
+#if (STD_ON == DIO_VERSION_INFO_API)
 
+/*!
 
+ * @brief Service to get the version information of this module.
 
+ *
 
+ * The @p Dio_GetVersionInfo() function shall return the version
 
+ * information of this module. The version information includes:
 
+ * - Module Id.
 
+ * - Vendor Id.
 
+ * - Vendor specific version numbers.
 
+ *
 
+ * @param[in]  VersionInfo Pointer to where to store the version
 
+ *             information of this module.
 
+ */
 
+void Dio_GetVersionInfo
 
+(
 
+   Std_VersionInfoType * VersionInfo
 
+);
 
+#endif /* (STD_ON == DIO_VERSION_INFO_API) */
 
+
 
+/*!
 
+ * @brief          Returns the value of the specified DIO channel.
 
+ *
 
+ * This function returns the value of the specified DIO channel.
 
+ *
 
+ * @param[in] ChannelId Specifies the required channel id.
 
+ *
 
+ * @return Returns the level of the corresponding pin @p STD_HIGH or @p STD_LOW.
 
+ */
 
+Dio_LevelType Dio_ReadChannel
 
+(
 
+    Dio_ChannelType ChannelId
 
+);
 
+
 
+/*!
 
+ * @brief Sets the level of a channel.
 
+ *
 
+ * If the specified channel is configured as an output channel,
 
+ * this function shall set the specified level on the
 
+ * specified channel. If the specified channel is configured
 
+ * as an input channel, this function shall have no influence
 
+ * on the physical output and on the result of the next read
 
+ * service.
 
+ *
 
+ * @param[in] ChannelId Specifies the required channel id.
 
+ * @param[in] Level Specifies the channel desired level.
 
+ */
 
+void Dio_WriteChannel
 
+(
 
+    Dio_ChannelType ChannelId,
 
+    Dio_LevelType Level
 
+);
 
+
 
+#if (STD_ON == DIO_FLIP_CHANNEL_API)
 
+/*!
 
+ * @brief Inverts the level of a channel.
 
+ *
 
+ * If the specified channel is configured as an output channel,
 
+ * this function shall invert the level of the specified
 
+ * channel. If the specified channel is configured as an
 
+ * input channel, this function shall have no influence
 
+ * on the physical output and on the result of the next
 
+ * read service.
 
+ *
 
+ * @param[in]      ChannelId   Specifies the required channel id.
 
+ *
 
+ * @return Returns the level of the corresponding pin as @p STD_HIGH or @p STD_LOW.
 
+ */
 
+Dio_LevelType Dio_FlipChannel
 
+(
 
+    Dio_ChannelType ChannelId
 
+);
 
+#endif /* (STD_ON == DIO_FLIP_CHANNEL_API) */
 
+
 
+/*!
 
+ * @brief Returns the level of all channels of specified port.
 
+ *
 
+ * This function will return the level of all channels
 
+ * belonging to the specified port.
 
+ *
 
+ * @param[in] PortId Specifies the required port id.
 
+ *
 
+ * @return Levels of all channels of specified port.
 
+ */
 
+Dio_PortLevelType Dio_ReadPort
 
+(
 
+    Dio_PortType PortId
 
+);
 
+
 
+/*!
 
+ * @brief Sets the value of a port.
 
+ *
 
+ * This function will set the specified value on the specified port.
 
+ *
 
+ * @param[in] PortId Specifies the required port id.
 
+ * @param[in] Level Specifies the required levels for the port pins.
 
+ */
 
+void Dio_WritePort
 
+(
 
+    Dio_PortType PortId,
 
+    Dio_PortLevelType Level
 
+);
 
+
 
+/*!
 
+ * @brief This service reads a subset of the adjoining bits of a port.
 
+ *
 
+ * This function will read a subset of adjoining bits of a port (channel group).
 
+ *
 
+ * @param[in] ChannelGroupIdPtr Pointer to the channel group.
 
+ *
 
+ * @return         The channel group levels.
 
+ */
 
+Dio_PortLevelType Dio_ReadChannelGroup
 
+(
 
+    const Dio_ChannelGroupType * ChannelGroupIdPtr
 
+);
 
+
 
+/*!
 
+ * @brief Sets a subset of the adjoining bits of a port to the specified levels.
 
+ *
 
+ * This function will set a subset of adjoining bits of a port
 
+ * (channel group) to the specified levels without changing
 
+ * the remaining channels of the port and channels that are configured as input.
 
+ * This function will do the masking of the channels and will
 
+ * do the shifting so that the values written by the function
 
+ * are aligned to the LSB.
 
+ *
 
+ * @param[in] ChannelGroupIdPtr Pointer to the channel group.
 
+ * @param[in] Level Desired levels for the channel group.
 
+ */
 
+void Dio_WriteChannelGroup
 
+(
 
+    const Dio_ChannelGroupType * ChannelGroupIdPtr,
 
+    Dio_PortLevelType                 Level
 
+);
 
+
 
+#if (STD_ON == DIO_MASKEDWRITEPORT_API)
 
+/*!
 
+ * @brief DIO Mask write port using mask.
 
+ *
 
+ * Writes a DIO port with masked value.
 
+ *
 
+ * @param[in] PortId Specifies the required port id.
 
+ * @param[in] Level Specifies the required levels for the port pins.
 
+ * @param[in] Mask Specifies the Mask value of the port.
 
+ *
 
+ * @pre This function can be used only if @p DIO_MASKEDWRITEPORT_API has been enabled.
 
+ */
 
+void Dio_MaskedWritePort
 
+(
 
+    Dio_PortType PortId,
 
+    Dio_PortLevelType Level,
 
+    Dio_PortLevelType Mask
 
+);
 
+#endif /* (STD_ON == DIO_MASKEDWRITEPORT_API) */
 
+
 
+#define DIO_STOP_SEC_CODE
 
+#include "Dio_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* DIO_H */

+ 202 - 0
RTD/include/Dio_Ipw.h
Vedi File 

@@ -0,0 +1,202 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : GPIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef DIO_IPW_H
 
+#define DIO_IPW_H
 
+
 
+/**
 
+*   @file Dio_Ipw.h
 
+*
 
+*   @internal
 
+*   @defgroup DIO_IPW Dio IPW
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*=================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+=================================================================================================*/
 
+
 
+#include "Gpio_Dio_Ip.h"
 
+
 
+/*=================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+=================================================================================================*/
 
+
 
+#define DIO_VENDOR_ID_IPW_H                   43
 
+#define DIO_AR_RELEASE_MAJOR_VERSION_IPW_H    4
 
+#define DIO_AR_RELEASE_MINOR_VERSION_IPW_H    4
 
+#define DIO_AR_RELEASE_REVISION_VERSION_IPW_H 0
 
+#define DIO_SW_MAJOR_VERSION_IPW_H            1
 
+#define DIO_SW_MINOR_VERSION_IPW_H            0
 
+#define DIO_SW_PATCH_VERSION_IPW_H            0
 
+
 
+/*=================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+=================================================================================================*/
 
+/* Check if Dio_Ipw header file and Gpio_Dio_Ip header file are of the same vendor */
 
+#if (DIO_VENDOR_ID_IPW_H != GPIO_DIO_IP_VENDOR_ID_H)
 
+    #error "Dio_Ipw.h and Gpio_Dio_Ip.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if  Dio_Ipw header file and Gpio_Dio_Ip header file are of the same Autosar version */
 
+#if ((DIO_AR_RELEASE_MAJOR_VERSION_IPW_H    != GPIO_DIO_IP_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (DIO_AR_RELEASE_MINOR_VERSION_IPW_H    != GPIO_DIO_IP_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (DIO_AR_RELEASE_REVISION_VERSION_IPW_H != GPIO_DIO_IP_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Dio_Ipw.h and Gpio_Dio_Ip.h are different"
 
+#endif
 
+
 
+/* Check if Dio_Ipw header file and Gpio_Dio_Ip header file are of the same Software version */
 
+#if ((DIO_SW_MAJOR_VERSION_IPW_H != GPIO_DIO_IP_SW_MAJOR_VERSION_H) || \
 
+     (DIO_SW_MINOR_VERSION_IPW_H != GPIO_DIO_IP_SW_MINOR_VERSION_H) || \
 
+     (DIO_SW_PATCH_VERSION_IPW_H != GPIO_DIO_IP_SW_PATCH_VERSION_H)    \
 
+    )
 
+    #error "Software Version Numbers of Dio_Ipw.h and Gpio_Dio_Ip.h are different"
 
+#endif
 
+/*=================================================================================================
 
+*                                          CONSTANTS
 
+=================================================================================================*/
 
+
 
+/*=================================================================================================
 
+*                                      DEFINES AND MACROS
 
+=================================================================================================*/
 
+/** Bit mask for the leftmost channel in a port*/
 
+#if (STD_ON == DIO_DEV_ERROR_DETECT)
 
+#define DIO_BIT1_LEFTMOST_MASK_U32              ((uint32)1U)
 
+#define DIO_CHECK_CHANNEL_VALIDITY(ChannelId)   (DIO_BIT1_LEFTMOST_MASK_U32<<((ChannelId) & GPIO_DIO_IP_CHANNEL_MASK_U32))
 
+#endif
 
+
 
+#define DIO_PORTID_SHIFT_U8                     ((uint8)5U)
 
+#define DIO_PORTID_EXTRACT(ChannelId)           ((ChannelId) >> DIO_PORTID_SHIFT_U8)
 
+
 
+/*=================================================================================================
 
+*                                             ENUMS
 
+=================================================================================================*/
 
+
 
+
 
+/*=================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+=================================================================================================*/
 
+#if (STD_ON == DIO_DEV_ERROR_DETECT)
 
+    #ifdef CPU_TYPE
 
+        #if (CPU_TYPE == CPU_TYPE_64)
 
+        /**
 
+        * @brief size of pointer type. on CPU_TYPE_64, the size is 64bits.
 
+        */
 
+        typedef uint64 pointerSizeType;
 
+        #elif (CPU_TYPE == CPU_TYPE_32)
 
+        /**
 
+        * @brief size of pointer type. on CPU_TYPE_32, the size is 32bits.
 
+        */
 
+        typedef uint32 pointerSizeType;
 
+        #elif (CPU_TYPE == CPU_TYPE_16)
 
+        /**
 
+        * @brief size of pointer type. on CPU_TYPE_16, the size is 16bits.
 
+        */
 
+        typedef uint16 pointerSizeType;
 
+        #endif
 
+    #endif
 
+#endif
 
+
 
+/*=================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+=================================================================================================*/
 
+
 
+
 
+/*=================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+=================================================================================================*/
 
+#define DIO_START_SEC_CODE
 
+#include "Dio_MemMap.h"
 
+/**
 
+* @brief          Mapping macro between low level layer and high level layer.
 
+*
 
+*/
 
+Dio_LevelType Dio_Ipw_ReadChannel(Dio_ChannelType ChannelId);
 
+
 
+/**
 
+* @brief          Mapping macro between low level layer and high level layer.
 
+*
 
+*/
 
+void Dio_Ipw_WriteChannel(Dio_ChannelType ChannelId, Dio_LevelType Level);
 
+
 
+#if (STD_ON == DIO_FLIP_CHANNEL_API)
 
+/**
 
+* @brief          Mapping macro between low level layer and high level layer.
 
+*
 
+*/
 
+Dio_LevelType Dio_Ipw_FlipChannel(Dio_ChannelType ChannelId);
 
+
 
+#endif /* (STD_ON == DIO_FLIP_CHANNEL_API) */
 
+
 
+/**
 
+* @brief          Mapping macro between low level layer and high level layer.
 
+*
 
+*/
 
+Dio_PortLevelType Dio_Ipw_ReadPort(Dio_PortType PortId);
 
+
 
+/**
 
+* @brief          Mapping macro between low level layer and high level layer.
 
+*
 
+*/
 
+void Dio_Ipw_WritePort(Dio_PortType PortId,Dio_PortLevelType Level);
 
+
 
+/**
 
+* @brief          Mapping macro between low level layer and high level layer.
 
+*
 
+*/
 
+Dio_PortLevelType Dio_Ipw_ReadChannelGroup(const Dio_ChannelGroupType * pChannelGroupIdPtr);
 
+
 
+/**
 
+* @brief          Mapping macro between low level layer and high level layer.
 
+*
 
+*/
 
+void Dio_Ipw_WriteChannelGroup(const Dio_ChannelGroupType * pChannelGroupIdPtr,Dio_PortLevelType Level);
 
+
 
+#if (STD_ON == DIO_MASKEDWRITEPORT_API)
 
+/**
 
+* @brief          Mapping macro between low level layer and high level layer.
 
+*
 
+*/
 
+void Dio_Ipw_MaskedWritePort(Dio_PortType PortId,Dio_PortLevelType Level,Dio_PortLevelType Mask);
 
+
 
+#endif /* (STD_ON == DIO_MASKEDWRITEPORT_API) */
 
+
 
+#define DIO_STOP_SEC_CODE
 
+#include "Dio_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+#endif /* DIO_IPW_H */
 
+
 
+/** @} */

+ 666 - 0
RTD/include/Dma_Ip.h
Vedi File 

@@ -0,0 +1,666 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/* Prevention from multiple including the same header */
 
+#ifndef DMA_IP_DRIVER_H_
 
+#define DMA_IP_DRIVER_H_
 
+
 
+/**
 
+*   @file    Dma_Ip.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - Dma Ip driver header file.
 
+*   @details
 
+*
 
+*   @addtogroup DMA_IP_DRIVER DMA IP Driver
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+*  1) system and project includes
 
+*  2) needed interfaces from external units
 
+*  3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Dma_Ip_Cfg.h"
 
+
 
+/*==================================================================================================
 
+                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define DMA_IP_VENDOR_ID_H                       43
 
+#define DMA_IP_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define DMA_IP_AR_RELEASE_MINOR_VERSION_H        4
 
+#define DMA_IP_AR_RELEASE_REVISION_VERSION_H     0
 
+#define DMA_IP_SW_MAJOR_VERSION_H                1
 
+#define DMA_IP_SW_MINOR_VERSION_H                0
 
+#define DMA_IP_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if header file and Dma_Ip_Cfg.h file are of the same vendor */
 
+#if (DMA_IP_VENDOR_ID_H != DMA_IP_CFG_VENDOR_ID_H)
 
+    #error "Dma_Ip.h and Dma_Ip_Cfg.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Cfg.h file are of the same Autosar version */
 
+#if ((DMA_IP_AR_RELEASE_MAJOR_VERSION_H != DMA_IP_CFG_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (DMA_IP_AR_RELEASE_MINOR_VERSION_H != DMA_IP_CFG_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (DMA_IP_AR_RELEASE_REVISION_VERSION_H != DMA_IP_CFG_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Dma_Ip.h and Dma_Ip_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Cfg.h file are of the same Software version */
 
+#if ((DMA_IP_SW_MAJOR_VERSION_H != DMA_IP_CFG_SW_MAJOR_VERSION_H) || \
 
+     (DMA_IP_SW_MINOR_VERSION_H != DMA_IP_CFG_SW_MINOR_VERSION_H) || \
 
+     (DMA_IP_SW_PATCH_VERSION_H != DMA_IP_CFG_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Dma_Ip.h and Dma_Ip_Cfg.h are different"
 
+#endif
 
+
 
+#if (DMA_IP_IS_AVAILABLE == STD_ON)
 
+/*===============================================================================================
 
+                                           ENUMS
 
+===============================================================================================*/
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Instance Commands.
 
+ * @details The Commands trigger specific actions in the Dma Logic Instance.
 
+ *
 
+ * */
 
+typedef enum{
 
+    DMA_IP_INST_CANCEL_TRANSFER            = 0U, /**< @brief The Cancel Transfer cancels the executing channel and forces the Minor Loop to finish. */
 
+    DMA_IP_INST_CANCEL_TRANSFER_WITH_ERROR = 1U, /**< @brief The Cancel Transfer With Error Command cancels the executing channel, forces the Minor Loop to finish and generates an error interrupt. */
 
+    DMA_IP_INST_HALT                       = 2U, /**< @brief The Halt Command allows the ongoing transfer to finish and halts any new transfer. */
 
+    DMA_IP_INST_RESUME                     = 3U, /**< @brief The Resume Command allows the transfer to continue. */
 
+}Dma_Ip_LogicInstanceCmdType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Channel Commands.
 
+ * @details The Commands trigger specific actions in the Dma Ip Logic Channel.
 
+ *
 
+ * */
 
+typedef enum{
 
+    DMA_IP_CH_SET_HARDWARE_REQUEST   = 0U, /**< @brief The Set Hardware Request Command enables the Dma Channel to be triggered by hardware requests. */
 
+    DMA_IP_CH_CLEAR_HARDWARE_REQUEST = 1U, /**< @brief The Clear Hardware Request Command disables the Dma Channel to be triggered by hardware requests. */
 
+    DMA_IP_CH_SET_SOFTWARE_REQUEST   = 2U, /**< @brief The Set Software Request Command sends a soft start request to the Dma Channel. */
 
+    DMA_IP_CH_CLEAR_DONE             = 3U, /**< @brief The Clear Done Command resets the Dma Channel Done status. */
 
+    DMA_IP_CH_CLEAR_ERROR            = 4U, /**< @brief The Clear Error Command resets the Dma Channel Error status. */
 
+}Dma_Ip_LogicChannelCmdType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Channel Global Parameters.
 
+ * @details The Parameters set specific functionalities for the Dma Ip Logic Channel.
 
+ *
 
+ * */
 
+typedef enum{
 
+#if (DMA_IP_MASTER_ID_REPLICATION_IS_AVAILABLE == STD_ON)
 
+    DMA_IP_CH_SET_EN_MASTER_ID_REPLICATION =  0U, /**< @brief [BOOLEAN] The EnMasterIdReplication Parameter sets the Dma Channel to use the same protection level and system bus ID of the master programming the Dma Channel. */
 
+#endif
 
+#if (DMA_IP_BUFFERED_WRITES_IS_AVAILABLE == STD_ON)
 
+    DMA_IP_CH_SET_EN_BUFFERED_WRITES       =  1U, /**< @brief [BOOLEAN] The EnBufferedWrites Parameter sets the Dma Channel writes to be bufferable. */
 
+#endif
 
+    DMA_IP_CH_SET_EN_MUX_SOURCE_REQ        =  2U, /**< @brief [BOOLEAN] The EnMuxSource Parameter enables the Dma Channel Mux Source. */
 
+    DMA_IP_CH_SET_MUX_SOURCE_REQ           =  3U, /**< @brief [VALUE]   The MuxSource Parameter sets the Dma Channel Mux Source value. */
 
+    DMA_IP_CH_SET_EN_MUX_TRIGGER           =  4U, /**< @brief [BOOLEAN] The EnMuxTrigger Parameter enables the Dma Channel Mux Trigger. */
 
+    DMA_IP_CH_SET_EN_HARDWARE_REQ          =  5U, /**< @brief [BOOLEAN] The EnRequest Parameter enables the Dma Channel Request. */
 
+    DMA_IP_CH_SET_EN_ERROR_INTERRUPT       =  6U, /**< @brief [BOOLEAN] The EnError Parameter enables the Dma Channel Error Interrupt. */
 
+    DMA_IP_CH_SET_GROUP_PRIORITY           =  7U, /**< @brief [VALUE]   The Group Parameter sets the Dma Channel Group Priority. */
 
+    DMA_IP_CH_SET_LEVEL_PRIORITY           =  8U, /**< @brief [VALUE]   The Level Parameter sets the Dma Channel Level Priority. */
 
+#if (DMA_IP_PREEMPTION_IS_AVAILABLE == STD_ON)
 
+    DMA_IP_CH_SET_EN_PREEMPTION_PRIORITY   =  9U, /**< @brief [BOOLEAN] The EnPreemption Parameter enables the Dma Channel Preemption. */
 
+#endif
 
+#if (DMA_IP_DISABLE_PREEMPT_IS_AVAILABLE == STD_ON)
 
+    DMA_IP_CH_SET_DIS_PREEMPT_PRIORITY     = 10U, /**< @brief [BOOLEAN] The DisPreempt Parameter disables the Dma Channel Preempt. */
 
+#endif
 
+}Dma_Ip_LogicChannelGlobalParamType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Channel Transfer Parameters.
 
+ * @details The Parameters set specific functionalities.
 
+ *
 
+ * */
 
+typedef enum{
 
+    DMA_IP_CH_SET_SOURCE_ADDRESS                   =  0U, /**< @brief [VALUE]   The Source Address Parameter sets the Dma Channel source address value. */
 
+    DMA_IP_CH_SET_SOURCE_SIGNED_OFFSET             =  1U, /**< @brief [VALUE]   The Source Signed Offset Parameter sets the Dma Channel source signed offset value. */
 
+    DMA_IP_CH_SET_SOURCE_SIGNED_LAST_ADDR_ADJ      =  2U, /**< @brief [VALUE]   The Source Signed Last Address Adjustment Parameter sets the Dma Channel source signed last address adjustment. */
 
+    DMA_IP_CH_SET_SOURCE_TRANSFER_SIZE             =  3U, /**< @brief [VALUE]   The Source Transfer Size Parameter sets the Dma Channel source transfer size. */
 
+    DMA_IP_CH_SET_SOURCE_MODULO                    =  4U, /**< @brief [VALUE]   The Source Modulo Parameter sets the Dma Channel source modulo. */
 
+    DMA_IP_CH_SET_DESTINATION_ADDRESS              =  5U, /**< @brief [VALUE]   The Destination Address Parameter sets the Dma Channel destination address value. */
 
+    DMA_IP_CH_SET_DESTINATION_SIGNED_OFFSET        =  6U, /**< @brief [VALUE]   The Destination Signed Offset Parameter sets the Dma Channel destination signed offset value. */
 
+    DMA_IP_CH_SET_DESTINATION_SIGNED_LAST_ADDR_ADJ =  7U, /**< @brief [VALUE]   The Destination Signed Last Address Adjustment Parameter sets the Dma Channel destination signed last address adjustment. */
 
+    DMA_IP_CH_SET_DESTINATION_TRANSFER_SIZE        =  8U, /**< @brief [VALUE]   The Destination Transfer Size Parameter sets the Dma Channel destination transfer size. */
 
+    DMA_IP_CH_SET_DESTINATION_MODULO               =  9U, /**< @brief [VALUE]   The Destination Modulo Parameter sets the Dma Channel destination modulo. */
 
+    DMA_IP_CH_SET_MINORLOOP_EN_SRC_OFFSET          = 10U, /**< @brief [BOOLEAN] The Minor Loop Enable Source Offset Parameter enables the Dma Channel minor loop source offset. */
 
+    DMA_IP_CH_SET_MINORLOOP_EN_DST_OFFSET          = 11U, /**< @brief [BOOLEAN] The Minor Loop Enable Destination Offset Parameter enables the Dma Channel minor loop destination offset. */
 
+    DMA_IP_CH_SET_MINORLOOP_SIGNED_OFFSET          = 12U, /**< @brief [VALUE]   The Minor Loop Signed Offset Parameter sets the Dma Channel minor loop signed offset. */
 
+    DMA_IP_CH_SET_MINORLOOP_EN_LINK                = 13U, /**< @brief [BOOLEAN] The Minor Loop Enable Link Parameter enables the Dma Channel minor loop logic channel linking. */
 
+    DMA_IP_CH_SET_MINORLOOP_LOGIC_LINK_CH          = 14U, /**< @brief [VALUE]   The Minor Loop Logic Channel Link Parameter sets the Dma Channel minor loop logic channel link. */
 
+    DMA_IP_CH_SET_MINORLOOP_SIZE                   = 15U, /**< @brief [VALUE]   The Minor Loop Size Parameter sets the Dma Channel minor loop transfer size. */
 
+    DMA_IP_CH_SET_MAJORLOOP_EN_LINK                = 16U, /**< @brief [BOOLEAN] The Major Loop Enable Link Parameter enables the Dma Channel major loop logic channel linking. */
 
+    DMA_IP_CH_SET_MAJORLOOP_LOGIC_LINK_CH          = 17U, /**< @brief [VALUE]   The Major Loop Logic Channel Link Parameter sets the Dma Channel major loop logic channel link. */
 
+    DMA_IP_CH_SET_MAJORLOOP_COUNT                  = 18U, /**< @brief [VALUE]   The Major Loop Count Parameter sets the Dma Channel major loop count. */
 
+#if (DMA_IP_STORE_DST_ADDR_IS_AVAILABLE == STD_ON)
 
+    DMA_IP_CH_SET_CONTROL_STORE_DST_ADDR           = 19U, /**< @brief [VALUE]   The Store Destination Address Parameter saves the final destination address in system memory. */
 
+#endif
 
+    DMA_IP_CH_SET_CONTROL_SOFTWARE_REQUEST         = 20U, /**< @brief [BOOLEAN] The Enable Start Parameter enables the Dma Channel start service request. The main usage is for ScatterGather Element configuration. */
 
+    DMA_IP_CH_SET_CONTROL_EN_MAJOR_INTERRUPT       = 21U, /**< @brief [BOOLEAN] The Enable Major Interrupt Parameter enables the Dma Channel major interrupt. */
 
+    DMA_IP_CH_SET_CONTROL_EN_HALF_MAJOR_INTERRUPT  = 22U, /**< @brief [BOOLEAN] The Enable Half Interrupt Parameter enables the Dma Channel half major interrupt. */
 
+    DMA_IP_CH_SET_CONTROL_DIS_AUTO_REQUEST         = 23U, /**< @brief [BOOLEAN] The Disable Automatic Request Parameter disables the Dma Channel automatic request. */
 
+#if (DMA_IP_END_OF_PACKET_SIGNAL_IS_AVAILABLE == STD_ON)
 
+    DMA_IP_CH_SET_CONTROL_EN_END_OF_PACKET_SIGNAL  = 24U, /**< @brief [BOOLEAN] The Enable End Of Packet Signal Parameter enables the Dma Channel end of packet signal. */
 
+#endif
 
+    DMA_IP_CH_SET_CONTROL_BANDWIDTH                = 25U, /**< @brief [VALUE]   The Bandwidth Control Parameter sets the Dma Channel bandwidth control. */
 
+}Dma_Ip_LogicChannelTransferParamType;
 
+
 
+#if (DMA_IP_DMACRC_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Channel Crc Parameters.
 
+ * @details The Parameters set specific CRC information.
 
+ *
 
+ * */
 
+typedef enum{
 
+    DMA_IP_CH_SET_CRC_MODE             = 0U,
 
+    DMA_IP_CH_SET_CRC_POLYNOMIAL       = 1U,
 
+    DMA_IP_CH_SET_CRC_EN_INITIAL_VALUE = 2U,
 
+    DMA_IP_CH_SET_CRC_INITIAL_VALUE    = 3U,
 
+    DMA_IP_CH_SET_CRC_EN_LOGIC         = 4U,
 
+}Dma_Ip_LogicChannelCrcParamType;
 
+#endif
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Channel Information Parameters.
 
+ * @details The Parameters get specific information.
 
+ *
 
+ * */
 
+typedef enum{
 
+    DMA_IP_CH_GET_SOURCE_ADDRESS       = 0U, /**< @brief [VALUE]   The Source Address Parameter gets the Dma Channel source address. */
 
+    DMA_IP_CH_GET_DESTINATION_ADDRESS  = 1U, /**< @brief [VALUE]   The Destination Address Parameter gets the Dma Channel destination address. */
 
+    DMA_IP_CH_GET_BEGIN_ITER_COUNT     = 2U, /**< @brief [VALUE]   The Begin Iteration Count Parameter gets the Dma Channel begin iteration count. */
 
+    DMA_IP_CH_GET_CURRENT_ITER_COUNT   = 3U, /**< @brief [VALUE]   The Current Iteration Count Parameter gets the Dma Channel current iteration count. */
 
+#if (DMA_IP_STORE_DST_ADDR_IS_AVAILABLE == STD_ON)
 
+    DMA_IP_CH_GET_STORE_DST_ADDR       = 4U, /**< @brief [VALUE]   The Store Destination Address Parameter gets the Dma Channel stored destination address. */
 
+#endif
 
+#if (DMA_IP_MASTER_ID_REPLICATION_IS_AVAILABLE == STD_ON)
 
+    DMA_IP_CH_GET_MASTER_ID            = 5U, /**< @brief [VALUE]   The Master Id Parameter gets the Dma Channel master id. */
 
+#endif
 
+    DMA_IP_CH_GET_MAJOR_INTERRUPT      = 6U, /**< @brief [BOOLEAN] The Major Interrupt Parameter gets the Dma Channel major interrupt. */
 
+    DMA_IP_CH_GET_HALF_MAJOR_INTERRUPT = 7U, /**< @brief [BOOLEAN] The Half Major Interrupt Parameter gets the Dma Channel half major interrupt. */
 
+#if (DMA_IP_DMACRC_IS_AVAILABLE == STD_ON)
 
+    DMA_IP_CH_GET_FINAL_CRC            = 8U,
 
+#endif
 
+}Dma_Ip_LogicChannelInfoParamType;
 
+
 
+/*===============================================================================================
 
+                                           STRUCTS
 
+===============================================================================================*/
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Channel Global List.
 
+ * @details The Dma Ip Channel Global List contains a pair composed from Dma Channel Global Parameter
 
+ *          Type and the Value of the parameter.
 
+ *          The Dma Ip Channel Global Parameter Type selects a parameter form the Global Parameter
 
+ *          enum type.
 
+ *          The Value stores the parameter's value.
 
+ * */
 
+typedef struct{
 
+    Dma_Ip_LogicChannelGlobalParamType Param;
 
+    uint32 Value;
 
+}Dma_Ip_LogicChannelGlobalListType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Channel Transfer List.
 
+ * @details The Dma Ip Channel Transfer List contains a pair composed from Dma Channel Transfer
 
+ *          Parameter Type and the Value of the parameter.
 
+ *          The Dma Ip Channel Transfer Parameter Type selects a parameter form the Transfer Parameter
 
+ *          enum type.
 
+ *          The Value stores the parameter's value.
 
+ * @implements Dma_Ip_LogicChannelTransferListType_struct
 
+ * */
 
+/**
 
+ * @brief This type contains the Dma Ip Channel ScatterGather List.
 
+ * @details The Dma Ip Channel Transfer List contains a pair composed from Dma Channel ScatterGather
 
+ *          Parameter Type and the Value of the parameter.
 
+ *          The Dma Ip Channel ScatterGather Parameter Type selects a parameter form the ScatterGather
 
+ *          Parameter enum type.
 
+ *          The Value stores the parameter's value.
 
+ * @implements Dma_Ip_LogicChannelScatterGatherListType_struct
 
+ * */
 
+typedef struct{
 
+    Dma_Ip_LogicChannelTransferParamType Param;
 
+    uint32 Value;
 
+}Dma_Ip_LogicChannelTransferListType, Dma_Ip_LogicChannelScatterGatherListType;
 
+
 
+#if (DMA_IP_DMACRC_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This type contains the Dma Ip Channel ScatterGather List.
 
+ * @details The Dma Ip Channel Transfer List contains a pair composed from Dma Channel ScatterGather
 
+ *          Parameter Type and the Value of the parameter.
 
+ *          The Dma Ip Channel ScatterGather Parameter Type selects a parameter form the ScatterGather
 
+ *          Parameter enum type.
 
+ *          The Value stores the parameter's value.
 
+ * @implements Dma_Ip_LogicChannelCrcListType_struct
 
+ * */
 
+typedef struct{
 
+    Dma_Ip_LogicChannelCrcParamType Param;
 
+    uint32 Value;
 
+}Dma_Ip_LogicChannelCrcListType;
 
+#endif
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Instance Status.
 
+ * @details The Dma Ip Instance Status contains the Hardware Errors, Active Id and Active indication for
 
+ *          the running Dma Channel.
 
+ *          The Errors shall contain the Hardware Errors.
 
+ *          The ActiveId shall contain the running Dma Channel Id.
 
+ *          The Active shall contain the running Dma Channel Active status.
 
+ * @implements Dma_Ip_LogicInstanceStatusType_struct
 
+ * */
 
+/* DMA Logic Instance Status */
 
+typedef struct{
 
+    uint32 Errors;    /**< @brief [VALUE]   The Errors value is read from the DMA Instance Error Register (ES) as it is. */
 
+    uint8 ActiveId;   /**< @brief [VALUE]   The ActiveId value is read from the DMA Instance Control Register (CR) field ACTIVE_ID. */
 
+    boolean Active;   /**< @brief [BOOLEAN] The Active value is read from the DMA Instance Control Register (CR) field ACTIVE. */
 
+}Dma_Ip_LogicInstanceStatusType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Channel Status.
 
+ * @details The Dma Ip Channel Status contains the Hardware Errors, Active status and Done indication for
 
+ *          the running Dma Channel.
 
+ *          The Channel State Value shall contain the internal driver state of the Dma Channel.
 
+ *          The Errors shall contain the Hardware Dma Channel Errors.
 
+ *          The Active shall contain the running Dma Channel Id.
 
+ *          The Done shall contain the running Dma Channel Active status.
 
+ * @implements Dma_Ip_LogicChannelStatusType_struct
 
+ * */
 
+/* DMA Logic Channel Status */
 
+typedef struct{
 
+    Dma_Ip_HwChannelStateValueType ChStateValue;
 
+                      /**< @brief [VALUE]   The ChStateValue value is read from the internal DMA Driver Channel State Machine. Check UM for additional information.  */
 
+    uint32 Errors;    /**< @brief [VALUE]   The Errors value is read from the DMA Channel Error Register (CHx_ES) as it is. */
 
+    boolean Active;   /**< @brief [BOOLEAN] The Active value is read from the DMA Channel Control and Status Register (CHx_CSR) field ACTIVE. */
 
+    boolean Done;     /**< @brief [BOOLEAN] The Active value is read from the DMA Channel Control and Status Register (CHx_CSR) field DONE. */
 
+}Dma_Ip_LogicChannelStatusType;
 
+
 
+/*==================================================================================================
 
+*                                   GLOBAL FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define MCL_START_SEC_CODE
 
+/* @violates @ref DMA_IP_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+/**
 
+ * @brief This function initializes the Dma Ip Driver.
 
+ * @details This service is a non reentrant function that shall initialize the Dma Ip driver.
 
+ *
 
+ * @param[in]  DmaInit           Pointer to the configuration structure.
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the initialization finished ok.
 
+ *                               DMA_IP_STATUS_WRONG_STATE is returned if the Dma Ip Channel state is
 
+ *                               not Dma_Ip_Ch_ResetState.
 
+ *
 
+ * @implements Dma_Ip_Init_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_Init(const Dma_Ip_InitType * const pxDmaInit);
 
+
 
+/**
 
+ * @brief This function deinitializes the Dma Ip Driver.
 
+ * @details This service is a non reentrant function that shall deinitialize the Dma Ip driver.
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the deinitialization finished ok
 
+ *
 
+ * @implements Dma_Ip_Deinit_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_Deinit(void);
 
+
 
+/**
 
+ * @brief This function sets Dma Ip Instance Command.
 
+ * @details This service is a reentrant function that shall command the Dma Instance.
 
+ *          The command shall trigger specific functionalities of the Dma Instance.
 
+ *
 
+ * @param[in]  LogicInst         Selection value of the Logic Instance.
 
+ * @param[in]  Command           The command for the Logic Instance.
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the command finished ok.
 
+ *
 
+ * @implements Dma_Ip_SetLogicInstanceCommand_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_SetLogicInstanceCommand(const uint32 LogicInst, const Dma_Ip_LogicInstanceCmdType Command);
 
+
 
+/**
 
+ * @brief This function gets Dma Ip Instance Status.
 
+ * @details This service is a reentrant function that shall get the Dma Instance status.
 
+ *          The command shall read specific functionalities of the Dma Instance.
 
+ *
 
+ * @param[in]  LogicInst         Selection value of the Logic Instance.
 
+ * @param[out] Status            Pointer to the Dma Instance status.
 
+ *
 
+ * @return Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the get status finished ok.
 
+ *
 
+ * @implements Dma_Ip_GetLogicInstanceStatus_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_GetLogicInstanceStatus(const uint32 LogicInst, Dma_Ip_LogicInstanceStatusType * const Status);
 
+
 
+/**
 
+ * @brief This function initializes the Dma Ip Logic Channel.
 
+ * @details This service is a non reentrant function that shall initialize the Dma Ip Logic Channel.
 
+ *
 
+ * @param[in]  LogicCh           Selection value of the Logic Channel.
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the initialization finished ok.
 
+ *                               DMA_IP_STATUS_WRONG_STATE is returned if the Dma Ip Channel state is
 
+ *                               not Dma_Ip_Ch_ResetState.
 
+ *                               DMA_IP_STATUS_WRONG_CONFIG is returned if wrong configuration was detected.
 
+ *
 
+ * @implements Dma_Ip_LogicChannelInit_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_LogicChannelInit(const uint32 LogicCh);
 
+
 
+/**
 
+ * @brief This function deinitializes the Dma Ip Logic Channel.
 
+ * @details This service is a non reentrant function that shall deinitialize the Dma Ip Logic Channel.
 
+ *
 
+ * @param[in]  LogicCh           Selection value of the Logic Channel.
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the deinitialization finished ok.
 
+ *
 
+ * @implements Dma_Ip_LogicChannelDeinit_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_LogicChannelDeinit(const uint32 LogicCh);
 
+
 
+/**
 
+ * @brief This function sets Dma Ip Logic Channel Command.
 
+ * @details This service is a reentrant function that shall command the Dma Channel.
 
+ *          The command shall trigger specific functionalities of the Dma Channel.
 
+ *
 
+ * @param[in]  LogicCh           Selection value of the Logic Channel.
 
+ * @param[in]  Command           The command for the Logic Channel.
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the initialization finished ok.
 
+ *                               DMA_IP_STATUS_WRONG_STATE is returned if the Dma Ip Channel state is
 
+ *                               not Dma_Ip_Ch_ReadyState.
 
+ *
 
+ * @implements Dma_Ip_SetLogicChannelCommand_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_SetLogicChannelCommand(const uint32 LogicCh, const Dma_Ip_LogicChannelCmdType Command);
 
+
 
+/**
 
+ * @brief This function gets Dma Ip Logic Channel Status.
 
+ * @details This service is a reentrant function that shall get the Dma Channel status.
 
+ *          The command shall read specific functionalities of the Dma Channel.
 
+ *
 
+ * @param[in]  LogicCh           Selection value of the Logic Channel.
 
+ * @param[out] Status            Pointer to the Dma Channel status.
 
+ *
 
+ * @return Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the get status finished ok.
 
+ *
 
+ * @implements Dma_Ip_GetLogicChannelStatus_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_GetLogicChannelStatus(const uint32 LogicCh, Dma_Ip_LogicChannelStatusType * const ChStatus);
 
+
 
+/**
 
+ * @brief This function sets Dma Ip Logic Channel Global List settings.
 
+ * @details This service is a reentrant function that shall set the Dma Ip Logic Channel
 
+ *          global parameters list.
 
+ *          The list is composed of an array of Dma Ip Logic Channel global parameters settings.
 
+ *          The settings list(array) is defined by the user needs: it contains the
 
+ *          desired parameters to be configured, in any desired order.
 
+ *
 
+ *          How to use this interface:
 
+ *          1. Use the "Dma_Ip_LogicChannelGlobalListType" to create a list(array) with the desired
 
+ *          paramaters to configure (see parameters: "Dma_Ip_LogicChannelGlobalParamType")
 
+ *          The list can declared globally or locally:
 
+ *          A. Global example:
 
+ *              Dma_Ip_LogicChannelGlobalListType global_Dma_Ip_ChannelGlobalList0[NUMBER_OF_PARAMETERS] = {...};
 
+ *          B. Local example:
 
+ *              Dma_Ip_LogicChannelGlobalListType Dma_Ip_ChannelGlobalList[NUMBER_OF_PARAMETERS];
 
+ *              Dma_Ip_ChannelGlobalList[PARAMETER0].Param = DMA_IP_CH_SET_EN_PREEMPTION_PRIORITY;
 
+ *              Dma_Ip_ChannelGlobalList[PARAMETER0].Value = TRUE;
 
+ *              Dma_Ip_ChannelGlobalList[PARAMETER1].Param = ...;
 
+ *              Dma_Ip_ChannelGlobalList[PARAMETER1].Value = ...;
 
+ *          2. Call the "Dma_Ip_SetLogicChannelGlobalList()" interface:
 
+ *              Dma_Ip_SetLogicChannelGlobalList(LOGIC_CHANNELx, Dma_Ip_ChannelGlobalList, NUMBER_OF_PARAMETERS);
 
+ *
 
+ * @param[in]  Channel           Specifies the Logic Channel Id.
 
+ * @param[in]  List              Pointer to the Global List Array.
 
+ * @param[in]  ListDimension     Number of entries in the List.
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the initialization finished ok.
 
+ *                               DMA_IP_STATUS_WRONG_STATE is returned if the Dma Ip Channel state is
 
+ *                               not Dma_Ip_Ch_ReadyState.
 
+ *
 
+ * @implements Dma_Ip_SetLogicChannelGlobalList_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_SetLogicChannelGlobalList(const uint32 LogicCh, const Dma_Ip_LogicChannelGlobalListType List[], const uint32 ListDimension);
 
+
 
+/**
 
+ * @brief This function sets Dma Ip Logic Channel Transfer List settings.
 
+ * @details -> This service is a reentrant function that shall set the Dma Ip Logic Channel
 
+ *          transfer parameters list.
 
+ *          -> The "Transfer List" loads the configuration directly into the Hardware TCD and disables
 
+ *          the ScatterGather for the Hardware TCD.
 
+ *          -> The list is composed of an array of Dma Ip Logic Channel transfer parameters settings.
 
+ *          -> The settings array is defined by the user needs: it contains entries for each desired
 
+ *          parameter to be configured, in any suitable order.
 
+ *
 
+ *          -> How to use this interface: <-
 
+ *          1. Use the "Dma_Ip_LogicChannelTransferListType" to create a list(array) with the desired
 
+ *          paramaters to configure (see parameters: "Dma_Ip_LogicChannelTransferParamType")
 
+ *          The list can declared globally or locally:
 
+ *          Global example:
 
+ *              #define DMA_IP_TRANSFER_LIST0_DIMENSION ((uint32)2U)
 
+ *              Dma_Ip_LogicChannelTransferListType global_Dma_Ip_ChannelTransferList0[DMA_IP_TRANSFER_LIST0_DIMENSION] = {...};
 
+ *          Local example:
 
+ *              #define DMA_IP_TRANSFER_LIST0_DIMENSION ((uint32)2U)
 
+ *              Dma_Ip_LogicChannelTransferListType Dma_Ip_ChannelTransferList0[DMA_IP_TRANSFER_LIST0_DIMENSION];
 
+ *              Dma_Ip_ChannelTransferList0[PARAMETER0].Param = DMA_IP_CH_SET_VAL_SOURCE_ADDRESS;
 
+ *              Dma_Ip_ChannelTransferList0[PARAMETER0].Value = &SourceBuffer;
 
+ *              Dma_Ip_ChannelTransferList0[PARAMETER1].Param = DMA_IP_CH_SET_DESTINATION_ADDRESS;
 
+ *              Dma_Ip_ChannelTransferList0[PARAMETER1].Value = &DestinationBuffer;
 
+ *          2. Call the "Dma_Ip_SetLogicChannelTransferList()" interface:
 
+ *              Dma_Ip_SetLogicChannelTransferList(LOGIC_CHANNELx, Dma_Ip_ChannelTransferList0, DMA_IP_TRANSFER_LIST0_DIMENSION);
 
+ *
 
+ *          -> Coding Example: <-
 
+ *              -> The user shall create the desired configuration list for his specific application.
 
+ *              "UserDefinedFileName.h"
 
+ *              #define DMA_IP_TRANSFER_LIST0_DIMENSION ((uint32)8U)
 
+ *              #define DMA_IP_SET_TRANSFER_TYPE0(CHANNEL, DIMENSION, SADDR, SOFF, SSIZE, DADDR, DOFF, DSIZE, MINOR_SIZE, MAJOR_COUNT) \
 
+ *                          Dma_Ip_LogicChannelTransferListType Dma_Ip_ChannelTransferList0[DIMENSION];                \
 
+ *                          Dma_Ip_ChannelTransferList0[0U].Param = DMA_IP_CH_SET_VAL_SOURCE_ADDRESS;                         \
 
+ *                          Dma_Ip_ChannelTransferList0[0U].Value = SADDR;                                             \
 
+ *                          Dma_Ip_ChannelTransferList0[1U].Param = DMA_IP_CH_SET_SOURCE_SIGNED_OFFSET;                    \
 
+ *                          Dma_Ip_ChannelTransferList0[1U].Value = SOFF;                                              \
 
+ *                          Dma_Ip_ChannelTransferList0[2U].Param = DMA_IP_CH_SET_SOURCE_TRANSFER_SIZE;                    \
 
+ *                          Dma_Ip_ChannelTransferList0[2U].Value = SSIZE;                                             \
 
+ *                          Dma_Ip_ChannelTransferList0[3U].Param = DMA_IP_CH_SET_DESTINATION_ADDRESS;                    \
 
+ *                          Dma_Ip_ChannelTransferList0[3U].Value = DADDR;                                             \
 
+ *                          Dma_Ip_ChannelTransferList0[4U].Param = DMA_IP_CH_SET_DESTINATION_SIGNED_OFFSET;               \
 
+ *                          Dma_Ip_ChannelTransferList0[4U].Value = DOFF;                                              \
 
+ *                          Dma_Ip_ChannelTransferList0[5U].Param = DMA_IP_CH_SET_DESTINATION_TRANSFER_SIZE;               \
 
+ *                          Dma_Ip_ChannelTransferList0[5U].Value = DSIZE;                                             \
 
+ *                          Dma_Ip_ChannelTransferList0[6U].Param = DMA_IP_CH_SET_MINORLOOP_SIZE;                         \
 
+ *                          Dma_Ip_ChannelTransferList0[6U].Value = MINOR_SIZE;                                        \
 
+ *                          Dma_Ip_ChannelTransferList0[7U].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;                        \
 
+ *                          Dma_Ip_ChannelTransferList0[7U].Value = MAJOR_COUNT;                                       \
 
+ *                          Dma_Ip_SetLogicChannelTransferList(CHANNEL, Dma_Ip_ChannelTransferList0, DIMENSION);
 
+ *
 
+ *              "ApplicationFileName.c"
 
+ *              void ConfigureDmaChannel(ConfigType * pxConfig)
 
+ *              {
 
+ *                  uint32 MinorLoopSize = 2U;
 
+ *                  uint32 MajorLoopCount;
 
+ *                  if(pxConfig->MajorLoopCondition == TRUE)
 
+ *                  {
 
+ *                      MajorLoopCount = 8U;
 
+ *                  }
 
+ *                  else
 
+ *                  {
 
+ *                      MajorLoopCount = 24U;
 
+ *                  }
 
+ *                  DMA_IP_SET_TRANSFER_TYPE0(pxConfig->LogicChannel,
 
+ *                                            DMA_IP_TRANSFER_LIST0_DIMENSION,
 
+ *                                            pxConfig->SourceBuffer,
 
+ *                                            2U,
 
+ *                                            DMA_IP_TRANSFER_SIZE_2_BYTE,
 
+ *                                            &RegisterAddress,
 
+ *                                            0U,
 
+ *                                            DMA_IP_TRANSFER_SIZE_2_BYTE,
 
+ *                                            MinorLoopSize,
 
+ *                                            MajorLoopCount);
 
+ *              }
 
+ *
 
+ * @param[in]  Channel           Specifies the Logic Channel Id.
 
+ * @param[in]  List              Pointer to the Transfer List Array.
 
+ * @param[in]  ListDimension     Number of entries in the List.
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the initialization finished ok.
 
+ *                               DMA_IP_STATUS_WRONG_STATE is returned if the Dma Ip Channel state is
 
+ *                               not Dma_Ip_Ch_ReadyState.
 
+ *
 
+ * @implements Dma_Ip_SetLogicChannelTransferList_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_SetLogicChannelTransferList(const uint32 LogicCh, const Dma_Ip_LogicChannelTransferListType List[], const uint32 ListDimension);
 
+
 
+/**
 
+ * @brief This function sets Dma Ip Logic Channel Scatter/Gather List settings.
 
+ * @details -> This service is a reentrant function that shall set the Dma Ip Logic Channel
 
+ *          scatter/gather parameters list.
 
+ *          -> The "Scatter/Gather List" configures Logic Elements belonging to the same
 
+ *          Dma Logic Channel.
 
+ *          -> The "Scatter/Gather List" loads the configuration into the Software TCD.
 
+ *          The Software TCD has the Scatter/Gather Enable set (ESG bit) and the Next Software
 
+ *          TCD Address already loaded during the configuration generation process.
 
+ *          -> The "Scatter/Gather List" shall not be able to modify the Scatter/Gather Element
 
+ *          linkage (reorder of elements in the chain). The linkage of the elements is set only
 
+ *          during the configuration process.
 
+ *          -> The settings array is defined by the user needs: it contains entries for
 
+ *          each desired parameter to be configured, in any suitable order.
 
+ *          -> This service does not load the Logic Element into the Hardware TCD. This functionality
 
+ *          is covered by Dma_Ip_SetLogicChannelScatterGatherConfig.
 
+ *
 
+ *          How to use this interface:
 
+ *          1. Use the "Dma_Ip_LogicChannelScatterGatherListType" to create a list(array) with the desired
 
+ *          paramaters to configure (see parameters: "Dma_Ip_LogicChannelTransferParamType")
 
+ *          The list can declared globally or locally:
 
+ *          Global example:
 
+ *              Dma_Ip_LogicChannelScatterGatherListType global_Dma_Ip_ChannelScatterGatherList0[NUMBER_OF_PARAMETERS] = {...};
 
+ *          Local example:
 
+ *              Dma_Ip_LogicChannelScatterGatherListType Dma_Ip_ChannelScatterGatherList[NUMBER_OF_PARAMETERS];
 
+ *              Dma_Ip_ChannelScatterGatherList[PARAMETER0].Param = DMA_IP_CH_SET_VAL_SOURCE_ADDRESS;
 
+ *              Dma_Ip_ChannelScatterGatherList[PARAMETER0].Value = &SourceBuffer;
 
+ *              Dma_Ip_ChannelScatterGatherList[PARAMETER1].Param = DMA_IP_CH_SET_DESTINATION_ADDRESS;
 
+ *              Dma_Ip_ChannelScatterGatherList[PARAMETER1].Value = &DestinationBuffer;
 
+ *          2. Call the "Dma_Ip_SetLogicChannelScatterGatherList()" interface:
 
+ *              Dma_Ip_SetLogicChannelScatterGatherList(LOGIC_CHANNELx, LOGIC_ELEMENTy, Dma_Ip_ChannelScatterGatherList, NUMBER_OF_PARAMETERS);
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the initialization finished ok.
 
+ *                               DMA_IP_STATUS_WRONG_STATE is returned if the Dma Ip Channel state is
 
+ *                               not Dma_Ip_Ch_ReadyState.
 
+ *
 
+ * @implements Dma_Ip_SetLogicChannelScatterGatherList_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_SetLogicChannelScatterGatherList(const uint32 LogicCh, const uint32 Element, const Dma_Ip_LogicChannelScatterGatherListType List[], const uint32 ListDimension);
 
+
 
+#if (DMA_IP_DMACRC_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief This function sets Dma Ip Logic Channel Crc List settings.
 
+ * @details This service is a reentrant function that shall set the Dma Ip Logic Channel
 
+ *          crc parameters list.
 
+ *          The settings array is defined by the user needs: it contains entries for
 
+ *          each desired parameter to be configured, in any suitable order.
 
+ *
 
+ *          How to use this interface:
 
+ *          1. Use the "Dma_Ip_LogicChannelCrcListType" to create a list(array) with the desired
 
+ *          paramaters to configure (see parameters: "Dma_Ip_LogicChannelCrcParamType")
 
+ *          The list can declared globally or locally:
 
+ *          Global example:
 
+ *              Dma_Ip_LogicChannelCrcListType global_Dma_Ip_ChannelCrcList0[NUMBER_OF_PARAMETERS] = {...};
 
+ *          Local example:
 
+ *              Dma_Ip_LogicChannelCrcListType Dma_Ip_ChannelCrcList[NUMBER_OF_PARAMETERS];
 
+ *              Dma_Ip_ChannelCrcList[PARAMETER0].Param = DMA_IP_CH_SET_CRC_POLYNOMIAL;
 
+ *              Dma_Ip_ChannelCrcList[PARAMETER0].Value = ISCSICRC-32C;
 
+ *              Dma_Ip_ChannelCrcList[PARAMETER1].Param = DMA_IP_CH_SET_CRC_EN_LOGIC;
 
+ *              Dma_Ip_ChannelCrcList[PARAMETER1].Value = TRUE;
 
+ *          2. Call the "Dma_Ip_SetLogicChannelCrcList()" interface:
 
+ *              Dma_Ip_SetLogicChannelCrcList(LOGIC_CHANNELx, Dma_Ip_ChannelCrcList, NUMBER_OF_PARAMETERS);
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the initialization finished ok.
 
+ *                               DMA_IP_STATUS_WRONG_STATE is returned if the Dma Ip Channel state is
 
+ *                               not Dma_Ip_Ch_ReadyState.
 
+ *
 
+ * @implements Dma_Ip_SetLogicChannelCrcList_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_SetLogicChannelCrcList(const uint32 LogicCh, Dma_Ip_LogicChannelCrcListType List[], const uint32 ListDimension);
 
+#endif
 
+
 
+/**
 
+ * @brief This function gets the Dma Ip Logic Channel Parameter value.
 
+ * @details This service is a reentrant function that shall get the Dma Channel
 
+ *          parameters value.
 
+ *
 
+ * @param[in]  LogicCh           Selection value of the Logic Channel.
 
+ * @param[in]  Param             Selection parameter.
 
+ * @param[out] Value             Pointer to the parameter value.
 
+ *
 
+ * @return Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the get information finished ok.
 
+ *
 
+ * @implements Dma_Ip_GetLogicChannelParam_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_GetLogicChannelParam(const uint32 LogicCh, const Dma_Ip_LogicChannelInfoParamType Param, uint32 * const Value);
 
+
 
+/**
 
+ * @brief This function configures the Dma Ip Logic Channel Scatter/Gather.
 
+ * @details This service is a reentrant function that shall configure the Dma Channel
 
+ *          scatter/gather functionality.
 
+ *          The specified Logic Element (corresponding to a Software TCD) shall be loaded
 
+ *          into the Dma Logic Channel's Hardware TCD.
 
+ *          The Logic Elements (describing the Software TCDs) form a simple chained list
 
+ *          and the "Element" parameter represents the lists's head.
 
+ *
 
+ * @param[in]  LogicCh           Selection value of the Logic Channel.
 
+ * @param[in]  Element           Selection value of the Logic Element representing the
 
+ *                               list's head.
 
+ *
 
+ * @return     Dma_Ip_ReturnType DMA_IP_STATUS_SUCCESS is returned if the initialization finished ok.
 
+ *                               DMA_IP_STATUS_WRONG_STATE is returned if the Dma Ip Channel state is
 
+ *                               not Dma_Ip_Ch_ReadyState.
 
+ *                               DMA_IP_STATUS_ERROR is returned if the Dma Ip Channel contains an error.
 
+ *
 
+ * @implements Dma_Ip_SetLogicChannelScatterGatherConfig_Activity
 
+ * */
 
+Dma_Ip_ReturnType Dma_Ip_SetLogicChannelScatterGatherConfig(const uint32 LogicCh, const uint32 Element);
 
+
 
+#define MCL_STOP_SEC_CODE
 
+/* @violates @ref DMA_IP_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+#endif /* #if (DMA_IP_IS_AVAILABLE == STD_ON) */
 
+
 
+/** @} */
 
+
 
+#endif  /* #ifndef DMA_IP_DRIVER_H_ */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/

+ 116 - 0
RTD/include/Dma_Ip_Devassert.h
Vedi File 

@@ -0,0 +1,116 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/* Prevention from multiple including the same header */
 
+#ifndef DMA_IP_DEVASSERT_H_
 
+#define DMA_IP_DEVASSERT_H_
 
+
 
+/**
 
+*   @file    Dma_Ip_Devassert.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - Dma Ip driver header file.
 
+*   @details
 
+*
 
+*   @addtogroup DMA_IP_DRIVER DMA IP Driver
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+*  1) system and project includes
 
+*  2) needed interfaces from external units
 
+*  3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Dma_Ip_Types.h"
 
+
 
+/*==================================================================================================
 
+                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define DMA_IP_DEVASSERT_VENDOR_ID_H                       43
 
+#define DMA_IP_DEVASSERT_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define DMA_IP_DEVASSERT_AR_RELEASE_MINOR_VERSION_H        4
 
+#define DMA_IP_DEVASSERT_AR_RELEASE_REVISION_VERSION_H     0
 
+#define DMA_IP_DEVASSERT_SW_MAJOR_VERSION_H                1
 
+#define DMA_IP_DEVASSERT_SW_MINOR_VERSION_H                0
 
+#define DMA_IP_DEVASSERT_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if header file and Dma_Ip_Types.h file are of the same vendor */
 
+#if (DMA_IP_DEVASSERT_VENDOR_ID_H != DMA_IP_TYPES_VENDOR_ID_H)
 
+    #error "Dma_Ip_Devassert.h and Dma_Ip_Types.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Types.h file are of the same Autosar version */
 
+#if ((DMA_IP_DEVASSERT_AR_RELEASE_MAJOR_VERSION_H != DMA_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (DMA_IP_DEVASSERT_AR_RELEASE_MINOR_VERSION_H != DMA_IP_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (DMA_IP_DEVASSERT_AR_RELEASE_REVISION_VERSION_H != DMA_IP_TYPES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Dma_Ip_Devassert.h and Dma_Ip_Types.h are different"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Types.h file are of the same Software version */
 
+#if ((DMA_IP_DEVASSERT_SW_MAJOR_VERSION_H != DMA_IP_TYPES_SW_MAJOR_VERSION_H) || \
 
+     (DMA_IP_DEVASSERT_SW_MINOR_VERSION_H != DMA_IP_TYPES_SW_MINOR_VERSION_H) || \
 
+     (DMA_IP_DEVASSERT_SW_PATCH_VERSION_H != DMA_IP_TYPES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Dma_Ip_Devassert.h and Dma_Ip_Types.h are different"
 
+#endif
 
+
 
+#if (DMA_IP_IS_AVAILABLE == STD_ON)
 
+/*==================================================================================================
 
+                                           TYPEDEF
 
+==================================================================================================*/
 
+#define MCL_START_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+#if (DMA_IP_DEV_ERROR_DETECT == STD_ON)
 
+    /* Implement default assert macro */
 
+    static inline void Dma_Ip_DevAssert(volatile boolean x)
 
+    {
 
+        if(x) { } else { ASM_KEYWORD("BKPT #0"); for(;;) {} }
 
+    }
 
+    #define DMA_IP_DEV_ASSERT(x) Dma_Ip_DevAssert(x)
 
+#else
 
+    /* Assert macro does nothing */
 
+    #define DMA_IP_DEV_ASSERT(x) ((void)0)
 
+#endif /* #if (DMA_IP_DEV_ERROR_DETECT == STD_ON) */
 
+
 
+#define MCL_STOP_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+#endif /* #if (DMA_IP_IS_AVAILABLE == STD_ON) */
 
+
 
+/** @} */
 
+
 
+#endif  /* #ifndef DMA_IP_DEVASSERT_H_ */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/

+ 105 - 0
RTD/include/Dma_Ip_Irq.h
Vedi File 

@@ -0,0 +1,105 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/* Prevention from multiple including the same header */
 
+#ifndef DMA_IP_IRQ_H_
 
+#define DMA_IP_IRQ_H_
 
+
 
+/**
 
+*   @file    Dma_Ip_Irq.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - Dma Ip driver header file.
 
+*   @details 
+*
 
+*   @addtogroup DMA_IP_DRIVER DMA IP Driver
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+*  1) system and project includes
 
+*  2) needed interfaces from external units
 
+*  3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Dma_Ip_Types.h"
 
+
 
+/*==================================================================================================
 
+                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define DMA_IP_IRQ_VENDOR_ID_H                       43
 
+#define DMA_IP_IRQ_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define DMA_IP_IRQ_AR_RELEASE_MINOR_VERSION_H        4
 
+#define DMA_IP_IRQ_AR_RELEASE_REVISION_VERSION_H     0
 
+#define DMA_IP_IRQ_SW_MAJOR_VERSION_H                1
 
+#define DMA_IP_IRQ_SW_MINOR_VERSION_H                0
 
+#define DMA_IP_IRQ_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if header file and Dma_Ip_Types.h file are of the same vendor */
 
+#if (DMA_IP_IRQ_VENDOR_ID_H != DMA_IP_TYPES_VENDOR_ID_H)
 
+    #error "Dma_Ip_Irq.h and Dma_Ip_Types.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Types.h file are of the same Autosar version */
 
+#if ((DMA_IP_IRQ_AR_RELEASE_MAJOR_VERSION_H != DMA_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (DMA_IP_IRQ_AR_RELEASE_MINOR_VERSION_H != DMA_IP_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (DMA_IP_IRQ_AR_RELEASE_REVISION_VERSION_H != DMA_IP_TYPES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Dma_Ip_Irq.h and Dma_Ip_Types.h are different"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Types.h file are of the same Software version */
 
+#if ((DMA_IP_IRQ_SW_MAJOR_VERSION_H != DMA_IP_TYPES_SW_MAJOR_VERSION_H) || \
 
+     (DMA_IP_IRQ_SW_MINOR_VERSION_H != DMA_IP_TYPES_SW_MINOR_VERSION_H) || \
 
+     (DMA_IP_IRQ_SW_PATCH_VERSION_H != DMA_IP_TYPES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Dma_Ip_Irq.h and Dma_Ip_Types.h are different"
 
+#endif
 
+
 
+#if (DMA_IP_IS_AVAILABLE == STD_ON)
 
+
 
+#define MCL_START_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+void Dma_Ip_IntIrqHandler(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh);
 
+void Dma_Ip_ErrorIrqHandler(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh);
 
+
 
+#define MCL_STOP_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+#endif /* #if (DMA_IP_IS_AVAILABLE == STD_ON) */
 
+
 
+/** @} */
 
+
 
+#endif  /* #ifndef DMA_IP_IRQ_H_ */
 
+
 
+/*******************************************************************************
 
+ * EOF
 
+ ******************************************************************************/

+ 117 - 0
RTD/include/Dma_Ip_Multicore.h
Vedi File 

@@ -0,0 +1,117 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/* Prevention from multiple including the same header */
 
+#ifndef DMA_IP_MULTICORE_H_
 
+#define DMA_IP_MULTICORE_H_
 
+
 
+/**
 
+*   @file    Dma_Ip_Multicore.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - Dma Ip driver header file.
 
+*   @details 
+*
 
+*   @addtogroup DMA_IP_DRIVER DMA IP Driver
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+*  1) system and project includes
 
+*  2) needed interfaces from external units
 
+*  3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Dma_Ip.h"
 
+
 
+/*==================================================================================================
 
+                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define DMA_IP_MULTICORE_VENDOR_ID_H                       43
 
+#define DMA_IP_MULTICORE_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define DMA_IP_MULTICORE_AR_RELEASE_MINOR_VERSION_H        4
 
+#define DMA_IP_MULTICORE_AR_RELEASE_REVISION_VERSION_H     0
 
+#define DMA_IP_MULTICORE_SW_MAJOR_VERSION_H                1
 
+#define DMA_IP_MULTICORE_SW_MINOR_VERSION_H                0
 
+#define DMA_IP_MULTICORE_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if header file and Dma_Ip.h file are of the same vendor */
 
+#if (DMA_IP_MULTICORE_VENDOR_ID_H != DMA_IP_VENDOR_ID_H)
 
+    #error "Dma_Ip_Multicore.h and Dma_Ip.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip.h file are of the same Autosar version */
 
+#if ((DMA_IP_MULTICORE_AR_RELEASE_MAJOR_VERSION_H != DMA_IP_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (DMA_IP_MULTICORE_AR_RELEASE_MINOR_VERSION_H != DMA_IP_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (DMA_IP_MULTICORE_AR_RELEASE_REVISION_VERSION_H != DMA_IP_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Dma_Ip_Multicore.h and Dma_Ip.h are different"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip.h file are of the same Software version */
 
+#if ((DMA_IP_MULTICORE_SW_MAJOR_VERSION_H != DMA_IP_SW_MAJOR_VERSION_H) || \
 
+     (DMA_IP_MULTICORE_SW_MINOR_VERSION_H != DMA_IP_SW_MINOR_VERSION_H) || \
 
+     (DMA_IP_MULTICORE_SW_PATCH_VERSION_H != DMA_IP_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Dma_Ip_Multicore.h and Dma_Ip.h are different"
 
+#endif
 
+
 
+#if (DMA_IP_IS_AVAILABLE == STD_ON)
 
+/*==================================================================================================
 
+*                                  STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+ *                                    LOCAL FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#if (DMA_IP_MULTICORE_IS_AVAILABLE == STD_ON)
 
+#define MCL_START_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+Dma_Ip_InitType * Dma_Ip_GetInitPtr(void);
 
+
 
+Dma_Ip_ReturnType Dma_Ip_ValidateMultiCoreInit(void);
 
+Dma_Ip_ReturnType Dma_Ip_ValidateMultiCoreChannelCall(uint8 ChannelNumber);
 
+Dma_Ip_ReturnType Dma_Ip_ValidateMultiCoreInstanceCall(uint8 InstanceNumber);
 
+
 
+#define MCL_STOP_SEC_CODE
 
+/* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
 
+#include "Mcl_MemMap.h"
 
+
 
+#endif /* DMA_IP_MULTICORE_IS_AVAILABLE == STD_ON */
 
+
 
+#endif /* #if (DMA_IP_IS_AVAILABLE == STD_ON) */
 
+
 
+/** @} */
 
+
 
+#endif  /* #ifndef DMA_IP_MULTICORE_H_ */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/

+ 438 - 0
RTD/include/Dma_Ip_Types.h
Vedi File 

@@ -0,0 +1,438 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/* Prevention from multiple including the same header */
 
+#ifndef DMA_IP_TYPES_H_
 
+#define DMA_IP_TYPES_H_
 
+
 
+/**
 
+*   @file    Dma_Ip_Types.h
 
+*
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - Dma Ip driver header file.
 
+*   @details
 
+*
 
+*   @addtogroup DMA_IP_DRIVER DMA IP Driver
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+*  1) system and project includes
 
+*  2) needed interfaces from external units
 
+*  3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Dma_Ip_Cfg_Defines.h"
 
+#include "Dma_Ip_Cfg_Devices.h"
 
+
 
+/*==================================================================================================
 
+                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define DMA_IP_TYPES_VENDOR_ID_H                       43
 
+#define DMA_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define DMA_IP_TYPES_AR_RELEASE_MINOR_VERSION_H        4
 
+#define DMA_IP_TYPES_AR_RELEASE_REVISION_VERSION_H     0
 
+#define DMA_IP_TYPES_SW_MAJOR_VERSION_H                1
 
+#define DMA_IP_TYPES_SW_MINOR_VERSION_H                0
 
+#define DMA_IP_TYPES_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if header file and Dma_Ip_Cfg_Defines.h file are of the same vendor */
 
+#if (DMA_IP_TYPES_VENDOR_ID_H != DMA_IP_CFG_DEFINES_VENDOR_ID_H)
 
+    #error "Dma_Ip_Types.h and Dma_Ip_Cfg_Defines.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Cfg_Defines.h file are of the same Autosar version */
 
+#if ((DMA_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H != DMA_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (DMA_IP_TYPES_AR_RELEASE_MINOR_VERSION_H != DMA_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (DMA_IP_TYPES_AR_RELEASE_REVISION_VERSION_H != DMA_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Dma_Ip_Types.h and Dma_Ip_Cfg_Defines.h are different"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Cfg_Defines.h file are of the same Software version */
 
+#if ((DMA_IP_TYPES_SW_MAJOR_VERSION_H != DMA_IP_CFG_DEFINES_SW_MAJOR_VERSION_H) || \
 
+     (DMA_IP_TYPES_SW_MINOR_VERSION_H != DMA_IP_CFG_DEFINES_SW_MINOR_VERSION_H) || \
 
+     (DMA_IP_TYPES_SW_PATCH_VERSION_H != DMA_IP_CFG_DEFINES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Dma_Ip_Types.h and Dma_Ip_Cfg_Defines.h are different"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Devices.h file are of the same vendor */
 
+#if (DMA_IP_TYPES_VENDOR_ID_H != DMA_IP_CFG_DEVICES_VENDOR_ID_H)
 
+    #error "Dma_Ip_Types.h and Dma_Ip_Devices.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Devices.h file are of the same Autosar version */
 
+#if ((DMA_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H != DMA_IP_CFG_DEVICES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (DMA_IP_TYPES_AR_RELEASE_MINOR_VERSION_H != DMA_IP_CFG_DEVICES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (DMA_IP_TYPES_AR_RELEASE_REVISION_VERSION_H != DMA_IP_CFG_DEVICES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Dma_Ip_Types.h and Dma_Ip_Devices.h are different"
 
+#endif
 
+
 
+/* Check if header file and Dma_Ip_Devices.h file are of the same Software version */
 
+#if ((DMA_IP_TYPES_SW_MAJOR_VERSION_H != DMA_IP_CFG_DEVICES_SW_MAJOR_VERSION_H) || \
 
+     (DMA_IP_TYPES_SW_MINOR_VERSION_H != DMA_IP_CFG_DEVICES_SW_MINOR_VERSION_H) || \
 
+     (DMA_IP_TYPES_SW_PATCH_VERSION_H != DMA_IP_CFG_DEVICES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Dma_Ip_Types.h and Dma_Ip_Devices.h are different"
 
+#endif
 
+
 
+#if (DMA_IP_IS_AVAILABLE == STD_ON)
 
+/*==================================================================================================
 
+                                              ENUM
 
+==================================================================================================*/
 
+/**
 
+ * @brief This type contains the Dma Ip Return Type.
 
+ * @details The Return Type give information for the execution of interfaces.
 
+ *
 
+ * */
 
+typedef enum{
 
+    DMA_IP_STATUS_SUCCESS      = E_OK,
 
+    DMA_IP_STATUS_ERROR        = E_NOT_OK,
 
+    DMA_IP_STATUS_WRONG_STATE  = 2U,
 
+    DMA_IP_STATUS_WRONG_CONFIG = 3U,
 
+#if (DMA_IP_MULTICORE_IS_AVAILABLE == STD_ON)
 
+    DMA_IP_STATUS_WRONG_CORE   = 4U,
 
+#endif /* DMA_IP_MULTICORE_IS_AVAILABLE == STD_ON */
 
+}Dma_Ip_ReturnType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Channel State Value Type.
 
+ * @details The Channel State type provides information about the channel's general state.
 
+ *          The Reset State is present when the Dma Channel is uninitialized.
 
+ *          The Ready State is present when the Dma Channel is initialized and without error.
 
+ *          The Error State is present when the Dma Channel is initialized and with error.
 
+ *
 
+ * */
 
+typedef enum{
 
+    DMA_IP_CH_RESET_STATE         = 0U,
 
+    DMA_IP_CH_READY_STATE         = 1U,
 
+    DMA_IP_CH_TRANSFER_STATE      = 2U,
 
+    DMA_IP_CH_SCATTERGATHER_STATE = 3U,
 
+    DMA_IP_CH_ERROR_STATE         = 4U,
 
+}Dma_Ip_HwChannelStateValueType;
 
+
 
+/*==================================================================================================
 
+                                     CONFIGURATION STRUCTURE
 
+==================================================================================================*/
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Callback interface.
 
+ * @details The Callback is defined by the user and installed by the driver in the corresponding IRQ.
 
+ *
 
+ * @return void
 
+ *
 
+ * @implements Dma_Ip_Callback_typedef
 
+ * */
 
+typedef void (*Dma_Ip_Callback)(void);
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Channel Identification.
 
+ * @details The Logic Channel is identified by the following structure:
 
+ *          The Logic Channel Id contains the ID value.
 
+ *          The Hardware Version Id contains the DMA Hardware Ip Block Version.
 
+ *          The Hardware Instance Id contains the DMA Hardware Instance identification.
 
+ *          The Hardware Channel Id contains the DMA Hardware Channel identification.
 
+ *          The Hardware Crc Instance Id contains the DMA Hardware Crc Instance identification if CRC_IP is available.
 
+ *          The Hardware Crc Channel Id contains the DMA Hardware Crc Channel identification if CRC_IP is available.
 
+ *          The Interrupt Callback stores pointer to the user defined interrupt callback.
 
+ *          The Error Interrupt Callback stores pointer to the user defined error interrupt callback.
 
+ *
 
+ * @implements Dma_Ip_LogicChannelIdType_struct
 
+ * */
 
+typedef struct{
 
+    uint32 LogicChId;                  /**< @brief DMA logic channel number. */
 
+    uint8 HwVersId;                    /**< @brief DMA hardware version. */
 
+    uint8 HwInstId;                    /**< @brief DMA hardware instance number. */
 
+    uint8 HwChId;                      /**< @brief DMA hardware channel number. */
 
+    Dma_Ip_Callback IntCallback;       /**< @brief The channel callback is installed in the interrupt and is called automatically
 
+                                                   from the interrupt every time it is triggered. */
 
+    Dma_Ip_Callback ErrIntCallback;    /**< @brief The channel error callback is installed in the error interrupt and is called automatically
 
+                                                   from the interrupt every time it is triggered. */
 
+}Dma_Ip_LogicChannelIdType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Global Configuration.
 
+ * @details The Global Configuration of an Logic Channel, contains all the information describing a
 
+ *          channel, but are not present in the DMA TCD.
 
+ *          It contains configuration split in four main areas:
 
+ *          Control defines functionality covering the channel's bus control.
 
+ *          Request defines functionality covering the channel's request interface, including DMAMUX.
 
+ *          Interrupt defines functionality covering special channel interrupts.
 
+ *          Priority defines functionality covering the channel's priority mechanism.
 
+ *
 
+ * @implements Dma_Ip_GlobalConfigType_struct
 
+ * */
 
+typedef struct{
 
+    struct{
 
+        boolean EnMasterIdReplication;     /**< @brief The eDMA master ID replication field allows the eDMA to use the same protection level and system bus ID
 
+                                                      of the master programming the eDMA's TCD. This forces MP_CSR[GMRC] = 1. */
 
+        boolean EnBufferedWrites;          /**< @brief When buffered writes are enabled, all writes except for the last write sequence of the minor loop are
 
+                                                      signaled by the eDMA as bufferable. */
 
+    }Control;
 
+    struct{
 
+        uint8 SourceMux;                   /**< @brief DMAMUX: Select the channel request source. */
 
+        boolean EnSourceMux;               /**< @brief DMAMUX: Enable/Disable the hardware request for the channel. */
 
+        boolean EnTriggerMux;              /**< @brief DMAMUX: Enable/Disable periodic trigger capability of the channel. Only the first five channels have this feature. */
 
+        boolean EnRequest;                 /**< @brief DMA: Enable/Disable the hardware request for the channel. */
 
+    }Request;
 
+    struct{
 
+        boolean EnErrorInt;                /**< @brief Enable/Disable channel error interrupt. */
 
+    }Interrupt;
 
+    struct{
 
+        uint8 Group;                       /**< @brief The channel is assigned to a specific priority group. NOT available for scatter/gather. */
 
+        uint8 Level;                       /**< @brief The channel is assigned a priority level inside the priority group. */
 
+        boolean EnPreemption;              /**< @brief Allows the channel to be interrupted by a higher-priority channel. */
 
+        boolean DisPreempt;                /**< @brief Allows the channel to interrupt a lower-priority channel. */
 
+    }Priority;
 
+}Dma_Ip_GlobalConfigType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Transfer Configuration.
 
+ * @details The Transfer Configuration of an Logic Channel, contains all the information describing a
 
+ *          channel transfer functionalities and are present in the DMA TCD.
 
+ *          It contains configuration split in five main areas:
 
+ *          Control defines functionality covering the channel control functions. It includes additionaly
 
+ *          the Scatter/Gather Address and Destination Store Address.
 
+ *
 
+ * */
 
+typedef struct{
 
+    struct{
 
+        uint32 ScatterGatherAddr;
 
+        uint32 DestinationStoreAddr;    /**< @brief If destination store address is not 0(NULL), then the ESDA flag is set and the source adjustment
 
+                                                    is disabled. */
 
+        uint8 BandwidthControl;         /**< @brief Throttles the amount of bus bandwidth consumed by the eDMA. Generally, as the eDMA processes the
 
+                                                    minor loop, it continuously generates read/write sequences until the minor count is exhausted. This field
 
+                                                    forces eDMA to stall after the completion of each read/write access, to control the bus request bandwidth
 
+                                                    seen by the system bus interconnect. */
 
+        boolean EnStart;
 
+        boolean EnMajorInt;
 
+        boolean EnHalfMajorInt;
 
+        boolean DisAutoHwRequest;       /**< @brief Enable/Disable automatic hardware request clear when the current major iteration count reaches 0.(DREQ) */
 
+        boolean EnEndOfPacketSignal;    /**< @brief With an end-of-packet retirement, the current TCD destination address minus the software-saved
 
+                                                    initial address (DADDR), the total amount of data transferred.*/
 
+    }Control;
 
+    struct{
 
+        uint32 Addr;                    /**< @brief Source address for the data transfer. */
 
+        sint32 LastAddrAdj;             /**< @brief Signed adjustment for the source address. If "storeAddr" configuration value is not 0(NULL),
 
+                                                    then the ESDA flag is set and "destination store address" is enabled, thus "lastAddrAdj"
 
+                                                    becomes unavailable. */
 
+        sint16 SignedOffset;            /**< @brief Signed offset for the source address. */
 
+        uint8 TransferSize;             /**< @brief Source number of bytes transferred per request. */
 
+        uint8 Modulo;
 
+    }Source;
 
+    struct{
 
+        uint32 Addr;                    /**< @brief Destination address for the data transfer. */
 
+        sint32 LastAddrAdj;             /**< @brief Signed adjustment for the destination address. If Scatter/Gather configuration is loaded for
 
+                                                    the channel, then the ESG(Enable Scatter/Gather) flag is set and this configuration is
 
+                                                    NOT available. */
 
+        sint16 SignedOffset;            /**< @brief Signed offset for the destination address. */
 
+        uint8 TransferSize;             /**< @brief Destination number of bytes transferred per request. */
 
+        uint8 Modulo;
 
+    }Destination;
 
+    struct{
 
+        uint32 Size;                    /**< @brief Number of bytes transferred in a MinorLoop. */
 
+        sint32 Offset;                  /**< @brief MinorLoop Offset value. */
 
+        uint8 LogicLinkCh;              /**< @brief Set the minor loop link channel. */
 
+        boolean EnLink;                 /**< @brief Enable/Disable minor loop link channel. */
 
+        boolean EnSrcOffset;            /**< @brief Enable/Disable MinorLoop Source Offset. */
 
+        boolean EnDstOffset;            /**< @brief Enable/Disable MinorLoop Destination Offset. */
 
+    }MinorLoop;
 
+    struct{
 
+        uint32 Count;                   /**< @brief Set major loop count by configuring CITER and BITER. */
 
+        uint8 LogicLinkCh;              /**< @brief Set the major loop link channel. */
 
+        boolean EnLink;                 /**< @brief Enable/Disable major loop link channel. */
 
+    }MajorLoop;
 
+}Dma_Ip_TransferConfigType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Scatter/Gather Configuration.
 
+ * @details The Scatter/Gather Configuration of a Logic Channel, contains all the information describing
 
+ *          the channel's needed resources for a Scatter/Gather element.
 
+ *          It contains a pointer to the transfer configuration, a pointer to a Software TCD, a pointer
 
+ *          to the next Scatter/Gather configuration and a status flag for loading the transfer
 
+ *          configuration into the Software TCD.
 
+ *
 
+ * */
 
+typedef struct Dma_Ip_ScatterGatherConfigType{
 
+    Dma_Ip_TransferConfigType * TransferConfig;      /**< @brief Configuration that shall be loaded into the Software TCD. */
 
+    Dma_Ip_SwTcdRegType * Stcd;                      /**< @brief Software TCD shall be loaded with own TCD configuration. */
 
+    boolean Loaded;
 
+    struct Dma_Ip_ScatterGatherConfigType * NextConfig;    /**< @brief Next Logic Channel configuration.
 
+                                                                       If the address is not NULL, then the ESG flag is enabled (Scatter/Gather address)
 
+                                                                       and the destination adjustment is disabled. The next configuration address is stored. */
 
+}Dma_Ip_ScatterGatherConfigType;
 
+
 
+#if (DMA_IP_DMACRC_IS_AVAILABLE == STD_ON)
 
+typedef struct{
 
+    uint8 HwCrcChId;                    /**< @brief DMA CRC hardware channel. */
 
+    uint8 Mode;                         /**< @brief DMA CRC hardware mode select. */
 
+    uint8 Polynomial;                   /**< @brief DMA CRC hardware polynomial select. */
 
+    uint32 InitValue;                   /**< @brief DMA CRC hardware initial value of CRC. */
 
+    boolean EnInitSel;                  /**< @brief DMA CRC hardware enable/disable initial value of CRC. */
 
+    boolean EnLogic;                    /**< @brief DMA CRC hardware enable/disable logic. */
 
+}Dma_Ip_CrcConfigType;
 
+#endif
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Channel Configuration.
 
+ * @details The Logic Channel Configuration consists of the Logic Channel Identifier, pointer
 
+ *          to the Global Configuration, pointer to the Transfer Configuration and pointer to
 
+ *          the Scatter/Gather configuration.
 
+ *          The Logic Channel Configuration contains all data needed to initialize a Logic
 
+ *          Channel.
 
+ *
 
+ * */
 
+typedef struct{
 
+    Dma_Ip_LogicChannelIdType LogicChId;                           /**< @brief The Logic Channel ID contains configuration information and identification. */
 
+    const Dma_Ip_GlobalConfigType * pxGlobalConfig;                /**< @brief The Global Configuration pointer shall contain the global data. */
 
+    const Dma_Ip_TransferConfigType * pxTransferConfig;            /**< @brief The Transfer Configuration pointer shall contain the transfer data. */
 
+    Dma_Ip_ScatterGatherConfigType ** ppxScatterGatherConfigArray; /**< @brief The Scatter/Gather Configuration pointer shall contain a pointer to an array
 
+                                                                               containing all Scatter/Gather Logic Elements. */
 
+#if (DMA_IP_DMACRC_IS_AVAILABLE == STD_ON)
 
+    const Dma_Ip_CrcConfigType * pxCrcConfig;
 
+#endif
 
+}Dma_Ip_LogicChannelConfigType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Instance Identification.
 
+ * @details The Logic Instance is identified by the following structure:
 
+ *          The Logic Instance Id contains the ID value.
 
+ *          The Hardware Version Id contains the DMA Hardware Ip Block Version.
 
+ *          The Hardware Instance Id contains the DMA Hardware Instance identification.
 
+ *
 
+ * */
 
+typedef struct{
 
+    uint32 LogicInstId;    /**< @brief DMA logic instance number. */
 
+    uint8 HwVersId;        /**< @brief DMA hardware version number. */
 
+    uint8 HwInstId;        /**< @brief DMA hardware instance number. */
 
+}Dma_Ip_LogicInstanceIdType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Logic Instance Configuration.
 
+ * @details The Logic Instance Configuration contains all the information describing
 
+ *          an instance functionality.
 
+ *
 
+ * */
 
+typedef struct{
 
+    Dma_Ip_LogicInstanceIdType LogicInstId;     /**< @brief DMA logic instance number. */
 
+    boolean EnDebug;                   /**< @brief When in debug mode, the DMA stalls the start of a new channel. Executing channels are allowed to
 
+                                                   complete. DMA resumes channel execution when the system exits debug mode or clears the EDBG field to 0. */
 
+    boolean EnRoundRobin;              /**< @brief Enable Round Robin Channel Arbitration */
 
+    boolean EnHaltAfterError;          /**< @brief When this field is set to 1, any error causes the HALT field to be set to 1. Then all service requests are
 
+                                                   ignored until the HALT field is cleared to 0. */
 
+    boolean EnChLinking;               /**< @brief Global Channel Linking Control */
 
+    boolean EnGlMasterIdReplication;   /**< @brief If master ID replication is disabled, the privileged protection level (Supervisor mode) for DMA transfers is used. */
 
+ #if (DMA_IP_DMACRC_IS_AVAILABLE == STD_ON)
 
+    boolean EnSwapBit;                  /**< @brief Enable DMA CRC instance swap bit option. */
 
+    boolean EnSwapByte;                 /**< @brief Enable DMA CRC instance swap byte option. */
 
+    boolean EnGlobal;                   /**< @brief Enable DMA CRC instance global enable option. */
 
+#endif
 
+}Dma_Ip_LogicInstanceConfigType;
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Hardware Channel State.
 
+ * @details The Hardware Channel State contains the channel's state based on runtime
 
+ *          actions. The structure links the hardware channel state with the Logic
 
+ *          Channel.
 
+ *
 
+ * */
 
+typedef struct{
 
+    const Dma_Ip_LogicChannelIdType * LogicChId;
 
+    Dma_Ip_HwChannelStateValueType StateValue;
 
+    uint32 LogicChErrors;
 
+}Dma_Ip_HwChannelStateType;
 
+
 
+#if (DMA_IP_MULTICORE_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief  This type contains the Dma Ip Multicore configuration Type.
 
+ *
 
+ * */
 
+typedef struct
 
+{
 
+    const uint8 pMultiCoreConfig;
 
+    const uint8 pMultiCoreDmaChannelConfig[DMA_IP_NOF_HWV3_CH];
 
+    const uint8 pMultiCoreDmaInstanceConfig[DMA_IP_TCD_NOF_HWV3_CH_INST];
 
+}Dma_Ip_MultiCoreConfigType;
 
+#endif /* DMA_IP_MULTICORE_IS_AVAILABLE == STD_ON */
 
+
 
+#if (DMA_IP_VIRTUAL_ADDRESS_MAPPING_IS_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief  This type contains the Dma Ip Virtual memory section configuration Type.
 
+ *
 
+ * */
 
+typedef struct
 
+{
 
+    const uint32 VirtualAddrStart;
 
+    const uint32 VirtualAddrEnd;
 
+    const uint32 PhysicalAddrStart;
 
+    const uint32 PhysicalAddrEnd;
 
+}Dma_Ip_VirtualSectionConfigType;
 
+
 
+/**
 
+ * @brief  This type contains the Dma Ip Virtual memory configuration Type.
 
+ *
 
+ * */
 
+typedef struct
 
+{
 
+    const uint8 NumOfSection;
 
+    const Dma_Ip_VirtualSectionConfigType (* const pSectionConfig)[];
 
+}Dma_Ip_VirtualMemoryConfigType;
 
+#endif /* DMA_IP_VIRTUAL_ADDRESS_MAPPING_IS_AVAILABLE == STD_ON */
 
+
 
+/**
 
+ * @brief This type contains the Dma Ip Initialization.
 
+ * @details The Dma Ip Initialization contains all the information required to initialize the
 
+ *          Dma Peripheral.
 
+ *          Each pointer shall be loaded with a specific configuration used be the Dma.
 
+ *
 
+ * */
 
+typedef struct{
 
+    Dma_Ip_HwChannelStateType ** ppxChStateArray;
 
+    const Dma_Ip_LogicChannelConfigType * const pxLogicChannelResetConfig;
 
+    const Dma_Ip_LogicChannelConfigType * const * ppxLogicChannelConfigArray;
 
+    const Dma_Ip_LogicInstanceConfigType * const pxLogicInstanceResetConfig;
 
+    const Dma_Ip_LogicInstanceConfigType * const * ppxLogicInstConfigArray;
 
+#if (DMA_IP_MULTICORE_IS_AVAILABLE == STD_ON)
 
+    const Dma_Ip_MultiCoreConfigType * const pxMultiCoreConfig;
 
+#endif /* DMA_IP_MULTICORE_IS_AVAILABLE == STD_ON */
 
+#if (DMA_IP_VIRTUAL_ADDRESS_MAPPING_IS_AVAILABLE == STD_ON)
 
+    const Dma_Ip_VirtualMemoryConfigType * const pxVirtualMemoryConfig;
 
+#endif /* DMA_IP_VIRTUAL_ADDRESS_MAPPING_IS_AVAILABLE == STD_ON */
 
+}Dma_Ip_InitType;
 
+
 
+#endif /* #if (DMA_IP_IS_AVAILABLE == STD_ON) */
 
+
 
+/** @} */
 
+
 
+#endif  /* #ifndef DMA_IP_TYPES_H_ */
 
+
 
+/*==================================================================================================
 
+ *                                        END OF FILE
 
+==================================================================================================*/

+ 125 - 0
RTD/include/EcuM.h
Vedi File 

@@ -0,0 +1,125 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef ECUM_H
 
+#define ECUM_H
 
+
 
+/**
 
+*   @file
 
+*
 
+*   @addtogroup ECUM_MODULE EcuM Module
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C" {
 
+#endif
 
+/*==================================================================================================
 
+*                                         INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "EcuM_Externals.h"
 
+#include "EcuM_Cfg.h"
 
+
 
+/*==================================================================================================
 
+*                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define ECUM_VENDOR_ID 43
 
+#define ECUM_MODULE_ID 10
 
+#define ECUM_AR_RELEASE_MAJOR_VERSION 4
 
+#define ECUM_AR_RELEASE_MINOR_VERSION 4
 
+#define ECUM_AR_RELEASE_REVISION_VERSION 0
 
+#define ECUM_SW_MAJOR_VERSION 1
 
+#define ECUM_SW_MINOR_VERSION 0
 
+#define ECUM_SW_PATCH_VERSION 0
 
+
 
+/*==================================================================================================
 
+*                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+
 
+#if (ECUM_VENDOR_ID != ECUM_CBK_VENDOR_ID)
 
+#error "EcuM_Cbk.h and EcuM.h have different vendor ids"
 
+#endif
 
+
 
+#if (ECUM_VENDOR_ID != ECUM_CFG_VENDOR_ID)
 
+#error "EcuM_Cfg.h and EcuM.h have different vendor ids"
 
+#endif
 
+
 
+
 
+#if ((ECUM_AR_RELEASE_MAJOR_VERSION != ECUM_CBK_AR_RELEASE_MAJOR_VERSION) || \
 
+     (ECUM_AR_RELEASE_MINOR_VERSION != ECUM_CBK_AR_RELEASE_MINOR_VERSION) || \
 
+     (ECUM_AR_RELEASE_REVISION_VERSION != ECUM_CBK_AR_RELEASE_REVISION_VERSION))
 
+#error "AutoSar Version Numbers of EcuM_Cbk.h and EcuM.h are different"
 
+#endif
 
+
 
+#if ((ECUM_AR_RELEASE_MAJOR_VERSION != ECUM_CFG_AR_RELEASE_MAJOR_VERSION) || \
 
+     (ECUM_AR_RELEASE_MINOR_VERSION != ECUM_CFG_AR_RELEASE_MINOR_VERSION) || \
 
+     (ECUM_AR_RELEASE_REVISION_VERSION != ECUM_CFG_AR_RELEASE_REVISION_VERSION))
 
+#error "AutoSar Version Numbers of EcuM_Cfg.h and EcuM.h are different"
 
+#endif
 
+
 
+#if ((ECUM_SW_MAJOR_VERSION != ECUM_CBK_SW_MAJOR_VERSION) || \
 
+     (ECUM_SW_MINOR_VERSION != ECUM_CBK_SW_MINOR_VERSION) || \
 
+     (ECUM_SW_PATCH_VERSION != ECUM_CBK_SW_PATCH_VERSION))
 
+#error "Software Version Numbers of EcuM_Cbk.h and EcuM.h are different"
 
+#endif
 
+
 
+#if ((ECUM_SW_MAJOR_VERSION != ECUM_CFG_SW_MAJOR_VERSION) || \
 
+     (ECUM_SW_MINOR_VERSION != ECUM_CFG_SW_MINOR_VERSION) || \
 
+     (ECUM_SW_PATCH_VERSION != ECUM_CFG_SW_PATCH_VERSION))
 
+#error "Software Version Numbers of EcuM_Cfg.h and EcuM.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                           CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                 STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                 GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                     FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* ECUM_H */

+ 122 - 0
RTD/include/EcuM_Externals.h
Vedi File 

@@ -0,0 +1,122 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef ECUM_CBK_H
 
+#define ECUM_CBK_H
 
+
 
+/**
 
+*   @file
 
+*
 
+*   @addtogroup ECUM_MODULE EcuM Module
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C" {
 
+#endif
 
+/*==================================================================================================
 
+*                                         INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "EcuM_Cfg.h"
 
+
 
+/*==================================================================================================
 
+*                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define ECUM_CBK_VENDOR_ID                      43
 
+#define ECUM_CBK_MODULE_ID                      10
 
+#define ECUM_CBK_AR_RELEASE_MAJOR_VERSION       4
 
+#define ECUM_CBK_AR_RELEASE_MINOR_VERSION       4
 
+#define ECUM_CBK_AR_RELEASE_REVISION_VERSION    0
 
+#define ECUM_CBK_SW_MAJOR_VERSION               1
 
+#define ECUM_CBK_SW_MINOR_VERSION               0
 
+#define ECUM_CBK_SW_PATCH_VERSION               0
 
+/*==================================================================================================
 
+*                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+#if (ECUM_CBK_VENDOR_ID != ECUM_CFG_VENDOR_ID)
 
+#error "EcuM_Cbk.h and EcuM_Cfg.h have different vendor ids"
 
+#endif
 
+
 
+#if ((ECUM_CBK_AR_RELEASE_MAJOR_VERSION != ECUM_CFG_AR_RELEASE_MAJOR_VERSION) || \
 
+     (ECUM_CBK_AR_RELEASE_MINOR_VERSION != ECUM_CFG_AR_RELEASE_MINOR_VERSION) || \
 
+     (ECUM_CBK_AR_RELEASE_REVISION_VERSION != ECUM_CFG_AR_RELEASE_REVISION_VERSION))
 
+#error "AutoSar Version Numbers of EcuM_Cbk.h and EcuM_Cfg.h are different"
 
+#endif
 
+
 
+#if ((ECUM_CBK_SW_MAJOR_VERSION != ECUM_CFG_SW_MAJOR_VERSION) || \
 
+     (ECUM_CBK_SW_MINOR_VERSION != ECUM_CFG_SW_MINOR_VERSION) || \
 
+     (ECUM_CBK_SW_PATCH_VERSION != ECUM_CFG_SW_PATCH_VERSION))
 
+#error "Software Version Numbers of EcuM_Cbk.h and EcuM_Cfg.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                           CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                 STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                 GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+#define ECUM_START_SEC_VAR_CLEARED_32
 
+#include "Ecum_MemMap.h"
 
+
 
+extern EcuM_WakeupSourceType EcuMLastWakeupEvent; /**< @brief last wakeup event to EcuM (source ID)*/
 
+
 
+#define ECUM_STOP_SEC_VAR_CLEARED_32
 
+#include "Ecum_MemMap.h"
 
+
 
+/*==================================================================================================
 
+*                                     FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define ECUM_START_SEC_CODE
 
+#include "Ecum_MemMap.h"
 
+
 
+void EcuM_SetWakeupEvent(EcuM_WakeupSourceType sources);
 
+void EcuM_ValidateWakeupEvent(EcuM_WakeupSourceType sources);
 
+void EcuM_CheckWakeup(EcuM_WakeupSourceType wakeupSource);
 
+
 
+#define ECUM_STOP_SEC_CODE
 
+#include "Ecum_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* ECUM_CBK_H */

+ 1000 - 0
RTD/include/FlexCAN_Ip.h
Vedi File 

@@ -0,0 +1,1000 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/* implements FlexCAN_Ip.h_Artifact */
 
+#ifndef FLEXCAN_FLEXCAN_IP_H_
 
+#define FLEXCAN_FLEXCAN_IP_H_
 
+
 
+/**
 
+* @file FlexCAN_Ip.h
 
+*
 
+* @brief FlexCAN Ip Driver Header File
 
+* @details FlexCAN Ip Driver Header File contains the APIs and structures exported by FlexCAN Driver
 
+*
 
+* @addtogroup FlexCAN
 
+* @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Mcal.h"
 
+#include "FlexCAN_Ip_DeviceReg.h"
 
+#include "FlexCAN_Ip_Types.h"
 
+#include "Platform_Types.h"
 
+#include "FlexCAN_Ip_Cfg.h"
 
+#include "FlexCAN_Ip_Wrapper.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXCAN_IP_VENDOR_ID_H                      43
 
+#define FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H       4
 
+#define FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H       4
 
+#define FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_H    0
 
+#define FLEXCAN_IP_SW_MAJOR_VERSION_H               1
 
+#define FLEXCAN_IP_SW_MINOR_VERSION_H               0
 
+#define FLEXCAN_IP_SW_PATCH_VERSION_H               0
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and FlexCAN_Ip_DeviceReg header file are of the same vendor */
 
+#if (FLEXCAN_IP_VENDOR_ID_H != FLEXCAN_IP_DEVICEREG_VENDOR_ID_H)
 
+    #error "FlexCAN_Ip.h and FlexCAN_Ip_DeviceReg.h have different vendor ids"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_DeviceReg header file are of the same Autosar version */
 
+#if ((FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H    != FLEXCAN_IP_DEVICEREG_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H    != FLEXCAN_IP_DEVICEREG_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_H != FLEXCAN_IP_DEVICEREG_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of FlexCAN_Ip.h and FlexCAN_Ip_DeviceReg.h are different"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_DeviceReg header file are of the same Software version */
 
+#if ((FLEXCAN_IP_SW_MAJOR_VERSION_H != FLEXCAN_IP_DEVICEREG_SW_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_SW_MINOR_VERSION_H != FLEXCAN_IP_DEVICEREG_SW_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_SW_PATCH_VERSION_H != FLEXCAN_IP_DEVICEREG_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of FlexCAN_Ip.h and FlexCAN_Ip_DeviceReg.h are different"
 
+#endif
 
+
 
+/* Check if current file and FlexCAN_Ip_Types header file are of the same vendor */
 
+#if (FLEXCAN_IP_VENDOR_ID_H != FLEXCAN_IP_TYPES_VENDOR_ID_H)
 
+    #error "FlexCAN_Ip.h and FlexCAN_Ip_Types.h have different vendor ids"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_Types header file are of the same Autosar version */
 
+#if ((FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H    != FLEXCAN_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H    != FLEXCAN_IP_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_H != FLEXCAN_IP_TYPES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of FlexCAN_Ip.h and FlexCAN_Ip_Types.h are different"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_Types header file are of the same Software version */
 
+#if ((FLEXCAN_IP_SW_MAJOR_VERSION_H != FLEXCAN_IP_TYPES_SW_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_SW_MINOR_VERSION_H != FLEXCAN_IP_TYPES_SW_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_SW_PATCH_VERSION_H != FLEXCAN_IP_TYPES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of FlexCAN_Ip.h and FlexCAN_Ip_Types.h are different"
 
+#endif
 
+
 
+/* Check if current file and FlexCAN_Ip_Cfg header file are of the same vendor */
 
+#if (FLEXCAN_IP_VENDOR_ID_H != FLEXCAN_IP_CFG_VENDOR_ID_H)
 
+    #error "FlexCAN_Ip.h and FlexCAN_Ip_Cfg.h have different vendor ids"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_Cfg header file are of the same Autosar version */
 
+#if ((FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H    != FLEXCAN_IP_CFG_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H    != FLEXCAN_IP_CFG_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_H != FLEXCAN_IP_CFG_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of FlexCAN_Ip.h and FlexCAN_Ip_Cfg.h are different"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_Cfg header file are of the same Software version */
 
+#if ((FLEXCAN_IP_SW_MAJOR_VERSION_H != FLEXCAN_IP_CFG_SW_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_SW_MINOR_VERSION_H != FLEXCAN_IP_CFG_SW_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_SW_PATCH_VERSION_H != FLEXCAN_IP_CFG_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of FlexCAN_Ip.h and FlexCAN_Ip_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if current file and FlexCAN_Ip_Wrapper header file are of the same vendor */
 
+#if (FLEXCAN_IP_VENDOR_ID_H != FLEXCAN_IP_WRAPPER_VENDOR_ID_H)
 
+    #error "FlexCAN_Ip.h and FlexCAN_Ip_Wrapper.h have different vendor ids"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_Wrapper header file are of the same Autosar version */
 
+#if ((FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H    != FLEXCAN_IP_WRAPPER_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H    != FLEXCAN_IP_WRAPPER_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_H != FLEXCAN_IP_WRAPPER_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of FlexCAN_Ip.h and FlexCAN_Ip_Wrapper.h are different"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_Wrapper header file are of the same Software version */
 
+#if ((FLEXCAN_IP_SW_MAJOR_VERSION_H != FLEXCAN_IP_WRAPPER_SW_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_SW_MINOR_VERSION_H != FLEXCAN_IP_WRAPPER_SW_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_SW_PATCH_VERSION_H != FLEXCAN_IP_WRAPPER_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of FlexCAN_Ip.h and FlexCAN_Ip_Wrapper.h are different"
 
+#endif
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    /* Check if current file and Platform_Types header file are of the same Autosar version */
 
+#if ((FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H    != PLATFORM_TYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H    != PLATFORM_TYPES_AR_RELEASE_MINOR_VERSION) \
 
+    )
 
+    #error "AutoSar Version Numbers of FlexCAN_Ip.h and Platform_Types.h are different"
 
+#endif
 
+    /* Check if current file and Mcal header file are of the same Autosar version */
 
+#if ((FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H    != MCAL_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H    != MCAL_AR_RELEASE_MINOR_VERSION) \
 
+    )
 
+    #error "AutoSar Version Numbers of FlexCAN_Ip.h and Mcal.h are different"
 
+#endif
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+#define FLEXCAN_IP_MB_HANDLE_RXFIFO     0U
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+#define FLEXCAN_IP_MB_ENHANCED_RXFIFO    255U
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO */
 
+/*==================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+#define CAN_START_SEC_CONFIG_DATA_UNSPECIFIED
 
+#include "Can_MemMap.h"
 
+
 
+/* Calling the external Configuration symbols defined by FlexCAN_Ip_Cfg.h */
 
+FLEXCAN_IP_CONFIG_EXT
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON)
 
+FLEXCAN_IP_PN_CONFIG_EXT
 
+#endif
 
+
 
+#define CAN_STOP_SEC_CONFIG_DATA_UNSPECIFIED
 
+#include "Can_MemMap.h"
 
+
 
+#define CAN_START_SEC_VAR_CLEARED_UNSPECIFIED
 
+#include "Can_MemMap.h"
 
+
 
+FLEXCAN_IP_STATE_EXT
 
+
 
+#define CAN_STOP_SEC_VAR_CLEARED_UNSPECIFIED
 
+#include "Can_MemMap.h"
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define CAN_START_SEC_CODE
 
+#include "Can_MemMap.h"
 
+/**
 
+ *  @brief Initializes the FlexCAN peripheral.
 
+ *  @details This function will config FlexCAN module and will leave the module in freeze mode.
 
+ *  @param[in] Flexcan_Ip_u8Instance A FlexCAN instance number
 
+ *  @param[in\out] Flexcan_Ip_pState Pointer to the FlexCAN driver state structure.
 
+ *  @param[in] Flexcan_Ip_pData      The FlexCAN platform configuration data
 
+ *  @return FLEXCAN_STATUS_SUCCESS if successfull;<br>
 
+ *          FLEXCAN_STATUS_ERROR if other error occurred;<br>
 
+ *          FLEXCAN_STATUS_BUFF_OUT_OF_RANGE if the index of a message buffer is invalid;<br>
 
+ *          FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ *  @note In case of the enable option of Remote Request Store by setting corresponding bit for FLEXCAN_IP_REM_STORE_U32
 
+ *  in the ctrlOptions structure member of the Flexcan platform configuration data, will disable Automatic Response Request,
 
+ *  in this case is not allowed use of the function FlexCAN_Ip_ConfigRemoteResponseMb
 
+ */
 
+#define FlexCAN_Ip_Init(Flexcan_Ip_u8Instance, Flexcan_Ip_pState, Flexcan_Ip_pData) \
 
+                Call_FlexCAN_Ip_Init(Flexcan_Ip_u8Instance, Flexcan_Ip_pState, Flexcan_Ip_pData)
 
+/**
 
+ *  @brief     Sends a CAN frame using the specified message buffer.
 
+ *  @details   This function configure parameters form Flexcan_Ip_DataInfoType, ID and sends data as CAN frame using a message buffer.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @param[in] mb_idx   Index of the message buffer
 
+ *  @param[in] tx_info  Data info
 
+ *  @param[in] msg_id   ID of the message to transmit
 
+ *  @param[in] mb_data  Data Bytes of the FlexCAN message.
 
+ *  @return FLEXCAN_STATUS_BUFF_OUT_OF_RANGE if the index of a message buffer is invalid;<br>
 
+ *          FLEXCAN_STATUS_BUSY if the message buffer is used for other operation;<br>
 
+ *          FLEXCAN_STATUS_SUCCESS if successfull.<br>
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_Send(uint8 instance,
 
+                                      uint8 mb_idx,
 
+                                      const Flexcan_Ip_DataInfoType * tx_info,
 
+                                      uint32 msg_id,
 
+                                      const uint8 * mb_data);
 
+/**
 
+ *  @brief     Sends a CAN frame using the specified message buffer, in a blocking manner.
 
+ *  @details   This function sends a CAN frame using a configured message buffer. The function
 
+ *             blocks until either the frame was sent, or the specified timeout expired.
 
+ *  @param[in] instance   A FlexCAN instance number
 
+ *  @param[in] mb_idx     Index of the message buffer
 
+ *  @param[in] tx_info    Data info
 
+ *  @param[in] msg_id     ID of the message to transmit
 
+ *  @param[in] mb_data    Data bytes of the FlexCAN message
 
+ *  @param[in] timeout_ms  A timeout for the transfer in milliseconds.
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successfull;<br>
 
+ *             FLEXCAN_STATUS_TIMEOUT if the timeout is reached;<br>
 
+ *             FLEXCAN_STATUS_BUFF_OUT_OF_RANGE if the index of a message buffer is invalid;<br>
 
+ *             FLEXCAN_STATUS_BUSY if the message buffer is used for other operation.<br>
 
+ *
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SendBlocking(uint8 instance,
 
+                                  uint8 mb_idx,
 
+                                  const Flexcan_Ip_DataInfoType * tx_info,
 
+                                  uint32 msg_id,
 
+                                  const uint8 * mb_data,
 
+                                  uint32 timeout_ms);
 
+/**
 
+ *  @brief Receives a CAN frame using the specified message buffer.
 
+ *  @details This function receives a CAN frame using a configured message buffer. The function
 
+ *           returns immediately.
 
+ *  @param[in] instance  A FlexCAN instance number
 
+ *  @param[in] mb_idx    Index of the message buffer
 
+ *  @param[out] data     The FlexCAN receive message buffer data.
 
+ *  @param[in] isPolling If the message will be send using pooling(true) or interrupt(false).
 
+ *  @return FLEXCAN_STATUS_SUCCESS if successfull operation;<br>
 
+ *          FLEXCAN_STATUS_BUFF_OUT_OF_RANGE if the index of a message buffer is invalid;<br>
 
+ *          FLEXCAN_STATUS_BUSY if the message buffer is used for other operation.<br>
 
+ *
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_Receive(uint8 instance,
 
+                                       uint8 mb_idx,
 
+                                       Flexcan_Ip_MsgBuffType * data,
 
+                                       boolean isPolling);
 
+
 
+/**
 
+ *  @brief     FlexCAN Rx FIFO field configuration
 
+ *  @details   Each element in the ID filter table specifies an ID to be used as
 
+ *             acceptance criteria for the FIFO as follows:
 
+ *       - for format A: In the standard frame format, bits 10 to 0 of the ID
 
+ *         are used for frame identification. In the extended frame format, bits
 
+ *         28 to 0 are used.
 
+ *       - for format B: In the standard frame format, bits 10 to 0 of the ID
 
+ *         are used for frame identification. In the extended frame format, only
 
+ *         the 14 most significant bits (28 to 15) of the ID are compared to the
 
+ *         14 most significant bits (28 to 15) of the received ID.
 
+ *       - for format C: In both standard and extended frame formats, only the 8
 
+ *         most significant bits (7 to 0 for standard, 28 to 21 for extended) of
 
+ *         the ID are compared to the 8 most significant bits (7 to 0 for
 
+ *         standard, 28 to 21 for extended) of the received ID.
 
+ *
 
+ *  @param[in] instance        A FlexCAN instance number
 
+ *  @param[in] id_format       The format of the Rx FIFO ID Filter Table Elements
 
+ *  @param[in] id_filter_table The ID filter table elements which contain RTR
 
+ *                             bit, IDE bit, and Rx message ID
 
+ * @return      FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *              FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *              FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ *
 
+ *  @note The number of elements in the ID filter table is defined by the
 
+ *       following formula:
 
+ *       - for format A: the number of Rx FIFO ID filters
 
+ *       - for format B: twice the number of Rx FIFO ID filters
 
+ *       - for format C: four times the number of Rx FIFO ID filters
 
+ *       The user must provide the exact number of elements in order to avoid
 
+ *       any misconfiguration.
 
+ *       This function should be called from StopMode or FreezeMode.
 
+ */
 
+#define FlexCAN_Ip_ConfigRxFifo(instance, id_format, id_filter_table) \
 
+                Call_FlexCAN_Ip_ConfigRxFifo(instance, id_format, id_filter_table)
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+/*!
 
+ * @brief FlexCAN Enhanced Rx FIFO field configuration
 
+ *
 
+ * @note The number of elements in the ID filter table is defined by the
 
+ *       following types:
 
+ *       - Type 1:ID filter element with filter + mask scheme
 
+ *       - Type 2: ID filter element with range scheme
 
+ *       - Type 3: ID filter element with 2-filter scheme
 
+ *       The user must provide the exact number of elements in order to avoid
 
+ *       any misconfiguration.
 
+ *       This function should be called from StopMode or FreezeMode.
 
+ *       Each element in the ID filter table specifies an ID to be used as
 
+ *       acceptance criteria for the Enhanced Rx FIFO as follows:
 
+ *       - for type 1: In the standard frame format, bits 26 to 16 of the ID
 
+ *         are used for frame identification and bits 10 to 0 are used for ID mask.
 
+ *         In the extended frame format, bits 28 to 0 are used for frame identification and
 
+ *         bits 28 to 0 of next work are used for ID mask.
 
+ *       - for type 2: In the standard frame format, bits 26 to 16 and bits 10 to 0 of the ID
 
+ *         are used for frame identification. The filter scheme is based on range.
 
+ *         In the extended frame format, bits 28 to 0 and bits 28 to 0 of next work
 
+ *         are used for frame identification. The filter scheme is based on range.
 
+ *       - for type 3: In the standard frame format, bits 26 to 16 and bits 10 to 0 of the ID
 
+ *         are used for frame identification.
 
+ *         In the extended frame format, bits 28 to 0 and bits 28 to 0 of next work
 
+ *         are used for frame identification.
 
+
 
+ * @param   instance           A FlexCAN instance number
 
+ * @param   id_filter_table    The ID filter table elements which contain Enhanced Rx FIFO
 
+ *                             filter type, RTR bit, IDE bit, and Rx message ID
 
+ *
 
+ * @return      FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *              FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *              FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ */
 
+#define FlexCAN_Ip_ConfigEnhancedRxFifo(instance, id_filter_table) \
 
+        Call_FlexCAN_Ip_ConfigEnhancedRxFifo(instance, id_filter_table)
 
+
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON) */
 
+
 
+/**
 
+ *  @brief     Receives a CAN frame using the message FIFO.
 
+ *  @details   This function receives a CAN frame using the Rx FIFO.
 
+ *             The function returns immediately.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @param[out] data    The FlexCAN receive message buffer data.
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successfull operation;<br>
 
+ *             FLEXCAN_STATUS_ERROR if FiFO feature wasn't enable;<br>
 
+ *             FLEXCAN_STATUS_BUSY if the message buffer is used by other operation.<br>
 
+ *
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_RxFifo(uint8 instance, Flexcan_Ip_MsgBuffType * data);
 
+
 
+/*!
 
+ * @brief Receives a CAN frame using the message FIFO, in a blocking manner.
 
+ *
 
+ * This function receives a CAN frame using the Rx FIFO or
 
+ * Enhanced Rx FIFO (if available and enabled). If using Enhanced Rx FIFO, the size of
 
+ * the data array will be considered the same as the configured FIFO watermark.
 
+ * The function blocks until either a frame was received, or the specified timeout expired.
 
+ * FlexCAN_Ip_RxFifoBlocking/FlexCAN_Ip_RxFifo must not be called in callback invocation
 
+ * while FlexCAN_Ip_RxFifoBlocking is running to avoid unexpected behaviour.
 
+ *
 
+ * @param   instance    A FlexCAN instance number
 
+ * @param   data        The FlexCAN receive message buffer data.
 
+ * @param   timeout     A timeout for the transfer in milliseconds.
 
+ * @return  FLEXCAN_STATUS_SUCCESS if successful;
 
+ *          FLEXCAN_STATUS_BUSY if a resource is busy;
 
+ *          FLEXCAN_STATUS_TIMEOUT if the timeout is reached;
 
+ *          FLEXCAN_STATUS_ERROR if other error occurred
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_RxFifoBlocking(uint8 instance, Flexcan_Ip_MsgBuffType *data, uint32 timeout);
 
+
 
+/**
 
+ *  @brief     FlexCAN receive message buffer field configuration
 
+ *  @details   This function will config receive parameters form Flexcan_Ip_DataInfoType and
 
+ *             the message Id, and can overwritte another MB status.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @param[in] mb_idx   Index of the message buffer
 
+ *  @param[in] rx_info  Data info
 
+ *  @param[in] msg_id   ID of the message to transmit
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *             FLEXCAN_STATUS_BUFF_OUT_OF_RANGE if the index of a message buffer is invalid.
 
+ *
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_ConfigRxMb(uint8 instance,
 
+                                            uint8 mb_idx,
 
+                                            const Flexcan_Ip_DataInfoType * rx_info,
 
+                                            uint32 msg_id
 
+                                           );
 
+
 
+/**
 
+ *  @brief     Sets the FlexCAN Rx individual mask
 
+ *  @details   This function will set directly the mask value as is provided.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @param[in] mb_idx   Index of the message buffer
 
+ *  @param[in] mask     Mask value
 
+ *  @note      This function should be called from StopMode or FreezeMode.
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *             FLEXCAN_STATUS_BUFF_OUT_OF_RANGE if the index of a message buffer is invalid.
 
+ *
 
+ */
 
+#define FlexCAN_Ip_SetRxIndividualMask(instance, mb_idx, mask) \
 
+        Call_FlexCAN_Ip_SetRxIndividualMask(instance, mb_idx, mask)
 
+
 
+/**
 
+ *  @brief     Sets the FlexCAN Rx MB global mask.
 
+ *  @details   This function will set directly the mask value as is provided.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @param[in] mask     Mask value
 
+ *  @note      This function should be called from StopMode or FreezeMode.
 
+ *  @return      FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *               FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *               FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_SetRxMbGlobalMask(instance, mask) \
 
+        Call_FlexCAN_Ip_SetRxMbGlobalMask(instance, mask)
 
+
 
+/**
 
+ * @brief Sets the FlexCAN Rx FIFO global mask.
 
+ * This mask is applied to all filters ID regardless the ID Filter format.
 
+ *
 
+ * @param[in]   instance    A FlexCAN instance number
 
+ * @param[in]   mask        Mask Value.
 
+ * @note      This function should be called from StopMode or FreezeMode.
 
+ * @return      FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *              FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *              FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ */
 
+#define FlexCAN_Ip_SetRxFifoGlobalMask(instance, mask) \
 
+        Call_FlexCAN_Ip_SetRxFifoGlobalMask(instance, mask)
 
+
 
+/**
 
+ *  @brief     Check a receive event.
 
+ *  @details   This will check if message is received and read the message buffer or RxFifo.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @param[in] mb_idx   Index of the message buffer
 
+ */
 
+void FlexCAN_Ip_MainFunctionRead(uint8 instance, uint8 mb_idx);
 
+
 
+/**
 
+ *  @brief     Check a Transmission event.
 
+ *  @details   This function will check a specific MB have been sent of FlexCAN module and
 
+ *             if was sent will reset the status of Mb and clear the status flag.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @param[in] mb_idx message buffer number
 
+ *
 
+ */
 
+void FlexCAN_Ip_MainFunctionWrite(uint8 instance, uint8 mb_idx);
 
+
 
+/**
 
+ *  @brief     Check a bus-off event.
 
+ *  @details   This function will check bus activity of FlexCAN module and
 
+ *             if a bus off event is detected will suspend the future bus activities by setting
 
+ *             module in stop mode.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful busoff and set on stop;<br>
 
+ *             FLEXCAN_STATUS_ERROR if no busoff event detected;<br>
 
+ *             FLEXCAN_STATUS_TIMEOUT if fail to configure in the configured timeout value.<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_MainFunctionBusOff(instance) \
 
+                Call_FlexCAN_Ip_MainFunctionBusOff(instance)
 
+
 
+/**
 
+ *  @brief     Enter FlexCAN Module in Freeze Mode.
 
+ *  @details   This function will suspend bus activity of FlexCAN module and
 
+ *             set it to Freeze Mode to allow module configuration.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *             FLEXCAN_STATUS_TIMEOUT if fail to configure in the configured timeout value.<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_EnterFreezeMode(instance) \
 
+        Call_FlexCAN_Ip_EnterFreezeMode(instance)
 
+
 
+/**
 
+ *  @brief     Exit FlexCAN Module from Freeze Mode.
 
+ *  @details   This function will allow FlexCAN module to participate to the BUS activity and
 
+ *             restore normal opertaion of the driver.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @note      This function should be called from FreezeMode.
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *             FLEXCAN_STATUS_TIMEOUT if fail to configure in the configured timeout value.<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_ExitFreezeMode(instance) \
 
+        Call_FlexCAN_Ip_ExitFreezeMode(instance)
 
+
 
+/**
 
+ *  @brief     DeInitilize the FlexCAN instance driver
 
+ *  @details   This function will make future operataions of FlexCAN instance imposibile and will restore
 
+ *             it's state to default value as before initialization.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *             FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_Deinit(instance) \
 
+        Call_FlexCAN_Ip_Deinit(instance)
 
+
 
+/**
 
+ *  @brief     Get Start Mode Status
 
+ *  @details   Return if the instance is in Start Mode
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @return    True instance is in START Mode
 
+ *             False instance is not in START Mode
 
+ *
 
+ */
 
+#define FlexCAN_Ip_GetStartMode(instance) \
 
+        Call_FlexCAN_Ip_GetStartMode(instance)
 
+
 
+/**
 
+ *  @brief     Set the FlexCAN instance in START mode
 
+ *  @details   Set the FlexCAN instance in START mode, allowing to participate to bus transfers.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *             FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ */
 
+#define FlexCAN_Ip_SetStartMode(instance) \
 
+        Call_FlexCAN_Ip_SetStartMode(instance)
 
+
 
+/**
 
+ *  @brief     Set the FlexCAN instance in STOP mode
 
+ *  @details   Set the FlexCAN instance in START mode, this will prevent instance to participate to
 
+ *  bus transactions and disable module clocks.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *             FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_SetStopMode(instance) \
 
+        Call_FlexCAN_Ip_SetStopMode(instance)
 
+
 
+/**
 
+ *  @brief     Enable\Disable listen Only Mode
 
+ *  @details   This function will Enable or Disable listen Only Mode.
 
+ *  @note      This function should be called from StopMode or FreezeMode.
 
+ *  @param[in] u8Instance A FlexCAN instance number
 
+ *  @param[in] listenonlystate     Enable\Disable interrupt selected
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *             FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_SetListenOnlyMode(instance, listenonlystate) \
 
+        Call_FlexCAN_Ip_SetListenOnlyMode(instance, listenonlystate)
 
+
 
+/**
 
+ * @brief Returns whether the previous FlexCAN transfer has finished.
 
+ *
 
+ * When performing an async transfer, call this function to ascertain the state of the
 
+ * current transfer: in progress (or busy) or complete (success).
 
+ *
 
+ * @param[in] instance The FlexCAN instance number.
 
+ * @param[in] mb_idx   The index of the message buffer.
 
+ * @return FLEXCAN_STATUS_SUCCESS if successful;
 
+ *         FLEXCAN_STATUS_BUSY if a resource is busy;
 
+ *         FLEXCAN_STATUS_ERROR in case of a DMA error transfer;
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_GetTransferStatus(uint8 instance,
 
+                                                   uint8 mb_idx);
 
+
 
+/**
 
+ *  @brief      Get Error Status of FlexCAN
 
+ *  @details    This function will return the error status from ESR1 register.
 
+ *              For exact mapping of errors please refere to RM(Reference Manual)
 
+ *              on FLEXCAN ESR1 register description.
 
+ *  @param[in]  instance: A FlexCAN instance number
 
+ *  @return     The errors flags stored by register ESR1
 
+ */
 
+uint32 FlexCAN_Ip_GetErrorStatus(uint8 instance);
 
+
 
+/**
 
+ *  @brief      Get Transmit error counter of FlexCAN
 
+ *  @details    This function will return the Transmit error counter for all errors
 
+ *              detected in transmitted messages from ECR register.
 
+ *              For exact mapping of errors please refere to RM(Reference Manual)
 
+ *              on FLEXCAN ECR register description.
 
+ *  @param[in]  instance: A FlexCAN instance number
 
+ *  @return     The Transmit error counter stored by TXERRCNT in register ECR
 
+ */
 
+uint8 FlexCAN_Ip_GetControllerTxErrorCounter(uint8 instance);
 
+
 
+/**
 
+ *  @brief      Get Receive error counter of FlexCAN
 
+ *  @details    This function will return the Receive error counter for all errors
 
+ *              detected in transmitted messages from ECR register.
 
+ *              For exact mapping of errors please refere to RM(Reference Manual)
 
+ *              on FLEXCAN ECR register description.
 
+ *  @param[in]  instance: A FlexCAN instance number
 
+ *  @return     The Receive error counter stored by RXERRCNT in register ECR
 
+ */
 
+uint8 FlexCAN_Ip_GetControllerRxErrorCounter(uint8 instance);
 
+
 
+/**
 
+ *  @brief      Clear Error Status of FlexCAN
 
+ *  @details    This function will clear the error status from ESR1 register.
 
+ *              For exact mapping of errors please refere to RM(Reference Manual)
 
+ *              on FLEXCAN ESR1 register description.
 
+ *  @param[in]  instance: A FlexCAN instance number
 
+ *  @param[in]  error: errors flags to be cleared
 
+ */
 
+void FlexCAN_Ip_ClearErrorStatus(uint8 instance,
 
+                                 uint32 error);
 
+
 
+/**
 
+ *  @brief      Set RX masking type
 
+ *  @details    This function will set RX masking type as RX global mask or RX individual mask
 
+ *  @param[in]  instance: A FlexCAN instance number
 
+ *  @param[in]  type: FlexCAN Rx mask type
 
+ *  @note       This function should be called from StopMode or FreezeMode.
 
+ *  @return     FLEXCAN_STATUS_SUCCESS if successful<br>
 
+ *              FLEXCAN_STATUS_ERROR if controller is not in freeze mode<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_SetRxMaskType(instance, type) \
 
+        Call_FlexCAN_Ip_SetRxMaskType(instance, type)
 
+
 
+/**
 
+ *  @brief      Set Rx14Mask filter for message buffer 14.
 
+ *  @details    This function will set directly the mask value as is provided.
 
+ *  @param[in]  instance: A FlexCAN instance number
 
+ *  @param[in]  mask: The value applied for mask
 
+ *  @note       This function should be called from StopMode or FreezeMode.
 
+ *  @return     FLEXCAN_STATUS_SUCCESS if successful<br>
 
+ *              FLEXCAN_STATUS_ERROR if controller is not in freeze mode<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_SetRxMb14Mask(instance, mask) \
 
+        Call_FlexCAN_Ip_SetRxMb14Mask(instance, mask)
 
+
 
+/**
 
+ *  @brief      Set Rx15Mask filter for message buffer 15.
 
+ *  @details    This function will set directly the mask value as is provided.
 
+ *  @param[in]  instance: A FlexCAN instance number
 
+ *  @param[in]  mask: The value applied for mask
 
+ *  @note       This function should be called from StopMode or FreezeMode.
 
+ *  @return     FLEXCAN_STATUS_SUCCESS if successful<br>
 
+ *              FLEXCAN_STATUS_ERROR if controller is not in freeze mode<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_SetRxMb15Mask(instance, mask) \
 
+        Call_FlexCAN_Ip_SetRxMb15Mask(instance, mask)
 
+
 
+/**
 
+ * @brief Gets the FlexCAN bit rate for standard frames or the arbitration phase of FD frames.
 
+ * @note In case is used Enhanced Time Segments the PhaseSeg1 is the sum of PropSeg +1+ PhaseSeg1, and the
 
+ * PropSeg will be 0;
 
+ * @param[in]   instance    A FlexCAN instance number
 
+ * @param[out]  bitrate     A pointer to a variable for returning the FlexCAN bit rate settings
 
+ * @return  true if Enhanced Time segments are used;
 
+ *          false if Enhanced Time segments are not used.
 
+ */
 
+boolean FlexCAN_Ip_GetBitrate(uint8 instance,
 
+                           Flexcan_Ip_TimeSegmentType * bitrate);
 
+
 
+/**
 
+ * @brief Sets the FlexCAN bit rate for standard frames or the arbitration phase of FD frames.
 
+ * @details This function request the FlexCAN module to be in Stop Mode or in Freeze Mode.
 
+ * @param[in]   instance    A FlexCAN instance number
 
+ * @param[in]   bitrate     A pointer to the FlexCAN bit rate settings.
 
+ * @param[in]   enhExt      The time segments used are set in Enhanced Time Seg Registers
 
+ * @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *            FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *            FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ */
 
+#define FlexCAN_Ip_SetBitrate(instance, bitrate, enhExt) \
 
+        Call_FlexCAN_Ip_SetBitrate(instance, bitrate, enhExt)
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_FD == STD_ON)
 
+/*!
 
+ * @brief Clears the TDC Fail flag.
 
+ *
 
+ * @param[in]   instance    A FlexCAN instance number
 
+ */
 
+void FlexCAN_Ip_ClearTDCFail(uint8 u8Instance);
 
+
 
+/*!
 
+ * @brief Gets the value of the TDC Fail flag.
 
+ *
 
+ * @param[in]   instance    A FlexCAN instance number
 
+ * @return  If true, indicates that the TDC mechanism is out of range, unable to
 
+ * compensate the transceiver's loop delay and successfully compare the delayed
 
+ * received bits to the transmitted ones.
 
+ */
 
+boolean FlexCAN_Ip_GetTDCFail(uint8 u8Instance);
 
+
 
+/*!
 
+ * @brief Gets the value of the Transceiver Delay Compensation.
 
+ *
 
+ * @param[in] u8Instance A FlexCAN instance number
 
+ * @return  The value of the transceiver loop delay measured from the transmitted
 
+ * EDL to R0 transition edge to the respective received one added to the TDCOFF
 
+ * value.
 
+ */
 
+uint8 FlexCAN_Ip_GetTDCValue(uint8 u8Instance);
 
+
 
+/**
 
+ * @brief Sets the FlexCAN bit rate for the data phase of FD frames.
 
+ * @details This function request the FlexCAN module to be in Stop Mode or in Freeze Mode.
 
+ * @param[in]   instance    A FlexCAN instance number
 
+ * @param[in]   bitrate     A pointer to the FlexCAN bit rate settings.
 
+ * @param[in]   fd_enable   Enable/Disable Fd Frame Feature Support
 
+ * @param[in]   bitRateSwitch Enable/Disable of FD Data Bitrate Switch support
 
+ * @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *            FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *            FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ */
 
+#define FlexCAN_Ip_SetBitrateCbt(instance, bitrate, bitRateSwitch) \
 
+        Call_FlexCAN_Ip_SetBitrateCbt(instance, bitrate, bitRateSwitch)
 
+
 
+/**
 
+ * @brief Gets the FlexCAN bit rate for the data phase of FD frames (BRS enabled).
 
+ * @note In case is used Enhanced Time Segments the PhaseSeg1 is the sum of PropSeg + PhaseSeg1, and the
 
+ * PropSeg will be 0;
 
+ * @param   instance    A FlexCAN instance number
 
+ * @param   bitrate     A pointer to a variable for returning the FlexCAN bit rate settings
 
+ * @return  true if Enhanced Time segments are used;
 
+ *          false if Enhanced Time segments are not used.
 
+ */
 
+boolean FlexCAN_Ip_GetBitrateFD(uint8 instance,
 
+                              Flexcan_Ip_TimeSegmentType * bitrate);
 
+
 
+/**
 
+ *  @brief     This function will set how many CAN bits the Tx arbitration process start point can
 
+ *             be delayed from the first bit of CRC field on CAN bus.
 
+ *  @details   This function request the FlexCAN module to be in Stop Mode or in Freeze Mode.
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @param[in] value    Tx Arbitration Start Delay value
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *             FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *             FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_SetTxArbitrationStartDelay(instance, value) \
 
+        Call_FlexCAN_Ip_SetTxArbitrationStartDelay(instance, value)
 
+
 
+/**
 
+ * @brief Enables/Disables the Transceiver Delay Compensation feature and sets
 
+ * the Transceiver Delay Compensation Offset (offset value to be added to the
 
+ * measured transceiver's loop delay in order to define the position of the
 
+ * delayed comparison point when bit rate switching is active).
 
+ * @details This function request the FlexCAN module to be in Stop Mode or in Freeze Mode.
 
+ * @param[in]   instance    A FlexCAN instance number
 
+ * @param[in]   enable Enable/Disable Transceiver Delay Compensation
 
+ * @param[in]   offset Transceiver Delay Compensation Offset
 
+ * @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *            FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *            FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ */
 
+#define FlexCAN_Ip_SetTDCOffset(instance, enable, offset) \
 
+        Call_FlexCAN_Ip_SetTDCOffset(instance, enable, offset)
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_FD == STD_ON */
 
+/**
 
+ *  @brief     Get the Status of Message Buffer
 
+ *  @details   This function will return True if Message Buffer Flag
 
+ *             is Set or False if is not set.
 
+ *  @param[in] instance   A FlexCAN instance number
 
+ *  @param[in] msgBuffIdx Index of the message buffer
 
+ *  @return    True if is set
 
+ *             False if is clear.
 
+ *
 
+ */
 
+boolean FlexCAN_Ip_GetBuffStatusFlag(uint8 instance,
 
+                                     uint8 msgBuffIdx);
 
+
 
+/**
 
+ *  @brief     Clear Message Buffer Status Flag
 
+ *  @details   This function will clear the status of the message buffer
 
+ *  @param[in] instance   A FlexCAN instance number
 
+ *  @param[in] msgBuffIdx Index of the message buffer
 
+ *
 
+ */
 
+void FlexCAN_Ip_ClearBuffStatusFlag(uint8 instance,
 
+                                    uint8 msgBuffIdx);
 
+
 
+/**
 
+ * @brief Enable all interrupts configured.
 
+ * @details Enable all interrupts configured.
 
+ * @param[in]   u8Instance    A FlexCAN instance number
 
+ * @return    FLEXCAN_STATUS_SUCCESS if successful<br>
 
+ *            FLEXCAN_STATUS_ERROR if fail to set<br>
 
+ */
 
+#define FlexCAN_Ip_EnableInterrupts(u8Instance) \
 
+        Call_FlexCAN_Ip_EnableInterrupts(u8Instance)
 
+
 
+/**
 
+ * @brief Disable all interrupts.
 
+ * @details Disable all interrupts.
 
+ * @param[in]   u8Instance    A FlexCAN instance number
 
+ * @return    FLEXCAN_STATUS_SUCCESS if successful<br>
 
+ *            FLEXCAN_STATUS_ERROR if fail to set<br>
 
+ */
 
+#define FlexCAN_Ip_DisableInterrupts(u8Instance) \
 
+        Call_FlexCAN_Ip_DisableInterrupts(u8Instance)
 
+
 
+/**
 
+ *  @brief     Enable\Disable Error or BusOff Interrupt
 
+ *  @details   This function will set Error or BusOff interrupt, Error Fast is available only
 
+ *             if FD CAN support is active.
 
+ *  @Note      This function should be called from StopMode or FreezeMode.
 
+ *             When an error interrupt is set and error callback function is installed,
 
+ *             The error callback function will be invoked with a respective event occurred and status of ESR1 register:
 
+ *             In the callback, if another event(got from ESR1 register) recognized(Error, Error Fast, Bus Off, Tx/Rx warning)
 
+ *             Then it should be cleared by FlexCAN_Ip_ClearErrorStatus with a respective mask to avoid dupplication.
 
+ *  @param[in] u8Instance A FlexCAN instance number
 
+ *  @param[in] type       Interrupt Type
 
+ *  @param[in] enable     Enable\Disable interrupt selected
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;<br>
 
+ *             FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *             FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ *
 
+ */
 
+#define FlexCAN_Ip_SetErrorInt(u8Instance, type, enable) \
 
+        Call_FlexCAN_Ip_SetErrorInt(u8Instance, type, enable)
 
+
 
+/**
 
+ *  @brief     Ends a non-blocking FlexCAN transfer early.
 
+ *  @details   Full description
 
+ *  @param[in] u8Instance A FlexCAN instance number
 
+ *  @param[in] mb_idx     The index of the message buffer
 
+ *  @return    FLEXCAN_STATUS_SUCCESS if successful;
 
+ *             FLEXCAN_STATUS_NO_TRANSFER_IN_PROGRESS if no transfer was running,
 
+ *             FLEXCAN_STATUS_TIMEOUT if fail to configure in configured timeout value.<br>
 
+ *
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_AbortTransfer(uint8 u8Instance,
 
+                                               uint8 mb_idx);
 
+
 
+/**
 
+ *  @brief     Get the Status of Listen Only Mode
 
+ *  @details   This function will return True if Listen Only Mode
 
+ *             is Enable or False if is Disable.
 
+ *  @param[in] instance   A FlexCAN instance number
 
+ *  @return    True if Listen Only Mode is Enable
 
+ *             False if Listen Only Mode is Disable.
 
+ *
 
+ */
 
+boolean FlexCAN_Ip_GetListenOnlyMode(uint8 instance);
 
+
 
+/**
 
+ *  @brief     Get Stop Mode Status
 
+ *  @details   Return if the instance is in Stop Mode
 
+ *  @param[in] instance A FlexCAN instance number
 
+ *  @return    True instance is in STOP Mode
 
+ *             False instance is not in STOP Mode
 
+ *
 
+ */
 
+#define FlexCAN_Ip_GetStopMode(instance) \
 
+        Call_FlexCAN_Ip_GetStopMode(instance)
 
+
 
+/*!
 
+ * @brief Receives a CAN frame using the specified message buffer, in a blocking manner.
 
+ *
 
+ * This function receives a CAN frame using a configured message buffer. The function
 
+ * blocks until either a frame was received, or the specified timeout expired.
 
+ *
 
+ *  @param[in] instance  A FlexCAN instance number
 
+ *  @param[in] mb_idx    Index of the message buffer
 
+ *  @param[out] data     The FlexCAN receive message buffer data.
 
+ *  @param[in] isPolling If the message will be send using pooling(true) or interrupt(false).
 
+ *  @param[in] timeout_ms A timeout for the transfer in milliseconds.
 
+ *  @return FLEXCAN_STATUS_SUCCESS if successfull operation;<br>
 
+ *          FLEXCAN_STATUS_BUFF_OUT_OF_RANGE if the index of a message buffer is invalid;<br>
 
+ *          FLEXCAN_STATUS_BUSY if the message buffer is used for other operation.<br>
 
+ *          FLEXCAN_STATUS_TIMEOUT if the timeout is reached.<br>
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_ReceiveBlocking(uint8 instance,
 
+                                                 uint8 mb_idx,
 
+                                                 Flexcan_Ip_MsgBuffType * data,
 
+                                                 boolean isPolling,
 
+                                                 uint32 u32TimeoutMs);
 
+
 
+/**
 
+ * @brief Configures a transmit message buffer for remote frame response.
 
+ *
 
+ * @Note In case of using this function as polling mode the user should call
 
+ * FlexCAN_Ip_MainFunctionWrite to check it.
 
+ * @Note In case of enable the option Remote Request Store by setting corresponding bit for FLEXCAN_IP_REM_STORE_U32
 
+ *  in the ctrlOptions structure member of the Flexcan platform configuration data from FlexCAN_Ip_Init function,
 
+ *  will disable Automatic Response Request feature, in this case is not allowed use of this function.
 
+ *
 
+ * @param[in]   instance                   A FlexCAN instance number
 
+ * @param[in]   mb_idx                     Index of the message buffer
 
+ * @param[in]   tx_info                    Data info
 
+ * @param[in]   msg_id                     ID of the message to transmit
 
+ * @param[in]   mb_data                    Bytes of the FlexCAN message
 
+ * @return  FLEXCAN_STATUS_SUCCESS if successful;
 
+ *          FLEXCAN_STATUS_BUFF_OUT_OF_RANGE if the index of the message buffer
 
+ *          is invalid
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_ConfigRemoteResponseMb(uint8 instance,
 
+                                                        uint8 mb_idx,
 
+                                                        const Flexcan_Ip_DataInfoType *tx_info,
 
+                                                        uint32 msg_id,
 
+                                                        const uint8 *mb_data);
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_TS_ENABLE == STD_ON)
 
+/*!
 
+ * @brief This function configure the timestamp settings.
 
+ *
 
+ * This function will allow to set the timestamp timer source and config the
 
+ * HR Timer selected capture point for timestamp.
 
+ * @note  Need enable clock counter for the source selected before use HR Time Stamp.
 
+ *
 
+ *  @param[in] instance  A FlexCAN instance number
 
+ *  @param[in] time_stamp A timestamp configuration structure
 
+ *  @return FLEXCAN_STATUS_SUCCESS if successful operation;<br>
 
+ *          FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *          FLEXCAN_STATUS_TIMEOUT if the timeout is reached.<br>
 
+ */
 
+#define FlexCAN_Ip_ConfigTimeStamp(instance, time_stamp) \
 
+        Call_FlexCAN_Ip_ConfigTimeStamp(instance, time_stamp)
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_TS_ENABLE == STD_ON */
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON)
 
+/*!
 
+ * @brief Configures Pretended Networking settings.
 
+ * @details This function will enable or disable the Pretended Network feature and configure PN the
 
+ * wakeup events and filters. This function requires the FlexCAN module to be in Stop Mode or in Freeze Mode.
 
+ * @note In order this feature to work, the FlexCAN module need to be in Start Mode after configuring PN
 
+ * and the Protocol Clock needed to remain active during sleep mode.
 
+ *
 
+ * @param[in] u8Instance The FlexCAN instance number.
 
+ * @param[in] bEnable Enable/Disable Pretended Networking mode.
 
+ * @param[in] pPnConfig Pointer to the Pretended Networking configuration structure.
 
+ * @return FLEXCAN_STATUS_SUCCESS if successful operation;<br>
 
+ *         FLEXCAN_STATUS_ERROR if fail to set;<br>
 
+ *         FLEXCAN_STATUS_TIMEOUT if the timeout is reached.<br>
 
+ */
 
+#define FlexCAN_Ip_ConfigPN(u8Instance, bEnable, pPnConfig) \
 
+        Call_FlexCAN_Ip_ConfigPN(u8Instance, bEnable, pPnConfig)
 
+
 
+/*!
 
+ * @brief Extracts one of the frames which triggered the wake up event.
 
+ *
 
+ * @param[in]   u8Instance    The FlexCAN instance number.
 
+ * @param[in]   u8WmbIndex  The index of the message buffer to be extracted.
 
+ * @param[in]   pWmb  Pointer to the message buffer structure where the frame will be saved.
 
+ */
 
+void FlexCAN_Ip_GetWMB(uint8 u8Instance,
 
+                        uint8 u8WmbIndex,
 
+                        Flexcan_Ip_MsgBuffType * pWmb);
 
+
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING */
 
+
 
+/*!
 
+ * @brief Recover manually from bus-off if possible.
 
+ * @note This function should be used when bus-off auto recovery disabled and controller is in START mode.
 
+ * The function FlexCAN_Ip_GetErrorStatus can be used to check FLTCONF bits to check if bus-off state is exited or not.
 
+ *
 
+ * @param[in]   Instance    The FlexCAN instance number.
 
+ * @return FLEXCAN_STATUS_SUCCESS if successful operation or the controller wasn't in bus-off.<br>
 
+ *         FLEXCAN_STATUS_ERROR if bus-off auto recovery enabled.<br>
 
+ *         FLEXCAN_STATUS_TIMEOUT if the timeout is reached.<br>
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_ManualBusOffRecovery(uint8 Instance);
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON)
 
+void DMA_Can_Callback0(void);
 
+#if FLEXCAN_INSTANCE_COUNT > 1U
 
+void DMA_Can_Callback1(void);
 
+#endif
 
+#if FLEXCAN_INSTANCE_COUNT > 2U
 
+void DMA_Can_Callback2(void);
 
+#endif
 
+#if FLEXCAN_INSTANCE_COUNT > 3U
 
+void DMA_Can_Callback3(void);
 
+#endif
 
+#if FLEXCAN_INSTANCE_COUNT > 4U
 
+void DMA_Can_Callback4(void);
 
+#endif
 
+#if FLEXCAN_INSTANCE_COUNT > 5U
 
+void DMA_Can_Callback5(void);
 
+#endif
 
+#if FLEXCAN_INSTANCE_COUNT > 6U
 
+void DMA_Can_Callback6(void);
 
+#endif
 
+#if FLEXCAN_INSTANCE_COUNT > 7U
 
+void DMA_Can_Callback7(void);
 
+#endif
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE */
 
+
 
+#define CAN_STOP_SEC_CODE
 
+#include "Can_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* FLEXCAN_FLEXCAN_IP_H_ */

+ 176 - 0
RTD/include/FlexCAN_Ip_DeviceReg.h
Vedi File 

@@ -0,0 +1,176 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/**
 
+* @file
 
+*
 
+* @brief FlexCAN Registers and Default Reg Values
 
+* @details <File details>
 
+*
 
+* @addtogroup FlexCAN
 
+* @{
 
+*/
 
+#ifndef FLEXCAN_IP_DEVICEREG_H_
 
+#define FLEXCAN_IP_DEVICEREG_H_
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Platform_Types.h"
 
+#include "FlexCAN_Ip_CfgDefines.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXCAN_IP_DEVICEREG_VENDOR_ID_H                      43
 
+#define FLEXCAN_IP_DEVICEREG_AR_RELEASE_MAJOR_VERSION_H       4
 
+#define FLEXCAN_IP_DEVICEREG_AR_RELEASE_MINOR_VERSION_H       4
 
+#define FLEXCAN_IP_DEVICEREG_AR_RELEASE_REVISION_VERSION_H    0
 
+#define FLEXCAN_IP_DEVICEREG_SW_MAJOR_VERSION_H               1
 
+#define FLEXCAN_IP_DEVICEREG_SW_MINOR_VERSION_H               0
 
+#define FLEXCAN_IP_DEVICEREG_SW_PATCH_VERSION_H               0
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and FlexCAN_Ip_CfgDefines header file are of the same vendor */
 
+#if (FLEXCAN_IP_DEVICEREG_VENDOR_ID_H != FLEXCAN_IP_CFGDEFINES_VENDOR_ID_H)
 
+    #error "FlexCAN_Ip_DeviceReg.h and FlexCAN_Ip_CfgDefines.h have different vendor ids"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_CfgDefines header file are of the same Autosar version */
 
+#if ((FLEXCAN_IP_DEVICEREG_AR_RELEASE_MAJOR_VERSION_H    != FLEXCAN_IP_CFGDEFINES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_DEVICEREG_AR_RELEASE_MINOR_VERSION_H    != FLEXCAN_IP_CFGDEFINES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_DEVICEREG_AR_RELEASE_REVISION_VERSION_H != FLEXCAN_IP_CFGDEFINES_AR_RELEASE_REVISION_VERSION_H))
 
+    #error "AutoSar Version Numbers of FlexCAN_Ip_DeviceReg.h and FlexCAN_Ip_CfgDefines.h are different"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_CfgDefines header file are of the same Software version */
 
+#if ((FLEXCAN_IP_DEVICEREG_SW_MAJOR_VERSION_H != FLEXCAN_IP_CFGDEFINES_SW_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_DEVICEREG_SW_MINOR_VERSION_H != FLEXCAN_IP_CFGDEFINES_SW_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_DEVICEREG_SW_PATCH_VERSION_H != FLEXCAN_IP_CFGDEFINES_SW_PATCH_VERSION_H))
 
+    #error "Software Version Numbers of FlexCAN_Ip_DeviceReg.h and FlexCAN_Ip_CfgDefines.h are different"
 
+#endif
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    /* Check if current file and Platform_Types header file are of the same Autosar version */
 
+    #if ((FLEXCAN_IP_DEVICEREG_AR_RELEASE_MAJOR_VERSION_H    != PLATFORM_TYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+         (FLEXCAN_IP_DEVICEREG_AR_RELEASE_MINOR_VERSION_H    != PLATFORM_TYPES_AR_RELEASE_MINOR_VERSION) \
 
+        )
 
+        #error "AutoSar Version Numbers of FlexCAN_Ip_DeviceReg.h and Platform_Types.h are different"
 
+    #endif
 
+#endif
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+/* Default value for register */
 
+/**
 
+* @brief Default value for the MCR register
 
+*/
 
+#define FLEXCAN_IP_MCR_DEFAULT_VALUE_U32               ((uint32)0xD890000FU)
 
+
 
+/**
 
+* @brief Default value for the CTRL1 register
 
+*/
 
+#define FLEXCAN_IP_CTRL1_DEFAULT_VALUE_U32             ((uint32)0x00000000U)
 
+
 
+/**
 
+* @brief Default value for the TIMER register
 
+*/
 
+#define FLEXCAN_IP_TIMER_DEFAULT_VALUE_U32             ((uint32)0x00000000U)
 
+
 
+/**
 
+* @brief Default value for the ECR register
 
+*/
 
+#define FLEXCAN_IP_ECR_DEFAULT_VALUE_U32               ((uint32)0x00000000U)
 
+
 
+/**
 
+* @brief Default value for the ESR1 register
 
+*/
 
+#define FLEXCAN_IP_ESR1_DEFAULT_VALUE_U32              ((uint32)0x0003B006U)
 
+
 
+/**
 
+* @brief Default value for the IMASK2 register
 
+*/
 
+#define FLEXCAN_IP_IMASK_DEFAULT_VALUE_U32             ((uint32)0x00000000U)
 
+
 
+/**
 
+* @brief Default value for the IFLAG4 register
 
+*/
 
+#define FLEXCAN_IP_IFLAG_DEFAULT_VALUE_U32             ((uint32)0xFFFFFFFFU)
 
+
 
+/**
 
+* @brief Default value for the CTRL2 register
 
+*/
 
+#define FLEXCAN_IP_CTRL2_DEFAULT_VALUE_U32             ((uint32)0x00100000U)
 
+
 
+/**
 
+* @brief Default value for the CTRL2 register
 
+*/
 
+#define FLEXCAN_IP_CBT_DEFAULT_VALUE_U32               ((uint32)0x00000000U)
 
+
 
+/**
 
+* @brief Default value for the FDCTRL register
 
+*/
 
+#define FLEXCAN_IP_FDCTRL_DEFAULT_VALUE_U32            ((uint32)0x80004100U)
 
+
 
+/**
 
+* @brief Default value for the FDCBT register
 
+*/
 
+#define FLEXCAN_IP_FDCBT_DEFAULT_VALUE_U32             ((uint32)0x00000000U)
 
+
 
+#define CAN_FEATURE_S32K1XX                     TRUE
 
+#if (defined(S32K116) || defined(S32K118) || defined(S32K144) || defined(S32K142))
 
+/** Array init has of CAN Peripheral base address has FD capability */
 
+#define CAN_BASE_PTRS_HAS_FD    { IP_FLEXCAN0 }
 
+#define CAN_FEATURE_FD_INSTANCES         (1U)
 
+#elif (defined(S32K146) || defined(S32K144W) || defined(S32K142W))
 
+#define CAN_FEATURE_FD_INSTANCES         (2U)
 
+#define CAN_BASE_PTRS_HAS_FD    { IP_FLEXCAN0,  IP_FLEXCAN1}
 
+#elif defined(S32K148)
 
+#define CAN_FEATURE_FD_INSTANCES         (3U)
 
+#define CAN_BASE_PTRS_HAS_FD    { IP_FLEXCAN0, IP_FLEXCAN1, IP_FLEXCAN2 }
 
+#endif
 
+
 
+#if (defined(S32K116) || defined(S32K118))
 
+#define FLEXCAN_IP_FEATURE_BUSOFF_ERROR_INTERRUPT_UNIFIED      (STD_ON)
 
+#else
 
+#define FLEXCAN_IP_FEATURE_BUSOFF_ERROR_INTERRUPT_UNIFIED      (STD_OFF)
 
+#endif
 
+
 
+#define FLEXCAN_IP_RAMn_COUNT FLEXCAN_RAMn_COUNT
 
+
 
+#define FLEXCAN_0_BASE IP_FLEXCAN0_BASE
 
+
 
+#if FLEXCAN_INSTANCE_COUNT > 1U
 
+#define FLEXCAN_1_BASE IP_FLEXCAN1_BASE
 
+#endif
 
+#if FLEXCAN_INSTANCE_COUNT > 2U
 
+#define FLEXCAN_2_BASE IP_FLEXCAN2_BASE
 
+#endif
 
+
 
+#endif /* FLEXCAN_IP_DEVICEREG_H_ */
 
+/** @} */

+ 1921 - 0
RTD/include/FlexCAN_Ip_HwAccess.h
Vedi File 

@@ -0,0 +1,1921 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef FLEXCAN_FLEXCAN_IP_HWACCESS_H_
 
+#define FLEXCAN_FLEXCAN_IP_HWACCESS_H_
 
+
 
+/**
 
+ *  @file FlexCAN_Ip_HwAccess.h
 
+ *
 
+ *  @brief FlexCAN HardWare Access Header File
 
+ *
 
+ *  @addtogroup FlexCAN
 
+ *  @{
 
+ */
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "FlexCAN_Ip.h"
 
+#if (FLEXCAN_IP_DEV_ERROR_DETECT == STD_ON)
 
+#include "Devassert.h"
 
+#endif
 
+#include "OsIf.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXCAN_IP_HWACCESS_VENDOR_ID_H                      43
 
+#define FLEXCAN_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H       4
 
+#define FLEXCAN_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H       4
 
+#define FLEXCAN_IP_HWACCESS_AR_RELEASE_REVISION_VERSION_H    0
 
+#define FLEXCAN_IP_HWACCESS_SW_MAJOR_VERSION_H               1
 
+#define FLEXCAN_IP_HWACCESS_SW_MINOR_VERSION_H               0
 
+#define FLEXCAN_IP_HWACCESS_SW_PATCH_VERSION_H               0
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and FlexCAN_Ip header file are of the same vendor */
 
+#if (FLEXCAN_IP_HWACCESS_VENDOR_ID_H != FLEXCAN_IP_VENDOR_ID_H)
 
+    #error "FlexCAN_Ip_HwAccess.h and FlexCAN_Ip.h have different vendor ids"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip header file are of the same Autosar version */
 
+#if ((FLEXCAN_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H    != FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H    != FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_HWACCESS_AR_RELEASE_REVISION_VERSION_H != FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of FlexCAN_Ip_HwAccess.h and FlexCAN_Ip.h are different"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip header file are of the same Software version */
 
+#if ((FLEXCAN_IP_HWACCESS_SW_MAJOR_VERSION_H != FLEXCAN_IP_SW_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_HWACCESS_SW_MINOR_VERSION_H != FLEXCAN_IP_SW_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_HWACCESS_SW_PATCH_VERSION_H != FLEXCAN_IP_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of FlexCAN_Ip_HwAccess.h and FlexCAN_Ip.h are different"
 
+#endif
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    /* Check if current file and Devassert header file are of the same version */
 
+    #if (FLEXCAN_IP_DEV_ERROR_DETECT == STD_ON)
 
+        #if ((FLEXCAN_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H    !=  DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
 
+             (FLEXCAN_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H     !=  DEVASSERT_AR_RELEASE_MINOR_VERSION) \
 
+            )
 
+            #error "AUTOSAR Version Numbers of FlexCAN_Ip_HwAccess.h and Devassert.h are different"
 
+        #endif
 
+    #endif
 
+    /* Check if current file and osif header file are of the same version */
 
+    #if ((FLEXCAN_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H    !=  OSIF_AR_RELEASE_MAJOR_VERSION) || \
 
+         (FLEXCAN_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H     !=  OSIF_AR_RELEASE_MINOR_VERSION) \
 
+        )
 
+        #error "AUTOSAR Version Numbers of FlexCAN_Ip_HwAccess.h and OsIf.h are different"
 
+    #endif
 
+#endif
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+/* @brief Frames available in Rx FIFO flag shift */
 
+#define FLEXCAN_IP_LEGACY_RXFIFO_FRAME_AVAILABLE  (5U)
 
+/* @brief Rx FIFO warning flag shift */
 
+#define FLEXCAN_IP_LEGACY_RXFIFO_WARNING          (6U)
 
+/* @brief Rx FIFO overflow flag shift */
 
+#define FLEXCAN_IP_LEGACY_RXFIFO_OVERFLOW         (7U)
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+/* @brief Frames available in Enhanced Rx FIFO flag shift */
 
+#define FLEXCAN_IP_ENHANCED_RXFIFO_FRAME_AVAILABLE     (28U)
 
+/* @brief Enhanced Rx FIFO Watermark Indication flag shift */
 
+#define FLEXCAN_IP_ENHANCED_RXFIFO_WATERMARK           (29U)
 
+/* @brief Enhanced Rx FIFO Overflow  flag shift */
 
+#define FLEXCAN_IP_ENHANCED_RXFIFO_OVERFLOW            (30U)
 
+/* @brief Enhanced Rx FIFO Underflow flag shift */
 
+#define FLEXCAN_IP_ENHANCED_RXFIFO_UNDERFLOW           (31U)
 
+/*! @brief FlexCAN Enhanced Fifo Embedded RAM address offset */
 
+#define FLEXCAN_IP_FEATURE_ENHANCED_FIFO_RAM_OFFSET        (0x00002000u)
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON) */
 
+
 
+/*! @brief FlexCAN Embedded RAM address offset */
 
+#define FLEXCAN_IP_FEATURE_RAM_OFFSET                      (0x00000080u)
 
+
 
+#if (STD_ON == FLEXCAN_IP_FEATURE_HAS_EXPANDABLE_MEMORY)
 
+/*! @brief FlexCAN Expandable Embedded RAM address offset */
 
+#define FLEXCAN_IP_FEATURE_EXP_RAM_OFFSET                  (0x00001000u)
 
+#endif /* (STD_ON == FLEXCAN_IP_FEATURE_HAS_EXPANDABLE_MEMORY) */
 
+
 
+#define FLEXCAN_IP_ALL_INT                     (0x3B0006U)                 /*!< Masks for wakeup, error, bus off*/
 
+
 
+#if (FLEXCAN_IP_FEATURE_BUSOFF_ERROR_INTERRUPT_UNIFIED == STD_OFF)
 
+#define FLEXCAN_IP_BUS_OFF_INT                         (0xB0004U)                  /*!< Masks for busOff, Tx/Rx Warning */
 
+#define FLEXCAN_IP_ERROR_INT                           (0x300002U)                 /*!< Masks for ErrorOvr, ErrorFast, Error */
 
+#endif
 
+#define FLEXCAN_IP_ESR1_FLTCONF_BUS_OFF                        (0x00000020U)
 
+
 
+#define FLEXCAN_IP_ID_EXT_MASK                                   0x3FFFFu
 
+#define FLEXCAN_IP_ID_EXT_SHIFT                                  0
 
+#define FLEXCAN_IP_ID_EXT_WIDTH                                  18
 
+
 
+#define FLEXCAN_IP_ID_STD_MASK                                   0x1FFC0000u
 
+#define FLEXCAN_IP_ID_STD_SHIFT                                  18
 
+#define FLEXCAN_IP_ID_STD_WIDTH                                  11
 
+
 
+#define FLEXCAN_IP_ID_PRIO_MASK                                  0xE0000000u
 
+#define FLEXCAN_IP_ID_PRIO_SHIFT                                 29
 
+#define FLEXCAN_IP_ID_PRIO_WIDTH                                 3
 
+/* CS Bit Fields */
 
+#define FLEXCAN_IP_CS_TIME_STAMP_MASK                            0xFFFFu
 
+#define FLEXCAN_IP_CS_TIME_STAMP_SHIFT                           0
 
+#define FLEXCAN_IP_CS_TIME_STAMP_WIDTH                           16
 
+
 
+#define FLEXCAN_IP_CS_DLC_MASK                                   0xF0000u
 
+#define FLEXCAN_IP_CS_DLC_SHIFT                                  16
 
+#define FLEXCAN_IP_CS_DLC_WIDTH                                  4
 
+
 
+#define FLEXCAN_IP_CS_RTR_MASK                                   0x100000u
 
+#define FLEXCAN_IP_CS_RTR_SHIFT                                  20
 
+#define FLEXCAN_IP_CS_RTR_WIDTH                                  1
 
+
 
+#define FLEXCAN_IP_CS_IDE_MASK                                   0x200000u
 
+#define FLEXCAN_IP_CS_IDE_SHIFT                                  21
 
+#define FLEXCAN_IP_CS_IDE_WIDTH                                  1
 
+
 
+#define FLEXCAN_IP_CS_SRR_MASK                                   0x400000u
 
+#define FLEXCAN_IP_CS_SRR_SHIFT                                  22
 
+#define FLEXCAN_IP_CS_SRR_WIDTH                                  1
 
+
 
+#define FLEXCAN_IP_CS_CODE_MASK                                  0xF000000u
 
+#define FLEXCAN_IP_CS_CODE_SHIFT                                 24
 
+#define FLEXCAN_IP_CS_CODE_WIDTH                                 4
 
+
 
+#define FLEXCAN_IP_CS_IDHIT_MASK                                 0xFF800000u
 
+#define FLEXCAN_IP_CS_IDHIT_SHIFT                                23
 
+#define FLEXCAN_IP_CS_IDHIT_WIDTH                                9
 
+
 
+#define FLEXCAN_IP_MB_EDL_MASK                                   0x80000000u
 
+#define FLEXCAN_IP_MB_BRS_MASK                                   0x40000000u
 
+
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATAB_RTR_SHIFT      (31U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format A&B RTR mask.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATAB_IDE_SHIFT      (30U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format A&B IDE mask.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATB_RTR_SHIFT       (15U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format B RTR-2 mask.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATB_IDE_SHIFT       (14U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format B IDE-2 mask.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATA_EXT_MASK        (0x3FFFFFFFU) /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format A extended mask.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATA_EXT_SHIFT       (1U)          /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format A extended shift.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATA_STD_MASK        (0x3FF80000U) /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format A standard mask.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATA_STD_SHIFT       (19U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format A standard shift.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATB_EXT_MASK        (0x1FFF8000U) /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format B extended mask1.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATB_EXT_SHIFT1      (16U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format B extended shift 1.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATB_EXT_SHIFT2      (0U)          /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format B extended shift 2.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATB_STD_MASK        (0x7FFU)      /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format B standard mask.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATB_STD_SHIFT1      (19U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format B standard shift1.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATB_STD_SHIFT2      (3U)          /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format B standard shift2.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATB_EXT_CMP_SHIFT   (15U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format B extended compare shift.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATC_EXT_MASK        (0x1FE00000U) /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format C mask.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATC_STD_MASK        (0x7F8U)      /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format C mask.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATC_SHIFT1          (24U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format C shift1.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATC_SHIFT2          (16U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format C shift2.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATC_SHIFT3          (8U)          /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format C shift3.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATC_SHIFT4          (0U)          /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format C shift4.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATC_EXT_CMP_SHIFT   (21U)         /*!< FlexCAN RX FIFO ID filter*/
 
+/*! format C extended compare shift.*/
 
+#define FLEXCAN_IP_RX_FIFO_ID_FILTER_FORMATC_STD_CMP_SHIFT   (3U)          /*!< FlexCAN RX FIFO ID filter*/
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+
 
+#define FLEXCAN_IP_ENHANCED_IDHIT_MASK                           0x7Fu
 
+#define FLEXCAN_IP_ENHANCED_IDHIT_SHIFT                          0
 
+#define FLEXCAN_IP_ENHANCED_IDHIT_WIDTH                          7
 
+
 
+#define FLEXCAN_IP_ENHANCED_RX_FIFO_ID_FILTER_FSCH_SHIFT     (30U)             /*!< FlexCAN Enhanced RX FIFO ID filter*/
 
+/*! Standard & Extended FSCH shift.*/
 
+#define FLEXCAN_IP_ENHANCED_RX_FIFO_ID_FILTER_STD_RTR2_SHIFT (27U)             /*!< FlexCAN Enhanced RX FIFO ID filter*/
 
+/*! Standard RTR-2 shift.*/
 
+#define FLEXCAN_IP_ENHANCED_RX_FIFO_ID_FILTER_STD_RTR1_SHIFT (11U)             /*!< FlexCAN Enhanced RX FIFO ID filter*/
 
+/*! Standard RTR-1 shift.*/
 
+#define FLEXCAN_IP_ENHANCED_RX_FIFO_ID_FILTER_EXT_RTR_SHIFT  (29U)             /*!< FlexCAN Enhanced RX FIFO ID filter*/
 
+/*! Extended RTR shift.*/
 
+#define FLEXCAN_IP_ENHANCED_RX_FIFO_ID_FILTER_STD_SHIFT2     (16U)             /*!< FlexCAN Enhanced RX FIFO ID filter*/
 
+/*! Standard ID-2 shift.*/
 
+#define FLEXCAN_IP_ENHANCED_RX_FIFO_ID_FILTER_STD_SHIFT1     (0U)              /*!< FlexCAN Enhanced RX FIFO ID filter*/
 
+/*! Standard ID-1 shift.*/
 
+#define FLEXCAN_IP_ENHANCED_RX_FIFO_ID_FILTER_STD_MASK       (0x7FFU)          /*!< FlexCAN Enhanced RX FIFO ID filter*/
 
+/*! Standard ID mask.*/
 
+#define FLEXCAN_IP_ENHANCED_RX_FIFO_ID_FILTER_EXT_SHIFT      (0U)              /*!< FlexCAN Enhanced RX FIFO ID filter*/
 
+/*! Extended ID shift.*/
 
+#define FLEXCAN_IP_ENHANCED_RX_FIFO_ID_FILTER_EXT_MASK       (0x1FFFFFFFU)     /*!< FlexCAN Enhanced RX FIFO ID filter*/
 
+/*! Mask for enable all enhanced interrupts */
 
+#define FLEXCAN_IP_ENHACED_RX_FIFO_ALL_INTERRUPT_MASK      (FLEXCAN_ERFIER_ERFUFWIE_MASK | FLEXCAN_ERFIER_ERFOVFIE_MASK | \
 
+                                                            FLEXCAN_ERFIER_ERFWMIIE_MASK | FLEXCAN_ERFIER_ERFDAIE_MASK \
 
+                                                           )
 
+
 
+/*! Mask for disable all enhanced interrupts */
 
+#define FLEXCAN_IP_ENHACED_RX_FIFO_NO_INTERRUPT_MASK         (0U)
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_On) */
 
+
 
+/* This are for little endians cores and supporting rev32 asm instuction */
 
+#define FLEXCAN_IP_SWAP_BYTES_IN_WORD_INDEX(index) (((index) & ~3U) + (3U - ((index) & 3U)))
 
+#define FLEXCAN_IP_SWAP_BYTES_IN_WORD(a, b) FLEXCAN_IP_REV_BYTES_32(a, b)
 
+#define FLEXCAN_IP_REV_BYTES_32(a, b) ((b) = (((a) & 0xFF000000U) >> 24U) | (((a) & 0xFF0000U) >> 8U) \
 
+                                | (((a) & 0xFF00U) << 8U) | (((a) & 0xFFU) << 24U))
 
+
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+/*! @brief FlexCAN message buffer CODE for Rx buffers*/
 
+enum
 
+{
 
+    FLEXCAN_RX_INACTIVE  = 0x0, /*!< MB is not active.*/
 
+    FLEXCAN_RX_FULL      = 0x2, /*!< MB is full.*/
 
+    FLEXCAN_RX_EMPTY     = 0x4, /*!< MB is active and empty.*/
 
+    FLEXCAN_RX_OVERRUN   = 0x6, /*!< MB is overwritten into a full buffer.*/
 
+    FLEXCAN_RX_BUSY      = 0x8, /*!< FlexCAN is updating the contents of the MB.*/
 
+                                /*!  The CPU must not access the MB.*/
 
+    FLEXCAN_RX_RANSWER   = 0xA, /*!< A frame was configured to recognize a Remote Request Frame*/
 
+                                /*!  and transmit a Response Frame in return.*/
 
+    FLEXCAN_RX_NOT_USED   = 0xF /*!< Not used*/
 
+};
 
+
 
+/*! @brief FlexCAN message buffer CODE FOR Tx buffers*/
 
+enum
 
+{
 
+    FLEXCAN_TX_INACTIVE  = 0x08, /*!< MB is not active.*/
 
+    FLEXCAN_TX_ABORT     = 0x09, /*!< MB is aborted.*/
 
+    FLEXCAN_TX_DATA      = 0x0C, /*!< MB is a TX Data Frame(MB RTR must be 0).*/
 
+    FLEXCAN_TX_REMOTE    = 0x1C, /*!< MB is a TX Remote Request Frame (MB RTR must be 1).*/
 
+    FLEXCAN_TX_TANSWER   = 0x0E, /*!< MB is a TX Response Request Frame from.*/
 
+                                 /*!  an incoming Remote Request Frame.*/
 
+    FLEXCAN_TX_NOT_USED   = 0xF  /*!< Not used*/
 
+};
 
+
 
+/*! @brief FlexCAN error interrupt types
 
+ */
 
+typedef enum
 
+{
 
+    FLEXCAN_INT_RX_WARNING = FLEXCAN_CTRL1_RWRNMSK_MASK,     /*!< RX warning interrupt*/
 
+    FLEXCAN_INT_TX_WARNING = FLEXCAN_CTRL1_TWRNMSK_MASK,     /*!< TX warning interrupt*/
 
+    FLEXCAN_INT_ERR        = FLEXCAN_CTRL1_ERRMSK_MASK,      /*!< Error interrupt*/
 
+    FLEXCAN_INT_ERR_FAST,                                    /*!< Error Fast interrupt*/
 
+    FLEXCAN_INT_BUSOFF     = FLEXCAN_CTRL1_BOFFMSK_MASK,     /*!< Bus off interrupt*/
 
+} flexcan_int_type_t;
 
+
 
+/*==================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+/*! @brief FlexCAN Message Buffer code and status for transmit and receive
 
+ */
 
+typedef struct
 
+{
 
+    uint32 code;                        /*!< MB code for TX or RX buffers.*/
 
+                                        /*! Defined by flexcan_mb_code_rx_t and flexcan_mb_code_tx_t */
 
+    Flexcan_Ip_MsgBuffIdType msgIdType; /*!< Type of message ID (standard or extended)*/
 
+    uint32 dataLen;                     /*!< Length of Data in Bytes*/
 
+    boolean fd_enable;
 
+    uint8 fd_padding;
 
+    boolean enable_brs;                   /* Enable bit rate switch*/
 
+} Flexcan_Ip_MsbuffCodeStatusType;
 
+
 
+/*==================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define CAN_START_SEC_CODE
 
+#include "Can_MemMap.h"
 
+
 
+
 
+void FLEXCAN_ClearMsgBuffIntCmd(FLEXCAN_Type * pBase,
 
+                                uint8 u8Instance,
 
+                                uint32 mb_idx,
 
+                                boolean bIsIntActive
 
+                               );
 
+
 
+void FlexCAN_SetErrIntCmd(FLEXCAN_Type * base,
 
+                          flexcan_int_type_t errType,
 
+                          boolean enable
 
+                         );
 
+
 
+Flexcan_Ip_StatusType FlexCAN_EnterFreezeMode(FLEXCAN_Type * base);
 
+
 
+/*!
 
+ * @brief Sets the FlexCAN Rx FIFO fields.
 
+ *
 
+ * @param   base             The FlexCAN base address
 
+ * @param   idFormat         The format of the Rx FIFO ID Filter Table Elements
 
+ * @param   idFilterTable    The ID filter table elements which contain RTR bit,
 
+ *                           IDE bit, and RX message ID.
 
+ */
 
+void FlexCAN_SetRxFifoFilter(FLEXCAN_Type * base,
 
+                             Flexcan_Ip_RxFifoIdElementFormatType idFormat,
 
+                             const Flexcan_Ip_IdTableType * idFilterTable
 
+                            );
 
+
 
+/*!
 
+ * @brief Gets the FlexCAN Rx FIFO data.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @param   rxFifo  The FlexCAN receive FIFO data
 
+ */
 
+void FlexCAN_ReadRxFifo(const FLEXCAN_Type * base,
 
+                        Flexcan_Ip_MsgBuffType * rxFifo
 
+                       );
 
+
 
+/*!
 
+ * @brief Un freezes the FlexCAN module.
 
+ *
 
+ * @param   base     The FlexCAN base address
 
+ * @return FLEXCAN_STATUS_SUCCESS successfully exit from freeze
 
+ *         FLEXCAN_STATUS_TIMEOUT fail to exit from freeze
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_ExitFreezeMode(FLEXCAN_Type * base);
 
+
 
+Flexcan_Ip_StatusType FlexCAN_Disable(FLEXCAN_Type * base);
 
+
 
+Flexcan_Ip_StatusType FlexCAN_Enable(FLEXCAN_Type * base);
 
+
 
+/*!
 
+ * @brief Locks the FlexCAN Rx message buffer.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   msgBuffIdx       Index of the message buffer
 
+ *
 
+ */
 
+void FlexCAN_LockRxMsgBuff(const FLEXCAN_Type * base,
 
+                           uint32 msgBuffIdx
 
+                          );
 
+
 
+/*!
 
+ * @brief Enables/Disables the FlexCAN Message Buffer interrupt.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   msgBuffIdx       Index of the message buffer
 
+ * @param   enable       choose enable or disable
 
+ * @return  FLEXCAN_STATUS_SUCCESS if successful;
 
+ *          FLEXCAN_STATUS_CAN_BUFF_OUT_OF_RANGE if the index of the
 
+ *          message buffer is invalid
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_SetMsgBuffIntCmd(FLEXCAN_Type * base,
 
+                                               uint8 u8Instance,
 
+                                               uint32 msgBuffIdx,
 
+                                               boolean enable,
 
+                                               boolean bIsIntActive
 
+                                              );
 
+
 
+/*!
 
+ * @brief Disable all interrupts.
 
+ *
 
+ * @param   pBase       The FlexCAN base address
 
+ */
 
+void FlexCAN_DisableInterrupts(FLEXCAN_Type * pBase);
 
+
 
+/*!
 
+ * @brief Enable all interrupts configured.
 
+ *
 
+ * @param   pBase       The FlexCAN base address
 
+ * @param   u8Instance  A FlexCAN instance number
 
+ */
 
+void FlexCAN_EnableInterrupts(FLEXCAN_Type * pBase, uint8 u8Instance);
 
+/*!
 
+ * @brief Sets the FlexCAN message buffer fields for transmitting.
 
+ *
 
+ * @param   pMbAddr      The Message buffer address
 
+ * @param   cs           CODE/status values (TX)
 
+ * @param   msgId        ID of the message to transmit
 
+ * @param   msgData      Bytes of the FlexCAN message
 
+ * @param   isRemote     Will set RTR remote Flag
 
+ * @return  FLEXCAN_STATUS_SUCCESS if successful;
 
+ *          FLEXCAN_STATUS_CAN_BUFF_OUT_OF_RANGE if the index of the
 
+ *          message buffer is invalid
 
+ */
 
+void FlexCAN_SetTxMsgBuff(volatile uint32 * const pMbAddr,
 
+                          const Flexcan_Ip_MsbuffCodeStatusType * cs,
 
+                          uint32 msgId,
 
+                          const uint8 * msgData,
 
+                          const boolean isRemote
 
+                         );
 
+
 
+/*!
 
+ * @brief Enables the Rx FIFO.
 
+ *
 
+ * @param   base     The FlexCAN base address
 
+ * @param   numOfFilters    The number of Rx FIFO filters
 
+ * @return  The status of the operation
 
+ * @retval  FLEXCAN_STATUS_SUCCESS RxFIFO was successfully enabled
 
+ * @retval  FLEXCAN_STATUS_ERROR RxFIFO could not be enabled (e.g. the FD feature
 
+ *          was enabled, and these two features are not compatible)
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_EnableRxFifo(FLEXCAN_Type * base, uint32 numOfFilters);
 
+
 
+
 
+/*!
 
+ * @brief Sets  the maximum number of Message Buffers.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   maxMsgBuffNum     Maximum number of message buffers
 
+ * @return  FLEXCAN_STATUS_SUCCESS if successful;
 
+ *          FLEXCAN_STATUS_BUFF_OUT_OF_RANGE if the index of the
 
+ *          message buffer is invalid
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_SetMaxMsgBuffNum(FLEXCAN_Type * base, uint32 maxMsgBuffNum);
 
+
 
+/*!
 
+ * @brief Sets the FlexCAN message buffer fields for receiving.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   msgBuffIdx       Index of the message buffer
 
+ * @param   cs           CODE/status values (RX)
 
+ * @param   msgId       ID of the message to receive
 
+ * @return  FLEXCAN_STATUS_SUCCESS if successful;
 
+ *          FLEXCAN_STATUS_BUFF_OUT_OF_RANGE if the index of the
 
+ *          message buffer is invalid
 
+ */
 
+void FlexCAN_SetRxMsgBuff(const FLEXCAN_Type * base,
 
+                          uint32 msgBuffIdx,
 
+                          const Flexcan_Ip_MsbuffCodeStatusType * cs,
 
+                          uint32 msgId
 
+                         );
 
+
 
+/*!
 
+ * @brief Gets the message buffer timestamp value.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   msgBuffIdx       Index of the message buffer
 
+ * @return  value of timestamp for selected message buffer.
 
+ */
 
+uint32 FlexCAN_GetMsgBuffTimestamp(const FLEXCAN_Type * base, uint32 msgBuffIdx);
 
+
 
+/*!
 
+ * @brief Gets the FlexCAN message buffer fields.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   msgBuffIdx       Index of the message buffer
 
+ * @param   msgBuff           The fields of the message buffer
 
+ */
 
+void FlexCAN_GetMsgBuff(const FLEXCAN_Type * base,
 
+                        uint32 msgBuffIdx,
 
+                        Flexcan_Ip_MsgBuffType * msgBuff
 
+                       );
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_FD == STD_ON)
 
+#if defined(CAN_FEATURE_S32K1XX)
 
+/*!
 
+ * @brief Check if instance support FD.
 
+ *
 
+ * @param[in]   base  The FlexCAN base address
 
+ * @return TRUE\FALSE if support FD.
 
+ */
 
+boolean FlexCAN_IsFDAvailable(const FLEXCAN_Type * base);
 
+#endif
 
+/*!
 
+ * @brief Sets the payload size of the MBs.
 
+ *
 
+ * @param   base         The FlexCAN base address
 
+ * @param   payloadSize  The payload size
 
+ */
 
+void FlexCAN_SetPayloadSize(FLEXCAN_Type * base, const Flexcan_Ip_PayloadSizeType * payloadSize);
 
+
 
+/*!
 
+ * @brief Check If mb index is out of range or not.
 
+ *
 
+ * @param   pBase                The FlexCAN base address
 
+ * @param   u8MbIndex            MB index
 
+ * @param   bIsLegacyFifoEn      Legacy fifo enabled or not
 
+ * @param   u32MaxMbNum          Max mb number
 
+ */
 
+boolean FlexCAN_IsMbOutOfRange
 
+(
 
+    const FLEXCAN_Type * pBase,
 
+    uint8 u8MbIndex,
 
+    boolean bIsLegacyFifoEn,
 
+    uint32 u32MaxMbNum
 
+);
 
+
 
+/*!
 
+ * @brief Sets the FlexCAN RX FIFO global mask.
 
+ *
 
+ * @param[in]   base  The FlexCAN base address
 
+ * @param[in]   Mask     Sets mask
 
+ */
 
+static inline void FlexCAN_SetRxFifoGlobalMask(FLEXCAN_Type * base, uint32 Mask)
 
+{
 
+    (base->RXFGMASK) = Mask;
 
+}
 
+
 
+/*!
 
+ * @brief Enables/Disables the Transceiver Delay Compensation feature and sets
 
+ * the Transceiver Delay Compensation Offset (offset value to be added to the
 
+ * measured transceiver's loop delay in order to define the position of the
 
+ * delayed comparison point when bit rate switching is active).
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   enable Enable/Disable Transceiver Delay Compensation
 
+ * @param   offset Transceiver Delay Compensation Offset
 
+ */
 
+static inline void FlexCAN_SetTDCOffset(FLEXCAN_Type * base,
 
+                                        boolean enable,
 
+                                        uint8 offset
 
+                                       )
 
+{
 
+    uint32 tmp;
 
+
 
+    tmp = base->FDCTRL;
 
+    tmp &= ~(FLEXCAN_FDCTRL_TDCEN_MASK | FLEXCAN_FDCTRL_TDCOFF_MASK);
 
+
 
+    if (enable)
 
+    {
 
+        tmp = tmp | FLEXCAN_FDCTRL_TDCEN_MASK;
 
+        tmp = tmp | FLEXCAN_FDCTRL_TDCOFF(offset);
 
+    }
 
+
 
+    base->FDCTRL = tmp;
 
+}
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCE_CBT == STD_ON)
 
+/*!
 
+ * @brief Enables/Disables the Transceiver Delay Compensation feature and sets
 
+ * the Transceiver Delay Compensation Offset (offset value to be added to the
 
+ * measured transceiver's loop delay in order to define the position of the
 
+ * delayed comparison point when bit rate switching is active).
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   enable Enable/Disable Transceiver Delay Compensation
 
+ * @param   offset Transceiver Delay Compensation Offset
 
+ */
 
+static inline void FlexCAN_SetEnhancedTDCOffset(FLEXCAN_Type * base,
 
+                                                boolean enable,
 
+                                                uint8 offset
 
+                                               )
 
+{
 
+    uint32 tmp;
 
+
 
+    tmp = base->ETDC;
 
+    tmp &= ~(FLEXCAN_ETDC_ETDCEN_MASK | FLEXCAN_ETDC_ETDCOFF_MASK);
 
+
 
+    if (enable)
 
+    {
 
+        tmp = tmp | FLEXCAN_ETDC_ETDCEN_MASK;
 
+        tmp = tmp | FLEXCAN_ETDC_ETDCOFF(offset);
 
+    }
 
+
 
+    base->ETDC = tmp;
 
+}
 
+#endif
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_FD */
 
+
 
+/*!
 
+ * @brief Gets the payload size of the MBs.
 
+ *
 
+ * @param   base         The FlexCAN base address
 
+ * @return  The payload size in bytes
 
+ */
 
+uint8 FlexCAN_GetMbPayloadSize(const FLEXCAN_Type * base, uint32 maxMsgBuffNum);
 
+/*!
 
+ * @brief Initializes the FlexCAN controller.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Init(FLEXCAN_Type * base);
 
+
 
+/*!
 
+ * @brief Checks if the FlexCAN is enabled.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @return  TRUE if enabled; FALSE if disabled
 
+ */
 
+static inline boolean FlexCAN_IsEnabled(const FLEXCAN_Type * pBase)
 
+{
 
+    return (((pBase->MCR & FLEXCAN_MCR_MDIS_MASK) >> FLEXCAN_MCR_MDIS_SHIFT) != 0U) ? FALSE : TRUE;
 
+}
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_MEM_ERR_DET == STD_ON)
 
+/*!
 
+ * @brief Disable Error Detection and Correction of Memory Errors.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ */
 
+static inline void FlexCAN_DisableMemErrorDetection(FLEXCAN_Type * base)
 
+{
 
+    /* Enable write of MECR register */
 
+    base->CTRL2 |=  FLEXCAN_CTRL2_ECRWRE(1);
 
+    /* Enable write of MECR */
 
+    base->MECR = FLEXCAN_MECR_ECRWRDIS(0);
 
+    /* Disable Error Detection and Correction mechanism,
 
+     * that will set CAN in Freez Mode in case of trigger */
 
+    base->MECR = FLEXCAN_MECR_NCEFAFRZ(0);
 
+    /* Disable memory error correction */
 
+    base->MECR |= FLEXCAN_MECR_ECCDIS(1);
 
+    /* Disable write of MECR */
 
+    base->CTRL2 &= ~FLEXCAN_CTRL2_ECRWRE(1);
 
+}
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_MEM_ERR_DET */
 
+
 
+/*!
 
+ * @brief Enables/Disables Flexible Data rate (if supported).
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @param   enable  TRUE to enable; FALSE to disable
 
+ */
 
+static inline void FlexCAN_SetFDEnabled(FLEXCAN_Type * base,
 
+                                        boolean enableFD,
 
+                                        boolean enableBRS
 
+                                       )
 
+{
 
+    base->MCR = (base->MCR & ~FLEXCAN_MCR_FDEN_MASK) | FLEXCAN_MCR_FDEN(enableFD ? 1UL : 0UL);
 
+
 
+    /* Enable BitRate Switch support from BRS_TX_MB field or ignore it */
 
+    base->FDCTRL = (base->FDCTRL & ~FLEXCAN_FDCTRL_FDRATE_MASK) | FLEXCAN_FDCTRL_FDRATE(enableBRS ? 1UL : 0UL);
 
+
 
+    /* Disable Transmission Delay Compensation by default */
 
+    base->FDCTRL &= ~(FLEXCAN_FDCTRL_TDCEN_MASK | FLEXCAN_FDCTRL_TDCOFF_MASK);
 
+}
 
+
 
+/*!
 
+ * @brief Enables/Disables Listen Only Mode.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @param   enable  TRUE to enable; FALSE to disable
 
+ */
 
+static inline void FlexCAN_SetListenOnlyMode(FLEXCAN_Type * base, boolean enableListenOnly)
 
+{
 
+    base->CTRL1 = (base->CTRL1 & ~FLEXCAN_CTRL1_LOM_MASK) | FLEXCAN_CTRL1_LOM(enableListenOnly ? 1UL : 0UL);
 
+}
 
+
 
+
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON)
 
+
 
+/*!
 
+ * @brief Clears the FIFO
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ */
 
+static inline void FlexCAN_ClearFIFO(FLEXCAN_Type * base)
 
+{
 
+    base->IFLAG1 = FLEXCAN_IFLAG1_BUF0I_MASK;
 
+}
 
+
 
+
 
+/*!
 
+ * @brief Enables/Disables the DMA support for RxFIFO.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   enable Enable/Disable DMA support
 
+ */
 
+static inline void FlexCAN_SetRxFifoDMA(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    base->MCR = (base->MCR & ~FLEXCAN_MCR_DMA_MASK) | FLEXCAN_MCR_DMA(enable ? 1UL : 0UL);
 
+}
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+/*!
 
+ * @brief Resets Enhanced Rx FIFO engine and state.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ */
 
+static inline void FlexCAN_ClearEnhancedRxFifoEngine(FLEXCAN_Type * base)
 
+{
 
+    base->ERFSR = base->ERFSR | FLEXCAN_ERFSR_ERFCLR_MASK;
 
+}
 
+
 
+/*!
 
+ * @brief Clears the Enhanced Rx FIFO
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ */
 
+static inline void FlexCAN_ClearEnhancedFIFO(FLEXCAN_Type * base)
 
+{
 
+    base->ERFSR = FLEXCAN_ERFSR_ERFCLR_MASK;
 
+}
 
+
 
+/*!
 
+ * @brief Configure the number of words to transfer for each Enhanced Rx FIFO data element in DMA mode.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @param   numOfWords   The number of words to transfer
 
+ */
 
+static inline void FlexCAN_ConfigEnhancedRxFifoDMA(FLEXCAN_Type * base, uint32 numOfWords)
 
+{
 
+    base->ERFCR = (base->ERFCR & (~FLEXCAN_ERFCR_DMALW_MASK)) | (((numOfWords - 1u) << FLEXCAN_ERFCR_DMALW_SHIFT) & FLEXCAN_ERFCR_DMALW_MASK);
 
+}
 
+
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO */
 
+#endif /* if FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE */
 
+
 
+/*!
 
+ * @brief Get The Max no of MBs allowed on CAN instance.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @return  The Max No of MBs on the CAN instance;
 
+ */
 
+uint32 FlexCAN_GetMaxMbNum(const FLEXCAN_Type * base);
 
+
 
+/*!
 
+ * @brief Unlocks the FlexCAN Rx message buffer.
 
+ *
 
+ * @param   base     The FlexCAN base address
 
+ */
 
+static inline void FlexCAN_UnlockRxMsgBuff(const FLEXCAN_Type * base)
 
+{
 
+    /* Unlock the mailbox by reading the free running timer */
 
+    (void)base->TIMER;
 
+}
 
+
 
+/*!
 
+ * @brief Clears the interrupt flag of the message buffers.
 
+ *
 
+ * @param   base        The FlexCAN base address
 
+ * @param   msgBuffIdx  Index of the message buffer
 
+ */
 
+static inline void FlexCAN_ClearMsgBuffIntStatusFlag(FLEXCAN_Type * base, uint32 msgBuffIdx)
 
+{
 
+    uint32 flag = ((uint32)1U << (msgBuffIdx % 32U));
 
+
 
+    /* Clear the corresponding message buffer interrupt flag*/
 
+    if (msgBuffIdx < 32U)
 
+    {
 
+        (base->IFLAG1) = (flag);
 
+    }
 
+
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 32U
 
+    else if (msgBuffIdx < 64U)
 
+    {
 
+        (base->IFLAG2) = (flag);
 
+    }
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 64U
 
+    else
 
+    {
 
+        /* Required Rule 15.7, no 'else' at end of 'if ... else if' chain */
 
+    }
 
+#endif
 
+#endif /* if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 32U */
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 64U
 
+    else if (msgBuffIdx < 96U)
 
+    {
 
+        (base->IFLAG3) = (flag);
 
+    }
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 96U
 
+    else
 
+    {
 
+        /* Required Rule 15.7, no 'else' at end of 'if ... else if' chain */
 
+    }
 
+#endif
 
+#endif /* if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 64U */
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 96U
 
+    else
 
+    {
 
+        (base->IFLAG4) = (flag);
 
+    }
 
+#endif
 
+}
 
+
 
+/*!
 
+ * @brief Get the interrupt flag of the message buffers.
 
+ *
 
+ * @param   base                The FlexCAN base address
 
+ * @param   msgBuffIdx  Index of the message buffer
 
+ * @return  flag        The value of interrupt flag of the message buffer.
 
+ */
 
+static inline uint8 FlexCAN_GetBuffStatusFlag(const FLEXCAN_Type * base, uint32 msgBuffIdx)
 
+{
 
+    uint32 flag = 0U;
 
+
 
+    if (msgBuffIdx < 32U)
 
+    {
 
+        flag = ((base->IFLAG1 & ((uint32)1U << (msgBuffIdx % 32U))) >> (msgBuffIdx % 32U));
 
+    }
 
+
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 32U
 
+    else if (msgBuffIdx < 64U)
 
+    {
 
+        flag = ((base->IFLAG2 & ((uint32)1U << (msgBuffIdx % 32U))) >> (msgBuffIdx % 32U));
 
+    }
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 64U
 
+    else
 
+    {
 
+        /* Required Rule 15.7, no 'else' at end of 'if ... else if' chain */
 
+    }
 
+#endif /* FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 64U */
 
+#endif /* FLEXCAN_IP_FEATURE_MAX_MB_NUM > 32U */
 
+
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 64U
 
+    else if (msgBuffIdx < 96U)
 
+    {
 
+        flag = ((base->IFLAG3 & ((uint32)1U << (msgBuffIdx % 32U))) >> (msgBuffIdx % 32U));
 
+    }
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 96U
 
+    else
 
+    {
 
+        /* Required Rule 15.7, no 'else' at end of 'if ... else if' chain */
 
+    }
 
+#endif /* FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 96U */
 
+#endif /* FLEXCAN_IP_FEATURE_MAX_MB_NUM > 64U */
 
+
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 96U
 
+    else
 
+    {
 
+        flag = ((base->IFLAG4 & ((uint32)1U << (msgBuffIdx % 32U))) >> (msgBuffIdx % 32U));
 
+    }
 
+#endif
 
+
 
+    return (uint8)flag;
 
+}
 
+
 
+/*!
 
+ * @brief Get the interrupt Imask of the message buffers.
 
+ *
 
+ * @param   base                The FlexCAN base address
 
+ * @param   msgBuffIdx  Index of the message buffer
 
+ * @return  Imask        The value of interrupt Imask of the message buffer.
 
+ */
 
+static inline uint8 FlexCAN_GetBuffStatusImask(const FLEXCAN_Type * base, uint32 msgBuffIdx)
 
+{
 
+    uint32 u32Imask = 0U;
 
+
 
+    if (msgBuffIdx < 32U)
 
+    {
 
+        u32Imask = ((base->IMASK1 & ((uint32)1U << (msgBuffIdx % 32U))) >> (msgBuffIdx % 32U));
 
+    }
 
+
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 32U
 
+    else if (msgBuffIdx < 64U)
 
+    {
 
+        u32Imask = ((base->IMASK2 & ((uint32)1U << (msgBuffIdx % 32U))) >> (msgBuffIdx % 32U));
 
+    }
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 64U
 
+    else
 
+    {
 
+        /* Required Rule 15.7, no 'else' at end of 'if ... else if' chain */
 
+    }
 
+#endif /* FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 64U */
 
+#endif /* FLEXCAN_IP_FEATURE_MAX_MB_NUM > 32U */
 
+
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 64U
 
+    else if (msgBuffIdx < 96U)
 
+    {
 
+        u32Imask = ((base->IMASK3 & ((uint32)1U << (msgBuffIdx % 32U))) >> (msgBuffIdx % 32U));
 
+    }
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 96U
 
+    else
 
+    {
 
+        /* Required Rule 15.7, no 'else' at end of 'if ... else if' chain */
 
+    }
 
+#endif /* FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 96U */
 
+#endif /* FLEXCAN_IP_FEATURE_MAX_MB_NUM > 64U */
 
+
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 96U
 
+    else
 
+    {
 
+        u32Imask = ((base->IMASK4 & ((uint32)1U << (msgBuffIdx % 32U))) >> (msgBuffIdx % 32U));
 
+    }
 
+#endif
 
+
 
+    return (uint8)u32Imask;
 
+}
 
+
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_FD == STD_ON)
 
+
 
+/*!
 
+ * @brief Sets the FlexCAN time segments for setting up bit rate for FD BRS.
 
+ *
 
+ * @param   base The FlexCAN base address
 
+ * @param   timeSeg    FlexCAN time segments, which need to be set for the bit rate.
 
+ */
 
+static inline void FlexCAN_SetFDTimeSegments(FLEXCAN_Type * base, const Flexcan_Ip_TimeSegmentType * timeSeg)
 
+{
 
+#if (FLEXCAN_IP_DEV_ERROR_DETECT == STD_ON)
 
+    DevAssert(timeSeg != NULL_PTR);
 
+#endif
 
+    /* Set FlexCAN time segments*/
 
+    (base->FDCBT) = ((base->FDCBT) & ~((FLEXCAN_FDCBT_FPROPSEG_MASK | FLEXCAN_FDCBT_FPSEG2_MASK |
 
+                                        FLEXCAN_FDCBT_FPSEG1_MASK | FLEXCAN_FDCBT_FPRESDIV_MASK
 
+                                       ) | FLEXCAN_FDCBT_FRJW_MASK
 
+                                      )
 
+                    );
 
+
 
+    (base->FDCBT) = ((base->FDCBT) | (FLEXCAN_FDCBT_FPROPSEG(timeSeg->propSeg) |
 
+                                      FLEXCAN_FDCBT_FPSEG2(timeSeg->phaseSeg2) |
 
+                                      FLEXCAN_FDCBT_FPSEG1(timeSeg->phaseSeg1) |
 
+                                      FLEXCAN_FDCBT_FPRESDIV(timeSeg->preDivider) |
 
+                                      FLEXCAN_FDCBT_FRJW(timeSeg->rJumpwidth)
 
+                                     )
 
+                    );
 
+}
 
+
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_FD */
 
+/*!
 
+ * @brief Sets the FlexCAN time segments for setting up bit rate.
 
+ *
 
+ * @param   base The FlexCAN base address
 
+ * @param   timeSeg    FlexCAN time segments, which need to be set for the bit rate.
 
+ */
 
+static inline void FlexCAN_SetTimeSegments(FLEXCAN_Type * base, const Flexcan_Ip_TimeSegmentType * timeSeg)
 
+{
 
+#if (FLEXCAN_IP_DEV_ERROR_DETECT == STD_ON)
 
+    DevAssert(timeSeg != NULL_PTR);
 
+#endif
 
+    (base->CTRL1) = ((base->CTRL1) & ~((FLEXCAN_CTRL1_PROPSEG_MASK | FLEXCAN_CTRL1_PSEG2_MASK |
 
+                                        FLEXCAN_CTRL1_PSEG1_MASK | FLEXCAN_CTRL1_PRESDIV_MASK
 
+                                       ) | FLEXCAN_CTRL1_RJW_MASK
 
+                                      )
 
+                    );
 
+
 
+    (base->CTRL1) = ((base->CTRL1) | (FLEXCAN_CTRL1_PROPSEG(timeSeg->propSeg) |
 
+                                      FLEXCAN_CTRL1_PSEG2(timeSeg->phaseSeg2) |
 
+                                      FLEXCAN_CTRL1_PSEG1(timeSeg->phaseSeg1) |
 
+                                      FLEXCAN_CTRL1_PRESDIV(timeSeg->preDivider) |
 
+                                      FLEXCAN_CTRL1_RJW(timeSeg->rJumpwidth)
 
+                                     )
 
+                    );
 
+}
 
+
 
+/*!
 
+ * @brief Sets the FlexCAN extended time segments for setting up bit rate.
 
+ *
 
+ * @param   base The FlexCAN base address
 
+ * @param   timeSeg    FlexCAN time segments, which need to be set for the bit rate.
 
+ */
 
+static inline void FlexCAN_SetExtendedTimeSegments(FLEXCAN_Type * base, const Flexcan_Ip_TimeSegmentType * timeSeg)
 
+{
 
+#if (FLEXCAN_IP_DEV_ERROR_DETECT == STD_ON)
 
+    DevAssert(timeSeg != NULL_PTR);
 
+#endif
 
+    /* If extended bit time definitions are enabled, use CBT register */
 
+    (base->CBT) = ((base->CBT) & ~((FLEXCAN_CBT_EPROPSEG_MASK | FLEXCAN_CBT_EPSEG2_MASK |
 
+                                    FLEXCAN_CBT_EPSEG1_MASK | FLEXCAN_CBT_EPRESDIV_MASK
 
+                                   ) | FLEXCAN_CBT_ERJW_MASK
 
+                                  )
 
+                  );
 
+
 
+    (base->CBT) = ((base->CBT) | (FLEXCAN_CBT_EPROPSEG(timeSeg->propSeg) |
 
+                                  FLEXCAN_CBT_EPSEG2(timeSeg->phaseSeg2) |
 
+                                  FLEXCAN_CBT_EPSEG1(timeSeg->phaseSeg1) |
 
+                                  FLEXCAN_CBT_EPRESDIV(timeSeg->preDivider) |
 
+                                  FLEXCAN_CBT_ERJW(timeSeg->rJumpwidth)
 
+                                 )
 
+                  );
 
+}
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCE_CBT == STD_ON)
 
+/*!
 
+ * @brief Sets the FlexCAN Enhanced time segments for setting up nominal bit rate.
 
+ *
 
+ * @param   base The FlexCAN base address
 
+ * @param   timeSeg    FlexCAN time segments, which need to be set for the bit rate.
 
+ */
 
+static inline void FlexCAN_SetEnhancedNominalTimeSegments(FLEXCAN_Type * base, const Flexcan_Ip_TimeSegmentType * timeSeg)
 
+{
 
+#if (FLEXCAN_IP_DEV_ERROR_DETECT == STD_ON)
 
+    DevAssert(timeSeg != NULL_PTR);
 
+#endif
 
+    (base->ENCBT) = ((base->ENCBT) & ~(FLEXCAN_ENCBT_NTSEG1_MASK | FLEXCAN_ENCBT_NTSEG2_MASK | FLEXCAN_ENCBT_NRJW_MASK));
 
+
 
+    (base->ENCBT) = ((base->ENCBT) |(FLEXCAN_ENCBT_NTSEG1(timeSeg->phaseSeg1 + timeSeg->propSeg + 1U) |
 
+                                     FLEXCAN_ENCBT_NTSEG2(timeSeg->phaseSeg2) |
 
+                                     FLEXCAN_ENCBT_NRJW(timeSeg->rJumpwidth)
 
+                                    )
 
+                    );
 
+    (base->EPRS) = (base->EPRS & ~FLEXCAN_EPRS_ENPRESDIV_MASK);
 
+    (base->EPRS) |= FLEXCAN_EPRS_ENPRESDIV(timeSeg->preDivider);
 
+}
 
+
 
+/*!
 
+ * @brief Get the FlexCAN Enhanced time segments for nominal bit rate.
 
+ *
 
+ * @param   base The FlexCAN base address
 
+ * @param   timeSeg    FlexCAN time segments, which need to be set for the bit rate.
 
+ */
 
+static inline void FlexCAN_GetEnhancedNominalTimeSegments(const FLEXCAN_Type * base, Flexcan_Ip_TimeSegmentType * timeSeg)
 
+{
 
+    timeSeg->propSeg = 0;
 
+    timeSeg->preDivider = ((base->EPRS & FLEXCAN_EPRS_ENPRESDIV_MASK) >> FLEXCAN_EPRS_ENPRESDIV_SHIFT);
 
+    timeSeg->phaseSeg1 = ((base->ENCBT & FLEXCAN_ENCBT_NTSEG1_MASK) >> FLEXCAN_ENCBT_NTSEG1_SHIFT);
 
+    timeSeg->phaseSeg2 = ((base->ENCBT & FLEXCAN_ENCBT_NTSEG2_MASK) >> FLEXCAN_ENCBT_NTSEG2_SHIFT);
 
+    timeSeg->rJumpwidth = ((base->ENCBT & FLEXCAN_ENCBT_NRJW_MASK) >> FLEXCAN_ENCBT_NRJW_SHIFT);
 
+}
 
+
 
+/*!
 
+ * @brief Sets the FlexCAN Enhanced time segments for setting up data bit rate.
 
+ *
 
+ * @param   base The FlexCAN base address
 
+ * @param   timeSeg    FlexCAN time segments, which need to be set for the bit rate.
 
+ */
 
+static inline void FlexCAN_SetEnhancedDataTimeSegments(FLEXCAN_Type * base, const Flexcan_Ip_TimeSegmentType * timeSeg)
 
+{
 
+#if (FLEXCAN_IP_DEV_ERROR_DETECT == STD_ON)
 
+DevAssert(timeSeg != NULL_PTR);
 
+#endif
 
+(base->EDCBT) = ((base->EDCBT) & ~(FLEXCAN_EDCBT_DTSEG1_MASK | FLEXCAN_EDCBT_DTSEG2_MASK | FLEXCAN_EDCBT_DRJW_MASK));
 
+
 
+(base->EDCBT) = ((base->EDCBT) | (FLEXCAN_EDCBT_DTSEG1(timeSeg->phaseSeg1 + timeSeg->propSeg) |
 
+                                  FLEXCAN_EDCBT_DTSEG2(timeSeg->phaseSeg2) |
 
+                                  FLEXCAN_EDCBT_DRJW(timeSeg->rJumpwidth)
 
+                                 )
 
+                );
 
+
 
+(base->EPRS) = (base->EPRS & ~FLEXCAN_EPRS_EDPRESDIV_MASK);
 
+(base->EPRS) |= FLEXCAN_EPRS_EDPRESDIV(timeSeg->preDivider);
 
+}
 
+
 
+static inline void FlexCAN_GetEnhancedDataTimeSegments(const FLEXCAN_Type * base, Flexcan_Ip_TimeSegmentType * timeSeg)
 
+{
 
+#if (FLEXCAN_IP_DEV_ERROR_DETECT == STD_ON)
 
+DevAssert(timeSeg != NULL_PTR);
 
+#endif
 
+timeSeg->propSeg = 0U;
 
+timeSeg->phaseSeg1 = ((base->EDCBT & FLEXCAN_EDCBT_DTSEG1_MASK) >> FLEXCAN_EDCBT_DTSEG1_SHIFT);
 
+timeSeg->phaseSeg2 = ((base->EDCBT & FLEXCAN_EDCBT_DTSEG2_MASK) >> FLEXCAN_EDCBT_DTSEG2_SHIFT);
 
+timeSeg->rJumpwidth = ((base->EDCBT & FLEXCAN_EDCBT_DRJW_MASK) >> FLEXCAN_EDCBT_DRJW_SHIFT);
 
+timeSeg->preDivider = ((base->EPRS & FLEXCAN_EPRS_EDPRESDIV_MASK) >> FLEXCAN_EPRS_EDPRESDIV_SHIFT);
 
+}
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_ENHANCE_CBT == STD_ON) */
 
+
 
+/*!
 
+ * @brief Gets the FlexCAN extended time segments used for setting up bit rate.
 
+ *
 
+ * @param[in]   base The FlexCAN base address
 
+ * @param[out]   timeSeg    FlexCAN time segments read for bit rate
 
+ */
 
+static inline void FlexCAN_GetExtendedTimeSegments(const FLEXCAN_Type * base, Flexcan_Ip_TimeSegmentType * timeSeg)
 
+{
 
+    timeSeg->preDivider = ((base->CBT) & FLEXCAN_CBT_EPRESDIV_MASK) >> FLEXCAN_CBT_EPRESDIV_SHIFT;
 
+    timeSeg->propSeg = ((base->CBT) & FLEXCAN_CBT_EPROPSEG_MASK) >> FLEXCAN_CBT_EPROPSEG_SHIFT;
 
+    timeSeg->phaseSeg1 = ((base->CBT) & FLEXCAN_CBT_EPSEG1_MASK) >> FLEXCAN_CBT_EPSEG1_SHIFT;
 
+    timeSeg->phaseSeg2 = ((base->CBT) & FLEXCAN_CBT_EPSEG2_MASK) >> FLEXCAN_CBT_EPSEG2_SHIFT;
 
+    timeSeg->rJumpwidth = ((base->CBT) & FLEXCAN_CBT_ERJW_MASK) >> FLEXCAN_CBT_ERJW_SHIFT;
 
+}
 
+
 
+/*!
 
+ * @brief Gets the FlexCAN time segments to calculate the bit rate.
 
+ *
 
+ * @param[in]   base The FlexCAN base address
 
+ * @param[out]   timeSeg    FlexCAN time segments read for bit rate
 
+ */
 
+static inline void FlexCAN_GetTimeSegments(const FLEXCAN_Type * base, Flexcan_Ip_TimeSegmentType * timeSeg)
 
+{
 
+    timeSeg->preDivider = ((base->CTRL1) & FLEXCAN_CTRL1_PRESDIV_MASK) >> FLEXCAN_CTRL1_PRESDIV_SHIFT;
 
+    timeSeg->propSeg = ((base->CTRL1) & FLEXCAN_CTRL1_PROPSEG_MASK) >> FLEXCAN_CTRL1_PROPSEG_SHIFT;
 
+    timeSeg->phaseSeg1 = ((base->CTRL1) & FLEXCAN_CTRL1_PSEG1_MASK) >> FLEXCAN_CTRL1_PSEG1_SHIFT;
 
+    timeSeg->phaseSeg2 = ((base->CTRL1) & FLEXCAN_CTRL1_PSEG2_MASK) >> FLEXCAN_CTRL1_PSEG2_SHIFT;
 
+    timeSeg->rJumpwidth = ((base->CTRL1) & FLEXCAN_CTRL1_RJW_MASK) >> FLEXCAN_CTRL1_RJW_SHIFT;
 
+}
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_FD == STD_ON)
 
+/*!
 
+ * @brief Gets the  FlexCAN time segments for FD BRS to calculate the bit rate.
 
+ *
 
+ * @param   base The FlexCAN base address
 
+ * @param   timeSeg    FlexCAN time segments read for bit rate
 
+ */
 
+static inline void FlexCAN_GetFDTimeSegments(const FLEXCAN_Type * base, Flexcan_Ip_TimeSegmentType * timeSeg)
 
+{
 
+    timeSeg->preDivider = ((base->FDCBT) & FLEXCAN_FDCBT_FPRESDIV_MASK) >> FLEXCAN_FDCBT_FPRESDIV_SHIFT;
 
+    timeSeg->propSeg = ((base->FDCBT) & FLEXCAN_FDCBT_FPROPSEG_MASK) >> FLEXCAN_FDCBT_FPROPSEG_SHIFT;
 
+    timeSeg->phaseSeg1 = ((base->FDCBT) & FLEXCAN_FDCBT_FPSEG1_MASK) >> FLEXCAN_FDCBT_FPSEG1_SHIFT;
 
+    timeSeg->phaseSeg2 = ((base->FDCBT) & FLEXCAN_FDCBT_FPSEG2_MASK) >> FLEXCAN_FDCBT_FPSEG2_SHIFT;
 
+    timeSeg->rJumpwidth = ((base->FDCBT) & FLEXCAN_FDCBT_FRJW_MASK) >> FLEXCAN_FDCBT_FRJW_SHIFT;
 
+}
 
+
 
+#endif /* if FLEXCAN_IP_FEATURE_HAS_FD */
 
+
 
+/*!
 
+ * @brief Checks if the Extended Time Segment are enabled.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @return  TRUE if enabled; FALSE if disabled
 
+ */
 
+static inline boolean FlexCAN_IsExCbtEnabled(const FLEXCAN_Type * pBase)
 
+{
 
+    return (0U == ((pBase->CBT & FLEXCAN_CBT_BTF_MASK) >> FLEXCAN_CBT_BTF_SHIFT)) ? FALSE : TRUE;
 
+}
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCE_CBT == STD_ON)
 
+/*!
 
+ * @brief Checks if the Enhanced Time Segment are enabled.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @return  TRUE if enabled; FALSE if disabled
 
+ */
 
+static inline boolean FlexCAN_IsEnhCbtEnabled(const FLEXCAN_Type * pBase)
 
+{
 
+    return (0U == ((pBase->CTRL2 & FLEXCAN_CTRL2_BTE_MASK) >> FLEXCAN_CTRL2_BTE_SHIFT)) ? FALSE : TRUE;
 
+}
 
+
 
+/*!
 
+ * @brief Set the Enhanced Time Segment are enabled or disabled.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @param   enableCBT Enable/Disable use of Enhanced Time Segments
 
+ */
 
+static inline void FlexCAN_EnhCbtEnable(FLEXCAN_Type * base, boolean enableCBT)
 
+{   /* Enable the use of extended bit time definitions */
 
+    base->CTRL2 = (base->CTRL2 & ~FLEXCAN_CTRL2_BTE_MASK) | FLEXCAN_CTRL2_BTE(enableCBT ? 1UL : 0UL);
 
+}
 
+#endif
 
+/*!
 
+ * @brief Set the Extended Time Segment are enabled or disabled.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @param   enableCBT Enable/Disable use of Extent Time Segments
 
+ */
 
+static inline void FlexCAN_EnableExtCbt(FLEXCAN_Type * base, boolean enableCBT)
 
+{   /* Enable the use of extended bit time definitions */
 
+    base->CBT = (base->CBT & ~FLEXCAN_CBT_BTF_MASK) | FLEXCAN_CBT_BTF(enableCBT ? 1UL : 0UL);
 
+}
 
+
 
+/*!
 
+ * @brief Set operation mode.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   mode  Set an operation mode
 
+ */
 
+void FlexCAN_SetOperationMode(FLEXCAN_Type * base, Flexcan_Ip_ModesType mode);
 
+
 
+
 
+/*!
 
+ * @brief Enables/Disables the Self Reception feature.
 
+ *
 
+ * If enabled, FlexCAN is allowed to receive frames transmitted by itself.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   enable Enable/Disable Self Reception
 
+ */
 
+static inline void FlexCAN_SetSelfReception(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    base->MCR = (base->MCR & ~FLEXCAN_MCR_SRXDIS_MASK) | FLEXCAN_MCR_SRXDIS(enable ? 0UL : 1UL);
 
+}
 
+
 
+/*!
 
+ * @brief Checks if the Flexible Data rate feature is enabled.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @return  TRUE if enabled; FALSE if disabled
 
+ */
 
+static inline boolean FlexCAN_IsFDEnabled(const FLEXCAN_Type * base)
 
+{
 
+    return ((base->MCR & FLEXCAN_MCR_FDEN_MASK) >> FLEXCAN_MCR_FDEN_SHIFT) != 0U;
 
+}
 
+
 
+/*!
 
+ * @brief Checks if the listen only mode is enabled.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ * @return  TRUE if enabled; FALSE if disabled
 
+ */
 
+static inline boolean FlexCAN_IsListenOnlyModeEnabled(const FLEXCAN_Type * base)
 
+{
 
+    return (((base->CTRL1 & (FLEXCAN_CTRL1_LOM_MASK)) != 0U) ? TRUE : FALSE);
 
+}
 
+
 
+
 
+/*!
 
+ * @brief Return last Message Buffer Occupied By RxFIFO
 
+ *
 
+ * @param   x    Number of Configured RxFIFO Filters
 
+ * @return  number of last MB occupied by RxFIFO
 
+ */
 
+static inline uint32 RxFifoOcuppiedLastMsgBuff(uint32 x)
 
+{
 
+    return 5U + ((((x) + 1U) * 8U) / 4U);
 
+}
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+/*!
 
+ * @brief Computes the maximum payload size (in bytes), given a DLC
 
+ *
 
+ * @param   dlcValue    DLC code from the MB memory.
 
+ * @return  payload size (in bytes)
 
+ */
 
+uint8 FlexCAN_ComputePayloadSize(uint8 dlcValue);
 
+#endif /*(FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON) */
 
+
 
+/*!
 
+ * @brief Sets the FlexCAN message buffer fields for transmitting.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   msgBuffIdx       Index of the message buffer
 
+ * @return  Pointer to the beginning of the MBs space address
 
+ */
 
+volatile uint32 * FlexCAN_GetMsgBuffRegion(const FLEXCAN_Type * base, uint32 msgBuffIdx);
 
+
 
+/*!
 
+ * @brief Enables/Disables FD frame compatible with ISO-FD Frame ISO 11898-1 (2003)
 
+ *
 
+ * The CAN FD protocol has been improved to increase the failure detection capability that was in the original CAN FD protocol,
 
+ * which is also called non-ISO CAN FD, by CAN in Automation (CiA). A three-bit stuff counter and a parity bit have been introduced
 
+ * in the improved CAN FD protocol, now called ISO CAN FD. The CRC calculation has also been modified. All these improvements
 
+ * make the ISO CAN FD protocol incompatible with the non-FD CAN FD protocol.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   enable Enable/Disable ISO FD Compatible mode.
 
+ */
 
+#if (FLEXCAN_IP_FEATURE_SWITCHINGISOMODE == STD_ON)
 
+static inline void FlexCAN_SetIsoCan(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    base->CTRL2 = (base->CTRL2 & ~FLEXCAN_CTRL2_ISOCANFDEN_MASK) | FLEXCAN_CTRL2_ISOCANFDEN(enable ? 1UL : 0UL);
 
+}
 
+#endif
 
+
 
+static inline void FlexCAN_SetEntireFrameArbitrationFieldComparison(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    base->CTRL2 = (base->CTRL2 & ~FLEXCAN_CTRL2_EACEN_MASK) | FLEXCAN_CTRL2_EACEN(enable ? 1UL : 0UL);
 
+}
 
+#if (FLEXCAN_IP_FEATURE_PROTOCOLEXCEPTION == STD_ON)
 
+static inline void FlexCAN_SetProtocolException(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    base->CTRL2 = (base->CTRL2 & ~FLEXCAN_CTRL2_PREXCEN_MASK) | FLEXCAN_CTRL2_PREXCEN(enable ? 1UL : 0UL);
 
+}
 
+#endif
 
+static inline void FlexCAN_SetRemoteReqStore(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    base->CTRL2 = (base->CTRL2 & ~FLEXCAN_CTRL2_RRS_MASK) | FLEXCAN_CTRL2_RRS(enable ? 1UL : 0UL);
 
+}
 
+static inline void FlexCAN_SetBusOffAutorecovery(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    base->CTRL1 = (base->CTRL1 & ~FLEXCAN_CTRL1_BOFFREC_MASK) | FLEXCAN_CTRL1_BOFFREC(enable ? 0UL : 1UL);
 
+}
 
+#if (FLEXCAN_IP_FEATURE_EDGEFILTER == STD_ON)
 
+static inline void FlexCAN_SetEdgeFilter(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    base->CTRL2 = (base->CTRL2 & ~FLEXCAN_CTRL2_EDFLTDIS_MASK) | FLEXCAN_CTRL2_EDFLTDIS(enable ? 0UL : 1UL);
 
+}
 
+#endif
 
+static inline void FlexCAN_CanBitSampling(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    base->CTRL1 = (base->CTRL1 & ~FLEXCAN_CTRL1_SMP_MASK) | FLEXCAN_CTRL1_SMP(enable ? 1UL : 0UL);
 
+}
 
+#if (FLEXCAN_IP_FEATURE_HAS_PE_CLKSRC_SELECT == STD_ON)
 
+static inline void FlexCAN_SetClkSrc(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    base->CTRL1 = (base->CTRL1 & ~FLEXCAN_CTRL1_CLKSRC_MASK) | FLEXCAN_CTRL1_CLKSRC(enable ? 1UL : 0UL);
 
+}
 
+#endif
 
+
 
+/*!
 
+ * @brief Gets the individual FlexCAN MB interrupt flag.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   msgBuffIdx       Index of the message buffer
 
+ * @return  the individual Message Buffer interrupt flag (0 and 1 are the flag value)
 
+ */
 
+static inline uint8 FlexCAN_GetMsgBuffIntStatusFlag(const FLEXCAN_Type * base, uint32 msgBuffIdx)
 
+{
 
+    /* TODO: This need to be protected multithread access*/
 
+    uint8 flag = 0;
 
+    uint32 mask;
 
+
 
+    if (msgBuffIdx < 32U)
 
+    {
 
+        mask = base->IMASK1 & FLEXCAN_IMASK1_BUF31TO0M_MASK;
 
+        flag = (uint8)(((base->IFLAG1 & mask) >> (msgBuffIdx % 32U)) & 1U);
 
+    }
 
+
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 32U
 
+    else if (msgBuffIdx < 64U)
 
+    {
 
+        mask = base->IMASK2 & FLEXCAN_IMASK2_BUF63TO32M_MASK;
 
+        flag = (uint8)(((base->IFLAG2 & mask) >> (msgBuffIdx % 32U)) & 1U);
 
+    }
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 64U
 
+    else
 
+    {
 
+        /* Required Rule 15.7, no 'else' at end of 'if ... else if' chain */
 
+    }
 
+#endif
 
+#endif /* if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 32U */
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 64U
 
+    else if (msgBuffIdx < 96U)
 
+    {
 
+        mask = base->IMASK3 & FLEXCAN_IMASK3_BUF95TO64M_MASK;
 
+        flag = (uint8)(((base->IFLAG3 & mask) >> (msgBuffIdx % 32U)) & 1U);
 
+    }
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM <= 96U
 
+    else
 
+    {
 
+        /* Required Rule 15.7, no 'else' at end of 'if ... else if' chain */
 
+    }
 
+#endif
 
+#endif /* if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 64U */
 
+#if FLEXCAN_IP_FEATURE_MAX_MB_NUM > 96U
 
+    else
 
+    {
 
+        mask = base->IMASK4 & FLEXCAN_IMASK4_BUF127TO96M_MASK;
 
+        flag = (uint8)(((base->IFLAG4 & mask) >> (msgBuffIdx % 32U)) & 1U);
 
+    }
 
+#endif
 
+
 
+    return flag;
 
+}
 
+
 
+/*!
 
+ * @brief Sets the FlexCAN Rx Message Buffer global mask.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   Mask  Mask Value
 
+ */
 
+static inline void FlexCAN_SetRxMsgBuffGlobalMask(FLEXCAN_Type * base, uint32 Mask)
 
+{
 
+    (base->RXMGMASK) = Mask;
 
+}
 
+
 
+/*!
 
+ * @brief Sets the FlexCAN Rx individual mask for ID filtering in the Rx Message Buffers and the Rx FIFO.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   msgBuffIdx       Index of the message buffer/filter
 
+ * @param   mask     Individual mask
 
+ */
 
+static inline void FlexCAN_SetRxIndividualMask(FLEXCAN_Type * base,
 
+                                               uint32 msgBuffIdx,
 
+                                               uint32 mask
 
+                                              )
 
+{
 
+    base->RXIMR[msgBuffIdx] = mask;
 
+}
 
+
 
+/*!
 
+ * @brief Check if controller is in freeze mode or not.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @return  TRUE if controller is in freeze mode
 
+ *          FALSE if controller is not in freeze mode
 
+ */
 
+static inline boolean FlexCAN_IsFreezeMode(const FLEXCAN_Type * base)
 
+{
 
+    return (((base->MCR & (FLEXCAN_MCR_FRZACK_MASK)) != 0U)? TRUE : FALSE);
 
+}
 
+
 
+static inline void FlexCAN_SetTxArbitrationStartDelay(FLEXCAN_Type * base, uint8 tasd)
 
+{
 
+    base->CTRL2 = (base->CTRL2 & ~FLEXCAN_CTRL2_TASD_MASK) | FLEXCAN_CTRL2_TASD(tasd);
 
+}
 
+
 
+/*!
 
+ * @brief Sets the Rx masking type.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   type         The FlexCAN Rx mask type
 
+ */
 
+static inline void FlexCAN_SetRxMaskType(FLEXCAN_Type * base, Flexcan_Ip_RxMaskType type)
 
+{
 
+    /* Set RX masking type (RX global mask or RX individual mask)*/
 
+    if (FLEXCAN_RX_MASK_GLOBAL == type)
 
+    {
 
+        /* Enable Global RX masking */
 
+        base->MCR = (base->MCR & ~FLEXCAN_MCR_IRMQ_MASK) | FLEXCAN_MCR_IRMQ(0U);
 
+    }
 
+    else
 
+    {
 
+        /* Enable Individual Rx Masking and Queue */
 
+        base->MCR = (base->MCR & ~FLEXCAN_MCR_IRMQ_MASK) | FLEXCAN_MCR_IRMQ(1U);
 
+    }
 
+}
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+/*!
 
+ * @brief Checks if Enhanced Rx FIFO is enabled.
 
+ *
 
+ * @param   base     The FlexCAN base address
 
+ * @return  EnhancedRxFifo status (true = enabled / false = disabled)
 
+ */
 
+static inline boolean FlexCAN_IsEnhancedRxFifoEnabled(const FLEXCAN_Type * base)
 
+{
 
+    return ((((base->ERFCR & FLEXCAN_ERFCR_ERFEN_MASK) >> FLEXCAN_ERFCR_ERFEN_SHIFT) != 0U) ? (TRUE): (FALSE));
 
+}
 
+
 
+/*FUNCTION**********************************************************************
 
+ *
 
+ * Function Name : FLEXCAN_SetEnhancedRxFifoIntAll
 
+ * Description   : Enable/Disable All(Underflow, Overflow, Watermark and frame available)
 
+ *                 interrupts for Enhanced Rx FIFO.
 
+ *
 
+ *END**************************************************************************/
 
+static inline void FlexCAN_SetEnhancedRxFifoIntAll(FLEXCAN_Type * base, boolean enable)
 
+{
 
+    if (TRUE == enable)
 
+    {
 
+        (base->ERFIER) = (uint32)(FLEXCAN_IP_ENHACED_RX_FIFO_ALL_INTERRUPT_MASK);
 
+    }
 
+    else
 
+    {
 
+        (base->ERFIER) = (uint32)(FLEXCAN_IP_ENHACED_RX_FIFO_NO_INTERRUPT_MASK);
 
+    }
 
+}
 
+
 
+/*!
 
+ * @brief Gets the individual FlexCAN Enhanced Rx FIFO flag.
 
+ *
 
+ * @param   base        The FlexCAN base address
 
+ * @param   intFlag     Index of the Enhanced Rx FIFO flag
 
+ * @return  the individual Enhanced Rx FIFO flag (0 and 1 are the flag value)
 
+ */
 
+static inline uint8 FlexCAN_GetEnhancedRxFIFOStatusFlag(const FLEXCAN_Type * base, uint32 intFlag)
 
+{
 
+    return (uint8)((base->ERFSR & ((uint32)1U << ((uint8)intFlag & (uint8)0x1F))) >> ((uint8)intFlag & (uint8)0x1F));
 
+}
 
+
 
+/*!
 
+ * @brief Clears the interrupt flag of the Enhanced Rx FIFO.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @param   intFlag       Index of the Enhanced Rx FIFO interrupt flag
 
+ */
 
+static inline void FlexCAN_ClearEnhancedRxFifoIntStatusFlag(FLEXCAN_Type * base, uint32 intFlag)
 
+{
 
+    (base->ERFSR) = (uint32)1U << intFlag;
 
+}
 
+
 
+/*!
 
+ * @brief Gets the individual FlexCAN Enhanced Rx FIFO interrupt flag.
 
+ *
 
+ * @param   base        The FlexCAN base address
 
+ * @param   intFlag     Index of the Enhanced Rx FIFO interrupt flag
 
+ * @return  the individual Enhanced Rx FIFO interrupt flag (0 and 1 are the flag value)
 
+ */
 
+static inline uint8 FlexCAN_GetEnhancedRxFIFOIntStatusFlag(const FLEXCAN_Type * base, uint32 intFlag)
 
+{
 
+    return (uint8)((base->ERFIER & ((uint32)1U << ((uint8)intFlag & (uint8)0x1F))) >> ((uint8)intFlag & (uint8)0x1F));
 
+}
 
+/*!
 
+ * @brief Checks if FlexCAN has Enhanced Rx FIFO.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @return  EnhancedRxFifo status (TRUE = available / FALSE = unavailable)
 
+ */
 
+boolean FlexCAN_IsEnhancedRxFifoAvailable(const FLEXCAN_Type * base);
 
+
 
+Flexcan_Ip_StatusType FlexCAN_EnableEnhancedRxFifo(FLEXCAN_Type * base,
 
+                                                   uint32 numOfStdIDFilters,
 
+                                                   uint32 numOfExtIDFilters,
 
+                                                   uint32 numOfWatermark
 
+                                                  );
 
+void FlexCAN_SetEnhancedRxFifoFilter(FLEXCAN_Type * base, const Flexcan_Ip_EnhancedIdTableType * idFilterTable);
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON)
 
+/*!
 
+ * @brief Clear Enhance fifo data.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @return  void
 
+ */
 
+void FlexCAN_ClearOutputEnhanceFIFO(FLEXCAN_Type * base);
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON) */
 
+
 
+void FlexCAN_ReadEnhancedRxFifo(const FLEXCAN_Type * base, Flexcan_Ip_MsgBuffType * rxFifo);
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON) */
 
+#if (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON)
 
+/*!
 
+ * @brief Clear Legacy fifo data.
 
+ *
 
+ * @param   base  The FlexCAN base address
 
+ * @return  void
 
+ */
 
+void FlexCAN_ClearOutputLegacyFIFO(FLEXCAN_Type * base);
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE */
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_TS_ENABLE == STD_ON)
 
+
 
+void FlexCAN_ConfigTimestamp(FLEXCAN_Type * base, const Flexcan_Ip_TimeStampConfigType * config);
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_HR_TIMER == STD_ON)
 
+/*!
 
+ * @brief Checks if High Resolution Time Stamp is enabled.
 
+ *
 
+ * @param   base     The FlexCAN base address
 
+ * @return  HRTimeStamp status (true = enabled / false = disabled)
 
+ */
 
+static inline boolean FLEXCAN_IsHRTimeStampEnabled(const FLEXCAN_Type * base)
 
+{
 
+    return ((((base->CTRL2 & FLEXCAN_CTRL2_TSTAMPCAP_MASK) >> FLEXCAN_CTRL2_TSTAMPCAP_SHIFT) != 0U) ? TRUE : FALSE);
 
+}
 
+
 
+static inline void FlexCAN_ConfigTimestampModule(const Flexcan_Ip_TimeStampConfigType * config)
 
+{
 
+    FLEXCAN_IP_TIMESTAMP_REG = FLEXCAN_IP_TIMESTAMP_SEL(config->hrSrc)|FLEXCAN_IP_TIMESTAMP_EN_MASK;
 
+}
 
+#endif /*(FLEXCAN_IP_FEATURE_HAS_HR_TIMER == STD_ON) */
 
+#endif /* #if (FLEXCAN_IP_FEATURE_HAS_TS_ENABLE == STD_ON) */
 
+/*!
 
+ * @brief configure controller depending on options.
 
+ *
 
+ * @param   pBase          The FlexCAN base address.
 
+ * @param   u32Options     Controller Options.
 
+ */
 
+void FlexCAN_ConfigCtrlOptions(FLEXCAN_Type * pBase, uint32 u32Options);
 
+
 
+/*!
 
+ * @brief Will set Flexcan Peripheral Register to default val.
 
+ *
 
+ * @param   base    The FlexCAN base address
 
+ */
 
+static inline void FlexCAN_SetRegDefaultVal(FLEXCAN_Type * base)
 
+{
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+    if (TRUE == FlexCAN_IsEnhancedRxFifoAvailable(base))
 
+    {
 
+        base->ERFSR = FLEXCAN_IP_ERFSR_DEFAULT_VALUE_U32;
 
+        base->ERFIER = FLEXCAN_IP_ERFIER_DEFAULT_VALUE_U32;
 
+        base->ERFCR = FLEXCAN_IP_ERFCR_DEFAULT_VALUE_U32;
 
+    }
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON) */
 
+#if (FLEXCAN_IP_FEATURE_HAS_FD == STD_ON)
 
+    #if defined(CAN_FEATURE_S32K1XX)
 
+    if (TRUE == FlexCAN_IsFDAvailable(base))
 
+    {
 
+    #endif /* defined(CAN_FEATURE_S32K1XX) */
 
+        base->FDCBT = FLEXCAN_IP_FDCBT_DEFAULT_VALUE_U32;
 
+        base->FDCTRL = FLEXCAN_IP_FDCTRL_DEFAULT_VALUE_U32;
 
+    #if defined(CAN_FEATURE_S32K1XX)
 
+    }
 
+    #endif /* defined(CAN_FEATURE_S32K1XX) */
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_FD == STD_ON) */
 
+#if (FLEXCAN_IP_FEATURE_HAS_MEM_ERR_DET == STD_ON)
 
+    base->ERRSR = FLEXCAN_IP_ERRSR_DEFAULT_VALUE_U32;
 
+    base->ERRIPPR = FLEXCAN_IP_ERRIPPR_DEFAULT_VALUE_U32;
 
+    base->ERRIDPR = FLEXCAN_IP_ERRIDPR_DEFAULT_VALUE_U32;
 
+    base->ERRIAR = FLEXCAN_IP_ERRIAR_DEFAULT_VALUE_U32;
 
+    /* Enable write of MECR register */
 
+    base->CTRL2 = (base->CTRL2 & ~FLEXCAN_CTRL2_ECRWRE_MASK) | FLEXCAN_CTRL2_ECRWRE(1);
 
+    /* Enable write of MECR */
 
+    base->MECR = (base->MECR & ~FLEXCAN_MECR_ECRWRDIS_MASK) | FLEXCAN_MECR_ECRWRDIS(0);
 
+    /* set Default value */
 
+    base->MECR = FLEXCAN_IP_MECR_DEFAULT_VALUE_U32;
 
+    /* disable write of MECR */
 
+    base->MECR = (base->MECR & ~FLEXCAN_MECR_ECRWRDIS_MASK) | FLEXCAN_MECR_ECRWRDIS(1);
 
+    /* Disable write of MECR */
 
+    base->CTRL2 = (base->CTRL2 & ~FLEXCAN_CTRL2_ECRWRE_MASK) | FLEXCAN_CTRL2_ECRWRE(0);
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_MEM_ERR_DET == STD_ON) */
 
+#if (FLEXCAN_IP_FEATURE_MAX_MB_NUM > 96U)
 
+    if (FlexCAN_GetMaxMbNum(base) > 96U)
 
+    {
 
+        base->IFLAG4 = FLEXCAN_IP_IFLAG_DEFAULT_VALUE_U32;
 
+        base->IMASK4 = FLEXCAN_IP_IMASK_DEFAULT_VALUE_U32;
 
+    }
 
+#endif /* (FLEXCAN_IP_FEATURE_MAX_MB_NUM > 96U) */
 
+#if (FLEXCAN_IP_FEATURE_MAX_MB_NUM > 64U)
 
+    if (FlexCAN_GetMaxMbNum(base) > 64U)
 
+    {
 
+        base->IFLAG3 = FLEXCAN_IP_IFLAG_DEFAULT_VALUE_U32;
 
+        base->IMASK3 = FLEXCAN_IP_IMASK_DEFAULT_VALUE_U32;
 
+    }
 
+#endif /* (FLEXCAN_IP_FEATURE_MAX_MB_NUM > 64U) */
 
+#if (FLEXCAN_IP_FEATURE_MAX_MB_NUM > 32U)
 
+    if (FlexCAN_GetMaxMbNum(base) > 32U)
 
+    {
 
+        base->IFLAG2 = FLEXCAN_IP_IFLAG_DEFAULT_VALUE_U32;
 
+        base->IMASK2 = FLEXCAN_IP_IMASK_DEFAULT_VALUE_U32;
 
+    }
 
+#endif /* (FLEXCAN_IP_FEATURE_MAX_MB_NUM > 32U) */
 
+    base->IFLAG1 = FLEXCAN_IP_IFLAG_DEFAULT_VALUE_U32;
 
+    base->IMASK1 = FLEXCAN_IP_IMASK_DEFAULT_VALUE_U32;
 
+    base->CBT = FLEXCAN_IP_CBT_DEFAULT_VALUE_U32;
 
+    base->CTRL2 = FLEXCAN_IP_CTRL2_DEFAULT_VALUE_U32;
 
+    base->ESR1 = FLEXCAN_IP_ESR1_DEFAULT_VALUE_U32;
 
+    base->ECR = FLEXCAN_IP_ECR_DEFAULT_VALUE_U32;
 
+    base->TIMER = FLEXCAN_IP_TIMER_DEFAULT_VALUE_U32;
 
+    base->CTRL1 = FLEXCAN_IP_CTRL1_DEFAULT_VALUE_U32;
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCE_CBT == STD_ON)
 
+    base->EPRS  = FLEXCAN_IP_EPRS_DEFAULT_VALUE_U32;
 
+    base->ENCBT = FLEXCAN_IP_ENCBT_DEFAULT_VALUE_U32;
 
+    base->EDCBT = FLEXCAN_IP_EDCBT_DEFAULT_VALUE_U32;
 
+    base->ETDC  = FLEXCAN_IP_ETDC_DEFAULT_VALUE_U32;
 
+#endif
 
+    base->MCR = FLEXCAN_IP_MCR_DEFAULT_VALUE_U32;
 
+}
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON)
 
+/*!
 
+ * @brief Configures Pretended Networking mode filtering selection.
 
+ *
 
+ * @param   pBase  The FlexCAN base address
 
+ * @param   pPnConfig The pretended networking configuration
 
+ *
 
+ */
 
+static inline void FlexCAN_SetPNFilteringSelection(FLEXCAN_Type * pBase, const Flexcan_Ip_PnConfigType * pPnConfig)
 
+{
 
+    uint32 u32Tmp;
 
+
 
+    u32Tmp = pBase->CTRL1_PN;
 
+    u32Tmp &= ~(FLEXCAN_CTRL1_PN_WTOF_MSK_MASK |
 
+             FLEXCAN_CTRL1_PN_WUMF_MSK_MASK |
 
+             FLEXCAN_CTRL1_PN_NMATCH_MASK |
 
+             FLEXCAN_CTRL1_PN_PLFS_MASK |
 
+             FLEXCAN_CTRL1_PN_IDFS_MASK |
 
+             FLEXCAN_CTRL1_PN_FCS_MASK);
 
+    u32Tmp |= FLEXCAN_CTRL1_PN_WTOF_MSK(pPnConfig->bWakeUpTimeout ? 1UL : 0UL);
 
+    u32Tmp |= FLEXCAN_CTRL1_PN_WUMF_MSK(pPnConfig->bWakeUpMatch ? 1UL : 0UL);
 
+    u32Tmp |= FLEXCAN_CTRL1_PN_NMATCH(pPnConfig->u16NumMatches);
 
+    u32Tmp |= FLEXCAN_CTRL1_PN_FCS(pPnConfig->eFilterComb);
 
+    u32Tmp |= FLEXCAN_CTRL1_PN_IDFS(pPnConfig->eIdFilterType);
 
+    u32Tmp |= FLEXCAN_CTRL1_PN_PLFS(pPnConfig->ePayloadFilterType);
 
+    pBase->CTRL1_PN = u32Tmp;
 
+}
 
+
 
+/*!
 
+ * @brief Set PN timeout value.
 
+ *
 
+ * @param   pBase  The FlexCAN base address
 
+ * @param   u16TimeoutValue  timeout for no message matching
 
+ */
 
+static inline void FlexCAN_SetPNTimeoutValue(FLEXCAN_Type * pBase, uint16 u16TimeoutValue)
 
+{
 
+    pBase->CTRL2_PN = (pBase->CTRL2_PN & ~FLEXCAN_CTRL2_PN_MATCHTO_MASK) | FLEXCAN_CTRL2_PN_MATCHTO(u16TimeoutValue);
 
+}
 
+
 
+/*!
 
+ * @brief Configures the Pretended Networking ID Filter 1.
 
+ *
 
+ * @param   pBase  The FlexCAN base address
 
+ * @param   idFilter  The ID Filter configuration
 
+ */
 
+static inline void FlexCAN_SetPNIdFilter1(FLEXCAN_Type * pBase, Flexcan_Ip_PnIdFilterType idFilter)
 
+{
 
+    uint32 u32Tmp;
 
+
 
+    u32Tmp = pBase->FLT_ID1;
 
+    u32Tmp &= ~(FLEXCAN_FLT_ID1_FLT_IDE_MASK | FLEXCAN_FLT_ID1_FLT_RTR_MASK | FLEXCAN_FLT_ID1_FLT_ID1_MASK);
 
+    u32Tmp |= FLEXCAN_FLT_ID1_FLT_IDE(idFilter.bExtendedId ? 1UL : 0UL);
 
+    u32Tmp |= FLEXCAN_FLT_ID1_FLT_RTR(idFilter.bRemoteFrame ? 1UL : 0UL);
 
+    if (idFilter.bExtendedId)
 
+    {
 
+        u32Tmp |= FLEXCAN_FLT_ID1_FLT_ID1(idFilter.u32Id);
 
+    }
 
+    else
 
+    {
 
+        u32Tmp |= FLEXCAN_FLT_ID1_FLT_ID1(idFilter.u32Id << FLEXCAN_IP_ID_STD_SHIFT);
 
+    }
 
+
 
+    pBase->FLT_ID1 = u32Tmp;
 
+}
 
+
 
+/*!
 
+ * @brief Configures the Pretended Networking ID Filter 2 Check IDE&RTR.
 
+ *
 
+ * @param   pBase  The FlexCAN base address
 
+
 
+ */
 
+static inline void FlexCAN_SetPNIdFilter2Check(FLEXCAN_Type * pBase)
 
+{
 
+    pBase->FLT_ID2_IDMASK |= FLEXCAN_FLT_ID2_IDMASK_IDE_MSK_MASK | FLEXCAN_FLT_ID2_IDMASK_RTR_MSK_MASK;
 
+}
 
+/*!
 
+ * @brief Configures the Pretended Networking ID Filter 2.
 
+ *
 
+ * @param   pBase  The FlexCAN base address
 
+ * @param   pPnConfig  The pretended networking configuration
 
+ */
 
+static inline void FlexCAN_SetPNIdFilter2(FLEXCAN_Type * pBase, const Flexcan_Ip_PnConfigType * pPnConfig)
 
+{
 
+    uint32 u32Tmp;
 
+
 
+    u32Tmp = pBase->FLT_ID2_IDMASK;
 
+    u32Tmp &= ~(FLEXCAN_FLT_ID2_IDMASK_IDE_MSK_MASK | FLEXCAN_FLT_ID2_IDMASK_RTR_MSK_MASK | FLEXCAN_FLT_ID2_IDMASK_FLT_ID2_IDMASK_MASK);
 
+    u32Tmp |= FLEXCAN_FLT_ID2_IDMASK_IDE_MSK(pPnConfig->idFilter2.bExtendedId ? 1UL : 0UL);
 
+    u32Tmp |= FLEXCAN_FLT_ID2_IDMASK_RTR_MSK(pPnConfig->idFilter2.bRemoteFrame ? 1UL : 0UL);
 
+    /* Check if idFilter1 is extended and apply accordingly mask */
 
+    if (pPnConfig->idFilter1.bExtendedId)
 
+    {
 
+        u32Tmp |= FLEXCAN_FLT_ID2_IDMASK_FLT_ID2_IDMASK(pPnConfig->idFilter2.u32Id);
 
+    }
 
+    else
 
+    {
 
+        u32Tmp |= FLEXCAN_FLT_ID2_IDMASK_FLT_ID2_IDMASK(pPnConfig->idFilter2.u32Id << FLEXCAN_IP_ID_STD_SHIFT);
 
+    }
 
+
 
+    pBase->FLT_ID2_IDMASK = u32Tmp;
 
+}
 
+
 
+
 
+/*!
 
+ * @brief Set PN DLC Filter.
 
+ *
 
+ * @param   pBase  The FlexCAN base address
 
+ * @param   timeoutValue  timeout for no message matching
 
+ */
 
+static inline void FlexCAN_SetPNDlcFilter(FLEXCAN_Type * pBase,
 
+                                          uint8 u8DlcLow,
 
+                                          uint8 u8DlcHigh
 
+                                         )
 
+{
 
+    uint32 tmp;
 
+
 
+    tmp = pBase->FLT_DLC;
 
+    tmp &= ~(FLEXCAN_FLT_DLC_FLT_DLC_LO_MASK | FLEXCAN_FLT_DLC_FLT_DLC_HI_MASK);
 
+    tmp |= FLEXCAN_FLT_DLC_FLT_DLC_HI(u8DlcHigh);
 
+    tmp |= FLEXCAN_FLT_DLC_FLT_DLC_LO(u8DlcLow);
 
+    pBase->FLT_DLC = tmp;
 
+}
 
+
 
+/*!
 
+ * @brief Set PN Payload High Filter 1.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @param   pPayload  message Payload filter
 
+ */
 
+static inline void FlexCAN_SetPNPayloadHighFilter1(FLEXCAN_Type * pBase, const uint8 * pPayload)
 
+{
 
+    pBase->PL1_HI = FLEXCAN_PL1_HI_Data_byte_4(pPayload[4]) |
 
+                   FLEXCAN_PL1_HI_Data_byte_5(pPayload[5]) |
 
+                   FLEXCAN_PL1_HI_Data_byte_6(pPayload[6]) |
 
+                   FLEXCAN_PL1_HI_Data_byte_7(pPayload[7]);
 
+}
 
+
 
+/*!
 
+ * @brief Set PN Payload Low Filter 1.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @param   pPayload  message Payload filter
 
+ */
 
+static inline void FlexCAN_SetPNPayloadLowFilter1(FLEXCAN_Type * pBase, const uint8 * pPayload)
 
+{
 
+    pBase->PL1_LO = FLEXCAN_PL1_LO_Data_byte_0(pPayload[0]) |
 
+                   FLEXCAN_PL1_LO_Data_byte_1(pPayload[1]) |
 
+                   FLEXCAN_PL1_LO_Data_byte_2(pPayload[2]) |
 
+                   FLEXCAN_PL1_LO_Data_byte_3(pPayload[3]);
 
+}
 
+
 
+/*!
 
+ * @brief Set PN Payload High Filter 2.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @param   pPayload  message Payload filter
 
+ */
 
+static inline void FlexCAN_SetPNPayloadHighFilter2(FLEXCAN_Type * pBase, const uint8 * pPayload)
 
+{
 
+    pBase->PL2_PLMASK_HI = FLEXCAN_PL2_PLMASK_HI_Data_byte_4(pPayload[4]) |
 
+                          FLEXCAN_PL2_PLMASK_HI_Data_byte_5(pPayload[5]) |
 
+                          FLEXCAN_PL2_PLMASK_HI_Data_byte_6(pPayload[6]) |
 
+                          FLEXCAN_PL2_PLMASK_HI_Data_byte_7(pPayload[7]);
 
+}
 
+
 
+/*!
 
+ * @brief Set PN Payload Low Filter 2.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @param   pPayload  message Payload filter
 
+ */
 
+static inline void FlexCAN_SetPNPayloadLowFilter2(FLEXCAN_Type * pBase, const uint8 * pPayload)
 
+{
 
+    pBase->PL2_PLMASK_LO = FLEXCAN_PL2_PLMASK_LO_Data_byte_0(pPayload[0]) |
 
+                          FLEXCAN_PL2_PLMASK_LO_Data_byte_1(pPayload[1]) |
 
+                          FLEXCAN_PL2_PLMASK_LO_Data_byte_2(pPayload[2]) |
 
+                          FLEXCAN_PL2_PLMASK_LO_Data_byte_3(pPayload[3]);
 
+}
 
+
 
+/*!
 
+ * @brief Configures the Pretended Networking mode.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @param   pnConfig  The pretended networking configuration
 
+ */
 
+void FlexCAN_ConfigPN(FLEXCAN_Type * pBase, const Flexcan_Ip_PnConfigType * pPnConfig);
 
+
 
+/*!
 
+ * @brief Enables/Disables the Pretended Networking mode.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @param   enable  Enable/Disable Pretending Networking
 
+ */
 
+static inline void FlexCAN_SetPN(FLEXCAN_Type * pBase, boolean enable)
 
+{
 
+    pBase->MCR = (pBase->MCR & ~FLEXCAN_MCR_PNET_EN_MASK) | FLEXCAN_MCR_PNET_EN(enable ? 1UL : 0UL);
 
+}
 
+
 
+/*!
 
+ * @brief Checks if the Pretended Networking mode is enabled/disabled.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @return  false if Pretended Networking mode is disabled;
 
+ *          true if Pretended Networking mode is enabled
 
+ */
 
+static inline boolean FlexCAN_IsPNEnabled(const FLEXCAN_Type * pBase)
 
+{
 
+    return ((pBase->MCR & FLEXCAN_MCR_PNET_EN_MASK) >> FLEXCAN_MCR_PNET_EN_SHIFT) != 0U;
 
+}
 
+
 
+/*!
 
+ * @brief Gets the Wake Up by Timeout Flag Bit.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @return  the Wake Up by Timeout Flag Bit
 
+ */
 
+static inline uint8 FlexCAN_GetWTOF(const FLEXCAN_Type * pBase)
 
+{
 
+    return (uint8)((pBase->WU_MTC & FLEXCAN_WU_MTC_WTOF_MASK) >> FLEXCAN_WU_MTC_WTOF_SHIFT);
 
+}
 
+
 
+/*!
 
+ * @brief Gets the Wake Up Timeout interrupt enable Bit.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @return  the Wake Up Timeout interrupt enable Bit
 
+ */
 
+static inline uint8 FlexCAN_GetWTOIE(const FLEXCAN_Type * pBase)
 
+{
 
+    return (uint8)((pBase->CTRL1_PN & FLEXCAN_CTRL1_PN_WTOF_MSK_MASK) >> FLEXCAN_CTRL1_PN_WTOF_MSK_SHIFT);
 
+}
 
+
 
+/*!
 
+ * @brief Clears the Wake Up by Timeout Flag Bit.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ */
 
+static inline void FlexCAN_ClearWTOF(FLEXCAN_Type * pBase)
 
+{
 
+    pBase->WU_MTC = FLEXCAN_WU_MTC_WTOF_MASK;
 
+}
 
+
 
+/*!
 
+ * @brief Gets the Wake Up by Match Flag Bit.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @return  the Wake Up by Match Flag Bit
 
+ */
 
+static inline uint8 FlexCAN_GetWUMF(const FLEXCAN_Type * pBase)
 
+{
 
+    return (uint8)((pBase->WU_MTC & FLEXCAN_WU_MTC_WUMF_MASK) >> FLEXCAN_WU_MTC_WUMF_SHIFT);
 
+}
 
+
 
+/*!
 
+ * @brief Gets the Wake Up Match IE Bit.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ * @return  the Wake Up Match IE Bit
 
+ */
 
+static inline uint8 FlexCAN_GetWUMIE(const FLEXCAN_Type * pBase)
 
+{
 
+    return (uint8)((pBase->CTRL1_PN & FLEXCAN_CTRL1_PN_WUMF_MSK_MASK) >> FLEXCAN_CTRL1_PN_WUMF_MSK_SHIFT);
 
+}
 
+
 
+/*!
 
+ * @brief Clears the Wake Up by Match Flag Bit.
 
+ *
 
+ * @param   pBase  The FlexCAN Base address
 
+ */
 
+static inline void FlexCAN_ClearWUMF(FLEXCAN_Type * pBase)
 
+{
 
+    pBase->WU_MTC = FLEXCAN_WU_MTC_WUMF_MASK;
 
+}
 
+
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING */
 
+
 
+#define CAN_STOP_SEC_CODE
 
+#include "Can_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* FLEXCAN_FLEXCAN_IP_HWACCESS_H_ */

+ 112 - 0
RTD/include/FlexCAN_Ip_Irq.h
Vedi File 

@@ -0,0 +1,112 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+/**
 
+* @file FlexCAN_Ip_Irq.h
 
+*
 
+* @brief Interrupt Handlers for FlexCAN
 
+* @details Contains the Interrupt Handlers Header file
 
+*
 
+* @addtogroup FlexCAN
 
+* @{
 
+*/
 
+#ifndef FLEXCAN_IP_IRQ_H
 
+#define FLEXCAN_IP_IRQ_H
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "FlexCAN_Ip.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXCAN_IP_IRQ_VENDOR_ID_H                      43
 
+#define FLEXCAN_IP_IRQ_AR_RELEASE_MAJOR_VERSION_H       4
 
+#define FLEXCAN_IP_IRQ_AR_RELEASE_MINOR_VERSION_H       4
 
+#define FLEXCAN_IP_IRQ_AR_RELEASE_REVISION_VERSION_H    0
 
+#define FLEXCAN_IP_IRQ_SW_MAJOR_VERSION_H               1
 
+#define FLEXCAN_IP_IRQ_SW_MINOR_VERSION_H               0
 
+#define FLEXCAN_IP_IRQ_SW_PATCH_VERSION_H               0
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and FlexCAN_Ip_Irq header file are of the same vendor */
 
+#if (FLEXCAN_IP_IRQ_VENDOR_ID_H != FLEXCAN_IP_VENDOR_ID_H)
 
+    #error "FlexCAN_Ip_Irq.h and FlexCAN_Ip.h have different vendor ids"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_Irq header file are of the same Autosar version */
 
+#if ((FLEXCAN_IP_IRQ_AR_RELEASE_MAJOR_VERSION_H    != FLEXCAN_IP_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_IRQ_AR_RELEASE_MINOR_VERSION_H    != FLEXCAN_IP_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_IRQ_AR_RELEASE_REVISION_VERSION_H != FLEXCAN_IP_AR_RELEASE_REVISION_VERSION_H))
 
+    #error "AutoSar Version Numbers of FlexCAN_Ip_Irq.h and FlexCAN_Ip.h are different"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_Irq header file are of the same Software version */
 
+#if ((FLEXCAN_IP_IRQ_SW_MAJOR_VERSION_H != FLEXCAN_IP_SW_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_IRQ_SW_MINOR_VERSION_H != FLEXCAN_IP_SW_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_IRQ_SW_PATCH_VERSION_H != FLEXCAN_IP_SW_PATCH_VERSION_H))
 
+    #error "Software Version Numbers of FlexCAN_Ip_Irq.h and FlexCAN_Ip.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define CAN_START_SEC_CODE
 
+#include "Can_MemMap.h"
 
+
 
+void FlexCAN_IRQHandler
 
+(
 
+    uint8 instance,
 
+    uint32 startMbIdx,
 
+    uint32 endMbIdx
 
+    #if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+    ,boolean bEnhancedFifoExisted
 
+    #endif
 
+);
 
+
 
+#if (FLEXCAN_IP_FEATURE_BUSOFF_ERROR_INTERRUPT_UNIFIED == STD_ON)
 
+void FlexCAN_Busoff_Error_IRQHandler(uint8 instance);
 
+#else
 
+void FlexCAN_BusOff_IRQHandler(uint8 instance);
 
+
 
+void FlexCAN_Error_IRQHandler(uint8 instance);
 
+#endif
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON)
 
+void FlexCAN_WakeUp_IRQHandler(uint8 u8Instance);
 
+#endif
 
+
 
+#define CAN_STOP_SEC_CODE
 
+#include "Can_MemMap.h"
 
+#endif /* FLEXCAN_IP_IRQ_H*/
 
+/** @} */

+ 616 - 0
RTD/include/FlexCAN_Ip_Types.h
Vedi File 

@@ -0,0 +1,616 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef FLEXCAN_IP_TYPES_H_
 
+#define FLEXCAN_IP_TYPES_H_
 
+
 
+/**
 
+* @file FlexCAN_Ip_Types.h
 
+*
 
+* @brief FlexCAN Ip Types Header File
 
+* @details This Files Contains the FlexCAN Ip data types used external by FlexCAN Ip Driver
 
+*
 
+* @addtogroup FlexCAN
 
+* @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "FlexCAN_Ip_Cfg.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXCAN_IP_TYPES_VENDOR_ID_H                      43
 
+#define FLEXCAN_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H       4
 
+#define FLEXCAN_IP_TYPES_AR_RELEASE_MINOR_VERSION_H       4
 
+#define FLEXCAN_IP_TYPES_AR_RELEASE_REVISION_VERSION_H    0
 
+#define FLEXCAN_IP_TYPES_SW_MAJOR_VERSION_H               1
 
+#define FLEXCAN_IP_TYPES_SW_MINOR_VERSION_H               0
 
+#define FLEXCAN_IP_TYPES_SW_PATCH_VERSION_H               0
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and FlexCAN_Ip_Cfg header file are of the same vendor */
 
+#if (FLEXCAN_IP_TYPES_VENDOR_ID_H != FLEXCAN_IP_CFG_VENDOR_ID_H)
 
+    #error "FlexCAN_Ip_Types.h and FlexCAN_Ip_Cfg.h have different vendor ids"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_Cfg header file are of the same Autosar version */
 
+#if ((FLEXCAN_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H    != FLEXCAN_IP_CFG_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_TYPES_AR_RELEASE_MINOR_VERSION_H    != FLEXCAN_IP_CFG_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_TYPES_AR_RELEASE_REVISION_VERSION_H != FLEXCAN_IP_CFG_AR_RELEASE_REVISION_VERSION_H))
 
+    #error "AutoSar Version Numbers of FlexCAN_Ip_Types.h and FlexCAN_Ip_Cfg.h are different"
 
+#endif
 
+/* Check if current file and FlexCAN_Ip_Cfg header file are of the same Software version */
 
+#if ((FLEXCAN_IP_TYPES_SW_MAJOR_VERSION_H != FLEXCAN_IP_CFG_SW_MAJOR_VERSION_H) || \
 
+     (FLEXCAN_IP_TYPES_SW_MINOR_VERSION_H != FLEXCAN_IP_CFG_SW_MINOR_VERSION_H) || \
 
+     (FLEXCAN_IP_TYPES_SW_PATCH_VERSION_H != FLEXCAN_IP_CFG_SW_PATCH_VERSION_H))
 
+    #error "Software Version Numbers of FlexCAN_Ip_Types.h and FlexCAN_Ip_Cfg.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+/**@brief Remote Request Store enable */
 
+#define FLEXCAN_IP_REM_STORE_U32                   ((uint32)0x00000001U)
 
+/**@brief Three samples to determine the value of received bit */
 
+#define FLEXCAN_IP_THREE_SAMPLES_U32               ((uint32)0x00000002U)
 
+/**@brief Define how controller recover from bus off state */
 
+#define FLEXCAN_IP_BUSOFF_RECOVERY_U32             ((uint32)0x00000004U)
 
+/**@brief Protocol Exception */
 
+#define FLEXCAN_IP_PROTOCOL_EXCEPTION_U32          ((uint32)0x00000008U)
 
+/**@brief Edge Filter */
 
+#define FLEXCAN_IP_EDGE_FILTER_U32                 ((uint32)0x00000010U)
 
+/**@brief CAN FD protocol according to ISO specification (ISO 11898-1) */
 
+#define FLEXCAN_IP_ISO_U32                      ((uint32)0x00000020U)
 
+/**@brief Entire Frame Arbitration Field Comparison */
 
+#define FLEXCAN_IP_EACEN_U32                       ((uint32)0x00000040U)
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+====================================================================================================*/
 
+
 
+/*! @brief The type of the RxFIFO transfer (interrupts/DMA).
 
+ */
 
+/* implements Flexcan_Ip_RxFifoTransferType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_RXFIFO_USING_INTERRUPTS,    /**< Use interrupts for RxFIFO. */
 
+    FLEXCAN_RXFIFO_USING_POLLING,       /**< Use polling method for RxFIFO */
 
+#if (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON)
 
+    FLEXCAN_RXFIFO_USING_DMA            /**< Use DMA for RxFIFO. */
 
+#endif
 
+} Flexcan_Ip_RxFifoTransferType;
 
+
 
+/*! @brief FlexCAN Rx FIFO filters number
 
+ */
 
+/* implements  Flexcan_Ip_RxFifoIdFilterNumType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_8   = 0x0,         /**<  8 Rx FIFO Filters. @internal gui name="8 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_16  = 0x1,         /**<  16 Rx FIFO Filters. @internal gui name="16 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_24  = 0x2,         /**<  24 Rx FIFO Filters. @internal gui name="24 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_32  = 0x3,         /**<  32 Rx FIFO Filters. @internal gui name="32 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_40  = 0x4,         /**<  40 Rx FIFO Filters. @internal gui name="40 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_48  = 0x5,         /**<  48 Rx FIFO Filters. @internal gui name="48 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_56  = 0x6,         /**<  56 Rx FIFO Filters. @internal gui name="56 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_64  = 0x7,         /**<  64 Rx FIFO Filters. @internal gui name="64 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_72  = 0x8,         /**<  72 Rx FIFO Filters. @internal gui name="72 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_80  = 0x9,         /**<  80 Rx FIFO Filters. @internal gui name="80 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_88  = 0xA,         /**<  88 Rx FIFO Filters. @internal gui name="88 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_96  = 0xB,         /**<  96 Rx FIFO Filters. @internal gui name="96 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_104 = 0xC,         /**< 104 Rx FIFO Filters. @internal gui name="104 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_112 = 0xD,         /**< 112 Rx FIFO Filters. @internal gui name="112 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_120 = 0xE,         /**< 120 Rx FIFO Filters. @internal gui name="120 Rx FIFO Filters" */
 
+    FLEXCAN_RX_FIFO_ID_FILTERS_128 = 0xF          /**< 128 Rx FIFO Filters. @internal gui name="128 Rx FIFO Filters" */
 
+} Flexcan_Ip_RxFifoIdFilterNumType;
 
+
 
+/*! @brief FlexCAN Rx mask type.
 
+ */
 
+/* implements  Flexcan_Ip_RxMaskType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_RX_MASK_GLOBAL,      /**< Rx global mask */
 
+    FLEXCAN_RX_MASK_INDIVIDUAL   /**< Rx individual mask */
 
+} Flexcan_Ip_RxMaskType;
 
+
 
+
 
+/*! @brief FlexCAN payload sizes
 
+ */
 
+/* implements Flexcan_Ip_FdPayloadSizeType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_PAYLOAD_SIZE_8 = 0,  /**< FlexCAN message buffer payload size in bytes*/
 
+    FLEXCAN_PAYLOAD_SIZE_16 ,    /**< FlexCAN message buffer payload size in bytes*/
 
+    FLEXCAN_PAYLOAD_SIZE_32 ,    /**< FlexCAN message buffer payload size in bytes*/
 
+    FLEXCAN_PAYLOAD_SIZE_64      /**< FlexCAN message buffer payload size in bytes*/
 
+} Flexcan_Ip_FdPayloadSizeType;
 
+
 
+
 
+/*! @brief FlexCAN operation modes
 
+ */
 
+/*  implements  Flexcan_Ip_ModesType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_NORMAL_MODE,        /**< Normal mode or user mode @internal gui name="Normal" */
 
+    FLEXCAN_LISTEN_ONLY_MODE,   /**< Listen-only mode @internal gui name="Listen-only" */
 
+    FLEXCAN_LOOPBACK_MODE       /**< Loop-back mode @internal gui name="Loop back" */
 
+} Flexcan_Ip_ModesType;
 
+
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_TS_ENABLE == STD_ON)
 
+
 
+typedef enum
 
+{
 
+    FLEXCAN_CAN_CLK_TIMESTAMP_SRC,           /**< Captured time base is CAN bit clock. */
 
+    FLEXCAN_ONCHIP_CLK_TIMESTAMP_SRC,        /**< Captured time base is on-chip timer clock. */
 
+} Flexcan_Ip_TimeStampClockConfigType;
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_HR_TIMER == STD_ON)
 
+typedef enum
 
+{
 
+    FLEXCAN_MSGBUFFTIMESTAMP_TIMER,       /**< Message buffer time stamp base is TIMER. */
 
+    FLEXCAN_MSGBUFFTIMESTAMP_LOWER,       /**< Message buffer time stamp base is lower 16 bits of high resolution timer. */
 
+    FLEXCAN_MSGBUFFTIMESTAMP_UPPER        /**< Message buffer time stamp base is upper 16 bits of high resolution timer. */
 
+}Flexcan_Ip_MsgBuffTimeStampType;
 
+
 
+typedef enum
 
+{
 
+    FLEXCAN_TIMESTAMPCAPTURE_DISABLE, /**< The high resolution time stamp capture is disabled. */
 
+    FLEXCAN_TIMESTAMPCAPTURE_END,     /**< The high resolution time stamp is captured in the end of the CAN frame */
 
+    FLEXCAN_TIMESTAMPCAPTURE_START,   /**< The high resolution time stamp is captured in the start of the CAN frame */
 
+    FLEXCAN_TIMESTAMPCAPTURE_FD       /**< The high resolution time stamp is captured in the start of frame for classical CAN frames and
 
+                                          in res bit for CAN FD frames. */
 
+}Flexcan_Ip_TimeStampCaptureType;
 
+
 
+typedef enum
 
+{
 
+    FLEXCAN_HRTIMERSRC_MAC = FLEXCAN_HRTIMERSRC_MAC_VALUE             /**< Lower 32 bits of the GMAC */
 
+#if (FLEXCAN_IP_HR_TIMESTAMP_SEL_NUM > 1U)
 
+    ,FLEXCAN_HRTIMERSRC_STM  = FLEXCAN_HRTIMERSRC_STM_VALUE           /**< 32-bit STM timer */
 
+#endif /* (FLEXCAN_IP_HR_TIMESTAMP_SEL_NUM > 1U) */
 
+#if (FLEXCAN_IP_HR_TIMESTAMP_SEL_NUM > 2U)
 
+    ,FLEXCAN_HRTIMERSRC_PFE = FLEXCAN_HRTIMERSRC_PFE_VALUE            /**< Lower 32 bits of the PFE GMAC */
 
+#endif /* (FLEXCAN_IP_HR_TIMESTAMP_SEL_NUM > 1U) */
 
+#if (FLEXCAN_IP_HR_TIMESTAMP_SEL_NUM > 3U)
 
+    ,FLEXCAN_HRTIMERSRC_VALUE0 = FLEXCAN_HRTIMERSRC_VALUE0_VALUE      /**< Timestamp value is 0000_0000h */
 
+#endif /* (FLEXCAN_IP_HR_TIMESTAMP_SEL_NUM > 1U) */
 
+}Flexcan_Ip_TimeStampHrSrcType;
 
+
 
+#endif /* #if (FLEXCAN_IP_FEATURE_HAS_HR_TIMER == STD_ON) */
 
+
 
+/*! @brief FlexCAN Free Running Counter Time Stamp config. */
 
+/* implements  Flexcan_Ip_TimeStampConfigType_structure */
 
+typedef struct
 
+{
 
+    Flexcan_Ip_TimeStampClockConfigType timeStampSurce;     /**< Timestamp Timer Source selection */
 
+#if (FLEXCAN_IP_FEATURE_HAS_HR_TIMER == STD_ON)
 
+    Flexcan_Ip_MsgBuffTimeStampType msgBuffTimeStampType;   /**< This field selects which time base is used for capturing the 16-bit
 
+                                                                TIME_STAMP field of the message buffer */
 
+    Flexcan_Ip_TimeStampCaptureType hrConfigType;           /**< This field configures the point in time when a 32-bit time base is captured during a
 
+                                                                CAN frame and stored in the high resolution time stamp */
 
+    Flexcan_Ip_TimeStampHrSrcType hrSrc;                    /**< This field configures the HR Timestamp timer source */
 
+#endif /* #if (FLEXCAN_IP_FEATURE_HAS_HR_TIMER == STD_ON) */
 
+} Flexcan_Ip_TimeStampConfigType;
 
+#endif /* if FLEXCAN_IP_FEATURE_HAS_TS_ENABLE */
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+/*! @brief FlexCAN Enhanced Rx FIFO filter type */
 
+/* implements  Flexcan_Ip_EnhancedFilterType_structure */
 
+typedef enum
 
+{
 
+    FLEXCAN_IP_ENHANCED_RX_FIFO_ONE_ID_FILTER,         /*!< Filter element with filter + mask scheme*/
 
+    FLEXCAN_ENHANCED_RX_FIFO_RANGE_ID_FILTER,       /*!< Filter element with range scheme*/
 
+    FLEXCAN_IP_ENHANCED_RX_FIFO_TWO_ID_FILTER          /*!< Filter element with 2-filter scheme*/
 
+} Flexcan_Ip_EnhancedFilterType;
 
+
 
+/*! @brief FlexCAN Enhanced Rx FIFO ID filter table structure */
 
+/* implements  Flexcan_Ip_EnhancedIdTableType_structure */
 
+typedef struct
 
+{
 
+    Flexcan_Ip_EnhancedFilterType filterType;       /*!< Enhanced Rx FIFO filter type*/
 
+    boolean isExtendedFrame;                           /*!< Extended frame*/
 
+    boolean rtr2;                                      /*!< Enhanced Rx FIFO RTR2 */
 
+    boolean rtr1;                                      /*!< Enhanced Rx FIFO RTR1 */
 
+    uint32 id2;                                     /*!< Enhanced Rx FIFO ID2 filter element*/
 
+    uint32 id1;                                     /*!< Enhanced Rx FIFO ID1 filter element*/
 
+} Flexcan_Ip_EnhancedIdTableType;
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO */
 
+
 
+/*! @brief The state of a given MB (idle/Rx busy/Tx busy). */
 
+/* implements  Flexcan_Ip_MbStateType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_MB_IDLE,      /**< The MB is not used by any transfer. */
 
+    FLEXCAN_MB_RX_BUSY,   /**< The MB is used for a reception. */
 
+    FLEXCAN_MB_TX_BUSY,   /**< The MB is used for a transmission. */
 
+#if (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON)
 
+    FLEXCAN_MB_DMA_ERROR /**< The MB is used as DMA source and fail to transfer */
 
+#endif
 
+} Flexcan_Ip_MbStateType;
 
+
 
+/*! @brief The type of the event which occurred when the callback was invoked.
 
+ */
 
+/* implements Flexcan_Ip_EventType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_EVENT_RX_COMPLETE = 0U,     /**< A frame was received in the configured Rx MB. */
 
+    FLEXCAN_EVENT_RXFIFO_COMPLETE, /**< A frame was received in the Rx FIFO. */
 
+    FLEXCAN_EVENT_RXFIFO_WARNING,  /**< Rx FIFO is almost full (5 frames). */
 
+    FLEXCAN_EVENT_RXFIFO_OVERFLOW, /**< Rx FIFO is full (incoming message was lost). */
 
+    FLEXCAN_EVENT_TX_COMPLETE,     /**< A frame was sent from the configured Tx MB. */
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+    FLEXCAN_EVENT_ENHANCED_RXFIFO_COMPLETE,     /**< A frame was received in the Enhanced Rx FIFO. */
 
+    FLEXCAN_EVENT_ENHANCED_RXFIFO_WATERMARK,    /**< The number of messages available is greater */
 
+                                                /**< than the watermark defined. */
 
+    FLEXCAN_EVENT_ENHANCED_RXFIFO_OVERFLOW,     /**< Enhanced Rx FIFO is full (incoming message was lost). */
 
+    FLEXCAN_EVENT_ENHANCED_RXFIFO_UNDERFLOW,    /**< An underflow condition occurred in the enhanced Rx FIFO. */
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO */
 
+#if (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON)
 
+    FLEXCAN_EVENT_WAKEUP_TIMEOUT,  /**< An wake up event occurred due to timeout. */
 
+    FLEXCAN_EVENT_WAKEUP_MATCH,    /**< An wake up event occurred due to matching. */
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON) */
 
+#if FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE
 
+    FLEXCAN_EVENT_DMA_COMPLETE = 11U,   /**< A complete transfer occurred on DMA */
 
+    FLEXCAN_EVENT_DMA_ERROR = 12U,      /**< A DMA transfer fail, because of a DMA channel error */
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE */
 
+    FLEXCAN_EVENT_ERROR,         /**<  Errors detected in CAN frames of any format (interrupt mode only) */
 
+#if (FLEXCAN_IP_FEATURE_HAS_FD == STD_ON)
 
+    FLEXCAN_EVENT_ERROR_FAST,   /**< Errors detected in the data phase of CAN FD frames with the BRS bit set only (interrupt mode only) */
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_FD */
 
+    FLEXCAN_EVENT_BUSOFF,       /**< FlexCAN module entered Bus Off state */
 
+    FLEXCAN_EVENT_RX_WARNING,     /*!< The Rx error counter transitioned from less than 96 to greater than or equal to 96 (interrupt mode only) */
 
+    FLEXCAN_EVENT_TX_WARNING     /*!< The Tx error counter transitioned from less than 96 to greater than or equal to 96 (interrupt mode only) */
 
+} Flexcan_Ip_EventType;
 
+
 
+/** @brief FlexCAN error interrupt types
 
+ */
 
+/* implements  Flexcan_Ip_ErrorIntType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_IP_INT_RX_WARNING,     /*!< RX warning interrupt*/
 
+    FLEXCAN_IP_INT_TX_WARNING,     /*!< TX warning interrupt*/
 
+    FLEXCAN_IP_INT_ERR,            /*!< Error interrupt*/
 
+    FLEXCAN_IP_INT_ERR_FAST,       /*!< Error Fast interrupt*/
 
+    FLEXCAN_IP_INT_BUSOFF          /*!< Bus off interrupt*/
 
+} Flexcan_Ip_ErrorIntType;
 
+
 
+/** @brief FlexCAN Message Buffer ID type
 
+ *  @details FlexCAN Id Type, Standard or Extended
 
+ */
 
+/* implements Flexcan_Ip_MsgBuffIdType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_MSG_ID_STD = 0,     /**< Standard ID*/
 
+    FLEXCAN_MSG_ID_EXT          /**< Extended ID*/
 
+} Flexcan_Ip_MsgBuffIdType;
 
+
 
+/** @brief ID formats for Rx FIFO
 
+ *  @details Legacy RxFIFO Id Format Types
 
+ */
 
+/*  implements Flexcan_Ip_RxFifoIdElementFormatType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_RX_FIFO_ID_FORMAT_A, /**< One full ID (standard and extended) per ID Filter Table element.*/
 
+    FLEXCAN_RX_FIFO_ID_FORMAT_B, /**< Two full standard IDs or two partial 14-bit (standard and
 
+                                      extended) IDs per ID Filter Table element.*/
 
+    FLEXCAN_RX_FIFO_ID_FORMAT_C, /**< Four partial 8-bit Standard IDs per ID Filter Table element.*/
 
+    FLEXCAN_RX_FIFO_ID_FORMAT_D  /**< All frames rejected.*/
 
+} Flexcan_Ip_RxFifoIdElementFormatType;
 
+
 
+/** @brief The status used and reported by FlexCAN Ip driver.
 
+ *  @details The FlexCAN specific error codes
 
+ */
 
+/* implements  Flexcan_Ip_StatusType_enum */
 
+typedef enum
 
+{
 
+    FLEXCAN_STATUS_SUCCESS  = E_OK,          /**< Successfull Operation Completed */
 
+    FLEXCAN_STATUS_ERROR = E_NOT_OK,         /**< Error Operation Completed */
 
+    FLEXCAN_STATUS_BUSY,                     /**< Busy Operation Completed */
 
+    FLEXCAN_STATUS_TIMEOUT,                  /**< TimeOut Operation Completed */
 
+    FLEXCAN_STATUS_BUFF_OUT_OF_RANGE,        /**< The specified MB index is out of the configurable range */
 
+    FLEXCAN_STATUS_NO_TRANSFER_IN_PROGRESS,  /**< There is no transmission or reception in progress */
 
+} Flexcan_Ip_StatusType;
 
+
 
+/*==================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+/*! @brief FlexCAN bitrate related structures
 
+ */
 
+/* implements  Flexcan_Ip_TimeSegmentType_structure */
 
+typedef struct
 
+{
 
+    uint32 propSeg;         /**< Propagation segment*/
 
+    uint32 phaseSeg1;       /**< Phase segment 1*/
 
+    uint32 phaseSeg2;       /**< Phase segment 2*/
 
+    uint32 preDivider;      /**< Clock prescaler division factor*/
 
+    uint32 rJumpwidth;      /**< Resync jump width*/
 
+} Flexcan_Ip_TimeSegmentType;
 
+
 
+/*! @brief FlexCAN Blocks payload sizes structure
 
+ */
 
+/*  implements  Flexcan_Ip_PayloadSizeType_structure */
 
+typedef struct
 
+{   /** Payload for  Ram Block 0*/
 
+    Flexcan_Ip_FdPayloadSizeType payloadBlock0;
 
+#if (FLEXCAN_IP_FEATURE_MBDSR_COUNT > 1)
 
+    /** Payload for Ram Block 1 */
 
+    Flexcan_Ip_FdPayloadSizeType payloadBlock1;
 
+#endif
 
+#if (FLEXCAN_IP_FEATURE_MBDSR_COUNT > 2)
 
+    /** Payload for Ram Block 2 */
 
+    Flexcan_Ip_FdPayloadSizeType payloadBlock2;
 
+#endif
 
+#if (FLEXCAN_IP_FEATURE_MBDSR_COUNT > 3)
 
+    /** Payload for Ram Block 3 */
 
+    Flexcan_Ip_FdPayloadSizeType payloadBlock3;
 
+#endif
 
+} Flexcan_Ip_PayloadSizeType;
 
+
 
+/*! @brief FlexCAN message buffer structure
 
+ */
 
+/*  implements  Flexcan_Ip_MsgBuffType_structure */
 
+typedef struct
 
+{
 
+    uint32 cs;                        /**< Code and Status*/
 
+    uint32 msgId;                     /**< Message Buffer ID*/
 
+    uint8 data[64];                   /**< Data bytes of the FlexCAN message*/
 
+    uint8 dataLen;                    /**< Length of data in bytes */
 
+    uint8 id_hit;                     /**< Identifier Acceptance Filter Hit Indicator*/
 
+    uint32 time_stamp;                /**< Free-Running Counter Time Stamp*/
 
+} Flexcan_Ip_MsgBuffType;
 
+
 
+/*! @brief Information needed for internal handling of a given MB. */
 
+/* implements  Flexcan_Ip_MBhandleType_structure */
 
+typedef struct
 
+{
 
+    Flexcan_Ip_MsgBuffType * pMBmessage;    /**< The FlexCAN MB structure */
 
+    volatile Flexcan_Ip_MbStateType state;  /**< The state of the current MB (idle/Rx busy/Tx busy) */
 
+#if FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE
 
+    volatile boolean isDmaBusy;             /**< The state of the current DMA (idle/busy) */
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE */
 
+    boolean isPolling;                      /**< True if the transfer is Polling Mode  */
 
+    boolean isRemote;                       /**< True if the frame is a remote frame */
 
+    uint32  time_stamp;                     /**< TimeStamp of the Message */
 
+} Flexcan_Ip_MBhandleType;
 
+
 
+/*!
 
+ * @brief Internal driver state information.
 
+ *
 
+ * @note The contents of this structure are internal to the driver and should not be
 
+ *      modified by users. Also, contents of the structure are subject to change in
 
+ *      future releases.
 
+ */
 
+/* implements   Flexcan_Ip_StateType_structure */
 
+typedef struct FlexCANState
 
+{
 
+    Flexcan_Ip_MBhandleType mbs[FLEXCAN_IP_FEATURE_MAX_MB_NUM];       /**< Array containing information
 
+                                                                    related to each MB */
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+    Flexcan_Ip_MBhandleType enhancedFifoOutput;                /**< Containing information output
 
+                                                                    of Enhanced Rx FIFO */
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO */
 
+    void (*callback)(uint8 instance,
 
+                     Flexcan_Ip_EventType eventType,
 
+                     uint32 buffIdx,
 
+                     const struct FlexCANState *driverState
 
+                    );        /**< IRQ handler callback function. */
 
+    void *callbackParam;                                       /**< Parameter used to pass user data
 
+                                                                    when invoking the callback
 
+                                                                    function. */
 
+    void (*error_callback)(uint8 instance,
 
+                           Flexcan_Ip_EventType eventType,
 
+                           uint32 u32ErrStatus,
 
+                           const struct FlexCANState *driverState
 
+                          );   /**< Error IRQ handler callback
 
+                                                                    function. */
 
+    void *errorCallbackParam;                                  /**< Parameter used to pass user data
 
+                                                                    when invoking the error callback
 
+                                                                    function. */
 
+#if (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON)
 
+    uint8 rxFifoDMAChannel;                                    /**< DMA channel number used for transfers. */
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+    uint32 u32NumOfMbTransferByDMA;                            /**< The number of message buffers transferred by DMA(major loop count). */
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON) */
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON) */
 
+    Flexcan_Ip_RxFifoTransferType transferType;                /**< Type of RxFIFO transfer. */
 
+    boolean bIsLegacyFifoEn;                                   /**< This controls whether the Rx FIFO feature is enabled or not. */
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+    boolean bIsEnhancedFifoEn;                                 /**< This controls whether the Rx Enhanced FIFO feature is enabled or not. */
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON) */
 
+    uint32 u32MaxMbNum;                                        /**< The maximum number of Message Buffers. */
 
+    boolean isIntActive;                                       /**< Save status of enabling/disabling interrupts in runtime. */
 
+} Flexcan_Ip_StateType;
 
+
 
+/*! @brief FlexCAN Driver callback function type
 
+ */
 
+/* implements FlexCAN_Ip_CallbackType_typdef */
 
+typedef void (* FlexCAN_Ip_CallbackType)(uint8 instance,
 
+                                         Flexcan_Ip_EventType eventType,
 
+                                         uint32 buffIdx,
 
+                                         const Flexcan_Ip_StateType * flexcanState
 
+                                        );
 
+
 
+/*! @brief FlexCAN Driver error callback function type
 
+ */
 
+/* implements  FlexCAN_Ip_ErrorCallbackType_typdef  */
 
+typedef void (* FlexCAN_Ip_ErrorCallbackType)(uint8 instance,
 
+                                              Flexcan_Ip_EventType eventType,
 
+                                              uint32 u32ErrStatus,
 
+                                              const Flexcan_Ip_StateType * flexcanState
 
+                                             );
 
+
 
+/*! @brief FlexCAN configuration
 
+ * @internal gui name="Common configuration" id="flexcanCfg"
 
+ */
 
+/* implements   Flexcan_Ip_ConfigType_structure */
 
+typedef struct
 
+{
 
+    uint32 max_num_mb;                              /**< The maximum number of Message Buffers
 
+                                                         @internal gui name="Maximum number of message buffers" id="max_num_mb" */
 
+    Flexcan_Ip_RxFifoIdFilterNumType num_id_filters; /**< The number of RX FIFO ID filters needed
 
+                                                         @internal gui name="Number of RX FIFO ID filters" id="num_id_filters" */
 
+    boolean is_rx_fifo_needed;                         /**< 1 if needed; 0 if not. This controls whether the Rx FIFO feature is enabled or not.
 
+                                                         @internal gui name="Use rx fifo" id="is_rx_fifo_needed" */
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+    uint32 num_enhanced_std_id_filters;             /**< The number of standard ID filter elements
 
+                                                         @internal gui name="Number of standard ID filter elements" id="num_enhanced_std_id_filters" */
 
+    uint32 num_enhanced_ext_id_filters;             /**< The number of extended ID filter elements
 
+                                                         @internal gui name="Number of extended ID filter elements" id="num_enhanced_ext_id_filters" */
 
+    uint32 num_enhanced_watermark;                  /**< The number of enhanced Rx FIFO watermark
 
+                                                         @internal gui name="Number of enhanced Rx FIFO watermark" id="num_enhanced_watermark" */
 
+    boolean is_enhanced_rx_fifo_needed;                /**< 1 if needed; 0 if not. This controls whether the Enhanced Rx FIFO feature is enabled or not.
 
+                                                         @internal gui name="Use enhanced rx fifo" id="is_enhanced rx_fifo_needed" */
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO */
 
+#if (FLEXCAN_IP_FEATURE_HAS_TS_ENABLE == STD_ON)
 
+    Flexcan_Ip_TimeStampConfigType time_stamp;        /**< Free Running Counter Time Stamp config
 
+                                                         @internal gui name="Free Running Counter Time Stamp config" id="time_stamp" */
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_TS_ENABLE */
 
+    Flexcan_Ip_ModesType flexcanMode;               /**< User configurable FlexCAN operation modes.
 
+                                                         @internal gui name="Flexcan Operation Mode" id="flexcanMode" */
 
+    uint32 ctrlOptions;                             /**< Use of different features support like ISO-FD, EDGE_FILTER, AUTO_BussOffRecovery, Protocol_Exception. */
 
+    Flexcan_Ip_PayloadSizeType payload;               /**< The payload size of the mailboxes specified in bytes for every partition block */
 
+    boolean fd_enable;                                 /**< Enable/Disable the Flexible Data Rate feature. */
 
+#if (FLEXCAN_IP_FEATURE_HAS_PE_CLKSRC_SELECT == STD_ON)
 
+    boolean is_pe_clock;                                /**< This controls the clock source of the CAN Protocol Engine (PE). 1 if The CAN engine clock source is the peripheral clock
 
+                                                            ; 0 if the CAN engine clock source is the oscillator clock.*/
 
+#endif
 
+    boolean enhCbtEnable;                               /**< The use of enhanced bit time segments format from ExCBT register, instead of CTRL1 or CBT register */
 
+    boolean bitRateSwitch;                              /**< Enable of BitRate Switch support for FD frames */
 
+    Flexcan_Ip_TimeSegmentType bitrate;                 /**< The bitrate used for standard frames or for the arbitration phase of FD frames. */
 
+    Flexcan_Ip_TimeSegmentType bitrate_cbt;             /**< The bitrate used for the data phase of FD frames. */
 
+    Flexcan_Ip_RxFifoTransferType transfer_type;   /**< Specifies if the Rx FIFO uses interrupts or DMA. */
 
+#if (FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE == STD_ON)
 
+    uint8 rxFifoDMAChannel;                         /**< Specifies the DMA channel number to be used for DMA transfers. */
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_DMA_ENABLE */
 
+    FlexCAN_Ip_CallbackType Callback;               /**< The Callback for Rx or Tx DMA Events */
 
+    FlexCAN_Ip_ErrorCallbackType ErrorCallback;     /**< The ErrorCallback for Error Events */
 
+} Flexcan_Ip_ConfigType;
 
+
 
+
 
+
 
+/** @brief FlexCAN Rx FIFO ID filter table structure
 
+ *  @details Structure Used to configure and add filters to Legacy RxFIFO
 
+ */
 
+/* implements  Flexcan_Ip_IdTableType_structure */
 
+typedef struct
 
+{
 
+    boolean isRemoteFrame;      /**< Remote frame*/
 
+    boolean isExtendedFrame;    /**< Extended frame*/
 
+    uint32 id;                  /**< Rx FIFO ID filter element*/
 
+} Flexcan_Ip_IdTableType;
 
+
 
+
 
+
 
+/** @brief FlexCAN data info from user
 
+ *  @details This structure defines the members used to configure the Frame Parameters used to be Send or Receive.
 
+ *           Some parameters are available based on configuration of driver like: fd_enable, fd_padding, enable_brs.
 
+ */
 
+/* implements  Flexcan_Ip_DataInfoType_structure */
 
+typedef struct
 
+{
 
+    Flexcan_Ip_MsgBuffIdType msg_id_type;  /**< Type of message ID (standard or extended)*/
 
+    uint32 data_length;                    /**< Length of Data in Bytes*/
 
+#if (FLEXCAN_IP_FEATURE_HAS_FD == STD_ON)
 
+    boolean fd_enable;                     /**< Enable or disable FD*/
 
+    uint8 fd_padding;                      /**< Set a value for padding. It will be used when the data length code (DLC)
 
+                                                 specifies a bigger payload size than data_length to fill the MB */
 
+    boolean enable_brs;                    /**< Enable bit rate switch inside a CAN FD format frame*/
 
+#endif
 
+    boolean is_remote;                     /**< Specifies if the frame is standard or remote */
 
+    boolean is_polling;                    /**< Specifies if the MB is in polling mode */
 
+} Flexcan_Ip_DataInfoType;
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON)
 
+/*! @brief Pretended Networking ID filter */
 
+typedef struct
 
+{
 
+    boolean bExtendedId;    /*!< Specifies if the ID is standard or extended. */
 
+    boolean bRemoteFrame;   /*!< Specifies if the frame is standard or remote. */
 
+    uint32 u32Id;           /*!< Specifies the ID value. */
 
+} Flexcan_Ip_PnIdFilterType;
 
+
 
+/*! @brief Pretended Networking payload filter */
 
+typedef struct
 
+{
 
+    uint8 u8DlcLow;       /*!< Specifies the lower limit of the payload size. */
 
+    uint8 u8DlcHigh;      /*!< Specifies the upper limit of the payload size. */
 
+    uint8 aPayload1[8U]; /*!< Specifies the payload to be matched (for MATCH_EXACT), the lower limit
 
+                              (for MATCH_GEQ and MATCH_RANGE) or the upper limit (for MATCH_LEQ). */
 
+    uint8 aPayload2[8U]; /*!< Specifies the mask (for MATCH_EXACT) or the upper limit (for MATCH_RANGE). */
 
+} Flexcan_Ip_PnPayloadFilterType;
 
+
 
+/*! @brief Pretended Networking filtering combinations */
 
+typedef enum
 
+{
 
+    FLEXCAN_FILTER_ID,                  /*!< Message ID filtering only */
 
+    FLEXCAN_FILTER_ID_PAYLOAD,          /*!< Message ID and payload filtering */
 
+    FLEXCAN_FILTER_ID_NTIMES,           /*!< Message ID filtering occurring a specified number of times */
 
+    FLEXCAN_FILTER_ID_PAYLOAD_NTIMES    /*!< Message ID and payload filtering  occurring a specified number of times */
 
+} Flexcan_Ip_PnfilterCombinationType;
 
+
 
+/*! @brief Pretended Networking matching schemes */
 
+typedef enum
 
+{
 
+    FLEXCAN_FILTER_MATCH_EXACT,   /*!< Match an exact target value. */
 
+    FLEXCAN_FILTER_MATCH_GEQ,     /*!< Match greater than or equal to a specified target value. */
 
+    FLEXCAN_FILTER_MATCH_LEQ,     /*!< Match less than or equal to a specified target value. */
 
+    FLEXCAN_FILTER_MATCH_RANGE    /*!< Match inside a range, greater than or equal to a specified lower limit and smaller than or
 
+                                      equal to a specified upper limit. */
 
+} Flexcan_Ip_PnFilterSelectionType;
 
+
 
+/*! @brief Pretended Networking configuration structure */
 
+/* implements  Flexcan_Ip_PnConfigType_structure */
 
+typedef struct
 
+{
 
+    boolean bWakeUpTimeout;                               /*!< Specifies if an wake up event is triggered on timeout. */
 
+    boolean bWakeUpMatch;                                 /*!< Specifies if an wake up event is triggered on match. */
 
+    uint16 u16NumMatches;                                 /*!< The number of matches needed before generating an wake up event. */
 
+    uint16 u16MatchTimeout;                               /*!< Defines a timeout value that generates an wake up event if wakeUpTimeout is true. */
 
+    Flexcan_Ip_PnfilterCombinationType eFilterComb;       /*!< Defines the filtering scheme used. */
 
+    Flexcan_Ip_PnIdFilterType idFilter1;                  /*!< The configuration of the first ID filter (match exact / lower limit / upper limit). */
 
+    Flexcan_Ip_PnIdFilterType idFilter2;                  /*!< The configuration of the second ID filter (mask / upper limit). */
 
+    Flexcan_Ip_PnFilterSelectionType eIdFilterType;       /*!< Defines the ID filtering scheme. */
 
+    Flexcan_Ip_PnFilterSelectionType ePayloadFilterType;  /*!< Defines the payload filtering scheme. */
 
+    Flexcan_Ip_PnPayloadFilterType payloadFilter;         /*!< The configuration of the payload filter. */
 
+} Flexcan_Ip_PnConfigType;
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON) */
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* FLEXCAN_IP_TYPES_H_ */

+ 395 - 0
RTD/include/FlexCAN_Ip_Wrapper.h
Vedi File 

@@ -0,0 +1,395 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXCAN
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef FLEXCAN_IP_WRAPPER_H_
 
+#define FLEXCAN_IP_WRAPPER_H_
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXCAN_IP_WRAPPER_VENDOR_ID_H                      43
 
+#define FLEXCAN_IP_WRAPPER_AR_RELEASE_MAJOR_VERSION_H       4
 
+#define FLEXCAN_IP_WRAPPER_AR_RELEASE_MINOR_VERSION_H       4
 
+#define FLEXCAN_IP_WRAPPER_AR_RELEASE_REVISION_VERSION_H    0
 
+#define FLEXCAN_IP_WRAPPER_SW_MAJOR_VERSION_H               1
 
+#define FLEXCAN_IP_WRAPPER_SW_MINOR_VERSION_H               0
 
+#define FLEXCAN_IP_WRAPPER_SW_PATCH_VERSION_H               0
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+
 
+
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+#if (FLEXCAN_IP_ENABLE_USER_MODE_SUPPORT == STD_ON)
 
+        #define Call_FlexCAN_Ip_Init(Flexcan_Ip_u8Instance, Flexcan_Ip_pState, Flexcan_Ip_pData) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return3param((uint32)FlexCAN_Ip_Init_Privileged, Flexcan_Ip_u8Instance, Flexcan_Ip_pState, Flexcan_Ip_pData))
 
+
 
+        #define Call_FlexCAN_Ip_ConfigRxFifo(instance, id_format, id_filter_table) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return3param((uint32)FlexCAN_Ip_ConfigRxFifo_Privileged, instance, id_format, id_filter_table))
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+        #define Call_FlexCAN_Ip_ConfigEnhancedRxFifo(instance, id_filter_table) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return2param((uint32)FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged, instance, id_filter_table))
 
+#endif
 
+
 
+        #define Call_FlexCAN_Ip_MainFunctionBusOff(instance) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return1param((uint32)FlexCAN_Ip_MainFunctionBusOff_Privileged, instance))
 
+
 
+        #define Call_FlexCAN_Ip_GetStopMode(instance) \
 
+                ((boolean)OsIf_Trusted_Call_Return1param((uint32)FlexCAN_Ip_GetStopMode_Privileged, instance))
 
+
 
+        #define Call_FlexCAN_Ip_GetStartMode(instance) \
 
+                ((boolean)OsIf_Trusted_Call_Return1param((uint32)FlexCAN_Ip_GetStartMode_Privileged, instance))
 
+
 
+        #define Call_FlexCAN_Ip_EnterFreezeMode(instance) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return1param((uint32)FlexCAN_Ip_EnterFreezeMode_Privileged, instance))
 
+
 
+        #define Call_FlexCAN_Ip_ExitFreezeMode(instance) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return1param((uint32)FlexCAN_Ip_ExitFreezeMode_Privileged, instance))
 
+
 
+        #define Call_FlexCAN_Ip_SetRxFifoGlobalMask(instance, mask) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return2param((uint32)FlexCAN_Ip_SetRxFifoGlobalMask_Privileged, instance, mask))
 
+
 
+        #define Call_FlexCAN_Ip_Deinit(instance) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return1param((uint32)FlexCAN_Ip_Deinit_Privileged, instance))
 
+
 
+        #define Call_FlexCAN_Ip_SetStartMode(instance) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return1param((uint32)FlexCAN_Ip_SetStartMode_Privileged, instance))
 
+
 
+        #define Call_FlexCAN_Ip_SetStopMode(instance) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return1param((uint32)FlexCAN_Ip_SetStopMode_Privileged, instance))
 
+
 
+        #define Call_FlexCAN_Ip_SetRxMaskType(instance, type) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return2param((uint32)FlexCAN_Ip_SetRxMaskType_Privileged, instance, type))
 
+
 
+        #define Call_FlexCAN_Ip_SetRxMb14Mask(instance, mask) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return2param((uint32)FlexCAN_Ip_SetRxMb14Mask_Privileged, instance, mask))
 
+
 
+        #define Call_FlexCAN_Ip_SetRxMb15Mask(instance, mask) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return2param((uint32)FlexCAN_Ip_SetRxMb15Mask_Privileged, instance, mask))
 
+
 
+        #define Call_FlexCAN_Ip_SetRxMbGlobalMask(instance, mask) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return2param((uint32)FlexCAN_Ip_SetRxMbGlobalMask_Privileged, instance, mask))
 
+
 
+        #define Call_FlexCAN_Ip_SetRxIndividualMask(instance, mb_idx, mask) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return3param((uint32)FlexCAN_Ip_SetRxIndividualMask_Privileged, instance, mb_idx, mask))
 
+
 
+        #define Call_FlexCAN_Ip_SetBitrateCbt(instance, bitrate, bitRateSwitch) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return3param((uint32)FlexCAN_Ip_SetBitrateCbt_Privileged, instance, bitrate, bitRateSwitch))
 
+
 
+        #define Call_FlexCAN_Ip_SetBitrate(instance, bitrate, enhExt) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return3param((uint32)FlexCAN_Ip_SetBitrate_Privileged, instance, bitrate, enhExt))
 
+
 
+        #define Call_FlexCAN_Ip_SetTxArbitrationStartDelay(instance, value) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return2param((uint32)FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged, instance, value))
 
+
 
+        #define Call_FlexCAN_Ip_SetTDCOffset(instance, enable, offset) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return3param((uint32)FlexCAN_Ip_SetTDCOffset_Privileged, instance, enable, offset))
 
+
 
+        #define Call_FlexCAN_Ip_EnableInterrupts(u8Instance) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return1param((uint32)FlexCAN_Ip_EnableInterrupts_Privileged, u8Instance))
 
+
 
+        #define Call_FlexCAN_Ip_DisableInterrupts(u8Instance) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return1param((uint32)FlexCAN_Ip_DisableInterrupts_Privileged, u8Instance))
 
+
 
+        #define Call_FlexCAN_Ip_SetErrorInt(u8Instance, type, enable) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return3param((uint32)FlexCAN_Ip_SetErrorInt_Privileged, u8Instance, type, enable))
 
+
 
+        #define Call_FlexCAN_Ip_SetListenOnlyMode(instance, value) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return2param((uint32)FlexCAN_Ip_SetListenOnlyMode_Privileged, instance, value))
 
+#if (FLEXCAN_IP_FEATURE_HAS_TS_ENABLE == STD_ON)
 
+        #define Call_FlexCAN_Ip_ConfigTimeStamp(instance, time_stamp) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return2param((uint32)FlexCAN_Ip_ConfigTimeStamp_Privileged, instance, time_stamp))
 
+#endif
 
+#if (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON)
 
+        #define Call_FlexCAN_Ip_ConfigPN(u8Instance, bEnable, pPnConfig) \
 
+                ((Flexcan_Ip_StatusType)OsIf_Trusted_Call_Return3param((uint32)FlexCAN_Ip_ConfigPN_Privileged, u8Instance, bEnable, pPnConfig))
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON) */
 
+#else
 
+        #define Call_FlexCAN_Ip_Init(Flexcan_Ip_u8Instance, Flexcan_Ip_pState, Flexcan_Ip_pData) \
 
+                FlexCAN_Ip_Init_Privileged(Flexcan_Ip_u8Instance, Flexcan_Ip_pState, Flexcan_Ip_pData)
 
+
 
+        #define Call_FlexCAN_Ip_ConfigRxFifo(instance, id_format, id_filter_table) \
 
+                FlexCAN_Ip_ConfigRxFifo_Privileged(instance, id_format, id_filter_table)
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+        #define Call_FlexCAN_Ip_ConfigEnhancedRxFifo(instance, id_filter_table) \
 
+                FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged(instance, id_filter_table)
 
+#endif
 
+
 
+        #define Call_FlexCAN_Ip_MainFunctionBusOff(instance) \
 
+                FlexCAN_Ip_MainFunctionBusOff_Privileged(instance)
 
+
 
+        #define Call_FlexCAN_Ip_GetStopMode(instance) \
 
+                FlexCAN_Ip_GetStopMode_Privileged(instance)
 
+
 
+        #define Call_FlexCAN_Ip_GetStartMode(instance) \
 
+                FlexCAN_Ip_GetStartMode_Privileged(instance)
 
+
 
+        #define Call_FlexCAN_Ip_EnterFreezeMode(instance) \
 
+                FlexCAN_Ip_EnterFreezeMode_Privileged(instance)
 
+
 
+        #define Call_FlexCAN_Ip_ExitFreezeMode(instance) \
 
+                FlexCAN_Ip_ExitFreezeMode_Privileged(instance)
 
+
 
+        #define Call_FlexCAN_Ip_SetRxFifoGlobalMask(instance, mask) \
 
+                FlexCAN_Ip_SetRxFifoGlobalMask_Privileged(instance, mask)
 
+
 
+        #define Call_FlexCAN_Ip_Deinit(instance) \
 
+                FlexCAN_Ip_Deinit_Privileged(instance)
 
+
 
+        #define Call_FlexCAN_Ip_SetStartMode(instance) \
 
+                FlexCAN_Ip_SetStartMode_Privileged(instance)
 
+
 
+        #define Call_FlexCAN_Ip_SetStopMode(instance) \
 
+                FlexCAN_Ip_SetStopMode_Privileged(instance)
 
+
 
+        #define Call_FlexCAN_Ip_SetRxMaskType(instance, type) \
 
+                FlexCAN_Ip_SetRxMaskType_Privileged(instance, type)
 
+
 
+        #define Call_FlexCAN_Ip_SetRxMb14Mask(instance, mask) \
 
+                FlexCAN_Ip_SetRxMb14Mask_Privileged(instance, mask)
 
+
 
+        #define Call_FlexCAN_Ip_SetRxMb15Mask(instance, mask) \
 
+                FlexCAN_Ip_SetRxMb15Mask_Privileged(instance, mask)
 
+
 
+        #define Call_FlexCAN_Ip_SetRxIndividualMask(instance, mb_idx, mask) \
 
+                FlexCAN_Ip_SetRxIndividualMask_Privileged(instance, mb_idx, mask)
 
+
 
+        #define Call_FlexCAN_Ip_SetRxMbGlobalMask(instance, mask) \
 
+                FlexCAN_Ip_SetRxMbGlobalMask_Privileged(instance, mask)
 
+
 
+        #define Call_FlexCAN_Ip_SetBitrateCbt(instance, bitrate, bitRateSwitch) \
 
+                FlexCAN_Ip_SetBitrateCbt_Privileged(instance, bitrate, bitRateSwitch)
 
+
 
+        #define Call_FlexCAN_Ip_SetBitrate(instance, bitrate, enhExt) \
 
+                FlexCAN_Ip_SetBitrate_Privileged(instance, bitrate, enhExt)
 
+
 
+        #define Call_FlexCAN_Ip_SetTxArbitrationStartDelay(instance, value) \
 
+                FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged(instance, value)
 
+
 
+        #define Call_FlexCAN_Ip_SetTDCOffset(instance, enable, offset) \
 
+                FlexCAN_Ip_SetTDCOffset_Privileged(instance, enable, offset)
 
+
 
+        #define Call_FlexCAN_Ip_EnableInterrupts(u8Instance) \
 
+                FlexCAN_Ip_EnableInterrupts_Privileged(u8Instance)
 
+
 
+        #define Call_FlexCAN_Ip_DisableInterrupts(u8Instance) \
 
+                FlexCAN_Ip_DisableInterrupts_Privileged(u8Instance)
 
+
 
+        #define Call_FlexCAN_Ip_SetErrorInt(u8Instance, type, enable) \
 
+                FlexCAN_Ip_SetErrorInt_Privileged(u8Instance, type, enable)
 
+
 
+        #define Call_FlexCAN_Ip_SetListenOnlyMode(instance, value) \
 
+                FlexCAN_Ip_SetListenOnlyMode_Privileged(instance, value)
 
+#if (FLEXCAN_IP_FEATURE_HAS_TS_ENABLE == STD_ON)
 
+        #define Call_FlexCAN_Ip_ConfigTimeStamp(instance, time_stamp) \
 
+                FlexCAN_Ip_ConfigTimeStamp_Privileged(instance, time_stamp)
 
+#endif
 
+#if (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON)
 
+        #define Call_FlexCAN_Ip_ConfigPN(u8Instance, bEnable, pPnConfig) \
 
+                FlexCAN_Ip_ConfigPN_Privileged(u8Instance, bEnable, pPnConfig)
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON) */
 
+#endif /* (FLEXCAN_IP_ENABLE_USER_MODE_SUPPORT == STD_ON) */
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define CAN_START_SEC_CODE
 
+#include "Can_MemMap.h"
 
+/**
 
+ *  @brief Initializes the FlexCAN peripheral.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_Init_Privileged(uint8 Flexcan_Ip_u8Instance,
 
+                                                Flexcan_Ip_StateType * Flexcan_Ip_pState,
 
+                                                const Flexcan_Ip_ConfigType * Flexcan_Ip_pData);
 
+/**
 
+ *  @brief FlexCAN Rx Legacy FIFO filter configuration
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_ConfigRxFifo_Privileged(uint8 instance,
 
+                                        Flexcan_Ip_RxFifoIdElementFormatType id_format,
 
+                                        const Flexcan_Ip_IdTableType * id_filter_table);
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON)
 
+/**
 
+ *  @brief FlexCAN Enhanced Rx FIFO filter configuration
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged(uint8 instance,
 
+                                                 const Flexcan_Ip_EnhancedIdTableType * id_filter_table);
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_ENHANCED_RX_FIFO == STD_ON) */
 
+
 
+/**
 
+ *  @brief     Check a bus-off event.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_MainFunctionBusOff_Privileged(uint8 instance);
 
+
 
+/**
 
+ *  @brief     Check if the FlexCAN instance is STOPPED.
 
+ */
 
+boolean FlexCAN_Ip_GetStopMode_Privileged(uint8 instance);
 
+
 
+/**
 
+ *  @brief     Check if the FlexCAN instance is STARTED.
 
+ */
 
+boolean FlexCAN_Ip_GetStartMode_Privileged(uint8 instance);
 
+
 
+/**
 
+ *  @brief     Enter FlexCAN Module in Freeze Mode.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_EnterFreezeMode_Privileged(uint8 instance);
 
+/**
 
+ *  @brief     Exit FlexCAN Module from Freeze Mode.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_ExitFreezeMode_Privileged(uint8 instance);
 
+
 
+/**
 
+ *  @brief     Set RxFifo Global Mask.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetRxFifoGlobalMask_Privileged(uint8 instance,
 
+                                                      uint32 mask);
 
+/**
 
+ *  @brief     DeInitilize the FlexCAN instance driver
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_Deinit_Privileged(uint8 instance);
 
+/**
 
+ *  @brief     Set the FlexCAN instance in START mode
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetStartMode_Privileged(uint8 instance);
 
+/**
 
+ *  @brief     Set the FlexCAN instance in STOP mode
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetStopMode_Privileged(uint8 instance);
 
+/**
 
+ *  @brief      Set RX masking type
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetRxMaskType_Privileged(uint8 instance,
 
+                               Flexcan_Ip_RxMaskType type);
 
+/*
 
+* @brief Set Rx14Mask filter for message buffer 14.
 
+*/
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetRxMb14Mask_Privileged(uint8 instance, uint32 mask);
 
+/*
 
+* @brief Set Rx14Mask filter for message buffer 15.
 
+*/
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetRxMb15Mask_Privileged(uint8 instance, uint32 mask);
 
+/*
 
+* @brief Sets the FlexCAN Rx individual mask
 
+*/
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetRxIndividualMask_Privileged(uint8 instance, uint8 mb_idx, uint32 mask);
 
+/*
 
+* @brief Sets the FlexCAN Rx Message Buffer Global mask
 
+*/
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetRxMbGlobalMask_Privileged(uint8 instance, uint32 mask);
 
+/**
 
+ * @brief Sets the FlexCAN bit rate for standard frames or the arbitration phase of FD frames.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetBitrate_Privileged(uint8 instance,
 
+                                                        const Flexcan_Ip_TimeSegmentType * bitrate,
 
+                                                        boolean enhExt);
 
+#if (FLEXCAN_IP_FEATURE_HAS_FD == STD_ON)
 
+/**
 
+ * @brief Sets the FlexCAN bit rate for the data phase of FD frames.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetBitrateCbt_Privileged(uint8 instance,
 
+                                                        const Flexcan_Ip_TimeSegmentType * bitrate,
 
+                                                        boolean bitRateSwitch);
 
+/**
 
+ *  @brief     This function will set how many CAN bits the Tx arbitration process start point can
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetTxArbitrationStartDelay_Privileged(uint8 instance, uint8 value);
 
+
 
+/**
 
+ * @brief Enables/Disables the Transceiver Delay Compensation feature and sets
 
+ * the Transceiver Delay Compensation Offset (offset value to be added to the
 
+ * measured transceiver's loop delay in order to define the position of the
 
+ * delayed comparison point when bit rate switching is active).
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetTDCOffset_Privileged(uint8 instance,
 
+                                              boolean enable,
 
+                                              uint8 offset);
 
+
 
+#endif /* FLEXCAN_IP_FEATURE_HAS_FD == STD_ON */
 
+
 
+/**
 
+ *  @brief     Enable all mb interrupts configured.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_EnableInterrupts_Privileged(uint8 u8Instance);
 
+
 
+/**
 
+ *  @brief     Disable all mb interrupts configured.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_DisableInterrupts_Privileged(uint8 u8Instance);
 
+
 
+/**
 
+ *  @brief     Enable\Disable Error or BusOff Interrupt
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetErrorInt_Privileged(uint8 u8Instance,
 
+                                             Flexcan_Ip_ErrorIntType type,
 
+                                             boolean enable);
 
+
 
+/**
 
+ *  @brief     Set FlexCAN Listen Only.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_SetListenOnlyMode_Privileged(uint8 instance, const boolean enable);
 
+#if    (FLEXCAN_IP_FEATURE_HAS_TS_ENABLE == STD_ON)
 
+/**
 
+ *  @brief     Set FlexCAN Config Timestamp.
 
+ */
 
+Flexcan_Ip_StatusType FlexCAN_Ip_ConfigTimeStamp_Privileged(uint8 instance, const Flexcan_Ip_TimeStampConfigType * time_stamp);
 
+#endif
 
+
 
+#if (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON)
 
+Flexcan_Ip_StatusType FlexCAN_Ip_ConfigPN_Privileged(uint8 u8Instance,
 
+                          boolean bEnable,
 
+                          const Flexcan_Ip_PnConfigType * pPnConfig);
 
+#endif /* (FLEXCAN_IP_FEATURE_HAS_PRETENDED_NETWORKING == STD_ON) */
 
+
 
+#define CAN_STOP_SEC_CODE
 
+#include "Can_MemMap.h"
 
+
 
+#endif /* FLEXCAN_IP_WRAPPER_H_ */

+ 215 - 0
RTD/include/Flexio_Mcl_Ip.h
Vedi File 

@@ -0,0 +1,215 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/**
 
+ *   @file       Flexio_Mcl_Ip.h
 
+ *
 
+ *   @version    1.0.0
 
+ *
 
+ *   @brief      AUTOSAR Mcl - Flexio Common driver header file.
 
+ *
 
+ *   @addtogroup FLEXIO_IP_DRIVER FLEXIO IP Driver
 
+ *   @{
 
+ */
 
+
 
+#ifndef FLEXIO_MCL_IP_H
 
+#define FLEXIO_MCL_IP_H
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Mcal.h"
 
+#include "PlatformTypes.h"
 
+#include "Flexio_Mcl_Ip_HwAccess.h"
 
+#include "Flexio_Mcl_Ip_Cfg.h"
 
+#include "Flexio_Mcl_Ip_Types.h"
 
+
 
+#if (FLEXIO_MCL_IP_DEV_ERROR_DETECT == STD_ON)
 
+#include "Devassert.h"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXIO_MCL_IP_VENDOR_ID_H                       43
 
+#define FLEXIO_MCL_IP_AR_RELEASE_MAJOR_VERSION_H        4
 
+#define FLEXIO_MCL_IP_AR_RELEASE_MINOR_VERSION_H        4
 
+#define FLEXIO_MCL_IP_AR_RELEASE_REVISION_VERSION_H     0
 
+#define FLEXIO_MCL_IP_SW_MAJOR_VERSION_H                1
 
+#define FLEXIO_MCL_IP_SW_MINOR_VERSION_H                0
 
+#define FLEXIO_MCL_IP_SW_PATCH_VERSION_H                0
 
+
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+/* Check if header file and Mcal header file are of the same Autosar version */
 
+#if ((FLEXIO_MCL_IP_AR_RELEASE_MAJOR_VERSION_H != MCAL_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FLEXIO_MCL_IP_AR_RELEASE_MINOR_VERSION_H != MCAL_AR_RELEASE_MINOR_VERSION))
 
+    #error "AutoSar Version Numbers of Flexio_Mcl_Ip.h and Mcal.h are different"
 
+#endif
 
+
 
+/* Check if header file and PlatformTypes header file are of the same Autosar version */
 
+#if ((FLEXIO_MCL_IP_AR_RELEASE_MAJOR_VERSION_H != PLATFORM_TYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FLEXIO_MCL_IP_AR_RELEASE_MINOR_VERSION_H != PLATFORM_TYPES_AR_RELEASE_MINOR_VERSION))
 
+    #error "AutoSar Version Numbers of Flexio_Mcl_Ip.h and PlatformTypes.h are different"
 
+#endif
 
+
 
+#if (FLEXIO_MCL_IP_DEV_ERROR_DETECT == STD_ON)
 
+/* Check if header file and Devassert header file are of the same Autosar version */
 
+#if ((FLEXIO_MCL_IP_AR_RELEASE_MAJOR_VERSION_H != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FLEXIO_MCL_IP_AR_RELEASE_MINOR_VERSION_H != DEVASSERT_AR_RELEASE_MINOR_VERSION))
 
+    #error "AutoSar Version Numbers of Flexio_Mcl_Ip.h and Devassert.h are different"
 
+#endif
 
+#endif /* (FLEXIO_MCL_IP_DEV_ERROR_DETECT == STD_ON) */
 
+#endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_HwAccess.h file are of the same vendor */
 
+#if (FLEXIO_MCL_IP_VENDOR_ID_H != FLEXIO_IP_HW_ACCESS_VENDOR_ID_H)
 
+    #error "Flexio_Mcl_Ip.h and Flexio_Mcl_Ip_HwAccess.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_HwAccess.h file are of the same Autosar version */
 
+#if ((FLEXIO_MCL_IP_AR_RELEASE_MAJOR_VERSION_H != FLEXIO_IP_HW_ACCESS_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_AR_RELEASE_MINOR_VERSION_H != FLEXIO_IP_HW_ACCESS_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_AR_RELEASE_REVISION_VERSION_H != FLEXIO_IP_HW_ACCESS_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Flexio_Mcl_Ip.h and Flexio_Mcl_Ip_HwAccess.h are different"
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_HwAccess.h file are of the same Software version */
 
+#if ((FLEXIO_MCL_IP_SW_MAJOR_VERSION_H != FLEXIO_IP_HW_ACCESS_SW_MAJOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_SW_MINOR_VERSION_H != FLEXIO_IP_HW_ACCESS_SW_MINOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_SW_PATCH_VERSION_H != FLEXIO_IP_HW_ACCESS_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Flexio_Mcl_Ip.h and Flexio_Mcl_Ip_HwAccess.h are different"
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_Cfg.h file are of the same vendor */
 
+#if (FLEXIO_MCL_IP_VENDOR_ID_H != FLEXIO_MCL_IP_CFG_VENDOR_ID_H)
 
+    #error "Flexio_Mcl_Ip.h and Flexio_Mcl_Ip_Cfg.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_Cfg.h file are of the same Autosar version */
 
+#if ((FLEXIO_MCL_IP_AR_RELEASE_MAJOR_VERSION_H != FLEXIO_MCL_IP_CFG_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_AR_RELEASE_MINOR_VERSION_H != FLEXIO_MCL_IP_CFG_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_AR_RELEASE_REVISION_VERSION_H != FLEXIO_MCL_IP_CFG_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Flexio_Mcl_Ip.h and Flexio_Mcl_Ip_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_Cfg.h file are of the same Software version */
 
+#if ((FLEXIO_MCL_IP_SW_MAJOR_VERSION_H != FLEXIO_MCL_IP_CFG_SW_MAJOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_SW_MINOR_VERSION_H != FLEXIO_MCL_IP_CFG_SW_MINOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_SW_PATCH_VERSION_H != FLEXIO_MCL_IP_CFG_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Flexio_Mcl_Ip.h and Flexio_Mcl_Ip_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_Types.h file are of the same vendor */
 
+#if (FLEXIO_MCL_IP_VENDOR_ID_H != FLEXIO_MCL_IP_TYPES_VENDOR_ID_H)
 
+    #error "Flexio_Mcl_Ip.h and Flexio_Mcl_Ip_Types.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_Types.h file are of the same Autosar version */
 
+#if ((FLEXIO_MCL_IP_AR_RELEASE_MAJOR_VERSION_H != FLEXIO_MCL_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_AR_RELEASE_MINOR_VERSION_H != FLEXIO_MCL_IP_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_AR_RELEASE_REVISION_VERSION_H != FLEXIO_MCL_IP_TYPES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Flexio_Mcl_Ip.h and Flexio_Mcl_Ip_Types.h are different"
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_Types.h file are of the same Software version */
 
+#if ((FLEXIO_MCL_IP_SW_MAJOR_VERSION_H != FLEXIO_MCL_IP_TYPES_SW_MAJOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_SW_MINOR_VERSION_H != FLEXIO_MCL_IP_TYPES_SW_MINOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_SW_PATCH_VERSION_H != FLEXIO_MCL_IP_TYPES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Flexio_Mcl_Ip.h and Flexio_Mcl_Ip_Types.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                            ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                 STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+#define MCL_START_SEC_CONST_UNSPECIFIED
 
+#include "Mcl_MemMap.h"
 
+/* Table of base addresses for FLEXIO instances. */
 
+extern FLEXIO_Type * const flexioBase[FLEXIO_INSTANCE_COUNT];
 
+
 
+#define MCL_STOP_SEC_CONST_UNSPECIFIED
 
+#include "Mcl_MemMap.h"
 
+
 
+#define MCL_START_SEC_VAR_CLEARED_BOOLEAN
 
+#include "Mcl_MemMap.h"
 
+/* Table of base addresses for FLEXIO instances. */
 
+extern boolean Flexio_Ip_IpIsInitialized[FLEXIO_INSTANCE_COUNT];
 
+
 
+#define MCL_STOP_SEC_VAR_CLEARED_BOOLEAN
 
+#include "Mcl_MemMap.h"
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define MCL_START_SEC_CODE
 
+#include "Mcl_MemMap.h"
 
+
 
+/* Implementation of Flexio handler named in startup code. */
 
+ISR(MCL_FLEXIO_ISR);
 
+
 
+void Flexio_Mcl_Ip_DeinitDevice(uint32 instance);
 
+
 
+Flexio_Ip_CommonStatusType Flexio_Mcl_Ip_InitDevice(const Flexio_Ip_InstanceConfigType * const pFlexioInitType);
 
+
 
+#define MCL_STOP_SEC_CODE
 
+#include "Mcl_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* FLEXIO_MCL_IP_H */

+ 341 - 0
RTD/include/Flexio_Mcl_Ip_HwAccess.h
Vedi File 

@@ -0,0 +1,341 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef FLEXIO_IP_HW_ACCESS_H
 
+#define FLEXIO_IP_HW_ACCESS_H
 
+
 
+/**
 
+*   @file    Flexio_Ip_hw_access.h
 
+*   @version 1.0.0
 
+*
 
+*   @brief   AUTOSAR Mcl - Low level header of Mcl driver.
 
+*   @details This file contains declarations of the functions defined by AutoSAR.
 
+*
 
+*   @addtogroup FLEXIO_IP_DRIVER FLEXIO IP Driver
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Flexio_Mcl_Ip_Cfg_DeviceRegisters.h"
 
+#include "Flexio_Mcl_Ip_Cfg_Defines.h"
 
+
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+
 
+#define FLEXIO_IP_HW_ACCESS_VENDOR_ID_H                      43
 
+#define FLEXIO_IP_HW_ACCESS_MODULE_ID_H                      255
 
+#define FLEXIO_IP_HW_ACCESS_AR_RELEASE_MAJOR_VERSION_H       4
 
+#define FLEXIO_IP_HW_ACCESS_AR_RELEASE_MINOR_VERSION_H       4
 
+#define FLEXIO_IP_HW_ACCESS_AR_RELEASE_REVISION_VERSION_H    0
 
+#define FLEXIO_IP_HW_ACCESS_SW_MAJOR_VERSION_H               1
 
+#define FLEXIO_IP_HW_ACCESS_SW_MINOR_VERSION_H               0
 
+#define FLEXIO_IP_HW_ACCESS_SW_PATCH_VERSION_H               0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+
 
+/* Check if Flexio_Mcl_Ip_HwAccess.h file and Flexio_Mcl_Ip_Cfg_DeviceRegisters.h file are of the same vendor */
 
+#if (FLEXIO_IP_HW_ACCESS_VENDOR_ID_H != FLEXIO_MCL_IP_CFG_DEVICEREGISTERS_VENDOR_ID_H)
 
+    #error "Flexio_Mcl_Ip_HwAccess.h and Flexio_Mcl_Ip_Cfg_DeviceRegisters.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if Flexio_Mcl_Ip_HwAccess.h file and Flexio_Mcl_Ip_Cfg_DeviceRegisters.h file are of the same Autosar version */
 
+#if ((FLEXIO_IP_HW_ACCESS_AR_RELEASE_MAJOR_VERSION_H != FLEXIO_MCL_IP_CFG_DEVICEREGISTERS_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXIO_IP_HW_ACCESS_AR_RELEASE_MINOR_VERSION_H != FLEXIO_MCL_IP_CFG_DEVICEREGISTERS_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXIO_IP_HW_ACCESS_AR_RELEASE_REVISION_VERSION_H != FLEXIO_MCL_IP_CFG_DEVICEREGISTERS_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Flexio_Mcl_Ip_HwAccess.h and Flexio_Mcl_Ip_Cfg_DeviceRegisters.h are different"
 
+#endif
 
+
 
+/* Check if Flexio_Mcl_Ip_HwAccess.h file and Flexio_Mcl_Ip_Cfg_DeviceRegisters.h file are of the same Software version */
 
+#if ((FLEXIO_IP_HW_ACCESS_SW_MAJOR_VERSION_H != FLEXIO_MCL_IP_CFG_DEVICEREGISTERS_SW_MAJOR_VERSION_H) || \
 
+     (FLEXIO_IP_HW_ACCESS_SW_MINOR_VERSION_H != FLEXIO_MCL_IP_CFG_DEVICEREGISTERS_SW_MINOR_VERSION_H) || \
 
+     (FLEXIO_IP_HW_ACCESS_SW_PATCH_VERSION_H != FLEXIO_MCL_IP_CFG_DEVICEREGISTERS_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Flexio_Mcl_Ip_HwAccess.h and Flexio_Mcl_Ip_Cfg_DeviceRegisters.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                      DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                             ENUMS
 
+==================================================================================================*/
 
+/* Shift clock polarity options   */
 
+typedef enum
 
+{
 
+    FLEXIO_TIMER_POLARITY_POSEDGE = 0x00U,     /*!< Shift on positive edge of Shift clock */
 
+    FLEXIO_TIMER_POLARITY_NEGEDGE = 0x01U,     /*!< Shift on negative edge of Shift clock */
 
+} Flexio_Mcl_Ip_TimerPolarityType;
 
+
 
+
 
+/* Pin polarity options   */
 
+typedef enum
 
+{
 
+    FLEXIO_PIN_POLARITY_HIGH = 0x00U,          /*!< Pin is active high */
 
+    FLEXIO_PIN_POLARITY_LOW  = 0x01U,          /*!< Pin is active low  */
 
+} Flexio_Mcl_Ip_PinPolarityType;
 
+
 
+/* Pin configuration options   */
 
+typedef enum
 
+{
 
+    FLEXIO_PIN_CONFIG_DISABLED     = 0x00U,    /*!< Shifter pin output disabled */
 
+    FLEXIO_PIN_CONFIG_OPEN_DRAIN   = 0x01U,    /*!< Shifter pin open drain or bidirectional output enable */
 
+    FLEXIO_PIN_CONFIG_BIDIR_OUTPUT = 0x02U,    /*!< Shifter pin bidirectional output data */
 
+    FLEXIO_PIN_CONFIG_OUTPUT       = 0x03U,    /*!< Shifter pin output */
 
+} Flexio_Mcl_Ip_PinConfigType;
 
+
 
+/* Shifter mode options   */
 
+typedef enum
 
+{
 
+    FLEXIO_SHIFTER_MODE_DISABLED          = 0x00U,
 
+    FLEXIO_SHIFTER_MODE_RECEIVE           = 0x01U,
 
+    FLEXIO_SHIFTER_MODE_TRANSMIT          = 0x02U,
 
+    FLEXIO_SHIFTER_MODE_MATCH_STORE       = 0x04U,
 
+    FLEXIO_SHIFTER_MODE_MATCH_CONTINUOUS  = 0x05U,
 
+} Flexio_Mcl_Ip_ShifterModeType;
 
+
 
+/* Shifter input source options   */
 
+typedef enum
 
+{
 
+    FLEXIO_SHIFTER_SOURCE_PIN        = 0x00U,
 
+    FLEXIO_SHIFTER_SOURCE_SHIFTER    = 0x01U,
 
+} Flexio_Mcl_Ip_ShifterSourceType;
 
+
 
+/* Read/Write mode for shifter buffer   */
 
+typedef enum
 
+{
 
+    FLEXIO_SHIFTER_RW_MODE_NORMAL    = 0x00U,
 
+    FLEXIO_SHIFTER_RW_MODE_BIT_SWAP  = 0x01U,
 
+} Flexio_Mcl_Ip_ShifterBufferModeType;
 
+
 
+/* Trigger polarity   */
 
+typedef enum
 
+{
 
+    FLEXIO_TRIGGER_POLARITY_HIGH = 0x00U,          /*!< Trigger is active high */
 
+    FLEXIO_TRIGGER_POLARITY_LOW  = 0x01U,          /*!< Trigger is active low  */
 
+} Flexio_Mcl_Ip_TriggerPolarityType;
 
+
 
+/* Trigger sources   */
 
+typedef enum
 
+{
 
+    FLEXIO_TRIGGER_SOURCE_EXTERNAL  = 0x00U,  /*!< External trigger selected */
 
+    FLEXIO_TRIGGER_SOURCE_INTERNAL  = 0x01U,  /*!< Internal trigger selected */
 
+} Flexio_Mcl_Ip_TriggerSourceType;
 
+
 
+/* Timer mode options   */
 
+typedef enum
 
+{
 
+    FLEXIO_TIMER_MODE_DISABLED                  = 0x00U,  /*!< Timer Disabled. */
 
+    FLEXIO_TIMER_MODE_8BIT_BAUD                 = 0x01U,  /*!< Dual 8-bit counters baud/bit mode. */
 
+    FLEXIO_TIMER_MODE_8BIT_PWM                  = 0x02U,  /*!< Dual 8-bit counters PWM mode. */
 
+    FLEXIO_TIMER_MODE_16BIT                     = 0x03U,  /*!< Single 16-bit counter mode. */
 
+    FLEXIO_TIMER_MODE_16BIT_DIS                 = 0x04U,  /*!< Single 16-bit counter disable mode. */
 
+    FLEXIO_TIMER_MODE_8BIT_DUAL                 = 0x05U,  /*!< Dual 8-bit counters word mode. */
 
+    FLEXIO_TIMER_MODE_8BIT_DUAL_PWM             = 0x06U,  /*!< Dual 8-bit counters PWM low mode. */
 
+    FLEXIO_TIMER_16BIT_INPUT_CAPTURE_MODE       = 0x07U,  /*!< Single 16-bit input capture mode. */
 
+} Flexio_Mcl_Ip_TimerModeType;
 
+
 
+/* Timer initial output options   */
 
+typedef enum
 
+{
 
+    FLEXIO_TIMER_INITOUT_ONE          = 0x00U,  /*!< Timer output is logic one when enabled, unaffected by timer reset. */
 
+    FLEXIO_TIMER_INITOUT_ZERO         = 0x01U,  /*!< Timer output is logic zero when enabled, unaffected by timer reset. */
 
+    FLEXIO_TIMER_INITOUT_ONE_RESET    = 0x02U,  /*!< Timer output is logic one when enabled and on timer reset. */
 
+    FLEXIO_TIMER_INITOUT_ZERO_RESET   = 0x03U,  /*!< Timer output is logic zero when enabled and on timer reset. */
 
+} Flexio_Mcl_Ip_TimerOutputType;
 
+
 
+/* Timer decrement options   */
 
+typedef enum
 
+{
 
+    FLEXIO_TIMER_DECREMENT_CLK_SHIFT_TMR      = 0x00U,  /*!< Decrement counter on FlexIO clock, Shift clock equals Timer output. */
 
+    FLEXIO_TIMER_DECREMENT_TRG_SHIFT_TMR      = 0x01U,  /*!< Decrement counter on Trigger input (both edges), Shift clock equals Timer output. */
 
+    FLEXIO_TIMER_DECREMENT_PIN_SHIFT_PIN      = 0x02U,  /*!< Decrement counter on Pin input (both edges), Shift clock equals Pin input. */
 
+    FLEXIO_TIMER_DECREMENT_TRG_SHIFT_TRG      = 0x03U,  /*!< Decrement counter on Trigger input (both edges), Shift clock equals Trigger input. */
 
+} Flexio_Mcl_Ip_TimerDecrementType;
 
+
 
+/* Timer reset options   */
 
+typedef enum
 
+{
 
+    FLEXIO_TIMER_RESET_NEVER                  = 0x00U,  /*!< Timer never reset. */
 
+    FLEXIO_TIMER_RESET_PIN_OUT                = 0x02U,  /*!< Timer reset on Timer Pin equal to Timer Output. */
 
+    FLEXIO_TIMER_RESET_TRG_OUT                = 0x03U,  /*!< Timer reset on Timer Trigger equal to Timer Output. */
 
+    FLEXIO_TIMER_RESET_PIN_RISING             = 0x04U,  /*!< Timer reset on Timer Pin rising edge. */
 
+    FLEXIO_TIMER_RESET_TRG_RISING             = 0x06U,  /*!< Timer reset on Trigger rising edge. */
 
+    FLEXIO_TIMER_RESET_TRG_BOTH               = 0x07U,  /*!< Timer reset on Trigger rising or falling edge. */
 
+} Flexio_Mcl_Ip_TimerResetType;
 
+
 
+/* Timer disable options   */
 
+typedef enum
 
+{
 
+    FLEXIO_TIMER_DISABLE_NEVER                = 0x00U,  /*!< Timer never disabled. */
 
+    FLEXIO_TIMER_DISABLE_TIM_DISABLE          = 0x01U,  /*!< Timer disabled on Timer N-1 disable. */
 
+    FLEXIO_TIMER_DISABLE_TIM_CMP              = 0x02U,  /*!< Timer disabled on Timer compare. */
 
+    FLEXIO_TIMER_DISABLE_TIM_CMP_TRG_LOW      = 0x03U,  /*!< Timer disabled on Timer compare and Trigger Low. */
 
+    FLEXIO_TIMER_DISABLE_PIN                  = 0x04U,  /*!< Timer disabled on Pin rising or falling edge. */
 
+    FLEXIO_TIMER_DISABLE_PIN_TRG_HIGH         = 0x05U,  /*!< Timer disabled on Pin rising or falling edge provided Trigger is high. */
 
+    FLEXIO_TIMER_DISABLE_TRG                  = 0x06U,  /*!< Timer disabled on Trigger falling edge. */
 
+} Flexio_Mcl_Ip_TimerDisableType;
 
+
 
+/* Timer disable options   */
 
+typedef enum
 
+{
 
+    FLEXIO_TIMER_ENABLE_ALWAYS                  = 0x00U,  /*!< Timer always enabled. */
 
+    FLEXIO_TIMER_ENABLE_TIM_ENABLE              = 0x01U,  /*!< Timer enabled on Timer N-1 enable. */
 
+    FLEXIO_TIMER_ENABLE_TRG_HIGH                = 0x02U,  /*!< Timer enabled on Trigger high. */
 
+    FLEXIO_TIMER_ENABLE_TRG_PIN_HIGH            = 0x03U,  /*!< Timer enabled on Trigger high and Pin high. */
 
+    FLEXIO_TIMER_ENABLE_PIN_POSEDGE             = 0x04U,  /*!< Timer enabled on Pin rising edge. */
 
+    FLEXIO_TIMER_ENABLE_PIN_POSEDGE_TRG_HIGH    = 0x05U,  /*!< Timer enabled on Pin rising edge and Trigger high. */
 
+    FLEXIO_TIMER_ENABLE_TRG_POSEDGE             = 0x06U,  /*!< Timer enabled on Trigger rising edge. */
 
+    FLEXIO_TIMER_ENABLE_TRG_EDGE                = 0x07U,  /*!< Timer enabled on Trigger rising or falling edge. */
 
+} Flexio_Mcl_Ip_TimerEnableType;
 
+
 
+/* Timer stop bit options   */
 
+typedef enum
 
+{
 
+    FLEXIO_TIMER_STOP_BIT_DISABLED              = 0x00U,  /*!< Stop bit disabled. */
 
+    FLEXIO_TIMER_STOP_BIT_TIM_CMP               = 0x01U,  /*!< Stop bit is enabled on timer compare. */
 
+    FLEXIO_TIMER_STOP_BIT_TIM_DIS               = 0x02U,  /*!< Stop bit is enabled on timer disable. */
 
+    FLEXIO_TIMER_STOP_BIT_TIM_CMP_DIS           = 0x03U,  /*!< Stop bit is enabled on timer compare and disable. */
 
+} Flexio_Mcl_Ip_TimerStopType;
 
+
 
+/* Timer stop bit options - for Transmit, Receive or Match Store modes only   */
 
+typedef enum
 
+{
 
+    FLEXIO_SHIFTER_STOP_BIT_DISABLED            = 0x00U,
 
+    FLEXIO_SHIFTER_STOP_BIT_0                   = 0x02U,
 
+    FLEXIO_SHIFTER_STOP_BIT_1                   = 0x03U,
 
+} Flexio_Mcl_Ip_ShifterStopType;
 
+
 
+/* Timer start bit options - for Transmit, Receive or Match Store modes only   */
 
+typedef enum
 
+{
 
+    FLEXIO_SHIFTER_START_BIT_DISABLED       = 0x00U,
 
+    FLEXIO_SHIFTER_START_BIT_DISABLED_SH    = 0x01U,
 
+    FLEXIO_SHIFTER_START_BIT_0              = 0x02U,
 
+    FLEXIO_SHIFTER_START_BIT_1              = 0x03U,
 
+} Flexio_Mcl_Ip_ShifterStartType;
 
+
 
+/* Timer start bit options   */
 
+typedef enum
 
+{
 
+    FLEXIO_TIMER_START_BIT_DISABLED              = 0x00U,  /*!< Start bit disabled. */
 
+    FLEXIO_TIMER_START_BIT_ENABLED               = 0x01U,  /*!< Start bit enabled. */
 
+} Flexio_Mcl_Ip_TimerStartType;
 
+/*==================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define MCL_START_SEC_CODE
 
+#include "Mcl_MemMap.h"
 
+
 
+void Flexio_Mcl_Ip_SetSoftwareReset(FLEXIO_Type *baseAddr, boolean enable);
 
+
 
+void Flexio_Mcl_Ip_SetDebugEnable(FLEXIO_Type *baseAddr, boolean enable);
 
+
 
+void Flexio_Mcl_Ip_SetEnable(FLEXIO_Type *baseAddr, boolean enable);
 
+
 
+boolean Flexio_Mcl_Ip_GetShifterStatus(const FLEXIO_Type *baseAddr, uint8 shifter);
 
+
 
+uint32 Flexio_Mcl_Ip_GetAllShifterStatus(const FLEXIO_Type *baseAddr);
 
+
 
+void Flexio_Mcl_Ip_ClearShifterStatus(FLEXIO_Type *baseAddr, uint8 shifter);
 
+
 
+#if (FLEXIO_MCL_IP_PIN_STS_IS_AVAILABLE == STD_ON)
 
+uint32 Flexio_Mcl_Ip_GetAllPinsStatus(const FLEXIO_Type *baseAddr);
 
+#endif
 
+
 
+boolean Flexio_Mcl_Ip_GetShifterErrorStatus(const FLEXIO_Type *baseAddr, uint8 shifter);
 
+
 
+uint32 Flexio_Mcl_Ip_GetAllShifterErrorStatus(const FLEXIO_Type *baseAddr);
 
+
 
+void Flexio_Mcl_Ip_ClearShifterErrorStatus(FLEXIO_Type *baseAddr, uint8 shifter);
 
+
 
+boolean Flexio_Mcl_Ip_GetTimerStatus(const FLEXIO_Type *baseAddr, uint8 timer);
 
+
 
+boolean Flexio_Mcl_Ip_GetTimerInterruptEnable(const FLEXIO_Type *baseAddr, uint8 timer);
 
+
 
+uint32 Flexio_Mcl_Ip_GetAllTimerStatus(const FLEXIO_Type *baseAddr);
 
+
 
+void Flexio_Mcl_Ip_ClearTimerStatus(FLEXIO_Type *baseAddr, uint8 timer);
 
+
 
+uint32 Flexio_Mcl_Ip_GetAllShifterInterrupt(const FLEXIO_Type *baseAddr);
 
+
 
+uint32 Flexio_Mcl_Ip_GetAllShifterErrorInterrupt(const FLEXIO_Type *baseAddr);
 
+
 
+void Flexio_Mcl_Ip_SetShifterErrorInterrupt(FLEXIO_Type *baseAddr, uint8 interruptMask, boolean enable);
 
+
 
+void Flexio_Mcl_Ip_SetShifterInterrupt(FLEXIO_Type *baseAddr, uint8 interruptMask, boolean enable);
 
+
 
+void Flexio_Mcl_Ip_SetShifterDMARequest(FLEXIO_Type *baseAddr, uint8 requestMask, boolean enable);
 
+
 
+uint32 Flexio_Mcl_Ip_GetAllTimerInterrupt(const FLEXIO_Type *baseAddr);
 
+
 
+void Flexio_Mcl_Ip_SetTimerInterrupt(FLEXIO_Type *baseAddr, uint8 interruptMask, boolean enable);
 
+
 
+#if (FLEXIO_MCL_IP_TIMERSDEN_IS_AVAILABLE == STD_ON)
 
+void Flexio_Mcl_Ip_SetTimerDMARequest(FLEXIO_Type *baseAddr, uint8 requestMask, boolean enable);
 
+#endif
 
+
 
+void Flexio_Mcl_Ip_Init(FLEXIO_Type *baseAddr);
 
+
 
+#if (FLEXIO_MCL_IP_PIN_STS_IS_AVAILABLE == STD_ON)
 
+void Flexio_Mcl_Ip_ClearPinStatus(FLEXIO_Type *baseAddr, uint8 pin);
 
+
 
+uint32 Flexio_Mcl_Ip_GetAllPinsInterrupt(const FLEXIO_Type *baseAddr);
 
+#endif
 
+
 
+#define MCL_STOP_SEC_CODE
 
+#include "Mcl_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* FLEXIO_IP_HW_ACCESS_H */

+ 137 - 0
RTD/include/Flexio_Mcl_Ip_Types.h
Vedi File 

@@ -0,0 +1,137 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/**
 
+ *   @file       Flexio_Mcl_Ip_Types.h
 
+ *
 
+ *   @version    1.0.0
 
+ *
 
+ *   @brief      AUTOSAR Mcl - Flexio Common driver header file.
 
+ *
 
+ *   @addtogroup FLEXIO_IP_DRIVER FLEXIO IP Driver
 
+ *   @{
 
+ */
 
+
 
+#ifndef FLEXIO_MCL_IP_TYPES_H
 
+#define FLEXIO_MCL_IP_TYPES_H
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+                                         INCLUDE FILES
 
+ 1) system and project includes
 
+ 2) needed interfaces from external units
 
+ 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "StandardTypes.h"
 
+#include "Flexio_Mcl_Ip_Cfg_Defines.h"
 
+
 
+/*==================================================================================================
 
+                               SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXIO_MCL_IP_TYPES_VENDOR_ID_H                            43
 
+#define FLEXIO_MCL_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H             4
 
+#define FLEXIO_MCL_IP_TYPES_AR_RELEASE_MINOR_VERSION_H             4
 
+#define FLEXIO_MCL_IP_TYPES_AR_RELEASE_REVISION_VERSION_H          0
 
+#define FLEXIO_MCL_IP_TYPES_SW_MAJOR_VERSION_H                     1
 
+#define FLEXIO_MCL_IP_TYPES_SW_MINOR_VERSION_H                     0
 
+#define FLEXIO_MCL_IP_TYPES_SW_PATCH_VERSION_H                     0
 
+
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+/* Check if header file and StandardTypes header file are of the same Autosar version */
 
+#if ((FLEXIO_MCL_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H != STD_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FLEXIO_MCL_IP_TYPES_AR_RELEASE_MINOR_VERSION_H != STD_AR_RELEASE_MINOR_VERSION))
 
+    #error "AutoSar Version Numbers of Flexio_Mcl_Ip_Types.h and StandardTypes.h are different"
 
+#endif
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_Cfg_Defines.h file are of the same vendor */
 
+#if (FLEXIO_MCL_IP_TYPES_VENDOR_ID_H != FLEXIO_MCL_IP_CFG_DEFINES_VENDOR_ID_H)
 
+    #error "Flexio_Mcl_Ip_Types.h and Flexio_Mcl_Ip_Cfg_Defines.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_Cfg_Defines.h file are of the same Autosar version */
 
+#if ((FLEXIO_MCL_IP_TYPES_AR_RELEASE_MAJOR_VERSION_H != FLEXIO_MCL_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_TYPES_AR_RELEASE_MINOR_VERSION_H != FLEXIO_MCL_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_TYPES_AR_RELEASE_REVISION_VERSION_H != FLEXIO_MCL_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Flexio_Mcl_Ip_Types.h and Flexio_Mcl_Ip_Cfg_Defines.h are different"
 
+#endif
 
+
 
+/* Check if header file and Flexio_Mcl_Ip_Cfg_Defines.h file are of the same Software version */
 
+#if ((FLEXIO_MCL_IP_TYPES_SW_MAJOR_VERSION_H != FLEXIO_MCL_IP_CFG_DEFINES_SW_MAJOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_TYPES_SW_MINOR_VERSION_H != FLEXIO_MCL_IP_CFG_DEFINES_SW_MINOR_VERSION_H) || \
 
+     (FLEXIO_MCL_IP_TYPES_SW_PATCH_VERSION_H != FLEXIO_MCL_IP_CFG_DEFINES_SW_PATCH_VERSION_H) \
 
+    )
 
+    #error "Software Version Numbers of Flexio_Mcl_Ip_Types.h and Flexio_Mcl_Ip_Cfg_Defines.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+                                           CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+                                 GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+                                       DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+                                             ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+                                 STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+typedef enum
 
+{
 
+    FLEXIO_IP_COMMON_STATUS_SUCCESS = 0U,
 
+    FLEXIO_IP_COMMON_STATUS_FAIL    = 1U,
 
+} Flexio_Ip_CommonStatusType;
 
+
 
+typedef struct
 
+{
 
+    const uint8                   instance;
 
+    boolean                       debugEnable;
 
+} Flexio_Ip_InstanceConfigType;
 
+
 
+/*==================================================================================================
 
+                                     FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* FLEXIO_MCL_IP_TYPES_H */

+ 305 - 0
RTD/include/Flexio_Uart_Ip.h
Vedi File 

@@ -0,0 +1,305 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXIO
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef FLEXIO_UART_IP_H
 
+#define FLEXIO_UART_IP_H
 
+
 
+/**
 
+*   @file
 
+*   @defgroup flexio_uart_ip Flexio UART IPL
 
+*   @addtogroup  flexio_uart_ip Flexio UART IPL
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Flexio_Uart_Ip_Cfg.h"
 
+#include "Mcal.h"
 
+/*==================================================================================================
 
+*                                 SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXIO_UART_IP_VENDOR_ID                    43
 
+#define FLEXIO_UART_IP_AR_RELEASE_MAJOR_VERSION     4
 
+#define FLEXIO_UART_IP_AR_RELEASE_MINOR_VERSION     4
 
+#define FLEXIO_UART_IP_AR_RELEASE_REVISION_VERSION  0
 
+#define FLEXIO_UART_IP_SW_MAJOR_VERSION             1
 
+#define FLEXIO_UART_IP_SW_MINOR_VERSION             0
 
+#define FLEXIO_UART_IP_SW_PATCH_VERSION             0
 
+/*==================================================================================================
 
+*                                       FILE VERSION CHECKS
 
+==================================================================================================*/
 
+
 
+/* Checks against Flexio_Uart_Ip_Cfg.h */
 
+#if (FLEXIO_UART_IP_VENDOR_ID != FLEXIO_UART_IP_CFG_VENDOR_ID)
 
+    #error "Flexio_Uart_Ip.h and Flexio_Uart_Ip_Cfg.h have different vendor ids"
 
+#endif
 
+#if ((FLEXIO_UART_IP_AR_RELEASE_MAJOR_VERSION    != FLEXIO_UART_IP_CFG_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FLEXIO_UART_IP_AR_RELEASE_MINOR_VERSION    != FLEXIO_UART_IP_CFG_AR_RELEASE_MINOR_VERSION) || \
 
+     (FLEXIO_UART_IP_AR_RELEASE_REVISION_VERSION != FLEXIO_UART_IP_CFG_AR_RELEASE_REVISION_VERSION))
 
+     #error "AUTOSAR Version Numbers of Flexio_Uart_Ip.h and Flexio_Uart_Ip_Cfg.h are different"
 
+#endif
 
+#if ((FLEXIO_UART_IP_SW_MAJOR_VERSION != FLEXIO_UART_IP_CFG_SW_MAJOR_VERSION) || \
 
+     (FLEXIO_UART_IP_SW_MINOR_VERSION != FLEXIO_UART_IP_CFG_SW_MINOR_VERSION) || \
 
+     (FLEXIO_UART_IP_SW_PATCH_VERSION != FLEXIO_UART_IP_CFG_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Flexio_Uart_Ip.h and Flexio_Uart_Ip_Cfg.h are different"
 
+#endif
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    /* Checks against Mcal.h */
 
+    #if ((FLEXIO_UART_IP_AR_RELEASE_MAJOR_VERSION != MCAL_AR_RELEASE_MAJOR_VERSION) || \
 
+         (FLEXIO_UART_IP_AR_RELEASE_MINOR_VERSION != MCAL_AR_RELEASE_MINOR_VERSION))
 
+        #error "AUTOSAR Version Numbers of Flexio_Uart_Ip.h and Mcal.h are different"
 
+    #endif
 
+#endif
 
+#if (FLEXIO_UART_IP_IS_USING == STD_ON)
 
+/*==================================================================================================
 
+*                                            CONSTANTS
 
+==================================================================================================*/
 
+#define UART_START_SEC_CONFIG_DATA_UNSPECIFIED
 
+#include "Uart_MemMap.h"
 
+/* Calling the external Configuration symbols defined by FlexIO_Uart_Ip_Cfg.h */
 
+FLEXIO_UART_IP_CONFIG_EXT
 
+#define UART_STOP_SEC_CONFIG_DATA_UNSPECIFIED
 
+#include "Uart_MemMap.h"
 
+/*==================================================================================================
 
+*                                       DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                              ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                  STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                  GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define UART_START_SEC_CODE
 
+#include "Uart_MemMap.h"
 
+
 
+/*!
 
+ * @brief Initializes an Flexio UART operation channel.
 
+ *
 
+ * The caller provides memory for the driver state structures during initialization.
 
+ * The user must select the Flexio UART clock source in the application to initialize the Flexio UART.
 
+ *
 
+ * @param Channel  FLEXIO peripheral channel number
 
+ * @param UserConfig Pointer to the Flexio over Uart user configuration structure.
 
+ * @return void
 
+ */
 
+void Flexio_Uart_Ip_Init(const uint8 Channel,
 
+                         const Flexio_Uart_Ip_UserConfigType * UserConfig);
 
+
 
+/*!
 
+ * @brief Shuts down the Flexio UART by disabling interrupts and transmitter/receiver.
 
+ *
 
+ * @param Channel  FLEXIO peripheral channel number
 
+ * @return void
 
+ */
 
+void Flexio_Uart_Ip_Deinit(const uint8 Channel);
 
+
 
+/*!
 
+ * @brief Returns the Flexio UART baud rate.
 
+ *
 
+ * This function returns the Flexio UART configured baud rate.
 
+ *
 
+ * @param Channel  FLEXIO peripheral channel number
 
+ * @param[out] BaudRate Pointer to location where the baudrate value will be provided
 
+ */
 
+void Flexio_Uart_Ip_GetBaudRate(const uint8 Channel, uint32 * BaudRate);
 
+
 
+/*!
 
+ * @brief Configures the Flexio Uart baud rate.
 
+ *
 
+ * This function configures the Flexio Uart baud rate.
 
+ * In some Flexio Uart channels the user must disable the transmitter/receiver
 
+ * before calling this function.
 
+ * Generally, this may be applied to all Flexio Uarts to ensure safe operation.
 
+ *
 
+ * @param Channel  Flexio Uart channel number.
 
+ * @param DesiredBaudrate Flexio Uart desired baud rate.
 
+ * @param ClockFrequency Clock Frequency of Flexio Uart channel.
 
+ * @return FLEXIO_UART_IP_STATUS_BUSY if called during an on-going transfer, FLEXIO_UART_IP_STATUS_SUCCESS otherwise
 
+ */
 
+Flexio_Uart_Ip_StatusType Flexio_Uart_Ip_SetBaudRate(const uint8 Channel,
 
+                                                     const Flexio_Uart_Ip_BaudrateType DesiredBaudrate,
 
+                                                     const uint32 ClockFrequency);
 
+
 
+/*!
 
+ * @brief Perform a Asynchronous UART transmission
 
+ *
 
+ * This function sends a block of data and returns immediately.
 
+ * The rest of the transmission is handled by the interrupt service routine (if the driver
 
+ * is initialized in interrupt mode)
 
+ *
 
+ * @param Channel    FLEXIO peripheral channel number
 
+ * @param TxBuff    pointer to the data to be transferred
 
+ * @param TxSize    length in bytes of the data to be transferred
 
+ * @return    Error or success status returned by API
 
+ */
 
+Flexio_Uart_Ip_StatusType Flexio_Uart_Ip_AsyncSend(const uint8 Channel,
 
+                                                   const uint8 * TxBuff,
 
+                                                   const uint32 TxSize);
 
+
 
+/*!
 
+ * @brief Transfer multiple bytes of data using polling method.
 
+ * @param Channel   FLEXIO peripheral channel number
 
+ * @param TxBuff    pointer to the data to be transferred
 
+ * @param TxSize    length in bytes of the data to be transferred
 
+ * @param Timeout   value in microseconds.
 
+ * @return    Error or success status returned by API
 
+ */
 
+Flexio_Uart_Ip_StatusType Flexio_Uart_Ip_SyncSend(const uint8 Channel,
 
+                                                  const uint8 * TxBuff,
 
+                                                  const uint32 TxSize,
 
+                                                  const uint32 Timeout);
 
+
 
+/*!
 
+ * @brief Perform a Asynchronous UART reception
 
+ *
 
+ * This function receives a block of data and returns immediately.
 
+ * The rest of the transmission is handled by the interrupt service routine (if the driver
 
+ * is initialized in interrupt mode) or by the Flexio_Uart_Ip_GetStatus() function (if
 
+ * the driver is initialized in polling mode).
 
+ *
 
+ * @param Channel    FLEXIO peripheral channel number
 
+ * @param RxBuff    source buffer containing 8-bit data chars to receive
 
+ * @param RxSize    the number of bytes to receive
 
+ * @return    Error or success status returned by API
 
+ */
 
+Flexio_Uart_Ip_StatusType Flexio_Uart_Ip_AsyncReceive(const uint8 Channel,
 
+                                                      uint8 * RxBuff,
 
+                                                      const uint32 RxSize);
 
+
 
+/*!
 
+ * @brief Receive multiple bytes of data using polling method.
 
+ *
 
+ * This function receives a block of data and returns immediately.
 
+ * The rest of the transmission is handled by the Flexio_Uart_Ip_GetStatus() function to initialized in polling mode.
 
+ *
 
+ * @param Channel   FLEXIO peripheral channel number
 
+ * @param RxBuff    buffer pointer where the bytes will be received
 
+ * @param RxSize    size of data need to be sent in unit of byte
 
+ * @param Timeout   timeout value in microsecond
 
+ * @return    Error or success status returned by API
 
+ */
 
+Flexio_Uart_Ip_StatusType Flexio_Uart_Ip_SyncReceive(const uint8 Channel,
 
+                                                     uint8 * RxBuff,
 
+                                                     const uint32 RxSize,
 
+                                                     const uint32 Timeout);
 
+
 
+/*FUNCTION**********************************************************************
 
+ *
 
+ * Function Name : Flexio_Uart_Ip_GetStatus
 
+ * Description   : Get the status of the current non-blocking UART transaction
 
+ * Implements : Flexio_Uart_Ip_GetStatus_Activity
 
+ *
 
+ *END**************************************************************************/
 
+Flexio_Uart_Ip_StatusType Flexio_Uart_Ip_GetStatus(const uint8 Channel, uint32 *BytesRemaining);
 
+
 
+/*FUNCTION**********************************************************************
 
+ *
 
+ * Function Name : Flexio_Uart_Ip_CompleteSendUsingDma
 
+ * Description   : Finish up a transmit by completing the process of sending
 
+ * data and disabling the DMA requests. This is a callback for DMA major loop
 
+ * completion, so it must match the DMA callback signature.
 
+ *
 
+ *END**************************************************************************/
 
+void Flexio_Uart_Ip_CompleteSendUsingDma(uint8 Channel);
 
+
 
+/**
 
+ * @internal
 
+ * @brief   : Finish up a receive by completing the process of receiving data
 
+ * and disabling the DMA requests. This is a part of callback for DMA major loop
 
+ * completion, so it must match the DMA callback signature.
 
+ * @param Channel Flexio channel number
 
+ * @return void
 
+ */
 
+void Flexio_Uart_Ip_CompleteReceiveUsingDma(uint8 Channel);
 
+
 
+/*FUNCTION**********************************************************************
 
+ *
 
+ * Function Name : Flexio_Uart_Ip_AbortTransferData
 
+ * Description   : This function terminates an non-blocking FLEXIO transmission
 
+ * early. During a non-blocking FLEXIO transmission, the user has the option to
 
+ * terminate the transmission early if the transmission is still in progress.
 
+ *
 
+ * Implements    : Flexio_Uart_Ip_AbortTransferData_Activity
 
+ *END**************************************************************************/
 
+Flexio_Uart_Ip_StatusType Flexio_Uart_Ip_AbortTransferData(const uint8 Channel);
 
+
 
+/*!
 
+ * @brief Sets the internal driver reference to the tx buffer.
 
+ *
 
+ * This function can be called from the tx callback to provide the driver
 
+ * with a new buffer, for continuous transmission.
 
+ *
 
+ * @param Channel  Flexio Uart channel number
 
+ * @param TxData  source buffer containing 8-bit data chars to send
 
+ * @param TxSize  the number of bytes to send
 
+ * @return FLEXIO_UART_IP_STATUS_SUCCESS
 
+ */
 
+Flexio_Uart_Ip_StatusType Flexio_Uart_Ip_SetTxBuffer(const uint8 Channel,
 
+                                                     const uint8 * TxData,
 
+                                                     const uint32 TxSize);
 
+
 
+/*!
 
+ * @brief Sets the internal driver reference to the rx buffer.
 
+ *
 
+ * This function can be called from the rx callback to provide the driver
 
+ * with a new buffer, for continuous reception.
 
+ *
 
+ * @param Channel  FLEXIO channel number
 
+ * @param RxData  destination buffer containing 8-bit data chars to receive
 
+ * @param RxSize  the number of bytes to receive
 
+ * @return FLEXIO_UART_IP_STATUS_SUCCESS
 
+ */
 
+Flexio_Uart_Ip_StatusType Flexio_Uart_Ip_SetRxBuffer(const uint8 Channel,
 
+                                                           uint8 * RxData,
 
+                                                     const uint32 RxSize);
 
+
 
+
 
+#define UART_STOP_SEC_CODE
 
+#include "Uart_MemMap.h"
 
+#endif /* (FLEXIO_UART_IP_IS_USING == STD_ON) */
 
+#if defined(__cplusplus)
 
+}
 
+#endif
 
+
 
+/*! @}*/
 
+
 
+#endif /* FLEXIO_UART_IP_H */

+ 416 - 0
RTD/include/Flexio_Uart_Ip_HwAccess.h
Vedi File 

@@ -0,0 +1,416 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXIO
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef FLEXIO_UART_IP_HWACCESS_H__
 
+#define FLEXIO_UART_IP_HWACCESS_H__
 
+
 
+/**
 
+*   @file
 
+*   @internal
 
+*   @defgroup flexio_ip Flexio IPL
 
+*   @addtogroup  flexio_ip Flexio  IPL
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "StandardTypes.h"
 
+#include "Flexio_Uart_Ip_Types.h"
 
+#include "OsIf.h"
 
+#ifdef FLEXIO_UART_IP_IS_USING
 
+    #if (FLEXIO_UART_IP_IS_USING == STD_ON)
 
+        #include "Flexio_Mcl_Ip_HwAccess.h"
 
+    #endif /* (FLEXIO_UART_IP_IS_USING == STD_ON) */
 
+#endif /* #ifdef FLEXIO_UART_IP_IS_USING */
 
+/*==================================================================================================
 
+*                                 SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXIO_UART_IP_HWACCESS_VENDOR_ID                    43
 
+#define FLEXIO_UART_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION     4
 
+#define FLEXIO_UART_IP_HWACCESS_AR_RELEASE_MINOR_VERSION     4
 
+#define FLEXIO_UART_IP_HWACCESS_AR_RELEASE_REVISION_VERSION  0
 
+#define FLEXIO_UART_IP_HWACCESS_SW_MAJOR_VERSION             1
 
+#define FLEXIO_UART_IP_HWACCESS_SW_MINOR_VERSION             0
 
+#define FLEXIO_UART_IP_HWACCESS_SW_PATCH_VERSION             0
 
+
 
+/* Checks against Flexio_Uart_Ip_Types.h */
 
+#if (FLEXIO_UART_IP_HWACCESS_VENDOR_ID != FLEXIO_UART_IP_TYPES_VENDOR_ID)
 
+    #error "Flexio_Uart_Ip_HwAccess.h and Flexio_Uart_Ip_Types.h have different vendor ids"
 
+#endif
 
+#if ((FLEXIO_UART_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION    != FLEXIO_UART_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FLEXIO_UART_IP_HWACCESS_AR_RELEASE_MINOR_VERSION    != FLEXIO_UART_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
 
+     (FLEXIO_UART_IP_HWACCESS_AR_RELEASE_REVISION_VERSION != FLEXIO_UART_IP_TYPES_AR_RELEASE_REVISION_VERSION))
 
+     #error "AUTOSAR Version Numbers of Flexio_Uart_Ip_HwAccess.h and Flexio_Uart_Ip_Types.h are different"
 
+#endif
 
+#if ((FLEXIO_UART_IP_HWACCESS_SW_MAJOR_VERSION != FLEXIO_UART_IP_TYPES_SW_MAJOR_VERSION) || \
 
+     (FLEXIO_UART_IP_HWACCESS_SW_MINOR_VERSION != FLEXIO_UART_IP_TYPES_SW_MINOR_VERSION) || \
 
+     (FLEXIO_UART_IP_HWACCESS_SW_PATCH_VERSION != FLEXIO_UART_IP_TYPES_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Flexio_Uart_Ip_HwAccess.h and Flexio_Uart_Ip_Types.h are different"
 
+#endif
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+/* Check if current file and StandardTypes.h header file are of the same Autosar version */
 
+    #if ((FLEXIO_UART_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
 
+        (FLEXIO_UART_IP_HWACCESS_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION))
 
+        #error "Flexio_Uart_Ip_HwAccess.h and StandardTypes.h are different"
 
+    #endif
 
+    /* Check if current file and OsIf.h header file are of the same Autosar version */
 
+    #if ((FLEXIO_UART_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION != OSIF_AR_RELEASE_MAJOR_VERSION) || \
 
+         (FLEXIO_UART_IP_HWACCESS_AR_RELEASE_MINOR_VERSION != OSIF_AR_RELEASE_MINOR_VERSION))
 
+        #error "Flexio_Uart_Ip_HwAccess.h and OsIf.h are different"
 
+    #endif
 
+#ifdef FLEXIO_UART_IP_IS_USING
 
+    #if (FLEXIO_UART_IP_IS_USING == STD_ON)
 
+        /* Checks against Flexio_Mcl_Ip_HwAccess.h */
 
+        #if ((FLEXIO_UART_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION    != FLEXIO_IP_HW_ACCESS_AR_RELEASE_MAJOR_VERSION_H) || \
 
+            (FLEXIO_UART_IP_HWACCESS_AR_RELEASE_MINOR_VERSION    != FLEXIO_IP_HW_ACCESS_AR_RELEASE_MINOR_VERSION_H))
 
+            #error "AUTOSAR Version Numbers of Flexio_Uart_Ip_HwAccess.h and Flexio_Mcl_Ip_HwAccess.h are different"
 
+        #endif
 
+    #endif /* (FLEXIO_UART_IP_IS_USING == STD_ON) */
 
+#endif /* #ifdef FLEXIO_UART_IP_IS_USING */
 
+#endif
 
+
 
+#ifdef FLEXIO_UART_IP_IS_USING
 
+#if (FLEXIO_UART_IP_IS_USING == STD_ON)
 
+ /*******************************************************************************
 
+ * Definitions
 
+ ******************************************************************************/
 
+
 
+/*******************************************************************************
 
+ * API
 
+ ******************************************************************************/
 
+
 
+#define UART_START_SEC_CODE
 
+#include "Uart_MemMap.h"
 
+
 
+/*
 
+ * This function sets the following configurations for the specified Shifter:
 
+ * start bit, stop bit, input Source
 
+ */
 
+static inline void Flexio_Uart_Ip_SetShifterConfig(FLEXIO_Type * Base,
 
+                                               uint8 Shifter,
 
+                                               Flexio_Mcl_Ip_ShifterStartType Start,
 
+                                               Flexio_Mcl_Ip_ShifterStopType Stop,
 
+                                               Flexio_Mcl_Ip_ShifterSourceType Source)
 
+{
 
+    Base->SHIFTCFG[Shifter] = FLEXIO_SHIFTCFG_SSTART(Start)
 
+                             | FLEXIO_SHIFTCFG_SSTOP(Stop)
 
+                             | FLEXIO_SHIFTCFG_INSRC(Source);
 
+}
 
+
 
+/*
 
+ * This function configures the control settings for the specified Shifter: mode settings
 
+ * and timer settings.
 
+ */
 
+static inline void Flexio_Uart_Ip_SetShifterControl(FLEXIO_Type * Base,
 
+                                                uint8 Shifter,
 
+                                                Flexio_Mcl_Ip_ShifterModeType Mode,
 
+                                                uint8 Timer,
 
+                                                Flexio_Mcl_Ip_TimerPolarityType TimerPolarity)
 
+{
 
+    Base->SHIFTCTL[Shifter] = (Base->SHIFTCTL[Shifter] & ~(FLEXIO_SHIFTCTL_SMOD_MASK)) | FLEXIO_SHIFTCTL_SMOD(Mode);
 
+    Base->SHIFTCTL[Shifter] = (Base->SHIFTCTL[Shifter] & ~(FLEXIO_SHIFTCTL_TIMPOL_MASK)) | FLEXIO_SHIFTCTL_TIMPOL(TimerPolarity);
 
+    Base->SHIFTCTL[Shifter] = (Base->SHIFTCTL[Shifter] & ~(FLEXIO_SHIFTCTL_TIMSEL_MASK)) | FLEXIO_SHIFTCTL_TIMSEL(Timer);
 
+}
 
+
 
+/*
 
+ * This function configures the control settings for the specified Shifter: pin settings.
 
+ */
 
+static inline void Flexio_Uart_Ip_SetPinShifterControl(FLEXIO_Type * Base,
 
+                                                    uint8 Shifter,
 
+                                                    uint8 Pin,
 
+                                                    Flexio_Mcl_Ip_PinPolarityType PinPolarity,
 
+                                                    Flexio_Mcl_Ip_PinConfigType PinConfig)
 
+{
 
+    Base->SHIFTCTL[Shifter] = (Base->SHIFTCTL[Shifter] & ~(FLEXIO_SHIFTCTL_PINPOL_MASK)) | FLEXIO_SHIFTCTL_PINPOL(PinPolarity);
 
+    Base->SHIFTCTL[Shifter] = (Base->SHIFTCTL[Shifter] & ~(FLEXIO_SHIFTCTL_PINSEL_MASK)) | FLEXIO_SHIFTCTL_PINSEL(Pin);
 
+    Base->SHIFTCTL[Shifter] = (Base->SHIFTCTL[Shifter] & ~(FLEXIO_SHIFTCTL_PINCFG_MASK)) | FLEXIO_SHIFTCTL_PINCFG(PinConfig);
 
+}
 
+
 
+/*
 
+ * This function configures the compare value for the specified timer.
 
+ * The timer compare value is loaded into the timer counter when the timer is first enabled,
 
+ * when the timer is reset and when the timer decrements down to zero.
 
+ * In dual 8-bit counters baud/bit mode, the lower 8-bits configure the baud rate divider
 
+ * and the upper 8-bits configure the number of bits in each word.
 
+ * In dual 8-bit counters PWM mode, the lower 8-bits configure the high period of the output
 
+ * and the upper 8-bits configure the low period.
 
+ * In 16-bit counter mode, the compare value can be used to generate the baud rate divider
 
+ * (if shift clock source is timer output) or the number of bits in each word (when the shift
 
+ * clock source is a pin or trigger input).
 
+ */
 
+static inline void Flexio_Uart_Ip_SetTimerCompare(FLEXIO_Type * Base,
 
+                                             uint8 Timer,
 
+                                             uint16 Value)
 
+{
 
+    Base->TIMCMP[Timer] = (uint32)Value;
 
+}
 
+
 
+/*
 
+ * This function sets the following configurations for the specified timer:
 
+ * Reset condition, Decrement condition, initial output
 
+ */
 
+static inline void Flexio_Uart_Ip_SetTimerConfig(FLEXIO_Type * Base,
 
+                                                uint8 Timer,
 
+                                                Flexio_Mcl_Ip_TimerResetType Reset,
 
+                                                Flexio_Uart_Ip_TimerDecrementType Decrement,
 
+                                                Flexio_Mcl_Ip_TimerOutputType Output)
 
+{
 
+    Base->TIMCFG[Timer] = (Base->TIMCFG[Timer] & ~(FLEXIO_TIMCFG_TIMRST_MASK)) | FLEXIO_TIMCFG_TIMRST(Reset);
 
+    Base->TIMCFG[Timer] = (Base->TIMCFG[Timer] & ~(FLEXIO_TIMCFG_TIMDEC_MASK)) | FLEXIO_TIMCFG_TIMDEC(Decrement);
 
+    Base->TIMCFG[Timer] = (Base->TIMCFG[Timer] & ~(FLEXIO_TIMCFG_TIMOUT_MASK)) | FLEXIO_TIMCFG_TIMOUT(Output);
 
+}
 
+
 
+/*
 
+ * This function sets the following configurations for the specified timer:
 
+ * Start bit, Stop bit
 
+ */
 
+static inline void Flexio_Uart_Ip_SetTimerStartStopBitConfig(FLEXIO_Type * Base,
 
+                                                            uint8 Timer,
 
+                                                            Flexio_Mcl_Ip_TimerStartType Start,
 
+                                                            Flexio_Mcl_Ip_TimerStopType Stop)
 
+{
 
+    Base->TIMCFG[Timer] = (Base->TIMCFG[Timer] & ~(FLEXIO_TIMCFG_TSTART_MASK)) | FLEXIO_TIMCFG_TSTART(Start);
 
+    Base->TIMCFG[Timer] = (Base->TIMCFG[Timer] & ~(FLEXIO_TIMCFG_TSTOP_MASK)) | FLEXIO_TIMCFG_TSTOP(Stop);
 
+}
 
+
 
+/*
 
+ * This function sets the following configurations for the specified timer:
 
+ * Enable condition, disable condition,
 
+ */
 
+static inline void Flexio_Uart_Ip_SetTimerCondition(FLEXIO_Type * Base,
 
+                                                    uint8 Timer,
 
+                                                    Flexio_Mcl_Ip_TimerEnableType Enable,
 
+                                                    Flexio_Mcl_Ip_TimerDisableType Disable)
 
+{
 
+    Base->TIMCFG[Timer] = (Base->TIMCFG[Timer] & ~(FLEXIO_TIMCFG_TIMENA_MASK)) | FLEXIO_TIMCFG_TIMENA(Enable);
 
+    Base->TIMCFG[Timer] = (Base->TIMCFG[Timer] & ~(FLEXIO_TIMCFG_TIMDIS_MASK)) | FLEXIO_TIMCFG_TIMDIS(Disable);
 
+}
 
+
 
+/*
 
+ * This function configures the control settings for the specified timer: mode settings.
 
+ */
 
+static inline void Flexio_Uart_Ip_SetTimerControl(FLEXIO_Type * Base,
 
+                                                  uint8 Timer,
 
+                                                  Flexio_Mcl_Ip_TimerModeType Mode)
 
+{
 
+    Base->TIMCTL[Timer] = (Base->TIMCTL[Timer] & ~(FLEXIO_TIMCTL_TIMOD_MASK)) | FLEXIO_TIMCTL_TIMOD(Mode);
 
+}
 
+
 
+/*
 
+ * This function configures the control settings for the specified timer: trigger settings.
 
+ */
 
+static inline void Flexio_Uart_Ip_SetTimerTrigger(FLEXIO_Type * Base,
 
+                                                  uint8 Timer,
 
+                                                  uint8 Trigger,
 
+                                                  Flexio_Mcl_Ip_TriggerPolarityType TriggerPolarity,
 
+                                                  Flexio_Mcl_Ip_TriggerSourceType TriggerSource)
 
+{
 
+    Base->TIMCTL[Timer] = (Base->TIMCTL[Timer] & ~(FLEXIO_TIMCTL_TRGSRC_MASK)) | FLEXIO_TIMCTL_TRGSRC(TriggerSource);
 
+    Base->TIMCTL[Timer] = (Base->TIMCTL[Timer] & ~(FLEXIO_TIMCTL_TRGPOL_MASK)) | FLEXIO_TIMCTL_TRGPOL(TriggerPolarity);
 
+    Base->TIMCTL[Timer] = (Base->TIMCTL[Timer] & ~(FLEXIO_TIMCTL_TRGSEL_MASK)) | FLEXIO_TIMCTL_TRGSEL(Trigger);
 
+}
 
+
 
+/*
 
+ * This function configures the control settings for the specified timer:
 
+ * pin settings.
 
+ */
 
+static inline void Flexio_Uart_Ip_SetPinTimerControl(FLEXIO_Type * Base,
 
+                                                    uint8 Timer,
 
+                                                    uint8 Pin,
 
+                                                    Flexio_Mcl_Ip_PinPolarityType PinPolarity,
 
+                                                    Flexio_Mcl_Ip_PinConfigType PinConfig)
 
+{
 
+    Base->TIMCTL[Timer] = (Base->TIMCTL[Timer] & ~(FLEXIO_TIMCTL_PINSEL_MASK)) | FLEXIO_TIMCTL_PINSEL(Pin);
 
+    Base->TIMCTL[Timer] = (Base->TIMCTL[Timer] & ~(FLEXIO_TIMCTL_PINPOL_MASK)) | FLEXIO_TIMCTL_PINPOL(PinPolarity);
 
+    Base->TIMCTL[Timer] = (Base->TIMCTL[Timer] & ~(FLEXIO_TIMCTL_PINCFG_MASK)) | FLEXIO_TIMCTL_PINCFG(PinConfig);
 
+}
 
+
 
+/*
 
+ * This function configures the mode for the specified timer.
 
+ * In 8-bit counter mode, the lower 8-bits of the counter and compare register are used to
 
+ * configure the baud rate of the timer shift clock and the upper 8-bits are used to configure
 
+ * the shifter bit count.
 
+ * In 8-bit PWM mode, the lower 8-bits of the counter and compare
 
+ * register are used to configure the high period of the timer shift clock and the upper
 
+ * 8-bits are used to configure the low period of the timer shift clock. The shifter bit count
 
+ * is configured using another timer or external signal.
 
+ * In 16-bit counter mode, the full 16-bits of the counter and compare register are used to
 
+ * configure either the baud rate of the shift clock or the shifter bit count.
 
+ */
 
+static inline void Flexio_Uart_Ip_SetTimerMode(FLEXIO_Type * Base,
 
+                                               uint8 Timer,
 
+                                               Flexio_Mcl_Ip_TimerModeType Mode)
 
+{
 
+    Base->TIMCTL[Timer] = (Base->TIMCTL[Timer] & ~(FLEXIO_TIMCTL_TIMOD_MASK)) | FLEXIO_TIMCTL_TIMOD(Mode);
 
+}
 
+
 
+/*
 
+ * This function configures the mode for the specified shifter.
 
+ */
 
+static inline void Flexio_Uart_Ip_SetShifterMode(FLEXIO_Type * Base,
 
+                                                 uint8 Shifter,
 
+                                                 Flexio_Mcl_Ip_ShifterModeType Mode)
 
+{
 
+    Base->SHIFTCTL[Shifter] = (Base->SHIFTCTL[Shifter] & ~(FLEXIO_SHIFTCTL_SMOD_MASK)) | FLEXIO_SHIFTCTL_SMOD(Mode);
 
+}
 
+
 
+/*
 
+ * This function configures the sending or receiving of
 
+ * a start bit in Transmit, Receive or Match Store modes.
 
+ */
 
+static inline void Flexio_Uart_Ip_SetShifterStartBit(FLEXIO_Type * Base,
 
+                                                     uint8 Shifter,
 
+                                                     Flexio_Mcl_Ip_ShifterStartType Start)
 
+{
 
+    Base->SHIFTCFG[Shifter] = (Base->SHIFTCFG[Shifter] & ~(FLEXIO_SHIFTCFG_SSTART_MASK)) | FLEXIO_SHIFTCFG_SSTART(Start);
 
+}
 
+
 
+/*
 
+ * This function writes data in the specified shifter buffer.
 
+ */
 
+static inline void Flexio_Uart_Ip_WriteShifterBuffer(FLEXIO_Type * Base,
 
+                                                     uint8 Shifter,
 
+                                                     uint32 Value)
 
+{
 
+    Base->SHIFTBUF[Shifter] = Value;
 
+}
 
+
 
+/*
 
+ * This function reads data from the specified shifter buffer.
 
+ */
 
+static inline uint32 Flexio_Uart_Ip_ReadShifterBuffer(const FLEXIO_Type * Base,
 
+                                                      uint8 Shifter)
 
+{
 
+    uint32 Data;
 
+
 
+    Data = Base->SHIFTBUF[Shifter];
 
+    return Data;
 
+}
 
+
 
+/*
 
+ * Returns the state of the interrupt for corresponding timer.
 
+ */
 
+static inline boolean Flexio_Uart_Ip_GetTimerInterrupt(const FLEXIO_Type * Base, uint8 Timer)
 
+{
 
+    boolean RetStatus;
 
+    uint32 RegValue = (uint32)Base->TIMIEN;
 
+
 
+    RegValue = (RegValue >> Timer) & 1U;
 
+    if(RegValue != 0U)
 
+    {
 
+        RetStatus = TRUE;
 
+    }
 
+    else
 
+    {
 
+        RetStatus = FALSE;
 
+    }
 
+    return RetStatus;
 
+}
 
+
 
+/*
 
+ * Returns the state of the error interrupt for corresponding shifter.
 
+ */
 
+static inline boolean Flexio_Uart_Ip_GetShifterErrorInterrupt(const FLEXIO_Type * Base, uint8 Shifter)
 
+{
 
+    boolean RetStatus;
 
+    uint32 RegValue = (uint32)Base->SHIFTEIEN;
 
+
 
+    RegValue = (RegValue >> Shifter) & 1U;
 
+    if(RegValue != 0U)
 
+    {
 
+        RetStatus = TRUE;
 
+    }
 
+    else
 
+    {
 
+        RetStatus = FALSE;
 
+    }
 
+    return RetStatus;
 
+}
 
+
 
+/*
 
+ * Returns the state of the interrupt for corresponding shifter.
 
+ */
 
+static inline boolean Flexio_Uart_Ip_GetShifterInterrupt(const FLEXIO_Type * Base, uint8 Shifter)
 
+{
 
+    boolean RetStatus;
 
+    uint32 RegValue = (uint32)Base->SHIFTSIEN;
 
+
 
+    RegValue = (RegValue >> Shifter) & 1U;
 
+    if(RegValue != 0U)
 
+    {
 
+        RetStatus = TRUE;
 
+    }
 
+    else
 
+    {
 
+        RetStatus = FALSE;
 
+    }
 
+    return RetStatus;
 
+}
 
+
 
+/**
 
+ * @brief   : Prepare for timeout checking
 
+ * @internal
 
+ * @return  : None
 
+ */
 
+static inline void Flexio_Uart_Ip_StartTimeout(uint32 *StartTimeOut, uint32 *TimeoutTicksOut, uint32 TimeoutUs, OsIf_CounterType OsifCounter)
 
+{
 
+    *StartTimeOut    = OsIf_GetCounter(OsifCounter);
 
+    *TimeoutTicksOut = OsIf_MicrosToTicks(TimeoutUs, OsifCounter);
 
+}
 
+
 
+/**
 
+ * @brief   : Checks for timeout condition
 
+ * @internal
 
+ * @return  TRUE     Timeout occurs
 
+ *          FALSE    Timeout does not occur
 
+ */
 
+static inline boolean Flexio_Uart_Ip_CheckTimeout(uint32 * StartTime, uint32 * ElapsedTicks, uint32 TimeoutTicks, OsIf_CounterType OsifCounter)
 
+{
 
+    uint32 CurrentElapsedTicks = OsIf_GetElapsed(StartTime, OsifCounter);
 
+    *ElapsedTicks += CurrentElapsedTicks;
 
+    return ((*ElapsedTicks >= TimeoutTicks) ? TRUE : FALSE);
 
+}
 
+
 
+#define UART_STOP_SEC_CODE
 
+#include "Uart_MemMap.h"
 
+
 
+#endif /* (FLEXIO_UART_IP_IS_USING == STD_ON) */
 
+#endif /* #ifdef FLEXIO_UART_IP_IS_USING */
 
+
 
+#if defined(__cplusplus)
 
+}
 
+#endif
 
+
 
+/*! @}*/
 
+
 
+#endif /* FLEXIO_UART_IP_HWACCESS_H__ */

+ 164 - 0
RTD/include/Flexio_Uart_Ip_Irq.h
Vedi File 

@@ -0,0 +1,164 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXIO
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef FLEXIO_UART_IP_IRQ_H
 
+#define FLEXIO_UART_IP_IRQ_H
 
+
 
+/**
 
+*   @file
 
+*   @defgroup flexio_uart_ip Flexio UART IPL
 
+*   @addtogroup  flexio_uart_ip Flexio UART IPL
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+
 
+#include "Flexio_Uart_Ip_Defines.h"
 
+/*==================================================================================================
 
+*                                 SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXIO_UART_IP_IRQ_VENDOR_ID                    43
 
+#define FLEXIO_UART_IP_IRQ_AR_RELEASE_MAJOR_VERSION     4
 
+#define FLEXIO_UART_IP_IRQ_AR_RELEASE_MINOR_VERSION     4
 
+#define FLEXIO_UART_IP_IRQ_AR_RELEASE_REVISION_VERSION  0
 
+#define FLEXIO_UART_IP_IRQ_SW_MAJOR_VERSION             1
 
+#define FLEXIO_UART_IP_IRQ_SW_MINOR_VERSION             0
 
+#define FLEXIO_UART_IP_IRQ_SW_PATCH_VERSION             0
 
+
 
+/*==================================================================================================
 
+*                                       FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Checks against Flexio_Uart_Ip_Defines.h */
 
+#if (FLEXIO_UART_IP_IRQ_VENDOR_ID != FLEXIO_UART_IP_DEFINES_VENDOR_ID)
 
+    #error "Flexio_Uart_Ip_Irq.h and Flexio_Uart_Ip_Defines.h have different vendor ids"
 
+#endif
 
+#if ((FLEXIO_UART_IP_IRQ_AR_RELEASE_MAJOR_VERSION    != FLEXIO_UART_IP_DEFINES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FLEXIO_UART_IP_IRQ_AR_RELEASE_MINOR_VERSION    != FLEXIO_UART_IP_DEFINES_AR_RELEASE_MINOR_VERSION) || \
 
+     (FLEXIO_UART_IP_IRQ_AR_RELEASE_REVISION_VERSION != FLEXIO_UART_IP_DEFINES_AR_RELEASE_REVISION_VERSION))
 
+     #error "AUTOSAR Version Numbers of Flexio_Uart_Ip_Irq.h and Flexio_Uart_Ip_Defines.h are different"
 
+#endif
 
+#if ((FLEXIO_UART_IP_IRQ_SW_MAJOR_VERSION != FLEXIO_UART_IP_DEFINES_SW_MAJOR_VERSION) || \
 
+     (FLEXIO_UART_IP_IRQ_SW_MINOR_VERSION != FLEXIO_UART_IP_DEFINES_SW_MINOR_VERSION) || \
 
+     (FLEXIO_UART_IP_IRQ_SW_PATCH_VERSION != FLEXIO_UART_IP_DEFINES_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Flexio_Uart_Ip_Irq.h and Flexio_Uart_Ip_Defines.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                            CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                  STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                  GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#ifdef FLEXIO_UART_IP_IS_USING
 
+#if (FLEXIO_UART_IP_IS_USING == STD_ON)
 
+#define UART_START_SEC_CODE
 
+#include "Uart_MemMap.h"
 
+
 
+/*FUNCTION**********************************************************************
 
+ *
 
+ * Function Name : Flexio_Uart_Ip_IrqHandler
 
+ * Description   : Implementation of Flexio interrupt handler
 
+ *
 
+ ******************************************************************************/
 
+void Flexio_Uart_Ip_IrqHandler(uint8 Channel, uint8 ShifterMaskFlag, uint8 ShifterErrorMaskFlag, uint8 TimerMaskFlag);
 
+
 
+#if (FLEXIO_UART_IP_HAS_DMA_ENABLED == STD_ON)
 
+#if (FLEXIO_UART_IP_NUMBER_OF_SHIFTER_AND_TIMER > 0U)
 
+void Flexio_0_Uart_Ip_DmaRxCompleteCallback(void);
 
+void Flexio_0_Uart_Ip_DmaTxCompleteCallback(void);
 
+#endif
 
+
 
+#if (FLEXIO_UART_IP_NUMBER_OF_SHIFTER_AND_TIMER > 1U)
 
+void Flexio_1_Uart_Ip_DmaRxCompleteCallback(void);
 
+void Flexio_1_Uart_Ip_DmaTxCompleteCallback(void);
 
+#endif
 
+
 
+#if (FLEXIO_UART_IP_NUMBER_OF_SHIFTER_AND_TIMER > 2U)
 
+void Flexio_2_Uart_Ip_DmaRxCompleteCallback(void);
 
+void Flexio_2_Uart_Ip_DmaTxCompleteCallback(void);
 
+#endif
 
+
 
+#if (FLEXIO_UART_IP_NUMBER_OF_SHIFTER_AND_TIMER > 3U)
 
+void Flexio_3_Uart_Ip_DmaRxCompleteCallback(void);
 
+void Flexio_3_Uart_Ip_DmaTxCompleteCallback(void);
 
+#endif
 
+
 
+#if (FLEXIO_UART_IP_NUMBER_OF_SHIFTER_AND_TIMER > 4U)
 
+void Flexio_4_Uart_Ip_DmaRxCompleteCallback(void);
 
+void Flexio_4_Uart_Ip_DmaTxCompleteCallback(void);
 
+#endif
 
+
 
+#if (FLEXIO_UART_IP_NUMBER_OF_SHIFTER_AND_TIMER > 5U)
 
+void Flexio_5_Uart_Ip_DmaRxCompleteCallback(void);
 
+void Flexio_5_Uart_Ip_DmaTxCompleteCallback(void);
 
+#endif
 
+
 
+#if (FLEXIO_UART_IP_NUMBER_OF_SHIFTER_AND_TIMER > 6U)
 
+void Flexio_6_Uart_Ip_DmaRxCompleteCallback(void);
 
+void Flexio_6_Uart_Ip_DmaTxCompleteCallback(void);
 
+#endif
 
+
 
+#if (FLEXIO_UART_IP_NUMBER_OF_SHIFTER_AND_TIMER > 7U)
 
+void Flexio_7_Uart_Ip_DmaRxCompleteCallback(void);
 
+void Flexio_7_Uart_Ip_DmaTxCompleteCallback(void);
 
+#endif
 
+#endif /*(FLEXIO_UART_IP_HAS_DMA_ENABLED == STD_ON)*/
 
+
 
+
 
+#define UART_STOP_SEC_CODE
 
+#include "Uart_MemMap.h"
 
+
 
+#endif /* (FLEXIO_UART_IP_IS_USING == STD_ON) */
 
+#endif /* #ifdef FLEXIO_UART_IP_IS_USING */
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+
 
+/** @} */
 
+
 
+#endif /* FLEXIO_UART_IP_IRQ_H */

+ 277 - 0
RTD/include/Flexio_Uart_Ip_Types.h
Vedi File 

@@ -0,0 +1,277 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXIO
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef FLEXIO_UART_IP_TYPES_H
 
+#define FLEXIO_UART_IP_TYPES_H
 
+
 
+/**
 
+*   @file
 
+*   @defgroup flexio_uart_ip Flexio UART IPL
 
+*   @addtogroup  flexio_uart_ip Flexio UART IPL
 
+*   @{
 
+*/
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "StandardTypes.h"
 
+#include "Flexio_Uart_Ip_Defines.h"
 
+/*==================================================================================================
 
+*                                 SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FLEXIO_UART_IP_TYPES_VENDOR_ID                    43
 
+#define FLEXIO_UART_IP_TYPES_AR_RELEASE_MAJOR_VERSION     4
 
+#define FLEXIO_UART_IP_TYPES_AR_RELEASE_MINOR_VERSION     4
 
+#define FLEXIO_UART_IP_TYPES_AR_RELEASE_REVISION_VERSION  0
 
+#define FLEXIO_UART_IP_TYPES_SW_MAJOR_VERSION             1
 
+#define FLEXIO_UART_IP_TYPES_SW_MINOR_VERSION             0
 
+#define FLEXIO_UART_IP_TYPES_SW_PATCH_VERSION             0
 
+
 
+
 
+/*==================================================================================================
 
+*                                       FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Checks against Flexio_Uart_Ip_Defines.h */
 
+#if (FLEXIO_UART_IP_DEFINES_VENDOR_ID != FLEXIO_UART_IP_TYPES_VENDOR_ID)
 
+    #error "Flexio_Uart_Ip_Defines.h and Flexio_Uart_Ip_Types.h have different vendor ids"
 
+#endif
 
+#if ((FLEXIO_UART_IP_DEFINES_AR_RELEASE_MAJOR_VERSION    != FLEXIO_UART_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FLEXIO_UART_IP_DEFINES_AR_RELEASE_MINOR_VERSION    != FLEXIO_UART_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
 
+     (FLEXIO_UART_IP_DEFINES_AR_RELEASE_REVISION_VERSION != FLEXIO_UART_IP_TYPES_AR_RELEASE_REVISION_VERSION))
 
+     #error "AUTOSAR Version Numbers of Flexio_Uart_Ip_Defines.h and Flexio_Uart_Ip_Types.h are different"
 
+#endif
 
+#if ((FLEXIO_UART_IP_DEFINES_SW_MAJOR_VERSION != FLEXIO_UART_IP_TYPES_SW_MAJOR_VERSION) || \
 
+     (FLEXIO_UART_IP_DEFINES_SW_MINOR_VERSION != FLEXIO_UART_IP_TYPES_SW_MINOR_VERSION) || \
 
+     (FLEXIO_UART_IP_DEFINES_SW_PATCH_VERSION != FLEXIO_UART_IP_TYPES_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Flexio_Uart_Ip_Defines.h and Flexio_Uart_Ip_Types.h are different"
 
+#endif
 
+/* Check if current file and StandardTypes.h header file are of the same Autosar version */
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    #if ((FLEXIO_UART_IP_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
 
+            (FLEXIO_UART_IP_TYPES_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION))
 
+        #error "Flexio_Uart_Ip_Types.h and StandardTypes.h are different"
 
+    #endif
 
+#endif
 
+/*==================================================================================================
 
+*                                            CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       TYPES AND MACROS
 
+==================================================================================================*/
 
+
 
+/** Number of instances of the FLEXIO module. */
 
+#define FLEXIO_INSTANCE_COUNT                    (1u)
 
+
 
+/** FLEXIO Instance support . */
 
+#define FLEXIO_HW_INSTANCE                       (0u)
 
+/*==================================================================================================
 
+*                                              ENUMS
 
+==================================================================================================*/
 
+
 
+/*! @brief Driver type: Interrupts/DMA
 
+ * Implements : Flexio_Uart_IP_DriverType_Class
 
+ */
 
+typedef enum
 
+{
 
+    FLEXIO_UART_IP_DRIVER_TYPE_INTERRUPTS    = 0U,  /*!< Driver uses interrupts for data transfers */
 
+    FLEXIO_UART_IP_DRIVER_TYPE_DMA           = 1U,  /*!< Driver uses DMA for data transfers */
 
+} Flexio_Uart_IP_DriverType;
 
+
 
+ /*!
 
+ * @brief flexio_uart driver direction (tx or rx)
 
+ *
 
+ * This structure describes the direction configuration options for the flexio_uart driver.
 
+ * Implements : flexio_uart_driver_direction_t_Class
 
+ */
 
+typedef enum
 
+{
 
+    FLEXIO_UART_IP_DIRECTION_TX       = 0x01U,    /*!< Tx UART driver */
 
+    FLEXIO_UART_IP_DIRECTION_RX       = 0x00U,    /*!< Rx UART driver */
 
+} Flexio_Uart_Ip_DirectionType;
 
+
 
+/**
 
+ * @brief Define the enum of the Events which can trigger UART callback
 
+ *
 
+ * This enum should include the Events for all platforms
 
+ *
 
+ *
 
+ */
 
+typedef enum
 
+{
 
+    FLEXIO_UART_IP_EVENT_RX_FULL      = 0x00U,    /**< @brief Rx buffer is full */
 
+    FLEXIO_UART_IP_EVENT_TX_EMPTY     = 0x01U,    /**< @brief Tx buffer is empty */
 
+    FLEXIO_UART_IP_EVENT_END_TRANSFER = 0x02U,    /**< @brief The current transfer is ending */
 
+    FLEXIO_UART_IP_EVENT_ERROR        = 0x03U,    /**< @brief An error occured during transfer */
 
+} Flexio_Uart_Ip_EventType;
 
+
 
+ /*!
 
+ * Implements : Driver status type.
 
+ */
 
+typedef enum
 
+{
 
+    /* UART specific error codes */
 
+    FLEXIO_UART_IP_STATUS_SUCCESS                     = 0x000U,
 
+    FLEXIO_UART_IP_STATUS_ERROR                       = 0x001U,
 
+    FLEXIO_UART_IP_STATUS_BUSY                        = 0x002U,
 
+    FLEXIO_UART_IP_STATUS_RECEIVED_NACK               = 0x200U,  /*!< NACK signal received  */
 
+    FLEXIO_UART_IP_STATUS_TX_UNDERRUN                 = 0x201U,  /*!< TX underrun error */
 
+    FLEXIO_UART_IP_STATUS_RX_OVERRUN                  = 0x202U,  /*!< RX overrun error */
 
+    FLEXIO_UART_IP_STATUS_ARBITRATION_LOST            = 0x203U,  /*!< Arbitration lost */
 
+    FLEXIO_UART_IP_STATUS_ABORTED                     = 0x204U,  /*!< A transfer was aborted */
 
+    FLEXIO_UART_IP_STATUS_BUS_BUSY                    = 0x205U,  /*!< UART bus is busy, cannot start transfer */
 
+    FLEXIO_UART_IP_STATUS_TIMEOUT                     = 0x206U,
 
+    FLEXIO_UART_IP_STATUS_UNSUPPORTED                 = 0x207U
 
+}Flexio_Uart_Ip_StatusType;
 
+
 
+/**
 
+ * @brief Define the enum of the baudrate values that should be set for Uart
 
+ *
 
+ */
 
+
 
+typedef enum
 
+{
 
+    FLEXIO_UART_BAUDRATE_1200   = 1200U,
 
+    FLEXIO_UART_BAUDRATE_2400   = 2400U,
 
+    FLEXIO_UART_BAUDRATE_4800   = 4800U,
 
+    FLEXIO_UART_BAUDRATE_7200   = 7200U,
 
+    FLEXIO_UART_BAUDRATE_9600   = 9600U,
 
+    FLEXIO_UART_BAUDRATE_14400  = 14400U,
 
+    FLEXIO_UART_BAUDRATE_19200  = 19200U,
 
+    FLEXIO_UART_BAUDRATE_28800  = 28800U,
 
+    FLEXIO_UART_BAUDRATE_38400  = 38400U,
 
+    FLEXIO_UART_BAUDRATE_57600  = 57600U,
 
+    FLEXIO_UART_BAUDRATE_115200 = 115200U,
 
+    FLEXIO_UART_BAUDRATE_230400 = 230400U,
 
+    FLEXIO_UART_BAUDRATE_460800 = 460800U,
 
+    FLEXIO_UART_BAUDRATE_921600 = 921600U,
 
+    FLEXIO_UART_BAUDRATE_1843200 = 1843200U
 
+}Flexio_Uart_Ip_BaudrateType;
 
+
 
+
 
+/*! @brief FLEXIO Timer decrement options
 
+ *
 
+ *
 
+ */
 
+typedef enum
 
+{
 
+    FLEXIO_TIMER_DECREMENT_FXIO_CLK_SHIFT_TMR = 0x00U,  /*!< Decrement counter on FlexIO clock, Shift clock equals Timer output. */
 
+    FLEXIO_TIMER_DECREMENT_FXIO_CLK_DIV_16    = 0x04U,  /*!< Decrement counter on FlexIO clock divided by 16, Shift clock equals Timer output. */
 
+    FLEXIO_TIMER_DECREMENT_FXIO_CLK_DIV_256   = 0x05U,  /*!< Decrement counter on FlexIO clock divided by 256, Shift clock equals Timer output. */
 
+} Flexio_Uart_Ip_TimerDecrementType;
 
+
 
+/*! @brief FLEXIO number of bits in a character
 
+ *
 
+ *
 
+ */
 
+typedef enum
 
+{
 
+    FLEXIO_UART_IP_8_BITS_PER_CHAR  = 0x8U /*!< 8-bit data characters */
 
+} Flexio_Uart_Ip_BitCountPerCharType;
 
+
 
+/*==================================================================================================
 
+*                                  STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*!
 
+ * @brief Driver internal context structure
 
+ *
 
+ * This structure is used by the flexio_uart driver for its internal logic. It must
 
+ * be provided by the application through the Flexio_Uart_Ip_Init() function, then
 
+ * it cannot be freed until the driver is de-initialized using Flexio_Uart_Ip_Deinit().
 
+ * The application should make no assumptions about the content of this structure.
 
+ */
 
+/*! @cond DRIVER_INTERNAL_USE_ONLY */
 
+
 
+/**
 
+ * @brief Callback for all peripherals which support UART features
 
+ *
 
+ *
 
+ */
 
+typedef void (*Flexio_Uart_Ip_CallbackType)(const uint32 HwChannel,
 
+                                            const Flexio_Uart_Ip_EventType Event,
 
+                                            void *UserData);
 
+/*!
 
+ * @brief Runtime  of the FLEXIO driver.
 
+ *
 
+ * Note that the caller provides memory for the driver  structures during
 
+ * initialization because the driver does not statically allocate memory.
 
+ *
 
+ * Implements : Flexio_Uart_Ip_StateStructureType
 
+ */
 
+typedef struct
 
+{
 
+/*! @cond DRIVER_INTERNAL_USE_ONLY */
 
+    volatile uint8 * RxData;                                /**< @brief Receive buffer. */
 
+    volatile const uint8 * TxData;                          /**< @brief Transmit buffer. */
 
+    volatile uint32 RemainingBytes;                       /**< @brief Number of remaining bytes to be transferred. */
 
+    uint32 BaudRate;                                      /**< @brief Baud rate in hertz */
 
+    volatile Flexio_Uart_Ip_StatusType Status;              /**< @brief Current status of the driver */
 
+    volatile boolean DriverIdle;                            /**< @brief Idle/busy state of the receiver */
 
+    uint8 TxFlush;                                         /**< @brief Used for flushing Tx buffer before ending a transmission */
 
+/*! @endcond */
 
+} Flexio_Uart_Ip_StateStructureType;
 
+
 
+ /*!
 
+ * @brief Driver configuration structure
 
+ *
 
+ * This structure is used to provide configuration parameters for the flexio_uart driver at initialization time.
 
+ * Implements : Flexio_Uart_Ip_UserConfigType_Class
 
+ */
 
+typedef struct
 
+{
 
+    uint32 Channel;                                /**< @brief Flexio Uart Channel has been configured. Note that Make sure
 
+                                                                  the Channel is used in all API corresponds to this parameter */
 
+    Flexio_Uart_IP_DriverType DriverType;            /**< @brief Driver type: Interrupts/DMA */
 
+    uint8 Divider;                                  /**< @brief Baudrate divider */
 
+    Flexio_Uart_Ip_TimerDecrementType TimerDec;      /**< @brief The source of the Timer decrement and the source of the Shift clock */
 
+    uint32 BaudRate;                               /**< @brief Baud rate in hertz */
 
+    Flexio_Uart_Ip_BitCountPerCharType BitCount;     /**< @brief Number of bits per word */
 
+    Flexio_Uart_Ip_DirectionType Direction;          /**< @brief Driver direction: Tx or Rx */
 
+    uint8 DataPin;                                  /**< @brief Flexio pin to use as Tx or Rx pin */
 
+    Flexio_Uart_Ip_CallbackType Callback;           /**< @brief User callback function. Note that this function will be
 
+                                                                 called from the interrupt service routine, so its
 
+                                                                 execution time should be as small as possible. It can be
 
+                                                                 NULL_PTR if it is not needed */
 
+    void *CallbackParam;                             /**< @brief Parameter for the callback function */
 
+#if (FLEXIO_UART_IP_HAS_DMA_ENABLED == STD_ON)
 
+    uint8 DmaChannel;                               /**< @brief DMA channel number. Only used in DMA mode */
 
+#endif
 
+    Flexio_Uart_Ip_StateStructureType *StateStruct;
 
+} Flexio_Uart_Ip_UserConfigType;
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/**  @} */
 
+
 
+#endif /* FLEXIO_UART_IP_TYPES_H */

+ 127 - 0
RTD/include/Ftm_Mcl_Ip.h
Vedi File 

@@ -0,0 +1,127 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+/**
 
+ *   @file       Ftm_Mcl_Ip.h
 
+ *
 
+ *   @version    1.0.0
 
+ *
 
+ *   @brief      AUTOSAR Mcl - Ftm Common driver header file.
 
+ *
 
+ *   @addtogroup FTM_IP_DRIVER FTM IP Driver
 
+ *   @{
 
+ */
 
+
 
+#ifndef FTM_MCL_IP_H
 
+#define FTM_MCL_IP_H
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "StandardTypes.h"
 
+#include "Ftm_Mcl_Ip_Cfg.h"
 
+
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define FTM_MCL_IP_VENDOR_ID_H                    43
 
+#define FTM_MCL_IP_AR_RELEASE_MAJOR_VERSION_H     4
 
+#define FTM_MCL_IP_AR_RELEASE_MINOR_VERSION_H     4
 
+#define FTM_MCL_IP_AR_RELEASE_REVISION_VERSION_H  0
 
+#define FTM_MCL_IP_SW_MAJOR_VERSION_H             1
 
+#define FTM_MCL_IP_SW_MINOR_VERSION_H             0
 
+#define FTM_MCL_IP_SW_PATCH_VERSION_H             0
 
+
 
+/*==================================================================================================
 
+*                                     FILE VERSION CHECKS
 
+==================================================================================================*/
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    /* Check if header file and StandardTypes.h are of the same AUTOSAR version */
 
+    #if ((FTM_MCL_IP_AR_RELEASE_MAJOR_VERSION_H != STD_AR_RELEASE_MAJOR_VERSION) || \
 
+         (FTM_MCL_IP_AR_RELEASE_MINOR_VERSION_H != STD_AR_RELEASE_MINOR_VERSION))
 
+        #error "AUTOSAR Version Numbers of Ftm_Mcl_Ip.h and StandardTypes.h are different"
 
+    #endif
 
+#endif
 
+
 
+/* Check if header file and Ftm_Mcl_Ip_Cfg header file are of the same vendor. */
 
+#if (FTM_MCL_IP_VENDOR_ID_H != FTM_MCL_IP_CFG_VENDOR_ID)
 
+    #error "Vendor IDs of Ftm_Mcl_Ip.h and Ftm_Mcl_Ip_Cfg.h are different."
 
+#endif
 
+
 
+/* Check if header file and Ftm_Mcl_Ip_Cfg header file are of the same AUTOSAR version. */
 
+#if ((FTM_MCL_IP_AR_RELEASE_MAJOR_VERSION_H    != FTM_MCL_IP_CFG_AR_RELEASE_MAJOR_VERSION) || \
 
+     (FTM_MCL_IP_AR_RELEASE_MINOR_VERSION_H    != FTM_MCL_IP_CFG_AR_RELEASE_MINOR_VERSION) || \
 
+     (FTM_MCL_IP_AR_RELEASE_REVISION_VERSION_H != FTM_MCL_IP_CFG_AR_RELEASE_REVISION_VERSION))
 
+    #error "AUTOSAR version numbers of Ftm_Mcl_Ip.h and Ftm_Mcl_Ip_Cfg.h are different."
 
+#endif
 
+
 
+/* Check if header file and Ftm_Mcl_Ip_Cfg header file are of the same software version */
 
+#if ((FTM_MCL_IP_SW_MAJOR_VERSION_H != FTM_MCL_IP_CFG_SW_MAJOR_VERSION) || \
 
+     (FTM_MCL_IP_SW_MINOR_VERSION_H != FTM_MCL_IP_CFG_SW_MINOR_VERSION) || \
 
+     (FTM_MCL_IP_SW_PATCH_VERSION_H != FTM_MCL_IP_CFG_SW_PATCH_VERSION))
 
+    #error "Software version numbers of Ftm_Mcl_Ip.h and Ftm_Mcl_Ip_Cfg.h are different."
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#if (FTM_MCL_SELECT_COMMON_TIMEBASE_API == STD_ON)
 
+#define MCL_START_SEC_CODE
 
+#include "Mcl_MemMap.h"
 
+
 
+/**
 
+ * @brief       Implementation specific function to updates the Global Timebase bits of configured modules.
 
+ * @details     This function is used to set the global timebase bits for modules that support
 
+ *              the global timebase feature. The function selects the module that gives the common timebase
 
+ *              and the modules that are use this timebase (as bits in syncList).
 
+ *              Then it synchronizes the modules.
 
+ *              example:
 
+ *                     syncList is 0x0003 - modules 0 and 1 use the timebase given by instance
 
+ *                     syncList is 0x0005 - modules 0 and 2 use the timebase given by instance
 
+ *
 
+ * @param[in]   instance  FTM module id
 
+ * @param[in]   syncList  FTM module mask value
 
+ * @return      void
 
+ */
 
+void Ftm_Mcl_Ip_SelectCommonTimebase(uint8 instance, uint32 syncList);
 
+
 
+#define MCL_STOP_SEC_CODE
 
+#include "Mcl_MemMap.h"
 
+#endif /* FTM_MCL_SELECT_COMMON_TIMEBASE_API */
 
+
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+/** @} */
 
+
 
+#endif /* FTM_MCL_IP_H */

+ 273 - 0
RTD/include/Gpio_Dio_Ip.h
Vedi File 

@@ -0,0 +1,273 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : GPIO
 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef GPIO_DIO_IP_H
 
+#define GPIO_DIO_IP_H
 
+
 
+/**
 
+*   @file @file Gpio_Dio_Ip.h
 
+*
 
+*   @defgroup DIO_IPL Dio IPL
 
+*   @{
 
+*/
 
+
 
+#if defined(__cplusplus)
 
+extern "C" {
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "StandardTypes.h"
 
+#include "Gpio_Dio_Ip_Cfg.h"
 
+
 
+/*=================================================================================================
 
+*                               SOURCE FILE VERSION INFORMATION
 
+=================================================================================================*/
 
+
 
+#define GPIO_DIO_IP_VENDOR_ID_H                     43
 
+#define GPIO_DIO_IP_AR_RELEASE_MAJOR_VERSION_H      4
 
+#define GPIO_DIO_IP_AR_RELEASE_MINOR_VERSION_H      4
 
+#define GPIO_DIO_IP_AR_RELEASE_REVISION_VERSION_H   0
 
+#define GPIO_DIO_IP_SW_MAJOR_VERSION_H              1
 
+#define GPIO_DIO_IP_SW_MINOR_VERSION_H              0
 
+#define GPIO_DIO_IP_SW_PATCH_VERSION_H              0
 
+
 
+/*=================================================================================================
 
+                                      FILE VERSION CHECKS
 
+=================================================================================================*/
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    /* Check if Gpio_Dio_Ip header file and StandardTypes.h header file are of the same release version */
 
+    #if ((GPIO_DIO_IP_AR_RELEASE_MAJOR_VERSION_H != STD_AR_RELEASE_MAJOR_VERSION) || \
 
+        (GPIO_DIO_IP_AR_RELEASE_MINOR_VERSION_H != STD_AR_RELEASE_MINOR_VERSION)     \
 
+        )
 
+        #error "AutoSar Version Numbers of Gpio_Dio_Ip.h and StandardTypes.h are different"
 
+    #endif
 
+#endif
 
+
 
+/* Check if Gpio_Dio_Ip header file and Gpio_Dio_Ip_Cfg configuration header file are of the same vendor */
 
+#if (GPIO_DIO_IP_VENDOR_ID_H != GPIO_DIO_IP_VENDOR_ID_CFG_H)
 
+    #error "Gpio_Dio_Ip.h and Gpio_Dio_Ip_Cfg.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if Gpio_Dio_Ip header file and Gpio_Dio_Ip_Cfg configuration header file are of the same Autosar version */
 
+#if ((GPIO_DIO_IP_AR_RELEASE_MAJOR_VERSION_H    != GPIO_DIO_IP_AR_RELEASE_MAJOR_VERSION_CFG_H) || \
 
+     (GPIO_DIO_IP_AR_RELEASE_MINOR_VERSION_H    != GPIO_DIO_IP_AR_RELEASE_MINOR_VERSION_CFG_H) || \
 
+     (GPIO_DIO_IP_AR_RELEASE_REVISION_VERSION_H != GPIO_DIO_IP_AR_RELEASE_REVISION_VERSION_CFG_H) \
 
+    )
 
+    #error "AutoSar Version Numbers of Gpio_Dio_Ip.h and Gpio_Dio_Ip_Cfg.h are different"
 
+#endif
 
+
 
+/* Check if Gpio_Dio_Ip header file and Gpio_Dio_Ip_Cfg configuration header file are of the same Software version */
 
+#if ((GPIO_DIO_IP_SW_MAJOR_VERSION_H != GPIO_DIO_IP_SW_MAJOR_VERSION_CFG_H) || \
 
+     (GPIO_DIO_IP_SW_MINOR_VERSION_H != GPIO_DIO_IP_SW_MINOR_VERSION_CFG_H) || \
 
+     (GPIO_DIO_IP_SW_PATCH_VERSION_H != GPIO_DIO_IP_SW_PATCH_VERSION_CFG_H)    \
 
+    )
 
+    #error "Software Version Numbers of Gpio_Dio_Ip.h and Gpio_Dio_Ip_Cfg.h are different"
 
+#endif
 
+
 
+/*=================================================================================================
 
+*                                          CONSTANTS
 
+=================================================================================================*/
 
+
 
+
 
+/*=================================================================================================
 
+*                                      DEFINES AND MACROS
 
+=================================================================================================*/
 
+#define GPIO_DIO_IP_CHANNEL_MASK_U32                                ((uint32)0x1F)
 
+#define GPIO_DIO_IP_PORTID_SHIFT_U8                                 ((uint8)5U)
 
+
 
+#define GPIO_DIO_IP_PORT_U32(channel)                               ((uint32)((uint32)(channel)>>GPIO_DIO_IP_PORTID_SHIFT_U8))
 
+
 
+#define GPIO_DIO_IP_CHANNEL_U32(channel)                            ((uint32)((uint32)(channel)&GPIO_DIO_IP_CHANNEL_MASK_U32))
 
+
 
+/*=================================================================================================
 
+*                                             ENUMS
 
+=================================================================================================*/
 
+
 
+
 
+/*=================================================================================================
 
+*                                STRUCTURES AND OTHER TYPEDEFS
 
+=================================================================================================*/
 
+/*!
 
+ * @brief Type of a GPIO channel representation
 
+ * Implements : Gpio_Dio_Ip_PinsChannelType_Class
 
+ */
 
+typedef uint32 Gpio_Dio_Ip_PinsChannelType;
 
+
 
+/*!
 
+ * @brief Type of a port levels representation.
 
+ * Implements : Gpio_Dio_Ip_PinsLevelType_Class
 
+ */
 
+typedef uint8 Gpio_Dio_Ip_PinsLevelType;
 
+
 
+/*=================================================================================================
 
+*                                GLOBAL VARIABLE DECLARATIONS
 
+=================================================================================================*/
 
+#define DIO_START_SEC_VAR_INIT_32
 
+#include "Dio_MemMap.h"
 
+
 
+extern uint32 GpioBaseAdresses[GPIO_INSTANCE_COUNT];
 
+
 
+#define DIO_STOP_SEC_VAR_INIT_32
 
+#include "Dio_MemMap.h"
 
+
 
+/*=================================================================================================
 
+*                                    FUNCTION PROTOTYPES
 
+=================================================================================================*/
 
+
 
+#define DIO_START_SEC_CODE
 
+#include "Dio_MemMap.h"
 
+/*!
 
+ * @brief Write a pin of a port with a given value
 
+ *
 
+ * This function writes the given pin from a port, with the given value
 
+ * ('0' represents LOW, '1' represents HIGH).
 
+ *
 
+ * @param base  GPIO base pointer (PTA, PTB, PTC, etc.)
 
+ * @param pin pin number to be written
 
+ * @param value pin value to be written
 
+ *        - 0: corresponding pin is set to LOW
 
+ *        - 1: corresponding pin is set to HIGH
 
+ */
 
+void Gpio_Dio_Ip_WritePin(GPIO_Type * const base,
 
+                       Gpio_Dio_Ip_PinsChannelType pin,
 
+                       Gpio_Dio_Ip_PinsLevelType value);
 
+
 
+/*!
 
+ * @brief Write all pins of a port
 
+ *
 
+ * This function writes all pins configured as output with the values given in
 
+ * the parameter pins. '0' represents LOW, '1' represents HIGH.
 
+ *
 
+ * @param[in] base GPIO base pointer (PTA, PTB, PTC, etc.)
 
+ * @param[in] pins Pin mask to be written
 
+ *        - 0: corresponding pin is set to LOW
 
+ *        - 1: corresponding pin is set to HIGH
 
+ */
 
+void Gpio_Dio_Ip_WritePins(GPIO_Type * const base,
 
+                        Gpio_Dio_Ip_PinsChannelType pins);
 
+
 
+/*!
 
+ * @brief Get the current output from a port
 
+ *
 
+ * This function returns the current output that is written to a port. Only pins
 
+ * that are configured as output will have meaningful values.
 
+ *
 
+ * @param[in] base GPIO base pointer (PTA, PTB, PTC, etc.)
 
+ * @return GPIO outputs. Each bit represents one pin (LSB is pin 0, MSB is pin
 
+ * 31). For each bit:
 
+ *        - 0: corresponding pin is set to LOW
 
+ *        - 1: corresponding pin is set to HIGH
 
+ */
 
+Gpio_Dio_Ip_PinsChannelType Gpio_Dio_Ip_GetPinsOutput(const GPIO_Type * const base);
 
+
 
+/*!
 
+ * @brief Write pins with 'Set' value
 
+ *
 
+ * This function configures output pins listed in parameter pins (bits that are
 
+ * '1') to have a value of 'set' (HIGH). Pins corresponding to '0' will be
 
+ * unaffected.
 
+ *
 
+ * @param[in] base GPIO base pointer (PTA, PTB, PTC, etc.)
 
+ * @param[in] pins Pin mask of bits to be set. Each bit represents one pin (LSB is
 
+ * pin 0, MSB is pin 31). For each bit:
 
+ *        - 0: corresponding pin is unaffected
 
+ *        - 1: corresponding pin is set to HIGH
 
+ */
 
+void Gpio_Dio_Ip_SetPins(GPIO_Type * const base,
 
+                      Gpio_Dio_Ip_PinsChannelType pins);
 
+
 
+/*!
 
+ * @brief Write pins to 'Clear' value
 
+ *
 
+ * This function configures output pins listed in parameter pins (bits that are
 
+ * '1') to have a 'cleared' value (LOW). Pins corresponding to '0' will be
 
+ * unaffected.
 
+ *
 
+ * @param[in] base GPIO base pointer (PTA, PTB, PTC, etc.)
 
+ * @param[in] pins Pin mask of bits to be cleared. Each bit represents one pin (LSB
 
+ * is pin 0, MSB is pin 31). For each bit:
 
+ *        - 0: corresponding pin is unaffected
 
+ *        - 1: corresponding pin is cleared(set to LOW)
 
+ */
 
+void Gpio_Dio_Ip_ClearPins(GPIO_Type * const base,
 
+                        Gpio_Dio_Ip_PinsChannelType pins);
 
+
 
+/*!
 
+ * @brief Toggle pins value
 
+ *
 
+ * This function toggles output pins listed in parameter pins (bits that are
 
+ * '1'). Pins corresponding to '0' will be unaffected.
 
+ *
 
+ * @param[in] base GPIO base pointer (PTA, PTB, PTC, etc.)
 
+ * @param[in] pins Pin mask of bits to be toggled.  Each bit represents one pin (LSB
 
+ * is pin 0, MSB is pin 31). For each bit:
 
+ *        - 0: corresponding pin is unaffected
 
+ *        - 1: corresponding pin is toggled
 
+ */
 
+void Gpio_Dio_Ip_TogglePins(GPIO_Type * const base,
 
+                         Gpio_Dio_Ip_PinsChannelType pins);
 
+
 
+/*!
 
+ * @brief Read input pins
 
+ *
 
+ * This function returns the current input values from a port. Only pins
 
+ * configured as input will have meaningful values.
 
+ *
 
+ * @param[in] base GPIO base pointer (PTA, PTB, PTC, etc.)
 
+ * @return GPIO inputs. Each bit represents one pin (LSB is pin 0, MSB is pin
 
+ * 31). For each bit:
 
+ *        - 0: corresponding pin is read as LOW
 
+ *        - 1: corresponding pin is read as HIGH
 
+ */
 
+Gpio_Dio_Ip_PinsChannelType Gpio_Dio_Ip_ReadPins(const GPIO_Type * const base);
 
+
 
+/*!
 
+ * @brief Read input pin
 
+ *
 
+ * This function returns the current  input value of the given pin from port. Only pin
 
+ * configured as input will have meaningful value.
 
+ *
 
+ * @param[in] base GPIO base pointer (PTA, PTB, PTC, etc.)
 
+ * @param[in] pin Pin index (0,1,2,3,..,15)
 
+ * @return GPIO input value for coressponding pin
 
+ *        - 0: corresponding pin is read as LOW
 
+ *        - 1: corresponding pin is read as HIGH
 
+ */
 
+Gpio_Dio_Ip_PinsLevelType Gpio_Dio_Ip_ReadPin(const GPIO_Type * const base, Gpio_Dio_Ip_PinsChannelType pin);
 
+
 
+
 
+#define DIO_STOP_SEC_CODE
 
+#include "Dio_MemMap.h"
 
+
 
+#ifdef __cplusplus
 
+}
 
+#endif
 
+
 
+#endif /* DIO_GPIO_H */
 
+/** @} */

+ 359 - 0
RTD/include/IntCtrl_Ip.h
Vedi File 

@@ -0,0 +1,359 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef INTCTRL_IP_H_
 
+#define INTCTRL_IP_H_
 
+
 
+/**
 
+*   @file
 
+*
 
+*   @defgroup   IntCtrl_Ip Interrupt Controller IP
 
+*   @ingroup    Platform
 
+*
 
+*   @addtogroup IntCtrl_Ip
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+==================================================================================================*/
 
+#include "IntCtrl_Ip_Cfg.h"
 
+#include "Devassert.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define PLATFORM_INTCTRL_IP_VENDOR_ID                          43
 
+#define PLATFORM_INTCTRL_IP_SW_MAJOR_VERSION                   1
 
+#define PLATFORM_INTCTRL_IP_SW_MINOR_VERSION                   0
 
+#define PLATFORM_INTCTRL_IP_SW_PATCH_VERSION                   0
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and IntCtrl_Ip_Cfg header file are of the same vendor */
 
+#if (PLATFORM_INTCTRL_IP_VENDOR_ID != PLATFORM_INTCTRL_IP_CFG_VENDOR_ID)
 
+    #error "IntCtrl_Ip.h and IntCtrl_Ip_Cfg.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if current file and IntCtrl_Ip_Cfg header file are of the same Software version */
 
+#if ((PLATFORM_INTCTRL_IP_SW_MAJOR_VERSION != PLATFORM_INTCTRL_IP_CFG_SW_MAJOR_VERSION) || \
 
+     (PLATFORM_INTCTRL_IP_SW_MINOR_VERSION != PLATFORM_INTCTRL_IP_CFG_SW_MINOR_VERSION) || \
 
+     (PLATFORM_INTCTRL_IP_SW_PATCH_VERSION != PLATFORM_INTCTRL_IP_CFG_SW_PATCH_VERSION) \
 
+    )
 
+    #error "Software Version Numbers of IntCtrl_Ip.h and IntCtrl_Ip_Cfg.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                      FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+
 
+#if defined(__cplusplus)
 
+extern "C" {
 
+#endif /* __cplusplus*/
 
+
 
+#define PLATFORM_START_SEC_CODE
 
+#include "Platform_MemMap.h"
 
+
 
+/**
 
+ * @brief         Initializes the configured interrupts at interrupt controller level.
 
+ *
 
+ * @details       This function is non-reentrant and initializes the interrupts.
 
+ *
 
+ * @param[in]     pIntCtrlCtrlConfig: pointer to configuration structure for interrupts.
 
+ * @return        IntCtrl_Ip_StatusType: error code.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+IntCtrl_Ip_StatusType IntCtrl_Ip_Init(const IntCtrl_Ip_CtrlConfigType *pIntCtrlCtrlConfig);
 
+
 
+#if (INT_CTRL_IP_MSCM_SYSTEM_INTERRUPT_ROUTER == STD_ON)
 
+/**
 
+ * @brief         Initializes the configured routing interrupts .
 
+ *
 
+ * @details       This function is non-reentrant and initializes the routing interrupts.
 
+ *
 
+ * @param[in]     routeConfig: pointer to configuration structure for interrupts.
 
+ * @return        IntCtrl_Ip_StatusType: error code.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+IntCtrl_Ip_StatusType IntCtrl_Ip_ConfigIrqRouting(const IntCtrl_Ip_GlobalRouteConfigType *routeConfig);
 
+#endif
 
+
 
+/**
 
+ * @brief         Installs a handler for an IRQ.
 
+ *
 
+ * @details       This function is non-reentrant; it installs an new ISR for an interrupt line.
 
+ * @note          This function works only when the interrupt vector table resides in RAM.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number.
 
+ * @param[in]     pfNewHandler: function pointer for the new handler.
 
+ * @param[out]    pfOldHandler: stores the address of the old interrupt handler.
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_InstallHandler(IRQn_Type eIrqNumber,
 
+                               const IntCtrl_Ip_IrqHandlerType pfNewHandler,
 
+                               IntCtrl_Ip_IrqHandlerType* const pfOldHandler);
 
+
 
+/**
 
+ * @brief         Enables an interrupt request.
 
+ *
 
+ * @details       This function is non-reentrant; it enables the interrupt request at
 
+ *                interrupt controller level.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number to be enabled.
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_EnableIrq(IRQn_Type eIrqNumber);
 
+
 
+/**
 
+ * @brief         Disables an interrupt request.
 
+ *
 
+ * @details       This function is non-reentrant; it disables the interrupt request at
 
+ *                interrupt controller level.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number to be disabled.
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_DisableIrq(IRQn_Type eIrqNumber);
 
+
 
+/**
 
+ * @brief         Sets the priority for an interrupt request.
 
+ *
 
+ * @details       This function is non-reentrant; it sets the priority for the
 
+ *                interrupt request.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number for which the priority is set.
 
+ * @param[in]     u8Priority: the priority to be set.
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_SetPriority(IRQn_Type eIrqNumber, uint8 u8Priority);
 
+
 
+/**
 
+ * @brief         Gets the priority for an interrupt request.
 
+ *
 
+ * @details       This function is non-reentrant; it retrieves the priority for the
 
+ *                interrupt request.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number for which the priority is set.
 
+ * @return        uint8: the priority of the interrupt.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+uint8 IntCtrl_Ip_GetPriority(IRQn_Type eIrqNumber);
 
+
 
+/**
 
+ * @brief         Clears the pending flag for an interrupt request.
 
+ *
 
+ * @details       This function is reentrant; it clears the pending flag for the
 
+ *                interrupt request.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number for which the pending flag is cleared.
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_ClearPending(IRQn_Type eIrqNumber);
 
+
 
+#if (INT_CTRL_IP_CORTEXR == STD_ON)
 
+/**
 
+ * @brief         Set ID interrupt to group1.
 
+ *
 
+ * @details       This function is reentrant; it set the ID for the
 
+ *                interrupt request.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number for which ID need to write to group1.
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_Group1(IRQn_Type eIrqNumber);
 
+
 
+/**
 
+ * @brief         Configures the specified ID as being level or edge triggered for an interrupt.
 
+ *
 
+ * @details       This function is reentrant; the software must specify whether the interrupt is  edge-triggered or level-sensitive. SGIs are always
 
+ *                treated as edge-triggered, and therefore GICR_ICFGR0 behaves as Read-As-One, Writes Ignored (RAO/WI) for these
 
+ *                interrupts.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number for which configures the specified ID asbeing level or edge triggered for an interrupt.
 
+ * @param[in]     conf: Configure the interrupt to be edge-triggered or level-sensitive.
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_ConfigureSpi(IRQn_Type eIrqNumber, IntCtrl_Ip_TriggerType conf);
 
+
 
+/**
 
+ * @brief         Sets the target CPUs of the specified ID
 
+ *
 
+ * @details       This function is reentrant; The SPI is delivered to the PE A.B.C.D, which are the affinity co-ordinates specified in the register.                the affinity co-ordinates specified in the register
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number for which Sets the target CPUs.
 
+ * @param[in]     target: the target of the interrupt routing mode
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_SetIntTarget(IRQn_Type eIrqNumber, IntCtrl_Ip_Routing_ModeType target);
 
+#endif
 
+
 
+#if (INT_CTRL_IP_STANDALONE_APIS == STD_ON)
 
+/**
 
+ * @brief         Sets the pending flag for an interrupt request.
 
+ *
 
+ * @details       This function is reentrant; it sets the pending flag for the
 
+ *                interrupt request.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number for which the pending flag is set.
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_SetPending(IRQn_Type eIrqNumber);
 
+
 
+/**
 
+ * @brief         Gets the pending flag for an interrupt request.
 
+ *
 
+ * @details       This function is reentrant; it retrieves the pending flag for the
 
+ *                interrupt request.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number for which the pending flag is returned.
 
+ * @return        boolean: TRUE - pending flag set, FALSE - pending flag cleared.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+boolean IntCtrl_Ip_GetPending(IRQn_Type eIrqNumber);
 
+
 
+/**
 
+ * @brief         Gets the active flag for an interrupt request.
 
+ *
 
+ * @details       This function is reentrant; it retrieves the active flag for the
 
+ *                interrupt request.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number for which the active flag is returned.
 
+ * @return        boolean: TRUE - active flag set, FALSE - active flag cleared.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+#if !defined(S32K116) && !defined(S32K118)
 
+boolean IntCtrl_Ip_GetActive(IRQn_Type eIrqNumber);
 
+#endif
 
+#endif /* INT_CTRL_IP_STANDALONE_APIS*/
 
+
 
+#if ((INT_CTRL_IP_MSCM_SYSTEM_INTERRUPT_ROUTER == STD_ON) && (INT_CTRL_IP_ROUTING_CONTROL_REGISTER == STD_ON))
 
+/**
 
+ * @brief         Sets the target cores for an interrupt request.
 
+ *
 
+ * @details       This function is non-reentrant; it configures the target cores for the
 
+ *                interrupt request.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number for which the target cores are set.
 
+ * @param[in]     u8TargetCores: uint8 mask to defining the target cores.
 
+ * @note          u8TargetCores parameter encodes the CPU targets as defined in each platform
 
+ *                (see MSCM IRSPRCx register) - the function writes this value to the corresponding
 
+ *                IRSPRCx register directly.
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_SetTargetCores(IRQn_Type eIrqNumber, uint8 u8TargetCores);
 
+#endif
 
+
 
+#if (INT_CTRL_IP_MSI_AVAILABLE == STD_ON)
 
+/**
 
+ * @brief         Clear directed cpu Interrupt interrupt flag.
 
+ *
 
+ * @details       This function is non-reentrant; it is provided for clearing directed cpu Interrupt interrupt flag.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_ClearDirectedCpuInterrupt(IRQn_Type eIrqNumber);
 
+
 
+/**
 
+ * @brief         Get directed cpu Interrupt interrupt flag.
 
+ *
 
+ * @details       This function is non-reentrant; it is provided for getting directed cpu Interrupt interrupt flag.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number
 
+ * @return        boolean: TRUE - flag set, FALSE - flag cleared.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+boolean IntCtrl_Ip_GetDirectedCpuInterrupt(IRQn_Type eIrqNumber);
 
+
 
+/**
 
+ * @brief         Generates an interrupt request to a CPU target.
 
+ *
 
+ * @details       This function is non-reentrant; it is provided for generating a directed interrupt
 
+ *                to a CPU defined by target parameter.
 
+ *
 
+ * @param[in]     eIrqNumber: interrupt number to be triggered.
 
+ * @param[in]     eCpuTarget: target core for the interrupt request.
 
+ * @return        void.
 
+ *
 
+ * @api
 
+ *
 
+ * */
 
+void IntCtrl_Ip_GenerateDirectedCpuInterrupt(IRQn_Type eIrqNumber, IntCtrl_Ip_IrqTargetType eCpuTarget);
 
+#endif
 
+
 
+#define PLATFORM_STOP_SEC_CODE
 
+#include "Platform_MemMap.h"
 
+
 
+#if defined(__cplusplus)
 
+}
 
+#endif /* __cplusplus*/
 
+
 
+#endif /* INTCTRL_IP_H_ */
 
+
 
+/** @} */

+ 87 - 0
RTD/include/IntCtrl_Ip_DeviceRegisters.h
Vedi File 

@@ -0,0 +1,87 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef INTCTRL_IP_DEVICE_REGISTERS_H_
 
+#define INTCTRL_IP_DEVICE_REGISTERS_H_
 
+
 
+/**
 
+*   @file
 
+*
 
+*   @addtogroup IntCtrl_Ip
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+==================================================================================================*/
 
+#include "StandardTypes.h"
 
+#define PLATFORM_INTCTRL_IP_DEVICE_REGISTERS_TYPES_VENDOR_ID                    43
 
+#define PLATFORM_INTCTRL_IP_DEVICE_REGISTERS_SW_MAJOR_VERSION                   1
 
+#define PLATFORM_INTCTRL_IP_DEVICE_REGISTERS_SW_MINOR_VERSION                   0
 
+#define PLATFORM_INTCTRL_IP_DEVICE_REGISTERS_SW_PATCH_VERSION                   0
 
+#ifdef S32K116
 
+    #include "S32K116.h"
 
+#endif
 
+#ifdef S32K118
 
+    #include "S32K118.h"
 
+#endif
 
+#ifdef S32K142
 
+    #include "S32K142.h"
 
+#endif
 
+#ifdef S32K142W
 
+    #include "S32K142W.h"
 
+#endif
 
+#ifdef S32K144
 
+    #include "S32K144.h"
 
+#endif
 
+#ifdef S32K144W
 
+    #include "S32K144W.h"
 
+#endif
 
+#ifdef S32K146
 
+    #include "S32K146.h"
 
+#endif
 
+#ifdef S32K148
 
+    #include "S32K148.h"
 
+#endif
 
+#if !defined(S32K142) && !defined(S32K144) && !defined(S32K144W) && !defined(S32K146) && !defined(S32K148) && !defined(S32K118) && !defined(S32K116) && !defined(S32K142W) && !defined(S32K144W)
 
+    #error "Unknown Platform"
 
+#endif
 
+
 
+typedef struct {
 
+    __IO uint32_t IntStatusR;  /**< Interrupt Router CPn Interruptx Status Register, array offset: 0x200, index*0x20, index2*0x8 */
 
+    __O  uint32_t IGR;  /**< Interrupt Router CPn Interruptx Generation Register, array offset: 0x204, index*0x20, index2*0x8 */
 
+} MSCM_IRCP_IR_Type;
 
+
 
+typedef struct {
 
+    MSCM_IRCP_IR_Type IRCPnIRx[2][4];
 
+} MSCM_IRCPnIRx_Type;
 
+
 
+#define MSCM_IRCPnIRx ((MSCM_IRCPnIRx_Type*)&MSCM->IRCP0ISR0)
 
+
 
+
 
+
 
+
 
+#endif /* INTCTRL_IP_DEVICE_REGISTERS_H_ */
 
+
 
+/** @} */

+ 202 - 0
RTD/include/IntCtrl_Ip_TypesDef.h
Vedi File 

@@ -0,0 +1,202 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : 
+*   Dependencies         : none
 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef INTCTRL_IP_TYPESDEF_H_
 
+#define INTCTRL_IP_TYPESDEF_H_
 
+
 
+/**
 
+*   @file
 
+*
 
+*   @addtogroup IntCtrl_Ip
 
+*   @{
 
+*/
 
+
 
+/*==================================================================================================
 
+*                                        INCLUDE FILES
 
+==================================================================================================*/
 
+#include "IntCtrl_Ip_CfgDefines.h"
 
+/*==================================================================================================
 
+*                              SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define PLATFORM_INTCTRL_IP_TYPESDEF_TYPES_VENDOR_ID                    43
 
+#define PLATFORM_INTCTRL_IP_TYPESDEF_SW_MAJOR_VERSION                   1
 
+#define PLATFORM_INTCTRL_IP_TYPESDEF_SW_MINOR_VERSION                   0
 
+#define PLATFORM_INTCTRL_IP_TYPESDEF_SW_PATCH_VERSION                   0
 
+/*==================================================================================================
 
+                                      FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Check if current file and IntCtrl_Ip_CfgDefines header file are of the same vendor */
 
+#if (PLATFORM_INTCTRL_IP_TYPESDEF_TYPES_VENDOR_ID != PLATFORM_INTCTRL_IP_CFG_DEFINES_VENDOR_ID)
 
+    #error "IIntCtrl_Ip_TypesDef.h and IntCtrl_Ip_CfgDefines.h have different vendor ids"
 
+#endif
 
+
 
+/* Check if current file and Fls header file are of the same Software version */
 
+#if ((PLATFORM_INTCTRL_IP_TYPESDEF_SW_MAJOR_VERSION != PLATFORM_INTCTRL_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \
 
+     (PLATFORM_INTCTRL_IP_TYPESDEF_SW_MINOR_VERSION != PLATFORM_INTCTRL_IP_CFG_DEFINES_SW_MINOR_VERSION) || \
 
+     (PLATFORM_INTCTRL_IP_TYPESDEF_SW_PATCH_VERSION != PLATFORM_INTCTRL_IP_CFG_DEFINES_SW_PATCH_VERSION) \
 
+    )
 
+    #error "Software Version Numbers of IntCtrl_Ip_TypesDef.h and IntCtrl_Ip_CfgDefines.h are different"
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
 
+==================================================================================================*/
 
+/**
 
+* @brief          Interrupt handler type.
 
+* @implements     IntCtrl_Ip_IrqHandlerType_typedef
 
+*/
 
+typedef void (*IntCtrl_Ip_IrqHandlerType)(void);
 
+
 
+/**
 
+* @brief          Structure storing the routing and handler configuration for an interrupt request.
 
+* @implements     IntCtrl_Ip_IrqRouteConfigType_typedef
 
+*/
 
+typedef struct
 
+{
 
+    /** @brief Interrupt number */
 
+    IRQn_Type eIrqNumber;
 
+    /** @brief Target cores for the interrupt */
 
+    uint8 u8TargetCores;
 
+    /** @brief Interrupt handler */
 
+    IntCtrl_Ip_IrqHandlerType pfHandler;
 
+}IntCtrl_Ip_IrqRouteConfigType;
 
+
 
+/**
 
+* @brief          Structure storing the list of routing configurations for all configured interrupts.
 
+* @implements     IntCtrl_Ip_GlobalRouteConfigType_typedef
 
+*/
 
+typedef struct
 
+{
 
+    /** @brief Number of configured interrupts */
 
+    uint32 u32ConfigIrqCount;
 
+    /** @brief List of interrupts configurations */
 
+    const IntCtrl_Ip_IrqRouteConfigType *aIrqConfig;
 
+}IntCtrl_Ip_GlobalRouteConfigType;
 
+
 
+/**
 
+* @brief          Structure storing the state and priority configuration for an interrupt request.
 
+* @implements     IntCtrl_Ip_IrqConfigType_typedef
 
+*/
 
+typedef struct
 
+{
 
+    /** @brief Interrupt number */
 
+    IRQn_Type eIrqNumber;
 
+    /** @brief Interrupt state (enabled/disabled) */
 
+    boolean bIrqEnabled;
 
+    /** @brief Interrupt priority */
 
+    uint8 u8IrqPriority;
 
+}IntCtrl_Ip_IrqConfigType;
 
+
 
+/**
 
+* @brief          Structure storing the list of state configurations for all configured interrupts.
 
+* @implements     IntCtrl_Ip_CtrlConfigType_typedef
 
+*/
 
+typedef struct
 
+{
 
+    /** @brief Number of configured interrupts */
 
+    uint32 u32ConfigIrqCount;
 
+    /** @brief List of interrupts configurations */
 
+    const IntCtrl_Ip_IrqConfigType *aIrqConfig;
 
+}IntCtrl_Ip_CtrlConfigType;
 
+
 
+/**
 
+* @brief          Enumeration listing the possible error codes returned by IntCtrl_Ip API.
 
+* @implements     IntCtrl_Ip_StatusType_typedef
 
+*/
 
+typedef enum
 
+{
 
+    /** @brief Status SUCCESS */
 
+    INTCTRL_IP_STATUS_SUCCESS = 0U,
 
+    /** @brief Status ERROR */
 
+    INTCTRL_IP_STATUS_ERROR   = 1U
 
+}IntCtrl_Ip_StatusType;
 
+
 
+#if (INT_CTRL_IP_CORTEXR == STD_ON)
 
+/**
 
+* @brief          Enumeration listing the edge and level type by IntCtrl_Ip API.
 
+* @implements     IntCtrl_Ip_TriggerType_typedef
 
+*/
 
+typedef enum
 
+{
 
+    /** @brief EDGE_TRIGGER */
 
+    INTCTRL_IP_EDGE_TRIGGER = 0U,
 
+    /** @brief LEVEL_TRIGGER */
 
+    INTCTRL_IP_LEVEL_TRIGGER   = 1U
 
+}IntCtrl_Ip_TriggerType;
 
+
 
+/**
 
+* @brief          Enumeration listing the interrupt routing mode type by IntCtrl_Ip API.
 
+* @implements     IntCtrl_Ip_Routing_ModeType_typedef
 
+*/
 
+typedef enum
 
+{
 
+    /** @brief EDGE_TRIGGER */
 
+    INTCTRL_IP_ROUTING_MODE0 = 0U,
 
+    /** @brief LEVEL_TRIGGER */
 
+    INTCTRL_IP_ROUTING_MODE1   = 1U
 
+}IntCtrl_Ip_Routing_ModeType;
 
+#endif
 
+
 
+#if (INT_CTRL_IP_MSI_AVAILABLE == STD_ON)
 
+/**
 
+* @brief          Enumeration listing the available target cores for an inter-core interrupt.
 
+* @implements     IntCtrl_Ip_IrqTargetType_typedef
 
+*/
 
+typedef enum
 
+{
 
+    /** @brief Interrupt request targeted to the same core that triggers it */
 
+    INTCTRL_IP_TARGET_SELF       = -2,
 
+    /** @brief Interrupt request targeted to all the other cores */
 
+    INTCTRL_IP_TARGET_OTHERS     = -1,
 
+    /** @brief Interrupt request targeted to core 0 */
 
+    INTCTRL_IP_TARGET_CP0        =  0,
 
+    /** @brief Interrupt request targeted to core 1 */
 
+    INTCTRL_IP_TARGET_CP1        =  1,
 
+    #if (INTCTRL_IP_MSI_CORE_CNT > 2)
 
+    /** @brief Interrupt request targeted to core 2 */
 
+    INTCTRL_IP_TARGET_CP2        =  2,
 
+    #endif
 
+    #if (INTCTRL_IP_MSI_CORE_CNT > 3)
 
+    /** @brief Interrupt request targeted to core 3 */
 
+    INTCTRL_IP_TARGET_CP3        =  3,
 
+    #endif
 
+    #if (INTCTRL_IP_MSI_CORE_CNT > 4)
 
+    /** @brief Interrupt request targeted to core 4 */
 
+    INTCTRL_IP_TARGET_CP4        =  4,
 
+    #endif
 
+    #if (INTCTRL_IP_MSI_CORE_CNT > 5)
 
+    /** @brief Interrupt request targeted to core 5 */
 
+    INTCTRL_IP_TARGET_CP5        =  5,
 
+    #endif
 
+    #if (INTCTRL_IP_MSI_CORE_CNT > 6)
 
+    /** @brief Interrupt request targeted to core 6 */
 
+    INTCTRL_IP_TARGET_CP6        =  6
 
+    #endif
 
+} IntCtrl_Ip_IrqTargetType;
 
+#endif /* (INT_CTRL_IP_MSI_AVAILABLE == STD_ON) */
 
+
 
+#endif /* INTCTRL_IP_TYPESDEF_H_ */
 
+
 
+
 
+/** @} */

+ 371 - 0
RTD/include/Lpuart_Uart_Ip.h
Vedi File 

@@ -0,0 +1,371 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXIO
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef LPUART_UART_IP_H
 
+#define LPUART_UART_IP_H
 
+
 
+/**
 
+*   @file
 
+*   @defgroup lpuart_uart_ip Lpuart UART IPL
 
+*   @addtogroup  lpuart_uart_ip Lpuart UART IPL
 
+*   @{
 
+*/
 
+
 
+
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "Lpuart_Uart_Ip_Types.h"
 
+#include "Lpuart_Uart_Ip_Cfg.h"
 
+#include "Mcal.h"
 
+
 
+/*==================================================================================================
 
+*                                 SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define LPUART_UART_IP_VENDOR_ID                    43
 
+#define LPUART_UART_IP_AR_RELEASE_MAJOR_VERSION     4
 
+#define LPUART_UART_IP_AR_RELEASE_MINOR_VERSION     4
 
+#define LPUART_UART_IP_AR_RELEASE_REVISION_VERSION  0
 
+#define LPUART_UART_IP_SW_MAJOR_VERSION             1
 
+#define LPUART_UART_IP_SW_MINOR_VERSION             0
 
+#define LPUART_UART_IP_SW_PATCH_VERSION             0
 
+/*==================================================================================================
 
+*                                       FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Checks against Lpuart_Uart_Ip_Types.h */
 
+#if (LPUART_UART_IP_VENDOR_ID != LPUART_UART_IP_TYPES_VENDOR_ID)
 
+    #error "Lpuart_Uart_Ip.h and Lpuart_Uart_Ip_Types.h have different vendor ids"
 
+#endif
 
+#if ((LPUART_UART_IP_AR_RELEASE_MAJOR_VERSION    != LPUART_UART_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (LPUART_UART_IP_AR_RELEASE_MINOR_VERSION    != LPUART_UART_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
 
+     (LPUART_UART_IP_AR_RELEASE_REVISION_VERSION != LPUART_UART_IP_TYPES_AR_RELEASE_REVISION_VERSION))
 
+     #error "AUTOSAR Version Numbers of Lpuart_Uart_Ip.h and Lpuart_Uart_Ip_Types.h are different"
 
+#endif
 
+#if ((LPUART_UART_IP_SW_MAJOR_VERSION != LPUART_UART_IP_TYPES_SW_MAJOR_VERSION) || \
 
+     (LPUART_UART_IP_SW_MINOR_VERSION != LPUART_UART_IP_TYPES_SW_MINOR_VERSION) || \
 
+     (LPUART_UART_IP_SW_PATCH_VERSION != LPUART_UART_IP_TYPES_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Lpuart_Uart_Ip.h and Lpuart_Uart_Ip_Types.h are different"
 
+#endif
 
+
 
+/* Checks against Lpuart_Uart_Ip_Cfg.h */
 
+#if (LPUART_UART_IP_VENDOR_ID != LPUART_UART_IP_CFG_VENDOR_ID)
 
+    #error "Lpuart_Uart_Ip.h and Lpuart_Uart_Ip_Cfg.h have different vendor ids"
 
+#endif
 
+#if ((LPUART_UART_IP_AR_RELEASE_MAJOR_VERSION    != LPUART_UART_IP_CFG_AR_RELEASE_MAJOR_VERSION) || \
 
+     (LPUART_UART_IP_AR_RELEASE_MINOR_VERSION    != LPUART_UART_IP_CFG_AR_RELEASE_MINOR_VERSION) || \
 
+     (LPUART_UART_IP_AR_RELEASE_REVISION_VERSION != LPUART_UART_IP_CFG_AR_RELEASE_REVISION_VERSION))
 
+     #error "AUTOSAR Version Numbers of Lpuart_Uart_Ip.h and Lpuart_Uart_Ip_Cfg.h are different"
 
+#endif
 
+#if ((LPUART_UART_IP_SW_MAJOR_VERSION != LPUART_UART_IP_CFG_SW_MAJOR_VERSION) || \
 
+     (LPUART_UART_IP_SW_MINOR_VERSION != LPUART_UART_IP_CFG_SW_MINOR_VERSION) || \
 
+     (LPUART_UART_IP_SW_PATCH_VERSION != LPUART_UART_IP_CFG_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Lpuart_Uart_Ip.h and Lpuart_Uart_Ip_Cfg.h are different"
 
+#endif
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+    /* Checks against Mcal.h */
 
+    #if ((LPUART_UART_IP_AR_RELEASE_MAJOR_VERSION != MCAL_AR_RELEASE_MAJOR_VERSION) || \
 
+         (LPUART_UART_IP_AR_RELEASE_MINOR_VERSION != MCAL_AR_RELEASE_MINOR_VERSION))
 
+        #error "AUTOSAR Version Numbers of Lpuart_Uart_Ip.h and Mcal.h are different"
 
+    #endif
 
+#endif
 
+/*==================================================================================================
 
+*                                            CONSTANTS
 
+==================================================================================================*/
 
+#define UART_START_SEC_CONFIG_DATA_UNSPECIFIED
 
+#include "Uart_MemMap.h"
 
+/* Calling the external Configuration symbols defined by Lpuart_Uart_Ip_Cfg.h */
 
+LPUART_UART_IP_CONFIG_EXT
 
+#define UART_STOP_SEC_CONFIG_DATA_UNSPECIFIED
 
+#include "Uart_MemMap.h"
 
+/*==================================================================================================
 
+*                                       DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                              ENUMS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                  STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                  GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+#define UART_START_SEC_CODE
 
+#include "Uart_MemMap.h"
 
+/*!
 
+ * @brief Initializes an LPUART operation instance.
 
+ *
 
+ * The caller provides memory for the driver state structures during initialization.
 
+ * The user must select the LPUART clock source in the application to initialize the LPUART.
 
+ *
 
+ * @param Instance  LPUART instance number
 
+ * @param UserConfig user configuration structure of type #Lpuart_Uart_Ip_UserConfigType
 
+ * @return void
 
+ */
 
+void Lpuart_Uart_Ip_Init(const uint8 Instance, const Lpuart_Uart_Ip_UserConfigType * UserConfig);
 
+
 
+/*!
 
+ * @brief Shuts down the LPUART by disabling interrupts and transmitter/receiver.
 
+ *
 
+ * @param Instance  LPUART instance number
 
+ * @return void
 
+ */
 
+void Lpuart_Uart_Ip_Deinit(const uint8 Instance);
 
+
 
+
 
+/*!
 
+ * @brief Send out multiple bytes of data using polling method.
 
+ *
 
+ * @param   Instance  LPUART instance number.
 
+ * @param   TxBuff The buffer pointer which saves the data to be sent.
 
+ * @param   TxSize Size of data to be sent in unit of byte.
 
+ * @param   Timeout value in microseconds.
 
+ * @return  LPUART_UART_IP_STATUS_SUCCESS if successful;
 
+ *          LPUART_UART_IP_STATUS_BUSY if the resource is busy;
 
+ *          LPUART_UART_IP_STATUS_TIMEOUT if timeout occur
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_SyncSend(const uint8 Instance,
 
+                                                  const uint8 *TxBuff,
 
+                                                  const uint32 TxSize,
 
+                                                  const uint32 Timeout);
 
+
 
+/*!
 
+ * @brief Sends data out through the LPUART module using a non-blocking method.
 
+ *  This enables an a-sync method for transmitting data. When used with
 
+ *  a non-blocking receive, the LPUART can perform a full duplex operation.
 
+ *  Non-blocking  means that the function returns immediately.
 
+ *  The application has to get the transmit status to know when the transmit is complete.
 
+ *
 
+ * @param   Instance  LPUART instance number.
 
+ * @param   TxBuff The buffer pointer which saves the data to be sent.
 
+ * @param   TxSize Size of data to be sent in unit of byte.
 
+ * @return  LPUART_UART_IP_STATUS_SUCCESS if successful;
 
+ *          LPUART_UART_IP_STATUS_BUSY if the resource is busy;
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_AsyncSend(const uint8 Instance,
 
+                                                   const uint8 * TxBuff,
 
+                                                   const uint32 TxSize);
 
+
 
+/*!
 
+ * @brief Returns whether the previous transmit is complete.
 
+ *
 
+ * @param Instance  LPUART instance number
 
+ * @param BytesRemaining Pointer to value that is populated with the number of bytes that
 
+ *        have been sent in the active transfer
 
+ *        @note In DMA mode, this parameter may not be accurate, in case the transfer completes
 
+ *              right after calling this function; in this edge-case, the parameter will reflect
 
+ *              the initial transfer size, due to automatic reloading of the major loop count
 
+ *              in the DMA transfer descriptor.
 
+ * @return The transmit status.
 
+ * @retval LPUART_UART_IP_STATUS_SUCCESS The transmit has completed successfully.
 
+ * @retval LPUART_UART_IP_STATUS_BUSY The transmit is still in progress. @a bytesRemaining will be
 
+ *         filled with the number of bytes that are yet to be transmitted.
 
+ * @retval LPUART_UART_IP_STATUS_ABORTED The transmit was aborted.
 
+ * @retval LPUART_UART_IP_STATUS_TIMEOUT A timeout was reached.
 
+ * @retval LPUART_UART_IP_STATUS_ERROR An error occurred.
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_GetTransmitStatus(const uint8 Instance, uint32 * BytesRemaining);
 
+
 
+/*!
 
+ * @brief Terminates a non-blocking transmission early.
 
+ *
 
+ * @param instance  LPUART instance number
 
+ * @return Whether the aborting is successful or not.
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_AbortSendingData(const uint8 Instance);
 
+
 
+
 
+/*!
 
+ * @brief Receive multiple bytes of data using polling method.
 
+ *
 
+ *
 
+ * @param   Instance  LPUART instance number.
 
+ * @param   RxBuff The buffer pointer which saves the data to be received.
 
+ * @param   RxSize Size of data need to be received in unit of byte.
 
+ * @param   Timeout value in microseconds.
 
+ * @return  LPUART_UART_IP_STATUS_SUCCESS if the transaction is successful;
 
+ *          LPUART_UART_IP_STATUS_BUSY if the resource is busy;
 
+ *          LPUART_UART_IP_STATUS_RX_OVERRUN if an overrun error occured
 
+ *          LPUART_UART_IP_STATUS_FRAMING_ERROR if a framing error occured
 
+ *          LPUART_UART_IP_STATUS_PARITY_ERROR if a parity error occured
 
+ *          LPUART_UART_IP_STATUS_NOISE_ERROR if a noise error occured
 
+ *          LPUART_UART_IP_STATUS_TIMEOUT if timeout occur
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_SyncReceive(const uint8 Instance,
 
+                                                     uint8 *RxBuff,
 
+                                                     const uint32 RxSize,
 
+                                                     const uint32 Timeout);
 
+
 
+/*!
 
+ * @brief Gets data from the LPUART module by using a non-blocking method.
 
+ *  This enables an a-sync method for receiving data. When used with
 
+ *  a non-blocking transmission, the LPUART can perform a full duplex operation.
 
+ *  Non-blocking means that the function returns immediately.
 
+ *  The application has to get the receive status to know when the receive is complete.
 
+ *
 
+ * @param Instance  LPUART instance number
 
+ * @param RxBuff  buffer containing 8-bit read data chars received
 
+ * @param RxSize  the number of bytes to receive
 
+ * @return LPUART_UART_IP_STATUS_SUCCESS if successful;
 
+ *         LPUART_UART_IP_STATUS_BUSY if the resource is busy
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_AsyncReceive(const uint8 Instance,
 
+                                                      uint8 * RxBuff,
 
+                                                      const uint32 RxSize);
 
+
 
+/*!
 
+ * @brief Returns whether the previous receive is complete.
 
+ *
 
+ * @param Instance  LPUART instance number
 
+ * @param BytesRemaining pointer to value that is filled  with the number of bytes that
 
+ *        still need to be received in the active transfer.
 
+ *        @note In DMA mode, this parameter may not be accurate, in case the transfer completes
 
+ *              right after calling this function; in this edge-case, the parameter will reflect
 
+ *              the initial transfer size, due to automatic reloading of the major loop count
 
+ *              in the DMA transfer descriptor.
 
+ * @return The receive status.
 
+ * @retval LPUART_UART_IP_STATUS_SUCCESS the receive has completed successfully.
 
+ * @retval LPUART_UART_IP_STATUS_BUSY the receive is still in progress. @a bytesReceived will be
 
+ *     filled with the number of bytes that have been received so far.
 
+ * @retval LPUART_UART_IP_STATUS_ABORTED The receive was aborted.
 
+ * @retval LPUART_UART_IP_STATUS_TIMEOUT A timeout was reached.
 
+ * @retval LPUART_UART_IP_STATUS_RX_OVERRUN, LPUART_UART_IP_STATUS_FRAMING_ERROR, LPUART_UART_IP_STATUS_PARITY_ERROR,
 
+           or LPUART_UART_IP_STATUS_NOISE_ERROR, LPUART_UART_IP_STATUS_ERROR An error occurred during reception.
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_GetReceiveStatus(const uint8 Instance, uint32 * BytesRemaining);
 
+
 
+/*!
 
+ * @brief Terminates a non-blocking receive early.
 
+ *
 
+ * @param Instance  LPUART instance number
 
+ *
 
+ * @return Whether the receiving was successful or not.
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_AbortReceivingData(const uint8 Instance);
 
+
 
+/*!
 
+ * @brief Configures the LPUART baud rate.
 
+ *
 
+ * This function configures the LPUART baud rate.
 
+ * In some LPUART instances the user must disable the transmitter/receiver
 
+ * before calling this function.
 
+ * Generally, this may be applied to all LPUARTs to ensure safe operation.
 
+ *
 
+ * @param Instance  LPUART instance number.
 
+ * @param DesiredBaudrate LPUART desired baud rate.
 
+ * @param ClockFrequency Clock Frequency of LPUART instance.
 
+ * @return LPUART_UART_IP_STATUS_BUSY if called during an on-going transfer, LPUART_UART_IP_STATUS_SUCCESS otherwise
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_SetBaudRate(const uint8 Instance,
 
+                                                     const Lpuart_Uart_Ip_BaudrateType DesiredBaudrate,
 
+                                                     const uint32 ClockFrequency);
 
+
 
+/*!
 
+ * @brief Returns the LPUART baud rate.
 
+ *
 
+ * This function returns the LPUART configured baud rate.
 
+ *
 
+ * @param Instance  LPUART instance number.
 
+ * @param[out] ConfiguredBaudRate LPUART configured baud rate.
 
+ */
 
+void Lpuart_Uart_Ip_GetBaudRate(const uint8 Instance, uint32 * ConfiguredBaudRate);
 
+
 
+/*!
 
+ * @brief Sets the internal driver reference to the tx buffer.
 
+ *
 
+ * This function can be called from the tx callback to provide the driver
 
+ * with a new buffer, for continuous transmission.
 
+ *
 
+ * @param Instance  LPUART instance number
 
+ * @param TxBuff  source buffer containing 8-bit data chars to send
 
+ * @param TxSize  the number of bytes to send
 
+ * @return LPUART_UART_IP_STATUS_SUCCESS
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_SetTxBuffer(const uint8 Instance,
 
+                                                     const uint8 * TxBuff,
 
+                                                     const uint32 TxSize);
 
+
 
+/*!
 
+ * @brief Sets the internal driver reference to the rx buffer.
 
+ *
 
+ * This function can be called from the rx callback to provide the driver
 
+ * with a new buffer, for continuous reception.
 
+ *
 
+ * @param instance  LPUART instance number
 
+ * @param RxBuff  destination buffer containing 8-bit data chars to receive
 
+ * @param RxSize  the number of bytes to receive
 
+ * @return LPUART_UART_IP_STATUS_SUCCESS
 
+ */
 
+Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_SetRxBuffer(const uint8 Instance,
 
+                                                     uint8 * RxBuff,
 
+                                                     const uint32 RxSize);
 
+
 
+void Lpuart_Uart_Ip_IrqHandler(const uint8 Instance);
 
+
 
+#if (LPUART_UART_IP_HAS_DMA_ENABLED == STD_ON)
 
+/**
 
+ * @internal
 
+ * @brief   : Finish up a transmit by completing the process of sending
 
+ * data and disabling the DMA requests. This is a part of callback for DMA major loop
 
+ * completion, so it must match the DMA callback signature.
 
+ * @param Instance Lpuart instance number
 
+ * @return void
 
+ */
 
+void Lpuart_Uart_Ip_CompleteSendUsingDma(uint8 Instance);
 
+
 
+/**
 
+ * @internal
 
+ * @brief   : Finish up a receive by completing the process of receiving data
 
+ * and disabling the DMA requests. This is a part of callback for DMA major loop
 
+ * completion, so it must match the DMA callback signature.
 
+ * @param Instance Lpuart instance number
 
+ * @return void
 
+ */
 
+void Lpuart_Uart_Ip_CompleteReceiveUsingDma(uint8 Instance);
 
+#endif
 
+
 
+#define UART_STOP_SEC_CODE
 
+#include "Uart_MemMap.h"
 
+
 
+#if defined(__cplusplus)
 
+}
 
+#endif
 
+
 
+/*! @}*/
 
+
 
+#endif /* LPUART_UART_IP_H */

+ 742 - 0
RTD/include/Lpuart_Uart_Ip_HwAccess.h
Vedi File 

@@ -0,0 +1,742 @@
 
+/*==================================================================================================
 
+*   Project              : RTD AUTOSAR 4.4
 
+*   Platform             : CORTEXM
 
+*   Peripheral           : FLEXIO
 
+*   Dependencies         : 
+*
 
+*   Autosar Version      : 4.4.0
 
+*   Autosar Revision     : ASR_REL_4_4_REV_0000
 
+*   Autosar Conf.Variant :
 
+*   SW Version           : 1.0.0
 
+*   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
 
+*
 
+*   (c) Copyright 2020-2021 NXP Semiconductors
 
+*   All Rights Reserved.
 
+*
 
+*   NXP Confidential. This software is owned or controlled by NXP and may only be
 
+*   used strictly in accordance with the applicable license terms. By expressly
 
+*   accepting such terms or by downloading, installing, activating and/or otherwise
 
+*   using the software, you are agreeing that you have read, and that you agree to
 
+*   comply with and are bound by, such license terms. If you do not agree to be
 
+*   bound by the applicable license terms, then you may not retain, install,
 
+*   activate or otherwise use the software.
 
+==================================================================================================*/
 
+
 
+#ifndef LPUART_UART_IP_HWACCESS_H__
 
+#define LPUART_UART_IP_HWACCESS_H__
 
+
 
+/**
 
+*   @file
 
+*   @internal
 
+*   @defgroup lpuart_ip Lpuart IPL
 
+*   @addtogroup  lpuart_ip Lpuart  IPL
 
+*   @{
 
+*/
 
+#include "Port.h"
 
+#include "Dio.h"//zhengchao
 
+#ifdef __cplusplus
 
+extern "C"{
 
+#endif
 
+
 
+/*==================================================================================================
 
+*                                          INCLUDE FILES
 
+* 1) system and project includes
 
+* 2) needed interfaces from external units
 
+* 3) internal and external interfaces from this unit
 
+==================================================================================================*/
 
+#include "StandardTypes.h"
 
+#include "OsIf.h"
 
+#include "Lpuart_Uart_Ip_Defines.h"
 
+#include "SchM_Uart.h"
 
+
 
+/*==================================================================================================
 
+*                                 SOURCE FILE VERSION INFORMATION
 
+==================================================================================================*/
 
+#define LPUART_UART_IP_HWACCESS_VENDOR_ID                    43
 
+#define LPUART_UART_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION     4
 
+#define LPUART_UART_IP_HWACCESS_AR_RELEASE_MINOR_VERSION     4
 
+#define LPUART_UART_IP_HWACCESS_AR_RELEASE_REVISION_VERSION  0
 
+#define LPUART_UART_IP_HWACCESS_SW_MAJOR_VERSION             1
 
+#define LPUART_UART_IP_HWACCESS_SW_MINOR_VERSION             0
 
+#define LPUART_UART_IP_HWACCESS_SW_PATCH_VERSION             0
 
+
 
+/*==================================================================================================
 
+*                                       FILE VERSION CHECKS
 
+==================================================================================================*/
 
+/* Checks against Lpuart_Uart_Ip_Defines.h */
 
+#if (LPUART_UART_IP_HWACCESS_VENDOR_ID != LPUART_UART_IP_DEFINES_VENDOR_ID)
 
+    #error "Lpuart_Uart_Ip_HwAccess.h and Lpuart_Uart_Ip_Defines.h have different vendor ids"
 
+#endif
 
+#if ((LPUART_UART_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION    != LPUART_UART_IP_DEFINES_AR_RELEASE_MAJOR_VERSION) || \
 
+     (LPUART_UART_IP_HWACCESS_AR_RELEASE_MINOR_VERSION    != LPUART_UART_IP_DEFINES_AR_RELEASE_MINOR_VERSION) || \
 
+     (LPUART_UART_IP_HWACCESS_AR_RELEASE_REVISION_VERSION != LPUART_UART_IP_DEFINES_AR_RELEASE_REVISION_VERSION))
 
+     #error "AUTOSAR Version Numbers of Lpuart_Uart_Ip_HwAccess.h and Lpuart_Uart_Ip_Defines.h are different"
 
+#endif
 
+#if ((LPUART_UART_IP_HWACCESS_SW_MAJOR_VERSION != LPUART_UART_IP_DEFINES_SW_MAJOR_VERSION) || \
 
+     (LPUART_UART_IP_HWACCESS_SW_MINOR_VERSION != LPUART_UART_IP_DEFINES_SW_MINOR_VERSION) || \
 
+     (LPUART_UART_IP_HWACCESS_SW_PATCH_VERSION != LPUART_UART_IP_DEFINES_SW_PATCH_VERSION))
 
+    #error "Software Version Numbers of Lpuart_Uart_Ip_HwAccess.h and Lpuart_Uart_Ip_Defines.h are different"
 
+#endif
 
+
 
+#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 
+/* Check if current file and StandardTypes.h header file are of the same Autosar version */
 
+    #if ((LPUART_UART_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \
 
+            (LPUART_UART_IP_HWACCESS_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION))
 
+        #error "Lpuart_Uart_Ip_HwAccess.h and StandardTypes.h are different"
 
+    #endif
 
+    /* Check if current file and OsIf.h header file are of the same Autosar version */
 
+    #if ((LPUART_UART_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION != OSIF_AR_RELEASE_MAJOR_VERSION) || \
 
+         (LPUART_UART_IP_HWACCESS_AR_RELEASE_MINOR_VERSION != OSIF_AR_RELEASE_MINOR_VERSION))
 
+        #error "Lpuart_Uart_Ip_HwAccess.h and OsIf.h are different"
 
+    #endif
 
+
 
+    /* Check if current file and SchM_Uart.h header file are of the same Autosar version */
 
+    #if ((LPUART_UART_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION != SCHM_UART_AR_RELEASE_MAJOR_VERSION) || \
 
+         (LPUART_UART_IP_HWACCESS_AR_RELEASE_MINOR_VERSION != SCHM_UART_AR_RELEASE_MAJOR_VERSION))
 
+        #error "Lpuart_Uart_Ip_HwAccess.h and SchM_Uart.h are different"
 
+    #endif
 
+#endif
 
+/*==================================================================================================
 
+*                                            CONSTANTS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       DEFINES AND MACROS
 
+==================================================================================================*/
 
+
 
+#define LPUART_FEATURE_DEFAULT_OSR                  (0xFU)
 
+#define LPUART_FEATURE_DEFAULT_SBR                  (0x4U)
 
+#define LPUART_FEATURE_STAT_REG_FLAGS_MASK          (0xC01FC000U)
 
+
 
+
 
+/*! @brief LPUART number of bits in a character
 
+ *
 
+ *
 
+ */
 
+/* implements     Lpuart_Uart_Ip_BitCountPerCharType_enum */
 
+typedef enum
 
+{
 
+    LPUART_UART_IP_7_BITS_PER_CHAR  = 0x0U, /*!< 7-bit data characters */
 
+    LPUART_UART_IP_8_BITS_PER_CHAR  = 0x1U, /*!< 8-bit data characters */
 
+    LPUART_UART_IP_9_BITS_PER_CHAR  = 0x2U, /*!< 9-bit data characters */
 
+    LPUART_UART_IP_10_BITS_PER_CHAR = 0x3U  /*!< 10-bit data characters */
 
+} Lpuart_Uart_Ip_BitCountPerCharType;
 
+
 
+/*! @brief LPUART parity mode
 
+ *
 
+ *
 
+ */
 
+/* implements     Lpuart_Uart_Ip_ParityModeType_enum */
 
+typedef enum
 
+{
 
+    LPUART_UART_IP_PARITY_DISABLED = 0x0U, /*!< parity disabled */
 
+    LPUART_UART_IP_PARITY_EVEN     = 0x2U, /*!< parity enabled, type even, bit setting: PE|PT = 10 */
 
+    LPUART_UART_IP_PARITY_ODD      = 0x3U  /*!< parity enabled, type odd,  bit setting: PE|PT = 11 */
 
+} Lpuart_Uart_Ip_ParityModeType;
 
+
 
+typedef enum
 
+{
 
+    LPUART_UART_IP_ONE_STOP_BIT = 0x0U, /*!< one stop bit */
 
+    LPUART_UART_IP_TWO_STOP_BIT = 0x1U  /*!< two stop bits */
 
+} Lpuart_Uart_Ip_StopBitCountType;
 
+
 
+/*!
 
+ * @brief LPUART status flags.
 
+ *
 
+ * This provides constants for the LPUART status flags for use in the UART functions.
 
+ */
 
+typedef enum
 
+{
 
+    LPUART_UART_IP_TX_DATA_REG_EMPTY          = (uint32)LPUART_STAT_TDRE_SHIFT,
 
+                                                /*!< Tx data register empty flag, sets when Tx buffer is empty */
 
+    LPUART_UART_IP_TX_COMPLETE                = (uint32)LPUART_STAT_TC_SHIFT,
 
+                                                /*!< Transmission complete flag, sets when transmission activity complete */
 
+    LPUART_UART_IP_DATA_REG_FULL              = (uint32)LPUART_STAT_RDRF_SHIFT,
 
+                                                /*!< Rx data register full flag, sets when the receive data buffer is full */
 
+    LPUART_UART_IP_RX_OVERRUN                 = (uint32)LPUART_STAT_OR_SHIFT,
 
+                                                /*!< Rx Overrun sets if new data is received before data is read */
 
+    LPUART_UART_IP_NOISE_DETECT               = (uint32)LPUART_STAT_NF_SHIFT,
 
+                                                /*!< Rx takes 3 samples of each received bit. If these differ, the flag sets */
 
+    LPUART_UART_IP_FRAME_ERR                  = (uint32)LPUART_STAT_FE_SHIFT,
 
+                                                /*!< Frame error flag, sets if logic 0 was detected where stop bit expected */
 
+    LPUART_UART_IP_PARITY_ERR                 = (uint32)LPUART_STAT_PF_SHIFT,
 
+
 
+	LPUART_UART_IP_IDLE						  = (uint32)LPUART_STAT_IDLE_SHIFT,  //zhengchao
 
+} Lpuart_Uart_Ip_StatusFlagType;
 
+
 
+/*! @brief LPUART interrupt configuration structure, default settings are 0 (disabled) */
 
+typedef enum
 
+{
 
+    LPUART_UART_IP_INT_TX_DATA_REG_EMPTY = (uint32)LPUART_CTRL_TIE_SHIFT,     /*!< Transmit data register empty. */
 
+    LPUART_UART_IP_INT_TX_COMPLETE       = (uint32)LPUART_CTRL_TCIE_SHIFT,    /*!< Transmission complete. */
 
+    LPUART_UART_IP_INT_RX_DATA_REG_FULL  = (uint32)LPUART_CTRL_RIE_SHIFT,     /*!< Receiver data register full. */
 
+    LPUART_UART_IP_INT_RX_OVERRUN        = (uint32)LPUART_CTRL_ORIE_SHIFT,    /*!< Receiver Overrun. */
 
+    LPUART_UART_IP_INT_NOISE_ERR_FLAG    = (uint32)LPUART_CTRL_NEIE_SHIFT,    /*!< Noise error flag. */
 
+    LPUART_UART_IP_INT_FRAME_ERR_FLAG    = (uint32)LPUART_CTRL_FEIE_SHIFT,    /*!< Framing error flag. */
 
+    LPUART_UART_IP_INT_PARITY_ERR_FLAG   = (uint32)LPUART_CTRL_PEIE_SHIFT,    /*!< Parity error flag. */
 
+	LPUART_UART_IP_INT_IDLE				 = (uint32)LPUART_CTRL_ILIE_SHIFT,	//zhengchao
 
+
 
+} Lpuart_Uart_Ip_InterruptType;
 
+
 
+/*==================================================================================================
 
+*                                  STRUCTURES AND OTHER TYPEDEFS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                  GLOBAL VARIABLE DECLARATIONS
 
+==================================================================================================*/
 
+
 
+/*==================================================================================================
 
+*                                       FUNCTION PROTOTYPES
 
+==================================================================================================*/
 
+
 
+#define UART_START_SEC_CODE
 
+#include "Uart_MemMap.h"
 
+
 
+/*!
 
+ * @brief Initializes the LPUART controller.
 
+ *
 
+ * This function Initializes the LPUART controller to known state.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer.
 
+ */
 
+static inline void Lpuart_Uart_Ip_Hw_Init(LPUART_Type * Base)
 
+{
 
+    /* Set the default oversampling ratio (16) and baud-rate divider (4) */
 
+    Base->BAUD = ((uint32)(((uint32)LPUART_FEATURE_DEFAULT_OSR << LPUART_BAUD_OSR_SHIFT) | \
 
+                 (LPUART_FEATURE_DEFAULT_SBR << LPUART_BAUD_SBR_SHIFT)));
 
+    /* Clear the error/interrupt flags */
 
+    Base->STAT = LPUART_FEATURE_STAT_REG_FLAGS_MASK;
 
+    /* Reset all features/interrupts by default */
 
+    Base->CTRL = 0x00000000;
 
+}
 
+
 
+/*!
 
+ * @brief Enable/Disable the LPUART transmitter.
 
+ *
 
+ * This function enables or disables the LPUART transmitter, based on the
 
+ * parameter received.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer.
 
+ * @param Enable Enable(true) or disable(false) transmitter.
 
+ */
 
+static inline void Lpuart_Uart_Ip_SetTransmitterCmd(LPUART_Type * Base, boolean Enable)
 
+{
 
+    Base->CTRL = (Base->CTRL & ~LPUART_CTRL_TE_MASK) | ((Enable ? 1UL : 0UL) << LPUART_CTRL_TE_SHIFT);
 
+}
 
+
 
+/*!
 
+ * @brief Enable/Disable the LPUART receiver.
 
+ *
 
+ * This function enables or disables the LPUART receiver, based on the
 
+ * parameter received.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer
 
+ * @param Enable Enable(true) or disable(false) receiver.
 
+ */
 
+static inline void Lpuart_Uart_Ip_SetReceiverCmd(LPUART_Type * Base, boolean Enable)
 
+{
 
+    Base->CTRL = (Base->CTRL & ~LPUART_CTRL_RE_MASK) | ((Enable ? 1UL : 0UL) << LPUART_CTRL_RE_SHIFT);
 
+}
 
+
 
+/*!
 
+ * @brief Sets the LPUART baud rate modulo divisor.
 
+ *
 
+ * This function sets the LPUART baud rate modulo divisor.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer.
 
+ * @param baudRateDivisor The baud rate modulo division "SBR"
 
+ */
 
+static inline void Lpuart_Uart_Ip_SetBaudRateDivisor(LPUART_Type * Base, uint32 baudRateDivisor)
 
+{
 
+    Base->BAUD = (Base->BAUD & ~LPUART_BAUD_SBR_MASK) | (baudRateDivisor & LPUART_BAUD_SBR_MASK);
 
+}
 
+
 
+/*!
 
+ * @brief Gets the LPUART baud rate modulo divisor.
 
+ *
 
+ * This function gets the LPUART baud rate modulo divisor.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer.
 
+ * @return The baud rate modulo division "SBR"
 
+ */
 
+static inline uint16 Lpuart_Uart_Ip_GetBaudRateDivisor(const LPUART_Type * Base)
 
+{
 
+    return ((uint16)((Base->BAUD & LPUART_BAUD_SBR_MASK) >> LPUART_BAUD_SBR_SHIFT));
 
+}
 
+
 
+/*!
 
+ * @brief Sets the LPUART baud rate oversampling ratio
 
+ *
 
+ * This function sets the LPUART baud rate oversampling ratio.
 
+ * (Note: Feature available on select LPUART instances used together with baud rate programming)
 
+ * The oversampling ratio should be set between 4x (00011) and 32x (11111). Writing
 
+ * an invalid oversampling ratio results in an error and is set to a default
 
+ * 16x (01111) oversampling ratio.
 
+ * Disable the transmitter/receiver before calling this function.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer.
 
+ * @param OverSamplingRatio The oversampling ratio "OSR"
 
+ */
 
+static inline void Lpuart_Uart_Ip_SetOversamplingRatio(LPUART_Type * Base, uint32 OverSamplingRatio)
 
+{
 
+    Base->BAUD = (Base->BAUD & ~LPUART_BAUD_OSR_MASK) | LPUART_BAUD_OSR(OverSamplingRatio);
 
+}
 
+
 
+/*!
 
+ * @brief Gets the LPUART baud rate oversampling ratio
 
+ *
 
+ * This function gets the LPUART baud rate oversampling ratio.
 
+ * (Note: Feature available on select LPUART instances used together with baud rate programming)
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer.
 
+ * @return The oversampling ratio "OSR"
 
+ */
 
+static inline uint8 Lpuart_Uart_Ip_GetOversamplingRatio(const LPUART_Type * Base)
 
+{
 
+    return ((uint8)((Base->BAUD & LPUART_BAUD_OSR_MASK) >> LPUART_BAUD_OSR_SHIFT));
 
+}
 
+
 
+
 
+/*!
 
+ * @brief Configures the LPUART baud rate both edge sampling
 
+ *
 
+ * This function configures the LPUART baud rate both edge sampling.
 
+ * (Note: Feature available on select LPUART instances used with baud rate programming)
 
+ * When enabled, the received data is sampled on both edges of the baud rate clock.
 
+ * This must be set when the oversampling ratio is between 4x and 7x.
 
+ * This function should only be called when the receiver is disabled.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer.
 
+ */
 
+static inline void Lpuart_Uart_Ip_EnableBothEdgeSamplingCmd(LPUART_Type * Base)
 
+{
 
+    Base->BAUD |= LPUART_BAUD_BOTHEDGE_MASK;
 
+}
 
+
 
+/*!
 
+ * @brief Configures the number of bits per character in the LPUART controller.
 
+ *
 
+ * This function configures the number of bits per character in the LPUART controller.
 
+ * In some LPUART instances, the user should disable the transmitter/receiver
 
+ * before calling this function.
 
+ * Generally, this may be applied to all LPUARTs to ensure safe operation.
 
+ *
 
+ * @param Base LPUART base pointer.
 
+ * @param BitCountPerChar  Number of bits per char (7, 8, 9, or 10, depending on the LPUART instance)
 
+ * @param Parity  Specifies whether parity bit is enabled
 
+ */
 
+static inline void Lpuart_Uart_Ip_SetBitCountPerChar(LPUART_Type * Base,
 
+                                                  Lpuart_Uart_Ip_BitCountPerCharType BitCountPerChar,
 
+                                                  boolean Parity)
 
+{
 
+    uint32 TmpBitCountPerChar = (uint32)BitCountPerChar;
 
+    if (Parity)
 
+    {
 
+        TmpBitCountPerChar += 1U;
 
+    }
 
+
 
+    if (TmpBitCountPerChar == (uint32)LPUART_UART_IP_10_BITS_PER_CHAR)
 
+    {
 
+        Base->BAUD = (Base->BAUD & ~LPUART_BAUD_M10_MASK) | ((uint32)1U << LPUART_BAUD_M10_SHIFT);
 
+    }
 
+    else
 
+    {
 
+        if (LPUART_UART_IP_7_BITS_PER_CHAR == BitCountPerChar)
 
+        {
 
+            /* Check if parity is enabled or not*/
 
+            if (Parity)
 
+            {
 
+                /* clear M7 to make sure not 7-bit mode (M7 = 0) and config 8 bits (M = 0) */
 
+                Base->CTRL &= ~(LPUART_CTRL_M7_MASK | LPUART_CTRL_M_MASK);
 
+            }
 
+            else
 
+            {
 
+                /* config 7-bits (M7 = 1)*/
 
+                Base->CTRL = (Base->CTRL & ~LPUART_CTRL_M7_MASK) | ((uint32)1U << LPUART_CTRL_M7_SHIFT);
 
+            }
 
+        }
 
+        else
 
+        {
 
+            TmpBitCountPerChar -= 1U;
 
+            /* config 8-bit (M=0) or 9-bits (M=1) */
 
+            Base->CTRL = (Base->CTRL & ~LPUART_CTRL_M_MASK) | (TmpBitCountPerChar << LPUART_CTRL_M_SHIFT);
 
+        }
 
+        /* clear M10 to make sure not 10-bit mode */
 
+        Base->BAUD &= ~LPUART_BAUD_M10_MASK;
 
+    }
 
+}
 
+
 
+
 
+/*!
 
+ * @brief Configures parity mode in the LPUART controller.
 
+ *
 
+ * This function configures parity mode in the LPUART controller.
 
+ * In some LPUART instances, the user should disable the transmitter/receiver
 
+ * before calling this function.
 
+ * Generally, this may be applied to all LPUARTs to ensure safe operation.
 
+ *
 
+ * @param Base LPUART base pointer.
 
+ * @param ParityModeType  Parity mode (enabled, disable, odd, even - see parity_mode_t struct)
 
+ */
 
+static inline void Lpuart_Uart_Ip_SetParityMode(LPUART_Type * Base, Lpuart_Uart_Ip_ParityModeType ParityModeType)
 
+{
 
+    Base->CTRL = (Base->CTRL & ~LPUART_CTRL_PE_MASK) | (((uint32)ParityModeType >> 1U) << LPUART_CTRL_PE_SHIFT);
 
+    Base->CTRL = (Base->CTRL & ~LPUART_CTRL_PT_MASK) | (((uint32)ParityModeType & 1U) << LPUART_CTRL_PT_SHIFT);
 
+}
 
+
 
+/*!
 
+ * @brief Configures the number of stop bits in the LPUART controller.
 
+ *
 
+ * This function configures the number of stop bits in the LPUART controller.
 
+ * In some LPUART instances, the user should disable the transmitter/receiver
 
+ * before calling this function.
 
+ * Generally, this may be applied to all LPUARTs to ensure safe operation.
 
+ *
 
+ * @param Base LPUART base pointer.
 
+ * @param StopBitCount Number of stop bits (1 or 2 - see Lpuart_Uart_Ip_StopBitCountType struct)
 
+ */
 
+static inline void Lpuart_Uart_Ip_SetStopBitCount(LPUART_Type * Base, Lpuart_Uart_Ip_StopBitCountType StopBitCount)
 
+{
 
+    Base->BAUD = (Base->BAUD & ~LPUART_BAUD_SBNS_MASK) | ((uint32)StopBitCount << LPUART_BAUD_SBNS_SHIFT);
 
+}
 
+
 
+
 
+/*!
 
+ * @brief Configures the LPUART module interrupts.
 
+ *
 
+ * This function configures the LPUART module interrupts to enable/disable various interrupt sources.
 
+ *
 
+ *
 
+ * @param   Base LPUART module base pointer.
 
+ * @param   IntSrc LPUART interrupt configuration data.
 
+ * @param   Enable   true: enable, false: disable.
 
+ */
 
+static inline void Lpuart_Uart_Ip_SetIntMode(LPUART_Type * Base, Lpuart_Uart_Ip_InterruptType IntSrc, boolean Enable)
 
+{
 
+    Base->CTRL = (Base->CTRL & ~(1UL << (uint32)IntSrc)) | ((Enable ? 1U : 0U) << (uint32)IntSrc);
 
+}
 
+
 
+/*!
 
+ * @brief Returns LPUART module interrupts state.
 
+ *
 
+ * This function returns whether a certain LPUART module interrupt is enabled or disabled.
 
+ *
 
+ *
 
+ * @param   Base LPUART module base pointer.
 
+ * @param   IntSrc LPUART interrupt configuration data.
 
+ * @return  true: enable, false: disable.
 
+ */
 
+static inline boolean Lpuart_Uart_Ip_GetIntMode(const LPUART_Type * Base, Lpuart_Uart_Ip_InterruptType IntSrc)
 
+{
 
+    boolean RetVal = FALSE;
 
+    RetVal = (((Base->CTRL >> (uint32)(IntSrc)) & 1U) > 0U);
 
+    return RetVal;
 
+}
 
+
 
+#if (LPUART_UART_IP_HAS_DMA_ENABLED == STD_ON)
 
+/*!
 
+ * @brief Configures DMA requests.
 
+ *
 
+ * This function configures DMA requests for LPUART Transmitter.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer
 
+ * @param Enable Transmit DMA request configuration (enable:1 /disable: 0)
 
+ */
 
+static inline void Lpuart_Uart_Ip_SetTxDmaCmd(LPUART_Type * Base, boolean Enable)
 
+{
 
+    Base->BAUD = (Base->BAUD & ~LPUART_BAUD_TDMAE_MASK) | ((Enable ? 1UL : 0UL) << LPUART_BAUD_TDMAE_SHIFT);
 
+}
 
+
 
+/*!
 
+ * @brief Configures DMA requests.
 
+ *
 
+ * This function configures DMA requests for LPUART Receiver.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer
 
+ * @param Enable Receive DMA request configuration (enable: 1/disable: 0)
 
+ */
 
+static inline void Lpuart_Uart_Ip_SetRxDmaCmd(LPUART_Type * Base, boolean Enable)
 
+{
 
+    Base->BAUD = (Base->BAUD & ~LPUART_BAUD_RDMAE_MASK) | ((Enable ? 1UL : 0UL) << LPUART_BAUD_RDMAE_SHIFT);
 
+}
 
+#endif
 
+
 
+/*!
 
+ * @brief Sends the LPUART 8-bit character.
 
+ *
 
+ * This functions sends an 8-bit character.
 
+ *
 
+ *
 
+ * @param Base LPUART Instance
 
+ * @param Data     data to send (8-bit)
 
+ */
 
+static inline void Lpuart_Uart_Ip_Putchar(LPUART_Type * Base, uint8 Data)
 
+{
 
+    volatile uint8 * DataRegBytes = (volatile uint8 *)(&(Base->DATA));
 
+    DataRegBytes[0] = Data;
 
+}
 
+
 
+/*!
 
+ * @brief Sends the LPUART 9-bit character.
 
+ *
 
+ * This functions sends a 9-bit character.
 
+ *
 
+ *
 
+ * @param Base LPUART Instance
 
+ * @param Data     data to send (9-bit)
 
+ */
 
+static inline void Lpuart_Uart_Ip_Putchar9(LPUART_Type * Base, uint16 Data)
 
+{
 
+    uint8 NinthDataBit;
 
+    volatile uint8 * DataRegBytes = (volatile uint8 *)(&(Base->DATA));
 
+
 
+
 
+    NinthDataBit = (uint8)((Data >> 8U) & 0x1U);
 
+
 
+    /* write to ninth data bit T8(where T[0:7]=8-bits, T8=9th bit) */
 
+    Base->CTRL = (Base->CTRL & ~LPUART_CTRL_R9T8_MASK) | ((uint32)(NinthDataBit) << LPUART_CTRL_R9T8_SHIFT);
 
+
 
+    /* write 8-bits to the data register*/
 
+    DataRegBytes[0] = (uint8)Data;
 
+}
 
+
 
+/*!
 
+ * @brief Sends the LPUART 10-bit character (Note: Feature available on select LPUART instances).
 
+ *
 
+ * This functions sends a 10-bit character.
 
+ *
 
+ *
 
+ * @param Base LPUART Instance
 
+ * @param Data   data to send (10-bit)
 
+ */
 
+static inline void Lpuart_Uart_Ip_Putchar10(LPUART_Type * Base, uint16 Data)
 
+{
 
+    uint8 NinthDataBit, TenthDataBit;
 
+    uint32 CtrlRegVal;
 
+    volatile uint8 * DataRegBytes = (volatile uint8 *)(&(Base->DATA));
 
+
 
+    NinthDataBit = (uint8)((Data >> 8U) & 0x1U);
 
+    TenthDataBit = (uint8)((Data >> 9U) & 0x1U);
 
+
 
+    /* write to ninth/tenth data bit (T[0:7]=8-bits, T8=9th bit, T9=10th bit) */
 
+    CtrlRegVal = Base->CTRL;
 
+    CtrlRegVal = (CtrlRegVal & ~LPUART_CTRL_R9T8_MASK) | ((uint32)NinthDataBit << LPUART_CTRL_R9T8_SHIFT);
 
+    CtrlRegVal = (CtrlRegVal & ~LPUART_CTRL_R8T9_MASK) | ((uint32)TenthDataBit << LPUART_CTRL_R8T9_SHIFT);
 
+    /*Note: T8(9th bit) and T9(10th bit) should be written at same time. */
 
+    Base->CTRL = CtrlRegVal;
 
+
 
+    /* write to 8-bits to the Data register */
 
+    DataRegBytes[0] = (uint8)Data;
 
+}
 
+
 
+/*!
 
+ * @brief Gets the LPUART 8-bit character.
 
+ *
 
+ * This functions receives an 8-bit character.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer
 
+ * @param ReadData Data read from receive (8-bit)
 
+ */
 
+static inline uint8 Lpuart_Uart_Ip_Getchar(const LPUART_Type * Base)
 
+{
 
+    return (uint8)Base->DATA;
 
+}
 
+
 
+/*!
 
+ * @brief Gets the LPUART 9-bit character.
 
+ *
 
+ * This functions receives a 9-bit character.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer
 
+ */
 
+static inline uint16 Lpuart_Uart_Ip_Getchar9(const LPUART_Type * Base)
 
+{
 
+    uint16 ReadData;
 
+
 
+    /* get ninth bit from lpuart data register */
 
+    ReadData = (uint16)(((Base->CTRL >> LPUART_CTRL_R8T9_SHIFT) & 1U) << 8);
 
+
 
+    /* get 8-bit data from the lpuart data register */
 
+    ReadData |= (uint8)Base->DATA;
 
+    return ReadData;
 
+}
 
+
 
+/*!
 
+ * @brief Gets the LPUART 10-bit character.
 
+ *
 
+ * This functions receives a 10-bit character.
 
+ *
 
+ *
 
+ * @param Base LPUART Base pointer
 
+ */
 
+static inline uint16 Lpuart_Uart_Ip_Getchar10(const LPUART_Type * Base)
 
+{
 
+    uint16 ReadData;
 
+
 
+    /* read tenth data bit */
 
+    ReadData = (uint16)(((Base->CTRL >> LPUART_CTRL_R9T8_SHIFT) & 1U) << 9);
 
+    /* read ninth data bit */
 
+    ReadData |= (uint16)(((Base->CTRL >> LPUART_CTRL_R8T9_SHIFT) & 1U) << 8);
 
+
 
+    /* get 8-bit data */
 
+    ReadData |= (uint8)Base->DATA;
 
+    return ReadData;
 
+}
 
+
 
+/*!
 
+ * @brief  LPUART get status flag
 
+ *
 
+ * This function returns the state of a status flag.
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer
 
+ * @param StatusFlag  The status flag to query
 
+ * @return Whether the current status flag is set(true) or not(false).
 
+ */
 
+static inline boolean Lpuart_Uart_Ip_GetStatusFlag(const LPUART_Type * Base, Lpuart_Uart_Ip_StatusFlagType StatusFlag)
 
+{
 
+    boolean RetVal = FALSE;
 
+    RetVal = (((Base->STAT >> (uint32)(StatusFlag)) & 1U) > 0U);
 
+    return RetVal;
 
+}
 
+/*!
 
+ * @brief LPUART clears an individual status flag.
 
+ *
 
+ * This function clears an individual status flag (see Lpuart_Uart_Ip_StatusFlagType for list of status bits).
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer
 
+ * @param StatusFlag  Desired LPUART status flag to clear
 
+ * @return LPUART_UART_IP_STATUS_SUCCESS if successful or STATUS_ERROR if an error occured
 
+ */
 
+static inline void Lpuart_Uart_Ip_ClearStatusFlag(LPUART_Type * Base, Lpuart_Uart_Ip_StatusFlagType StatusFlag)
 
+{
 
+    switch(StatusFlag)
 
+    {
 
+        case LPUART_UART_IP_RX_OVERRUN:
 
+            Base->STAT = (Base->STAT & (~LPUART_FEATURE_STAT_REG_FLAGS_MASK)) | LPUART_STAT_OR_MASK;
 
+            break;
 
+
 
+        case LPUART_UART_IP_NOISE_DETECT:
 
+            Base->STAT = (Base->STAT & (~LPUART_FEATURE_STAT_REG_FLAGS_MASK)) | LPUART_STAT_NF_MASK;
 
+            break;
 
+
 
+        case LPUART_UART_IP_FRAME_ERR:
 
+            Base->STAT = (Base->STAT & (~LPUART_FEATURE_STAT_REG_FLAGS_MASK)) | LPUART_STAT_FE_MASK;
 
+            break;
 
+
 
+        case LPUART_UART_IP_PARITY_ERR:
 
+            Base->STAT = (Base->STAT & (~LPUART_FEATURE_STAT_REG_FLAGS_MASK)) | LPUART_STAT_PF_MASK;
 
+            break;
 
+        default:
 
+            /* Dummy code */
 
+            break;
 
+    }
 
+}
 
+
 
+/*!
 
+ * @brief LPUART clears an individual status flag.
 
+ *
 
+ * This function clears an individual status flag (see Lpuart_Uart_Ip_StatusFlagType for list of status bits).
 
+ *
 
+ *
 
+ * @param Base LPUART base pointer
 
+ * @param Mask  LPUART Status Register Mask to clear
 
+ */
 
+static inline void Lpuart_Uart_Ip_ClearStatusFlagWithMask(LPUART_Type * Base, uint32 Mask)
 
+{
 
+    Base->STAT = (Base->STAT & (~LPUART_FEATURE_STAT_REG_FLAGS_MASK)) | Mask;
 
+}
 
+
 
+/*!
 
+ * @brief  Clears the error flags treated by the driver
 
+ *
 
+ * This function clears the error flags treated by the driver.
 
+ * *
 
+ * @param Base LPUART Base pointer
 
+ */
 
+static inline void Lpuart_Uart_Ip_ClearErrorFlags(LPUART_Type * Base)
 
+{
 
+    uint32 Mask = LPUART_STAT_OR_MASK | \
 
+                  LPUART_STAT_NF_MASK | \
 
+                  LPUART_STAT_FE_MASK | \
 
+                  LPUART_STAT_PF_MASK;
 
+
 
+    Base->STAT = (Base->STAT & (~LPUART_FEATURE_STAT_REG_FLAGS_MASK)) | Mask;
 
+}
 
+
 
+/**
 
+ * @brief   : Prepare for timeout checking
 
+ * @internal
 
+ * @return  : None
 
+ */
 
+static inline void Lpuart_Uart_Ip_StartTimeout(uint32 *StartTimeOut, uint32 *TimeoutTicksOut, uint32 TimeoutUs, OsIf_CounterType OsifCounter)
 
+{
 
+    *StartTimeOut    = OsIf_GetCounter(OsifCounter);
 
+    *TimeoutTicksOut = OsIf_MicrosToTicks(TimeoutUs, OsifCounter);
 
+}
 
+
 
+/**
 
+ * @brief   : Checks for timeout condition
 
+ * @internal
 
+ * @return  TRUE     Timeout occurs
 
+ *          FALSE    Timeout does not occur
 
+ */
 
+
 
+static inline boolean Lpuart_Uart_Ip_CheckTimeout(uint32 * StartTime, uint32 * ElapsedTicks, uint32 TimeoutTicks, OsIf_CounterType OsifCounter)
 
+{
 
+	Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2,STD_OFF);
 
+    uint32 CurrentElapsedTicks = OsIf_GetElapsed(StartTime, OsifCounter);
 
+    *ElapsedTicks += CurrentElapsedTicks;
 
+    Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2,STD_ON);
 
+    return ((*ElapsedTicks >= TimeoutTicks) ? TRUE : FALSE);
 
+
 
+}
 
+
 
+/**
 
+ * @brief   : Flush Tx Buffer
 
+ *
 
+ * This function causes all data that is stored in the transmit FIFO/buffer to be flushed.
 
+ * *
 
+ * @param Base LPUART Base pointer
 
+ */
 
+static inline void Lpuart_Uart_Ip_FlushTxBuffer(LPUART_Type * Base)
 
+{
 
+    Base->FIFO |= LPUART_FIFO_TXFLUSH_MASK;
 
+}
 
+
 
+/**
 
+ * @brief   : Flush Rx Buffer
 
+ *
 
+ * This function causes all data that is stored in the receive FIFO/buffer to be flushed.
 
+ * *
 
+ * @param Base LPUART Base pointer
 
+ */
 
+static inline void Lpuart_Uart_Ip_FlushRxBuffer(LPUART_Type * Base)
 
+{
 
+    Base->FIFO |= LPUART_FIFO_RXFLUSH_MASK;
 
+}
 
+
 
+#define UART_STOP_SEC_CODE
 
+#include "Uart_MemMap.h"
 
+
 
+#if defined(__cplusplus)
 
+}
 
+#endif
 
+
 
+/*@}*/
 
+
 
+#endif /* LPUART_HW_ACCESS_H__ */

Some files were not shown because too many files changed in this diff