/*================================================================================================== * Project : RTD AUTOSAR 4.4 * Platform : CORTEXM * Peripheral : GPIO * Dependencies : none * * Autosar Version : 4.4.0 * Autosar Revision : ASR_REL_4_4_REV_0000 * Autosar Conf.Variant : * SW Version : 1.0.0 * Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907 * * (c) Copyright 2020-2021 NXP Semiconductors * All Rights Reserved. * * NXP Confidential. This software is owned or controlled by NXP and may only be * used strictly in accordance with the applicable license terms. By expressly * accepting such terms or by downloading, installing, activating and/or otherwise * using the software, you are agreeing that you have read, and that you agree to * comply with and are bound by, such license terms. If you do not agree to be * bound by the applicable license terms, then you may not retain, install, * activate or otherwise use the software. ==================================================================================================*/ #ifndef DIO_CFG_H #define DIO_CFG_H /** * @file Dio_Cfg.h * @implements Dio_Cfg.h_Artifact * * @defgroup DIO_CFG Dio Cfg * @{ */ #ifdef __cplusplus extern "C" { #endif /*================================================================================================= * INCLUDE FILES * 1) system and project includes * 2) needed interfaces from external units * 3) internal and external interfaces from this unit =================================================================================================*/ #include "StandardTypes.h" /*================================================================================================= * SOURCE FILE VERSION INFORMATION =================================================================================================*/ #define DIO_VENDOR_ID_CFG_H 43 #define DIO_AR_RELEASE_MAJOR_VERSION_CFG_H 4 #define DIO_AR_RELEASE_MINOR_VERSION_CFG_H 4 #define DIO_AR_RELEASE_REVISION_VERSION_CFG_H 0 #define DIO_SW_MAJOR_VERSION_CFG_H 1 #define DIO_SW_MINOR_VERSION_CFG_H 0 #define DIO_SW_PATCH_VERSION_CFG_H 0 /*================================================================================================= * FILE VERSION CHECKS =================================================================================================*/ #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK /* StandardTypes.h version check start */ #if ((DIO_AR_RELEASE_MAJOR_VERSION_CFG_H != STD_AR_RELEASE_MAJOR_VERSION) || \ (DIO_AR_RELEASE_MINOR_VERSION_CFG_H != STD_AR_RELEASE_MINOR_VERSION) \ ) #error "AUTOSAR Version Numbers of Dio_Cfg.h and StandardTypes.h are different" #endif /* StandardTypes.h version check end */ #endif /*================================================================================================= * CONSTANTS =================================================================================================*/ /** * @brief Enable or Disable Development Error Detection. * * @implements DIO_DEV_ERROR_DETECT_define */ #define DIO_DEV_ERROR_DETECT (STD_OFF) /** * @brief Function @p Dio_GetVersionInfo() enable switch. * * @implements DIO_VERSION_INFO_API_define */ #define DIO_VERSION_INFO_API (STD_OFF) /** * @brief Function @p Dio_FlipChannel() enable switch. */ #define DIO_FLIP_CHANNEL_API (STD_ON) /** * @brief Function @p Dio_MaskedWritePort() enable switch. */ #define DIO_MASKEDWRITEPORT_API (STD_OFF) /** * @brief Reversed port functionality enable switch. * * @implements DIO_REVERSEPORTBITS_define */ #define DIO_REVERSEPORTBITS (STD_OFF) /** * @brief Undefined pins masking enable switch. */ #define DIO_READZERO_UNDEFINEDPORTS (STD_OFF) /** * @brief The number of partition on the platform. * * @note Used for channel, port and channel group validation. */ /** * @brief Enable/Disable multiocre function from the driver */ #define DIO_MULTICORE_ENABLED (STD_OFF) /** * @brief Number of implemented ports. * * @note Used for channel, port and channel group validation. */ #define DIO_NUM_PORTS_U16 ((uint16)0x5) /** * @brief The number of partition on the port * * @note Used for port validation. */ #define DIO_PORT_PARTITION_U16 ((uint16)5U) /** * @brief Number of channels available on the implemented ports. * * @note Used for channel validation. */ #if (STD_ON == DIO_DEV_ERROR_DETECT) #define DIO_NUM_CHANNELS_U16 ((uint16)139U) #endif /** * @brief The number of partition on the channel. * * @note Used for channel validation. */ #define DIO_CHANNEL_PARTITION_U16 ((uint16)140U) /** * @brief Mask representing no available channels on a port. * * @note Used for channel validation. */ #if (STD_ON == DIO_DEV_ERROR_DETECT) #define DIO_NO_AVAILABLE_CHANNELS_U16 ((Dio_PortLevelType)0x0U) #endif /** * @brief Mask representing the maximum valid offset for a channel group. * * @note Used for channel group validation. */ #if (STD_ON == DIO_DEV_ERROR_DETECT) #define DIO_MAX_VALID_OFFSET_U8 ((uint8)0x1FU) #endif /** * @brief Enables or disables the access to a hardware register from user mode * USER_MODE_SOFT_LOCKING: All reads to hw registers will be done via REG_PROT, user mode access * SUPERVISOR_MODE_SOFT_LOCKING: Locks the access to the registers only for supervisor mode * * @note Currently, no register protection mechanism is used for Dio driver. */ #define DIO_USER_MODE_SOFT_LOCKING (STD_OFF) /** * @brief Dio driver Pre-Compile configuration switch. */ #define DIO_PRECOMPILE_SUPPORT /** * @brief Support for User mode. * If this parameter has been configured to 'STD_ON', the Dio driver code can be executed from both supervisor and user mode. * */ #define DIO_ENABLE_USER_MODE_SUPPORT (STD_OFF) #ifndef MCAL_ENABLE_USER_MODE_SUPPORT #ifdef DIO_ENABLE_USER_MODE_SUPPORT #if (STD_ON == DIO_ENABLE_USER_MODE_SUPPORT) #error MCAL_ENABLE_USER_MODE_SUPPORT is not enabled. For running Dio in user mode the MCAL_ENABLE_USER_MODE_SUPPORT needs to be defined #endif /* (STD_ON == DIO_ENABLE_USER_MODE_SUPPORT) */ #endif /* ifdef DIO_ENABLE_USER_MODE_SUPPORT*/ #endif /* ifndef MCAL_ENABLE_USER_MODE_SUPPORT */ /*================================================================================================= * DEFINES AND MACROS =================================================================================================*/ /** * @brief Symbolic name for the configuration Dio_ConfigPC. * */ #define Dio_ConfigPC (Dio_Config) /* ========== DioConfig ========== */ /* ---------- DioPort_A ---------- */ /** * @brief Symbolic name for the port DioPort_A. * */ #define DioConf_DioPort_DioPort_A ((uint8)0x00U) /** * @brief Symbolic name for the channel PTA7_GPIO_OUT_MCU_4G_PWRKEY. * */ #define DioConf_DioChannel_PTA7_GPIO_OUT_MCU_4G_PWRKEY ((uint16)0x0007U) /** * @brief Symbolic name for the channel PTA6_GPIO_OUT_MCU_4G_POW_EN. * */ #define DioConf_DioChannel_PTA6_GPIO_OUT_MCU_4G_POW_EN ((uint16)0x0006U) /** * @brief Symbolic name for the channel PTA11_GPIO_OUT_MCU_BMS_WAKEUP_EN. * */ #define DioConf_DioChannel_PTA11_GPIO_OUT_MCU_BMS_WAKEUP_EN ((uint16)0x000bU) /* ---------- DioPort_B ---------- */ /** * @brief Symbolic name for the port DioPort_B. * */ #define DioConf_DioPort_DioPort_B ((uint8)0x01U) /** * @brief Symbolic name for the channel PTB1_GPIO_IN_MCU_4G_STATUS. * */ #define DioConf_DioChannel_PTB1_GPIO_IN_MCU_4G_STATUS ((uint16)0x0021U) /** * @brief Symbolic name for the channel PTB2_GPIO_IN_MCU_4G_RI. * */ #define DioConf_DioChannel_PTB2_GPIO_IN_MCU_4G_RI ((uint16)0x0022U) /** * @brief Symbolic name for the channel PTE7_GPIO_OUT_MCU_BT_MOD. * */ #define DioConf_DioChannel_PTE7_GPIO_OUT_MCU_BT_MOD ((uint16)0x0027U) /** * @brief Symbolic name for the channel PTB4_GPIO_OUT_MCU_RS485_EN. * */ #define DioConf_DioChannel_PTB4_GPIO_OUT_MCU_RS485_EN ((uint16)0x0024U) /* ---------- DioPort_C ---------- */ /** * @brief Symbolic name for the port DioPort_C. * */ #define DioConf_DioPort_DioPort_C ((uint8)0x02U) /** * @brief Symbolic name for the channel PTC0_SPI2_SIN_MCU_3D_SDI. * */ #define DioConf_DioChannel_PTC0_SPI2_SIN_MCU_3D_SDI ((uint16)0x0040U) /** * @brief Symbolic name for the channel PTC1_SPI2_SOUT_MCU_3D_SDO. * */ #define DioConf_DioChannel_PTC1_SPI2_SOUT_MCU_3D_SDO ((uint16)0x0041U) /** * @brief Symbolic name for the channel PTC14_SPI2_PCS0_MCU_3D_CS. * */ #define DioConf_DioChannel_PTC14_SPI2_PCS0_MCU_3D_CS ((uint16)0x004eU) /* ---------- DioPort_D ---------- */ /** * @brief Symbolic name for the port DioPort_D. * */ #define DioConf_DioPort_DioPort_D ((uint8)0x03U) /** * @brief Symbolic name for the channel PTD2_GPIO_OUT_MCU_4G_DTR. * */ #define DioConf_DioChannel_PTD2_GPIO_OUT_MCU_4G_DTR ((uint16)0x0062U) /** * @brief Symbolic name for the channel PTD3_GPIO_OUT_MCU_4G_RESET. * */ #define DioConf_DioChannel_PTD3_GPIO_OUT_MCU_4G_RESET ((uint16)0x0063U) /** * @brief Symbolic name for the channel PTD15_GPIO_OUT_MCU_BUZ_EN. * */ #define DioConf_DioChannel_PTD15_GPIO_OUT_MCU_BUZ_EN ((uint16)0x006fU) /** * @brief Symbolic name for the channel PTD16_GPIO_OUT_MCU_RELAY_POW_EN. * */ #define DioConf_DioChannel_PTD16_GPIO_OUT_MCU_RELAY_POW_EN ((uint16)0x0070U) /** * @brief Symbolic name for the channel PTD0_GPIO_OUT_MCU_GPS_RESET. * */ #define DioConf_DioChannel_PTD0_GPIO_OUT_MCU_GPS_RESET ((uint16)0x0060U) /** * @brief Symbolic name for the channel PTD1_GPIO_OUT_MCU_GPS_POW_EN. * */ #define DioConf_DioChannel_PTD1_GPIO_OUT_MCU_GPS_POW_EN ((uint16)0x0061U) /* ---------- DioPort_E ---------- */ /** * @brief Symbolic name for the port DioPort_E. * */ #define DioConf_DioPort_DioPort_E ((uint8)0x04U) /** * @brief Symbolic name for the channel PTE0_GPIO_OUT_MCU_LED1. * */ #define DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1 ((uint16)0x0080U) /** * @brief Symbolic name for the channel PTE1_GPIO_OUT_MCU_LED2. * */ #define DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2 ((uint16)0x0081U) /** * @brief Symbolic name for the channel PTE7_GPIO_OUT_MCU_LED3. * */ #define DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3 ((uint16)0x0087U) /** * @brief Symbolic name for the channel PTE8_GPIO_OUT_MCU_LED4. * */ #define DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4 ((uint16)0x0088U) /** * @brief Symbolic name for the channel PTE9_GPIO_OUT_MCU_LED5. * */ #define DioConf_DioChannel_PTE9_GPIO_OUT_MCU_LED5 ((uint16)0x0089U) /*================================================================================================= * ENUMS =================================================================================================*/ /*================================================================================================= * STRUCTURES AND OTHER TYPEDEFS =================================================================================================*/ /** * @brief Type of a DIO port representation. * * @implements Dio_PortType_typedef */ typedef uint8 Dio_PortType; /** * @brief Type of a DIO channel representation. * * @implements Dio_ChannelType_typedef */ typedef uint16 Dio_ChannelType; /** * @brief Type of a DIO port levels representation. * * @implements Dio_PortLevelType_typedef */ typedef uint32 Dio_PortLevelType; /** * @brief Type of a DIO channel levels representation. * * @implements Dio_LevelType_typedef */ typedef uint8 Dio_LevelType; /** * @brief Type of a DIO channel group representation. * * @implements Dio_ChannelGroupType_struct */ typedef struct { Dio_PortType port; /**< @brief Port identifier. */ uint8 u8offset; /**< @brief Bit offset within the port. */ Dio_PortLevelType mask; /**< @brief Group mask. */ } Dio_ChannelGroupType; /** * @brief Type of a DIO configuration structure. * * @note In this implementation there is no need for a configuration * structure there is only a dummy field, it is recommended * to initialize this field to zero. * * @implements Dio_ConfigType_struct */ typedef struct { uint8 u8NumChannelGroups; /**< @brief Number of channel groups in configuration */ const Dio_ChannelGroupType * pChannelGroupList; /**< @brief Pointer to list of channel groups in configuration */ const uint32 * pau32Dio_ChannelToPartitionMap; /**< @brief Pointer to channel to partition mapping */ const uint32 * pau32Dio_PortToPartitionMap; /**< @brief Pointer to port to partition mapping */ } Dio_ConfigType; /*================================================================================================= * GLOBAL VARIABLE DECLARATIONS =================================================================================================*/ #define DIO_START_SEC_CONST_32 #include "Dio_MemMap.h" /** * @brief Array containing list of mapping channel for partition */ extern const uint32 au32Dio_ChannelToPartitionMap[DIO_CHANNEL_PARTITION_U16]; /** * @brief Array containing list of mapping port for partition */ extern const uint32 au32Dio_PortToPartitionMap[DIO_PORT_PARTITION_U16]; /** * @brief Array of bitmaps of output pins available per port */ extern const Dio_PortLevelType Dio_aAvailablePinsForWrite[DIO_NUM_PORTS_U16]; /** * @brief Array of bitmaps of input pins available per port */ extern const Dio_PortLevelType Dio_aAvailablePinsForRead[DIO_NUM_PORTS_U16]; #define DIO_STOP_SEC_CONST_32 #include "Dio_MemMap.h" /*================================================================================================= * FUNCTION PROTOTYPES =================================================================================================*/ #ifdef __cplusplus } #endif #endif /* DIO_CFG_H */ /** @} */