SOC.c 26 KB

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  1. #include "SOC.h"
  2. #include "rtwtypes.h"
  3. #include <math.h>
  4. #include "rt_nonfinite.h"
  5. #include "SOC_private.h"
  6. #include "BCUDisp.h"
  7. #include "zero_crossing_types.h"
  8. #include "look1_iflf_binlcapw.h"
  9. #include "BCUCal.h"
  10. MdlrefDW_SOC_T SOC_MdlrefDW;
  11. B_SOC_c_T SOC_B;
  12. DW_SOC_f_T SOC_DW;
  13. ZCE_SOC_T SOC_PrevZCX;
  14. void SOC_IfActionSubsystem(real32_T rtu_Fitdata, real32_T *rty_Out1, real32_T
  15. rtp_m)
  16. {
  17. *rty_Out1 = rtp_m + rtu_Fitdata;
  18. }
  19. void SOC_IfActionSubsystem1(real32_T rtu_Fitdata1, real32_T *rty_Out2, real32_T
  20. rtp_m)
  21. {
  22. *rty_Out2 = -rtp_m + rtu_Fitdata1;
  23. }
  24. void SOC_Subsystem1(boolean_T rtu_Trigger, real32_T rtu_in1, real32_T rtu_in2,
  25. real32_T *rty_out1, real32_T *rty_out2, ZCE_Subsystem1_SOC_T
  26. *localZCE)
  27. {
  28. if (rtu_Trigger && (localZCE->Subsystem1_Trig_ZCE != POS_ZCSIG)) {
  29. *rty_out1 = rtu_in1;
  30. *rty_out2 = rtu_in2;
  31. }
  32. localZCE->Subsystem1_Trig_ZCE = rtu_Trigger;
  33. }
  34. void SOC_Init(void)
  35. {
  36. SOC_DW.icLoad = true;
  37. SOC_DW.icLoad_j = true;
  38. SOC_DW.icLoad_o = true;
  39. SOC_DW.icLoad_i = true;
  40. SOC_DW.icLoad_p = true;
  41. SOC_DW.P_Delay_DSTATE[0] = 0.001F;
  42. SOC_DW.P_Delay_DSTATE_k[0] = 0.001F;
  43. SOC_DW.P_Delay_DSTATE[1] = 0.0F;
  44. SOC_DW.P_Delay_DSTATE_k[1] = 0.0F;
  45. SOC_DW.P_Delay_DSTATE[2] = 0.0F;
  46. SOC_DW.P_Delay_DSTATE_k[2] = 0.0F;
  47. SOC_DW.P_Delay_DSTATE[3] = 0.001F;
  48. SOC_DW.P_Delay_DSTATE_k[3] = 0.001F;
  49. SOC_DW.icLoad_a = true;
  50. SOC_DW.icLoad_l = true;
  51. SOC_DW.icLoad_m = true;
  52. SOC_DW.socd_pct_battSoc0_Delay_DSTATE = 1.0F;
  53. SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE = 1.0F;
  54. SOC_DW.icLoad_g = true;
  55. SOC_DW.icLoad_n = true;
  56. }
  57. void SOC_Disable(void)
  58. {
  59. SOC_DW.If_ActiveSubsystem = -1;
  60. SOC_DW.If_ActiveSubsystem_j = -1;
  61. }
  62. void SOC_Start(void)
  63. {
  64. SOC_DW.If_ActiveSubsystem = -1;
  65. SOC_DW.If_ActiveSubsystem_j = -1;
  66. }
  67. void SOC(void)
  68. {
  69. real_T rtb_Switch_n;
  70. real_T tmp_3;
  71. int_T idxDelay;
  72. real32_T rtb_Add_e[4];
  73. real32_T rtb_Add_mg[4];
  74. real32_T rtb_MatrixConcatenate[4];
  75. real32_T tmp[4];
  76. real32_T rtb_Divide_f[2];
  77. real32_T rtb_MathFunction1_b[2];
  78. real32_T rtb_MathFunction1_l[2];
  79. real32_T rtb_Abs1;
  80. real32_T rtb_Add6;
  81. real32_T rtb_Add_fu_tmp_tmp;
  82. real32_T rtb_Add_ht_tmp_tmp;
  83. real32_T rtb_Divide_l;
  84. real32_T rtb_Gain;
  85. real32_T rtb_MathFunction1_g;
  86. real32_T rtb_Merge3;
  87. real32_T rtb_OCVSOC1;
  88. real32_T tmp_0;
  89. real32_T tmp_1;
  90. real32_T tmp_2;
  91. uint16_T rtb_Gain3;
  92. uint16_T rtb_Gain3_l;
  93. int8_T rtPrevAction;
  94. boolean_T rtb_LogicalOperator3_i;
  95. if (SOC_DW.UnitDelay_DSTATE + 1.0 <= SOC_ConstB.Add) {
  96. SOC_DW.UnitDelay_DSTATE++;
  97. } else {
  98. SOC_DW.UnitDelay_DSTATE = SOC_ConstB.Add;
  99. }
  100. if (SOC_DW.UnitDelay_DSTATE == 1.0) {
  101. rtb_OCVSOC1 = look1_iflf_binlcapw(ihd_V_cellUAvrg, &cmnm_V_ocv[0],
  102. &cmnm_pct_soc[0], 12U);
  103. if (ihv_flg_EESt[1] || (socd_pct_battSocEi > 100.0F) || (socd_pct_bcuSocEi >
  104. 100.0F)) {
  105. SOC_B.Switch1 = rtb_OCVSOC1;
  106. SOC_B.Switch = rtb_OCVSOC1;
  107. } else {
  108. SOC_B.Switch1 = socd_pct_battSocEi;
  109. SOC_B.Switch = socd_pct_bcuSocEi;
  110. }
  111. rtb_LogicalOperator3_i = ((ihd_tm_parkTime >= cmnc_tm_parkTime) &&
  112. ((rtb_OCVSOC1 >= 95.0F) || (rtb_OCVSOC1 <= 30.0F)));
  113. if (rtb_LogicalOperator3_i) {
  114. SOC_B.Switch1 = rtb_OCVSOC1;
  115. }
  116. if ((fabsf(SOC_B.Switch1 - SOC_B.Switch) > 50.0F) && rtb_LogicalOperator3_i)
  117. {
  118. SOC_B.Switch = rtb_OCVSOC1;
  119. }
  120. SOC_B.Divide = sohd_pct_bcuSoh * cmnc_Q_ratedCp / 100.0F;
  121. }
  122. if (SOC_DW.icLoad) {
  123. SOC_DW.Delay_DSTATE = SOC_B.Switch;
  124. }
  125. if (SOC_DW.Delay_DSTATE > socc_pct_battSocUp) {
  126. socd_pct_bcuSocEo = socc_pct_battSocUp;
  127. } else if (SOC_DW.Delay_DSTATE < socc_pct_battSocLow) {
  128. socd_pct_bcuSocEo = socc_pct_battSocLow;
  129. } else {
  130. socd_pct_bcuSocEo = SOC_DW.Delay_DSTATE;
  131. }
  132. rtb_Gain = -0.5F * ihd_I_battCurr_T2;
  133. if (dcmd_st_chrgSt_T2 == chrging) {
  134. uint8_T tmp_4;
  135. rtb_OCVSOC1 = fabsf(ihd_pct_socCor);
  136. SOC_DW.UnitDelay_DSTATE_o += rtb_Gain * socc_tm_step;
  137. rtb_Divide_l = SOC_DW.UnitDelay_DSTATE_o / 3600.0F;
  138. rtb_MathFunction1_g = floorf(1000.0F * ihd_V_cellUMax);
  139. if (rtIsNaNF(rtb_MathFunction1_g) || rtIsInfF(rtb_MathFunction1_g)) {
  140. rtb_MathFunction1_g = 0.0F;
  141. } else {
  142. rtb_MathFunction1_g = fmodf(rtb_MathFunction1_g, 65536.0F);
  143. }
  144. rtb_Gain3 = (uint16_T)(rtb_MathFunction1_g < 0.0F ? (int32_T)(uint16_T)
  145. -(int16_T)(uint16_T)-rtb_MathFunction1_g : (int32_T)(uint16_T)
  146. rtb_MathFunction1_g);
  147. rtb_LogicalOperator3_i = (rtb_Gain3 > SOC_DW.UnitDelay5_DSTATE);
  148. if (rtb_LogicalOperator3_i) {
  149. socd_Q_dMax = rtb_Divide_l - SOC_DW.Delay_DSTATE_f[0];
  150. SOC_B.LogicalOperator_j = ((socd_Q_dMax - SOC_DW.UnitDelay_DSTATE_i <
  151. -0.01F) && (SOC_DW.UnitDelay2_DSTATE - SOC_DW.UnitDelay3_DSTATE >= 0.01F));
  152. for (idxDelay = 0; idxDelay < 9; idxDelay++) {
  153. SOC_DW.Delay_DSTATE_f[idxDelay] = SOC_DW.Delay_DSTATE_f[idxDelay + 1];
  154. }
  155. SOC_DW.Delay_DSTATE_f[9] = rtb_Divide_l;
  156. SOC_DW.UnitDelay_DSTATE_i = socd_Q_dMax;
  157. SOC_DW.UnitDelay2_DSTATE = socd_Q_dMax;
  158. SOC_DW.UnitDelay3_DSTATE = SOC_DW.UnitDelay1_DSTATE_a;
  159. SOC_DW.UnitDelay1_DSTATE_a = socd_Q_dMax;
  160. }
  161. if ((SOC_DW.UnitDelay1_DSTATE_h <= 1.0F) && (rtb_OCVSOC1 >= 1.0F)) {
  162. tmp_4 = 2U;
  163. } else {
  164. tmp_4 = (uint8_T)(SOC_B.LogicalOperator_j && (ihd_V_cellUMax <= 3.4F));
  165. }
  166. switch (tmp_4) {
  167. case 0:
  168. rtb_Merge3 = 0.0F;
  169. break;
  170. case 1:
  171. rtb_Merge3 = 50.0F - socd_pct_ekfSoc;
  172. break;
  173. default:
  174. rtb_Merge3 = ihd_pct_socCor;
  175. break;
  176. }
  177. rtb_MathFunction1_g = floorf(1000.0F * ihd_V_cellUMin);
  178. if (rtIsNaNF(rtb_MathFunction1_g) || rtIsInfF(rtb_MathFunction1_g)) {
  179. rtb_MathFunction1_g = 0.0F;
  180. } else {
  181. rtb_MathFunction1_g = fmodf(rtb_MathFunction1_g, 65536.0F);
  182. }
  183. rtb_Gain3_l = (uint16_T)(rtb_MathFunction1_g < 0.0F ? (int32_T)(uint16_T)
  184. -(int16_T)(uint16_T)-rtb_MathFunction1_g : (int32_T)(uint16_T)
  185. rtb_MathFunction1_g);
  186. if (rtb_Gain3_l > SOC_DW.UnitDelay5_DSTATE_k) {
  187. SOC_DW.UnitDelay5_DSTATE_k = rtb_Gain3_l;
  188. socd_Q_dMin = rtb_Divide_l - SOC_DW.Delay_DSTATE_lp[0];
  189. for (idxDelay = 0; idxDelay < 9; idxDelay++) {
  190. SOC_DW.Delay_DSTATE_lp[idxDelay] = SOC_DW.Delay_DSTATE_lp[idxDelay + 1];
  191. }
  192. SOC_DW.Delay_DSTATE_lp[9] = rtb_Divide_l;
  193. }
  194. if (rtb_LogicalOperator3_i) {
  195. SOC_DW.UnitDelay5_DSTATE = rtb_Gain3;
  196. }
  197. SOC_DW.UnitDelay1_DSTATE_h = rtb_OCVSOC1;
  198. } else {
  199. socd_Q_dMin = 0.0F;
  200. socd_Q_dMax = 0.0F;
  201. rtb_OCVSOC1 = fabsf(ihd_pct_socCor);
  202. if ((SOC_DW.UnitDelay1_DSTATE <= 1.0F) && (rtb_OCVSOC1 >= 1.0F)) {
  203. rtb_Merge3 = ihd_pct_socCor;
  204. } else {
  205. rtb_Merge3 = 0.0F;
  206. }
  207. SOC_DW.UnitDelay1_DSTATE = rtb_OCVSOC1;
  208. }
  209. if (SOC_DW.icLoad_j) {
  210. SOC_DW.Delay_DSTATE_l = SOC_B.Switch1;
  211. }
  212. rtb_MathFunction1_g = fabsf(rtb_Merge3);
  213. if (rtb_MathFunction1_g >= 1.0F) {
  214. SOC_DW.Delay_DSTATE_l = (rtb_Gain * socc_tm_step / 36.0F / SOC_B.Divide +
  215. SOC_DW.Delay_DSTATE_l) + rtb_Merge3;
  216. } else {
  217. SOC_DW.Delay_DSTATE_l += rtb_Gain * socc_tm_step / 36.0F / SOC_B.Divide;
  218. }
  219. rtb_MatrixConcatenate[0] = 1.0F;
  220. rtb_MatrixConcatenate[1] = 0.0F;
  221. if (SOC_DW.icLoad_o) {
  222. SOC_DW.Delay1_DSTATE = SOC_B.Switch1;
  223. }
  224. if (rtb_MathFunction1_g >= 1.0F) {
  225. SOC_DW.Delay1_DSTATE += rtb_Merge3;
  226. }
  227. rtb_OCVSOC1 = expf(-socc_tm_step / look1_iflf_binlcapw(SOC_DW.Delay1_DSTATE,
  228. &cmnm_pct_soc[0], &cmnm_tm_polar[0], 12U));
  229. rtb_MatrixConcatenate[2] = 0.0F;
  230. rtb_MatrixConcatenate[3] = rtb_OCVSOC1;
  231. for (idxDelay = 0; idxDelay < 2; idxDelay++) {
  232. tmp[idxDelay] = 0.0F;
  233. tmp[idxDelay] += SOC_DW.P_Delay_DSTATE[idxDelay];
  234. rtb_Divide_l = SOC_DW.P_Delay_DSTATE[idxDelay + 2];
  235. tmp[idxDelay] += rtb_Divide_l * 0.0F;
  236. tmp[idxDelay + 2] = 0.0F;
  237. tmp[idxDelay + 2] += SOC_DW.P_Delay_DSTATE[idxDelay] * 0.0F;
  238. tmp[idxDelay + 2] += rtb_Divide_l * rtb_OCVSOC1;
  239. }
  240. rtb_MathFunction1_b[0] = (look1_iflf_binlcapw(SOC_DW.Delay1_DSTATE + 0.01F,
  241. &cmnm_pct_soc[0], &cmnm_V_ocv[0], 12U) - look1_iflf_binlcapw
  242. (SOC_DW.Delay1_DSTATE - 0.01F, &cmnm_pct_soc[0], &cmnm_V_ocv[0], 12U)) /
  243. SOC_ConstB.Add4_j;
  244. rtb_MathFunction1_b[1] = 1.0F;
  245. rtb_Divide_l = 0.0F;
  246. for (idxDelay = 0; idxDelay < 2; idxDelay++) {
  247. rtb_Add_ht_tmp_tmp = rtb_MatrixConcatenate[idxDelay + 2];
  248. rtb_Add6 = (rtb_Add_ht_tmp_tmp * tmp[1] + rtb_MatrixConcatenate[idxDelay] *
  249. tmp[0]) + 0.0005F;
  250. rtb_Add_e[idxDelay] = rtb_Add6;
  251. rtb_Add_ht_tmp_tmp = (rtb_Add_ht_tmp_tmp * tmp[3] +
  252. rtb_MatrixConcatenate[idxDelay] * tmp[2]) + 0.0005F;
  253. rtb_Add_e[idxDelay + 2] = rtb_Add_ht_tmp_tmp;
  254. rtb_Add6 = rtb_Add6 * rtb_MathFunction1_b[0] + rtb_Add_ht_tmp_tmp;
  255. rtb_Divide_l += rtb_MathFunction1_b[idxDelay] * rtb_Add6;
  256. rtb_Divide_f[idxDelay] = rtb_Add6;
  257. }
  258. rtb_Add6 = rtb_Divide_f[0] / (rtb_Divide_l + 0.5F);
  259. rtb_Add_ht_tmp_tmp = rtb_Divide_f[1] / (rtb_Divide_l + 0.5F);
  260. if (SOC_DW.icLoad_i) {
  261. SOC_DW.Delay2_DSTATE = 0.0F;
  262. }
  263. rtb_Divide_f[1] = (1.0F - rtb_OCVSOC1) * (0.001F * look1_iflf_binlcapw
  264. (SOC_DW.Delay1_DSTATE, &cmnm_pct_soc[0], &cmnm_ohm_polar[0], 12U)) *
  265. rtb_Gain + (0.0F * SOC_DW.Delay1_DSTATE + rtb_OCVSOC1 * SOC_DW.Delay2_DSTATE);
  266. rtb_Divide_l = ihd_V_cellUMax - ((0.001F * look1_iflf_binlcapw
  267. (SOC_DW.Delay1_DSTATE, &cmnm_pct_soc[0], &cmnm_ohm_Ro[0], 12U) * rtb_Gain +
  268. look1_iflf_binlcapw(SOC_DW.Delay1_DSTATE, &cmnm_pct_soc[0], &cmnm_V_ocv[0],
  269. 12U)) + rtb_Divide_f[1]);
  270. rtb_Abs1 = socc_tm_step / SOC_B.Divide * 0.027777778F * rtb_Gain;
  271. SOC_DW.Delay1_DSTATE = ((0.0F * SOC_DW.Delay2_DSTATE + SOC_DW.Delay1_DSTATE) +
  272. rtb_Abs1) + rtb_Add6 * rtb_Divide_l;
  273. rtb_MatrixConcatenate[0] = 1.0F;
  274. SOC_DW.Delay2_DSTATE = rtb_Add_ht_tmp_tmp * rtb_Divide_l + rtb_Divide_f[1];
  275. rtb_MatrixConcatenate[1] = 0.0F;
  276. if (SOC_DW.icLoad_p) {
  277. SOC_DW.Delay1_DSTATE_a = SOC_B.Switch1;
  278. }
  279. if (rtb_MathFunction1_g >= 1.0F) {
  280. SOC_DW.Delay1_DSTATE_a += rtb_Merge3;
  281. }
  282. rtb_OCVSOC1 = expf(-socc_tm_step / look1_iflf_binlcapw(SOC_DW.Delay1_DSTATE_a,
  283. &cmnm_pct_soc[0], &cmnm_tm_polar[0], 12U));
  284. rtb_MatrixConcatenate[2] = 0.0F;
  285. rtb_MatrixConcatenate[3] = rtb_OCVSOC1;
  286. for (idxDelay = 0; idxDelay < 2; idxDelay++) {
  287. tmp[idxDelay] = 0.0F;
  288. tmp[idxDelay] += SOC_DW.P_Delay_DSTATE_k[idxDelay];
  289. rtb_MathFunction1_g = SOC_DW.P_Delay_DSTATE_k[idxDelay + 2];
  290. tmp[idxDelay] += rtb_MathFunction1_g * 0.0F;
  291. tmp[idxDelay + 2] = 0.0F;
  292. tmp[idxDelay + 2] += SOC_DW.P_Delay_DSTATE_k[idxDelay] * 0.0F;
  293. tmp[idxDelay + 2] += rtb_MathFunction1_g * rtb_OCVSOC1;
  294. }
  295. rtb_MathFunction1_l[0] = (look1_iflf_binlcapw(SOC_DW.Delay1_DSTATE_a + 0.01F,
  296. &cmnm_pct_soc[0], &cmnm_V_ocv[0], 12U) - look1_iflf_binlcapw
  297. (SOC_DW.Delay1_DSTATE_a - 0.01F, &cmnm_pct_soc[0], &cmnm_V_ocv[0], 12U)) /
  298. SOC_ConstB.Add4;
  299. rtb_MathFunction1_l[1] = 1.0F;
  300. rtb_MathFunction1_g = 0.0F;
  301. for (idxDelay = 0; idxDelay < 2; idxDelay++) {
  302. rtb_Add_fu_tmp_tmp = rtb_MatrixConcatenate[idxDelay + 2];
  303. rtb_Merge3 = (rtb_Add_fu_tmp_tmp * tmp[1] + rtb_MatrixConcatenate[idxDelay] *
  304. tmp[0]) + 0.0005F;
  305. rtb_Add_mg[idxDelay] = rtb_Merge3;
  306. rtb_Add_fu_tmp_tmp = (rtb_Add_fu_tmp_tmp * tmp[3] +
  307. rtb_MatrixConcatenate[idxDelay] * tmp[2]) + 0.0005F;
  308. rtb_Add_mg[idxDelay + 2] = rtb_Add_fu_tmp_tmp;
  309. rtb_Merge3 = rtb_Merge3 * rtb_MathFunction1_l[0] + rtb_Add_fu_tmp_tmp;
  310. rtb_MathFunction1_g += rtb_MathFunction1_l[idxDelay] * rtb_Merge3;
  311. rtb_Divide_f[idxDelay] = rtb_Merge3;
  312. }
  313. rtb_Add_fu_tmp_tmp = rtb_Divide_f[0] / (rtb_MathFunction1_g + 0.5F);
  314. rtb_MathFunction1_g = rtb_Divide_f[1] / (rtb_MathFunction1_g + 0.5F);
  315. if (SOC_DW.icLoad_a) {
  316. SOC_DW.Delay2_DSTATE_k = 0.0F;
  317. }
  318. rtb_Merge3 = (1.0F - rtb_OCVSOC1) * (0.001F * look1_iflf_binlcapw
  319. (SOC_DW.Delay1_DSTATE_a, &cmnm_pct_soc[0], &cmnm_ohm_polar[0], 12U)) *
  320. rtb_Gain + (0.0F * SOC_DW.Delay1_DSTATE_a + rtb_OCVSOC1 *
  321. SOC_DW.Delay2_DSTATE_k);
  322. rtb_OCVSOC1 = ihd_V_cellUMin - ((0.001F * look1_iflf_binlcapw
  323. (SOC_DW.Delay1_DSTATE_a, &cmnm_pct_soc[0], &cmnm_ohm_Ro[0], 12U) * rtb_Gain
  324. + look1_iflf_binlcapw(SOC_DW.Delay1_DSTATE_a, &cmnm_pct_soc[0], &cmnm_V_ocv
  325. [0], 12U)) + rtb_Merge3);
  326. SOC_DW.Delay1_DSTATE_a = ((0.0F * SOC_DW.Delay2_DSTATE_k +
  327. SOC_DW.Delay1_DSTATE_a) + rtb_Abs1) + rtb_Add_fu_tmp_tmp * rtb_OCVSOC1;
  328. if (SOC_DW.Delay1_DSTATE >= 80.0F) {
  329. rtb_Abs1 = 1.0F;
  330. } else if (SOC_DW.Delay1_DSTATE_a <= 20.0F) {
  331. rtb_Abs1 = 0.0F;
  332. } else {
  333. rtb_Abs1 = (SOC_DW.Delay1_DSTATE_a - 20.0F) / ((80.0F -
  334. (SOC_DW.Delay1_DSTATE - SOC_DW.Delay1_DSTATE_a)) - 20.0F);
  335. }
  336. socd_pct_ekfSoc = (1.0F - rtb_Abs1) * SOC_DW.Delay1_DSTATE_a +
  337. SOC_DW.Delay1_DSTATE * rtb_Abs1;
  338. rtb_Gain3 = (uint16_T)(SOC_DW.UnitDelay_DSTATE_n + 1U);
  339. idxDelay = (int32_T)fmod(socc_Nr_judge + 1, 65536.0);
  340. if ((uint16_T)(SOC_DW.UnitDelay_DSTATE_n + 1U) > (uint16_T)idxDelay) {
  341. rtb_Gain3 = (uint16_T)idxDelay;
  342. }
  343. rtb_LogicalOperator3_i = (rtb_Gain3 >= socc_Nr_judge);
  344. SOC_Subsystem1(!rtb_LogicalOperator3_i, SOC_DW.Delay_DSTATE_l, socd_pct_ekfSoc,
  345. &SOC_B.in1_ix, &SOC_B.in2_fe, &SOC_PrevZCX.Subsystem1);
  346. if (!rtb_LogicalOperator3_i) {
  347. socd_pct_battSocEo = (SOC_DW.Delay_DSTATE_l - SOC_B.in1_ix) + SOC_B.in2_fe;
  348. } else {
  349. socd_pct_battSocEo = socd_pct_ekfSoc;
  350. }
  351. rtPrevAction = SOC_DW.If_ActiveSubsystem;
  352. SOC_DW.If_ActiveSubsystem = (int8_T)(dcmd_st_chrgSt_T2 != chrging);
  353. if (SOC_DW.If_ActiveSubsystem == 0) {
  354. if (rtPrevAction != 0) {
  355. SOC_DW.UnitDelay_DSTATE_o2 = 0U;
  356. SOC_DW.UnitDelay_DSTATE_dx = 0U;
  357. SOC_DW.UnitDelay_DSTATE_fs = false;
  358. SOC_DW.UnitDelay_DSTATE_h = 0U;
  359. SOC_DW.UnitDelay_DSTATE_e = false;
  360. }
  361. if ((uint16_T)(SOC_DW.UnitDelay_DSTATE_o2 + 1U) <= (uint16_T)idxDelay) {
  362. SOC_DW.UnitDelay_DSTATE_o2++;
  363. } else {
  364. SOC_DW.UnitDelay_DSTATE_o2 = (uint16_T)idxDelay;
  365. }
  366. if ((SOC_DW.UnitDelay_DSTATE_o2 > 20) && (!(socd_pct_battSocEo <=
  367. socc_pct_chrgCCV))) {
  368. socd_pct_battSocEo = socc_pct_chrgCCV;
  369. }
  370. rtb_Gain3_l = (uint16_T)(SOC_DW.UnitDelay_DSTATE_dx + 1U);
  371. if ((uint16_T)(SOC_DW.UnitDelay_DSTATE_dx + 1U) > (uint16_T)idxDelay) {
  372. rtb_Gain3_l = (uint16_T)idxDelay;
  373. }
  374. rtb_LogicalOperator3_i = ((rtb_Gain3_l >= socc_Nr_judge) ||
  375. SOC_DW.UnitDelay_DSTATE_fs);
  376. SOC_Subsystem1(rtb_LogicalOperator3_i, SOC_DW.Delay_DSTATE_l,
  377. socd_pct_battSocEo, &SOC_B.in1_i, &SOC_B.in2_f,
  378. &SOC_PrevZCX.Subsystem2);
  379. SOC_DW.UnitDelay_DSTATE_dx = (uint16_T)(ihd_V_cellUMax >=
  380. look1_iflf_binlcapw(rtb_Gain, &socm_I_chrgCor[0], &socm_V_chrgCor[0], 1U) ?
  381. (int32_T)rtb_Gain3_l : 0);
  382. rtb_Gain3_l = (uint16_T)(SOC_DW.UnitDelay_DSTATE_h + 1U);
  383. if ((uint16_T)(SOC_DW.UnitDelay_DSTATE_h + 1U) > (uint16_T)idxDelay) {
  384. rtb_Gain3_l = (uint16_T)idxDelay;
  385. }
  386. SOC_DW.UnitDelay_DSTATE_h = (uint16_T)(ihd_V_cellUMax >= cmnc_V_chrgLim ?
  387. (int32_T)rtb_Gain3_l : 0);
  388. SOC_DW.UnitDelay_DSTATE_fs = SOC_DW.UnitDelay_DSTATE_e;
  389. SOC_DW.UnitDelay_DSTATE_e = ((rtb_Gain3_l >= socc_Nr_judge) ||
  390. SOC_DW.UnitDelay_DSTATE_fs);
  391. if (SOC_DW.UnitDelay_DSTATE_e) {
  392. socd_pct_battSocEo = socc_pct_battSocUp;
  393. } else {
  394. if (rtb_LogicalOperator3_i) {
  395. socd_pct_battSocEo = (SOC_DW.Delay_DSTATE_l - SOC_B.in1_i) + fmaxf
  396. (socc_pct_chrgCCV, SOC_B.in2_f);
  397. }
  398. if (!(socd_pct_battSocEo <= (real32_T)(socc_pct_battSocUp - 0.1))) {
  399. socd_pct_battSocEo = (real32_T)(socc_pct_battSocUp - 0.1);
  400. }
  401. }
  402. SOC_DW.UnitDelay_DSTATE_fs = rtb_LogicalOperator3_i;
  403. } else {
  404. uint16_T rtb_Switch_l;
  405. if (rtPrevAction != 1) {
  406. SOC_DW.UnitDelay_DSTATE_c = 0.0;
  407. SOC_DW.UnitDelay_DSTATE_p = 0U;
  408. SOC_DW.UnitDelay_DSTATE_ca = false;
  409. SOC_DW.UnitDelay_DSTATE_ol = 0U;
  410. SOC_DW.UnitDelay_DSTATE_f = false;
  411. }
  412. if (SOC_DW.UnitDelay_DSTATE_c + 1.0 <= SOC_ConstB.Add_i) {
  413. SOC_DW.UnitDelay_DSTATE_c++;
  414. } else {
  415. SOC_DW.UnitDelay_DSTATE_c = SOC_ConstB.Add_i;
  416. }
  417. if ((SOC_DW.UnitDelay_DSTATE_c > 20.0) && (!(socd_pct_battSocEo >=
  418. socc_pct_disChrgCCV))) {
  419. socd_pct_battSocEo = socc_pct_disChrgCCV;
  420. }
  421. rtb_Gain3_l = (uint16_T)(SOC_DW.UnitDelay_DSTATE_p + 1U);
  422. if ((uint16_T)(SOC_DW.UnitDelay_DSTATE_p + 1U) > socc_Nr_judge) {
  423. rtb_Gain3_l = socc_Nr_judge;
  424. }
  425. rtb_LogicalOperator3_i = ((rtb_Gain3_l >= socc_Nr_judge) ||
  426. SOC_DW.UnitDelay_DSTATE_ca);
  427. SOC_Subsystem1(rtb_LogicalOperator3_i, SOC_DW.Delay_DSTATE_l,
  428. socd_pct_battSocEo, &SOC_B.in1, &SOC_B.in2,
  429. &SOC_PrevZCX.Subsystem2_e);
  430. rtb_Switch_l = (uint16_T)(SOC_DW.UnitDelay_DSTATE_ol + 1U);
  431. if ((uint16_T)(SOC_DW.UnitDelay_DSTATE_ol + 1U) > socc_Nr_judge) {
  432. rtb_Switch_l = socc_Nr_judge;
  433. }
  434. SOC_DW.UnitDelay_DSTATE_ol = (uint16_T)(ihd_V_cellUMin <=
  435. look1_iflf_binlcapw(rtb_Gain, &socm_I_disChrgCor[0], &socm_V_emptyV[0], 1U)
  436. ? (int32_T)rtb_Switch_l : 0);
  437. SOC_DW.UnitDelay_DSTATE_p = (uint16_T)(ihd_V_cellUMin <= look1_iflf_binlcapw
  438. (rtb_Gain, &socm_I_disChrgCor[0], &socm_V_disChrgCor[0], 1U) ? (int32_T)
  439. rtb_Gain3_l : 0);
  440. SOC_DW.UnitDelay_DSTATE_ca = SOC_DW.UnitDelay_DSTATE_f;
  441. SOC_DW.UnitDelay_DSTATE_f = ((rtb_Switch_l >= socc_Nr_judge) ||
  442. SOC_DW.UnitDelay_DSTATE_ca);
  443. if (SOC_DW.UnitDelay_DSTATE_f) {
  444. socd_pct_battSocEo = socc_pct_battSocLow;
  445. } else {
  446. if (rtb_LogicalOperator3_i) {
  447. socd_pct_battSocEo = (SOC_DW.Delay_DSTATE_l - SOC_B.in1) + fminf
  448. (socc_pct_disChrgCCV, SOC_B.in2);
  449. }
  450. if (!(socd_pct_battSocEo >= (real32_T)(socc_pct_battSocLow + 0.1))) {
  451. socd_pct_battSocEo = (real32_T)(socc_pct_battSocLow + 0.1);
  452. }
  453. }
  454. SOC_DW.UnitDelay_DSTATE_ca = rtb_LogicalOperator3_i;
  455. }
  456. rtb_Abs1 = 1.0F - rtb_Add_fu_tmp_tmp * rtb_MathFunction1_l[0];
  457. tmp_2 = 0.0F - rtb_MathFunction1_g * rtb_MathFunction1_l[0];
  458. tmp_0 = 1.0F - rtb_Add6 * rtb_MathFunction1_b[0];
  459. tmp_1 = 0.0F - rtb_Add_ht_tmp_tmp * rtb_MathFunction1_b[0];
  460. for (idxDelay = 0; idxDelay < 2; idxDelay++) {
  461. int32_T P_Delay_DSTATE_k_tmp;
  462. real32_T P_Delay_DSTATE_k_tmp_0;
  463. real32_T P_Delay_DSTATE_k_tmp_1;
  464. P_Delay_DSTATE_k_tmp = idxDelay << 1;
  465. SOC_DW.P_Delay_DSTATE_k[P_Delay_DSTATE_k_tmp] = 0.0F;
  466. P_Delay_DSTATE_k_tmp_0 = rtb_Add_mg[P_Delay_DSTATE_k_tmp];
  467. SOC_DW.P_Delay_DSTATE_k[P_Delay_DSTATE_k_tmp] += P_Delay_DSTATE_k_tmp_0 *
  468. rtb_Abs1;
  469. P_Delay_DSTATE_k_tmp_1 = rtb_Add_mg[P_Delay_DSTATE_k_tmp + 1];
  470. SOC_DW.P_Delay_DSTATE_k[P_Delay_DSTATE_k_tmp] += (0.0F - rtb_Add_fu_tmp_tmp)
  471. * P_Delay_DSTATE_k_tmp_1;
  472. SOC_DW.P_Delay_DSTATE_k[P_Delay_DSTATE_k_tmp + 1] = 0.0F;
  473. SOC_DW.P_Delay_DSTATE_k[P_Delay_DSTATE_k_tmp + 1] += P_Delay_DSTATE_k_tmp_0 *
  474. tmp_2;
  475. SOC_DW.P_Delay_DSTATE_k[P_Delay_DSTATE_k_tmp + 1] += (1.0F -
  476. rtb_MathFunction1_g) * P_Delay_DSTATE_k_tmp_1;
  477. SOC_DW.P_Delay_DSTATE[P_Delay_DSTATE_k_tmp] = 0.0F;
  478. P_Delay_DSTATE_k_tmp_0 = rtb_Add_e[P_Delay_DSTATE_k_tmp];
  479. SOC_DW.P_Delay_DSTATE[P_Delay_DSTATE_k_tmp] += P_Delay_DSTATE_k_tmp_0 *
  480. tmp_0;
  481. P_Delay_DSTATE_k_tmp_1 = rtb_Add_e[P_Delay_DSTATE_k_tmp + 1];
  482. SOC_DW.P_Delay_DSTATE[P_Delay_DSTATE_k_tmp] += (0.0F - rtb_Add6) *
  483. P_Delay_DSTATE_k_tmp_1;
  484. SOC_DW.P_Delay_DSTATE[P_Delay_DSTATE_k_tmp + 1] = 0.0F;
  485. SOC_DW.P_Delay_DSTATE[P_Delay_DSTATE_k_tmp + 1] += P_Delay_DSTATE_k_tmp_0 *
  486. tmp_1;
  487. SOC_DW.P_Delay_DSTATE[P_Delay_DSTATE_k_tmp + 1] += (1.0F -
  488. rtb_Add_ht_tmp_tmp) * P_Delay_DSTATE_k_tmp_1;
  489. }
  490. if (SOC_DW.Delay_DSTATE_l > socc_pct_battSocUp) {
  491. socd_pct_ahSoc = socc_pct_battSocUp;
  492. } else if (SOC_DW.Delay_DSTATE_l < socc_pct_battSocLow) {
  493. socd_pct_ahSoc = socc_pct_battSocLow;
  494. } else {
  495. socd_pct_ahSoc = SOC_DW.Delay_DSTATE_l;
  496. }
  497. if (SOC_DW.icLoad_l) {
  498. SOC_DW.Delay1_DSTATE_n = socd_pct_battSocEo;
  499. }
  500. if ((uint16_T)(SOC_DW.UnitDelay_DSTATE_m + 1U) <= SOC_ConstB.Add_j) {
  501. rtb_Switch_n = (uint16_T)(SOC_DW.UnitDelay_DSTATE_m + 1U);
  502. } else {
  503. rtb_Switch_n = SOC_ConstB.Add_j;
  504. }
  505. tmp_3 = floor((real_T)(fabsf(rtb_Gain) < 1.0F) * rtb_Switch_n);
  506. if (rtIsNaN(tmp_3) || rtIsInf(tmp_3)) {
  507. tmp_3 = 0.0;
  508. } else {
  509. tmp_3 = fmod(tmp_3, 65536.0);
  510. }
  511. SOC_DW.UnitDelay_DSTATE_m = (uint16_T)(tmp_3 < 0.0 ? (int32_T)(uint16_T)
  512. -(int16_T)(uint16_T)-tmp_3 : (int32_T)(uint16_T)tmp_3);
  513. if (SOC_DW.icLoad_m) {
  514. SOC_DW.Delay2_DSTATE_b = dcmd_st_chrgSt_T2;
  515. }
  516. if (SOC_DW.UnitDelay_DSTATE_d + 1.0 <= SOC_ConstB.Add_m) {
  517. SOC_DW.UnitDelay_DSTATE_d++;
  518. } else {
  519. SOC_DW.UnitDelay_DSTATE_d = SOC_ConstB.Add_m;
  520. }
  521. if ((SOC_DW.UnitDelay_DSTATE_d == 1.0) || ((SOC_DW.Delay2_DSTATE_b == chrging)
  522. && (dcmd_st_chrgSt_T2 != chrging)) || ((SOC_DW.Delay2_DSTATE_b != chrging)
  523. && (dcmd_st_chrgSt_T2 == chrging)) || (fabsf(socd_pct_battSocEo -
  524. SOC_DW.Delay1_DSTATE_n) > 2.0F) || (rtb_Switch_n > (uint16_T)(5U *
  525. socc_Nr_judge))) {
  526. SOC_DW.socd_pct_battSoc0_Delay_DSTATE = socd_pct_battSocEo;
  527. SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE = socd_pct_bcuSocEo;
  528. }
  529. rtPrevAction = SOC_DW.If_ActiveSubsystem_j;
  530. SOC_DW.If_ActiveSubsystem_j = (int8_T)(dcmd_st_chrgSt_T2 != chrging);
  531. if (SOC_DW.If_ActiveSubsystem_j == 0) {
  532. if (rtPrevAction != 0) {
  533. SOC_DW.icLoad_g = true;
  534. SOC_DW.UnitDelay_DSTATE_b = 0.0F;
  535. }
  536. if (socd_pct_battSocEo <= SOC_DW.socd_pct_battSoc0_Delay_DSTATE) {
  537. rtb_Gain = SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE;
  538. } else if (socd_pct_battSocEo >= socc_pct_battSocUp) {
  539. rtb_Gain = socc_pct_battSocUp;
  540. } else {
  541. rtb_Gain = fminf(socc_pct_battSocUp, fminf(5.0F, fabsf
  542. (SOC_DW.socd_pct_battSoc0_Delay_DSTATE -
  543. SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE)) + fmaxf
  544. (SOC_DW.socd_pct_battSoc0_Delay_DSTATE,
  545. SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE));
  546. if (socd_pct_battSocEo > rtb_Gain) {
  547. rtb_Add6 = socc_pct_battSocUp - rtb_Gain;
  548. rtb_Gain += (socd_pct_battSocEo - rtb_Gain) * rtb_Add6 / fmaxf(0.1F,
  549. rtb_Add6);
  550. } else {
  551. rtb_Gain = (socd_pct_battSocEo - SOC_DW.socd_pct_battSoc0_Delay_DSTATE) *
  552. (rtb_Gain - SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE) / fmaxf(0.1F,
  553. rtb_Gain - SOC_DW.socd_pct_battSoc0_Delay_DSTATE) +
  554. SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE;
  555. }
  556. }
  557. if (SOC_DW.icLoad_g) {
  558. SOC_DW.Delay_DSTATE_h0 = rtb_Gain;
  559. }
  560. if (SOC_DW.Delay_DSTATE_h0 >= SOC_DW.UnitDelay_DSTATE_b) {
  561. SOC_DW.UnitDelay_DSTATE_b = SOC_DW.Delay_DSTATE_h0;
  562. }
  563. if (SOC_DW.UnitDelay_DSTATE_e) {
  564. SOC_DW.Delay_DSTATE = socc_pct_battSocUp;
  565. } else if (SOC_DW.UnitDelay_DSTATE_b <= (real32_T)(socc_pct_battSocUp - 0.1))
  566. {
  567. SOC_DW.Delay_DSTATE = SOC_DW.UnitDelay_DSTATE_b;
  568. } else {
  569. SOC_DW.Delay_DSTATE = (real32_T)(socc_pct_battSocUp - 0.1);
  570. }
  571. rtb_Add6 = rtb_Gain - SOC_DW.Delay_DSTATE_h0;
  572. if (rtb_Add6 > socc_pct_fitRate) {
  573. SOC_IfActionSubsystem(SOC_DW.Delay_DSTATE_h0, &SOC_DW.Delay_DSTATE_h0,
  574. socc_pct_fitRate);
  575. } else if (rtb_Add6 < -socc_pct_fitRate) {
  576. SOC_IfActionSubsystem1(SOC_DW.Delay_DSTATE_h0, &SOC_DW.Delay_DSTATE_h0,
  577. socc_pct_fitRate);
  578. } else {
  579. SOC_DW.Delay_DSTATE_h0 = rtb_Gain;
  580. }
  581. SOC_DW.icLoad_g = false;
  582. } else {
  583. SOC_DW.icLoad_n = ((rtPrevAction != 1) || SOC_DW.icLoad_n);
  584. if (socd_pct_battSocEo <= socc_pct_battSocLow) {
  585. rtb_Gain = socc_pct_battSocLow;
  586. } else if (socd_pct_battSocEo >= SOC_DW.socd_pct_battSoc0_Delay_DSTATE) {
  587. rtb_Gain = SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE;
  588. } else {
  589. rtb_Gain = fmaxf(fminf(SOC_DW.socd_pct_battSoc0_Delay_DSTATE,
  590. SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE) - fminf(5.0F, fabsf
  591. (SOC_DW.socd_pct_battSoc0_Delay_DSTATE -
  592. SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE)), socc_pct_battSocLow);
  593. if (socd_pct_battSocEo > rtb_Gain) {
  594. rtb_Gain += (socd_pct_battSocEo - rtb_Gain) *
  595. (SOC_DW.socd_pct_bcuSoc0_Delay_DSTATE - rtb_Gain) / fmaxf(0.1F,
  596. SOC_DW.socd_pct_battSoc0_Delay_DSTATE - rtb_Gain);
  597. } else {
  598. rtb_Gain -= socc_pct_battSocLow;
  599. rtb_Gain = (socd_pct_battSocEo - socc_pct_battSocLow) * rtb_Gain / fmaxf
  600. (0.1F, rtb_Gain) + socc_pct_battSocLow;
  601. }
  602. }
  603. if (SOC_DW.icLoad_n) {
  604. SOC_DW.Delay_DSTATE_h = rtb_Gain;
  605. }
  606. if (SOC_DW.UnitDelay_DSTATE_f) {
  607. SOC_DW.Delay_DSTATE = socc_pct_battSocLow;
  608. } else if (SOC_DW.Delay_DSTATE_h >= (real32_T)(socc_pct_battSocLow + 0.1)) {
  609. SOC_DW.Delay_DSTATE = SOC_DW.Delay_DSTATE_h;
  610. } else {
  611. SOC_DW.Delay_DSTATE = (real32_T)(socc_pct_battSocLow + 0.1);
  612. }
  613. rtb_Add6 = rtb_Gain - SOC_DW.Delay_DSTATE_h;
  614. if (rtb_Add6 > socc_pct_fitRate) {
  615. SOC_IfActionSubsystem(SOC_DW.Delay_DSTATE_h, &SOC_DW.Delay_DSTATE_h,
  616. socc_pct_fitRate);
  617. } else if (rtb_Add6 < -socc_pct_fitRate) {
  618. SOC_IfActionSubsystem1(SOC_DW.Delay_DSTATE_h, &SOC_DW.Delay_DSTATE_h,
  619. socc_pct_fitRate);
  620. } else {
  621. SOC_DW.Delay_DSTATE_h = rtb_Gain;
  622. }
  623. SOC_DW.icLoad_n = false;
  624. }
  625. socd_pct_battSoc = socd_pct_battSocEo;
  626. socd_pct_bcuSoc = socd_pct_bcuSocEo;
  627. socd_flg_EEsave = ((fabsf(socd_pct_battSocEo -
  628. SOC_DW.socd_flg_EEsave_Delay_DSTATE) > 1.0F) || (fabsf(socd_pct_bcuSocEo -
  629. SOC_DW.socd_flg_EEsave_Delay1_DSTATE) > 1.0F));
  630. if (socd_flg_EEsave) {
  631. SOC_DW.socd_flg_EEsave_Delay1_DSTATE = socd_pct_bcuSocEo;
  632. SOC_DW.socd_flg_EEsave_Delay_DSTATE = socd_pct_battSocEo;
  633. }
  634. SOC_DW.UnitDelay_DSTATE_n = (uint16_T)((!(fabsf(rtb_OCVSOC1) > 0.05F)) &&
  635. (!(fabsf(rtb_Divide_l) > 0.05F)) ? (int32_T)rtb_Gain3 : 0);
  636. SOC_DW.icLoad = false;
  637. SOC_DW.icLoad_j = false;
  638. SOC_DW.icLoad_o = false;
  639. SOC_DW.icLoad_i = false;
  640. SOC_DW.icLoad_p = false;
  641. SOC_DW.icLoad_a = false;
  642. SOC_DW.Delay2_DSTATE_k = rtb_MathFunction1_g * rtb_OCVSOC1 + rtb_Merge3;
  643. SOC_DW.icLoad_l = false;
  644. SOC_DW.Delay1_DSTATE_n = socd_pct_battSocEo;
  645. SOC_DW.icLoad_m = false;
  646. SOC_DW.Delay2_DSTATE_b = dcmd_st_chrgSt_T2;
  647. }
  648. void SOC_initialize(const char_T **rt_errorStatus)
  649. {
  650. RT_MODEL_SOC_T *const SOC_M = &(SOC_MdlrefDW.rtm);
  651. rt_InitInfAndNaN(sizeof(real_T));
  652. rtmSetErrorStatusPointer(SOC_M, rt_errorStatus);
  653. SOC_PrevZCX.Subsystem2_e.Subsystem1_Trig_ZCE = POS_ZCSIG;
  654. SOC_PrevZCX.Subsystem2.Subsystem1_Trig_ZCE = POS_ZCSIG;
  655. SOC_PrevZCX.Subsystem1.Subsystem1_Trig_ZCE = POS_ZCSIG;
  656. }