hal_adapter.c 35 KB

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  1. /*
  2. * hal_adapter.c
  3. *中间层函数调用库
  4. * Created on: 2022年1月18日
  5. * Author: QiXiang_CHENJIE
  6. */
  7. #include "hal_adapter.h"
  8. #include "AppGlobalVar.h"
  9. #include "stdio.h"
  10. #include "stdarg.h"
  11. /********************************/
  12. #include "Icu.h"
  13. #include "Gpt.h"
  14. uint8_t __attribute__((section(".non_cacheable_data"))) RX_Buffer[3][BUFFER_SIZE];
  15. uint32_t bufferIdx[3] = {0};
  16. volatile uint32 VarNotification_0 = 0;
  17. volatile uint32 VarNotification_1 = 0;
  18. TP_Value_Type ConvertedBuffer[NUM_RESULTS];
  19. Adc_ValueGroupType ResultBuffer[NUM_RESULTS];
  20. volatile Uart_StatusType Uart_TransmitStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  21. QueueHandle_t UartRecvQueue[3];
  22. QueueHandle_t UartSendQueue[3];
  23. QueueHandle_t UartHalQueueHandle;
  24. Std_ReturnType UartStartRecvFunc(uint8 channel);
  25. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR);
  26. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len);
  27. void clear_ringBuffer(ringbuffer_t *ringBuf);
  28. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  29. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  30. uint8 ringBufferforUart[3][BUFFER_SIZE];
  31. ringbuffer_t uartRingBuffer[3];
  32. #if UARTPRINTF==1
  33. uint8 ringbuffer[1024];
  34. ringbuffer_t printfRingBuffer;
  35. #endif
  36. sint8 AtcmdDelayRecvFunc(uint8 recvChannel,char *ResultStrPtr,uint16 delayTime)
  37. {
  38. sint8 outValue = -1;
  39. uint8 delayCnt = 0;
  40. uint8 UartData[256];
  41. uint16 ReadLen = 0;
  42. char *retptr = NULL;
  43. while (delayCnt<(delayTime/1000)&&outValue!=0)
  44. {
  45. UART_Receive_Data(recvChannel,UartData, &ReadLen,1000);
  46. if(ReadLen>0)
  47. {
  48. retptr = (char *)strstr((char *)UartData, ResultStrPtr);
  49. if (retptr)
  50. {
  51. outValue = 0;
  52. break;
  53. }
  54. }
  55. else
  56. {
  57. delayCnt++;
  58. }
  59. }
  60. return outValue;
  61. }
  62. #if UARTPRINTF==1
  63. uint16 myPrintf(const char *fmt, ...)
  64. {
  65. int n;
  66. uint8 databuffer[512]={0};
  67. va_list args;
  68. va_start(args, fmt);
  69. n = vsprintf((char *)databuffer, fmt, args);
  70. va_end(args);
  71. if( (printfRingBuffer.bw + n) <= printfRingBuffer.length )
  72. {
  73. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  74. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  75. printfRingBuffer.bw = printfRingBuffer.bw + n;
  76. }
  77. else
  78. {
  79. printfRingBuffer.bw = 0;
  80. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  81. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  82. }
  83. return n;
  84. }
  85. #endif
  86. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len)
  87. {
  88. ringBuf->br = 0;
  89. ringBuf->bw = 0;
  90. ringBuf->btoRead = 0;
  91. ringBuf->source = buf;
  92. ringBuf->length = buf_len;
  93. }
  94. void clear_ringBuffer(ringbuffer_t *ringBuf)
  95. {
  96. ringBuf->br = 0;
  97. ringBuf->bw = 0;
  98. ringBuf->btoRead = 0;
  99. }
  100. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  101. {
  102. uint32_t len = 0;
  103. volatile uint32_t ringBuf_bw = ringBuf->bw;
  104. uint32_t ringBuf_len = ringBuf->length;
  105. uint8_t *ringBuf_source = ringBuf->source;
  106. if( (ringBuf_bw + size) > ringBuf_len )
  107. {
  108. ringBuf_bw = 0;
  109. }
  110. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  111. ringBuf->bw = (ringBuf_bw + size) % ringBuf_len;
  112. ringBuf->btoRead += size;
  113. #if SEGGER_PRINTF==1
  114. if(ringBuf->source==ringBufferforUart[1])
  115. {
  116. //SEGGER_RTT_printf("[%d]buffer=%s\r\nringBuf->bw=%X,size=%X,%X\r\n",__LINE__,buffer,ringBuf->bw,size,ringBuf->bw-size+ringBuf_source);
  117. SEGGER_RTT_printf("[%d]buffer=%s\r\n\r\n",__LINE__,buffer);
  118. }
  119. #endif
  120. /*
  121. if(ringBuf->br!=0)
  122. {
  123. memcpy(ringBuf_source, buffer, size);
  124. ringBuf->br = 0;
  125. }
  126. */
  127. /*
  128. if( (ringBuf_bw + size) <= ringBuf_len )
  129. {
  130. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  131. }
  132. else
  133. {
  134. len = ringBuf_len - ringBuf_bw;
  135. memcpy(ringBuf_source + ringBuf_bw, buffer, len);
  136. memcpy(ringBuf_source, buffer + ringBuf_bw, size - len);
  137. }
  138. ringBuf->bw = (ringBuf->bw + size) % ringBuf_len;
  139. ringBuf->btoRead += size;
  140. */
  141. return size;
  142. }
  143. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  144. {
  145. uint32_t len = 0;
  146. volatile uint32_t ringBuf_br = ringBuf->br;
  147. uint32_t ringBuf_len = ringBuf->length;
  148. uint8_t *ringBuf_source = ringBuf->source;
  149. memcpy(buffer, ringBuf_source, size);
  150. ringBuf->br = size;
  151. // if( (ringBuf_br + size ) <= ringBuf_len )
  152. // {
  153. // memcpy(buffer, ringBuf_source + ringBuf_br, size);
  154. // }
  155. // else
  156. // {
  157. // len = ringBuf_len - ringBuf_br;
  158. // memcpy(buffer, ringBuf_source + ringBuf_br, len);
  159. // memcpy(buffer + len, ringBuf_source, size - len);
  160. // }
  161. // ringBuf->br = (ringBuf->br + size) % ringBuf_len;
  162. // ringBuf->btoRead -= size;
  163. return size;
  164. }
  165. Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, uint8 *txBuffer, uint16 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  166. {
  167. UartMsg_t UartRecvMsg;
  168. UartMsg_t UartSendMsg;
  169. BaseType_t Sendret = pdFALSE;
  170. BaseType_t Recvret = pdFALSE;
  171. uint32 retVal = E_NOT_OK;
  172. UartSendMsg.DataLen = sendLength;
  173. UartSendMsg.dataPtr = txBuffer;
  174. *rxlen = 0;
  175. Sendret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,50);
  176. if(Sendret == pdTRUE)
  177. {
  178. Recvret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  179. if(Recvret == pdTRUE)
  180. {
  181. *rxlen = UartRecvMsg.DataLen;
  182. // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
  183. memcpy(rxBuffer,(uint8 *)(UartRecvMsg.dataAddr),UartRecvMsg.DataLen);
  184. retVal = E_OK;
  185. }
  186. else
  187. {
  188. retVal = 3;
  189. }
  190. }
  191. else
  192. {
  193. retVal = 2;
  194. }
  195. return retVal;
  196. }
  197. Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint8 *rxlen, uint32 T_timeout)
  198. {
  199. UartMsg_t UartRecvMsg;
  200. BaseType_t ret = pdFALSE;
  201. uint32 retVal = E_NOT_OK;
  202. *rxlen = 0;
  203. ret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  204. if(ret == pdTRUE)
  205. {
  206. *rxlen = UartRecvMsg.DataLen;
  207. // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
  208. memcpy(rxBuffer,(uint8 *)UartRecvMsg.dataAddr,UartRecvMsg.DataLen);
  209. retVal = E_OK;
  210. }
  211. return retVal;
  212. }
  213. Std_ReturnType UART_Reset(uint8 recvChannel)
  214. {
  215. uint32 retVal = E_NOT_OK;
  216. retVal = xQueueReset(UartRecvQueue[recvChannel]);
  217. return retVal;
  218. }
  219. Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  220. {
  221. UartMsg_t UartSendMsg;
  222. BaseType_t ret = pdFALSE;
  223. uint32 retVal = E_NOT_OK;
  224. UartSendMsg.DataLen = sendLength;
  225. UartSendMsg.dataPtr = txBuffer;
  226. ret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,T_timeout);
  227. if(ret == pdTRUE)
  228. {
  229. retVal = E_OK;
  230. }
  231. return retVal;
  232. }
  233. void UartInit(void)
  234. {
  235. create_ringBuffer(&uartRingBuffer[0],ringBufferforUart[0],sizeof(ringBufferforUart[0]));
  236. create_ringBuffer(&uartRingBuffer[1],ringBufferforUart[1],sizeof(ringBufferforUart[1]));
  237. create_ringBuffer(&uartRingBuffer[2],ringBufferforUart[2],sizeof(ringBufferforUart[2]));
  238. UartRecvQueue[0] = xQueueCreate(6, sizeof(UartMsg_t));
  239. UartRecvQueue[1] = xQueueCreate(6, sizeof(UartMsg_t));
  240. UartRecvQueue[2] = xQueueCreate(6, sizeof(UartMsg_t));
  241. UartSendQueue[0] = xQueueCreate(3, sizeof(UartMsg_t));
  242. UartSendQueue[1] = xQueueCreate(1, sizeof(UartMsg_t));
  243. UartSendQueue[2] = xQueueCreate(1, sizeof(UartMsg_t));
  244. UartHalQueueHandle = xQueueCreate(9, sizeof(UartHalMsg_t));
  245. xTaskCreate(Uart_Hal_RecvTask, (const char *const)"UartRecv", 256, (void *)0, main_TASK_PRIORITY + 5, &Uart_Hal_RecvTask_Handle);
  246. xTaskCreate(Uart_Hal_SendTask, (const char *const)"UartSend", 256, (void *)0, main_TASK_PRIORITY + 4, &Uart_Hal_SendTask_Handle);
  247. }
  248. Std_ReturnType UartStartRecvFunc(uint8 channel)
  249. {
  250. sint8 out = 0;
  251. volatile Std_ReturnType R_Uart_Status=E_NOT_OK;
  252. bufferIdx[channel]=0;
  253. memset(RX_Buffer[channel],0x00,BUFFER_SIZE);
  254. switch(channel)
  255. {
  256. case 0:
  257. IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  258. break;
  259. case 1:
  260. IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  261. break;
  262. case 2:
  263. IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  264. break;
  265. default:
  266. break;
  267. }
  268. Uart_SetBuffer(channel, RX_Buffer[channel], DMA_SIZE, UART_RECEIVE);
  269. R_Uart_Status = Uart_AsyncReceive(channel, RX_Buffer[channel], DMA_SIZE);
  270. if (E_OK != R_Uart_Status)
  271. {
  272. Uart_Abort(channel, UART_RECEIVE);
  273. out = E_NOT_OK;
  274. }
  275. return out;
  276. }
  277. void Uart_Hal_RecvTask(void *pvParameters)
  278. {
  279. UartHalMsg_t UartHalMsgRecv;
  280. UartMsg_t UartRecvMsg;
  281. uint16 recvSize = 0;
  282. BaseType_t ret = pdFALSE;
  283. BaseType_t ret_send = pdFALSE;
  284. uint32 T_bytesRemaining[3] = {0};
  285. uint16 T_timeout[3] = {0};
  286. volatile Uart_StatusType Uart_ReceiveStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  287. uint8 UartIdx = UART_LPUART0;
  288. uint8 UartState[3] = {UartAbortRecv,UartAbortRecv,UartAbortRecv};
  289. while(1)
  290. {
  291. if((T_timeout[UartIdx]>1000) && (Uart_ReceiveStatus[UartIdx] != UART_STATUS_NO_ERROR) )
  292. {
  293. Uart_Abort(UartIdx, UART_RECEIVE);
  294. UartState[UartIdx] = UartAbortRecv;
  295. T_timeout[UartIdx] = 0;
  296. }
  297. else if(Uart_ReceiveStatus[UartIdx] == UART_STATUS_NO_ERROR)
  298. {
  299. UartState[UartIdx] = UartRecvComplete;
  300. }
  301. if((UartState[UartIdx] == UartAbortRecv) || (UartState[UartIdx] == UartRecvComplete))
  302. {
  303. if(E_OK == UartStartRecvFunc(UartIdx))
  304. {
  305. UartState[UartIdx] = UartStartRecv;
  306. }
  307. }
  308. Uart_ReceiveStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_RECEIVE);
  309. T_timeout[UartIdx]++;
  310. UartIdx = (UartIdx + 1) > 2 ? 1 : (UartIdx + 1);
  311. ret = xQueueReceive(UartHalQueueHandle,&UartHalMsgRecv,1);
  312. if(ret==pdTRUE)
  313. {
  314. if(UartHalMsgRecv.event==LPUART_UART_IP_EVENT_RECV_IDLE)
  315. {
  316. if(UartHalMsgRecv.value>0)
  317. {
  318. recvSize = write_ringBuffer(RX_Buffer[UartHalMsgRecv.Channel],UartHalMsgRecv.value,&uartRingBuffer[UartHalMsgRecv.Channel]);
  319. UartRecvMsg.DataLen = UartHalMsgRecv.value;
  320. UartRecvMsg.dataAddr = (uint32)(uartRingBuffer[UartHalMsgRecv.Channel].bw + uartRingBuffer[UartHalMsgRecv.Channel].source - UartHalMsgRecv.value);
  321. ret_send = xQueueSend(UartRecvQueue[UartHalMsgRecv.Channel],&UartRecvMsg,10);
  322. //#if SEGGER_PRINTF==1
  323. // if(UartHalMsgRecv.Channel==1)
  324. // {
  325. // SEGGER_RTT_printf("[%d]source=%X,dataAddr=%X\r\n",__LINE__,uartRingBuffer[UartHalMsgRecv.Channel].source,UartRecvMsg.dataAddr);
  326. // }
  327. //#endif
  328. }
  329. T_timeout[UartHalMsgRecv.Channel] = 0;
  330. UartState[UartHalMsgRecv.Channel] = UartRecvComplete;
  331. }
  332. }
  333. }
  334. }
  335. void Uart_Hal_SendTask(void *pvParameters)
  336. {
  337. UartMsg_t UartSendMsg;
  338. BaseType_t ret = pdFALSE;
  339. uint32 T_bytesRemaining[3] = {0};
  340. uint16 T_timeout[3] = {0};
  341. volatile Std_ReturnType T_Uart_Status[3];
  342. uint8 UartIdx = UART_LPUART0;
  343. uint8 UartSendState[3] = {UartNoDataSend,UartNoDataSend,UartNoDataSend};
  344. while(1)
  345. {
  346. ret = xQueueReceive(UartSendQueue[UartIdx],&UartSendMsg,1);
  347. if(ret==pdTRUE)
  348. {
  349. T_Uart_Status[UartIdx] = Uart_AsyncSend(UartIdx, UartSendMsg.dataPtr, UartSendMsg.DataLen);
  350. if (E_OK != T_Uart_Status[UartIdx])
  351. {
  352. Uart_Abort(UartIdx, UART_SEND);
  353. UartSendState[UartIdx] = UartAbortSend;
  354. }
  355. else
  356. {
  357. UartSendState[UartIdx] = UartStartSend;
  358. }
  359. }
  360. /*开始发送后的判定*/
  361. if(UartSendState[UartIdx] == UartStartSend)
  362. {
  363. Uart_TransmitStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_SEND);
  364. T_timeout[UartIdx]++;
  365. }
  366. if(T_timeout[UartIdx]>=1000 || ((Uart_TransmitStatus[UartIdx] != UART_STATUS_OPERATION_ONGOING) && (UartSendState[UartIdx] == UartStartSend)))
  367. {
  368. if(T_timeout[UartIdx]>=1000)
  369. {
  370. Uart_Abort(UartIdx, UART_SEND);
  371. UartSendState[UartIdx] = UartAbortSend;
  372. }
  373. else if(Uart_TransmitStatus[UartIdx] == UART_STATUS_NO_ERROR)
  374. {
  375. UartSendState[UartIdx] = UartSendComplete;
  376. }
  377. T_timeout[UartIdx] = 0;
  378. }
  379. UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
  380. }
  381. }
  382. //
  383. //Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, const uint8 *txBuffer, uint32 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  384. //{
  385. // volatile Std_ReturnType R_Uart_Status;
  386. // volatile Std_ReturnType T_Uart_Status;
  387. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  388. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  389. // uint32 T_bytesRemaining;
  390. // uint32 R_bytesRemaining;
  391. // uint32 timeout = T_timeout;
  392. // uint32 retVal = E_NOT_OK;
  393. // bufferIdx[recvChannel] = 0;
  394. // switch (recvChannel)
  395. // {
  396. // case 0:
  397. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  398. // break;
  399. // case 1:
  400. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  401. // break;
  402. // case 2:
  403. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  404. // break;
  405. // default:
  406. // break;
  407. // }
  408. // if (txBuffer == NULL || rxBuffer == NULL)
  409. // {
  410. // return retVal;
  411. // }
  412. //
  413. // /* Uart_AsyncSend transmit data */
  414. // Uart_SetBuffer(transChannel, txBuffer, sendLength, UART_SEND);
  415. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  416. // if (E_OK != T_Uart_Status)
  417. // {
  418. // Uart_Abort(transChannel, UART_SEND);
  419. // return E_NOT_OK;
  420. // }
  421. // Uart_SetBuffer(recvChannel, &RX_Buffer[recvChannel][0], DMA_SIZE, UART_RECEIVE);
  422. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  423. // if (E_OK != R_Uart_Status)
  424. // {
  425. // Uart_Abort(recvChannel, UART_RECEIVE);
  426. // return E_NOT_OK;
  427. // }
  428. // /* Check for no on-going transmission */
  429. // do
  430. // {
  431. // if (Uart_TransmitStatus != UART_STATUS_NO_ERROR)
  432. // {
  433. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  434. // }
  435. // if (Uart_ReceiveStatus != UART_STATUS_NO_ERROR)
  436. // {
  437. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &R_bytesRemaining, UART_RECEIVE);
  438. // }
  439. // vTaskDelay(pdMS_TO_TICKS(1));
  440. // } while (((UART_STATUS_NO_ERROR != Uart_TransmitStatus || UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < --timeout));
  441. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  442. // {
  443. // Uart_Abort(transChannel, UART_SEND);
  444. // retVal = E_NOT_OK;
  445. // }
  446. // else
  447. // {
  448. // retVal = E_OK;
  449. // }
  450. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  451. // {
  452. // Uart_Abort(recvChannel, UART_RECEIVE);
  453. // *rxlen = bufferIdx[recvChannel];
  454. // retVal = E_NOT_OK;
  455. // }
  456. // else
  457. // {
  458. // *rxlen = bufferIdx[recvChannel];
  459. // retVal = E_OK;
  460. // }
  461. // return retVal;
  462. //}
  463. //
  464. //Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  465. //{
  466. //
  467. // volatile Std_ReturnType T_Uart_Status;
  468. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  469. // uint32 T_bytesRemaining;
  470. // uint32 timeout = T_timeout;
  471. // uint32 retVal = E_NOT_OK;
  472. // if (txBuffer == NULL)
  473. // {
  474. // return retVal;
  475. // }
  476. //
  477. // /* Uart_AsyncSend transmit data */
  478. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  479. // if (E_OK != T_Uart_Status)
  480. // {
  481. // Uart_Abort(transChannel, UART_SEND);
  482. // return E_NOT_OK;
  483. // }
  484. // /* Check for no on-going transmission */
  485. // do
  486. // {
  487. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  488. // vTaskDelay(pdMS_TO_TICKS(1));
  489. // } while ((UART_STATUS_NO_ERROR != Uart_TransmitStatus && 0 < --timeout));
  490. //
  491. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  492. // {
  493. // retVal = E_NOT_OK;
  494. // }
  495. // else
  496. // {
  497. // retVal = E_OK;
  498. // }
  499. // return retVal;
  500. //}
  501. //
  502. //Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint16 *rxlen, sint32 T_timeout)
  503. //{
  504. // volatile Std_ReturnType R_Uart_Status = E_NOT_OK;
  505. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  506. // uint32 T_bytesRemaining = 0;
  507. // uint32 retVal = E_NOT_OK;
  508. // // uint8 Rx_Buffer[MSG_LEN];
  509. // bufferIdx[recvChannel] = 0;
  510. // *rxlen = 0;
  511. // if (rxBuffer == NULL)
  512. // {
  513. // return retVal;
  514. // }
  515. // /* Uart_AsyncReceive transmit data */
  516. // switch (recvChannel)
  517. // {
  518. // case 0:
  519. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  520. // break;
  521. // case 1:
  522. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  523. // break;
  524. // case 2:
  525. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  526. // break;
  527. // default:
  528. // break;
  529. // }
  530. // Uart_SetBuffer(recvChannel, rxBuffer, DMA_SIZE, UART_RECEIVE);
  531. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  532. // if (E_OK != R_Uart_Status)
  533. // {
  534. // Uart_Abort(recvChannel, UART_RECEIVE);
  535. // return E_NOT_OK;
  536. // }
  537. // /* Check for no on-going transmission */
  538. // do
  539. // {
  540. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &T_bytesRemaining, UART_RECEIVE);
  541. // vTaskDelay(pdMS_TO_TICKS(1));
  542. //
  543. // } while ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < T_timeout--);
  544. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  545. // {
  546. // Uart_Abort(recvChannel, UART_RECEIVE);
  547. // *rxlen = bufferIdx[recvChannel];
  548. // retVal = E_NOT_OK;
  549. // }
  550. // else
  551. // {
  552. // *rxlen = bufferIdx[recvChannel];
  553. // retVal = E_OK;
  554. // }
  555. // return retVal;
  556. //}
  557. extern Lpuart_Uart_Ip_StateStructureType *Lpuart_Uart_Ip_apStateStructuresArray[LPUART_UART_IP_NUMBER_OF_INSTANCES];
  558. void UART_Callback(uint32 hwInstance, Lpuart_Uart_Ip_EventType event)
  559. {
  560. // (void)userData;
  561. Lpuart_Uart_Ip_StateStructureType * UartState;
  562. UartState = (Lpuart_Uart_Ip_StateStructureType *)Lpuart_Uart_Ip_apStateStructuresArray[hwInstance];
  563. /* Check the event type */
  564. if (event == LPUART_UART_IP_EVENT_RX_FULL)
  565. {
  566. /* The reception stops when receiving idle is detected or the buffer is full */
  567. if (bufferIdx[hwInstance] <= (BUFFER_SIZE - DMA_SIZE))
  568. {
  569. /* Update the buffer index and the rx buffer */
  570. bufferIdx[hwInstance] += DMA_SIZE;
  571. Uart_SetBuffer(hwInstance, &RX_Buffer[hwInstance][bufferIdx[hwInstance]], DMA_SIZE, UART_RECEIVE);
  572. // Lpuart_Uart_Ip_SetRxBuffer(hwInstance, &RX_Buffer[bufferIdx], DMA_SIZE);
  573. }
  574. }
  575. if (event == LPUART_UART_IP_EVENT_ERROR)
  576. {
  577. // /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  578. // temp = DMA_SIZE - (uint32_t)IP_DMA->TCD->CITER.ELINKNO;
  579. // /*Add the remaining data size to the sum of the received size*/
  580. // bufferIdx[hwInstance] += temp;
  581. /*Abort the receiving after detecting IDLE receiving*/
  582. Lpuart_Uart_Ip_AbortReceivingData(hwInstance);
  583. Lpuart_Uart_Ip_AbortSendingData(hwInstance);
  584. // bufferIdx = 0;
  585. }
  586. if (event == LPUART_UART_IP_EVENT_RECV_IDLE)
  587. {
  588. uint32_t temp;
  589. UartHalMsg_t UartHalMsg;
  590. UartHalMsg.Channel = hwInstance;
  591. UartHalMsg.event = event;
  592. /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  593. temp = DMA_SIZE - (uint32_t)IP_DMA->TCD[hwInstance].CITER.ELINKNO;
  594. /*Add the remaining data size to the sum of the received size*/
  595. bufferIdx[hwInstance] += temp;
  596. /*Abort the receiving after detecting IDLE receiving*/
  597. UartHalMsg.value = bufferIdx[hwInstance];
  598. xQueueSendFromISR(UartHalQueueHandle,&UartHalMsg,pdFALSE);
  599. }
  600. }
  601. /*CAN*/
  602. Can_PduType Can_CreatePduInfo(Can_IdType id, CAN_IdFrameType idFrame, PduIdType swPduHandle, uint8 length, uint8 *sdu)
  603. {
  604. Can_PduType PduInfo;
  605. switch (idFrame)
  606. {
  607. case CAN_STANDARD_ID_TYPE:
  608. id = id & 0x7FF;
  609. break;
  610. case CANFD_STANDARD_ID_TYPE:
  611. id = (id & 0x7FF) | 0x40000000;
  612. break;
  613. case CAN_EXTENDED_ID_TYPE:
  614. id = id | 0x80000000;
  615. break;
  616. case CANFD_EXTENDED_ID_TYPE:
  617. id = id | 0xC0000000;
  618. break;
  619. default:
  620. id = id & 0x7FF;
  621. break;
  622. }
  623. PduInfo.id = id;
  624. PduInfo.swPduHandle = swPduHandle;
  625. PduInfo.length = length;
  626. PduInfo.sdu = sdu;
  627. return PduInfo;
  628. }
  629. Std_ReturnType CanIf_SendMessage(uint8 ControllerId, Can_Msg_Type CanMsg)
  630. {
  631. volatile Can_PduType Can_PduInfo;
  632. volatile Std_ReturnType CAN_Write_Status;
  633. Std_ReturnType retVal = E_NOT_OK;
  634. uint32 u8TimeOut = 100 * 100;
  635. Can_HwHandleType Hth = Can0HardwareObject_TX + (Can_HwHandleType)ControllerId; // controller 0 --> Can0HardwareObject_TX
  636. Can_PduInfo = Can_CreatePduInfo(CanMsg.id, CanMsg.idFrame, 0, CanMsg.length, CanMsg.sdu);
  637. CAN_Write_Status = Can_Write(Hth, &Can_PduInfo);
  638. CanIf_bTxFlag = FALSE;
  639. if (CAN_Write_Status == E_OK)
  640. {
  641. while ((!CanIf_bTxFlag) && (u8TimeOut != 0U))
  642. {
  643. Can_MainFunction_Write();
  644. u8TimeOut--;
  645. }
  646. }
  647. if (CanIf_bTxFlag == TRUE)
  648. {
  649. retVal = E_OK;
  650. }
  651. else
  652. {
  653. retVal = E_NOT_OK;
  654. }
  655. return retVal;
  656. }
  657. Can_Msg_Type Can_GetMsgInfo(Can_IdType id, uint8 length, uint8 *sdu)
  658. {
  659. Can_Msg_Type CanMsgInfo;
  660. CanMsgInfo.idFrame = (CAN_IdFrameType)((id >> 30) & 0x03);
  661. if (CanMsgInfo.idFrame & 0x01)
  662. {
  663. CanMsgInfo.id = id & 0x7FF;
  664. }
  665. else
  666. {
  667. CanMsgInfo.id = id & 0x1FFFFFFF;
  668. }
  669. CanMsgInfo.length = length;
  670. CanMsgInfo.sdu = sdu;
  671. return CanMsgInfo;
  672. }
  673. void CanIf_ControllerBusOff(uint8 ControllerId)
  674. {
  675. (void)ControllerId;
  676. }
  677. void CanIf_ControllerModeIndication(uint8 ControllerId, Can_ControllerStateType ControllerMode)
  678. {
  679. (void)ControllerId;
  680. (void)ControllerMode;
  681. }
  682. void CanIf_TxConfirmation(PduIdType CanTxPduId)
  683. {
  684. CanIf_u8TxConfirmCnt++;
  685. CanIf_bTxFlag = TRUE;
  686. (void)CanTxPduId;
  687. }
  688. void CanIf_RxIndication(const Can_HwType *Mailbox, const PduInfoType *PduInfoPtr)
  689. {
  690. Can_Msg_Type canRxMsg_Buff;
  691. Can_Msg_Type_Data canRxMsgQueueData;
  692. CanIf_bRxFlag = TRUE; // should not be delete
  693. // should put the msg into message queue
  694. canRxMsg_Buff = Can_GetMsgInfo(Mailbox->CanId, PduInfoPtr->SduLength, PduInfoPtr->SduDataPtr);
  695. canRxMsgQueueData.id = canRxMsg_Buff.id;
  696. canRxMsgQueueData.length = canRxMsg_Buff.length;
  697. memcpy(canRxMsgQueueData.data, canRxMsg_Buff.sdu, canRxMsgQueueData.length);
  698. switch(Mailbox->Hoh)
  699. {
  700. case 0:
  701. xQueueSend(CanRecvQueueHandle0, &canRxMsgQueueData, 0);
  702. break;
  703. case 1:
  704. xQueueSend(CanRecvQueueHandle1, &canRxMsgQueueData, 0);
  705. break;
  706. case 2:
  707. xQueueSend(CanRecvQueueHandle2, &canRxMsgQueueData, 0);
  708. break;
  709. }
  710. }
  711. void CanIf_CurrentIcomConfiguration(uint8 ControllerId, IcomConfigIdType ConfigurationId, IcomSwitch_ErrorType Error)
  712. {
  713. (void)ControllerId;
  714. (void)ConfigurationId;
  715. (void)Error;
  716. }
  717. void Notification_0(void)
  718. {
  719. ADC_Converter(ResultBuffer, ConvertedBuffer);
  720. memcpy(BattTempR, &ConvertedBuffer[3], 4 * sizeof(uint32));
  721. }
  722. void Notification_1(void)
  723. {
  724. VarNotification_1++;
  725. }
  726. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR)
  727. {
  728. Adc_ValueGroupType REFH, REFL;
  729. REFH = Buffer[0];
  730. REFL = Buffer[2];
  731. for (int i = 3; i < NUM_RESULTS; i++)
  732. {
  733. if (Buffer[i] >= REFH)
  734. {
  735. ConvertedValueR[i] = 40930000;
  736. }
  737. else if (Buffer[i] <= REFL)
  738. {
  739. ConvertedValueR[i] = 0x00;
  740. }
  741. else
  742. {
  743. ConvertedValueR[i] = (TP_Value_Type)((float)(10000 * (Buffer[i] - REFL) / (float)(REFH - REFL)) / (1 - (float)((Buffer[i] - REFL) / (float)(REFH - REFL))));
  744. }
  745. }
  746. return 0;
  747. }
  748. Std_ReturnType ADC_ReadValue()
  749. {
  750. Std_ReturnType ret = E_NOT_OK;
  751. for (uint8 i = 0; i < NUM_RESULTS; i++)
  752. {
  753. ResultBuffer[i] = 0xFFFF;
  754. ConvertedBuffer[i] = 0x00;
  755. }
  756. Adc_SetupResultBuffer(AdcGroupSoftwareOneShot, ResultBuffer);
  757. Adc_EnableGroupNotification(AdcGroupSoftwareOneShot);
  758. VarNotification_0 = 0;
  759. Adc_StartGroupConversion(AdcGroupSoftwareOneShot);
  760. return ret;
  761. }
  762. /*EEP*/
  763. static Std_ReturnType TestEep_FlexNvmProgramPartCmd(
  764. VAR(TestEep_CsecKeySize, AUTOMATIC) eepKeysize,
  765. VAR(TestEep_SfeType, AUTOMATIC) eepSecurityFlagExtension,
  766. VAR(TestEep_LoadFlexRamType, AUTOMATIC) eepLoadFlexRamAtReset,
  767. VAR(TestEep_Eeprom_FlexRamPartitionType, AUTOMATIC) eepFlexRamPartition,
  768. VAR(TestEep_Eeprom_FlexNvmPartitionType, AUTOMATIC) eepFlexNvmPartition)
  769. {
  770. Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
  771. uint32 u32FlexNvmPartSize = 0;
  772. uint32 u32RegSimFcfg1 = 0UL;
  773. u32RegSimFcfg1 = IP_SIM->FCFG1;
  774. /*get DEPART value */
  775. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  776. /* check that it was not partitioned before */
  777. if (u32FlexNvmPartSize == 0xF)
  778. {
  779. // /* if error flags are set the cmd is not executed */
  780. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8);
  781. //
  782. // /*erase DF 0 sector*/
  783. // u32Addr=(TEST_EEP_DEEPROM_SECTOR_0_ADDR32 - D_EEPROM_BASE_ADDR) + 0x800000UL;
  784. //
  785. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, TEST_EEP_EEPROM_CMD_ERASE_SECTOR);
  786. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)(u32Addr >> 16UL));
  787. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)(u32Addr >> 8UL));
  788. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)(u32Addr >> 0UL));
  789. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32 , TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  790. // while((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  791. // {
  792. // }
  793. //
  794. if (0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  795. {
  796. /* run program partition command */
  797. REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, EEPROM_CMD_PROGRAM_PARTITION);
  798. REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)eepKeysize);
  799. REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)eepSecurityFlagExtension);
  800. REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)eepLoadFlexRamAtReset);
  801. REG_WRITE8(TEST_EEP_EEPROM_FCCOB4_ADDR32, (uint8)eepFlexRamPartition);
  802. REG_WRITE8(TEST_EEP_EEPROM_FCCOB5_ADDR32, (uint8)eepFlexNvmPartition);
  803. REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  804. while ((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  805. {
  806. /* wait for operation to finish */
  807. }
  808. /* check if errors occured */
  809. if (REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  810. {
  811. /* NOK, error flags are set */
  812. u8RetVal = (Std_ReturnType)E_NOT_OK;
  813. }
  814. }
  815. else
  816. {
  817. /* NOK, error flags are set */
  818. u8RetVal = (Std_ReturnType)E_NOT_OK;
  819. }
  820. }
  821. else
  822. {
  823. /* NOK, partitioned already */
  824. u8RetVal = (Std_ReturnType)E_NOT_OK;
  825. }
  826. return u8RetVal;
  827. }
  828. void Eep_DepartParitition(TestEep_Eeprom_FlexNvmPartitionType T_EEP_SIZE)
  829. {
  830. uint32 u32FlexNvmPartSize = 0;
  831. uint32 u32RegSimFcfg1 = 0UL;
  832. u32RegSimFcfg1 = IP_SIM->FCFG1;
  833. /*get DEPART value */
  834. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  835. if (u32FlexNvmPartSize == 0xF) /* We just partition again if curent size different with expected */
  836. {
  837. /* partition for EERAM 64K with NOT loading EERAM at reset in hardware */
  838. TestEep_FlexNvmProgramPartCmd(EEP_FTFC_KEY_SIZE_0_BYTES, EEP_FTFC_VERIFY_ONLY_DISABLED,
  839. EEP_FTFC_LOAD_AT_RESET_ENABLED, EEP_FTFC_EERAM_SIZE_4K, T_EEP_SIZE);
  840. }
  841. }
  842. /* Erase memory by writing erase value */
  843. Std_ReturnType HAL_EEP_Erase(uint32 eepEraseStartAddr, uint32 eepEraseSize)
  844. {
  845. Std_ReturnType retReturnType = E_OK;
  846. MemIf_JobResultType retJobResultType;
  847. retReturnType = Eep_Erase(eepEraseStartAddr, eepEraseSize);
  848. if (E_OK != retReturnType)
  849. {
  850. return E_NOT_OK;
  851. }
  852. while (MEMIF_IDLE != Eep_GetStatus())
  853. {
  854. Eep_MainFunction();
  855. }
  856. retJobResultType = Eep_GetJobResult();
  857. if (MEMIF_JOB_OK != retJobResultType)
  858. {
  859. return E_NOT_OK;
  860. }
  861. return E_OK;
  862. }
  863. /* Write one or more complete eeprom pages to the eeprom device */
  864. Std_ReturnType HAL_EEP_Write(uint32 eepWriteStartAddr, uint8 *pDataNeedtoWrite, uint32 dataSize)
  865. {
  866. Std_ReturnType retReturnType = E_OK;
  867. MemIf_JobResultType retJobResultType;
  868. /*Erase the EEP before write*/
  869. retReturnType = HAL_EEP_Erase(eepWriteStartAddr, dataSize);
  870. if (E_OK != retReturnType)
  871. {
  872. return E_NOT_OK;
  873. }
  874. retReturnType = Eep_Write(eepWriteStartAddr, pDataNeedtoWrite, dataSize);
  875. if (E_OK != retReturnType)
  876. {
  877. return E_NOT_OK;
  878. }
  879. while (MEMIF_IDLE != Eep_GetStatus())
  880. {
  881. Eep_MainFunction();
  882. }
  883. retJobResultType = Eep_GetJobResult();
  884. if (MEMIF_JOB_OK != retJobResultType)
  885. {
  886. return E_NOT_OK;
  887. }
  888. return E_OK;
  889. }
  890. /* Reads from eeprom memory */
  891. Std_ReturnType HAL_EEP_Read(uint32 eepReadStartAddr, uint8 *pDataBuffer, uint32 dataSize)
  892. {
  893. Std_ReturnType retReturnType = E_OK;
  894. MemIf_JobResultType retJobResultType;
  895. retReturnType = Eep_Read(eepReadStartAddr, pDataBuffer, dataSize);
  896. if (E_OK != retReturnType)
  897. {
  898. return E_NOT_OK;
  899. }
  900. while (MEMIF_IDLE != Eep_GetStatus())
  901. {
  902. Eep_MainFunction();
  903. }
  904. retJobResultType = Eep_GetJobResult();
  905. if (MEMIF_JOB_OK != retJobResultType)
  906. {
  907. return E_NOT_OK;
  908. }
  909. return E_OK;
  910. }
  911. /* Compares a eeprom memory area with an application data buffer */
  912. Std_ReturnType HAL_EEP_Compare(uint32 eepCompareStartAddr, uint8 *pDataNeedtoCompare, uint32 dataSize)
  913. {
  914. Std_ReturnType retReturnType = E_OK;
  915. MemIf_JobResultType retJobResultType;
  916. retReturnType = Eep_Compare(eepCompareStartAddr, pDataNeedtoCompare, dataSize);
  917. if (E_OK != retReturnType)
  918. {
  919. return E_NOT_OK;
  920. }
  921. while (MEMIF_IDLE != Eep_GetStatus())
  922. {
  923. Eep_MainFunction();
  924. }
  925. retJobResultType = Eep_GetJobResult();
  926. if (MEMIF_JOB_OK != retJobResultType)
  927. {
  928. return E_NOT_OK;
  929. }
  930. return E_OK;
  931. }
  932. /* @brief VECTKEY value so that AIRCR register write is not ignored. */
  933. #define FEATURE_SCB_VECTKEY (0x05FAU)
  934. void SystemSoftwareReset(void)
  935. {
  936. uint32_t regValue;
  937. /* Read Application Interrupt and Reset Control Register */
  938. regValue = S32_SCB->AIRCR;
  939. /* Clear register key */
  940. regValue &= ~( S32_SCB_AIRCR_VECTKEY_MASK);
  941. /* Configure System reset request bit and Register Key */
  942. regValue |= S32_SCB_AIRCR_VECTKEY(FEATURE_SCB_VECTKEY);
  943. regValue |= S32_SCB_AIRCR_SYSRESETREQ(0x1u);
  944. /* Write computed register value */
  945. S32_SCB->AIRCR = regValue;
  946. }
  947. void SystemPrepareForSleep(void)
  948. {
  949. for(int pinIndex = 0; pinIndex <PortConfigSet_PortContainer_GPIO_PTB4_GPIO_OUT_MCU_RS485_EN; pinIndex++)
  950. {
  951. if(pinIndex == PortConfigSet_PortContainer_CAN_PTA12_CAN1_RX_MCU_CAN1_RX /*|| pinIndex == PortConfigSet_PortContainer_INT_PTB0_LPTMR0_ATL3_MCU_CC1_INT || pinIndex == PortConfigSet_PortContainer_INT_PTE11_LPTMR0_ALT1_MCU_3D_INT1 || pinIndex == PortConfigSet_PortContainer_INT_PTD5_LPTMR0_ATL2_MCU_3D_INT2*/)
  952. {
  953. continue;
  954. }
  955. else
  956. {
  957. Port_SetAsUnusedPin(pinIndex);
  958. }
  959. }
  960. Port_SetPinMode(PortConfigSet_PortContainer_CAN_PTA12_CAN1_RX_MCU_CAN1_RX,PORT_GPIO_MODE);
  961. #if (ICU_PRECOMPILE_SUPPORT == STD_ON)
  962. Icu_Init(NULL_PTR);
  963. #elif (ICU_PRECOMPILE_SUPPORT == STD_OFF)
  964. Icu_Init(&Icu_Config_VS_0);
  965. #endif
  966. Mcu_SetMode(McuModeSettingConf_VLPS);
  967. }
  968. void SystemPeripheralDeinit(void)
  969. {
  970. WdgDeInit();
  971. Dio_WriteChannel(DioConf_DioChannel_PTA7_GPIO_OUT_MCU_4G_PWRKEY, STD_OFF);
  972. vTaskDelay(pdMS_TO_TICKS(3000));
  973. Dio_WriteChannel(DioConf_DioChannel_PTA6_GPIO_OUT_MCU_4G_POW_EN, STD_OFF);
  974. Dio_WriteChannel(DioConf_DioChannel_PTD1_GPIO_OUT_MCU_GPS_POW_EN, STD_OFF);//GPS ShutDown
  975. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_ON);
  976. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_ON);
  977. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_ON);
  978. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_ON);
  979. Dio_WriteChannel(DioConf_DioChannel_PTE9_GPIO_OUT_MCU_LED5, STD_ON);
  980. Uart_Deinit();
  981. Can_SetControllerMode(CanController_0, CAN_CS_STOPPED);
  982. Can_SetControllerMode(CanController_1, CAN_CS_STOPPED);
  983. // Can_SetControllerMode(CanController_2, CAN_CS_STOPPED);
  984. Can_DeInit();
  985. Adc_DeInit();
  986. Gpt_DisableNotification(GptConf_GptChannelConfiguration_GptChannelConfiguration_0);
  987. Gpt_DeInit();
  988. Spi_DeInit();
  989. Mcl_DeInit();
  990. // systemInitFlag = false;
  991. }
  992. void coreInit(void)
  993. {
  994. /* Initialize the Mcu driver */
  995. #if (MCU_PRECOMPILE_SUPPORT == STD_ON)
  996. Mcu_Init(NULL_PTR);
  997. #elif (MCU_PRECOMPILE_SUPPORT == STD_OFF)
  998. Mcu_Init(&Mcu_Config_VS_0);
  999. #endif /* (MCU_PRECOMPILE_SUPPORT == STD_ON) */
  1000. Mcu_InitClock(McuClockSettingConfig_0);
  1001. /* Wait until PLL is locked */
  1002. while (MCU_PLL_LOCKED != Mcu_GetPllStatus())
  1003. {
  1004. /* Busy wait until the System PLL is locked */
  1005. }
  1006. Mcu_DistributePllClock();
  1007. OsIf_Init(NULL_PTR);
  1008. Platform_Init(NULL_PTR);
  1009. }
  1010. void SystemModulesInit(void)
  1011. {
  1012. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1013. /* Initialize Mcl module */
  1014. Mcl_Init(NULL_PTR);
  1015. SEGGER_RTT_Init();
  1016. /* Initializes an UART driver*/
  1017. #if (UART_PRECOMPILE_SUPPORT == STD_ON)
  1018. Uart_Init(NULL_PTR);
  1019. #elif (UART_PRECOMPILE_SUPPORT == STD_OFF)
  1020. Uart_Init(&Uart_xConfig_VS_0);
  1021. #endif
  1022. IP_LPUART0->CTRL |= LPUART_CTRL_ILT(1);
  1023. IP_LPUART1->CTRL |= LPUART_CTRL_ILT(1);
  1024. IP_LPUART2->CTRL |= LPUART_CTRL_ILT(1);
  1025. IP_LPUART0->CTRL |= LPUART_CTRL_IDLECFG(5);
  1026. IP_LPUART1->CTRL |= LPUART_CTRL_IDLECFG(3);
  1027. IP_LPUART2->CTRL |= LPUART_CTRL_IDLECFG(3);
  1028. #if 1 /* Initialize Platform driver */
  1029. #if (CAN_PRECOMPILE_SUPPORT == STD_ON)
  1030. Can_Init(NULL_PTR);
  1031. #elif (CAN_PRECOMPILE_SUPPORT == STD_OFF)
  1032. Can_Init(&Can_Config_VS_0);
  1033. #endif
  1034. Can_SetControllerMode(CanController_0, CAN_CS_STARTED);
  1035. Can_SetControllerMode(CanController_1, CAN_CS_STARTED);
  1036. // Can_SetControllerMode(CanController_2, CAN_CS_STARTED);
  1037. #endif
  1038. #if (ADC_PRECOMPILE_SUPPORT == STD_ON)
  1039. Adc_Init(NULL_PTR);
  1040. #else
  1041. Adc_Init(&Adc_Config_VS_0);
  1042. #endif /* ADC_PRECOMPILE_SUPPORT == STD_ON */
  1043. /* Partition only if it was not partitioned before for EERAM with code 0x4 */
  1044. // Eep_DepartParitition(T_EEEPROM_SIZE);
  1045. /* Initialize Eep driver */
  1046. #if defined (EEP_PRECOMPILE_SUPPORT)
  1047. Eep_Init(NULL_PTR);
  1048. #else
  1049. Eep_Init(&Eep_Config_VS_0);
  1050. #endif
  1051. //Init Flash Driver
  1052. #if defined (FLS_PRECOMPILE_SUPPORT)
  1053. Fls_Init(NULL_PTR);
  1054. #else
  1055. Fls_Init(&Fls_Config_VS_0);
  1056. while(MEMIF_IDLE == Fls_GetStatus())
  1057. {
  1058. ;
  1059. }
  1060. #endif
  1061. Spi_Init(NULL_PTR);
  1062. /* Initialize the Gpt driver */
  1063. Gpt_Init(&Gpt_Config_VS_0);
  1064. /* Enable the Gpt notification to periodically service the Wdg */
  1065. Gpt_EnableNotification(GptConf_GptChannelConfiguration_GptChannelConfiguration_0);
  1066. Icu_DeInit();
  1067. WdgInit();
  1068. IsFeedWdg = true;
  1069. }