Port_VS_0_PBcfg.c 21 KB

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  1. /*==================================================================================================
  2. * Project : RTD AUTOSAR 4.4
  3. * Platform : CORTEXM
  4. * Peripheral : PORT_CI
  5. * Dependencies : none
  6. *
  7. * Autosar Version : 4.4.0
  8. * Autosar Revision : ASR_REL_4_4_REV_0000
  9. * Autosar Conf.Variant :
  10. * SW Version : 1.0.0
  11. * Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
  12. *
  13. * (c) Copyright 2020-2021 NXP Semiconductors
  14. * All Rights Reserved.
  15. *
  16. * NXP Confidential. This software is owned or controlled by NXP and may only be
  17. * used strictly in accordance with the applicable license terms. By expressly
  18. * accepting such terms or by downloading, installing, activating and/or otherwise
  19. * using the software, you are agreeing that you have read, and that you agree to
  20. * comply with and are bound by, such license terms. If you do not agree to be
  21. * bound by the applicable license terms, then you may not retain, install,
  22. * activate or otherwise use the software.
  23. ==================================================================================================*/
  24. /**
  25. * @file Port_PBcfg.c
  26. *
  27. * @implements Port_PBcfg.c_Artifact
  28. * @addtogroup Port_CFG
  29. * @{
  30. */
  31. #ifdef __cplusplus
  32. extern "C" {
  33. #endif
  34. /*=================================================================================================
  35. * INCLUDE FILES
  36. * 1) system and project includes
  37. * 2) needed interfaces from external units
  38. * 3) internal and external interfaces from this unit
  39. =================================================================================================*/
  40. #include "Port.h"
  41. /*=================================================================================================
  42. * SOURCE FILE VERSION INFORMATION
  43. =================================================================================================*/
  44. /**
  45. * @brief Parameters that shall be published within the Port driver header file and also in the
  46. * module description file
  47. * @details The integration of incompatible files shall be avoided.
  48. *
  49. */
  50. #define PORT_VENDOR_ID_VS_0_PBCFG_C 43
  51. #define PORT_AR_RELEASE_MAJOR_VERSION_VS_0_PBCFG_C 4
  52. #define PORT_AR_RELEASE_MINOR_VERSION_VS_0_PBCFG_C 4
  53. #define PORT_AR_RELEASE_REVISION_VERSION_VS_0_PBCFG_C 0
  54. #define PORT_SW_MAJOR_VERSION_VS_0_PBCFG_C 1
  55. #define PORT_SW_MINOR_VERSION_VS_0_PBCFG_C 0
  56. #define PORT_SW_PATCH_VERSION_VS_0_PBCFG_C 0
  57. /*=================================================================================================
  58. * FILE VERSION CHECKS
  59. =================================================================================================*/
  60. /* Check if the files Port_VS_0_PBcfg.c and Port.h are of the same vendor */
  61. #if (PORT_VENDOR_ID_VS_0_PBCFG_C != PORT_VENDOR_ID_H)
  62. #error "Port_VS_0_PBcfg.c and Port.h have different vendor ids"
  63. #endif
  64. /* Check if the files Port_VS_0_PBcfg.c and Port.h are of the same Autosar version */
  65. #if ((PORT_AR_RELEASE_MAJOR_VERSION_VS_0_PBCFG_C != PORT_AR_RELEASE_MAJOR_VERSION_H) || \
  66. (PORT_AR_RELEASE_MINOR_VERSION_VS_0_PBCFG_C != PORT_AR_RELEASE_MINOR_VERSION_H) || \
  67. (PORT_AR_RELEASE_REVISION_VERSION_VS_0_PBCFG_C != PORT_AR_RELEASE_REVISION_VERSION_H) \
  68. )
  69. #error "AutoSar Version Numbers of Port_VS_0_PBcfg.c and Port.h are different"
  70. #endif
  71. /* Check if the files Port_VS_0_PBcfg.c and Port.h are of the same software version */
  72. #if ((PORT_SW_MAJOR_VERSION_VS_0_PBCFG_C != PORT_SW_MAJOR_VERSION_H) || \
  73. (PORT_SW_MINOR_VERSION_VS_0_PBCFG_C != PORT_SW_MINOR_VERSION_H) || \
  74. (PORT_SW_PATCH_VERSION_VS_0_PBCFG_C != PORT_SW_PATCH_VERSION_H) \
  75. )
  76. #error "Software Version Numbers of Port_VS_0_PBcfg.c and Port.h are different"
  77. #endif
  78. /*=================================================================================================
  79. * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
  80. =================================================================================================*/
  81. /*=================================================================================================
  82. * LOCAL MACROS
  83. =================================================================================================*/
  84. /**
  85. * @brief The number of configured Digital Filter Ports
  86. */
  87. #define PORT_MAX_CONFIGURED_DIGITAL_FILTER_PORTS_VS_0_U8 (0U)
  88. /*=================================================================================================
  89. * LOCAL CONSTANTS
  90. =================================================================================================*/
  91. /*=================================================================================================
  92. * LOCAL VARIABLES
  93. =================================================================================================*/
  94. /*=================================================================================================
  95. * GLOBAL CONSTANTS
  96. =================================================================================================*/
  97. #define PORT_START_SEC_CONFIG_DATA_8
  98. #include "Port_MemMap.h"
  99. /**
  100. * @brief Array containing list of partition which used in driver
  101. */
  102. static const uint8 au8Port_PartitionList_VS_0[PORT_MAX_PARTITION] =
  103. {
  104. (uint8)1
  105. };
  106. #define PORT_STOP_SEC_CONFIG_DATA_8
  107. #include "Port_MemMap.h"
  108. #define PORT_START_SEC_CONFIG_DATA_32
  109. #include "Port_MemMap.h"
  110. /**
  111. * @brief Array containing list of mapping information for mappable elements
  112. */
  113. static const uint32 au32Port_PinToPartitionMap_VS_0[PORT_MAX_CONFIGURED_PADS_U16] =
  114. {
  115. (uint32)0x00000001,
  116. (uint32)0x00000001,
  117. (uint32)0x00000001,
  118. (uint32)0x00000001,
  119. (uint32)0x00000001,
  120. (uint32)0x00000001,
  121. (uint32)0x00000001,
  122. (uint32)0x00000001,
  123. (uint32)0x00000001,
  124. (uint32)0x00000001,
  125. (uint32)0x00000001,
  126. (uint32)0x00000001,
  127. (uint32)0x00000001,
  128. (uint32)0x00000001,
  129. (uint32)0x00000001,
  130. (uint32)0x00000001,
  131. (uint32)0x00000001,
  132. (uint32)0x00000001,
  133. (uint32)0x00000001,
  134. (uint32)0x00000001,
  135. (uint32)0x00000001,
  136. (uint32)0x00000001,
  137. (uint32)0x00000001,
  138. (uint32)0x00000001,
  139. (uint32)0x00000001,
  140. (uint32)0x00000001,
  141. (uint32)0x00000001,
  142. (uint32)0x00000001,
  143. (uint32)0x00000001,
  144. (uint32)0x00000001,
  145. (uint32)0x00000001,
  146. (uint32)0x00000001,
  147. (uint32)0x00000001,
  148. (uint32)0x00000001,
  149. (uint32)0x00000001,
  150. (uint32)0x00000001,
  151. (uint32)0x00000001,
  152. (uint32)0x00000001,
  153. (uint32)0x00000001,
  154. (uint32)0x00000001,
  155. (uint32)0x00000001,
  156. (uint32)0x00000001,
  157. (uint32)0x00000001
  158. };
  159. #define PORT_STOP_SEC_CONFIG_DATA_32
  160. #include "Port_MemMap.h"
  161. #define PORT_START_SEC_CONFIG_DATA_16
  162. #include "Port_MemMap.h"
  163. #if (0UL != PORT_MAX_UNUSED_PADS_U16)
  164. /**
  165. * @brief NoDefaultPadsArray is an array containing Unimplemented pads and User pads
  166. */
  167. static const uint16 Port_au16NoUnUsedPadsArrayDefault_VS_0[PORT_MAX_UNUSED_PADS_U16]=
  168. {
  169. (uint16)0,
  170. (uint16)1,
  171. (uint16)8,
  172. (uint16)9,
  173. (uint16)14,
  174. (uint16)15,
  175. (uint16)16,
  176. (uint16)17,
  177. (uint16)25,
  178. (uint16)26,
  179. (uint16)27,
  180. (uint16)28,
  181. (uint16)29,
  182. (uint16)30,
  183. (uint16)31,
  184. (uint16)35,
  185. (uint16)37,
  186. (uint16)40,
  187. (uint16)41,
  188. (uint16)42,
  189. (uint16)43,
  190. (uint16)46,
  191. (uint16)47,
  192. (uint16)48,
  193. (uint16)49,
  194. (uint16)50,
  195. (uint16)52,
  196. (uint16)53,
  197. (uint16)54,
  198. (uint16)55,
  199. (uint16)57,
  200. (uint16)59,
  201. (uint16)60,
  202. (uint16)61,
  203. (uint16)70,
  204. (uint16)71,
  205. (uint16)74,
  206. (uint16)75,
  207. (uint16)76,
  208. (uint16)77,
  209. (uint16)83,
  210. (uint16)87,
  211. (uint16)91,
  212. (uint16)92,
  213. (uint16)93,
  214. (uint16)94,
  215. (uint16)95,
  216. (uint16)104,
  217. (uint16)105,
  218. (uint16)106,
  219. (uint16)107,
  220. (uint16)108,
  221. (uint16)109,
  222. (uint16)110,
  223. (uint16)113,
  224. (uint16)114,
  225. (uint16)115,
  226. (uint16)118,
  227. (uint16)119,
  228. (uint16)120,
  229. (uint16)123,
  230. (uint16)124,
  231. (uint16)125,
  232. (uint16)126,
  233. (uint16)131,
  234. (uint16)138,
  235. (uint16)140,
  236. (uint16)141,
  237. (uint16)142,
  238. (uint16)143,
  239. (uint16)144,
  240. (uint16)147,
  241. (uint16)148,
  242. (uint16)149,
  243. (uint16)150,
  244. (uint16)151,
  245. (uint16)152,
  246. (uint16)153
  247. };
  248. #endif
  249. #define PORT_STOP_SEC_CONFIG_DATA_16
  250. #include "Port_MemMap.h"
  251. #define PORT_START_SEC_CONFIG_DATA_UNSPECIFIED
  252. #include "Port_MemMap.h"
  253. /**
  254. * @brief Default Configuration for Pins not initialized
  255. */
  256. static const Port_UnUsedPinConfigType Port_UnUsedPin_VS_0 =
  257. {
  258. /* @note: Configuration of Default pin */
  259. (uint32)0x00000100, (Port_PinDirectionType)1, (uint8)0
  260. };
  261. /**
  262. * @brief Pin default configuration data for configPB
  263. */
  264. static const Port_PinConfigType Port_aPinConfigDefault_VS_0[PORT_MAX_CONFIGURED_PADS_U16]=
  265. {
  266. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  267. {(uint16)67, (uint32)0x00000400, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  268. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  269. {(uint16)66, (uint32)0x00000403, (uint8)1, (Port_PinDirectionType)1, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  270. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  271. {(uint16)73, (uint32)0x00000200, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  272. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  273. {(uint16)72, (uint32)0x00000200, (uint8)1, (Port_PinDirectionType)1, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  274. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  275. {(uint16)103, (uint32)0x00000200, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  276. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  277. {(uint16)102, (uint32)0x00000200, (uint8)1, (Port_PinDirectionType)1, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  278. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  279. {(uint16)133, (uint32)0x00000500, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  280. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  281. {(uint16)132, (uint32)0x00000500, (uint8)1, (Port_PinDirectionType)1, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  282. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  283. {(uint16)12, (uint32)0x00000300, (uint8)1, (Port_PinDirectionType)1, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  284. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  285. {(uint16)13, (uint32)0x00000300, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  286. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  287. {(uint16)45, (uint32)0x00000000, (uint8)2, (Port_PinDirectionType)0, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  288. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  289. {(uint16)44, (uint32)0x00000000, (uint8)2, (Port_PinDirectionType)0, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  290. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  291. {(uint16)100, (uint32)0x00000000, (uint8)2, (Port_PinDirectionType)0, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  292. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  293. {(uint16)134, (uint32)0x00000000, (uint8)2, (Port_PinDirectionType)0, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  294. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  295. {(uint16)3, (uint32)0x00000300, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  296. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  297. {(uint16)2, (uint32)0x00000300, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  298. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  299. {(uint16)79, (uint32)0x00000300, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  300. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  301. {(uint16)64, (uint32)0x00000303, (uint8)1, (Port_PinDirectionType)1, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  302. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  303. {(uint16)65, (uint32)0x00000303, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  304. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  305. {(uint16)139, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)1, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  306. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  307. {(uint16)101, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)1, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  308. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  309. {(uint16)32, (uint32)0x00000103, (uint8)1, (Port_PinDirectionType)1, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  310. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  311. {(uint16)130, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)1, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  312. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  313. {(uint16)7, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  314. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  315. {(uint16)6, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  316. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  317. {(uint16)98, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  318. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  319. {(uint16)99, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  320. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  321. {(uint16)33, (uint32)0x00000100, (uint8)1, (Port_PinDirectionType)1, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  322. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  323. {(uint16)34, (uint32)0x00000100, (uint8)1, (Port_PinDirectionType)1, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  324. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  325. {(uint16)111, (uint32)0x00000140, (uint8)0, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  326. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  327. {(uint16)112, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  328. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  329. {(uint16)11, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  330. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  331. {(uint16)96, (uint32)0x00000100, (uint8)1, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  332. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  333. {(uint16)97, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  334. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  335. {(uint16)128, (uint32)0x00000100, (uint8)1, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  336. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  337. {(uint16)129, (uint32)0x00000100, (uint8)1, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  338. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  339. {(uint16)135, (uint32)0x00000100, (uint8)1, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  340. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  341. {(uint16)136, (uint32)0x00000100, (uint8)1, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  342. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  343. {(uint16)137, (uint32)0x00000100, (uint8)1, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  344. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  345. {(uint16)36, (uint32)0x00000100, (uint8)0, (Port_PinDirectionType)2, (boolean)TRUE, (boolean)TRUE, (boolean)TRUE},
  346. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  347. {(uint16)78, (uint32)0x00000300, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  348. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  349. {(uint16)80, (uint32)0x00000300, (uint8)1, (Port_PinDirectionType)1, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE},
  350. /* PCR Id, PCR Value, Output Level, Direction, IsGpio, Direction Configurable, Mode Changeable */
  351. {(uint16)81, (uint32)0x00000300, (uint8)1, (Port_PinDirectionType)2, (boolean)FALSE, (boolean)FALSE, (boolean)TRUE}
  352. };
  353. #if (0UL != PORT_MAX_CONFIGURED_DIGITAL_FILTER_PORTS_VS_0_U8)
  354. static const Port_Ci_Port_Ip_DigitalFilterConfigType Port_aDigitalFilter_VS_0[PORT_MAX_CONFIGURED_DIGITAL_FILTER_PORTS_VS_0_U8]=
  355. {
  356. };
  357. #endif /* (0UL != PORT_MAX_CONFIGURED_DIGITAL_FILTER_PORTS_VS_0_U8) */
  358. /**
  359. * @brief This table contains all the Configured Port Pin parameters and the
  360. * number of Port Pins configured by the tool for the post-build mode
  361. * that will be used by the upper layers.
  362. */
  363. const Port_ConfigType Port_Config =
  364. {
  365. PORT_MAX_CONFIGURED_PADS_U16,
  366. PORT_MAX_UNUSED_PADS_U16,
  367. #if (0UL != PORT_MAX_UNUSED_PADS_U16)
  368. Port_au16NoUnUsedPadsArrayDefault_VS_0,
  369. #else
  370. NULL_PTR,
  371. #endif
  372. &Port_UnUsedPin_VS_0,
  373. Port_aPinConfigDefault_VS_0,
  374. PORT_MAX_CONFIGURED_DIGITAL_FILTER_PORTS_VS_0_U8,
  375. #if (0UL != PORT_MAX_CONFIGURED_DIGITAL_FILTER_PORTS_VS_0_U8)
  376. Port_aDigitalFilter_VS_0,
  377. #else
  378. NULL_PTR,
  379. #endif
  380. au32Port_PinToPartitionMap_VS_0,
  381. au8Port_PartitionList_VS_0,
  382. g_pin_mux_InitConfigArr_VS_0
  383. };
  384. #define PORT_STOP_SEC_CONFIG_DATA_UNSPECIFIED
  385. #include "Port_MemMap.h"
  386. /*=================================================================================================
  387. * GLOBAL VARIABLES
  388. =================================================================================================*/
  389. /*=================================================================================================
  390. * LOCAL FUNCTION PROTOTYPES
  391. =================================================================================================*/
  392. /*=================================================================================================
  393. * LOCAL FUNCTIONS
  394. =================================================================================================*/
  395. /*=================================================================================================
  396. * GLOBAL FUNCTIONS
  397. =================================================================================================*/
  398. #ifdef __cplusplus
  399. }
  400. #endif
  401. /** @} */
  402. /* End of File */