hal_adapter.c 35 KB

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  1. /*
  2. * hal_adapter.c
  3. *中间层函数调用库
  4. * Created on: 2022年1月18日
  5. * Author: QiXiang_CHENJIE
  6. */
  7. #include "hal_adapter.h"
  8. #include "AppGlobalVar.h"
  9. #include "stdio.h"
  10. #include "stdarg.h"
  11. /********************************/
  12. #include "Icu.h"
  13. #include "Gpt.h"
  14. uint8_t __attribute__((section(".non_cacheable_data"))) RX_Buffer[3][BUFFER_SIZE];
  15. uint32_t bufferIdx[3] = {0};
  16. volatile uint32 VarNotification_0 = 0;
  17. volatile uint32 VarNotification_1 = 0;
  18. TP_Value_Type ConvertedBuffer[NUM_RESULTS];
  19. Adc_ValueGroupType ResultBuffer[NUM_RESULTS];
  20. volatile Uart_StatusType Uart_TransmitStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  21. QueueHandle_t UartRecvQueue[3];
  22. QueueHandle_t UartSendQueue[3];
  23. QueueHandle_t UartHalQueueHandle;
  24. Std_ReturnType UartStartRecvFunc(uint8 channel);
  25. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR);
  26. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len);
  27. void clear_ringBuffer(ringbuffer_t *ringBuf);
  28. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  29. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  30. uint8 ringBufferforUart[3][BUFFER_SIZE];
  31. ringbuffer_t uartRingBuffer[3];
  32. sint8 AtcmdDelayRecvFunc(uint8 recvChannel,char *ResultStrPtr,uint16 delayTime)
  33. {
  34. sint8 outValue = -1;
  35. uint8 delayCnt = 0;
  36. uint8 UartData[256];
  37. uint16 ReadLen = 0;
  38. char *retptr = NULL;
  39. while (delayCnt<(delayTime/1000)&&outValue!=0)
  40. {
  41. UART_Receive_Data(recvChannel,UartData, &ReadLen,1000);
  42. if(ReadLen>0)
  43. {
  44. retptr = (char *)strstr((char *)UartData, ResultStrPtr);
  45. if (retptr)
  46. {
  47. outValue = 0;
  48. break;
  49. }
  50. }
  51. else
  52. {
  53. delayCnt++;
  54. }
  55. }
  56. return outValue;
  57. }
  58. #if 0
  59. uint16 myPrintf(const char *fmt, ...)
  60. {
  61. int n;
  62. uint8 databuffer[512]={0};
  63. va_list args;
  64. va_start(args, fmt);
  65. n = vsprintf((char *)databuffer, fmt, args);
  66. va_end(args);
  67. if( (printfRingBuffer.bw + n) <= printfRingBuffer.length )
  68. {
  69. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  70. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  71. printfRingBuffer.bw = printfRingBuffer.bw + n;
  72. }
  73. else
  74. {
  75. printfRingBuffer.bw = 0;
  76. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  77. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  78. }
  79. return n;
  80. }
  81. #endif
  82. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len)
  83. {
  84. ringBuf->br = 0;
  85. ringBuf->bw = 0;
  86. ringBuf->btoRead = 0;
  87. ringBuf->source = buf;
  88. ringBuf->length = buf_len;
  89. }
  90. void clear_ringBuffer(ringbuffer_t *ringBuf)
  91. {
  92. ringBuf->br = 0;
  93. ringBuf->bw = 0;
  94. ringBuf->btoRead = 0;
  95. }
  96. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  97. {
  98. uint32_t len = 0;
  99. volatile uint32_t ringBuf_bw = ringBuf->bw;
  100. uint32_t ringBuf_len = ringBuf->length;
  101. uint8_t *ringBuf_source = ringBuf->source;
  102. if( (ringBuf_bw + size) > ringBuf_len )
  103. {
  104. ringBuf_bw = 0;
  105. }
  106. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  107. ringBuf->bw = (ringBuf_bw + size) % ringBuf_len;
  108. ringBuf->btoRead += size;
  109. /*
  110. if(ringBuf->br!=0)
  111. {
  112. memcpy(ringBuf_source, buffer, size);
  113. ringBuf->br = 0;
  114. }
  115. */
  116. /*
  117. if( (ringBuf_bw + size) <= ringBuf_len )
  118. {
  119. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  120. }
  121. else
  122. {
  123. len = ringBuf_len - ringBuf_bw;
  124. memcpy(ringBuf_source + ringBuf_bw, buffer, len);
  125. memcpy(ringBuf_source, buffer + ringBuf_bw, size - len);
  126. }
  127. ringBuf->bw = (ringBuf->bw + size) % ringBuf_len;
  128. ringBuf->btoRead += size;
  129. */
  130. return size;
  131. }
  132. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  133. {
  134. uint32_t len = 0;
  135. volatile uint32_t ringBuf_br = ringBuf->br;
  136. uint32_t ringBuf_len = ringBuf->length;
  137. uint8_t *ringBuf_source = ringBuf->source;
  138. memcpy(buffer, ringBuf_source, size);
  139. ringBuf->br = size;
  140. // if( (ringBuf_br + size ) <= ringBuf_len )
  141. // {
  142. // memcpy(buffer, ringBuf_source + ringBuf_br, size);
  143. // }
  144. // else
  145. // {
  146. // len = ringBuf_len - ringBuf_br;
  147. // memcpy(buffer, ringBuf_source + ringBuf_br, len);
  148. // memcpy(buffer + len, ringBuf_source, size - len);
  149. // }
  150. // ringBuf->br = (ringBuf->br + size) % ringBuf_len;
  151. // ringBuf->btoRead -= size;
  152. return size;
  153. }
  154. Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, uint8 *txBuffer, uint16 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  155. {
  156. UartMsg_t UartRecvMsg;
  157. UartMsg_t UartSendMsg;
  158. BaseType_t Sendret = pdFALSE;
  159. BaseType_t Recvret = pdFALSE;
  160. uint32 retVal = E_NOT_OK;
  161. UartSendMsg.DataLen = sendLength;
  162. UartSendMsg.dataPtr = txBuffer;
  163. *rxlen = 0;
  164. Sendret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,50);
  165. if(Sendret == pdTRUE)
  166. {
  167. Recvret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  168. if(Recvret == pdTRUE)
  169. {
  170. *rxlen = UartRecvMsg.DataLen;
  171. // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
  172. memcpy(rxBuffer,(uint8 *)(UartRecvMsg.dataAddr),UartRecvMsg.DataLen);
  173. retVal = E_OK;
  174. }
  175. else
  176. {
  177. retVal = 3;
  178. }
  179. }
  180. else
  181. {
  182. retVal = 2;
  183. }
  184. return retVal;
  185. }
  186. Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint8 *rxlen, uint32 T_timeout)
  187. {
  188. UartMsg_t UartRecvMsg;
  189. BaseType_t ret = pdFALSE;
  190. uint32 retVal = E_NOT_OK;
  191. *rxlen = 0;
  192. ret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  193. if(ret == pdTRUE)
  194. {
  195. *rxlen = UartRecvMsg.DataLen;
  196. // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
  197. memcpy(rxBuffer,(uint8 *)UartRecvMsg.dataAddr,UartRecvMsg.DataLen);
  198. retVal = E_OK;
  199. }
  200. return retVal;
  201. }
  202. Std_ReturnType UART_Reset(uint8 recvChannel)
  203. {
  204. uint32 retVal = E_NOT_OK;
  205. retVal = xQueueReset(UartRecvQueue[recvChannel]);
  206. return retVal;
  207. }
  208. Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  209. {
  210. UartMsg_t UartSendMsg;
  211. BaseType_t ret = pdFALSE;
  212. uint32 retVal = E_NOT_OK;
  213. UartSendMsg.DataLen = sendLength;
  214. UartSendMsg.dataPtr = txBuffer;
  215. ret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,T_timeout);
  216. if(ret == pdTRUE)
  217. {
  218. retVal = E_OK;
  219. }
  220. return retVal;
  221. }
  222. void UartInit(void)
  223. {
  224. create_ringBuffer(&uartRingBuffer[0],ringBufferforUart[0],sizeof(ringBufferforUart[0]));
  225. create_ringBuffer(&uartRingBuffer[1],ringBufferforUart[1],sizeof(ringBufferforUart[1]));
  226. create_ringBuffer(&uartRingBuffer[2],ringBufferforUart[2],sizeof(ringBufferforUart[2]));
  227. UartRecvQueue[0] = xQueueCreate(6, sizeof(UartMsg_t));
  228. UartRecvQueue[1] = xQueueCreate(6, sizeof(UartMsg_t));
  229. UartRecvQueue[2] = xQueueCreate(6, sizeof(UartMsg_t));
  230. UartSendQueue[0] = xQueueCreate(3, sizeof(UartMsg_t));
  231. UartSendQueue[1] = xQueueCreate(1, sizeof(UartMsg_t));
  232. UartSendQueue[2] = xQueueCreate(1, sizeof(UartMsg_t));
  233. UartHalQueueHandle = xQueueCreate(9, sizeof(UartHalMsg_t));
  234. xTaskCreate(Uart_Hal_RecvTask, (const char *const)"UartRecv", 256, (void *)0, main_TASK_PRIORITY + 5, &Uart_Hal_RecvTask_Handle);
  235. xTaskCreate(Uart_Hal_SendTask, (const char *const)"UartSend", 256, (void *)0, main_TASK_PRIORITY + 4, &Uart_Hal_SendTask_Handle);
  236. }
  237. Std_ReturnType UartStartRecvFunc(uint8 channel)
  238. {
  239. sint8 out = 0;
  240. volatile Std_ReturnType R_Uart_Status=E_NOT_OK;
  241. bufferIdx[channel]=0;
  242. memset(RX_Buffer[channel],0x00,BUFFER_SIZE);
  243. switch(channel)
  244. {
  245. case 0:
  246. IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  247. break;
  248. case 1:
  249. IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  250. break;
  251. case 2:
  252. IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  253. break;
  254. default:
  255. break;
  256. }
  257. Uart_SetBuffer(channel, RX_Buffer[channel], DMA_SIZE, UART_RECEIVE);
  258. R_Uart_Status = Uart_AsyncReceive(channel, RX_Buffer[channel], DMA_SIZE);
  259. if (E_OK != R_Uart_Status)
  260. {
  261. Uart_Abort(channel, UART_RECEIVE);
  262. out = E_NOT_OK;
  263. }
  264. return out;
  265. }
  266. void Uart_Hal_RecvTask(void *pvParameters)
  267. {
  268. UartHalMsg_t UartHalMsgRecv;
  269. UartMsg_t UartRecvMsg;
  270. uint16 recvSize = 0;
  271. BaseType_t ret = pdFALSE;
  272. BaseType_t ret_send = pdFALSE;
  273. uint32 T_bytesRemaining[3] = {0};
  274. uint16 T_timeout[3] = {0};
  275. volatile Uart_StatusType Uart_ReceiveStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  276. uint8 UartIdx = UART_LPUART0;
  277. uint8 UartState[3] = {UartAbortRecv,UartAbortRecv,UartAbortRecv};
  278. while(1)
  279. {
  280. if((T_timeout[UartIdx]>1000) && (Uart_ReceiveStatus[UartIdx] != UART_STATUS_NO_ERROR) )
  281. {
  282. Uart_Abort(UartIdx, UART_RECEIVE);
  283. UartState[UartIdx] = UartAbortRecv;
  284. T_timeout[UartIdx] = 0;
  285. }
  286. else if(Uart_ReceiveStatus[UartIdx] == UART_STATUS_NO_ERROR)
  287. {
  288. UartState[UartIdx] = UartRecvComplete;
  289. }
  290. if((UartState[UartIdx] == UartAbortRecv) || (UartState[UartIdx] == UartRecvComplete))
  291. {
  292. if(E_OK == UartStartRecvFunc(UartIdx))
  293. {
  294. UartState[UartIdx] = UartStartRecv;
  295. }
  296. }
  297. Uart_ReceiveStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_RECEIVE);
  298. T_timeout[UartIdx]++;
  299. UartIdx = (UartIdx + 1) > 2 ? 1 : (UartIdx + 1);
  300. ret = xQueueReceive(UartHalQueueHandle,&UartHalMsgRecv,1);
  301. if(ret==pdTRUE)
  302. {
  303. if(UartHalMsgRecv.event==LPUART_UART_IP_EVENT_RECV_IDLE)
  304. {
  305. if(UartHalMsgRecv.value>0)
  306. {
  307. recvSize = write_ringBuffer(RX_Buffer[UartHalMsgRecv.Channel],UartHalMsgRecv.value,&uartRingBuffer[UartHalMsgRecv.Channel]);
  308. UartRecvMsg.DataLen = UartHalMsgRecv.value;
  309. UartRecvMsg.dataAddr = (uint32)(uartRingBuffer[UartHalMsgRecv.Channel].bw + uartRingBuffer[UartHalMsgRecv.Channel].source - UartHalMsgRecv.value);
  310. ret_send = xQueueSend(UartRecvQueue[UartHalMsgRecv.Channel],&UartRecvMsg,10);
  311. //#if SEGGER_PRINTF==1
  312. // if(UartHalMsgRecv.Channel==1)
  313. // {
  314. // SEGGER_RTT_printf("[%d]source=%X,dataAddr=%X\r\n",__LINE__,uartRingBuffer[UartHalMsgRecv.Channel].source,UartRecvMsg.dataAddr);
  315. // }
  316. //#endif
  317. }
  318. T_timeout[UartHalMsgRecv.Channel] = 0;
  319. UartState[UartHalMsgRecv.Channel] = UartRecvComplete;
  320. }
  321. }
  322. }
  323. }
  324. void Uart_Hal_SendTask(void *pvParameters)
  325. {
  326. UartMsg_t UartSendMsg;
  327. BaseType_t ret = pdFALSE;
  328. uint32 T_bytesRemaining[3] = {0};
  329. uint16 T_timeout[3] = {0};
  330. volatile Std_ReturnType T_Uart_Status[3];
  331. uint8 UartIdx = UART_LPUART0;
  332. uint8 UartSendState[3] = {UartNoDataSend,UartNoDataSend,UartNoDataSend};
  333. while(1)
  334. {
  335. ret = xQueueReceive(UartSendQueue[UartIdx],&UartSendMsg,1);
  336. if(ret==pdTRUE)
  337. {
  338. T_Uart_Status[UartIdx] = Uart_AsyncSend(UartIdx, UartSendMsg.dataPtr, UartSendMsg.DataLen);
  339. if (E_OK != T_Uart_Status[UartIdx])
  340. {
  341. Uart_Abort(UartIdx, UART_SEND);
  342. UartSendState[UartIdx] = UartAbortSend;
  343. }
  344. else
  345. {
  346. UartSendState[UartIdx] = UartStartSend;
  347. }
  348. }
  349. /*开始发送后的判定*/
  350. if(UartSendState[UartIdx] == UartStartSend)
  351. {
  352. Uart_TransmitStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_SEND);
  353. T_timeout[UartIdx]++;
  354. }
  355. if(T_timeout[UartIdx]>=1000 || ((Uart_TransmitStatus[UartIdx] != UART_STATUS_OPERATION_ONGOING) && (UartSendState[UartIdx] == UartStartSend)))
  356. {
  357. if(T_timeout[UartIdx]>=1000)
  358. {
  359. Uart_Abort(UartIdx, UART_SEND);
  360. UartSendState[UartIdx] = UartAbortSend;
  361. }
  362. else if(Uart_TransmitStatus[UartIdx] == UART_STATUS_NO_ERROR)
  363. {
  364. UartSendState[UartIdx] = UartSendComplete;
  365. }
  366. T_timeout[UartIdx] = 0;
  367. }
  368. UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
  369. }
  370. }
  371. //
  372. //Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, const uint8 *txBuffer, uint32 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  373. //{
  374. // volatile Std_ReturnType R_Uart_Status;
  375. // volatile Std_ReturnType T_Uart_Status;
  376. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  377. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  378. // uint32 T_bytesRemaining;
  379. // uint32 R_bytesRemaining;
  380. // uint32 timeout = T_timeout;
  381. // uint32 retVal = E_NOT_OK;
  382. // bufferIdx[recvChannel] = 0;
  383. // switch (recvChannel)
  384. // {
  385. // case 0:
  386. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  387. // break;
  388. // case 1:
  389. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  390. // break;
  391. // case 2:
  392. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  393. // break;
  394. // default:
  395. // break;
  396. // }
  397. // if (txBuffer == NULL || rxBuffer == NULL)
  398. // {
  399. // return retVal;
  400. // }
  401. //
  402. // /* Uart_AsyncSend transmit data */
  403. // Uart_SetBuffer(transChannel, txBuffer, sendLength, UART_SEND);
  404. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  405. // if (E_OK != T_Uart_Status)
  406. // {
  407. // Uart_Abort(transChannel, UART_SEND);
  408. // return E_NOT_OK;
  409. // }
  410. // Uart_SetBuffer(recvChannel, &RX_Buffer[recvChannel][0], DMA_SIZE, UART_RECEIVE);
  411. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  412. // if (E_OK != R_Uart_Status)
  413. // {
  414. // Uart_Abort(recvChannel, UART_RECEIVE);
  415. // return E_NOT_OK;
  416. // }
  417. // /* Check for no on-going transmission */
  418. // do
  419. // {
  420. // if (Uart_TransmitStatus != UART_STATUS_NO_ERROR)
  421. // {
  422. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  423. // }
  424. // if (Uart_ReceiveStatus != UART_STATUS_NO_ERROR)
  425. // {
  426. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &R_bytesRemaining, UART_RECEIVE);
  427. // }
  428. // vTaskDelay(pdMS_TO_TICKS(1));
  429. // } while (((UART_STATUS_NO_ERROR != Uart_TransmitStatus || UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < --timeout));
  430. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  431. // {
  432. // Uart_Abort(transChannel, UART_SEND);
  433. // retVal = E_NOT_OK;
  434. // }
  435. // else
  436. // {
  437. // retVal = E_OK;
  438. // }
  439. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  440. // {
  441. // Uart_Abort(recvChannel, UART_RECEIVE);
  442. // *rxlen = bufferIdx[recvChannel];
  443. // retVal = E_NOT_OK;
  444. // }
  445. // else
  446. // {
  447. // *rxlen = bufferIdx[recvChannel];
  448. // retVal = E_OK;
  449. // }
  450. // return retVal;
  451. //}
  452. //
  453. //Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  454. //{
  455. //
  456. // volatile Std_ReturnType T_Uart_Status;
  457. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  458. // uint32 T_bytesRemaining;
  459. // uint32 timeout = T_timeout;
  460. // uint32 retVal = E_NOT_OK;
  461. // if (txBuffer == NULL)
  462. // {
  463. // return retVal;
  464. // }
  465. //
  466. // /* Uart_AsyncSend transmit data */
  467. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  468. // if (E_OK != T_Uart_Status)
  469. // {
  470. // Uart_Abort(transChannel, UART_SEND);
  471. // return E_NOT_OK;
  472. // }
  473. // /* Check for no on-going transmission */
  474. // do
  475. // {
  476. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  477. // vTaskDelay(pdMS_TO_TICKS(1));
  478. // } while ((UART_STATUS_NO_ERROR != Uart_TransmitStatus && 0 < --timeout));
  479. //
  480. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  481. // {
  482. // retVal = E_NOT_OK;
  483. // }
  484. // else
  485. // {
  486. // retVal = E_OK;
  487. // }
  488. // return retVal;
  489. //}
  490. //
  491. //Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint16 *rxlen, sint32 T_timeout)
  492. //{
  493. // volatile Std_ReturnType R_Uart_Status = E_NOT_OK;
  494. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  495. // uint32 T_bytesRemaining = 0;
  496. // uint32 retVal = E_NOT_OK;
  497. // // uint8 Rx_Buffer[MSG_LEN];
  498. // bufferIdx[recvChannel] = 0;
  499. // *rxlen = 0;
  500. // if (rxBuffer == NULL)
  501. // {
  502. // return retVal;
  503. // }
  504. // /* Uart_AsyncReceive transmit data */
  505. // switch (recvChannel)
  506. // {
  507. // case 0:
  508. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  509. // break;
  510. // case 1:
  511. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  512. // break;
  513. // case 2:
  514. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  515. // break;
  516. // default:
  517. // break;
  518. // }
  519. // Uart_SetBuffer(recvChannel, rxBuffer, DMA_SIZE, UART_RECEIVE);
  520. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  521. // if (E_OK != R_Uart_Status)
  522. // {
  523. // Uart_Abort(recvChannel, UART_RECEIVE);
  524. // return E_NOT_OK;
  525. // }
  526. // /* Check for no on-going transmission */
  527. // do
  528. // {
  529. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &T_bytesRemaining, UART_RECEIVE);
  530. // vTaskDelay(pdMS_TO_TICKS(1));
  531. //
  532. // } while ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < T_timeout--);
  533. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  534. // {
  535. // Uart_Abort(recvChannel, UART_RECEIVE);
  536. // *rxlen = bufferIdx[recvChannel];
  537. // retVal = E_NOT_OK;
  538. // }
  539. // else
  540. // {
  541. // *rxlen = bufferIdx[recvChannel];
  542. // retVal = E_OK;
  543. // }
  544. // return retVal;
  545. //}
  546. extern Lpuart_Uart_Ip_StateStructureType *Lpuart_Uart_Ip_apStateStructuresArray[LPUART_UART_IP_NUMBER_OF_INSTANCES];
  547. void UART_Callback(uint32 hwInstance, Lpuart_Uart_Ip_EventType event)
  548. {
  549. // (void)userData;
  550. Lpuart_Uart_Ip_StateStructureType * UartState;
  551. UartState = (Lpuart_Uart_Ip_StateStructureType *)Lpuart_Uart_Ip_apStateStructuresArray[hwInstance];
  552. /* Check the event type */
  553. if (event == LPUART_UART_IP_EVENT_RX_FULL)
  554. {
  555. /* The reception stops when receiving idle is detected or the buffer is full */
  556. if (bufferIdx[hwInstance] <= (BUFFER_SIZE - DMA_SIZE))
  557. {
  558. /* Update the buffer index and the rx buffer */
  559. bufferIdx[hwInstance] += DMA_SIZE;
  560. Uart_SetBuffer(hwInstance, &RX_Buffer[hwInstance][bufferIdx[hwInstance]], DMA_SIZE, UART_RECEIVE);
  561. // Lpuart_Uart_Ip_SetRxBuffer(hwInstance, &RX_Buffer[bufferIdx], DMA_SIZE);
  562. }
  563. }
  564. if (event == LPUART_UART_IP_EVENT_ERROR)
  565. {
  566. // /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  567. // temp = DMA_SIZE - (uint32_t)IP_DMA->TCD->CITER.ELINKNO;
  568. // /*Add the remaining data size to the sum of the received size*/
  569. // bufferIdx[hwInstance] += temp;
  570. /*Abort the receiving after detecting IDLE receiving*/
  571. Lpuart_Uart_Ip_AbortReceivingData(hwInstance);
  572. Lpuart_Uart_Ip_AbortSendingData(hwInstance);
  573. // bufferIdx = 0;
  574. }
  575. if (event == LPUART_UART_IP_EVENT_RECV_IDLE)
  576. {
  577. uint32_t temp;
  578. UartHalMsg_t UartHalMsg;
  579. UartHalMsg.Channel = hwInstance;
  580. UartHalMsg.event = event;
  581. /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  582. temp = DMA_SIZE - (uint32_t)IP_DMA->TCD[hwInstance].CITER.ELINKNO;
  583. /*Add the remaining data size to the sum of the received size*/
  584. bufferIdx[hwInstance] += temp;
  585. /*Abort the receiving after detecting IDLE receiving*/
  586. UartHalMsg.value = bufferIdx[hwInstance];
  587. xQueueSendFromISR(UartHalQueueHandle,&UartHalMsg,pdFALSE);
  588. }
  589. }
  590. /*CAN*/
  591. Can_PduType Can_CreatePduInfo(Can_IdType id, CAN_IdFrameType idFrame, PduIdType swPduHandle, uint8 length, uint8 *sdu)
  592. {
  593. Can_PduType PduInfo;
  594. switch (idFrame)
  595. {
  596. case CAN_STANDARD_ID_TYPE:
  597. id = id & 0x7FF;
  598. break;
  599. case CANFD_STANDARD_ID_TYPE:
  600. id = (id & 0x7FF) | 0x40000000;
  601. break;
  602. case CAN_EXTENDED_ID_TYPE:
  603. id = id | 0x80000000;
  604. break;
  605. case CANFD_EXTENDED_ID_TYPE:
  606. id = id | 0xC0000000;
  607. break;
  608. default:
  609. id = id & 0x7FF;
  610. break;
  611. }
  612. PduInfo.id = id;
  613. PduInfo.swPduHandle = swPduHandle;
  614. PduInfo.length = length;
  615. PduInfo.sdu = sdu;
  616. return PduInfo;
  617. }
  618. Std_ReturnType CanIf_SendMessage(uint8 ControllerId, Can_Msg_Type CanMsg)
  619. {
  620. volatile Can_PduType Can_PduInfo;
  621. volatile Std_ReturnType CAN_Write_Status;
  622. Std_ReturnType retVal = E_NOT_OK;
  623. uint32 u8TimeOut = 100 * 100;
  624. Can_HwHandleType Hth = Can0HardwareObject_TX + (Can_HwHandleType)ControllerId; // controller 0 --> Can0HardwareObject_TX
  625. Can_PduInfo = Can_CreatePduInfo(CanMsg.id, CanMsg.idFrame, 0, CanMsg.length, CanMsg.sdu);
  626. CAN_Write_Status = Can_Write(Hth, &Can_PduInfo);
  627. CanIf_bTxFlag = FALSE;
  628. if (CAN_Write_Status == E_OK)
  629. {
  630. while ((!CanIf_bTxFlag) && (u8TimeOut != 0U))
  631. {
  632. Can_MainFunction_Write();
  633. u8TimeOut--;
  634. }
  635. }
  636. if (CanIf_bTxFlag == TRUE)
  637. {
  638. retVal = E_OK;
  639. }
  640. else
  641. {
  642. retVal = E_NOT_OK;
  643. }
  644. return retVal;
  645. }
  646. Can_Msg_Type Can_GetMsgInfo(Can_IdType id, uint8 length, uint8 *sdu)
  647. {
  648. Can_Msg_Type CanMsgInfo;
  649. CanMsgInfo.idFrame = (CAN_IdFrameType)((id >> 30) & 0x03);
  650. if (CanMsgInfo.idFrame & 0x01)
  651. {
  652. CanMsgInfo.id = id & 0x7FF;
  653. }
  654. else
  655. {
  656. CanMsgInfo.id = id & 0x1FFFFFFF;
  657. }
  658. CanMsgInfo.length = length;
  659. CanMsgInfo.sdu = sdu;
  660. return CanMsgInfo;
  661. }
  662. void CanIf_ControllerBusOff(uint8 ControllerId)
  663. {
  664. (void)ControllerId;
  665. }
  666. void CanIf_ControllerModeIndication(uint8 ControllerId, Can_ControllerStateType ControllerMode)
  667. {
  668. (void)ControllerId;
  669. (void)ControllerMode;
  670. }
  671. void CanIf_TxConfirmation(PduIdType CanTxPduId)
  672. {
  673. CanIf_u8TxConfirmCnt++;
  674. CanIf_bTxFlag = TRUE;
  675. (void)CanTxPduId;
  676. }
  677. void CanIf_RxIndication(const Can_HwType *Mailbox, const PduInfoType *PduInfoPtr)
  678. {
  679. Can_Msg_Type canRxMsg_Buff;
  680. Can_Msg_Type_Data canRxMsgQueueData;
  681. CanIf_bRxFlag = TRUE; // should not be delete
  682. // should put the msg into message queue
  683. canRxMsg_Buff = Can_GetMsgInfo(Mailbox->CanId, PduInfoPtr->SduLength, PduInfoPtr->SduDataPtr);
  684. canRxMsgQueueData.id = canRxMsg_Buff.id;
  685. canRxMsgQueueData.length = canRxMsg_Buff.length;
  686. memcpy(canRxMsgQueueData.data, canRxMsg_Buff.sdu, canRxMsgQueueData.length);
  687. switch(Mailbox->Hoh)
  688. {
  689. case 0:
  690. xQueueSend(CanRecvQueueHandle0, &canRxMsgQueueData, 0);
  691. break;
  692. case 1:
  693. xQueueSend(CanRecvQueueHandle1, &canRxMsgQueueData, 0);
  694. break;
  695. case 2:
  696. xQueueSend(CanRecvQueueHandle2, &canRxMsgQueueData, 0);
  697. break;
  698. }
  699. }
  700. void CanIf_CurrentIcomConfiguration(uint8 ControllerId, IcomConfigIdType ConfigurationId, IcomSwitch_ErrorType Error)
  701. {
  702. (void)ControllerId;
  703. (void)ConfigurationId;
  704. (void)Error;
  705. }
  706. void Notification_0(void)
  707. {
  708. ADC_Converter(ResultBuffer, ConvertedBuffer);
  709. memcpy(BattTempR, &ConvertedBuffer[3], 4 * sizeof(uint32));
  710. }
  711. void Notification_1(void)
  712. {
  713. VarNotification_1++;
  714. }
  715. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR)
  716. {
  717. Adc_ValueGroupType REFH, REFL;
  718. REFH = Buffer[0];
  719. REFL = Buffer[2];
  720. for (int i = 3; i < NUM_RESULTS; i++)
  721. {
  722. if (Buffer[i] >= REFH)
  723. {
  724. ConvertedValueR[i] = 40930000;
  725. }
  726. else if (Buffer[i] <= REFL)
  727. {
  728. ConvertedValueR[i] = 0x00;
  729. }
  730. else
  731. {
  732. ConvertedValueR[i] = (TP_Value_Type)((float)(10000 * (Buffer[i] - REFL) / (float)(REFH - REFL)) / (1 - (float)((Buffer[i] - REFL) / (float)(REFH - REFL))));
  733. }
  734. }
  735. return 0;
  736. }
  737. Std_ReturnType ADC_ReadValue()
  738. {
  739. Std_ReturnType ret = E_NOT_OK;
  740. for (uint8 i = 0; i < NUM_RESULTS; i++)
  741. {
  742. ResultBuffer[i] = 0xFFFF;
  743. ConvertedBuffer[i] = 0x00;
  744. }
  745. Adc_SetupResultBuffer(AdcGroupSoftwareOneShot, ResultBuffer);
  746. Adc_EnableGroupNotification(AdcGroupSoftwareOneShot);
  747. VarNotification_0 = 0;
  748. Adc_StartGroupConversion(AdcGroupSoftwareOneShot);
  749. return ret;
  750. }
  751. /*EEP*/
  752. static Std_ReturnType TestEep_FlexNvmProgramPartCmd(
  753. VAR(TestEep_CsecKeySize, AUTOMATIC) eepKeysize,
  754. VAR(TestEep_SfeType, AUTOMATIC) eepSecurityFlagExtension,
  755. VAR(TestEep_LoadFlexRamType, AUTOMATIC) eepLoadFlexRamAtReset,
  756. VAR(TestEep_Eeprom_FlexRamPartitionType, AUTOMATIC) eepFlexRamPartition,
  757. VAR(TestEep_Eeprom_FlexNvmPartitionType, AUTOMATIC) eepFlexNvmPartition)
  758. {
  759. Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
  760. uint32 u32FlexNvmPartSize = 0;
  761. uint32 u32RegSimFcfg1 = 0UL;
  762. u32RegSimFcfg1 = IP_SIM->FCFG1;
  763. /*get DEPART value */
  764. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  765. /* check that it was not partitioned before */
  766. if (u32FlexNvmPartSize == 0xF)
  767. {
  768. // /* if error flags are set the cmd is not executed */
  769. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8);
  770. //
  771. // /*erase DF 0 sector*/
  772. // u32Addr=(TEST_EEP_DEEPROM_SECTOR_0_ADDR32 - D_EEPROM_BASE_ADDR) + 0x800000UL;
  773. //
  774. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, TEST_EEP_EEPROM_CMD_ERASE_SECTOR);
  775. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)(u32Addr >> 16UL));
  776. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)(u32Addr >> 8UL));
  777. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)(u32Addr >> 0UL));
  778. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32 , TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  779. // while((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  780. // {
  781. // }
  782. //
  783. if (0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  784. {
  785. /* run program partition command */
  786. REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, EEPROM_CMD_PROGRAM_PARTITION);
  787. REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)eepKeysize);
  788. REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)eepSecurityFlagExtension);
  789. REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)eepLoadFlexRamAtReset);
  790. REG_WRITE8(TEST_EEP_EEPROM_FCCOB4_ADDR32, (uint8)eepFlexRamPartition);
  791. REG_WRITE8(TEST_EEP_EEPROM_FCCOB5_ADDR32, (uint8)eepFlexNvmPartition);
  792. REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  793. while ((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  794. {
  795. /* wait for operation to finish */
  796. }
  797. /* check if errors occured */
  798. if (REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  799. {
  800. /* NOK, error flags are set */
  801. u8RetVal = (Std_ReturnType)E_NOT_OK;
  802. }
  803. }
  804. else
  805. {
  806. /* NOK, error flags are set */
  807. u8RetVal = (Std_ReturnType)E_NOT_OK;
  808. }
  809. }
  810. else
  811. {
  812. /* NOK, partitioned already */
  813. u8RetVal = (Std_ReturnType)E_NOT_OK;
  814. }
  815. return u8RetVal;
  816. }
  817. void Eep_DepartParitition(TestEep_Eeprom_FlexNvmPartitionType T_EEP_SIZE)
  818. {
  819. uint32 u32FlexNvmPartSize = 0;
  820. uint32 u32RegSimFcfg1 = 0UL;
  821. u32RegSimFcfg1 = IP_SIM->FCFG1;
  822. /*get DEPART value */
  823. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  824. if (u32FlexNvmPartSize == 0xF) /* We just partition again if curent size different with expected */
  825. {
  826. /* partition for EERAM 64K with NOT loading EERAM at reset in hardware */
  827. TestEep_FlexNvmProgramPartCmd(EEP_FTFC_KEY_SIZE_0_BYTES, EEP_FTFC_VERIFY_ONLY_DISABLED,
  828. EEP_FTFC_LOAD_AT_RESET_ENABLED, EEP_FTFC_EERAM_SIZE_4K, T_EEP_SIZE);
  829. }
  830. }
  831. /* Erase memory by writing erase value */
  832. Std_ReturnType HAL_EEP_Erase(uint32 eepEraseStartAddr, uint32 eepEraseSize)
  833. {
  834. Std_ReturnType retReturnType = E_OK;
  835. MemIf_JobResultType retJobResultType;
  836. retReturnType = Eep_Erase(eepEraseStartAddr, eepEraseSize);
  837. if (E_OK != retReturnType)
  838. {
  839. return E_NOT_OK;
  840. }
  841. while (MEMIF_IDLE != Eep_GetStatus())
  842. {
  843. Eep_MainFunction();
  844. }
  845. retJobResultType = Eep_GetJobResult();
  846. if (MEMIF_JOB_OK != retJobResultType)
  847. {
  848. return E_NOT_OK;
  849. }
  850. return E_OK;
  851. }
  852. /* Write one or more complete eeprom pages to the eeprom device */
  853. Std_ReturnType HAL_EEP_Write(uint32 eepWriteStartAddr, uint8 *pDataNeedtoWrite, uint32 dataSize)
  854. {
  855. Std_ReturnType retReturnType = E_OK;
  856. MemIf_JobResultType retJobResultType;
  857. /*Erase the EEP before write*/
  858. retReturnType = HAL_EEP_Erase(eepWriteStartAddr, dataSize);
  859. if (E_OK != retReturnType)
  860. {
  861. return E_NOT_OK;
  862. }
  863. retReturnType = Eep_Write(eepWriteStartAddr, pDataNeedtoWrite, dataSize);
  864. if (E_OK != retReturnType)
  865. {
  866. return E_NOT_OK;
  867. }
  868. while (MEMIF_IDLE != Eep_GetStatus())
  869. {
  870. Eep_MainFunction();
  871. }
  872. retJobResultType = Eep_GetJobResult();
  873. if (MEMIF_JOB_OK != retJobResultType)
  874. {
  875. return E_NOT_OK;
  876. }
  877. return E_OK;
  878. }
  879. /* Reads from eeprom memory */
  880. Std_ReturnType HAL_EEP_Read(uint32 eepReadStartAddr, uint8 *pDataBuffer, uint32 dataSize)
  881. {
  882. Std_ReturnType retReturnType = E_OK;
  883. MemIf_JobResultType retJobResultType;
  884. retReturnType = Eep_Read(eepReadStartAddr, pDataBuffer, dataSize);
  885. if (E_OK != retReturnType)
  886. {
  887. return E_NOT_OK;
  888. }
  889. while (MEMIF_IDLE != Eep_GetStatus())
  890. {
  891. Eep_MainFunction();
  892. }
  893. retJobResultType = Eep_GetJobResult();
  894. if (MEMIF_JOB_OK != retJobResultType)
  895. {
  896. return E_NOT_OK;
  897. }
  898. return E_OK;
  899. }
  900. /* Compares a eeprom memory area with an application data buffer */
  901. Std_ReturnType HAL_EEP_Compare(uint32 eepCompareStartAddr, uint8 *pDataNeedtoCompare, uint32 dataSize)
  902. {
  903. Std_ReturnType retReturnType = E_OK;
  904. MemIf_JobResultType retJobResultType;
  905. retReturnType = Eep_Compare(eepCompareStartAddr, pDataNeedtoCompare, dataSize);
  906. if (E_OK != retReturnType)
  907. {
  908. return E_NOT_OK;
  909. }
  910. while (MEMIF_IDLE != Eep_GetStatus())
  911. {
  912. Eep_MainFunction();
  913. }
  914. retJobResultType = Eep_GetJobResult();
  915. if (MEMIF_JOB_OK != retJobResultType)
  916. {
  917. return E_NOT_OK;
  918. }
  919. return E_OK;
  920. }
  921. /* @brief VECTKEY value so that AIRCR register write is not ignored. */
  922. #define FEATURE_SCB_VECTKEY (0x05FAU)
  923. void SystemSoftwareReset(void)
  924. {
  925. uint32_t regValue;
  926. /* Read Application Interrupt and Reset Control Register */
  927. regValue = S32_SCB->AIRCR;
  928. /* Clear register key */
  929. regValue &= ~( S32_SCB_AIRCR_VECTKEY_MASK);
  930. /* Configure System reset request bit and Register Key */
  931. regValue |= S32_SCB_AIRCR_VECTKEY(FEATURE_SCB_VECTKEY);
  932. regValue |= S32_SCB_AIRCR_SYSRESETREQ(0x1u);
  933. /* Write computed register value */
  934. S32_SCB->AIRCR = regValue;
  935. }
  936. void SystemPrepareForSleep(void)
  937. {
  938. for(int pinIndex = 0; pinIndex <PortConfigSet_PortContainer_GPIO_PTB4_GPIO_OUT_MCU_RS485_EN; pinIndex++)
  939. {
  940. if(pinIndex == PortConfigSet_PortContainer_CAN_PTA12_CAN1_RX_MCU_CAN1_RX /*|| pinIndex == PortConfigSet_PortContainer_INT_PTB0_LPTMR0_ATL3_MCU_CC1_INT || pinIndex == PortConfigSet_PortContainer_INT_PTE11_LPTMR0_ALT1_MCU_3D_INT1 || pinIndex == PortConfigSet_PortContainer_INT_PTD5_LPTMR0_ATL2_MCU_3D_INT2*/)
  941. {
  942. continue;
  943. }
  944. else
  945. {
  946. Port_SetAsUnusedPin(pinIndex);
  947. }
  948. }
  949. Port_SetPinMode(PortConfigSet_PortContainer_CAN_PTA12_CAN1_RX_MCU_CAN1_RX,PORT_GPIO_MODE);
  950. #if (ICU_PRECOMPILE_SUPPORT == STD_ON)
  951. Icu_Init(NULL_PTR);
  952. #elif (ICU_PRECOMPILE_SUPPORT == STD_OFF)
  953. Icu_Init(&Icu_Config_VS_0);
  954. #endif
  955. Mcu_SetMode(McuModeSettingConf_VLPS);
  956. }
  957. void SystemPeripheralDeinit(void)
  958. {
  959. WdgDeInit();
  960. Dio_WriteChannel(DioConf_DioChannel_PTA7_GPIO_OUT_MCU_4G_PWRKEY, STD_OFF);
  961. vTaskDelay(pdMS_TO_TICKS(3000));
  962. Dio_WriteChannel(DioConf_DioChannel_PTA6_GPIO_OUT_MCU_4G_POW_EN, STD_OFF);
  963. Dio_WriteChannel(DioConf_DioChannel_PTD1_GPIO_OUT_MCU_GPS_POW_EN, STD_OFF);//GPS ShutDown
  964. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_ON);
  965. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_ON);
  966. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_ON);
  967. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_ON);
  968. Dio_WriteChannel(DioConf_DioChannel_PTE9_GPIO_OUT_MCU_LED5, STD_ON);
  969. Uart_Deinit();
  970. Can_SetControllerMode(CanController_0, CAN_CS_STOPPED);
  971. Can_SetControllerMode(CanController_1, CAN_CS_STOPPED);
  972. // Can_SetControllerMode(CanController_2, CAN_CS_STOPPED);
  973. Can_DeInit();
  974. Adc_DeInit();
  975. Gpt_DisableNotification(GptConf_GptChannelConfiguration_GptChannelConfiguration_0);
  976. Gpt_DeInit();
  977. Spi_DeInit();
  978. Mcl_DeInit();
  979. // systemInitFlag = false;
  980. }
  981. void coreInit(void)
  982. {
  983. /* Initialize the Mcu driver */
  984. #if (MCU_PRECOMPILE_SUPPORT == STD_ON)
  985. Mcu_Init(NULL_PTR);
  986. #elif (MCU_PRECOMPILE_SUPPORT == STD_OFF)
  987. Mcu_Init(&Mcu_Config_VS_0);
  988. #endif /* (MCU_PRECOMPILE_SUPPORT == STD_ON) */
  989. Mcu_InitClock(McuClockSettingConfig_0);
  990. /* Wait until PLL is locked */
  991. while (MCU_PLL_LOCKED != Mcu_GetPllStatus())
  992. {
  993. /* Busy wait until the System PLL is locked */
  994. }
  995. Mcu_DistributePllClock();
  996. OsIf_Init(NULL_PTR);
  997. Platform_Init(NULL_PTR);
  998. }
  999. void SystemModulesInit(void)
  1000. {
  1001. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1002. /* Initialize Mcl module */
  1003. Mcl_Init(NULL_PTR);
  1004. SEGGER_RTT_Init();
  1005. /* Initializes an UART driver*/
  1006. #if (UART_PRECOMPILE_SUPPORT == STD_ON)
  1007. Uart_Init(NULL_PTR);
  1008. #elif (UART_PRECOMPILE_SUPPORT == STD_OFF)
  1009. Uart_Init(&Uart_xConfig_VS_0);
  1010. #endif
  1011. IP_LPUART0->CTRL |= LPUART_CTRL_ILT(1);
  1012. IP_LPUART1->CTRL |= LPUART_CTRL_ILT(1);
  1013. IP_LPUART2->CTRL |= LPUART_CTRL_ILT(1);
  1014. IP_LPUART0->CTRL |= LPUART_CTRL_IDLECFG(5);
  1015. IP_LPUART1->CTRL |= LPUART_CTRL_IDLECFG(3);
  1016. IP_LPUART2->CTRL |= LPUART_CTRL_IDLECFG(3);
  1017. #if 1 /* Initialize Platform driver */
  1018. #if (CAN_PRECOMPILE_SUPPORT == STD_ON)
  1019. Can_Init(NULL_PTR);
  1020. #elif (CAN_PRECOMPILE_SUPPORT == STD_OFF)
  1021. Can_Init(&Can_Config_VS_0);
  1022. #endif
  1023. Can_SetControllerMode(CanController_0, CAN_CS_STARTED);
  1024. Can_SetControllerMode(CanController_1, CAN_CS_STARTED);
  1025. // Can_SetControllerMode(CanController_2, CAN_CS_STARTED);
  1026. #endif
  1027. #if (ADC_PRECOMPILE_SUPPORT == STD_ON)
  1028. Adc_Init(NULL_PTR);
  1029. #else
  1030. Adc_Init(&Adc_Config_VS_0);
  1031. #endif /* ADC_PRECOMPILE_SUPPORT == STD_ON */
  1032. /* Partition only if it was not partitioned before for EERAM with code 0x4 */
  1033. // Eep_DepartParitition(T_EEEPROM_SIZE);
  1034. /* Initialize Eep driver */
  1035. #if defined (EEP_PRECOMPILE_SUPPORT)
  1036. Eep_Init(NULL_PTR);
  1037. #else
  1038. Eep_Init(&Eep_Config_VS_0);
  1039. #endif
  1040. //Init Flash Driver
  1041. #if defined (FLS_PRECOMPILE_SUPPORT)
  1042. Fls_Init(NULL_PTR);
  1043. #else
  1044. Fls_Init(&Fls_Config_VS_0);
  1045. while(MEMIF_IDLE == Fls_GetStatus())
  1046. {
  1047. ;
  1048. }
  1049. #endif
  1050. Spi_Init(NULL_PTR);
  1051. /* Initialize the Gpt driver */
  1052. Gpt_Init(&Gpt_Config_VS_0);
  1053. /* Enable the Gpt notification to periodically service the Wdg */
  1054. Gpt_EnableNotification(GptConf_GptChannelConfiguration_GptChannelConfiguration_0);
  1055. Icu_DeInit();
  1056. WdgInit();
  1057. IsFeedWdg = true;
  1058. }