hal_adapter.h 10 KB

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  1. /*
  2. * @Author : ChenJie
  3. * @Date : 2022-01-23 13:52:10
  4. * @Version : V3.0
  5. * @LastEditors : ChenJie
  6. * @LastEditTime : 2022-05-17 16:22:16
  7. * @Description : file content
  8. * @FilePath : \S32K146_4G\src\hal_adapter.h
  9. */
  10. /*
  11. * hal_adapter.h
  12. *中间层函数调用库
  13. * Created on: 2022年1月18日
  14. * Author: QiXiang_CHENJIE
  15. */
  16. #ifndef HAL_ADAPTER_H_
  17. #define HAL_ADAPTER_H_
  18. #include "Mcal.h"
  19. #include "CAN.h"
  20. #include "SchM_Can.h"
  21. #include "Mcu.h"
  22. #include "Mcl.h"
  23. #include "Port.h"
  24. #include "Dio.h"
  25. #include "Uart.h"
  26. #include "Platform.h"
  27. #include "Lpuart_Uart_Ip_Irq.h"
  28. #include "Flexio_Uart_Ip_Irq.h"
  29. #include <string.h>
  30. #include <stdlib.h>
  31. #include "Dma_Ip.h"
  32. #include "Dma_Ip_Irq.h"
  33. #include "Lpuart_Uart_Ip.h"
  34. #include "FreeRTOS.h"
  35. #include "timers.h"
  36. #include "task.h"
  37. #include "semphr.h"
  38. #include "Adc.h"
  39. #include "Eep.h"
  40. #include "Fls.h"
  41. #include "SchM_Fls.h"
  42. #include "SL_Sc7a20_Driver.h"
  43. #include "SEGGER_RTT_Conf.h"
  44. #include "SEGGER_RTT.h"
  45. #include "hal_Wdg.h"
  46. #include "rtwtypes.h"
  47. /*适应性定义*/
  48. typedef unsigned char UINT8;
  49. typedef unsigned short UINT16;
  50. typedef unsigned long UINT32;
  51. typedef unsigned char BOOL;
  52. typedef signed char INT8;
  53. typedef signed short INT16;
  54. typedef signed long INT32;
  55. #define CAN0 0
  56. #define CAN1 1
  57. #define UART_LPUART0 0
  58. #define UART_LPUART1 1
  59. #define UART_LPUART2 2
  60. #define FLEXIO_RX 3
  61. #define FLEXIO_TX 4
  62. #define main_TASK_PRIORITY (tskIDLE_PRIORITY + 7)
  63. #define MSG_LEN 50U
  64. #define TJA1153_START_ID (uint32_t)(0x555u)
  65. #define TJA1153_CONFIG_ID (uint32_t)(0x18DA00F1u)
  66. #define NUM_RESULTS ADC_CFGSET_VS_0_GROUP_0_CHANNELS
  67. #define BUFFER_SIZE 1024
  68. #define DMA_SIZE 128
  69. void Uart_Hal_RecvTask(void *pvParameters);
  70. void Uart_Hal_SendTask(void *pvParameters);
  71. typedef struct
  72. {
  73. uint8_t *source;
  74. uint32_t br;
  75. uint32_t bw;
  76. uint32_t btoRead;
  77. uint32_t length;
  78. } ringbuffer_t;
  79. typedef struct
  80. {
  81. uint16 DataLen;
  82. uint8 *dataPtr;
  83. uint32 dataAddr;
  84. } UartMsg_t;
  85. typedef struct
  86. {
  87. uint8 Channel;
  88. Lpuart_Uart_Ip_EventType event;
  89. uint16 value;
  90. } UartHalMsg_t;
  91. typedef enum
  92. {
  93. UartStartRecv = 0,
  94. UartAbortRecv,
  95. UartRecvOnGoing,
  96. UartRecvComplete,
  97. UartStartSend,
  98. UartAbortSend,
  99. UartSendOnGoing,
  100. UartSendComplete,
  101. UartNoDataSend,
  102. };
  103. typedef enum
  104. {
  105. SystemTPChannel = 0,
  106. SlowChargeTPChannel,
  107. QuickChargeTPChannel,
  108. CC1TPChannel,
  109. ChannelCounter = 4,
  110. } ADC_TP_Channel_Type;
  111. typedef uint32 TP_Value_Type;
  112. /*CAN*/
  113. typedef enum
  114. {
  115. CAN_STANDARD_ID_TYPE = 0x00, /**< * -00b CAN message with Standard CAN ID */
  116. CANFD_STANDARD_ID_TYPE = 0x01, /**< * -01b CAN FD frame with Standard CAN ID */
  117. CAN_EXTENDED_ID_TYPE = 0x02, /**< * -10b CAN message with Extended CAN ID */
  118. CANFD_EXTENDED_ID_TYPE = 0x03, /**< * -11b CAN FD frame with Extended CAN ID */
  119. } CAN_IdFrameType;
  120. typedef struct
  121. {
  122. Can_IdType id;
  123. CAN_IdFrameType idFrame;
  124. uint8 length; /**< @brief DLC = Data Length Code (part of L-PDU that describes
  125. the SDU length). */
  126. uint8 *sdu; /**< @brief CAN L-SDU = Link Layer Service Data
  127. Unit. Data that is transported inside
  128. the L-PDU. */
  129. } Can_Msg_Type;
  130. typedef struct
  131. {
  132. Can_IdType id;
  133. uint8 length;
  134. uint8 data[8];
  135. } Can_Msg_Type_Data;
  136. /*EEP*/
  137. typedef enum
  138. {
  139. EEP_FTFC_KEY_SIZE_0_BYTES = 0x0, /**< @brief control code for key size 0 bytes, used for the partitioning command */
  140. EEP_FTFC_KEY_SIZE_128_BYTES = 0x1, /**< @brief control code for key size 128 bytes, used for the partitioning command */
  141. EEP_FTFC_KEY_SIZE_256_BYTES = 0x2, /**< @brief control code for key size 256 bytes, used for the partitioning command */
  142. EEP_FTFC_KEY_SIZE_512_BYTES = 0x3 /**< @brief control code for key size 512 bytes, used for the partitioning command */
  143. } TestEep_CsecKeySize;
  144. /**
  145. @brief FlexRamPartition Type used for the partitioning command
  146. */
  147. typedef enum
  148. {
  149. EEP_FTFC_EERAM_SIZE_0K = 0xF, /**< @brief control code for flexram partitioned as sram, used for the partitioning command */
  150. EEP_FTFC_EERAM_SIZE_4K = 0x2, /**< @brief control code for flexram partitioned as eeram, used for the partitioning command */
  151. EEP_FTFC_EERAM_SIZE_2K = 0x3 /**< @brief control code for flexram partitioned as eeram, used for the partitioning command */
  152. } TestEep_Eeprom_FlexRamPartitionType;
  153. /**
  154. @brief FlexNvmPartition Type used for the partitioning command
  155. */
  156. typedef enum
  157. {
  158. EEP_FTFC_EEEPROM_SIZE_0K_V1 = 0x0, /**< @brief control code to partition EEPROM backup size as 0K, used for the partitioning command */
  159. EEP_FTFC_EEEPROM_SIZE_0K_V2 = 0xC, /**< @brief control code to partition EEPROM backup size as 0K, used for the partitioning command */
  160. EEP_FTFC_EEEPROM_SIZE_0K_V3 = 0x0F, /**< @brief control code to partition EEPROM backup size as 0K, used for the partitioning command */
  161. EEP_FTFC_EEEPROM_SIZE_32K_V1 = 0x3, /**< @brief control code to partition EEPROM backup size as 32K, used for the partitioning command */
  162. EEP_FTFC_EEEPROM_SIZE_32K_V2 = 0xB, /**< @brief control code to partition EEPROM backup size as 32K, used for the partitioning command */
  163. EEP_FTFC_EEEPROM_SIZE_48K_V1 = 0xA, /**< @brief control code to partition EEPROM backup size as 48K, used for the partitioning command */
  164. EEP_FTFC_EEEPROM_SIZE_64K_V1 = 0x8, /**< @brief control code to partition EEPROM backup size as 64K, used for the partitioning command */
  165. EEP_FTFC_EEEPROM_SIZE_64K_V2 = 0x4, /**< @brief control code to partition EEPROM backup size as 64K, used for the partitioning command */
  166. EEP_FTFC_EEEPROM_SIZE_24K_V2 = 0x9 /**< @brief control code to partition EEPROM backup size as 24K, used for the partitioning command */
  167. } TestEep_Eeprom_FlexNvmPartitionType;
  168. /**
  169. @brief Sfe Type used for the partitioning command
  170. */
  171. typedef enum
  172. {
  173. EEP_FTFC_VERIFY_ONLY_DISABLED = 0x0, /**< @brief control code for sfe verify only disabled, used for the partitioning command */
  174. EEP_FTFC_VERIFY_ONLY_ENABLED = 0x1 /**< @brief control code for sfe verify only enabled, used for the partitioning command */
  175. } TestEep_SfeType;
  176. /**
  177. @brief LoadFlexRam at reset Type used for the partitioning command
  178. */
  179. typedef enum
  180. {
  181. EEP_FTFC_LOAD_AT_RESET_ENABLED = 0x0, /**< @brief control code for loading flexram at reset, used for the partitioning command */
  182. EEP_FTFC_LOAD_AT_RESET_DISABLED = 0x1 /**< @brief control code for not loading flexram at reset, used for the partitioning command */
  183. } TestEep_LoadFlexRamType;
  184. #define EEP_ERASE_START_ADD (0U)
  185. #define EEP_WRTESTPATT_SIZE (33U)
  186. #define EEP_RDTESTPATT_SIZE (33U)
  187. #define REG_WRITE8(address, value) (*((volatile uint8 *)(address)) = (value))
  188. #define REG_BIT_GET8(address, mask) ((*(volatile uint8 *)(address)) & (mask))
  189. #define T_EEEPROM_SIZE EEP_FTFC_EEEPROM_SIZE_32K_V2
  190. #define TEST_EEP_EEPROM_FSTAT_ADDR32 ((uint32)(IP_FTFC_BASE + (uint32)0x00UL)) /**< @brief Eeprom Status Register (FTFE_FSTAT) */
  191. #define TEST_EEP_EEPROM_FCCOB3_ADDR32 ((uint32)(IP_FTFC_BASE + (uint32)0x04UL)) /**< @brief Eeprom Common Command Object Registers(FTFE_FCCOB3) */
  192. #define TEST_EEP_EEPROM_FCCOB2_ADDR32 ((uint32)(IP_FTFC_BASE + (uint32)0x05UL)) /**< @brief Eeprom Common Command Object Registers(FTFE_FCCOB2) */
  193. #define TEST_EEP_EEPROM_FCCOB1_ADDR32 ((uint32)(IP_FTFC_BASE + (uint32)0x06UL)) /**< @brief Eeprom Common Command Object Registers(FTFE_FCCOB1) */
  194. #define TEST_EEP_EEPROM_FCCOB0_ADDR32 ((uint32)(IP_FTFC_BASE + (uint32)0x07UL)) /**< @brief Eeprom Common Command Object Registers(FTFE_FCCOB0) */
  195. #define TEST_EEP_EEPROM_FCCOB7_ADDR32 ((uint32)(IP_FTFC_BASE + (uint32)0x08UL)) /**< @brief Eeprom Common Command Object Registers(FTFE_FCCOB7) */
  196. #define TEST_EEP_EEPROM_FCCOB6_ADDR32 ((uint32)(IP_FTFC_BASE + (uint32)0x09UL)) /**< @brief Eeprom Common Command Object Registers(FTFE_FCCOB6) */
  197. #define TEST_EEP_EEPROM_FCCOB5_ADDR32 ((uint32)(IP_FTFC_BASE + (uint32)0x0AUL)) /**< @brief Eeprom Common Command Object Registers(FTFE_FCCOB5) */
  198. #define TEST_EEP_EEPROM_FCCOB4_ADDR32 ((uint32)(IP_FTFC_BASE + (uint32)0x0BUL)) /**< @brief Eeprom Common Command Object Registers(FTFE_FCCOB4) */
  199. #define TEST_EEP_EEPROM_FSTAT_CCIF_U8 (0x0080U)
  200. #define TEST_EEP_EEPROM_FSTAT_ACCERR_U8 (0x0020U)
  201. #define TEST_EEP_EEPROM_FSTAT_FPVIOL_U8 (0x0010U)
  202. /* Start address for DFLASH sector 0 */
  203. #define TEST_EEP_DEEPROM_SECTOR_0_ADDR32 0x10000000
  204. #define D_EEPROM_BASE_ADDR (0x10000000UL)
  205. #define TEST_EEP_EEPROM_CMD_ERASE_SECTOR (0x09UL)
  206. #define EEPROM_CMD_PROGRAM_PARTITION (0x80UL)
  207. extern Std_ReturnType CanIf_SendMessage(uint8 ControllerId, Can_Msg_Type CanMsg);
  208. void Eep_DepartParitition(TestEep_Eeprom_FlexNvmPartitionType T_EEP_SIZE);
  209. Std_ReturnType HAL_EEP_Erase(uint32 eepEraseStartAddr, uint32 eepEraseSize);
  210. Std_ReturnType HAL_EEP_Read(uint32 eepReadStartAddr, uint8 *pDataBuffer, uint32 dataSize);
  211. Std_ReturnType HAL_EEP_Write(uint32 eepWriteStartAddr, uint8 *pDataNeedtoWrite, uint32 dataSize);
  212. Std_ReturnType HAL_EEP_Compare(uint32 eepCompareStartAddr, uint8 *pDataNeedtoCompare, uint32 dataSize);
  213. Std_ReturnType ADC_ReadValue(void);
  214. sint8 AtcmdDelayRecvFunc(uint8 recvChannel, char *ResultStrPtr, uint16 delayTime);
  215. Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, uint8 *txBuffer, uint16 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout);
  216. Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout);
  217. Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout);
  218. Std_ReturnType Tcp_Receive_Data(uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout);
  219. Std_ReturnType UART_Reset(uint8 recvChannel);
  220. void UART_Callback(uint32 hwInstance, Lpuart_Uart_Ip_EventType event);
  221. void UartInit(void);
  222. void SystemSoftwareReset(void);
  223. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len);
  224. void clear_ringBuffer(ringbuffer_t *ringBuf);
  225. //uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  226. //uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  227. void coreInit(void);
  228. void SystemModulesInit(void);
  229. void Icu_DeInit(void);
  230. void SystemDeinit(void);
  231. void MCUSleep(void);
  232. void MCUEnterSleep(void);
  233. void displayResetReasonWithLED(void);
  234. void debugInit(void);
  235. #endif /* HAL_ADAPTER_H_ */