hal_adapter.c 36 KB

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  1. /*
  2. * hal_adapter.c
  3. *中间层函数调用库
  4. * Created on: 2022年1月18日
  5. * Author: QiXiang_CHENJIE
  6. */
  7. #include "hal_adapter.h"
  8. #include "AppGlobalVar.h"
  9. #include "stdio.h"
  10. #include "stdarg.h"
  11. /********************************/
  12. #include "Icu.h"
  13. #include "Gpt.h"
  14. uint8_t __attribute__((section(".non_cacheable_data"))) RX_Buffer[3][BUFFER_SIZE];
  15. uint32_t bufferIdx[3] = {0};
  16. volatile uint32 VarNotification_0 = 0;
  17. volatile uint32 VarNotification_1 = 0;
  18. TP_Value_Type ConvertedBuffer[NUM_RESULTS];
  19. Adc_ValueGroupType ResultBuffer[NUM_RESULTS];
  20. volatile Uart_StatusType Uart_TransmitStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  21. QueueHandle_t UartRecvQueue[3];
  22. QueueHandle_t UartSendQueue[3];
  23. QueueHandle_t UartHalQueueHandle;
  24. Std_ReturnType UartStartRecvFunc(uint8 channel);
  25. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR);
  26. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len);
  27. void clear_ringBuffer(ringbuffer_t *ringBuf);
  28. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  29. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  30. uint8 ringBufferforUart[3][BUFFER_SIZE];
  31. ringbuffer_t uartRingBuffer[3];
  32. sint8 AtcmdDelayRecvFunc(uint8 recvChannel,char *ResultStrPtr,uint16 delayTime)
  33. {
  34. sint8 outValue = -1;
  35. uint8 delayCnt = 0;
  36. uint8 UartData[256];
  37. uint16 ReadLen = 0;
  38. char *retptr = NULL;
  39. while (delayCnt<(delayTime/1000)&&outValue!=0)
  40. {
  41. UART_Receive_Data(recvChannel,UartData, &ReadLen,1000);
  42. if(ReadLen>0)
  43. {
  44. retptr = (char *)strstr((char *)UartData, ResultStrPtr);
  45. if (retptr)
  46. {
  47. outValue = 0;
  48. break;
  49. }
  50. }
  51. else
  52. {
  53. delayCnt++;
  54. }
  55. }
  56. return outValue;
  57. }
  58. #if 0
  59. uint16 myPrintf(const char *fmt, ...)
  60. {
  61. int n;
  62. uint8 databuffer[512]={0};
  63. va_list args;
  64. va_start(args, fmt);
  65. n = vsprintf((char *)databuffer, fmt, args);
  66. va_end(args);
  67. if( (printfRingBuffer.bw + n) <= printfRingBuffer.length )
  68. {
  69. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  70. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  71. printfRingBuffer.bw = printfRingBuffer.bw + n;
  72. }
  73. else
  74. {
  75. printfRingBuffer.bw = 0;
  76. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  77. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  78. }
  79. return n;
  80. }
  81. #endif
  82. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len)
  83. {
  84. ringBuf->br = 0;
  85. ringBuf->bw = 0;
  86. ringBuf->btoRead = 0;
  87. ringBuf->source = buf;
  88. ringBuf->length = buf_len;
  89. }
  90. void clear_ringBuffer(ringbuffer_t *ringBuf)
  91. {
  92. ringBuf->br = 0;
  93. ringBuf->bw = 0;
  94. ringBuf->btoRead = 0;
  95. }
  96. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  97. {
  98. uint32_t len = 0;
  99. volatile uint32_t ringBuf_bw = ringBuf->bw;
  100. uint32_t ringBuf_len = ringBuf->length;
  101. uint8_t *ringBuf_source = ringBuf->source;
  102. if( (ringBuf_bw + size) > ringBuf_len )
  103. {
  104. ringBuf_bw = 0;
  105. }
  106. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  107. ringBuf->bw = (ringBuf_bw + size) % ringBuf_len;
  108. ringBuf->btoRead += size;
  109. /*
  110. if(ringBuf->br!=0)
  111. {
  112. memcpy(ringBuf_source, buffer, size);
  113. ringBuf->br = 0;
  114. }
  115. */
  116. /*
  117. if( (ringBuf_bw + size) <= ringBuf_len )
  118. {
  119. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  120. }
  121. else
  122. {
  123. len = ringBuf_len - ringBuf_bw;
  124. memcpy(ringBuf_source + ringBuf_bw, buffer, len);
  125. memcpy(ringBuf_source, buffer + ringBuf_bw, size - len);
  126. }
  127. ringBuf->bw = (ringBuf->bw + size) % ringBuf_len;
  128. ringBuf->btoRead += size;
  129. */
  130. return size;
  131. }
  132. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  133. {
  134. uint32_t len = 0;
  135. volatile uint32_t ringBuf_br = ringBuf->br;
  136. uint32_t ringBuf_len = ringBuf->length;
  137. uint8_t *ringBuf_source = ringBuf->source;
  138. memcpy(buffer, ringBuf_source, size);
  139. ringBuf->br = size;
  140. // if( (ringBuf_br + size ) <= ringBuf_len )
  141. // {
  142. // memcpy(buffer, ringBuf_source + ringBuf_br, size);
  143. // }
  144. // else
  145. // {
  146. // len = ringBuf_len - ringBuf_br;
  147. // memcpy(buffer, ringBuf_source + ringBuf_br, len);
  148. // memcpy(buffer + len, ringBuf_source, size - len);
  149. // }
  150. // ringBuf->br = (ringBuf->br + size) % ringBuf_len;
  151. // ringBuf->btoRead -= size;
  152. return size;
  153. }
  154. Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, uint8 *txBuffer, uint16 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  155. {
  156. UartMsg_t UartRecvMsg;
  157. UartMsg_t UartSendMsg;
  158. BaseType_t Sendret = pdFALSE;
  159. BaseType_t Recvret = pdFALSE;
  160. uint32 retVal = E_NOT_OK;
  161. UartSendMsg.DataLen = sendLength;
  162. UartSendMsg.dataPtr = txBuffer;
  163. *rxlen = 0;
  164. Sendret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,50);
  165. if(Sendret == pdTRUE)
  166. {
  167. Recvret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  168. if(Recvret == pdTRUE)
  169. {
  170. *rxlen = UartRecvMsg.DataLen;
  171. // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
  172. memcpy(rxBuffer,(uint8 *)(UartRecvMsg.dataAddr),UartRecvMsg.DataLen);
  173. retVal = E_OK;
  174. }
  175. else
  176. {
  177. retVal = 3;
  178. }
  179. }
  180. else
  181. {
  182. retVal = 2;
  183. }
  184. return retVal;
  185. }
  186. Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint8 *rxlen, uint32 T_timeout)
  187. {
  188. UartMsg_t UartRecvMsg;
  189. BaseType_t ret = pdFALSE;
  190. uint32 retVal = E_NOT_OK;
  191. *rxlen = 0;
  192. ret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  193. if(ret == pdTRUE)
  194. {
  195. *rxlen = UartRecvMsg.DataLen;
  196. // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
  197. memcpy(rxBuffer,(uint8 *)UartRecvMsg.dataAddr,UartRecvMsg.DataLen);
  198. retVal = E_OK;
  199. }
  200. return retVal;
  201. }
  202. Std_ReturnType UART_Reset(uint8 recvChannel)
  203. {
  204. uint32 retVal = E_NOT_OK;
  205. retVal = xQueueReset(UartRecvQueue[recvChannel]);
  206. return retVal;
  207. }
  208. Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  209. {
  210. UartMsg_t UartSendMsg;
  211. BaseType_t ret = pdFALSE;
  212. uint32 retVal = E_NOT_OK;
  213. UartSendMsg.DataLen = sendLength;
  214. UartSendMsg.dataPtr = txBuffer;
  215. ret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,T_timeout);
  216. if(ret == pdTRUE)
  217. {
  218. retVal = E_OK;
  219. }
  220. return retVal;
  221. }
  222. void UartInit(void)
  223. {
  224. create_ringBuffer(&uartRingBuffer[0],ringBufferforUart[0],sizeof(ringBufferforUart[0]));
  225. create_ringBuffer(&uartRingBuffer[1],ringBufferforUart[1],sizeof(ringBufferforUart[1]));
  226. create_ringBuffer(&uartRingBuffer[2],ringBufferforUart[2],sizeof(ringBufferforUart[2]));
  227. UartRecvQueue[0] = xQueueCreate(6, sizeof(UartMsg_t));
  228. UartRecvQueue[1] = xQueueCreate(6, sizeof(UartMsg_t));
  229. UartRecvQueue[2] = xQueueCreate(6, sizeof(UartMsg_t));
  230. UartSendQueue[0] = xQueueCreate(3, sizeof(UartMsg_t));
  231. UartSendQueue[1] = xQueueCreate(1, sizeof(UartMsg_t));
  232. UartSendQueue[2] = xQueueCreate(1, sizeof(UartMsg_t));
  233. UartHalQueueHandle = xQueueCreate(9, sizeof(UartHalMsg_t));
  234. xTaskCreate(Uart_Hal_RecvTask, (const char *const)"UartRecv", 512, (void *)0, main_TASK_PRIORITY + 5, &Uart_Hal_RecvTask_Handle);
  235. xTaskCreate(Uart_Hal_SendTask, (const char *const)"UartSend", 512, (void *)0, main_TASK_PRIORITY + 4, &Uart_Hal_SendTask_Handle);
  236. }
  237. Std_ReturnType UartStartRecvFunc(uint8 channel)
  238. {
  239. sint8 out = 0;
  240. volatile Std_ReturnType R_Uart_Status=E_NOT_OK;
  241. bufferIdx[channel]=0;
  242. memset(RX_Buffer[channel],0x00,BUFFER_SIZE);
  243. switch(channel)
  244. {
  245. case 0:
  246. IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  247. break;
  248. case 1:
  249. IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  250. break;
  251. case 2:
  252. IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  253. break;
  254. default:
  255. break;
  256. }
  257. Uart_SetBuffer(channel, RX_Buffer[channel], DMA_SIZE, UART_RECEIVE);
  258. R_Uart_Status = Uart_AsyncReceive(channel, RX_Buffer[channel], DMA_SIZE);
  259. if (E_OK != R_Uart_Status)
  260. {
  261. Uart_Abort(channel, UART_RECEIVE);
  262. out = E_NOT_OK;
  263. }
  264. return out;
  265. }
  266. void Uart_Hal_RecvTask(void *pvParameters)
  267. {
  268. UartHalMsg_t UartHalMsgRecv;
  269. UartMsg_t UartRecvMsg;
  270. uint16 recvSize = 0;
  271. BaseType_t ret = pdFALSE;
  272. BaseType_t ret_send = pdFALSE;
  273. uint32 T_bytesRemaining[3] = {0};
  274. uint16 T_timeout[3] = {0};
  275. volatile Uart_StatusType Uart_ReceiveStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  276. uint8 UartIdx = UART_LPUART0;
  277. uint8 UartState[3] = {UartAbortRecv,UartAbortRecv,UartAbortRecv};
  278. while(1)
  279. {
  280. if((T_timeout[UartIdx]>1000) && (Uart_ReceiveStatus[UartIdx] != UART_STATUS_NO_ERROR) )
  281. {
  282. Uart_Abort(UartIdx, UART_RECEIVE);
  283. UartState[UartIdx] = UartAbortRecv;
  284. T_timeout[UartIdx] = 0;
  285. }
  286. else if(Uart_ReceiveStatus[UartIdx] == UART_STATUS_NO_ERROR)
  287. {
  288. UartState[UartIdx] = UartRecvComplete;
  289. }
  290. if((UartState[UartIdx] == UartAbortRecv) || (UartState[UartIdx] == UartRecvComplete))
  291. {
  292. if(E_OK == UartStartRecvFunc(UartIdx))
  293. {
  294. UartState[UartIdx] = UartStartRecv;
  295. }
  296. }
  297. Uart_ReceiveStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_RECEIVE);
  298. T_timeout[UartIdx]++;
  299. UartIdx = (UartIdx + 1) > 2 ? 1 : (UartIdx + 1);
  300. ret = xQueueReceive(UartHalQueueHandle,&UartHalMsgRecv,1);
  301. if(ret==pdTRUE)
  302. {
  303. if(UartHalMsgRecv.event==LPUART_UART_IP_EVENT_RECV_IDLE)
  304. {
  305. if(UartHalMsgRecv.value>0)
  306. {
  307. recvSize = write_ringBuffer(RX_Buffer[UartHalMsgRecv.Channel],UartHalMsgRecv.value,&uartRingBuffer[UartHalMsgRecv.Channel]);
  308. UartRecvMsg.DataLen = UartHalMsgRecv.value;
  309. UartRecvMsg.dataAddr = (uint32)(uartRingBuffer[UartHalMsgRecv.Channel].bw + uartRingBuffer[UartHalMsgRecv.Channel].source - UartHalMsgRecv.value);
  310. ret_send = xQueueSend(UartRecvQueue[UartHalMsgRecv.Channel],&UartRecvMsg,10);
  311. }
  312. T_timeout[UartHalMsgRecv.Channel] = 0;
  313. UartState[UartHalMsgRecv.Channel] = UartRecvComplete;
  314. }
  315. }
  316. }
  317. }
  318. void Uart_Hal_SendTask(void *pvParameters)
  319. {
  320. UartMsg_t UartSendMsg;
  321. BaseType_t ret = pdFALSE;
  322. uint32 T_bytesRemaining[3] = {0};
  323. uint16 T_timeout[3] = {0};
  324. volatile Std_ReturnType T_Uart_Status[3];
  325. uint8 UartIdx = UART_LPUART0;
  326. uint8 UartSendState[3] = {UartNoDataSend,UartNoDataSend,UartNoDataSend};
  327. while(1)
  328. {
  329. ret = xQueueReceive(UartSendQueue[UartIdx],&UartSendMsg,1);
  330. if(ret==pdTRUE)
  331. {
  332. T_Uart_Status[UartIdx] = Uart_AsyncSend(UartIdx, UartSendMsg.dataPtr, UartSendMsg.DataLen);
  333. if (E_OK != T_Uart_Status[UartIdx])
  334. {
  335. Uart_Abort(UartIdx, UART_SEND);
  336. UartSendState[UartIdx] = UartAbortSend;
  337. }
  338. else
  339. {
  340. UartSendState[UartIdx] = UartStartSend;
  341. }
  342. }
  343. /*开始发送后的判定*/
  344. if(UartSendState[UartIdx] == UartStartSend)
  345. {
  346. Uart_TransmitStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_SEND);
  347. T_timeout[UartIdx]++;
  348. }
  349. if(T_timeout[UartIdx]>=1000 || ((Uart_TransmitStatus[UartIdx] != UART_STATUS_OPERATION_ONGOING) && (UartSendState[UartIdx] == UartStartSend)))
  350. {
  351. if(T_timeout[UartIdx]>=1000)
  352. {
  353. Uart_Abort(UartIdx, UART_SEND);
  354. UartSendState[UartIdx] = UartAbortSend;
  355. }
  356. else if(Uart_TransmitStatus[UartIdx] == UART_STATUS_NO_ERROR)
  357. {
  358. UartSendState[UartIdx] = UartSendComplete;
  359. }
  360. T_timeout[UartIdx] = 0;
  361. }
  362. UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
  363. }
  364. }
  365. //
  366. //Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, const uint8 *txBuffer, uint32 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  367. //{
  368. // volatile Std_ReturnType R_Uart_Status;
  369. // volatile Std_ReturnType T_Uart_Status;
  370. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  371. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  372. // uint32 T_bytesRemaining;
  373. // uint32 R_bytesRemaining;
  374. // uint32 timeout = T_timeout;
  375. // uint32 retVal = E_NOT_OK;
  376. // bufferIdx[recvChannel] = 0;
  377. // switch (recvChannel)
  378. // {
  379. // case 0:
  380. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  381. // break;
  382. // case 1:
  383. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  384. // break;
  385. // case 2:
  386. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  387. // break;
  388. // default:
  389. // break;
  390. // }
  391. // if (txBuffer == NULL || rxBuffer == NULL)
  392. // {
  393. // return retVal;
  394. // }
  395. //
  396. // /* Uart_AsyncSend transmit data */
  397. // Uart_SetBuffer(transChannel, txBuffer, sendLength, UART_SEND);
  398. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  399. // if (E_OK != T_Uart_Status)
  400. // {
  401. // Uart_Abort(transChannel, UART_SEND);
  402. // return E_NOT_OK;
  403. // }
  404. // Uart_SetBuffer(recvChannel, &RX_Buffer[recvChannel][0], DMA_SIZE, UART_RECEIVE);
  405. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  406. // if (E_OK != R_Uart_Status)
  407. // {
  408. // Uart_Abort(recvChannel, UART_RECEIVE);
  409. // return E_NOT_OK;
  410. // }
  411. // /* Check for no on-going transmission */
  412. // do
  413. // {
  414. // if (Uart_TransmitStatus != UART_STATUS_NO_ERROR)
  415. // {
  416. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  417. // }
  418. // if (Uart_ReceiveStatus != UART_STATUS_NO_ERROR)
  419. // {
  420. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &R_bytesRemaining, UART_RECEIVE);
  421. // }
  422. // vTaskDelay(pdMS_TO_TICKS(1));
  423. // } while (((UART_STATUS_NO_ERROR != Uart_TransmitStatus || UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < --timeout));
  424. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  425. // {
  426. // Uart_Abort(transChannel, UART_SEND);
  427. // retVal = E_NOT_OK;
  428. // }
  429. // else
  430. // {
  431. // retVal = E_OK;
  432. // }
  433. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  434. // {
  435. // Uart_Abort(recvChannel, UART_RECEIVE);
  436. // *rxlen = bufferIdx[recvChannel];
  437. // retVal = E_NOT_OK;
  438. // }
  439. // else
  440. // {
  441. // *rxlen = bufferIdx[recvChannel];
  442. // retVal = E_OK;
  443. // }
  444. // return retVal;
  445. //}
  446. //
  447. //Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  448. //{
  449. //
  450. // volatile Std_ReturnType T_Uart_Status;
  451. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  452. // uint32 T_bytesRemaining;
  453. // uint32 timeout = T_timeout;
  454. // uint32 retVal = E_NOT_OK;
  455. // if (txBuffer == NULL)
  456. // {
  457. // return retVal;
  458. // }
  459. //
  460. // /* Uart_AsyncSend transmit data */
  461. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  462. // if (E_OK != T_Uart_Status)
  463. // {
  464. // Uart_Abort(transChannel, UART_SEND);
  465. // return E_NOT_OK;
  466. // }
  467. // /* Check for no on-going transmission */
  468. // do
  469. // {
  470. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  471. // vTaskDelay(pdMS_TO_TICKS(1));
  472. // } while ((UART_STATUS_NO_ERROR != Uart_TransmitStatus && 0 < --timeout));
  473. //
  474. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  475. // {
  476. // retVal = E_NOT_OK;
  477. // }
  478. // else
  479. // {
  480. // retVal = E_OK;
  481. // }
  482. // return retVal;
  483. //}
  484. //
  485. //Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint16 *rxlen, sint32 T_timeout)
  486. //{
  487. // volatile Std_ReturnType R_Uart_Status = E_NOT_OK;
  488. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  489. // uint32 T_bytesRemaining = 0;
  490. // uint32 retVal = E_NOT_OK;
  491. // // uint8 Rx_Buffer[MSG_LEN];
  492. // bufferIdx[recvChannel] = 0;
  493. // *rxlen = 0;
  494. // if (rxBuffer == NULL)
  495. // {
  496. // return retVal;
  497. // }
  498. // /* Uart_AsyncReceive transmit data */
  499. // switch (recvChannel)
  500. // {
  501. // case 0:
  502. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  503. // break;
  504. // case 1:
  505. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  506. // break;
  507. // case 2:
  508. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  509. // break;
  510. // default:
  511. // break;
  512. // }
  513. // Uart_SetBuffer(recvChannel, rxBuffer, DMA_SIZE, UART_RECEIVE);
  514. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  515. // if (E_OK != R_Uart_Status)
  516. // {
  517. // Uart_Abort(recvChannel, UART_RECEIVE);
  518. // return E_NOT_OK;
  519. // }
  520. // /* Check for no on-going transmission */
  521. // do
  522. // {
  523. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &T_bytesRemaining, UART_RECEIVE);
  524. // vTaskDelay(pdMS_TO_TICKS(1));
  525. //
  526. // } while ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < T_timeout--);
  527. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  528. // {
  529. // Uart_Abort(recvChannel, UART_RECEIVE);
  530. // *rxlen = bufferIdx[recvChannel];
  531. // retVal = E_NOT_OK;
  532. // }
  533. // else
  534. // {
  535. // *rxlen = bufferIdx[recvChannel];
  536. // retVal = E_OK;
  537. // }
  538. // return retVal;
  539. //}
  540. extern Lpuart_Uart_Ip_StateStructureType *Lpuart_Uart_Ip_apStateStructuresArray[LPUART_UART_IP_NUMBER_OF_INSTANCES];
  541. void UART_Callback(uint32 hwInstance, Lpuart_Uart_Ip_EventType event)
  542. {
  543. // (void)userData;
  544. Lpuart_Uart_Ip_StateStructureType * UartState;
  545. UartState = (Lpuart_Uart_Ip_StateStructureType *)Lpuart_Uart_Ip_apStateStructuresArray[hwInstance];
  546. /* Check the event type */
  547. if (event == LPUART_UART_IP_EVENT_RX_FULL)
  548. {
  549. /* The reception stops when receiving idle is detected or the buffer is full */
  550. if (bufferIdx[hwInstance] <= (BUFFER_SIZE - DMA_SIZE))
  551. {
  552. /* Update the buffer index and the rx buffer */
  553. bufferIdx[hwInstance] += DMA_SIZE;
  554. Uart_SetBuffer(hwInstance, &RX_Buffer[hwInstance][bufferIdx[hwInstance]], DMA_SIZE, UART_RECEIVE);
  555. // Lpuart_Uart_Ip_SetRxBuffer(hwInstance, &RX_Buffer[bufferIdx], DMA_SIZE);
  556. }
  557. }
  558. if (event == LPUART_UART_IP_EVENT_ERROR)
  559. {
  560. // /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  561. // temp = DMA_SIZE - (uint32_t)IP_DMA->TCD->CITER.ELINKNO;
  562. // /*Add the remaining data size to the sum of the received size*/
  563. // bufferIdx[hwInstance] += temp;
  564. /*Abort the receiving after detecting IDLE receiving*/
  565. Lpuart_Uart_Ip_AbortReceivingData(hwInstance);
  566. Lpuart_Uart_Ip_AbortSendingData(hwInstance);
  567. // bufferIdx = 0;
  568. }
  569. if (event == LPUART_UART_IP_EVENT_RECV_IDLE)
  570. {
  571. uint32_t temp;
  572. UartHalMsg_t UartHalMsg;
  573. UartHalMsg.Channel = hwInstance;
  574. UartHalMsg.event = event;
  575. /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  576. temp = DMA_SIZE - (uint32_t)IP_DMA->TCD[hwInstance].CITER.ELINKNO;
  577. /*Add the remaining data size to the sum of the received size*/
  578. bufferIdx[hwInstance] += temp;
  579. /*Abort the receiving after detecting IDLE receiving*/
  580. UartHalMsg.value = bufferIdx[hwInstance];
  581. xQueueSendFromISR(UartHalQueueHandle,&UartHalMsg,pdFALSE);
  582. }
  583. }
  584. /*CAN*/
  585. Can_PduType Can_CreatePduInfo(Can_IdType id, CAN_IdFrameType idFrame, PduIdType swPduHandle, uint8 length, uint8 *sdu)
  586. {
  587. Can_PduType PduInfo;
  588. switch (idFrame)
  589. {
  590. case CAN_STANDARD_ID_TYPE:
  591. id = id & 0x7FF;
  592. break;
  593. case CANFD_STANDARD_ID_TYPE:
  594. id = (id & 0x7FF) | 0x40000000;
  595. break;
  596. case CAN_EXTENDED_ID_TYPE:
  597. id = id | 0x80000000;
  598. break;
  599. case CANFD_EXTENDED_ID_TYPE:
  600. id = id | 0xC0000000;
  601. break;
  602. default:
  603. id = id & 0x7FF;
  604. break;
  605. }
  606. PduInfo.id = id;
  607. PduInfo.swPduHandle = swPduHandle;
  608. PduInfo.length = length;
  609. PduInfo.sdu = sdu;
  610. return PduInfo;
  611. }
  612. Std_ReturnType CanIf_SendMessage(uint8 ControllerId, Can_Msg_Type CanMsg)
  613. {
  614. volatile Can_PduType Can_PduInfo;
  615. volatile Std_ReturnType CAN_Write_Status;
  616. Std_ReturnType retVal = E_NOT_OK;
  617. uint32 u8TimeOut = 100 * 100;
  618. Can_HwHandleType Hth = Can0HardwareObject_TX + (Can_HwHandleType)ControllerId; // controller 0 --> Can0HardwareObject_TX
  619. Can_PduInfo = Can_CreatePduInfo(CanMsg.id, CanMsg.idFrame, 0, CanMsg.length, CanMsg.sdu);
  620. CAN_Write_Status = Can_Write(Hth, &Can_PduInfo);
  621. CanIf_bTxFlag = FALSE;
  622. if (CAN_Write_Status == E_OK)
  623. {
  624. while ((!CanIf_bTxFlag) && (u8TimeOut != 0U))
  625. {
  626. Can_MainFunction_Write();
  627. u8TimeOut--;
  628. }
  629. }
  630. if (CanIf_bTxFlag == TRUE)
  631. {
  632. retVal = E_OK;
  633. }
  634. else
  635. {
  636. retVal = E_NOT_OK;
  637. }
  638. return retVal;
  639. }
  640. Can_Msg_Type Can_GetMsgInfo(Can_IdType id, uint8 length, uint8 *sdu)
  641. {
  642. Can_Msg_Type CanMsgInfo;
  643. CanMsgInfo.idFrame = (CAN_IdFrameType)((id >> 30) & 0x03);
  644. if (CanMsgInfo.idFrame & 0x01)
  645. {
  646. CanMsgInfo.id = id & 0x7FF;
  647. }
  648. else
  649. {
  650. CanMsgInfo.id = id & 0x1FFFFFFF;
  651. }
  652. CanMsgInfo.length = length;
  653. CanMsgInfo.sdu = sdu;
  654. return CanMsgInfo;
  655. }
  656. void CanIf_ControllerBusOff(uint8 ControllerId)
  657. {
  658. (void)ControllerId;
  659. }
  660. void CanIf_ControllerModeIndication(uint8 ControllerId, Can_ControllerStateType ControllerMode)
  661. {
  662. (void)ControllerId;
  663. (void)ControllerMode;
  664. }
  665. void CanIf_TxConfirmation(PduIdType CanTxPduId)
  666. {
  667. CanIf_u8TxConfirmCnt++;
  668. CanIf_bTxFlag = TRUE;
  669. (void)CanTxPduId;
  670. }
  671. void CanIf_RxIndication(const Can_HwType *Mailbox, const PduInfoType *PduInfoPtr)
  672. {
  673. Can_Msg_Type canRxMsg_Buff;
  674. Can_Msg_Type_Data canRxMsgQueueData;
  675. CanIf_bRxFlag = TRUE; // should not be delete
  676. // should put the msg into message queue
  677. canRxMsg_Buff = Can_GetMsgInfo(Mailbox->CanId, PduInfoPtr->SduLength, PduInfoPtr->SduDataPtr);
  678. canRxMsgQueueData.id = canRxMsg_Buff.id;
  679. canRxMsgQueueData.length = canRxMsg_Buff.length;
  680. memcpy(canRxMsgQueueData.data, canRxMsg_Buff.sdu, canRxMsgQueueData.length);
  681. switch(Mailbox->Hoh)
  682. {
  683. case 0:
  684. xQueueSend(CanRecvQueueHandle0, &canRxMsgQueueData, 0);
  685. break;
  686. case 1:
  687. xQueueSend(CanRecvQueueHandle1, &canRxMsgQueueData, 0);
  688. break;
  689. case 2:
  690. xQueueSend(CanRecvQueueHandle2, &canRxMsgQueueData, 0);
  691. break;
  692. }
  693. }
  694. void CanIf_CurrentIcomConfiguration(uint8 ControllerId, IcomConfigIdType ConfigurationId, IcomSwitch_ErrorType Error)
  695. {
  696. (void)ControllerId;
  697. (void)ConfigurationId;
  698. (void)Error;
  699. }
  700. void Notification_0(void)
  701. {
  702. ADC_Converter(ResultBuffer, ConvertedBuffer);
  703. memcpy(BattTempR, &ConvertedBuffer[3], 4 * sizeof(uint32));
  704. }
  705. void Notification_1(void)
  706. {
  707. VarNotification_1++;
  708. }
  709. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR)
  710. {
  711. Adc_ValueGroupType REFH, REFL;
  712. REFH = Buffer[0];
  713. REFL = Buffer[2];
  714. for (int i = 3; i < NUM_RESULTS; i++)
  715. {
  716. if (Buffer[i] >= REFH)
  717. {
  718. ConvertedValueR[i] = 40930000;
  719. }
  720. else if (Buffer[i] <= REFL)
  721. {
  722. ConvertedValueR[i] = 0x00;
  723. }
  724. else
  725. {
  726. ConvertedValueR[i] = (TP_Value_Type)((float)(10000 * (Buffer[i] - REFL) / (float)(REFH - REFL)) / (1 - (float)((Buffer[i] - REFL) / (float)(REFH - REFL))));
  727. }
  728. }
  729. return 0;
  730. }
  731. Std_ReturnType ADC_ReadValue()
  732. {
  733. Std_ReturnType ret = E_NOT_OK;
  734. for (uint8 i = 0; i < NUM_RESULTS; i++)
  735. {
  736. ResultBuffer[i] = 0xFFFF;
  737. ConvertedBuffer[i] = 0x00;
  738. }
  739. Adc_SetupResultBuffer(AdcGroupSoftwareOneShot, ResultBuffer);
  740. Adc_EnableGroupNotification(AdcGroupSoftwareOneShot);
  741. VarNotification_0 = 0;
  742. Adc_StartGroupConversion(AdcGroupSoftwareOneShot);
  743. return ret;
  744. }
  745. /*EEP*/
  746. static Std_ReturnType TestEep_FlexNvmProgramPartCmd(
  747. VAR(TestEep_CsecKeySize, AUTOMATIC) eepKeysize,
  748. VAR(TestEep_SfeType, AUTOMATIC) eepSecurityFlagExtension,
  749. VAR(TestEep_LoadFlexRamType, AUTOMATIC) eepLoadFlexRamAtReset,
  750. VAR(TestEep_Eeprom_FlexRamPartitionType, AUTOMATIC) eepFlexRamPartition,
  751. VAR(TestEep_Eeprom_FlexNvmPartitionType, AUTOMATIC) eepFlexNvmPartition)
  752. {
  753. Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
  754. uint32 u32FlexNvmPartSize = 0;
  755. uint32 u32RegSimFcfg1 = 0UL;
  756. u32RegSimFcfg1 = IP_SIM->FCFG1;
  757. /*get DEPART value */
  758. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  759. /* check that it was not partitioned before */
  760. if (u32FlexNvmPartSize == 0xF)
  761. {
  762. // /* if error flags are set the cmd is not executed */
  763. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8);
  764. //
  765. // /*erase DF 0 sector*/
  766. // u32Addr=(TEST_EEP_DEEPROM_SECTOR_0_ADDR32 - D_EEPROM_BASE_ADDR) + 0x800000UL;
  767. //
  768. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, TEST_EEP_EEPROM_CMD_ERASE_SECTOR);
  769. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)(u32Addr >> 16UL));
  770. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)(u32Addr >> 8UL));
  771. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)(u32Addr >> 0UL));
  772. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32 , TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  773. // while((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  774. // {
  775. // }
  776. //
  777. if (0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  778. {
  779. /* run program partition command */
  780. REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, EEPROM_CMD_PROGRAM_PARTITION);
  781. REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)eepKeysize);
  782. REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)eepSecurityFlagExtension);
  783. REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)eepLoadFlexRamAtReset);
  784. REG_WRITE8(TEST_EEP_EEPROM_FCCOB4_ADDR32, (uint8)eepFlexRamPartition);
  785. REG_WRITE8(TEST_EEP_EEPROM_FCCOB5_ADDR32, (uint8)eepFlexNvmPartition);
  786. REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  787. while ((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  788. {
  789. /* wait for operation to finish */
  790. }
  791. /* check if errors occured */
  792. if (REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  793. {
  794. /* NOK, error flags are set */
  795. u8RetVal = (Std_ReturnType)E_NOT_OK;
  796. }
  797. }
  798. else
  799. {
  800. /* NOK, error flags are set */
  801. u8RetVal = (Std_ReturnType)E_NOT_OK;
  802. }
  803. }
  804. else
  805. {
  806. /* NOK, partitioned already */
  807. u8RetVal = (Std_ReturnType)E_NOT_OK;
  808. }
  809. return u8RetVal;
  810. }
  811. void Eep_DepartParitition(TestEep_Eeprom_FlexNvmPartitionType T_EEP_SIZE)
  812. {
  813. uint32 u32FlexNvmPartSize = 0;
  814. uint32 u32RegSimFcfg1 = 0UL;
  815. u32RegSimFcfg1 = IP_SIM->FCFG1;
  816. /*get DEPART value */
  817. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  818. if (u32FlexNvmPartSize == 0xF) /* We just partition again if curent size different with expected */
  819. {
  820. /* partition for EERAM 64K with NOT loading EERAM at reset in hardware */
  821. TestEep_FlexNvmProgramPartCmd(EEP_FTFC_KEY_SIZE_0_BYTES, EEP_FTFC_VERIFY_ONLY_DISABLED,
  822. EEP_FTFC_LOAD_AT_RESET_ENABLED, EEP_FTFC_EERAM_SIZE_4K, T_EEP_SIZE);
  823. }
  824. }
  825. /* Erase memory by writing erase value */
  826. Std_ReturnType HAL_EEP_Erase(uint32 eepEraseStartAddr, uint32 eepEraseSize)
  827. {
  828. Std_ReturnType retReturnType = E_OK;
  829. MemIf_JobResultType retJobResultType;
  830. retReturnType = Eep_Erase(eepEraseStartAddr, eepEraseSize);
  831. if (E_OK != retReturnType)
  832. {
  833. return E_NOT_OK;
  834. }
  835. while (MEMIF_IDLE != Eep_GetStatus())
  836. {
  837. Eep_MainFunction();
  838. }
  839. retJobResultType = Eep_GetJobResult();
  840. if (MEMIF_JOB_OK != retJobResultType)
  841. {
  842. return E_NOT_OK;
  843. }
  844. return E_OK;
  845. }
  846. /* Write one or more complete eeprom pages to the eeprom device */
  847. Std_ReturnType HAL_EEP_Write(uint32 eepWriteStartAddr, uint8 *pDataNeedtoWrite, uint32 dataSize)
  848. {
  849. Std_ReturnType retReturnType = E_OK;
  850. MemIf_JobResultType retJobResultType;
  851. /*Erase the EEP before write*/
  852. retReturnType = HAL_EEP_Erase(eepWriteStartAddr, dataSize);
  853. if (E_OK != retReturnType)
  854. {
  855. return E_NOT_OK;
  856. }
  857. retReturnType = Eep_Write(eepWriteStartAddr, pDataNeedtoWrite, dataSize);
  858. if (E_OK != retReturnType)
  859. {
  860. return E_NOT_OK;
  861. }
  862. while (MEMIF_IDLE != Eep_GetStatus())
  863. {
  864. Eep_MainFunction();
  865. }
  866. retJobResultType = Eep_GetJobResult();
  867. if (MEMIF_JOB_OK != retJobResultType)
  868. {
  869. return E_NOT_OK;
  870. }
  871. return E_OK;
  872. }
  873. /* Reads from eeprom memory */
  874. Std_ReturnType HAL_EEP_Read(uint32 eepReadStartAddr, uint8 *pDataBuffer, uint32 dataSize)
  875. {
  876. Std_ReturnType retReturnType = E_OK;
  877. MemIf_JobResultType retJobResultType;
  878. retReturnType = Eep_Read(eepReadStartAddr, pDataBuffer, dataSize);
  879. if (E_OK != retReturnType)
  880. {
  881. return E_NOT_OK;
  882. }
  883. while (MEMIF_IDLE != Eep_GetStatus())
  884. {
  885. Eep_MainFunction();
  886. }
  887. retJobResultType = Eep_GetJobResult();
  888. if (MEMIF_JOB_OK != retJobResultType)
  889. {
  890. return E_NOT_OK;
  891. }
  892. return E_OK;
  893. }
  894. /* Compares a eeprom memory area with an application data buffer */
  895. Std_ReturnType HAL_EEP_Compare(uint32 eepCompareStartAddr, uint8 *pDataNeedtoCompare, uint32 dataSize)
  896. {
  897. Std_ReturnType retReturnType = E_OK;
  898. MemIf_JobResultType retJobResultType;
  899. retReturnType = Eep_Compare(eepCompareStartAddr, pDataNeedtoCompare, dataSize);
  900. if (E_OK != retReturnType)
  901. {
  902. return E_NOT_OK;
  903. }
  904. while (MEMIF_IDLE != Eep_GetStatus())
  905. {
  906. Eep_MainFunction();
  907. }
  908. retJobResultType = Eep_GetJobResult();
  909. if (MEMIF_JOB_OK != retJobResultType)
  910. {
  911. return E_NOT_OK;
  912. }
  913. return E_OK;
  914. }
  915. /* @brief VECTKEY value so that AIRCR register write is not ignored. */
  916. #define FEATURE_SCB_VECTKEY (0x05FAU)
  917. void SystemSoftwareReset(void)
  918. {
  919. uint32_t regValue;
  920. /* Read Application Interrupt and Reset Control Register */
  921. regValue = S32_SCB->AIRCR;
  922. /* Clear register key */
  923. regValue &= ~( S32_SCB_AIRCR_VECTKEY_MASK);
  924. /* Configure System reset request bit and Register Key */
  925. regValue |= S32_SCB_AIRCR_VECTKEY(FEATURE_SCB_VECTKEY);
  926. regValue |= S32_SCB_AIRCR_SYSRESETREQ(0x1u);
  927. /* Write computed register value */
  928. S32_SCB->AIRCR = regValue;
  929. }
  930. void MCUSleep(void)
  931. {
  932. #if (ICU_PRECOMPILE_SUPPORT == STD_ON)
  933. Icu_Init(NULL_PTR);
  934. #elif (ICU_PRECOMPILE_SUPPORT == STD_OFF)
  935. Icu_Init(&Icu_Config_VS_0);
  936. #endif
  937. Mcu_SetMode(McuModeSettingConf_VLPS);
  938. // typedef void (*AppAddr)(void);
  939. // AppAddr resetHandle = (AppAddr)(0x14601);
  940. // OsIf_SuspendAllInterrupts();
  941. // (resetHandle)();
  942. SystemSoftwareReset();
  943. // coreInit();
  944. }
  945. void SystemDeinit(void)
  946. {
  947. Dio_WriteChannel(DioConf_DioChannel_PTA7_GPIO_OUT_MCU_4G_PWRKEY, STD_OFF);
  948. vTaskDelay(pdMS_TO_TICKS(3000));
  949. Dio_WriteChannel(DioConf_DioChannel_PTA6_GPIO_OUT_MCU_4G_POW_EN, STD_OFF);
  950. Dio_WriteChannel(DioConf_DioChannel_PTD1_GPIO_OUT_MCU_GPS_POW_EN, STD_OFF);//GPS ShutDown
  951. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_ON);
  952. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_ON);
  953. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_ON);
  954. Uart_Deinit();
  955. Can_SetControllerMode(CanController_0, CAN_CS_STOPPED);
  956. Can_SetControllerMode(CanController_1, CAN_CS_STOPPED);
  957. // Can_SetControllerMode(CanController_2, CAN_CS_STOPPED);
  958. Dio_WriteChannel(DioConf_DioChannel_PTC17_GPIO_OUT_MCU_CAN0_STB, STD_ON);
  959. Dio_WriteChannel(DioConf_DioChannel_PTC16_GPIO_OUT_MCU_CAN1_STB, STD_ON);
  960. Can_DeInit();
  961. Adc_DeInit();
  962. Gpt_DisableNotification(GptConf_GptChannelConfiguration_GptChannelConfiguration_0);
  963. Gpt_DeInit();
  964. Spi_DeInit();
  965. Mcl_DeInit();
  966. //port DeInit
  967. for(int pinIndex = 0; pinIndex <PortConfigSet_PortContainer_GPIO_PTB4_GPIO_OUT_MCU_RS485_EN; pinIndex++)
  968. {
  969. if(pinIndex == PortConfigSet_PortContainer_CAN_PTA12_CAN1_RX_MCU_CAN1_RX
  970. || pinIndex == PortConfigSet_PortContainer_INT_PTE11_GPIO_IN_MCU_3D_INT1
  971. || pinIndex == PortConfigSet_PortContainer_INT_PTD5_GPIO_IN_MCU_3D_INT2
  972. || pinIndex == PortConfigSet_PortContainer_INT_PTB0_GPIO_IN_MCU_WAKEUP1
  973. || pinIndex == PortConfigSet_PortContainer_INT_PTE2_GPIO_IN_MCU_WAKEUP2)
  974. {
  975. continue;
  976. }
  977. else
  978. {
  979. Port_SetAsUnusedPin(pinIndex);
  980. }
  981. }
  982. Port_SetPinMode(PortConfigSet_PortContainer_CAN_PTA12_CAN1_RX_MCU_CAN1_RX,PORT_GPIO_MODE);
  983. // systemInitFlag = false;
  984. }
  985. void MCUEnterSleep(void)
  986. {
  987. if(pdTRUE == xSemaphoreTake(sleep_mutex,1) && Fota_Process_Going == false)
  988. {
  989. extern boolean Uart_4G_Task_Sleep_FLag;
  990. WdgDeInit();
  991. Std_ReturnType Ret = E_NOT_OK;
  992. uint8 appConfigWriteTimes = 0;
  993. do
  994. {
  995. waitForSleepFlag = true;
  996. //save the app configure before power off
  997. if(Ret == E_NOT_OK)
  998. {
  999. AppConfigInfo.appSaveFlg = false;
  1000. Ret = HAL_EEP_Write(0,(uint8 *)&AppConfigInfo,sizeof(AppConfigInfo));
  1001. appConfigWriteTimes++;
  1002. }
  1003. vTaskDelay(pdMS_TO_TICKS(10));
  1004. }while(Uart_4G_Task_Sleep_FLag == false || (Ret == E_NOT_OK && appConfigWriteTimes<5) );
  1005. vTaskDelete(Uart_Hal_RecvTask_Handle);
  1006. vTaskDelete(Uart_Hal_SendTask_Handle);
  1007. vTaskDelete(CanTask_Handle);
  1008. vTaskDelete(GpsTask_Handle);
  1009. vTaskDelete(Uart_4G_Task_Handle);
  1010. // vTaskDelete(MainTask_Handle);
  1011. SystemDeinit();
  1012. MCUSleep();
  1013. // WdgInit();
  1014. // DoResetECUWithWdg();
  1015. }
  1016. }
  1017. void coreInit(void)
  1018. {
  1019. /* Initialize the Mcu driver */
  1020. #if (MCU_PRECOMPILE_SUPPORT == STD_ON)
  1021. Mcu_Init(NULL_PTR);
  1022. #elif (MCU_PRECOMPILE_SUPPORT == STD_OFF)
  1023. Mcu_Init(&Mcu_Config_VS_0);
  1024. #endif /* (MCU_PRECOMPILE_SUPPORT == STD_ON) */
  1025. Mcu_InitClock(McuClockSettingConfig_0);
  1026. /* Wait until PLL is locked */
  1027. while (MCU_PLL_LOCKED != Mcu_GetPllStatus())
  1028. {
  1029. /* Busy wait until the System PLL is locked */
  1030. }
  1031. Mcu_DistributePllClock();
  1032. OsIf_Init(NULL_PTR);
  1033. Platform_Init(NULL_PTR);
  1034. /* Initialize all pins*/
  1035. #if (PORT_PRECOMPILE_SUPPORT == STD_ON)
  1036. Port_Init(NULL_PTR);
  1037. #elif (PORT_PRECOMPILE_SUPPORT == STD_OFF)
  1038. Port_Init(&Port_Config_VS_0);
  1039. #endif
  1040. }
  1041. void SystemModulesInit(void)
  1042. {
  1043. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1044. /* Initialize Mcl module */
  1045. Mcl_Init(NULL_PTR);
  1046. SEGGER_RTT_Init();
  1047. /* Initializes an UART driver*/
  1048. #if (UART_PRECOMPILE_SUPPORT == STD_ON)
  1049. Uart_Init(NULL_PTR);
  1050. #elif (UART_PRECOMPILE_SUPPORT == STD_OFF)
  1051. Uart_Init(&Uart_xConfig_VS_0);
  1052. #endif
  1053. IP_LPUART0->CTRL |= LPUART_CTRL_ILT(1);
  1054. IP_LPUART1->CTRL |= LPUART_CTRL_ILT(1);
  1055. IP_LPUART2->CTRL |= LPUART_CTRL_ILT(1);
  1056. IP_LPUART0->CTRL |= LPUART_CTRL_IDLECFG(3);
  1057. IP_LPUART1->CTRL |= LPUART_CTRL_IDLECFG(3);
  1058. IP_LPUART2->CTRL |= LPUART_CTRL_IDLECFG(3);
  1059. #if 1 /* Initialize Platform driver */
  1060. #if (CAN_PRECOMPILE_SUPPORT == STD_ON)
  1061. Can_Init(NULL_PTR);
  1062. #elif (CAN_PRECOMPILE_SUPPORT == STD_OFF)
  1063. Can_Init(&Can_Config_VS_0);
  1064. #endif
  1065. Can_SetControllerMode(CanController_0, CAN_CS_STARTED);
  1066. Can_SetControllerMode(CanController_1, CAN_CS_STARTED);
  1067. Dio_WriteChannel(DioConf_DioChannel_PTC17_GPIO_OUT_MCU_CAN0_STB, STD_OFF);
  1068. Dio_WriteChannel(DioConf_DioChannel_PTC16_GPIO_OUT_MCU_CAN1_STB, STD_OFF);
  1069. // Can_SetControllerMode(CanController_2, CAN_CS_STARTED);
  1070. #endif
  1071. #if (ADC_PRECOMPILE_SUPPORT == STD_ON)
  1072. Adc_Init(NULL_PTR);
  1073. #else
  1074. Adc_Init(&Adc_Config_VS_0);
  1075. #endif /* ADC_PRECOMPILE_SUPPORT == STD_ON */
  1076. /* Partition only if it was not partitioned before for EERAM with code 0x4 */
  1077. // Eep_DepartParitition(T_EEEPROM_SIZE);
  1078. /* Initialize Eep driver */
  1079. #if defined (EEP_PRECOMPILE_SUPPORT)
  1080. Eep_Init(NULL_PTR);
  1081. #else
  1082. Eep_Init(&Eep_Config_VS_0);
  1083. #endif
  1084. //Init Flash Driver
  1085. #if defined (FLS_PRECOMPILE_SUPPORT)
  1086. Fls_Init(NULL_PTR);
  1087. #else
  1088. Fls_Init(&Fls_Config_VS_0);
  1089. while(MEMIF_IDLE == Fls_GetStatus())
  1090. {
  1091. ;
  1092. }
  1093. #endif
  1094. Spi_Init(NULL_PTR);
  1095. /* Initialize the Gpt driver */
  1096. Gpt_Init(&Gpt_Config_VS_0);
  1097. /* Enable the Gpt notification to periodically service the Wdg */
  1098. Gpt_EnableNotification(GptConf_GptChannelConfiguration_GptChannelConfiguration_0);
  1099. Icu_DeInit();
  1100. WdgInit();
  1101. IsFeedWdg = true;
  1102. }
  1103. void displayResetReasonWithLED(void)
  1104. {
  1105. Mcu_ResetType bootreason;
  1106. bootreason = Mcu_GetResetReason();
  1107. }