hal_adapter.c 30 KB

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  1. /*
  2. * hal_adapter.c
  3. *中间层函数调用库
  4. * Created on: 2022年1月18日
  5. * Author: QiXiang_CHENJIE
  6. */
  7. #include "hal_adapter.h"
  8. #include "AppGlobalVar.h"
  9. #include "stdio.h"
  10. #include "stdarg.h"
  11. uint8_t __attribute__((section(".non_cacheable_data"))) RX_Buffer[3][BUFFER_SIZE];
  12. uint32_t bufferIdx[3] = {0};
  13. volatile uint32 VarNotification_0 = 0;
  14. volatile uint32 VarNotification_1 = 0;
  15. TP_Value_Type ConvertedBuffer[NUM_RESULTS];
  16. Adc_ValueGroupType ResultBuffer[NUM_RESULTS];
  17. volatile Uart_StatusType Uart_TransmitStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  18. QueueHandle_t UartRecvQueue[3];
  19. QueueHandle_t UartSendQueue[3];
  20. QueueHandle_t UartHalQueueHandle;
  21. void Uart_Hal_RecvTask(void *pvParameters);
  22. void Uart_Hal_SendTask(void *pvParameters);
  23. Std_ReturnType UartStartRecvFunc(uint8 channel);
  24. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR);
  25. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len);
  26. void clear_ringBuffer(ringbuffer_t *ringBuf);
  27. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  28. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  29. #if UARTPRINTF==1
  30. uint8 ringbuffer[1024];
  31. ringbuffer_t printfRingBuffer;
  32. #endif
  33. sint8 AtcmdDelayRecvFunc(uint8 recvChannel,char *ResultStrPtr,uint16 delayTime)
  34. {
  35. sint8 outValue = -1;
  36. uint8 delayCnt = 0;
  37. uint8 *UartData = NULL;
  38. uint16 ReadLen = 0;
  39. uint8 *retptr = NULL;
  40. while (delayCnt<(delayTime/1000)&&outValue!=0)
  41. {
  42. UART_Receive_Data(recvChannel,&UartData, &ReadLen,1000);
  43. retptr = (uint8 *)strstr((char *)UartData, ResultStrPtr);
  44. if (retptr)
  45. {
  46. outValue = 0;
  47. }
  48. else
  49. {
  50. delayCnt++;
  51. }
  52. if(UartData != NULL)
  53. {
  54. free(UartData);
  55. }
  56. UartData = NULL;
  57. }
  58. return outValue;
  59. }
  60. #if UARTPRINTF==1
  61. uint16 myPrintf(const char *fmt, ...)
  62. {
  63. int n;
  64. uint8 databuffer[512]={0};
  65. va_list args;
  66. va_start(args, fmt);
  67. n = vsprintf((char *)databuffer, fmt, args);
  68. va_end(args);
  69. if( (printfRingBuffer.bw + n) <= printfRingBuffer.length )
  70. {
  71. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  72. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  73. printfRingBuffer.bw = printfRingBuffer.bw + n;
  74. }
  75. else
  76. {
  77. printfRingBuffer.bw = 0;
  78. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  79. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  80. }
  81. return n;
  82. }
  83. #endif
  84. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len)
  85. {
  86. ringBuf->br = 0;
  87. ringBuf->bw = 0;
  88. ringBuf->btoRead = 0;
  89. ringBuf->source = buf;
  90. ringBuf->length = buf_len;
  91. }
  92. void clear_ringBuffer(ringbuffer_t *ringBuf)
  93. {
  94. ringBuf->br = 0;
  95. ringBuf->bw = 0;
  96. ringBuf->btoRead = 0;
  97. }
  98. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  99. {
  100. uint32_t len = 0;
  101. uint32_t ringBuf_bw = ringBuf->bw;
  102. uint32_t ringBuf_len = ringBuf->length;
  103. uint8_t *ringBuf_source = ringBuf->source;
  104. if( (ringBuf_bw + size) <= ringBuf_len )
  105. {
  106. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  107. }
  108. else
  109. {
  110. len = ringBuf_len - ringBuf_bw;
  111. memcpy(ringBuf_source + ringBuf_bw, buffer, len);
  112. memcpy(ringBuf_source, buffer + ringBuf_bw, size - len);
  113. }
  114. ringBuf->bw = (ringBuf->bw + size) % ringBuf_len;
  115. ringBuf->btoRead += size;
  116. return size;
  117. }
  118. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  119. {
  120. uint32_t len = 0;
  121. uint32_t ringBuf_br = ringBuf->br;
  122. uint32_t ringBuf_len = ringBuf->length;
  123. uint8_t *ringBuf_source = ringBuf->source;
  124. if( (ringBuf_br + size ) <= ringBuf_len )
  125. {
  126. memcpy(buffer, ringBuf_source + ringBuf_br, size);
  127. }
  128. else
  129. {
  130. len = ringBuf_len - ringBuf_br;
  131. memcpy(buffer, ringBuf_source + ringBuf_br, len);
  132. memcpy(buffer + len, ringBuf_source, size - len);
  133. }
  134. ringBuf->br = (ringBuf->br + size) % ringBuf_len;
  135. ringBuf->btoRead -= size;
  136. return size;
  137. }
  138. Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, const uint8 *txBuffer, uint32 sendLength, uint8 **rxBuffer, uint16 *rxlen, uint32 T_timeout)
  139. {
  140. UartMsg_t UartRecvMsg;
  141. UartMsg_t UartSendMsg;
  142. BaseType_t Sendret = pdFALSE;
  143. BaseType_t Recvret = pdFALSE;
  144. uint32 retVal = E_NOT_OK;
  145. UartSendMsg.DataLen = sendLength;
  146. UartSendMsg.dataPrt = txBuffer;
  147. *rxlen = 0;
  148. Sendret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,50);
  149. memset(&UartRecvMsg,0,sizeof(UartMsg_t));
  150. if(Sendret == pdTRUE)
  151. {
  152. Recvret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  153. if(Recvret == pdTRUE)
  154. {
  155. *rxlen = UartRecvMsg.DataLen;
  156. *rxBuffer = UartRecvMsg.dataPrt;
  157. retVal = E_OK;
  158. }
  159. else
  160. {
  161. retVal = 3;
  162. }
  163. }
  164. else
  165. {
  166. retVal = 2;
  167. }
  168. return retVal;
  169. }
  170. Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 **rxBuffer, uint16 *rxlen, sint32 T_timeout)
  171. {
  172. UartMsg_t UartRecvMsg;
  173. BaseType_t ret = pdFALSE;
  174. uint32 retVal = E_NOT_OK;
  175. *rxlen = 0;
  176. ret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  177. if(ret == pdTRUE)
  178. {
  179. *rxlen = UartRecvMsg.DataLen;
  180. *rxBuffer = UartRecvMsg.dataPrt;
  181. retVal = E_OK;
  182. }
  183. return retVal;
  184. }
  185. Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  186. {
  187. UartMsg_t UartSendMsg;
  188. BaseType_t ret = pdFALSE;
  189. uint32 retVal = E_NOT_OK;
  190. UartSendMsg.DataLen = sendLength;
  191. UartSendMsg.dataPrt = txBuffer;
  192. ret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,T_timeout);
  193. if(ret == pdTRUE)
  194. {
  195. retVal = E_OK;
  196. }
  197. else
  198. {
  199. retVal = E_NOT_OK;
  200. }
  201. return retVal;
  202. }
  203. void UartInit(void)
  204. {
  205. UartRecvQueue[0] = xQueueCreate(6, sizeof(UartMsg_t));
  206. UartRecvQueue[1] = xQueueCreate(6, sizeof(UartMsg_t));
  207. UartRecvQueue[2] = xQueueCreate(3, sizeof(UartMsg_t));
  208. UartSendQueue[0] = xQueueCreate(3, sizeof(UartMsg_t));
  209. UartSendQueue[1] = xQueueCreate(1, sizeof(UartMsg_t));
  210. UartSendQueue[2] = xQueueCreate(1, sizeof(UartMsg_t));
  211. UartHalQueueHandle = xQueueCreate(9, sizeof(UartHalMsg_t));
  212. xTaskCreate(Uart_Hal_RecvTask, (const char *const)"UartRecv", 1024, (void *)0, main_TASK_PRIORITY + 5, NULL);
  213. xTaskCreate(Uart_Hal_SendTask, (const char *const)"UartSend", 1024, (void *)0, main_TASK_PRIORITY + 4, NULL);
  214. }
  215. Std_ReturnType UartStartRecvFunc(uint8 channel)
  216. {
  217. sint8 out = 0;
  218. volatile Std_ReturnType R_Uart_Status=E_NOT_OK;
  219. bufferIdx[channel]=0;
  220. memset(RX_Buffer[channel],0x00,BUFFER_SIZE);
  221. switch(channel)
  222. {
  223. case 0:
  224. IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  225. break;
  226. case 1:
  227. IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  228. break;
  229. case 2:
  230. IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  231. break;
  232. default:
  233. break;
  234. }
  235. Uart_SetBuffer(channel, RX_Buffer[channel], DMA_SIZE, UART_RECEIVE);
  236. R_Uart_Status = Uart_AsyncReceive(channel, RX_Buffer[channel], DMA_SIZE);
  237. if (E_OK != R_Uart_Status)
  238. {
  239. Uart_Abort(channel, UART_RECEIVE);
  240. out = E_NOT_OK;
  241. }
  242. return out;
  243. }
  244. void Uart_Hal_RecvTask(void *pvParameters)
  245. {
  246. UartMsg_t UartMsg;
  247. UartHalMsg_t UartHalMsgRecv;
  248. BaseType_t ret = pdFALSE;
  249. uint32 T_bytesRemaining[3] = {0};
  250. uint16 T_timeout[3] = {0};
  251. volatile Uart_StatusType Uart_ReceiveStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  252. uint8 UartIdx = UART_LPUART0;
  253. uint8 UartState[3] = {UartAbortRecv,UartAbortRecv,UartAbortRecv};
  254. while(1)
  255. {
  256. if((T_timeout[UartIdx]>1000) && (Uart_ReceiveStatus[UartIdx] != UART_STATUS_NO_ERROR) )//判定UART停止,超时停止,不是接收状态则停止
  257. {
  258. Uart_Abort(UartIdx, UART_RECEIVE);
  259. UartState[UartIdx] = UartAbortRecv;
  260. T_timeout[UartIdx] = 0;
  261. }
  262. else if(Uart_ReceiveStatus[UartIdx] == UART_STATUS_NO_ERROR)
  263. {
  264. UartState[UartIdx] = UartRecvComplete;
  265. }
  266. if((UartState[UartIdx] == UartAbortRecv) || (UartState[UartIdx] == UartRecvComplete)) //判定UART开始接收:UART停止后开始接收
  267. {
  268. if(E_OK == UartStartRecvFunc(UartIdx))
  269. {
  270. UartState[UartIdx] = UartStartRecv;
  271. }
  272. }
  273. Uart_ReceiveStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_RECEIVE);
  274. T_timeout[UartIdx]++;
  275. UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
  276. ret = xQueueReceive(UartHalQueueHandle,&UartHalMsgRecv,1);
  277. if(ret==pdTRUE)
  278. {
  279. if(UartHalMsgRecv.event==LPUART_UART_IP_EVENT_RECV_IDLE)
  280. {
  281. UartMsg.DataLen = UartHalMsgRecv.value;
  282. UartMsg.dataPrt = malloc(UartMsg.DataLen);
  283. memset(UartMsg.dataPrt,0,UartMsg.DataLen);
  284. memcpy(UartMsg.dataPrt,RX_Buffer[UartHalMsgRecv.Channel],UartMsg.DataLen);
  285. if(UartMsg.DataLen>0)
  286. {
  287. xQueueSend(UartRecvQueue[UartHalMsgRecv.Channel],&UartMsg,10);
  288. }
  289. T_timeout[UartHalMsgRecv.Channel] = 0;
  290. UartState[UartHalMsgRecv.Channel] = UartRecvComplete;
  291. }
  292. }
  293. }
  294. }
  295. void Uart_Hal_SendTask(void *pvParameters)
  296. {
  297. UartMsg_t UartSendMsg;
  298. BaseType_t ret = pdFALSE;
  299. uint32 T_bytesRemaining[3] = {0};
  300. uint16 T_timeout[3] = {0};
  301. volatile Std_ReturnType T_Uart_Status[3];
  302. uint8 UartIdx = UART_LPUART0;
  303. uint8 UartSendState[3] = {UartNoDataSend,UartNoDataSend,UartNoDataSend};
  304. while(1)
  305. {
  306. ret = xQueueReceive(UartSendQueue[UartIdx],&UartSendMsg,1);
  307. if(ret==pdTRUE)
  308. {
  309. if(UartIdx==UART_LPUART0)
  310. {
  311. Dio_WriteChannel(DioConf_DioChannel_PTB4_GPIO_OUT_MCU_RS485_EN, STD_ON);
  312. }
  313. T_Uart_Status[UartIdx] = Uart_AsyncSend(UartIdx, UartSendMsg.dataPrt, UartSendMsg.DataLen);
  314. if (E_OK != T_Uart_Status[UartIdx])
  315. {
  316. Uart_Abort(UartIdx, UART_SEND);
  317. UartSendState[UartIdx] = UartAbortSend;
  318. }
  319. else
  320. {
  321. UartSendState[UartIdx] = UartStartSend;
  322. }
  323. }
  324. /*开始发送后的判定*/
  325. if(UartSendState[UartIdx] == UartStartSend)
  326. {
  327. Uart_TransmitStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_SEND);
  328. T_timeout[UartIdx]++;
  329. }
  330. if(T_timeout[UartIdx]>=1000 || ((Uart_TransmitStatus[UartIdx] != UART_STATUS_OPERATION_ONGOING) && (UartSendState[UartIdx] == UartStartSend)))
  331. {
  332. if(T_timeout[UartIdx]>=1000)
  333. {
  334. Uart_Abort(UartIdx, UART_SEND);
  335. UartSendState[UartIdx] = UartAbortSend;
  336. }
  337. else if(Uart_TransmitStatus[UartIdx] == UART_STATUS_NO_ERROR)
  338. {
  339. UartSendState[UartIdx] = UartSendComplete;
  340. }
  341. T_timeout[UartIdx] = 0;
  342. }
  343. UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
  344. }
  345. }
  346. //
  347. //Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, const uint8 *txBuffer, uint32 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  348. //{
  349. // volatile Std_ReturnType R_Uart_Status;
  350. // volatile Std_ReturnType T_Uart_Status;
  351. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  352. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  353. // uint32 T_bytesRemaining;
  354. // uint32 R_bytesRemaining;
  355. // uint32 timeout = T_timeout;
  356. // uint32 retVal = E_NOT_OK;
  357. // bufferIdx[recvChannel] = 0;
  358. // switch (recvChannel)
  359. // {
  360. // case 0:
  361. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  362. // break;
  363. // case 1:
  364. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  365. // break;
  366. // case 2:
  367. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  368. // break;
  369. // default:
  370. // break;
  371. // }
  372. // if (txBuffer == NULL || rxBuffer == NULL)
  373. // {
  374. // return retVal;
  375. // }
  376. //
  377. // /* Uart_AsyncSend transmit data */
  378. // Uart_SetBuffer(transChannel, txBuffer, sendLength, UART_SEND);
  379. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  380. // if (E_OK != T_Uart_Status)
  381. // {
  382. // Uart_Abort(transChannel, UART_SEND);
  383. // return E_NOT_OK;
  384. // }
  385. // Uart_SetBuffer(recvChannel, &RX_Buffer[recvChannel][0], DMA_SIZE, UART_RECEIVE);
  386. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  387. // if (E_OK != R_Uart_Status)
  388. // {
  389. // Uart_Abort(recvChannel, UART_RECEIVE);
  390. // return E_NOT_OK;
  391. // }
  392. // /* Check for no on-going transmission */
  393. // do
  394. // {
  395. // if (Uart_TransmitStatus != UART_STATUS_NO_ERROR)
  396. // {
  397. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  398. // }
  399. // if (Uart_ReceiveStatus != UART_STATUS_NO_ERROR)
  400. // {
  401. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &R_bytesRemaining, UART_RECEIVE);
  402. // }
  403. // vTaskDelay(pdMS_TO_TICKS(1));
  404. // } while (((UART_STATUS_NO_ERROR != Uart_TransmitStatus || UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < --timeout));
  405. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  406. // {
  407. // Uart_Abort(transChannel, UART_SEND);
  408. // retVal = E_NOT_OK;
  409. // }
  410. // else
  411. // {
  412. // retVal = E_OK;
  413. // }
  414. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  415. // {
  416. // Uart_Abort(recvChannel, UART_RECEIVE);
  417. // *rxlen = bufferIdx[recvChannel];
  418. // retVal = E_NOT_OK;
  419. // }
  420. // else
  421. // {
  422. // *rxlen = bufferIdx[recvChannel];
  423. // retVal = E_OK;
  424. // }
  425. // return retVal;
  426. //}
  427. //
  428. //Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  429. //{
  430. //
  431. // volatile Std_ReturnType T_Uart_Status;
  432. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  433. // uint32 T_bytesRemaining;
  434. // uint32 timeout = T_timeout;
  435. // uint32 retVal = E_NOT_OK;
  436. // if (txBuffer == NULL)
  437. // {
  438. // return retVal;
  439. // }
  440. //
  441. // /* Uart_AsyncSend transmit data */
  442. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  443. // if (E_OK != T_Uart_Status)
  444. // {
  445. // Uart_Abort(transChannel, UART_SEND);
  446. // return E_NOT_OK;
  447. // }
  448. // /* Check for no on-going transmission */
  449. // do
  450. // {
  451. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  452. // vTaskDelay(pdMS_TO_TICKS(1));
  453. // } while ((UART_STATUS_NO_ERROR != Uart_TransmitStatus && 0 < --timeout));
  454. //
  455. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  456. // {
  457. // retVal = E_NOT_OK;
  458. // }
  459. // else
  460. // {
  461. // retVal = E_OK;
  462. // }
  463. // return retVal;
  464. //}
  465. //
  466. //Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint16 *rxlen, sint32 T_timeout)
  467. //{
  468. // volatile Std_ReturnType R_Uart_Status = E_NOT_OK;
  469. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  470. // uint32 T_bytesRemaining = 0;
  471. // uint32 retVal = E_NOT_OK;
  472. // // uint8 Rx_Buffer[MSG_LEN];
  473. // bufferIdx[recvChannel] = 0;
  474. // *rxlen = 0;
  475. // if (rxBuffer == NULL)
  476. // {
  477. // return retVal;
  478. // }
  479. // /* Uart_AsyncReceive transmit data */
  480. // switch (recvChannel)
  481. // {
  482. // case 0:
  483. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  484. // break;
  485. // case 1:
  486. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  487. // break;
  488. // case 2:
  489. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  490. // break;
  491. // default:
  492. // break;
  493. // }
  494. // Uart_SetBuffer(recvChannel, rxBuffer, DMA_SIZE, UART_RECEIVE);
  495. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  496. // if (E_OK != R_Uart_Status)
  497. // {
  498. // Uart_Abort(recvChannel, UART_RECEIVE);
  499. // return E_NOT_OK;
  500. // }
  501. // /* Check for no on-going transmission */
  502. // do
  503. // {
  504. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &T_bytesRemaining, UART_RECEIVE);
  505. // vTaskDelay(pdMS_TO_TICKS(1));
  506. //
  507. // } while ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < T_timeout--);
  508. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  509. // {
  510. // Uart_Abort(recvChannel, UART_RECEIVE);
  511. // *rxlen = bufferIdx[recvChannel];
  512. // retVal = E_NOT_OK;
  513. // }
  514. // else
  515. // {
  516. // *rxlen = bufferIdx[recvChannel];
  517. // retVal = E_OK;
  518. // }
  519. // return retVal;
  520. //}
  521. extern Lpuart_Uart_Ip_StateStructureType *Lpuart_Uart_Ip_apStateStructuresArray[LPUART_UART_IP_NUMBER_OF_INSTANCES];
  522. void UART_Callback(uint32 hwInstance, Lpuart_Uart_Ip_EventType event)
  523. {
  524. // (void)userData;
  525. Lpuart_Uart_Ip_StateStructureType * UartState;
  526. UartState = (Lpuart_Uart_Ip_StateStructureType *)Lpuart_Uart_Ip_apStateStructuresArray[hwInstance];
  527. if (hwInstance==0&&event == LPUART_UART_IP_EVENT_END_TRANSFER)
  528. {
  529. Dio_WriteChannel(DioConf_DioChannel_PTB4_GPIO_OUT_MCU_RS485_EN, STD_OFF);
  530. }
  531. /* Check the event type */
  532. if (event == LPUART_UART_IP_EVENT_RX_FULL)
  533. {
  534. /* The reception stops when receiving idle is detected or the buffer is full */
  535. if (bufferIdx[hwInstance] <= (BUFFER_SIZE - DMA_SIZE))
  536. {
  537. /* Update the buffer index and the rx buffer */
  538. bufferIdx[hwInstance] += DMA_SIZE;
  539. Uart_SetBuffer(hwInstance, &RX_Buffer[hwInstance][bufferIdx[hwInstance]], DMA_SIZE, UART_RECEIVE);
  540. // Lpuart_Uart_Ip_SetRxBuffer(hwInstance, &RX_Buffer[bufferIdx], DMA_SIZE);
  541. }
  542. }
  543. if (event == LPUART_UART_IP_EVENT_ERROR)
  544. {
  545. // /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  546. // temp = DMA_SIZE - (uint32_t)IP_DMA->TCD->CITER.ELINKNO;
  547. // /*Add the remaining data size to the sum of the received size*/
  548. // bufferIdx[hwInstance] += temp;
  549. /*Abort the receiving after detecting IDLE receiving*/
  550. Lpuart_Uart_Ip_AbortReceivingData(hwInstance);
  551. Lpuart_Uart_Ip_AbortSendingData(hwInstance);
  552. // bufferIdx = 0;
  553. }
  554. if (event == LPUART_UART_IP_EVENT_RECV_IDLE)
  555. {
  556. uint32_t temp;
  557. UartHalMsg_t UartHalMsg;
  558. UartHalMsg.Channel = hwInstance;
  559. UartHalMsg.event = event;
  560. /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  561. temp = DMA_SIZE - (uint32_t)IP_DMA->TCD[hwInstance].CITER.ELINKNO;
  562. /*Add the remaining data size to the sum of the received size*/
  563. bufferIdx[hwInstance] += temp;
  564. /*Abort the receiving after detecting IDLE receiving*/
  565. UartHalMsg.value = bufferIdx[hwInstance];
  566. xQueueSendFromISR(UartHalQueueHandle,&UartHalMsg,pdFALSE);
  567. }
  568. }
  569. /*CAN*/
  570. Can_PduType Can_CreatePduInfo(Can_IdType id, CAN_IdFrameType idFrame, PduIdType swPduHandle, uint8 length, uint8 *sdu)
  571. {
  572. Can_PduType PduInfo;
  573. switch (idFrame)
  574. {
  575. case CAN_STANDARD_ID_TYPE:
  576. id = id & 0x7FF;
  577. break;
  578. case CANFD_STANDARD_ID_TYPE:
  579. id = (id & 0x7FF) | 0x40000000;
  580. break;
  581. case CAN_EXTENDED_ID_TYPE:
  582. id = id | 0x80000000;
  583. break;
  584. case CANFD_EXTENDED_ID_TYPE:
  585. id = id | 0xC0000000;
  586. break;
  587. default:
  588. id = id & 0x7FF;
  589. break;
  590. }
  591. PduInfo.id = id;
  592. PduInfo.swPduHandle = swPduHandle;
  593. PduInfo.length = length;
  594. PduInfo.sdu = sdu;
  595. return PduInfo;
  596. }
  597. Std_ReturnType CanIf_SendMessage(uint8 ControllerId, Can_Msg_Type CanMsg)
  598. {
  599. volatile Can_PduType Can_PduInfo;
  600. volatile Std_ReturnType CAN_Write_Status;
  601. Std_ReturnType retVal = E_NOT_OK;
  602. uint32 u8TimeOut = 100 * 100;
  603. Can_HwHandleType Hth = Can0HardwareObject_TX + (Can_HwHandleType)ControllerId; // controller 0 --> Can0HardwareObject_TX
  604. Can_PduInfo = Can_CreatePduInfo(CanMsg.id, CanMsg.idFrame, 0, CanMsg.length, CanMsg.sdu);
  605. CAN_Write_Status = Can_Write(Hth, &Can_PduInfo);
  606. CanIf_bTxFlag = FALSE;
  607. if (CAN_Write_Status == E_OK)
  608. {
  609. while ((!CanIf_bTxFlag) && (u8TimeOut != 0U))
  610. {
  611. Can_MainFunction_Write();
  612. u8TimeOut--;
  613. }
  614. }
  615. if (CanIf_bTxFlag == TRUE)
  616. {
  617. retVal = E_OK;
  618. }
  619. else
  620. {
  621. retVal = E_NOT_OK;
  622. }
  623. return retVal;
  624. }
  625. Can_Msg_Type Can_GetMsgInfo(Can_IdType id, uint8 length, uint8 *sdu)
  626. {
  627. Can_Msg_Type CanMsgInfo;
  628. CanMsgInfo.idFrame = (CAN_IdFrameType)((id >> 30) & 0x03);
  629. if (CanMsgInfo.idFrame & 0x01)
  630. {
  631. CanMsgInfo.id = id & 0x7FF;
  632. }
  633. else
  634. {
  635. CanMsgInfo.id = id & 0x1FFFFFFF;
  636. }
  637. CanMsgInfo.length = length;
  638. CanMsgInfo.sdu = sdu;
  639. return CanMsgInfo;
  640. }
  641. void CanIf_ControllerBusOff(uint8 ControllerId)
  642. {
  643. (void)ControllerId;
  644. }
  645. void CanIf_ControllerModeIndication(uint8 ControllerId, Can_ControllerStateType ControllerMode)
  646. {
  647. (void)ControllerId;
  648. (void)ControllerMode;
  649. }
  650. void CanIf_TxConfirmation(PduIdType CanTxPduId)
  651. {
  652. CanIf_u8TxConfirmCnt++;
  653. CanIf_bTxFlag = TRUE;
  654. (void)CanTxPduId;
  655. }
  656. void CanIf_RxIndication(const Can_HwType *Mailbox, const PduInfoType *PduInfoPtr)
  657. {
  658. Can_Msg_Type canRxMsg_Buff;
  659. Can_Msg_Type_Data canRxMsgQueueData;
  660. CanIf_bRxFlag = TRUE; // should not be delete
  661. // should put the msg into message queue
  662. canRxMsg_Buff = Can_GetMsgInfo(Mailbox->CanId, PduInfoPtr->SduLength, PduInfoPtr->SduDataPtr);
  663. canRxMsgQueueData.id = canRxMsg_Buff.id;
  664. canRxMsgQueueData.length = canRxMsg_Buff.length;
  665. memcpy(canRxMsgQueueData.data, canRxMsg_Buff.sdu, canRxMsgQueueData.length);
  666. xQueueSend(CanRecvQueueHandle, &canRxMsgQueueData, 0);
  667. }
  668. void CanIf_CurrentIcomConfiguration(uint8 ControllerId, IcomConfigIdType ConfigurationId, IcomSwitch_ErrorType Error)
  669. {
  670. (void)ControllerId;
  671. (void)ConfigurationId;
  672. (void)Error;
  673. }
  674. void Notification_0(void)
  675. {
  676. ADC_Converter(ResultBuffer, ConvertedBuffer);
  677. memcpy(BattTempR, &ConvertedBuffer[3], 4 * sizeof(uint32));
  678. }
  679. void Notification_1(void)
  680. {
  681. VarNotification_1++;
  682. }
  683. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR)
  684. {
  685. Adc_ValueGroupType REFH, REFL;
  686. REFH = Buffer[0];
  687. REFL = Buffer[2];
  688. for (int i = 3; i < NUM_RESULTS; i++)
  689. {
  690. if (Buffer[i] >= REFH)
  691. {
  692. ConvertedValueR[i] = 40930000;
  693. }
  694. else if (Buffer[i] <= REFL)
  695. {
  696. ConvertedValueR[i] = 0x00;
  697. }
  698. else
  699. {
  700. ConvertedValueR[i] = (TP_Value_Type)((float)(10000 * (Buffer[i] - REFL) / (float)(REFH - REFL)) / (1 - (float)((Buffer[i] - REFL) / (float)(REFH - REFL))));
  701. }
  702. }
  703. }
  704. Std_ReturnType ADC_ReadValue()
  705. {
  706. Std_ReturnType ret = E_NOT_OK;
  707. Adc_ValueGroupType AdcReadGroupBuffer[NUM_RESULTS];
  708. volatile Std_ReturnType Status = TRUE;
  709. for (int i = 0; i < NUM_RESULTS; i++)
  710. {
  711. ResultBuffer[i] = 0xFFFF;
  712. AdcReadGroupBuffer[i] = 0xFFFE;
  713. ConvertedBuffer[i] = 0x00;
  714. }
  715. Adc_SetupResultBuffer(AdcGroupSoftwareOneShot, ResultBuffer);
  716. Adc_EnableGroupNotification(AdcGroupSoftwareOneShot);
  717. VarNotification_0 = 0;
  718. Adc_StartGroupConversion(AdcGroupSoftwareOneShot);
  719. // uint32 TimeOut = 0;
  720. // while(VarNotification_0 == 0 && VarNotification_1==0 && TimeOut<0xFFFF)
  721. // {
  722. // TimeOut++;
  723. // }
  724. // AdcStates = Adc_ReadGroup(AdcGroupSoftwareOneShot, AdcReadGroupBuffer);
  725. // if(AdcStates == E_NOT_OK)
  726. // {
  727. // return AdcStates;
  728. // }
  729. // else
  730. // {
  731. // ret = E_OK;
  732. // }
  733. return ret;
  734. }
  735. /*EEP*/
  736. static Std_ReturnType TestEep_FlexNvmProgramPartCmd(
  737. VAR(TestEep_CsecKeySize, AUTOMATIC) eepKeysize,
  738. VAR(TestEep_SfeType, AUTOMATIC) eepSecurityFlagExtension,
  739. VAR(TestEep_LoadFlexRamType, AUTOMATIC) eepLoadFlexRamAtReset,
  740. VAR(TestEep_Eeprom_FlexRamPartitionType, AUTOMATIC) eepFlexRamPartition,
  741. VAR(TestEep_Eeprom_FlexNvmPartitionType, AUTOMATIC) eepFlexNvmPartition)
  742. {
  743. Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
  744. uint32 u32Addr = 0;
  745. uint32 u32FlexNvmPartSize = 0;
  746. uint32 u32RegSimFcfg1 = 0UL;
  747. u32RegSimFcfg1 = IP_SIM->FCFG1;
  748. /*get DEPART value */
  749. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  750. /* check that it was not partitioned before */
  751. if (u32FlexNvmPartSize == 0xF)
  752. {
  753. // /* if error flags are set the cmd is not executed */
  754. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8);
  755. //
  756. // /*erase DF 0 sector*/
  757. // u32Addr=(TEST_EEP_DEEPROM_SECTOR_0_ADDR32 - D_EEPROM_BASE_ADDR) + 0x800000UL;
  758. //
  759. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, TEST_EEP_EEPROM_CMD_ERASE_SECTOR);
  760. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)(u32Addr >> 16UL));
  761. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)(u32Addr >> 8UL));
  762. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)(u32Addr >> 0UL));
  763. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32 , TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  764. // while((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  765. // {
  766. // }
  767. //
  768. if (0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  769. {
  770. /* run program partition command */
  771. REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, EEPROM_CMD_PROGRAM_PARTITION);
  772. REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)eepKeysize);
  773. REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)eepSecurityFlagExtension);
  774. REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)eepLoadFlexRamAtReset);
  775. REG_WRITE8(TEST_EEP_EEPROM_FCCOB4_ADDR32, (uint8)eepFlexRamPartition);
  776. REG_WRITE8(TEST_EEP_EEPROM_FCCOB5_ADDR32, (uint8)eepFlexNvmPartition);
  777. REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  778. while ((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  779. {
  780. /* wait for operation to finish */
  781. }
  782. /* check if errors occured */
  783. if (REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  784. {
  785. /* NOK, error flags are set */
  786. u8RetVal = (Std_ReturnType)E_NOT_OK;
  787. }
  788. }
  789. else
  790. {
  791. /* NOK, error flags are set */
  792. u8RetVal = (Std_ReturnType)E_NOT_OK;
  793. }
  794. }
  795. else
  796. {
  797. /* NOK, partitioned already */
  798. u8RetVal = (Std_ReturnType)E_NOT_OK;
  799. }
  800. return u8RetVal;
  801. }
  802. void Eep_DepartParitition(TestEep_Eeprom_FlexNvmPartitionType T_EEP_SIZE)
  803. {
  804. uint32 u32FlexNvmPartSize = 0;
  805. uint32 u32RegSimFcfg1 = 0UL;
  806. u32RegSimFcfg1 = IP_SIM->FCFG1;
  807. /*get DEPART value */
  808. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  809. if (u32FlexNvmPartSize == 0xF) /* We just partition again if curent size different with expected */
  810. {
  811. /* partition for EERAM 64K with NOT loading EERAM at reset in hardware */
  812. TestEep_FlexNvmProgramPartCmd(EEP_FTFC_KEY_SIZE_0_BYTES, EEP_FTFC_VERIFY_ONLY_DISABLED,
  813. EEP_FTFC_LOAD_AT_RESET_ENABLED, EEP_FTFC_EERAM_SIZE_4K, T_EEP_SIZE);
  814. }
  815. }
  816. /* Erase memory by writing erase value */
  817. Std_ReturnType HAL_EEP_Erase(uint32 eepEraseStartAddr, uint32 eepEraseSize)
  818. {
  819. Std_ReturnType retReturnType = E_OK;
  820. MemIf_JobResultType retJobResultType;
  821. retReturnType = Eep_Erase(eepEraseStartAddr, eepEraseSize);
  822. if (E_OK != retReturnType)
  823. {
  824. return E_NOT_OK;
  825. }
  826. while (MEMIF_IDLE != Eep_GetStatus())
  827. {
  828. Eep_MainFunction();
  829. }
  830. retJobResultType = Eep_GetJobResult();
  831. if (MEMIF_JOB_OK != retJobResultType)
  832. {
  833. return E_NOT_OK;
  834. }
  835. return E_OK;
  836. }
  837. /* Write one or more complete eeprom pages to the eeprom device */
  838. Std_ReturnType HAL_EEP_Write(uint32 eepWriteStartAddr, uint8 *pDataNeedtoWrite, uint32 dataSize)
  839. {
  840. Std_ReturnType retReturnType = E_OK;
  841. MemIf_JobResultType retJobResultType;
  842. /*Erase the EEP before write*/
  843. retReturnType = HAL_EEP_Erase(eepWriteStartAddr, dataSize);
  844. if (E_OK != retReturnType)
  845. {
  846. return E_NOT_OK;
  847. }
  848. retReturnType = Eep_Write(eepWriteStartAddr, pDataNeedtoWrite, dataSize);
  849. if (E_OK != retReturnType)
  850. {
  851. return E_NOT_OK;
  852. }
  853. while (MEMIF_IDLE != Eep_GetStatus())
  854. {
  855. Eep_MainFunction();
  856. }
  857. retJobResultType = Eep_GetJobResult();
  858. if (MEMIF_JOB_OK != retJobResultType)
  859. {
  860. return E_NOT_OK;
  861. }
  862. return E_OK;
  863. }
  864. /* Reads from eeprom memory */
  865. Std_ReturnType HAL_EEP_Read(uint32 eepReadStartAddr, uint8 *pDataBuffer, uint32 dataSize)
  866. {
  867. Std_ReturnType retReturnType = E_OK;
  868. MemIf_JobResultType retJobResultType;
  869. retReturnType = Eep_Read(eepReadStartAddr, pDataBuffer, dataSize);
  870. if (E_OK != retReturnType)
  871. {
  872. return E_NOT_OK;
  873. }
  874. while (MEMIF_IDLE != Eep_GetStatus())
  875. {
  876. Eep_MainFunction();
  877. }
  878. retJobResultType = Eep_GetJobResult();
  879. if (MEMIF_JOB_OK != retJobResultType)
  880. {
  881. return E_NOT_OK;
  882. }
  883. return E_OK;
  884. }
  885. /* Compares a eeprom memory area with an application data buffer */
  886. Std_ReturnType HAL_EEP_Compare(uint32 eepCompareStartAddr, uint8 *pDataNeedtoCompare, uint32 dataSize)
  887. {
  888. Std_ReturnType retReturnType = E_OK;
  889. MemIf_JobResultType retJobResultType;
  890. retReturnType = Eep_Compare(eepCompareStartAddr, pDataNeedtoCompare, dataSize);
  891. if (E_OK != retReturnType)
  892. {
  893. return E_NOT_OK;
  894. }
  895. while (MEMIF_IDLE != Eep_GetStatus())
  896. {
  897. Eep_MainFunction();
  898. }
  899. retJobResultType = Eep_GetJobResult();
  900. if (MEMIF_JOB_OK != retJobResultType)
  901. {
  902. return E_NOT_OK;
  903. }
  904. return E_OK;
  905. }
  906. /* @brief VECTKEY value so that AIRCR register write is not ignored. */
  907. #define FEATURE_SCB_VECTKEY (0x05FAU)
  908. void SystemSoftwareReset(void)
  909. {
  910. uint32_t regValue;
  911. /* Read Application Interrupt and Reset Control Register */
  912. regValue = S32_SCB->AIRCR;
  913. /* Clear register key */
  914. regValue &= ~( S32_SCB_AIRCR_VECTKEY_MASK);
  915. /* Configure System reset request bit and Register Key */
  916. regValue |= S32_SCB_AIRCR_VECTKEY(FEATURE_SCB_VECTKEY);
  917. regValue |= S32_SCB_AIRCR_SYSRESETREQ(0x1u);
  918. /* Write computed register value */
  919. S32_SCB->AIRCR = regValue;
  920. }