hal_adapter.c 41 KB

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  1. /*
  2. * hal_adapter.c
  3. *中间层函数调用库
  4. * Created on: 2022年1月18日
  5. * Author: QiXiang_CHENJIE
  6. */
  7. #include "hal_adapter.h"
  8. #include "AppGlobalVar.h"
  9. #include "stdio.h"
  10. #include "stdarg.h"
  11. /********************************/
  12. #include "Icu.h"
  13. #include "Gpt.h"
  14. uint8_t __attribute__((section(".non_cacheable_data"))) RX_Buffer[3][BUFFER_SIZE];
  15. uint32_t bufferIdx[3] = {0};
  16. volatile uint32 VarNotification_0 = 0;
  17. volatile uint32 VarNotification_1 = 0;
  18. TP_Value_Type ConvertedBuffer[NUM_RESULTS];
  19. Adc_ValueGroupType ResultBuffer[NUM_RESULTS];
  20. volatile Uart_StatusType Uart_TransmitStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  21. QueueHandle_t UartRecvQueue[3];
  22. QueueHandle_t TcpRecvQueue;
  23. QueueHandle_t UartSendQueue[3];
  24. QueueHandle_t UartHalQueueHandle;
  25. Std_ReturnType UartStartRecvFunc(uint8 channel);
  26. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR);
  27. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len);
  28. void clear_ringBuffer(ringbuffer_t *ringBuf);
  29. uint32_t write_ringBuffer(uint8_t *buffer, uint16_t size, ringbuffer_t *ringBuf,uint32 *uartDataAddr);
  30. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  31. uint8 ringBufferforUart[3][BUFFER_SIZE];
  32. ringbuffer_t uartRingBuffer[3];
  33. sint8 AtcmdDelayRecvFunc(uint8 recvChannel,char *ResultStrPtr,uint16 delayTime)
  34. {
  35. sint8 outValue = -1;
  36. uint8 delayCnt = 0;
  37. uint8 UartData[256];
  38. uint16 ReadLen = 0;
  39. char *retptr = NULL;
  40. while (delayCnt<(delayTime/1000)&&outValue!=0)
  41. {
  42. UART_Receive_Data(recvChannel,UartData, &ReadLen,1000);
  43. if(ReadLen>0)
  44. {
  45. retptr = (char *)strstr((char *)UartData, ResultStrPtr);
  46. if (retptr)
  47. {
  48. outValue = 0;
  49. break;
  50. }
  51. }
  52. else
  53. {
  54. delayCnt++;
  55. }
  56. }
  57. return outValue;
  58. }
  59. #if 0
  60. uint16 myPrintf(const char *fmt, ...)
  61. {
  62. int n;
  63. uint8 databuffer[512]={0};
  64. va_list args;
  65. va_start(args, fmt);
  66. n = vsprintf((char *)databuffer, fmt, args);
  67. va_end(args);
  68. if( (printfRingBuffer.bw + n) <= printfRingBuffer.length )
  69. {
  70. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  71. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  72. printfRingBuffer.bw = printfRingBuffer.bw + n;
  73. }
  74. else
  75. {
  76. printfRingBuffer.bw = 0;
  77. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  78. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  79. }
  80. return n;
  81. }
  82. #endif
  83. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len)
  84. {
  85. ringBuf->br = 0;
  86. ringBuf->bw = 0;
  87. ringBuf->btoRead = 0;
  88. ringBuf->source = buf;
  89. ringBuf->length = buf_len;
  90. }
  91. void clear_ringBuffer(ringbuffer_t *ringBuf)
  92. {
  93. ringBuf->br = 0;
  94. ringBuf->bw = 0;
  95. ringBuf->btoRead = 0;
  96. }
  97. uint32_t write_ringBuffer(uint8_t *buffer, uint16_t size, ringbuffer_t *ringBuf,uint32 *uartDataAddr)
  98. {
  99. volatile uint32_t ringBuf_bw = ringBuf->bw;
  100. uint32_t ringBuf_len = ringBuf->length;
  101. uint8_t *ringBuf_source = ringBuf->source;
  102. if( (ringBuf_bw + size + 1) > ringBuf_len )
  103. {
  104. ringBuf_bw = 0;
  105. }
  106. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  107. memset(ringBuf_source + ringBuf_bw + size + 1,0x00,1);//环形buffer 插入分隔符截断字符串
  108. ringBuf->bw = (ringBuf_bw + size + 1) % ringBuf_len;//数据长度不变,起始地址移位1
  109. ringBuf->btoRead += size;
  110. *uartDataAddr = (uint32)(ringBuf->source + ringBuf->bw - size - 1);
  111. /*
  112. if(ringBuf->br!=0)
  113. {
  114. memcpy(ringBuf_source, buffer, size);
  115. ringBuf->br = 0;
  116. }
  117. */
  118. /*
  119. if( (ringBuf_bw + size) <= ringBuf_len )
  120. {
  121. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  122. }
  123. else
  124. {
  125. len = ringBuf_len - ringBuf_bw;
  126. memcpy(ringBuf_source + ringBuf_bw, buffer, len);
  127. memcpy(ringBuf_source, buffer + ringBuf_bw, size - len);
  128. }
  129. ringBuf->bw = (ringBuf->bw + size) % ringBuf_len;
  130. ringBuf->btoRead += size;
  131. */
  132. return size;
  133. }
  134. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  135. {
  136. uint32_t len = 0;
  137. volatile uint32_t ringBuf_br = ringBuf->br;
  138. uint32_t ringBuf_len = ringBuf->length;
  139. uint8_t *ringBuf_source = ringBuf->source;
  140. memcpy(buffer, ringBuf_source, size);
  141. ringBuf->br = size;
  142. // if( (ringBuf_br + size ) <= ringBuf_len )
  143. // {
  144. // memcpy(buffer, ringBuf_source + ringBuf_br, size);
  145. // }
  146. // else
  147. // {
  148. // len = ringBuf_len - ringBuf_br;
  149. // memcpy(buffer, ringBuf_source + ringBuf_br, len);
  150. // memcpy(buffer + len, ringBuf_source, size - len);
  151. // }
  152. // ringBuf->br = (ringBuf->br + size) % ringBuf_len;
  153. // ringBuf->btoRead -= size;
  154. return size;
  155. }
  156. Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, uint8 *txBuffer, uint16 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  157. {
  158. UartMsg_t UartRecvMsg;
  159. UartMsg_t UartSendMsg;
  160. BaseType_t Sendret = pdFALSE;
  161. BaseType_t Recvret = pdFALSE;
  162. uint32 retVal = E_NOT_OK;
  163. UartSendMsg.DataLen = sendLength;
  164. UartSendMsg.dataPtr = txBuffer;
  165. *rxlen = 0;
  166. Sendret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,50);
  167. if(Sendret == pdTRUE)
  168. {
  169. Recvret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  170. if(Recvret == pdTRUE)
  171. {
  172. *rxlen = UartRecvMsg.DataLen;
  173. memcpy(rxBuffer,(uint8 *)(UartRecvMsg.dataAddr),UartRecvMsg.DataLen);
  174. retVal = E_OK;
  175. }
  176. else
  177. {
  178. retVal = 3;
  179. }
  180. }
  181. else
  182. {
  183. retVal = 2;
  184. }
  185. return retVal;
  186. }
  187. Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  188. {
  189. UartMsg_t UartRecvMsg;
  190. BaseType_t ret = pdFALSE;
  191. uint32 retVal = E_NOT_OK;
  192. *rxlen = 0;
  193. ret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  194. if(ret == pdTRUE)
  195. {
  196. *rxlen = UartRecvMsg.DataLen;
  197. memcpy(rxBuffer,(uint8 *)UartRecvMsg.dataAddr,UartRecvMsg.DataLen);
  198. retVal = E_OK;
  199. }
  200. return retVal;
  201. }
  202. Std_ReturnType Tcp_Receive_Data(uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  203. {
  204. UartMsg_t UartRecvMsg;
  205. BaseType_t ret = pdFALSE;
  206. uint32 retVal = E_NOT_OK;
  207. *rxlen = 0;
  208. ret = xQueueReceive(TcpRecvQueue,&UartRecvMsg,T_timeout);
  209. if(ret == pdTRUE)
  210. {
  211. *rxlen = UartRecvMsg.DataLen;
  212. memcpy(rxBuffer,(uint8 *)UartRecvMsg.dataAddr,UartRecvMsg.DataLen);
  213. retVal = E_OK;
  214. }
  215. return retVal;
  216. }
  217. Std_ReturnType UART_Reset(uint8 recvChannel)
  218. {
  219. uint32 retVal = E_NOT_OK;
  220. retVal = xQueueReset(UartRecvQueue[recvChannel]);
  221. return retVal;
  222. }
  223. Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  224. {
  225. UartMsg_t UartSendMsg;
  226. BaseType_t ret = pdFALSE;
  227. uint32 retVal = E_NOT_OK;
  228. UartSendMsg.DataLen = sendLength;
  229. UartSendMsg.dataPtr = txBuffer;
  230. ret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,T_timeout);
  231. if(ret == pdTRUE)
  232. {
  233. retVal = E_OK;
  234. }
  235. return retVal;
  236. }
  237. void UartInit(void)
  238. {
  239. create_ringBuffer(&uartRingBuffer[0],ringBufferforUart[0],sizeof(ringBufferforUart[0]));
  240. create_ringBuffer(&uartRingBuffer[1],ringBufferforUart[1],sizeof(ringBufferforUart[1]));
  241. create_ringBuffer(&uartRingBuffer[2],ringBufferforUart[2],sizeof(ringBufferforUart[2]));
  242. UartRecvQueue[0] = xQueueCreate(6, sizeof(UartMsg_t));
  243. UartRecvQueue[1] = xQueueCreate(6, sizeof(UartMsg_t));
  244. UartRecvQueue[2] = xQueueCreate(6, sizeof(UartMsg_t));
  245. TcpRecvQueue = xQueueCreate(2, sizeof(UartMsg_t));
  246. UartSendQueue[0] = xQueueCreate(3, sizeof(UartMsg_t));
  247. UartSendQueue[1] = xQueueCreate(1, sizeof(UartMsg_t));
  248. UartSendQueue[2] = xQueueCreate(1, sizeof(UartMsg_t));
  249. UartHalQueueHandle = xQueueCreate(9, sizeof(UartHalMsg_t));
  250. xTaskCreate(Uart_Hal_RecvTask, (const char *const)"UartRecv", 256, (void *)0, main_TASK_PRIORITY + 5, &Uart_Hal_RecvTask_Handle);
  251. xTaskCreate(Uart_Hal_SendTask, (const char *const)"UartSend", 256, (void *)0, main_TASK_PRIORITY + 4, &Uart_Hal_SendTask_Handle);
  252. }
  253. Std_ReturnType UartStartRecvFunc(uint8 channel)
  254. {
  255. sint8 out = 0;
  256. volatile Std_ReturnType R_Uart_Status=E_NOT_OK;
  257. bufferIdx[channel]=0;
  258. memset(RX_Buffer[channel],0x00,BUFFER_SIZE);
  259. switch(channel)
  260. {
  261. case 0:
  262. IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  263. break;
  264. case 1:
  265. IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  266. break;
  267. case 2:
  268. IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  269. break;
  270. default:
  271. break;
  272. }
  273. Uart_SetBuffer(channel, RX_Buffer[channel], DMA_SIZE, UART_RECEIVE);
  274. R_Uart_Status = Uart_AsyncReceive(channel, RX_Buffer[channel], DMA_SIZE);
  275. if (E_OK != R_Uart_Status)
  276. {
  277. Uart_Abort(channel, UART_RECEIVE);
  278. out = E_NOT_OK;
  279. }
  280. return out;
  281. }
  282. void Uart_Hal_RecvTask(void *pvParameters)
  283. {
  284. UartHalMsg_t UartHalMsgRecv;
  285. UartMsg_t UartRecvMsg;
  286. uint16 recvSize = 0;
  287. BaseType_t ret = pdFALSE;
  288. BaseType_t ret_send = pdFALSE;
  289. uint32 T_bytesRemaining[3] = {0};
  290. uint16 T_timeout[3] = {0};
  291. volatile Uart_StatusType Uart_ReceiveStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  292. uint8 UartIdx = UART_LPUART0;
  293. uint8 UartState[3] = {UartAbortRecv,UartAbortRecv,UartAbortRecv};
  294. while(1)
  295. {
  296. if((T_timeout[UartIdx]>1000) && (Uart_ReceiveStatus[UartIdx] != UART_STATUS_NO_ERROR) )
  297. {
  298. Uart_Abort(UartIdx, UART_RECEIVE);
  299. UartState[UartIdx] = UartAbortRecv;
  300. T_timeout[UartIdx] = 0;
  301. }
  302. else if(Uart_ReceiveStatus[UartIdx] == UART_STATUS_NO_ERROR)
  303. {
  304. UartState[UartIdx] = UartRecvComplete;
  305. }
  306. if((UartState[UartIdx] == UartAbortRecv) || (UartState[UartIdx] == UartRecvComplete))
  307. {
  308. if(E_OK == UartStartRecvFunc(UartIdx))
  309. {
  310. UartState[UartIdx] = UartStartRecv;
  311. }
  312. }
  313. Uart_ReceiveStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_RECEIVE);
  314. T_timeout[UartIdx]++;
  315. UartIdx = (UartIdx + 1) > 2 ? 1 : (UartIdx + 1);
  316. ret = xQueueReceive(UartHalQueueHandle,&UartHalMsgRecv,1);
  317. if(ret==pdTRUE)
  318. {
  319. if(UartHalMsgRecv.event==LPUART_UART_IP_EVENT_RECV_IDLE)
  320. {
  321. if(UartHalMsgRecv.value>0)
  322. {
  323. recvSize = write_ringBuffer(RX_Buffer[UartHalMsgRecv.Channel],UartHalMsgRecv.value,&uartRingBuffer[UartHalMsgRecv.Channel],&(UartRecvMsg.dataAddr));
  324. UartRecvMsg.DataLen = UartHalMsgRecv.value;
  325. if(UartHalMsgRecv.Channel==1 && strstr((char *)UartRecvMsg.dataAddr, (char *)("RECV FROM")))//网络接收数据放入其他队列
  326. {
  327. ret_send = xQueueSend(TcpRecvQueue,&UartRecvMsg,10);
  328. }
  329. else
  330. {
  331. ret_send = xQueueSend(UartRecvQueue[UartHalMsgRecv.Channel],&UartRecvMsg,10);
  332. }
  333. T_timeout[UartHalMsgRecv.Channel] = 0;
  334. UartState[UartHalMsgRecv.Channel] = UartRecvComplete;
  335. }
  336. }
  337. }
  338. }
  339. }
  340. void Uart_Hal_SendTask(void *pvParameters)
  341. {
  342. UartMsg_t UartSendMsg;
  343. BaseType_t ret = pdFALSE;
  344. uint32 T_bytesRemaining[3] = {0};
  345. uint16 T_timeout[3] = {0};
  346. volatile Std_ReturnType T_Uart_Status[3];
  347. uint8 UartIdx = UART_LPUART0;
  348. uint8 UartSendState[3] = {UartNoDataSend,UartNoDataSend,UartNoDataSend};
  349. while(1)
  350. {
  351. ret = xQueueReceive(UartSendQueue[UartIdx],&UartSendMsg,1);
  352. if(ret==pdTRUE)
  353. {
  354. T_Uart_Status[UartIdx] = Uart_AsyncSend(UartIdx, UartSendMsg.dataPtr, UartSendMsg.DataLen);
  355. if (E_OK != T_Uart_Status[UartIdx])
  356. {
  357. Uart_Abort(UartIdx, UART_SEND);
  358. UartSendState[UartIdx] = UartAbortSend;
  359. }
  360. else
  361. {
  362. UartSendState[UartIdx] = UartStartSend;
  363. }
  364. }
  365. /*开始发送后的判定*/
  366. if(UartSendState[UartIdx] == UartStartSend)
  367. {
  368. Uart_TransmitStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_SEND);
  369. T_timeout[UartIdx]++;
  370. }
  371. if(T_timeout[UartIdx]>=1000 || ((Uart_TransmitStatus[UartIdx] != UART_STATUS_OPERATION_ONGOING) && (UartSendState[UartIdx] == UartStartSend)))
  372. {
  373. if(T_timeout[UartIdx]>=1000)
  374. {
  375. Uart_Abort(UartIdx, UART_SEND);
  376. UartSendState[UartIdx] = UartAbortSend;
  377. }
  378. else if(Uart_TransmitStatus[UartIdx] == UART_STATUS_NO_ERROR)
  379. {
  380. UartSendState[UartIdx] = UartSendComplete;
  381. }
  382. T_timeout[UartIdx] = 0;
  383. }
  384. UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
  385. }
  386. }
  387. //
  388. //Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, const uint8 *txBuffer, uint32 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  389. //{
  390. // volatile Std_ReturnType R_Uart_Status;
  391. // volatile Std_ReturnType T_Uart_Status;
  392. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  393. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  394. // uint32 T_bytesRemaining;
  395. // uint32 R_bytesRemaining;
  396. // uint32 timeout = T_timeout;
  397. // uint32 retVal = E_NOT_OK;
  398. // bufferIdx[recvChannel] = 0;
  399. // switch (recvChannel)
  400. // {
  401. // case 0:
  402. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  403. // break;
  404. // case 1:
  405. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  406. // break;
  407. // case 2:
  408. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  409. // break;
  410. // default:
  411. // break;
  412. // }
  413. // if (txBuffer == NULL || rxBuffer == NULL)
  414. // {
  415. // return retVal;
  416. // }
  417. //
  418. // /* Uart_AsyncSend transmit data */
  419. // Uart_SetBuffer(transChannel, txBuffer, sendLength, UART_SEND);
  420. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  421. // if (E_OK != T_Uart_Status)
  422. // {
  423. // Uart_Abort(transChannel, UART_SEND);
  424. // return E_NOT_OK;
  425. // }
  426. // Uart_SetBuffer(recvChannel, &RX_Buffer[recvChannel][0], DMA_SIZE, UART_RECEIVE);
  427. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  428. // if (E_OK != R_Uart_Status)
  429. // {
  430. // Uart_Abort(recvChannel, UART_RECEIVE);
  431. // return E_NOT_OK;
  432. // }
  433. // /* Check for no on-going transmission */
  434. // do
  435. // {
  436. // if (Uart_TransmitStatus != UART_STATUS_NO_ERROR)
  437. // {
  438. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  439. // }
  440. // if (Uart_ReceiveStatus != UART_STATUS_NO_ERROR)
  441. // {
  442. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &R_bytesRemaining, UART_RECEIVE);
  443. // }
  444. // vTaskDelay(pdMS_TO_TICKS(1));
  445. // } while (((UART_STATUS_NO_ERROR != Uart_TransmitStatus || UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < --timeout));
  446. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  447. // {
  448. // Uart_Abort(transChannel, UART_SEND);
  449. // retVal = E_NOT_OK;
  450. // }
  451. // else
  452. // {
  453. // retVal = E_OK;
  454. // }
  455. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  456. // {
  457. // Uart_Abort(recvChannel, UART_RECEIVE);
  458. // *rxlen = bufferIdx[recvChannel];
  459. // retVal = E_NOT_OK;
  460. // }
  461. // else
  462. // {
  463. // *rxlen = bufferIdx[recvChannel];
  464. // retVal = E_OK;
  465. // }
  466. // return retVal;
  467. //}
  468. //
  469. //Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  470. //{
  471. //
  472. // volatile Std_ReturnType T_Uart_Status;
  473. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  474. // uint32 T_bytesRemaining;
  475. // uint32 timeout = T_timeout;
  476. // uint32 retVal = E_NOT_OK;
  477. // if (txBuffer == NULL)
  478. // {
  479. // return retVal;
  480. // }
  481. //
  482. // /* Uart_AsyncSend transmit data */
  483. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  484. // if (E_OK != T_Uart_Status)
  485. // {
  486. // Uart_Abort(transChannel, UART_SEND);
  487. // return E_NOT_OK;
  488. // }
  489. // /* Check for no on-going transmission */
  490. // do
  491. // {
  492. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  493. // vTaskDelay(pdMS_TO_TICKS(1));
  494. // } while ((UART_STATUS_NO_ERROR != Uart_TransmitStatus && 0 < --timeout));
  495. //
  496. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  497. // {
  498. // retVal = E_NOT_OK;
  499. // }
  500. // else
  501. // {
  502. // retVal = E_OK;
  503. // }
  504. // return retVal;
  505. //}
  506. //
  507. //Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint16 *rxlen, sint32 T_timeout)
  508. //{
  509. // volatile Std_ReturnType R_Uart_Status = E_NOT_OK;
  510. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  511. // uint32 T_bytesRemaining = 0;
  512. // uint32 retVal = E_NOT_OK;
  513. // // uint8 Rx_Buffer[MSG_LEN];
  514. // bufferIdx[recvChannel] = 0;
  515. // *rxlen = 0;
  516. // if (rxBuffer == NULL)
  517. // {
  518. // return retVal;
  519. // }
  520. // /* Uart_AsyncReceive transmit data */
  521. // switch (recvChannel)
  522. // {
  523. // case 0:
  524. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  525. // break;
  526. // case 1:
  527. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  528. // break;
  529. // case 2:
  530. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  531. // break;
  532. // default:
  533. // break;
  534. // }
  535. // Uart_SetBuffer(recvChannel, rxBuffer, DMA_SIZE, UART_RECEIVE);
  536. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  537. // if (E_OK != R_Uart_Status)
  538. // {
  539. // Uart_Abort(recvChannel, UART_RECEIVE);
  540. // return E_NOT_OK;
  541. // }
  542. // /* Check for no on-going transmission */
  543. // do
  544. // {
  545. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &T_bytesRemaining, UART_RECEIVE);
  546. // vTaskDelay(pdMS_TO_TICKS(1));
  547. //
  548. // } while ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < T_timeout--);
  549. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  550. // {
  551. // Uart_Abort(recvChannel, UART_RECEIVE);
  552. // *rxlen = bufferIdx[recvChannel];
  553. // retVal = E_NOT_OK;
  554. // }
  555. // else
  556. // {
  557. // *rxlen = bufferIdx[recvChannel];
  558. // retVal = E_OK;
  559. // }
  560. // return retVal;
  561. //}
  562. extern Lpuart_Uart_Ip_StateStructureType *Lpuart_Uart_Ip_apStateStructuresArray[LPUART_UART_IP_NUMBER_OF_INSTANCES];
  563. void UART_Callback(uint32 hwInstance, Lpuart_Uart_Ip_EventType event)
  564. {
  565. // (void)userData;
  566. Lpuart_Uart_Ip_StateStructureType * UartState;
  567. UartState = (Lpuart_Uart_Ip_StateStructureType *)Lpuart_Uart_Ip_apStateStructuresArray[hwInstance];
  568. /* Check the event type */
  569. if (event == LPUART_UART_IP_EVENT_RX_FULL)
  570. {
  571. /* The reception stops when receiving idle is detected or the buffer is full */
  572. if (bufferIdx[hwInstance] <= (BUFFER_SIZE - DMA_SIZE))
  573. {
  574. /* Update the buffer index and the rx buffer */
  575. bufferIdx[hwInstance] += DMA_SIZE;
  576. Uart_SetBuffer(hwInstance, &RX_Buffer[hwInstance][bufferIdx[hwInstance]], DMA_SIZE, UART_RECEIVE);
  577. // Lpuart_Uart_Ip_SetRxBuffer(hwInstance, &RX_Buffer[bufferIdx], DMA_SIZE);
  578. }
  579. }
  580. if (event == LPUART_UART_IP_EVENT_ERROR)
  581. {
  582. // /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  583. // temp = DMA_SIZE - (uint32_t)IP_DMA->TCD->CITER.ELINKNO;
  584. // /*Add the remaining data size to the sum of the received size*/
  585. // bufferIdx[hwInstance] += temp;
  586. /*Abort the receiving after detecting IDLE receiving*/
  587. Lpuart_Uart_Ip_AbortReceivingData(hwInstance);
  588. Lpuart_Uart_Ip_AbortSendingData(hwInstance);
  589. // bufferIdx = 0;
  590. }
  591. if (event == LPUART_UART_IP_EVENT_RECV_IDLE)
  592. {
  593. uint32_t temp;
  594. UartHalMsg_t UartHalMsg;
  595. UartHalMsg.Channel = hwInstance;
  596. UartHalMsg.event = event;
  597. /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  598. temp = DMA_SIZE - (uint32_t)IP_DMA->TCD[hwInstance].CITER.ELINKNO;
  599. /*Add the remaining data size to the sum of the received size*/
  600. bufferIdx[hwInstance] += temp;
  601. /*Abort the receiving after detecting IDLE receiving*/
  602. UartHalMsg.value = bufferIdx[hwInstance];
  603. xQueueSendFromISR(UartHalQueueHandle,&UartHalMsg,pdFALSE);
  604. }
  605. }
  606. /*CAN*/
  607. Can_PduType Can_CreatePduInfo(Can_IdType id, CAN_IdFrameType idFrame, PduIdType swPduHandle, uint8 length, uint8 *sdu)
  608. {
  609. Can_PduType PduInfo;
  610. switch (idFrame)
  611. {
  612. case CAN_STANDARD_ID_TYPE:
  613. id = id & 0x7FF;
  614. break;
  615. case CANFD_STANDARD_ID_TYPE:
  616. id = (id & 0x7FF) | 0x40000000;
  617. break;
  618. case CAN_EXTENDED_ID_TYPE:
  619. id = id | 0x80000000;
  620. break;
  621. case CANFD_EXTENDED_ID_TYPE:
  622. id = id | 0xC0000000;
  623. break;
  624. default:
  625. id = id & 0x7FF;
  626. break;
  627. }
  628. PduInfo.id = id;
  629. PduInfo.swPduHandle = swPduHandle;
  630. PduInfo.length = length;
  631. PduInfo.sdu = sdu;
  632. return PduInfo;
  633. }
  634. Std_ReturnType CanIf_SendMessage(uint8 ControllerId, Can_Msg_Type CanMsg)
  635. {
  636. volatile Can_PduType Can_PduInfo;
  637. volatile Std_ReturnType CAN_Write_Status;
  638. Std_ReturnType retVal = E_NOT_OK;
  639. uint32 u8TimeOut = 100 * 100;
  640. Can_HwHandleType Hth = Can0HardwareObject_TX + (Can_HwHandleType)ControllerId; // controller 0 --> Can0HardwareObject_TX
  641. Can_PduInfo = Can_CreatePduInfo(CanMsg.id, CanMsg.idFrame, 0, CanMsg.length, CanMsg.sdu);
  642. CAN_Write_Status = Can_Write(Hth, &Can_PduInfo);
  643. CanIf_bTxFlag = FALSE;
  644. if (CAN_Write_Status == E_OK)
  645. {
  646. while ((!CanIf_bTxFlag) && (u8TimeOut != 0U))
  647. {
  648. Can_MainFunction_Write();
  649. u8TimeOut--;
  650. }
  651. }
  652. if (CanIf_bTxFlag == TRUE)
  653. {
  654. retVal = E_OK;
  655. }
  656. else
  657. {
  658. retVal = E_NOT_OK;
  659. }
  660. return retVal;
  661. }
  662. Can_Msg_Type Can_GetMsgInfo(Can_IdType id, uint8 length, uint8 *sdu)
  663. {
  664. Can_Msg_Type CanMsgInfo;
  665. CanMsgInfo.idFrame = (CAN_IdFrameType)((id >> 30) & 0x03);
  666. if (CanMsgInfo.idFrame & 0x01)
  667. {
  668. CanMsgInfo.id = id & 0x7FF;
  669. }
  670. else
  671. {
  672. CanMsgInfo.id = id & 0x1FFFFFFF;
  673. }
  674. CanMsgInfo.length = length;
  675. CanMsgInfo.sdu = sdu;
  676. return CanMsgInfo;
  677. }
  678. void CanIf_ControllerBusOff(uint8 ControllerId)
  679. {
  680. (void)ControllerId;
  681. }
  682. void CanIf_ControllerModeIndication(uint8 ControllerId, Can_ControllerStateType ControllerMode)
  683. {
  684. (void)ControllerId;
  685. (void)ControllerMode;
  686. }
  687. void CanIf_TxConfirmation(PduIdType CanTxPduId)
  688. {
  689. CanIf_u8TxConfirmCnt++;
  690. CanIf_bTxFlag = TRUE;
  691. (void)CanTxPduId;
  692. }
  693. void CanIf_RxIndication(const Can_HwType *Mailbox, const PduInfoType *PduInfoPtr)
  694. {
  695. Can_Msg_Type canRxMsg_Buff;
  696. Can_Msg_Type_Data canRxMsgQueueData;
  697. CanIf_bRxFlag = TRUE; // should not be delete
  698. // should put the msg into message queue
  699. canRxMsg_Buff = Can_GetMsgInfo(Mailbox->CanId, PduInfoPtr->SduLength, PduInfoPtr->SduDataPtr);
  700. canRxMsgQueueData.id = canRxMsg_Buff.id;
  701. canRxMsgQueueData.length = canRxMsg_Buff.length;
  702. memcpy(canRxMsgQueueData.data, canRxMsg_Buff.sdu, canRxMsgQueueData.length);
  703. switch(Mailbox->Hoh)
  704. {
  705. case 0:
  706. xQueueSend(CanRecvQueueHandle0, &canRxMsgQueueData, 0);
  707. break;
  708. case 1:
  709. xQueueSend(CanRecvQueueHandle1, &canRxMsgQueueData, 0);
  710. break;
  711. case 2:
  712. xQueueSend(CanRecvQueueHandle2, &canRxMsgQueueData, 0);
  713. break;
  714. }
  715. }
  716. void CanIf_CurrentIcomConfiguration(uint8 ControllerId, IcomConfigIdType ConfigurationId, IcomSwitch_ErrorType Error)
  717. {
  718. (void)ControllerId;
  719. (void)ConfigurationId;
  720. (void)Error;
  721. }
  722. void Notification_0(void)
  723. {
  724. ADC_Converter(ResultBuffer, ConvertedBuffer);
  725. memcpy(BattTempR, &ConvertedBuffer[3], 4 * sizeof(uint32));
  726. }
  727. void Notification_1(void)
  728. {
  729. VarNotification_1++;
  730. }
  731. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR)
  732. {
  733. Adc_ValueGroupType REFH, REFL;
  734. REFH = Buffer[0];
  735. REFL = Buffer[2];
  736. for (int i = 3; i < NUM_RESULTS; i++)
  737. {
  738. if (Buffer[i] >= REFH)
  739. {
  740. ConvertedValueR[i] = 40930000;
  741. }
  742. else if (Buffer[i] <= REFL)
  743. {
  744. ConvertedValueR[i] = 0x00;
  745. }
  746. else
  747. {
  748. ConvertedValueR[i] = (TP_Value_Type)((float)(10000 * (Buffer[i] - REFL) / (float)(REFH - REFL)) / (1 - (float)((Buffer[i] - REFL) / (float)(REFH - REFL))));
  749. }
  750. }
  751. return 0;
  752. }
  753. Std_ReturnType ADC_ReadValue()
  754. {
  755. Std_ReturnType ret = E_NOT_OK;
  756. for (uint8 i = 0; i < NUM_RESULTS; i++)
  757. {
  758. ResultBuffer[i] = 0xFFFF;
  759. ConvertedBuffer[i] = 0x00;
  760. }
  761. Adc_SetupResultBuffer(AdcGroupSoftwareOneShot, ResultBuffer);
  762. Adc_EnableGroupNotification(AdcGroupSoftwareOneShot);
  763. VarNotification_0 = 0;
  764. Adc_StartGroupConversion(AdcGroupSoftwareOneShot);
  765. return ret;
  766. }
  767. /*EEP*/
  768. static Std_ReturnType TestEep_FlexNvmProgramPartCmd(
  769. VAR(TestEep_CsecKeySize, AUTOMATIC) eepKeysize,
  770. VAR(TestEep_SfeType, AUTOMATIC) eepSecurityFlagExtension,
  771. VAR(TestEep_LoadFlexRamType, AUTOMATIC) eepLoadFlexRamAtReset,
  772. VAR(TestEep_Eeprom_FlexRamPartitionType, AUTOMATIC) eepFlexRamPartition,
  773. VAR(TestEep_Eeprom_FlexNvmPartitionType, AUTOMATIC) eepFlexNvmPartition)
  774. {
  775. Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
  776. uint32 u32FlexNvmPartSize = 0;
  777. uint32 u32RegSimFcfg1 = 0UL;
  778. u32RegSimFcfg1 = IP_SIM->FCFG1;
  779. /*get DEPART value */
  780. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  781. /* check that it was not partitioned before */
  782. if (u32FlexNvmPartSize == 0xF)
  783. {
  784. // /* if error flags are set the cmd is not executed */
  785. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8);
  786. //
  787. // /*erase DF 0 sector*/
  788. // u32Addr=(TEST_EEP_DEEPROM_SECTOR_0_ADDR32 - D_EEPROM_BASE_ADDR) + 0x800000UL;
  789. //
  790. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, TEST_EEP_EEPROM_CMD_ERASE_SECTOR);
  791. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)(u32Addr >> 16UL));
  792. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)(u32Addr >> 8UL));
  793. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)(u32Addr >> 0UL));
  794. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32 , TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  795. // while((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  796. // {
  797. // }
  798. //
  799. if (0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  800. {
  801. /* run program partition command */
  802. REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, EEPROM_CMD_PROGRAM_PARTITION);
  803. REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)eepKeysize);
  804. REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)eepSecurityFlagExtension);
  805. REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)eepLoadFlexRamAtReset);
  806. REG_WRITE8(TEST_EEP_EEPROM_FCCOB4_ADDR32, (uint8)eepFlexRamPartition);
  807. REG_WRITE8(TEST_EEP_EEPROM_FCCOB5_ADDR32, (uint8)eepFlexNvmPartition);
  808. REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  809. while ((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  810. {
  811. /* wait for operation to finish */
  812. }
  813. /* check if errors occured */
  814. if (REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  815. {
  816. /* NOK, error flags are set */
  817. u8RetVal = (Std_ReturnType)E_NOT_OK;
  818. }
  819. }
  820. else
  821. {
  822. /* NOK, error flags are set */
  823. u8RetVal = (Std_ReturnType)E_NOT_OK;
  824. }
  825. }
  826. else
  827. {
  828. /* NOK, partitioned already */
  829. u8RetVal = (Std_ReturnType)E_NOT_OK;
  830. }
  831. return u8RetVal;
  832. }
  833. void Eep_DepartParitition(TestEep_Eeprom_FlexNvmPartitionType T_EEP_SIZE)
  834. {
  835. uint32 u32FlexNvmPartSize = 0;
  836. uint32 u32RegSimFcfg1 = 0UL;
  837. u32RegSimFcfg1 = IP_SIM->FCFG1;
  838. /*get DEPART value */
  839. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  840. if (u32FlexNvmPartSize == 0xF) /* We just partition again if curent size different with expected */
  841. {
  842. /* partition for EERAM 64K with NOT loading EERAM at reset in hardware */
  843. TestEep_FlexNvmProgramPartCmd(EEP_FTFC_KEY_SIZE_0_BYTES, EEP_FTFC_VERIFY_ONLY_DISABLED,
  844. EEP_FTFC_LOAD_AT_RESET_ENABLED, EEP_FTFC_EERAM_SIZE_4K, T_EEP_SIZE);
  845. }
  846. }
  847. /* Erase memory by writing erase value */
  848. Std_ReturnType HAL_EEP_Erase(uint32 eepEraseStartAddr, uint32 eepEraseSize)
  849. {
  850. Std_ReturnType retReturnType = E_OK;
  851. MemIf_JobResultType retJobResultType;
  852. retReturnType = Eep_Erase(eepEraseStartAddr, eepEraseSize);
  853. if (E_OK != retReturnType)
  854. {
  855. return E_NOT_OK;
  856. }
  857. while (MEMIF_IDLE != Eep_GetStatus())
  858. {
  859. Eep_MainFunction();
  860. }
  861. retJobResultType = Eep_GetJobResult();
  862. if (MEMIF_JOB_OK != retJobResultType)
  863. {
  864. return E_NOT_OK;
  865. }
  866. return E_OK;
  867. }
  868. /* Write one or more complete eeprom pages to the eeprom device */
  869. Std_ReturnType HAL_EEP_Write(uint32 eepWriteStartAddr, uint8 *pDataNeedtoWrite, uint32 dataSize)
  870. {
  871. Std_ReturnType retReturnType = E_OK;
  872. MemIf_JobResultType retJobResultType;
  873. /*Erase the EEP before write*/
  874. retReturnType = HAL_EEP_Erase(eepWriteStartAddr, dataSize);
  875. if (E_OK != retReturnType)
  876. {
  877. return E_NOT_OK;
  878. }
  879. retReturnType = Eep_Write(eepWriteStartAddr, pDataNeedtoWrite, dataSize);
  880. if (E_OK != retReturnType)
  881. {
  882. return E_NOT_OK;
  883. }
  884. while (MEMIF_IDLE != Eep_GetStatus())
  885. {
  886. Eep_MainFunction();
  887. }
  888. retJobResultType = Eep_GetJobResult();
  889. if (MEMIF_JOB_OK != retJobResultType)
  890. {
  891. return E_NOT_OK;
  892. }
  893. return E_OK;
  894. }
  895. /* Reads from eeprom memory */
  896. Std_ReturnType HAL_EEP_Read(uint32 eepReadStartAddr, uint8 *pDataBuffer, uint32 dataSize)
  897. {
  898. Std_ReturnType retReturnType = E_OK;
  899. MemIf_JobResultType retJobResultType;
  900. retReturnType = Eep_Read(eepReadStartAddr, pDataBuffer, dataSize);
  901. if (E_OK != retReturnType)
  902. {
  903. return E_NOT_OK;
  904. }
  905. while (MEMIF_IDLE != Eep_GetStatus())
  906. {
  907. Eep_MainFunction();
  908. }
  909. retJobResultType = Eep_GetJobResult();
  910. if (MEMIF_JOB_OK != retJobResultType)
  911. {
  912. return E_NOT_OK;
  913. }
  914. return E_OK;
  915. }
  916. /* Compares a eeprom memory area with an application data buffer */
  917. Std_ReturnType HAL_EEP_Compare(uint32 eepCompareStartAddr, uint8 *pDataNeedtoCompare, uint32 dataSize)
  918. {
  919. Std_ReturnType retReturnType = E_OK;
  920. MemIf_JobResultType retJobResultType;
  921. retReturnType = Eep_Compare(eepCompareStartAddr, pDataNeedtoCompare, dataSize);
  922. if (E_OK != retReturnType)
  923. {
  924. return E_NOT_OK;
  925. }
  926. while (MEMIF_IDLE != Eep_GetStatus())
  927. {
  928. Eep_MainFunction();
  929. }
  930. retJobResultType = Eep_GetJobResult();
  931. if (MEMIF_JOB_OK != retJobResultType)
  932. {
  933. return E_NOT_OK;
  934. }
  935. return E_OK;
  936. }
  937. /* @brief VECTKEY value so that AIRCR register write is not ignored. */
  938. #define FEATURE_SCB_VECTKEY (0x05FAU)
  939. void SystemSoftwareReset(void)
  940. {
  941. uint32_t regValue;
  942. /* Read Application Interrupt and Reset Control Register */
  943. regValue = S32_SCB->AIRCR;
  944. /* Clear register key */
  945. regValue &= ~( S32_SCB_AIRCR_VECTKEY_MASK);
  946. /* Configure System reset request bit and Register Key */
  947. regValue |= S32_SCB_AIRCR_VECTKEY(FEATURE_SCB_VECTKEY);
  948. regValue |= S32_SCB_AIRCR_SYSRESETREQ(0x1u);
  949. /* Write computed register value */
  950. S32_SCB->AIRCR = regValue;
  951. }
  952. void MCUSleep(void)
  953. {
  954. #if (ICU_PRECOMPILE_SUPPORT == STD_ON)
  955. Icu_Init(NULL_PTR);
  956. #elif (ICU_PRECOMPILE_SUPPORT == STD_OFF)
  957. Icu_Init(&Icu_Config_VS_0);
  958. #endif
  959. Mcu_SetMode(McuModeSettingConf_VLPS);
  960. // typedef void (*AppAddr)(void);
  961. // AppAddr resetHandle = (AppAddr)(0x14601);
  962. // OsIf_SuspendAllInterrupts();
  963. // (resetHandle)();
  964. SystemSoftwareReset();
  965. // coreInit();
  966. }
  967. void SystemDeinit(void)
  968. {
  969. Dio_WriteChannel(DioConf_DioChannel_PTA7_GPIO_OUT_MCU_4G_PWRKEY, STD_OFF);
  970. vTaskDelay(pdMS_TO_TICKS(3000));
  971. Dio_WriteChannel(DioConf_DioChannel_PTA6_GPIO_OUT_MCU_4G_POW_EN, STD_OFF);
  972. Dio_WriteChannel(DioConf_DioChannel_PTD1_GPIO_OUT_MCU_GPS_POW_EN, STD_OFF);//GPS ShutDown
  973. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_ON);
  974. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_ON);
  975. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_ON);
  976. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_ON);
  977. Dio_WriteChannel(DioConf_DioChannel_PTE9_GPIO_OUT_MCU_LED5, STD_ON);
  978. Uart_Deinit();
  979. Can_SetControllerMode(CanController_0, CAN_CS_STOPPED);
  980. Can_SetControllerMode(CanController_1, CAN_CS_STOPPED);
  981. // Can_SetControllerMode(CanController_2, CAN_CS_STOPPED);
  982. Can_DeInit();
  983. Adc_DeInit();
  984. Gpt_DisableNotification(GptConf_GptChannelConfiguration_GptChannelConfiguration_0);
  985. Gpt_DeInit();
  986. Spi_DeInit();
  987. Mcl_DeInit();
  988. //port DeInit
  989. for(int pinIndex = 0; pinIndex <PortConfigSet_PortContainer_GPIO_PTB4_GPIO_OUT_MCU_RS485_EN; pinIndex++)
  990. {
  991. if(pinIndex == PortConfigSet_PortContainer_CAN_PTA12_CAN1_RX_MCU_CAN1_RX /*|| pinIndex == PortConfigSet_PortContainer_INT_PTB0_LPTMR0_ATL3_MCU_CC1_INT || pinIndex == PortConfigSet_PortContainer_INT_PTE11_LPTMR0_ALT1_MCU_3D_INT1 || pinIndex == PortConfigSet_PortContainer_INT_PTD5_LPTMR0_ATL2_MCU_3D_INT2*/)
  992. {
  993. continue;
  994. }
  995. else
  996. {
  997. Port_SetAsUnusedPin(pinIndex);
  998. }
  999. }
  1000. Port_SetPinMode(PortConfigSet_PortContainer_CAN_PTA12_CAN1_RX_MCU_CAN1_RX,PORT_GPIO_MODE);
  1001. // systemInitFlag = false;
  1002. }
  1003. void MCUEnterSleep(void)
  1004. {
  1005. if(pdTRUE == xSemaphoreTake(sleep_mutex,1) && Fota_Process_Going == false)
  1006. {
  1007. extern boolean Uart_4G_Task_Sleep_FLag;
  1008. WdgDeInit();
  1009. Std_ReturnType Ret = E_NOT_OK;
  1010. uint8 appConfigWriteTimes = 0;
  1011. do
  1012. {
  1013. waitForSleepFlag = true;
  1014. //save the app configure before power off
  1015. if(Ret == E_NOT_OK)
  1016. {
  1017. AppConfigInfo.appSaveFlg = false;
  1018. Ret = HAL_EEP_Write(0,(uint8 *)&AppConfigInfo,sizeof(AppConfigInfo));
  1019. appConfigWriteTimes++;
  1020. }
  1021. vTaskDelay(pdMS_TO_TICKS(10));
  1022. }while(Uart_4G_Task_Sleep_FLag == false || (Ret == E_NOT_OK && appConfigWriteTimes<5) );
  1023. vTaskDelete(Uart_Hal_RecvTask_Handle);
  1024. vTaskDelete(Uart_Hal_SendTask_Handle);
  1025. vTaskDelete(CanTask_Handle);
  1026. vTaskDelete(GpsTask_Handle);
  1027. vTaskDelete(Uart_4G_Task_Handle);
  1028. SystemDeinit();
  1029. MCUSleep();
  1030. // WdgInit();
  1031. // DoResetECUWithWdg();
  1032. }
  1033. }
  1034. void coreInit(void)
  1035. {
  1036. /* Initialize the Mcu driver */
  1037. #if (MCU_PRECOMPILE_SUPPORT == STD_ON)
  1038. Mcu_Init(NULL_PTR);
  1039. #elif (MCU_PRECOMPILE_SUPPORT == STD_OFF)
  1040. Mcu_Init(&Mcu_Config_VS_0);
  1041. #endif /* (MCU_PRECOMPILE_SUPPORT == STD_ON) */
  1042. Mcu_InitClock(McuClockSettingConfig_0);
  1043. /* Wait until PLL is locked */
  1044. while (MCU_PLL_LOCKED != Mcu_GetPllStatus())
  1045. {
  1046. /* Busy wait until the System PLL is locked */
  1047. }
  1048. Mcu_DistributePllClock();
  1049. OsIf_Init(NULL_PTR);
  1050. Platform_Init(NULL_PTR);
  1051. /* Initialize all pins*/
  1052. #if (PORT_PRECOMPILE_SUPPORT == STD_ON)
  1053. Port_Init(NULL_PTR);
  1054. #elif (PORT_PRECOMPILE_SUPPORT == STD_OFF)
  1055. Port_Init(&Port_Config_VS_0);
  1056. #endif
  1057. }
  1058. void SystemModulesInit(void)
  1059. {
  1060. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1061. /* Initialize Mcl module */
  1062. Mcl_Init(NULL_PTR);
  1063. SEGGER_RTT_Init();
  1064. /* Initializes an UART driver*/
  1065. #if (UART_PRECOMPILE_SUPPORT == STD_ON)
  1066. Uart_Init(NULL_PTR);
  1067. #elif (UART_PRECOMPILE_SUPPORT == STD_OFF)
  1068. Uart_Init(&Uart_xConfig_VS_0);
  1069. #endif
  1070. IP_LPUART0->CTRL |= LPUART_CTRL_ILT(1);
  1071. IP_LPUART1->CTRL |= LPUART_CTRL_ILT(1);
  1072. IP_LPUART2->CTRL |= LPUART_CTRL_ILT(1);
  1073. IP_LPUART0->CTRL |= LPUART_CTRL_IDLECFG(3);
  1074. IP_LPUART1->CTRL |= LPUART_CTRL_IDLECFG(3);
  1075. IP_LPUART2->CTRL |= LPUART_CTRL_IDLECFG(3);
  1076. #if 1 /* Initialize Platform driver */
  1077. #if (CAN_PRECOMPILE_SUPPORT == STD_ON)
  1078. Can_Init(NULL_PTR);
  1079. #elif (CAN_PRECOMPILE_SUPPORT == STD_OFF)
  1080. Can_Init(&Can_Config_VS_0);
  1081. #endif
  1082. Can_SetControllerMode(CanController_0, CAN_CS_STARTED);
  1083. Can_SetControllerMode(CanController_1, CAN_CS_STARTED);
  1084. // Can_SetControllerMode(CanController_2, CAN_CS_STARTED);
  1085. #endif
  1086. #if (ADC_PRECOMPILE_SUPPORT == STD_ON)
  1087. Adc_Init(NULL_PTR);
  1088. #else
  1089. Adc_Init(&Adc_Config_VS_0);
  1090. #endif /* ADC_PRECOMPILE_SUPPORT == STD_ON */
  1091. /* Partition only if it was not partitioned before for EERAM with code 0x4 */
  1092. // Eep_DepartParitition(T_EEEPROM_SIZE);
  1093. /* Initialize Eep driver */
  1094. #if defined (EEP_PRECOMPILE_SUPPORT)
  1095. Eep_Init(NULL_PTR);
  1096. #else
  1097. Eep_Init(&Eep_Config_VS_0);
  1098. #endif
  1099. //Init Flash Driver
  1100. #if defined (FLS_PRECOMPILE_SUPPORT)
  1101. Fls_Init(NULL_PTR);
  1102. #else
  1103. Fls_Init(&Fls_Config_VS_0);
  1104. while(MEMIF_IDLE == Fls_GetStatus())
  1105. {
  1106. ;
  1107. }
  1108. #endif
  1109. Spi_Init(NULL_PTR);
  1110. /* Initialize the Gpt driver */
  1111. Gpt_Init(&Gpt_Config_VS_0);
  1112. /* Enable the Gpt notification to periodically service the Wdg */
  1113. Gpt_EnableNotification(GptConf_GptChannelConfiguration_GptChannelConfiguration_0);
  1114. Icu_DeInit();
  1115. WdgInit();
  1116. IsFeedWdg = true;
  1117. }
  1118. void displayResetReasonWithLED(void)
  1119. {
  1120. Mcu_ResetType bootreason;
  1121. bootreason = Mcu_GetResetReason();
  1122. if(bootreason == MCU_STOP_ACKNOWLEDGE_ERROR_RESET)
  1123. {
  1124. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1125. // Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1126. // Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1127. // Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1128. }
  1129. else if(bootreason == MCU_MDM_AP_SYSTEM_RESET)
  1130. {
  1131. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1132. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1133. // Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1134. // Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1135. }
  1136. else if(bootreason == MCU_SW_RESET)
  1137. {
  1138. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1139. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1140. // Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1141. // Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1142. }
  1143. else if(bootreason == MCU_CORE_LOCKUP_RESET)
  1144. {
  1145. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1146. // Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1147. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1148. // Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1149. }
  1150. else if(bootreason == MCU_JTAG_RESET)
  1151. {
  1152. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1153. // Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1154. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1155. // Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1156. }
  1157. else if(bootreason == MCU_POWER_ON_RESET)
  1158. {
  1159. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1160. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1161. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1162. // Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1163. }
  1164. else if(bootreason == MCU_EXTERNAL_PIN_RESET)
  1165. {
  1166. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1167. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1168. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1169. // Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1170. }
  1171. else if(bootreason == MCU_WATCHDOG_RESET)
  1172. {
  1173. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1174. // Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1175. // Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1176. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1177. }
  1178. else if(bootreason == MCU_CMU_LOSS_OF_CLOCK_RESET)
  1179. {
  1180. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1181. // Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1182. // Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1183. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1184. }
  1185. else if(bootreason == MCU_LOSS_OF_LOCK_RESET)
  1186. {
  1187. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1188. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1189. // Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1190. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1191. }
  1192. else if(bootreason == MCU_LOSS_OF_CLOCK_RESET)
  1193. {
  1194. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1195. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1196. // Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1197. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1198. }
  1199. else if(bootreason == MCU_LOW_OR_HIGH_VOLTAGE_DETECT_RESET)
  1200. {
  1201. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1202. // Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1203. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1204. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1205. }
  1206. else if(bootreason == MCU_NO_RESET_REASON)
  1207. {
  1208. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1209. // Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1210. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1211. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1212. }
  1213. else if(bootreason == MCU_MULTIPLE_RESET_REASON)
  1214. {
  1215. // Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1216. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1217. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1218. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1219. }
  1220. else if(bootreason == MCU_RESET_UNDEFINED)
  1221. {
  1222. Dio_WriteChannel(DioConf_DioChannel_PTE0_GPIO_OUT_MCU_LED1, STD_OFF);
  1223. Dio_WriteChannel(DioConf_DioChannel_PTE1_GPIO_OUT_MCU_LED2, STD_OFF);
  1224. Dio_WriteChannel(DioConf_DioChannel_PTE7_GPIO_OUT_MCU_LED3, STD_OFF);
  1225. Dio_WriteChannel(DioConf_DioChannel_PTE8_GPIO_OUT_MCU_LED4, STD_OFF);
  1226. }
  1227. }