startup_cm4.s 14 KB

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  1. /*==================================================================================================
  2. * Project : RTD AUTOSAR 4.4
  3. * Platform : CORTEXM
  4. * Peripheral :
  5. * Dependencies : none
  6. *
  7. * Autosar Version : 4.4.0
  8. * Autosar Revision : ASR_REL_4_4_REV_0000
  9. * Autosar Conf.Variant :
  10. * SW Version : 1.0.0
  11. * Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
  12. *
  13. * (c) Copyright 2020-2021 NXP Semiconductors
  14. * All Rights Reserved.
  15. *
  16. * NXP Confidential. This software is owned or controlled by NXP and may only be
  17. * used strictly in accordance with the applicable license terms. By expressly
  18. * accepting such terms or by downloading, installing, activating and/or otherwise
  19. * using the software, you are agreeing that you have read, and that you agree to
  20. * comply with and are bound by, such license terms. If you do not agree to be
  21. * bound by the applicable license terms, then you may not retain, install,
  22. * activate or otherwise use the software.
  23. ==================================================================================================*/
  24. #define WDOG_CS (0x40052000)
  25. #define WDOG_TOVAL (0x40052008)
  26. #define WDOG_CS_DISABLE (0x00002520)
  27. .syntax unified
  28. .arch armv7-m
  29. /* Table for copying and zeroing */
  30. /* Copy table:
  31. - Table entries count
  32. - entry one ram start
  33. - entry one rom start
  34. - entry one rom end
  35. ...
  36. - entry n ram start
  37. - entry n rom start
  38. - entry n rom end
  39. Zero Table:
  40. - Table entries count
  41. - entry one ram start
  42. - entry one ram end
  43. */
  44. .section ".init_table", "a"
  45. .long 2
  46. .long __RAM_INIT_START
  47. .long __ROM_INIT_START
  48. .long __ROM_INIT_END
  49. .long __RAM_INTERRUPT_START
  50. .long __ROM_INTERRUPT_START
  51. .long __ROM_INTERRUPT_END
  52. .section ".zero_table", "a"
  53. .long 1
  54. .long __BSS_SRAM_START
  55. .long __BSS_SRAM_END
  56. /* Flash Configuration */
  57. .section .flash_config, "a"
  58. .long 0xFFFFFFFF /* 8 bytes backdoor comparison key */
  59. .long 0xFFFFFFFF /* */
  60. .long 0xFFFFFFFF /* 4 bytes program flash protection bytes */
  61. .long 0xFFFF7FFE /* FDPROT:FEPROT:FOPT:FSEC(0xFE = unsecured) */
  62. .globl VTABLE
  63. .section ".startup","ax"
  64. .thumb
  65. /************************************************************************/
  66. /* Autosar synopsis of startup code (See MCU Specification): */
  67. /* */
  68. /* Before the MCU driver can be initialized, a basic initialization */
  69. /* of the MCU has to be executed. This MCU specific initialization is */
  70. /* typically executed in a start-up code. The start-up code of the */
  71. /* MCU shall be executed after power up and any kind of micro- */
  72. /* controller reset. It shall perform very basic and microcontroller */
  73. /* specific start-up initialization and shall be kept short, because */
  74. /* the MCU clock and PLL is not yet initialized. The start-up code */
  75. /* shall cover MCU specific initialization, which is not part of */
  76. /* other MCU services or other MCAL drivers. The following steps */
  77. /* summarizes basic functionality which shall be included in the */
  78. /* start-up code. They are listed for guidance, because some */
  79. /* functionality might not be supported. No code will be found in */
  80. /* case. */
  81. /************************************************************************/
  82. .set VTOR_REG, 0xE000ED08
  83. .set CHIPCTL, 0x40048004
  84. .set DISRAMRE, 0x00300000
  85. .thumb
  86. .thumb_func
  87. .globl Reset_Handler
  88. .globl _start
  89. _start:
  90. Reset_Handler:
  91. /*****************************************************/
  92. /* Skip normal entry point as nothing is initialized */
  93. /*****************************************************/
  94. cpsid i
  95. mov r0, #0
  96. mov r1, #0
  97. mov r2, #0
  98. mov r3, #0
  99. mov r4, #0
  100. mov r5, #0
  101. mov r6, #0
  102. mov r7, #0
  103. /*****************************************************/
  104. /* Configuring sram retention out of reset */
  105. /*****************************************************/
  106. /* Disable SRAM retention */
  107. ldr r0, =CHIPCTL
  108. ldr r1, =DISRAMRE
  109. str r1,[r0]
  110. /*******************************************************************/
  111. /* NXP Guidance 1 - Init registers to avoid lock-step issues */
  112. /* N/A */
  113. /*******************************************************************/
  114. /*******************************************************************/
  115. /* NXP Guidance 2 - MMU Initialization for CPU */
  116. /* TLB0 - PbridgeB */
  117. /* TLB1 - Internal Flash */
  118. /* TLB2 - External SRAM */
  119. /* TLB3 - Internal SRAM */
  120. /* TLB4 - PbridgeA */
  121. /*******************************************************************/
  122. /******************************************************************/
  123. /* Autosar Guidance 1 - The start-up code shall initialize the */
  124. /* base addresses for interrupt and trap vector tables. These base*/
  125. /* addresses are provided as configuration parameters or */
  126. /* linker/locator setting. */
  127. /******************************************************************/
  128. SetVTOR:
  129. /* relocate vector table to RAM */
  130. ldr r0, =VTOR_REG
  131. ldr r1, =__RAM_INTERRUPT_START
  132. str r1,[r0]
  133. /******************************************************************/
  134. /* Autosar Guidance 2 - The start-up code shall initialize the */
  135. /* interrupt stack pointer, if an interrupt stack is */
  136. /* supported by the MCU. The interrupt stack pointer base address */
  137. /* and the stack size are provided as configuration parameter or */
  138. /* linker/locator setting. */
  139. /* */
  140. /******************************************************************/
  141. /******************************************************************/
  142. /* Autosar Guidance 3 - The start-up code shall initialize the */
  143. /* user stack pointer. The user stack pointer base address and */
  144. /* the stack size are provided as configuration parameter or */
  145. /* linker/locator setting. */
  146. /******************************************************************/
  147. SetCore0Stack:
  148. /* set up stack; r13 SP*/
  149. ldr r0, =__Stack_start_c0
  150. msr MSP, r0
  151. b DisableSWT0
  152. /******************************************************************/
  153. /* Autosar Guidance 4 - If the MCU supports context save */
  154. /* operation, the start-up code shall initialize the memory which */
  155. /* is used for context save operation. The maximum amount of */
  156. /* consecutive context save operations is provided as */
  157. /* configuration parameter or linker/locator setting. */
  158. /* */
  159. /******************************************************************/
  160. /******************************************************************/
  161. /* Autosar Guidance 5 - The start-up code shall ensure that the */
  162. /* MCU internal watchdog shall not be serviced until the watchdog */
  163. /* is initialized from the MCAL watchdog driver. This can be */
  164. /* done for example by increasing the watchdog service time. */
  165. /* */
  166. /******************************************************************/
  167. /* Note from manual: For any operation to be performed on an SWT */
  168. /* instance, its respective core must be enabled. */
  169. DisableSWT0:
  170. ldr r0, =WDOG_CS
  171. ldr r1, =WDOG_CS_DISABLE
  172. str r1, [r0]
  173. ldr r0, =WDOG_TOVAL
  174. ldr r1, =0xFFFF
  175. str r1, [r0]
  176. b RamInit
  177. /******************************************************************/
  178. /* Autosar Guidance 13 - The start-up code shall initialize a */
  179. /* minimum amount of RAM in order to allow proper execution of */
  180. /* the MCU driver services and the caller of these services. */
  181. /******************************************************************/
  182. RamInit:
  183. /* Initialize SRAM ECC */
  184. ldr r0, =__RAM_INIT
  185. cmp r0, 0
  186. /* Skip if __SRAM_INIT is not set */
  187. beq SRAM_LOOP_END
  188. ldr r1, =__INT_SRAM_START
  189. ldr r2, =__INT_SRAM_END
  190. subs r2, r1
  191. subs r2, #1
  192. ble SRAM_LOOP_END
  193. movs r0, 0
  194. movs r3, 0
  195. SRAM_LOOP:
  196. stm r1!, {r0,r3}
  197. subs r2, 8
  198. bge SRAM_LOOP
  199. SRAM_LOOP_END:
  200. DebuggerHeldCoreLoop:
  201. ldr r0, =RESET_CATCH_CORE
  202. ldr r0, [r0]
  203. ldr r1, =0x5A5A5A5A
  204. cmp r0, r1
  205. beq DebuggerHeldCoreLoop
  206. /************************/
  207. /* Erase ".bss Section" */
  208. /************************/
  209. _DATA_INIT:
  210. b _INIT_DATA_BSS
  211. _INIT_DATA_BSS:
  212. bl init_data_bss
  213. /******************************************************************/
  214. /* Autosar Guidance 6 - If the MCU supports cache memory for data */
  215. /* and/or code, it shall be initialized and enabled in the */
  216. /* start-up code. */
  217. /* */
  218. /******************************************************************/
  219. /******************************************************************/
  220. /* Autosar Guidance 7 - The start-up code shall initialize MCU */
  221. /* specific features of internal memory like memory protection. */
  222. /* */
  223. /******************************************************************/
  224. /******************************************************************/
  225. /* Autosar Guidance 8 - If external memory is used, the memory */
  226. /* shall be initialized in the start-up code. The start-up code */
  227. /* shall be prepared to support different memory configurations */
  228. /* depending on code location. Different configuration options */
  229. /* shall be taken into account for code execution from */
  230. /* external/internal memory. */
  231. /* N/A - external memory is not used */
  232. /******************************************************************/
  233. /******************************************************************/
  234. /* Autosar Guidance 9 - The settings of the different memories */
  235. /* shall be provided to the start-up code as configuration */
  236. /* parameters. */
  237. /* N/A - all memories are already configured */
  238. /******************************************************************/
  239. /******************************************************************/
  240. /* Autosar Guidance 10 - In the start-up code a default */
  241. /* initialization of the MCU clock system shall be performed */
  242. /* including global clock prescalers. */
  243. /******************************************************************/
  244. __SYSTEM_INIT:
  245. bl SystemInit
  246. /******************************************************************/
  247. /* Autosar Guidance 5 - The start-up code shall ensure that the */
  248. /* MCU internal watchdog shall not be serviced until the watchdog */
  249. /* is initialized from the MCAL watchdog driver. This can be */
  250. /* done for example by increasing the watchdog service time. */
  251. /* */
  252. /******************************************************************/
  253. /******************************************************************/
  254. /* Autosar Guidance 11 - The start-up code shall enable */
  255. /* protection mechanisms for special function registers(SFR's), */
  256. /* if supported by the MCU. */
  257. /* N/A - will be handled by Autosar OS */
  258. /******************************************************************/
  259. /******************************************************************/
  260. /* Autosar Guidance 12 - The start-up code shall initialize all */
  261. /* necessary write once registers or registers common to several */
  262. /* drivers where one write, rather than repeated writes, to the */
  263. /* register is required or highly desirable. */
  264. /******************************************************************/
  265. /*********************************/
  266. /* Set the small ro data pointer */
  267. /*********************************/
  268. /*********************************/
  269. /* Set the small rw data pointer */
  270. /*********************************/
  271. /******************************************************************/
  272. /* Call Main Routine */
  273. /******************************************************************/
  274. _MAIN:
  275. cpsie i
  276. bl startup_go_to_user_mode
  277. bl main
  278. /******************************************************************/
  279. /* Init runtime check data space */
  280. /******************************************************************/
  281. .globl MCAL_LTB_TRACE_OFF
  282. MCAL_LTB_TRACE_OFF:
  283. nop
  284. #ifdef CCOV_ENABLE
  285. /* code coverage is requested */
  286. bl ccov_main
  287. #endif
  288. /*BKPT #1 - removed to avoid debug fault being escalated to hardfault when debugger is not attached or on VDK*/ /* last instruction for the debugger to dump results data */
  289. .globl _end_of_eunit_test
  290. _end_of_eunit_test:
  291. b .
  292. #ifdef MCAL_ENABLE_USER_MODE_SUPPORT
  293. .globl startup_getControlRegisterValue
  294. startup_getControlRegisterValue:
  295. mrs r0, CONTROL
  296. bx r14
  297. .globl startup_getAipsRegisterValue
  298. startup_getAipsRegisterValue:
  299. mrs r0, IPSR
  300. bx r14
  301. #endif
  302. .align 4
  303. .ltorg