hal_adapter.c 30 KB

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  1. /*
  2. * hal_adapter.c
  3. *中间层函数调用库
  4. * Created on: 2022年1月18日
  5. * Author: QiXiang_CHENJIE
  6. */
  7. #include "hal_adapter.h"
  8. #include "AppGlobalVar.h"
  9. #include "stdio.h"
  10. #include "stdarg.h"
  11. uint8_t __attribute__((section(".non_cacheable_data"))) RX_Buffer[3][BUFFER_SIZE];
  12. uint32_t bufferIdx[3] = {0};
  13. volatile uint32 VarNotification_0 = 0;
  14. volatile uint32 VarNotification_1 = 0;
  15. TP_Value_Type ConvertedBuffer[NUM_RESULTS];
  16. Adc_ValueGroupType ResultBuffer[NUM_RESULTS];
  17. volatile Uart_StatusType Uart_TransmitStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  18. QueueHandle_t UartRecvQueue[3];
  19. QueueHandle_t UartSendQueue[3];
  20. QueueHandle_t UartHalQueueHandle;
  21. Std_ReturnType UartStartRecvFunc(uint8 channel);
  22. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR);
  23. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len);
  24. void clear_ringBuffer(ringbuffer_t *ringBuf);
  25. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  26. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  27. uint8 ringBufferforUart[3][BUFFER_SIZE];
  28. ringbuffer_t uartRingBuffer[3];
  29. sint8 AtcmdDelayRecvFunc(uint8 recvChannel,char *ResultStrPtr,uint16 delayTime)
  30. {
  31. sint8 outValue = -1;
  32. uint8 delayCnt = 0;
  33. uint8 UartData[256];
  34. uint16 ReadLen = 0;
  35. char *retptr = NULL;
  36. while (delayCnt<(delayTime/1000)&&outValue!=0)
  37. {
  38. UART_Receive_Data(recvChannel,UartData, &ReadLen,1000);
  39. if(ReadLen>0)
  40. {
  41. retptr = (char *)strstr((char *)UartData, ResultStrPtr);
  42. if (retptr)
  43. {
  44. outValue = 0;
  45. break;
  46. }
  47. }
  48. else
  49. {
  50. delayCnt++;
  51. }
  52. }
  53. return outValue;
  54. }
  55. #if 0
  56. uint16 myPrintf(const char *fmt, ...)
  57. {
  58. int n;
  59. uint8 databuffer[512]={0};
  60. va_list args;
  61. va_start(args, fmt);
  62. n = vsprintf((char *)databuffer, fmt, args);
  63. va_end(args);
  64. if( (printfRingBuffer.bw + n) <= printfRingBuffer.length )
  65. {
  66. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  67. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  68. printfRingBuffer.bw = printfRingBuffer.bw + n;
  69. }
  70. else
  71. {
  72. printfRingBuffer.bw = 0;
  73. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  74. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  75. }
  76. return n;
  77. }
  78. #endif
  79. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len)
  80. {
  81. ringBuf->br = 0;
  82. ringBuf->bw = 0;
  83. ringBuf->btoRead = 0;
  84. ringBuf->source = buf;
  85. ringBuf->length = buf_len;
  86. }
  87. void clear_ringBuffer(ringbuffer_t *ringBuf)
  88. {
  89. ringBuf->br = 0;
  90. ringBuf->bw = 0;
  91. ringBuf->btoRead = 0;
  92. }
  93. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  94. {
  95. uint32_t len = 0;
  96. volatile uint32_t ringBuf_bw = ringBuf->bw;
  97. uint32_t ringBuf_len = ringBuf->length;
  98. uint8_t *ringBuf_source = ringBuf->source;
  99. if( (ringBuf_bw + size) > ringBuf_len )
  100. {
  101. ringBuf_bw = 0;
  102. }
  103. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  104. ringBuf->bw = (ringBuf_bw + size) % ringBuf_len;
  105. ringBuf->btoRead += size;
  106. /*
  107. if(ringBuf->br!=0)
  108. {
  109. memcpy(ringBuf_source, buffer, size);
  110. ringBuf->br = 0;
  111. }
  112. */
  113. /*
  114. if( (ringBuf_bw + size) <= ringBuf_len )
  115. {
  116. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  117. }
  118. else
  119. {
  120. len = ringBuf_len - ringBuf_bw;
  121. memcpy(ringBuf_source + ringBuf_bw, buffer, len);
  122. memcpy(ringBuf_source, buffer + ringBuf_bw, size - len);
  123. }
  124. ringBuf->bw = (ringBuf->bw + size) % ringBuf_len;
  125. ringBuf->btoRead += size;
  126. */
  127. return size;
  128. }
  129. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  130. {
  131. uint32_t len = 0;
  132. volatile uint32_t ringBuf_br = ringBuf->br;
  133. uint32_t ringBuf_len = ringBuf->length;
  134. uint8_t *ringBuf_source = ringBuf->source;
  135. memcpy(buffer, ringBuf_source, size);
  136. ringBuf->br = size;
  137. // if( (ringBuf_br + size ) <= ringBuf_len )
  138. // {
  139. // memcpy(buffer, ringBuf_source + ringBuf_br, size);
  140. // }
  141. // else
  142. // {
  143. // len = ringBuf_len - ringBuf_br;
  144. // memcpy(buffer, ringBuf_source + ringBuf_br, len);
  145. // memcpy(buffer + len, ringBuf_source, size - len);
  146. // }
  147. // ringBuf->br = (ringBuf->br + size) % ringBuf_len;
  148. // ringBuf->btoRead -= size;
  149. return size;
  150. }
  151. Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, uint8 *txBuffer, uint16 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  152. {
  153. UartMsg_t UartRecvMsg;
  154. UartMsg_t UartSendMsg;
  155. BaseType_t Sendret = pdFALSE;
  156. BaseType_t Recvret = pdFALSE;
  157. uint32 retVal = E_NOT_OK;
  158. UartSendMsg.DataLen = sendLength;
  159. UartSendMsg.dataPtr = txBuffer;
  160. *rxlen = 0;
  161. Sendret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,50);
  162. if(Sendret == pdTRUE)
  163. {
  164. Recvret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  165. if(Recvret == pdTRUE)
  166. {
  167. *rxlen = UartRecvMsg.DataLen;
  168. // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
  169. memcpy(rxBuffer,(uint8 *)(UartRecvMsg.dataAddr),UartRecvMsg.DataLen);
  170. retVal = E_OK;
  171. }
  172. else
  173. {
  174. retVal = 3;
  175. }
  176. }
  177. else
  178. {
  179. retVal = 2;
  180. }
  181. return retVal;
  182. }
  183. Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint8 *rxlen, uint32 T_timeout)
  184. {
  185. UartMsg_t UartRecvMsg;
  186. BaseType_t ret = pdFALSE;
  187. uint32 retVal = E_NOT_OK;
  188. *rxlen = 0;
  189. ret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  190. if(ret == pdTRUE)
  191. {
  192. *rxlen = UartRecvMsg.DataLen;
  193. // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
  194. memcpy(rxBuffer,(uint8 *)UartRecvMsg.dataAddr,UartRecvMsg.DataLen);
  195. retVal = E_OK;
  196. }
  197. return retVal;
  198. }
  199. Std_ReturnType UART_Reset(uint8 recvChannel)
  200. {
  201. uint32 retVal = E_NOT_OK;
  202. retVal = xQueueReset(UartRecvQueue[recvChannel]);
  203. return retVal;
  204. }
  205. Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  206. {
  207. UartMsg_t UartSendMsg;
  208. BaseType_t ret = pdFALSE;
  209. uint32 retVal = E_NOT_OK;
  210. UartSendMsg.DataLen = sendLength;
  211. UartSendMsg.dataPtr = txBuffer;
  212. ret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,T_timeout);
  213. if(ret == pdTRUE)
  214. {
  215. retVal = E_OK;
  216. }
  217. return retVal;
  218. }
  219. void UartInit(void)
  220. {
  221. create_ringBuffer(&uartRingBuffer[0],ringBufferforUart[0],sizeof(ringBufferforUart[0]));
  222. create_ringBuffer(&uartRingBuffer[1],ringBufferforUart[1],sizeof(ringBufferforUart[1]));
  223. create_ringBuffer(&uartRingBuffer[2],ringBufferforUart[2],sizeof(ringBufferforUart[2]));
  224. UartRecvQueue[0] = xQueueCreate(6, sizeof(UartMsg_t));
  225. UartRecvQueue[1] = xQueueCreate(6, sizeof(UartMsg_t));
  226. UartRecvQueue[2] = xQueueCreate(6, sizeof(UartMsg_t));
  227. UartSendQueue[0] = xQueueCreate(3, sizeof(UartMsg_t));
  228. UartSendQueue[1] = xQueueCreate(1, sizeof(UartMsg_t));
  229. UartSendQueue[2] = xQueueCreate(1, sizeof(UartMsg_t));
  230. UartHalQueueHandle = xQueueCreate(9, sizeof(UartHalMsg_t));
  231. xTaskCreate(Uart_Hal_RecvTask, (const char *const)"UartRecv", 256, (void *)0, main_TASK_PRIORITY + 5, NULL);
  232. xTaskCreate(Uart_Hal_SendTask, (const char *const)"UartSend", 256, (void *)0, main_TASK_PRIORITY + 4, NULL);
  233. }
  234. Std_ReturnType UartStartRecvFunc(uint8 channel)
  235. {
  236. sint8 out = 0;
  237. volatile Std_ReturnType R_Uart_Status=E_NOT_OK;
  238. bufferIdx[channel]=0;
  239. memset(RX_Buffer[channel],0x00,BUFFER_SIZE);
  240. switch(channel)
  241. {
  242. case 0:
  243. IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  244. break;
  245. case 1:
  246. IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  247. break;
  248. case 2:
  249. IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  250. break;
  251. default:
  252. break;
  253. }
  254. Uart_SetBuffer(channel, RX_Buffer[channel], DMA_SIZE, UART_RECEIVE);
  255. R_Uart_Status = Uart_AsyncReceive(channel, RX_Buffer[channel], DMA_SIZE);
  256. if (E_OK != R_Uart_Status)
  257. {
  258. Uart_Abort(channel, UART_RECEIVE);
  259. out = E_NOT_OK;
  260. }
  261. return out;
  262. }
  263. void Uart_Hal_RecvTask(void *pvParameters)
  264. {
  265. UartHalMsg_t UartHalMsgRecv;
  266. UartMsg_t UartRecvMsg;
  267. uint16 recvSize = 0;
  268. BaseType_t ret = pdFALSE;
  269. BaseType_t ret_send = pdFALSE;
  270. uint32 T_bytesRemaining[3] = {0};
  271. uint16 T_timeout[3] = {0};
  272. volatile Uart_StatusType Uart_ReceiveStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  273. uint8 UartIdx = UART_LPUART0;
  274. uint8 UartState[3] = {UartAbortRecv,UartAbortRecv,UartAbortRecv};
  275. while(1)
  276. {
  277. if((T_timeout[UartIdx]>1000) && (Uart_ReceiveStatus[UartIdx] != UART_STATUS_NO_ERROR) )//判定UART停止,超时停止,不是接收状态则停止
  278. {
  279. Uart_Abort(UartIdx, UART_RECEIVE);
  280. UartState[UartIdx] = UartAbortRecv;
  281. T_timeout[UartIdx] = 0;
  282. }
  283. else if(Uart_ReceiveStatus[UartIdx] == UART_STATUS_NO_ERROR)
  284. {
  285. UartState[UartIdx] = UartRecvComplete;
  286. }
  287. if((UartState[UartIdx] == UartAbortRecv) || (UartState[UartIdx] == UartRecvComplete)) //判定UART开始接收:UART停止后开始接收
  288. {
  289. if(E_OK == UartStartRecvFunc(UartIdx))
  290. {
  291. UartState[UartIdx] = UartStartRecv;
  292. }
  293. }
  294. Uart_ReceiveStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_RECEIVE);
  295. T_timeout[UartIdx]++;
  296. UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
  297. ret = xQueueReceive(UartHalQueueHandle,&UartHalMsgRecv,1);
  298. if(ret==pdTRUE)
  299. {
  300. if(UartHalMsgRecv.event==LPUART_UART_IP_EVENT_RECV_IDLE)
  301. {
  302. if(UartHalMsgRecv.value>0)
  303. {
  304. recvSize = write_ringBuffer(RX_Buffer[UartHalMsgRecv.Channel],UartHalMsgRecv.value,&uartRingBuffer[UartHalMsgRecv.Channel]);
  305. UartRecvMsg.DataLen = UartHalMsgRecv.value;
  306. UartRecvMsg.dataAddr = (uint32)(uartRingBuffer[UartHalMsgRecv.Channel].bw + uartRingBuffer[UartHalMsgRecv.Channel].source - UartHalMsgRecv.value);
  307. ret_send = xQueueSend(UartRecvQueue[UartHalMsgRecv.Channel],&UartRecvMsg,10);
  308. }
  309. T_timeout[UartHalMsgRecv.Channel] = 0;
  310. UartState[UartHalMsgRecv.Channel] = UartRecvComplete;
  311. }
  312. }
  313. }
  314. }
  315. void Uart_Hal_SendTask(void *pvParameters)
  316. {
  317. UartMsg_t UartSendMsg;
  318. BaseType_t ret = pdFALSE;
  319. uint32 T_bytesRemaining[3] = {0};
  320. uint16 T_timeout[3] = {0};
  321. volatile Std_ReturnType T_Uart_Status[3];
  322. uint8 UartIdx = UART_LPUART0;
  323. uint8 UartSendState[3] = {UartNoDataSend,UartNoDataSend,UartNoDataSend};
  324. while(1)
  325. {
  326. ret = xQueueReceive(UartSendQueue[UartIdx],&UartSendMsg,1);
  327. if(ret==pdTRUE)
  328. {
  329. if(UartIdx==UART_LPUART0)
  330. {
  331. Dio_WriteChannel(DioConf_DioChannel_PTB4_GPIO_OUT_MCU_RS485_EN, STD_ON);
  332. }
  333. T_Uart_Status[UartIdx] = Uart_AsyncSend(UartIdx, UartSendMsg.dataPtr, UartSendMsg.DataLen);
  334. if (E_OK != T_Uart_Status[UartIdx])
  335. {
  336. Uart_Abort(UartIdx, UART_SEND);
  337. UartSendState[UartIdx] = UartAbortSend;
  338. }
  339. else
  340. {
  341. UartSendState[UartIdx] = UartStartSend;
  342. }
  343. }
  344. /*开始发送后的判定*/
  345. if(UartSendState[UartIdx] == UartStartSend)
  346. {
  347. Uart_TransmitStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_SEND);
  348. T_timeout[UartIdx]++;
  349. }
  350. if(T_timeout[UartIdx]>=1000 || ((Uart_TransmitStatus[UartIdx] != UART_STATUS_OPERATION_ONGOING) && (UartSendState[UartIdx] == UartStartSend)))
  351. {
  352. if(T_timeout[UartIdx]>=1000)
  353. {
  354. Uart_Abort(UartIdx, UART_SEND);
  355. UartSendState[UartIdx] = UartAbortSend;
  356. }
  357. else if(Uart_TransmitStatus[UartIdx] == UART_STATUS_NO_ERROR)
  358. {
  359. UartSendState[UartIdx] = UartSendComplete;
  360. }
  361. T_timeout[UartIdx] = 0;
  362. }
  363. UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
  364. }
  365. }
  366. //
  367. //Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, const uint8 *txBuffer, uint32 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  368. //{
  369. // volatile Std_ReturnType R_Uart_Status;
  370. // volatile Std_ReturnType T_Uart_Status;
  371. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  372. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  373. // uint32 T_bytesRemaining;
  374. // uint32 R_bytesRemaining;
  375. // uint32 timeout = T_timeout;
  376. // uint32 retVal = E_NOT_OK;
  377. // bufferIdx[recvChannel] = 0;
  378. // switch (recvChannel)
  379. // {
  380. // case 0:
  381. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  382. // break;
  383. // case 1:
  384. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  385. // break;
  386. // case 2:
  387. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  388. // break;
  389. // default:
  390. // break;
  391. // }
  392. // if (txBuffer == NULL || rxBuffer == NULL)
  393. // {
  394. // return retVal;
  395. // }
  396. //
  397. // /* Uart_AsyncSend transmit data */
  398. // Uart_SetBuffer(transChannel, txBuffer, sendLength, UART_SEND);
  399. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  400. // if (E_OK != T_Uart_Status)
  401. // {
  402. // Uart_Abort(transChannel, UART_SEND);
  403. // return E_NOT_OK;
  404. // }
  405. // Uart_SetBuffer(recvChannel, &RX_Buffer[recvChannel][0], DMA_SIZE, UART_RECEIVE);
  406. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  407. // if (E_OK != R_Uart_Status)
  408. // {
  409. // Uart_Abort(recvChannel, UART_RECEIVE);
  410. // return E_NOT_OK;
  411. // }
  412. // /* Check for no on-going transmission */
  413. // do
  414. // {
  415. // if (Uart_TransmitStatus != UART_STATUS_NO_ERROR)
  416. // {
  417. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  418. // }
  419. // if (Uart_ReceiveStatus != UART_STATUS_NO_ERROR)
  420. // {
  421. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &R_bytesRemaining, UART_RECEIVE);
  422. // }
  423. // vTaskDelay(pdMS_TO_TICKS(1));
  424. // } while (((UART_STATUS_NO_ERROR != Uart_TransmitStatus || UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < --timeout));
  425. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  426. // {
  427. // Uart_Abort(transChannel, UART_SEND);
  428. // retVal = E_NOT_OK;
  429. // }
  430. // else
  431. // {
  432. // retVal = E_OK;
  433. // }
  434. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  435. // {
  436. // Uart_Abort(recvChannel, UART_RECEIVE);
  437. // *rxlen = bufferIdx[recvChannel];
  438. // retVal = E_NOT_OK;
  439. // }
  440. // else
  441. // {
  442. // *rxlen = bufferIdx[recvChannel];
  443. // retVal = E_OK;
  444. // }
  445. // return retVal;
  446. //}
  447. //
  448. //Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  449. //{
  450. //
  451. // volatile Std_ReturnType T_Uart_Status;
  452. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  453. // uint32 T_bytesRemaining;
  454. // uint32 timeout = T_timeout;
  455. // uint32 retVal = E_NOT_OK;
  456. // if (txBuffer == NULL)
  457. // {
  458. // return retVal;
  459. // }
  460. //
  461. // /* Uart_AsyncSend transmit data */
  462. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  463. // if (E_OK != T_Uart_Status)
  464. // {
  465. // Uart_Abort(transChannel, UART_SEND);
  466. // return E_NOT_OK;
  467. // }
  468. // /* Check for no on-going transmission */
  469. // do
  470. // {
  471. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  472. // vTaskDelay(pdMS_TO_TICKS(1));
  473. // } while ((UART_STATUS_NO_ERROR != Uart_TransmitStatus && 0 < --timeout));
  474. //
  475. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  476. // {
  477. // retVal = E_NOT_OK;
  478. // }
  479. // else
  480. // {
  481. // retVal = E_OK;
  482. // }
  483. // return retVal;
  484. //}
  485. //
  486. //Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint16 *rxlen, sint32 T_timeout)
  487. //{
  488. // volatile Std_ReturnType R_Uart_Status = E_NOT_OK;
  489. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  490. // uint32 T_bytesRemaining = 0;
  491. // uint32 retVal = E_NOT_OK;
  492. // // uint8 Rx_Buffer[MSG_LEN];
  493. // bufferIdx[recvChannel] = 0;
  494. // *rxlen = 0;
  495. // if (rxBuffer == NULL)
  496. // {
  497. // return retVal;
  498. // }
  499. // /* Uart_AsyncReceive transmit data */
  500. // switch (recvChannel)
  501. // {
  502. // case 0:
  503. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  504. // break;
  505. // case 1:
  506. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  507. // break;
  508. // case 2:
  509. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  510. // break;
  511. // default:
  512. // break;
  513. // }
  514. // Uart_SetBuffer(recvChannel, rxBuffer, DMA_SIZE, UART_RECEIVE);
  515. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  516. // if (E_OK != R_Uart_Status)
  517. // {
  518. // Uart_Abort(recvChannel, UART_RECEIVE);
  519. // return E_NOT_OK;
  520. // }
  521. // /* Check for no on-going transmission */
  522. // do
  523. // {
  524. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &T_bytesRemaining, UART_RECEIVE);
  525. // vTaskDelay(pdMS_TO_TICKS(1));
  526. //
  527. // } while ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < T_timeout--);
  528. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  529. // {
  530. // Uart_Abort(recvChannel, UART_RECEIVE);
  531. // *rxlen = bufferIdx[recvChannel];
  532. // retVal = E_NOT_OK;
  533. // }
  534. // else
  535. // {
  536. // *rxlen = bufferIdx[recvChannel];
  537. // retVal = E_OK;
  538. // }
  539. // return retVal;
  540. //}
  541. extern Lpuart_Uart_Ip_StateStructureType *Lpuart_Uart_Ip_apStateStructuresArray[LPUART_UART_IP_NUMBER_OF_INSTANCES];
  542. void UART_Callback(uint32 hwInstance, Lpuart_Uart_Ip_EventType event)
  543. {
  544. // (void)userData;
  545. Lpuart_Uart_Ip_StateStructureType * UartState;
  546. UartState = (Lpuart_Uart_Ip_StateStructureType *)Lpuart_Uart_Ip_apStateStructuresArray[hwInstance];
  547. if (hwInstance==0&&event == LPUART_UART_IP_EVENT_END_TRANSFER)
  548. {
  549. Dio_WriteChannel(DioConf_DioChannel_PTB4_GPIO_OUT_MCU_RS485_EN, STD_OFF);
  550. }
  551. /* Check the event type */
  552. if (event == LPUART_UART_IP_EVENT_RX_FULL)
  553. {
  554. /* The reception stops when receiving idle is detected or the buffer is full */
  555. if (bufferIdx[hwInstance] <= (BUFFER_SIZE - DMA_SIZE))
  556. {
  557. /* Update the buffer index and the rx buffer */
  558. bufferIdx[hwInstance] += DMA_SIZE;
  559. Uart_SetBuffer(hwInstance, &RX_Buffer[hwInstance][bufferIdx[hwInstance]], DMA_SIZE, UART_RECEIVE);
  560. // Lpuart_Uart_Ip_SetRxBuffer(hwInstance, &RX_Buffer[bufferIdx], DMA_SIZE);
  561. }
  562. }
  563. if (event == LPUART_UART_IP_EVENT_ERROR)
  564. {
  565. // /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  566. // temp = DMA_SIZE - (uint32_t)IP_DMA->TCD->CITER.ELINKNO;
  567. // /*Add the remaining data size to the sum of the received size*/
  568. // bufferIdx[hwInstance] += temp;
  569. /*Abort the receiving after detecting IDLE receiving*/
  570. Lpuart_Uart_Ip_AbortReceivingData(hwInstance);
  571. Lpuart_Uart_Ip_AbortSendingData(hwInstance);
  572. // bufferIdx = 0;
  573. }
  574. if (event == LPUART_UART_IP_EVENT_RECV_IDLE)
  575. {
  576. uint32_t temp;
  577. UartHalMsg_t UartHalMsg;
  578. UartHalMsg.Channel = hwInstance;
  579. UartHalMsg.event = event;
  580. /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  581. temp = DMA_SIZE - (uint32_t)IP_DMA->TCD[hwInstance].CITER.ELINKNO;
  582. /*Add the remaining data size to the sum of the received size*/
  583. bufferIdx[hwInstance] += temp;
  584. /*Abort the receiving after detecting IDLE receiving*/
  585. UartHalMsg.value = bufferIdx[hwInstance];
  586. xQueueSendFromISR(UartHalQueueHandle,&UartHalMsg,pdFALSE);
  587. }
  588. }
  589. /*CAN*/
  590. Can_PduType Can_CreatePduInfo(Can_IdType id, CAN_IdFrameType idFrame, PduIdType swPduHandle, uint8 length, uint8 *sdu)
  591. {
  592. Can_PduType PduInfo;
  593. switch (idFrame)
  594. {
  595. case CAN_STANDARD_ID_TYPE:
  596. id = id & 0x7FF;
  597. break;
  598. case CANFD_STANDARD_ID_TYPE:
  599. id = (id & 0x7FF) | 0x40000000;
  600. break;
  601. case CAN_EXTENDED_ID_TYPE:
  602. id = id | 0x80000000;
  603. break;
  604. case CANFD_EXTENDED_ID_TYPE:
  605. id = id | 0xC0000000;
  606. break;
  607. default:
  608. id = id & 0x7FF;
  609. break;
  610. }
  611. PduInfo.id = id;
  612. PduInfo.swPduHandle = swPduHandle;
  613. PduInfo.length = length;
  614. PduInfo.sdu = sdu;
  615. return PduInfo;
  616. }
  617. Std_ReturnType CanIf_SendMessage(uint8 ControllerId, Can_Msg_Type CanMsg)
  618. {
  619. volatile Can_PduType Can_PduInfo;
  620. volatile Std_ReturnType CAN_Write_Status;
  621. Std_ReturnType retVal = E_NOT_OK;
  622. uint32 u8TimeOut = 100 * 100;
  623. Can_HwHandleType Hth = Can0HardwareObject_TX + (Can_HwHandleType)ControllerId; // controller 0 --> Can0HardwareObject_TX
  624. Can_PduInfo = Can_CreatePduInfo(CanMsg.id, CanMsg.idFrame, 0, CanMsg.length, CanMsg.sdu);
  625. CAN_Write_Status = Can_Write(Hth, &Can_PduInfo);
  626. CanIf_bTxFlag = FALSE;
  627. if (CAN_Write_Status == E_OK)
  628. {
  629. while ((!CanIf_bTxFlag) && (u8TimeOut != 0U))
  630. {
  631. Can_MainFunction_Write();
  632. u8TimeOut--;
  633. }
  634. }
  635. if (CanIf_bTxFlag == TRUE)
  636. {
  637. retVal = E_OK;
  638. }
  639. else
  640. {
  641. retVal = E_NOT_OK;
  642. }
  643. return retVal;
  644. }
  645. Can_Msg_Type Can_GetMsgInfo(Can_IdType id, uint8 length, uint8 *sdu)
  646. {
  647. Can_Msg_Type CanMsgInfo;
  648. CanMsgInfo.idFrame = (CAN_IdFrameType)((id >> 30) & 0x03);
  649. if (CanMsgInfo.idFrame & 0x01)
  650. {
  651. CanMsgInfo.id = id & 0x7FF;
  652. }
  653. else
  654. {
  655. CanMsgInfo.id = id & 0x1FFFFFFF;
  656. }
  657. CanMsgInfo.length = length;
  658. CanMsgInfo.sdu = sdu;
  659. return CanMsgInfo;
  660. }
  661. void CanIf_ControllerBusOff(uint8 ControllerId)
  662. {
  663. (void)ControllerId;
  664. }
  665. void CanIf_ControllerModeIndication(uint8 ControllerId, Can_ControllerStateType ControllerMode)
  666. {
  667. (void)ControllerId;
  668. (void)ControllerMode;
  669. }
  670. void CanIf_TxConfirmation(PduIdType CanTxPduId)
  671. {
  672. CanIf_u8TxConfirmCnt++;
  673. CanIf_bTxFlag = TRUE;
  674. (void)CanTxPduId;
  675. }
  676. void CanIf_RxIndication(const Can_HwType *Mailbox, const PduInfoType *PduInfoPtr)
  677. {
  678. Can_Msg_Type canRxMsg_Buff;
  679. Can_Msg_Type_Data canRxMsgQueueData;
  680. CanIf_bRxFlag = TRUE; // should not be delete
  681. // should put the msg into message queue
  682. canRxMsg_Buff = Can_GetMsgInfo(Mailbox->CanId, PduInfoPtr->SduLength, PduInfoPtr->SduDataPtr);
  683. canRxMsgQueueData.id = canRxMsg_Buff.id;
  684. canRxMsgQueueData.length = canRxMsg_Buff.length;
  685. memcpy(canRxMsgQueueData.data, canRxMsg_Buff.sdu, canRxMsgQueueData.length);
  686. xQueueSend(CanRecvQueueHandle, &canRxMsgQueueData, 0);
  687. }
  688. void CanIf_CurrentIcomConfiguration(uint8 ControllerId, IcomConfigIdType ConfigurationId, IcomSwitch_ErrorType Error)
  689. {
  690. (void)ControllerId;
  691. (void)ConfigurationId;
  692. (void)Error;
  693. }
  694. void Notification_0(void)
  695. {
  696. ADC_Converter(ResultBuffer, ConvertedBuffer);
  697. memcpy(BattTempR, &ConvertedBuffer[3], 4 * sizeof(uint32));
  698. }
  699. void Notification_1(void)
  700. {
  701. VarNotification_1++;
  702. }
  703. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR)
  704. {
  705. Adc_ValueGroupType REFH, REFL;
  706. REFH = Buffer[0];
  707. REFL = Buffer[2];
  708. for (int i = 3; i < NUM_RESULTS; i++)
  709. {
  710. if (Buffer[i] >= REFH)
  711. {
  712. ConvertedValueR[i] = 40930000;
  713. }
  714. else if (Buffer[i] <= REFL)
  715. {
  716. ConvertedValueR[i] = 0x00;
  717. }
  718. else
  719. {
  720. ConvertedValueR[i] = (TP_Value_Type)((float)(10000 * (Buffer[i] - REFL) / (float)(REFH - REFL)) / (1 - (float)((Buffer[i] - REFL) / (float)(REFH - REFL))));
  721. }
  722. }
  723. return 0;
  724. }
  725. Std_ReturnType ADC_ReadValue()
  726. {
  727. Std_ReturnType ret = E_NOT_OK;
  728. for (uint8 i = 0; i < NUM_RESULTS; i++)
  729. {
  730. ResultBuffer[i] = 0xFFFF;
  731. ConvertedBuffer[i] = 0x00;
  732. }
  733. Adc_SetupResultBuffer(AdcGroupSoftwareOneShot, ResultBuffer);
  734. Adc_EnableGroupNotification(AdcGroupSoftwareOneShot);
  735. VarNotification_0 = 0;
  736. Adc_StartGroupConversion(AdcGroupSoftwareOneShot);
  737. return ret;
  738. }
  739. /*EEP*/
  740. static Std_ReturnType TestEep_FlexNvmProgramPartCmd(
  741. VAR(TestEep_CsecKeySize, AUTOMATIC) eepKeysize,
  742. VAR(TestEep_SfeType, AUTOMATIC) eepSecurityFlagExtension,
  743. VAR(TestEep_LoadFlexRamType, AUTOMATIC) eepLoadFlexRamAtReset,
  744. VAR(TestEep_Eeprom_FlexRamPartitionType, AUTOMATIC) eepFlexRamPartition,
  745. VAR(TestEep_Eeprom_FlexNvmPartitionType, AUTOMATIC) eepFlexNvmPartition)
  746. {
  747. Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
  748. uint32 u32FlexNvmPartSize = 0;
  749. uint32 u32RegSimFcfg1 = 0UL;
  750. u32RegSimFcfg1 = IP_SIM->FCFG1;
  751. /*get DEPART value */
  752. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  753. /* check that it was not partitioned before */
  754. if (u32FlexNvmPartSize == 0xF)
  755. {
  756. // /* if error flags are set the cmd is not executed */
  757. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8);
  758. //
  759. // /*erase DF 0 sector*/
  760. // u32Addr=(TEST_EEP_DEEPROM_SECTOR_0_ADDR32 - D_EEPROM_BASE_ADDR) + 0x800000UL;
  761. //
  762. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, TEST_EEP_EEPROM_CMD_ERASE_SECTOR);
  763. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)(u32Addr >> 16UL));
  764. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)(u32Addr >> 8UL));
  765. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)(u32Addr >> 0UL));
  766. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32 , TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  767. // while((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  768. // {
  769. // }
  770. //
  771. if (0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  772. {
  773. /* run program partition command */
  774. REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, EEPROM_CMD_PROGRAM_PARTITION);
  775. REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)eepKeysize);
  776. REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)eepSecurityFlagExtension);
  777. REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)eepLoadFlexRamAtReset);
  778. REG_WRITE8(TEST_EEP_EEPROM_FCCOB4_ADDR32, (uint8)eepFlexRamPartition);
  779. REG_WRITE8(TEST_EEP_EEPROM_FCCOB5_ADDR32, (uint8)eepFlexNvmPartition);
  780. REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  781. while ((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  782. {
  783. /* wait for operation to finish */
  784. }
  785. /* check if errors occured */
  786. if (REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  787. {
  788. /* NOK, error flags are set */
  789. u8RetVal = (Std_ReturnType)E_NOT_OK;
  790. }
  791. }
  792. else
  793. {
  794. /* NOK, error flags are set */
  795. u8RetVal = (Std_ReturnType)E_NOT_OK;
  796. }
  797. }
  798. else
  799. {
  800. /* NOK, partitioned already */
  801. u8RetVal = (Std_ReturnType)E_NOT_OK;
  802. }
  803. return u8RetVal;
  804. }
  805. void Eep_DepartParitition(TestEep_Eeprom_FlexNvmPartitionType T_EEP_SIZE)
  806. {
  807. uint32 u32FlexNvmPartSize = 0;
  808. uint32 u32RegSimFcfg1 = 0UL;
  809. u32RegSimFcfg1 = IP_SIM->FCFG1;
  810. /*get DEPART value */
  811. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  812. if (u32FlexNvmPartSize == 0xF) /* We just partition again if curent size different with expected */
  813. {
  814. /* partition for EERAM 64K with NOT loading EERAM at reset in hardware */
  815. TestEep_FlexNvmProgramPartCmd(EEP_FTFC_KEY_SIZE_0_BYTES, EEP_FTFC_VERIFY_ONLY_DISABLED,
  816. EEP_FTFC_LOAD_AT_RESET_ENABLED, EEP_FTFC_EERAM_SIZE_4K, T_EEP_SIZE);
  817. }
  818. }
  819. /* Erase memory by writing erase value */
  820. Std_ReturnType HAL_EEP_Erase(uint32 eepEraseStartAddr, uint32 eepEraseSize)
  821. {
  822. Std_ReturnType retReturnType = E_OK;
  823. MemIf_JobResultType retJobResultType;
  824. retReturnType = Eep_Erase(eepEraseStartAddr, eepEraseSize);
  825. if (E_OK != retReturnType)
  826. {
  827. return E_NOT_OK;
  828. }
  829. while (MEMIF_IDLE != Eep_GetStatus())
  830. {
  831. Eep_MainFunction();
  832. }
  833. retJobResultType = Eep_GetJobResult();
  834. if (MEMIF_JOB_OK != retJobResultType)
  835. {
  836. return E_NOT_OK;
  837. }
  838. return E_OK;
  839. }
  840. /* Write one or more complete eeprom pages to the eeprom device */
  841. Std_ReturnType HAL_EEP_Write(uint32 eepWriteStartAddr, uint8 *pDataNeedtoWrite, uint32 dataSize)
  842. {
  843. Std_ReturnType retReturnType = E_OK;
  844. MemIf_JobResultType retJobResultType;
  845. /*Erase the EEP before write*/
  846. retReturnType = HAL_EEP_Erase(eepWriteStartAddr, dataSize);
  847. if (E_OK != retReturnType)
  848. {
  849. return E_NOT_OK;
  850. }
  851. retReturnType = Eep_Write(eepWriteStartAddr, pDataNeedtoWrite, dataSize);
  852. if (E_OK != retReturnType)
  853. {
  854. return E_NOT_OK;
  855. }
  856. while (MEMIF_IDLE != Eep_GetStatus())
  857. {
  858. Eep_MainFunction();
  859. }
  860. retJobResultType = Eep_GetJobResult();
  861. if (MEMIF_JOB_OK != retJobResultType)
  862. {
  863. return E_NOT_OK;
  864. }
  865. return E_OK;
  866. }
  867. /* Reads from eeprom memory */
  868. Std_ReturnType HAL_EEP_Read(uint32 eepReadStartAddr, uint8 *pDataBuffer, uint32 dataSize)
  869. {
  870. Std_ReturnType retReturnType = E_OK;
  871. MemIf_JobResultType retJobResultType;
  872. retReturnType = Eep_Read(eepReadStartAddr, pDataBuffer, dataSize);
  873. if (E_OK != retReturnType)
  874. {
  875. return E_NOT_OK;
  876. }
  877. while (MEMIF_IDLE != Eep_GetStatus())
  878. {
  879. Eep_MainFunction();
  880. }
  881. retJobResultType = Eep_GetJobResult();
  882. if (MEMIF_JOB_OK != retJobResultType)
  883. {
  884. return E_NOT_OK;
  885. }
  886. return E_OK;
  887. }
  888. /* Compares a eeprom memory area with an application data buffer */
  889. Std_ReturnType HAL_EEP_Compare(uint32 eepCompareStartAddr, uint8 *pDataNeedtoCompare, uint32 dataSize)
  890. {
  891. Std_ReturnType retReturnType = E_OK;
  892. MemIf_JobResultType retJobResultType;
  893. retReturnType = Eep_Compare(eepCompareStartAddr, pDataNeedtoCompare, dataSize);
  894. if (E_OK != retReturnType)
  895. {
  896. return E_NOT_OK;
  897. }
  898. while (MEMIF_IDLE != Eep_GetStatus())
  899. {
  900. Eep_MainFunction();
  901. }
  902. retJobResultType = Eep_GetJobResult();
  903. if (MEMIF_JOB_OK != retJobResultType)
  904. {
  905. return E_NOT_OK;
  906. }
  907. return E_OK;
  908. }
  909. /* @brief VECTKEY value so that AIRCR register write is not ignored. */
  910. #define FEATURE_SCB_VECTKEY (0x05FAU)
  911. void SystemSoftwareReset(void)
  912. {
  913. uint32_t regValue;
  914. /* Read Application Interrupt and Reset Control Register */
  915. regValue = S32_SCB->AIRCR;
  916. /* Clear register key */
  917. regValue &= ~( S32_SCB_AIRCR_VECTKEY_MASK);
  918. /* Configure System reset request bit and Register Key */
  919. regValue |= S32_SCB_AIRCR_VECTKEY(FEATURE_SCB_VECTKEY);
  920. regValue |= S32_SCB_AIRCR_SYSRESETREQ(0x1u);
  921. /* Write computed register value */
  922. S32_SCB->AIRCR = regValue;
  923. }