system.c 14 KB

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  1. /*==================================================================================================
  2. * Project : RTD AUTOSAR 4.4
  3. * Platform : CORTEXM
  4. * Peripheral :
  5. * Dependencies : none
  6. *
  7. * Autosar Version : 4.4.0
  8. * Autosar Revision : ASR_REL_4_4_REV_0000
  9. * Autosar Conf.Variant :
  10. * SW Version : 1.0.0
  11. * Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
  12. *
  13. * (c) Copyright 2020-2021 NXP Semiconductors
  14. * All Rights Reserved.
  15. *
  16. * NXP Confidential. This software is owned or controlled by NXP and may only be
  17. * used strictly in accordance with the applicable license terms. By expressly
  18. * accepting such terms or by downloading, installing, activating and/or otherwise
  19. * using the software, you are agreeing that you have read, and that you agree to
  20. * comply with and are bound by, such license terms. If you do not agree to be
  21. * bound by the applicable license terms, then you may not retain, install,
  22. * activate or otherwise use the software.
  23. ==================================================================================================*/
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27. /*==================================================================================================
  28. * INCLUDE FILES
  29. * 1) system and project includes
  30. * 2) needed interfaces from external units
  31. * 3) internal and external interfaces from this unit
  32. ==================================================================================================*/
  33. #include "Platform_Types.h"
  34. #include "Mcal.h"
  35. #include "system.h"
  36. #ifdef S32K116
  37. #include "S32K116.h"
  38. #endif
  39. #ifdef S32K118
  40. #include "S32K118.h"
  41. #endif
  42. #ifdef S32K142
  43. #include "S32K142.h"
  44. #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
  45. #endif
  46. #ifdef S32K142W
  47. #include "S32K142W.h"
  48. #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
  49. #endif
  50. #ifdef S32K144
  51. #include "S32K144.h"
  52. #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
  53. #endif
  54. #ifdef S32K144W
  55. #include "S32K144W.h"
  56. #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
  57. #endif
  58. #ifdef S32K146
  59. #include "S32K146.h"
  60. #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
  61. #endif
  62. #ifdef S32K148
  63. #include "S32K148.h"
  64. #define ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
  65. #endif
  66. /*==================================================================================================
  67. * FILE VERSION CHECKS
  68. ==================================================================================================*/
  69. /*==================================================================================================
  70. * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
  71. ==================================================================================================*/
  72. /*==================================================================================================
  73. * LOCAL CONSTANTS
  74. ==================================================================================================*/
  75. /*==================================================================================================
  76. * LOCAL MACROS
  77. ==================================================================================================*/
  78. #define SVC_GoToSupervisor() ASM_KEYWORD("svc 0x0")
  79. #define SVC_GoToUser() ASM_KEYWORD("svc 0x1")
  80. #define S32_SCB_CPACR_CPx_MASK(CpNum) (0x3U << S32_SCB_CPACR_CPx_SHIFT(CpNum))
  81. #define S32_SCB_CPACR_CPx_SHIFT(CpNum) ((uint32)(2U*((uint32)CpNum)))
  82. #define S32_SCB_CPACR_CPx(CpNum, x) (((uint32)(((uint32)(x))<<S32_SCB_CPACR_CPx_SHIFT((CpNum))))&S32_SCB_CPACR_CPx_MASK((CpNum)))
  83. #define CODE_CACHE 0u
  84. #define CACHE_OK 0u
  85. #define CACHE_INVALID_PARAM 1u
  86. /*==================================================================================================
  87. * LOCAL VARIABLES
  88. ==================================================================================================*/
  89. /*==================================================================================================-
  90. * GLOBAL CONSTANTS
  91. ==================================================================================================*/
  92. /*==================================================================================================
  93. * GLOBAL VARIABLES
  94. ==================================================================================================*/
  95. /* Allocate a global variable which will be overwritten by the debugger if attached(in CMM), to catch the core after reset. */
  96. uint32 RESET_CATCH_CORE=0x00U;
  97. /*==================================================================================================
  98. * LOCAL FUNCTION PROTOTYPES
  99. ==================================================================================================*/
  100. /* Instruction cache initialization
  101. * sys_m4_cache_init(CODE_CACHE);
  102. */
  103. #ifdef I_CACHE_ENABLE
  104. static uint8 sys_m4_cache_init(uint8 cache);
  105. #endif
  106. #ifdef MCAL_ENABLE_USER_MODE_SUPPORT
  107. LOCAL_INLINE void Direct_GoToUser(void);
  108. #endif
  109. /*==================================================================================================
  110. * LOCAL FUNCTIONS
  111. ==================================================================================================*/
  112. /* Instruction cache initialization
  113. * sys_m4_cache_init(CODE_CACHE);
  114. */
  115. #ifdef I_CACHE_ENABLE
  116. static uint8 sys_m4_cache_init(uint8 cache)
  117. {
  118. uint8 RetValue = CACHE_OK;
  119. if (cache == CODE_CACHE)
  120. {
  121. /* Code Cache Init */
  122. /* Cache Set Command: set command bits in CCR */
  123. /* set invalidate way 1 and invalidate way 0 bits */
  124. IP_LMEM->PCCCR = 0x05000000UL;
  125. /* set ccr[go] bit to initiate command to invalidate cache */
  126. IP_LMEM->PCCCR |= LMEM_PCCCR_GO(1);
  127. /* wait until the ccr[go] bit clears to indicate command complete */
  128. while((IP_LMEM->PCCCR & LMEM_PCCCR_GO_MASK) == LMEM_PCCCR_GO_MASK){};
  129. /* enable cache */
  130. IP_LMEM->PCCCR |= LMEM_PCCCR_ENCACHE(1);
  131. }
  132. else
  133. {
  134. RetValue = CACHE_INVALID_PARAM;
  135. }
  136. return RetValue;
  137. }
  138. #endif
  139. #ifdef MCAL_ENABLE_USER_MODE_SUPPORT
  140. LOCAL_INLINE void Direct_GoToUser(void)
  141. {
  142. ASM_KEYWORD("push {r0}");
  143. ASM_KEYWORD("ldr r0, =0x1");
  144. ASM_KEYWORD("msr CONTROL, r0");
  145. ASM_KEYWORD("pop {r0}");
  146. }
  147. #endif
  148. /*==================================================================================================
  149. * GLOBAL FUNCTIONS
  150. ==================================================================================================*/
  151. #ifdef MCAL_ENABLE_USER_MODE_SUPPORT
  152. extern uint32 startup_getControlRegisterValue(void);
  153. extern uint32 startup_getAipsRegisterValue(void);
  154. extern void Suspend_Interrupts(void);
  155. extern void Resume_Interrupts(void);
  156. #endif /*MCAL_ENABLE_USER_MODE_SUPPORT*/
  157. /*================================================================================================*/
  158. /**
  159. * @brief startup_go_to_user_mode
  160. * @details Function called from startup.s to switch to user mode if MCAL_ENABLE_USER_MODE_SUPPORT
  161. * is defined
  162. */
  163. /*================================================================================================*/
  164. void startup_go_to_user_mode(void);
  165. void startup_go_to_user_mode(void)
  166. {
  167. #ifdef MCAL_ENABLE_USER_MODE_SUPPORT
  168. ASM_KEYWORD("svc 0x1");
  169. #endif
  170. }
  171. /*================================================================================================*/
  172. /**
  173. * @brief Default IRQ handler
  174. * @details Infinite Loop
  175. */
  176. /*================================================================================================*/
  177. void default_interrupt_routine(void)
  178. {
  179. while(TRUE){};
  180. }
  181. /*================================================================================================*/
  182. /**
  183. * @brief Sys_GoToSupervisor
  184. * @details function used to enter to supervisor mode.
  185. * check if it's needed to switch to supervisor mode and make the switch.
  186. * Return 1 if switch was done
  187. */
  188. /*================================================================================================*/
  189. #ifdef MCAL_ENABLE_USER_MODE_SUPPORT
  190. uint32 Sys_GoToSupervisor(void)
  191. {
  192. uint32 u32ControlRegValue;
  193. uint32 u32AipsRegValue;
  194. uint32 u32SwitchToSupervisor;
  195. /* if it's 0 then Thread mode is already in supervisor mode */
  196. u32ControlRegValue = startup_getControlRegisterValue();
  197. /* if it's 0 the core is in Thread mode, otherwise in Handler mode */
  198. u32AipsRegValue = startup_getAipsRegisterValue();
  199. /* if core is already in supervisor mode for Thread mode, or running form Handler mode, there is no need to make the switch */
  200. if((0U == (u32ControlRegValue & 1u)) || (0u < (u32AipsRegValue & 0xFFu)))
  201. {
  202. u32SwitchToSupervisor = 0U;
  203. }
  204. else
  205. {
  206. u32SwitchToSupervisor = 1U;
  207. SVC_GoToSupervisor();
  208. }
  209. return u32SwitchToSupervisor;
  210. }
  211. /*================================================================================================*/
  212. /**
  213. * @brief Sys_GoToUser_Return
  214. * @details function used to switch back to user mode for Thread mode, return a uint32 value passed as parameter
  215. */
  216. /*================================================================================================*/
  217. uint32 Sys_GoToUser_Return(uint32 u32SwitchToSupervisor, uint32 u32returnValue)
  218. {
  219. if (1UL == u32SwitchToSupervisor)
  220. {
  221. Direct_GoToUser();
  222. }
  223. return u32returnValue;
  224. }
  225. uint32 Sys_GoToUser(void)
  226. {
  227. Direct_GoToUser();
  228. return 0UL;
  229. }
  230. /*================================================================================================*/
  231. /**
  232. * @brief Sys_SuspendInterrupts
  233. * @details Suspend Interrupts
  234. */
  235. /*================================================================================================*/
  236. void Sys_SuspendInterrupts(void)
  237. {
  238. uint32 u32ControlRegValue;
  239. uint32 u32AipsRegValue;
  240. /* if it's 0 then Thread mode is already in supervisor mode */
  241. u32ControlRegValue = startup_getControlRegisterValue();
  242. /* if it's 0 the core is in Thread mode, otherwise in Handler mode */
  243. u32AipsRegValue = startup_getAipsRegisterValue();
  244. if((0U == (u32ControlRegValue & 1u)) || (0u < (u32AipsRegValue & 0xFFu)))
  245. {
  246. Suspend_Interrupts();
  247. }
  248. else
  249. {
  250. ASM_KEYWORD(" svc 0x3");
  251. }
  252. }
  253. /*================================================================================================*/
  254. /**
  255. * @brief Sys_ResumeInterrupts
  256. * @details Resume Interrupts
  257. */
  258. /*================================================================================================*/
  259. void Sys_ResumeInterrupts(void)
  260. {
  261. uint32 u32ControlRegValue;
  262. uint32 u32AipsRegValue;
  263. /* if it's 0 then Thread mode is already in supervisor mode */
  264. u32ControlRegValue = startup_getControlRegisterValue();
  265. /* if it's 0 the core is in Thread mode, otherwise in Handler mode */
  266. u32AipsRegValue = startup_getAipsRegisterValue();
  267. if((0U == (u32ControlRegValue & 1u)) || (0u < (u32AipsRegValue & 0xFFu)))
  268. {
  269. Resume_Interrupts();
  270. }
  271. else
  272. {
  273. ASM_KEYWORD(" svc 0x2");
  274. }
  275. }
  276. #endif
  277. /*================================================================================================*/
  278. /**
  279. * @brief Sys_GetCoreID
  280. * @details Function used to get the ID of the currently executing thread
  281. */
  282. /*================================================================================================*/
  283. #if !defined(USING_OS_AUTOSAROS)
  284. uint8 Sys_GetCoreID(void)
  285. {
  286. return 0U;
  287. }
  288. #endif
  289. /*================================================================================================*/
  290. /*
  291. * system initialization : system clock, interrupt router ...
  292. */
  293. #ifdef __ICCARM__
  294. #pragma default_function_attributes = @ ".systeminit"
  295. #else
  296. __attribute__ ((section (".systeminit")))
  297. #endif
  298. void SystemInit(void)
  299. {
  300. /**************************************************************************/
  301. /* FPU ENABLE*/
  302. /**************************************************************************/
  303. #ifdef ENABLE_FPU
  304. /* Enable CP10 and CP11 coprocessors */
  305. S32_SCB->CPACR |= (S32_SCB_CPACR_CPx(10U, 3U) | S32_SCB_CPACR_CPx(11U, 3U));
  306. ASM_KEYWORD("dsb");
  307. ASM_KEYWORD("isb");
  308. #endif /* ENABLE_FPU */
  309. #ifdef ENABLE_THREAD_MODE_ENTRY_CONFIGURATION
  310. S32_SCB->CCR |= 1u; /**< processor can enter Thread mode from any level under the
  311. control of an EXC_RETURN value, PendSV priority set to 0*/
  312. #endif
  313. S32_SCB->SHPR3 &= ~S32_SCB_SHPR3_PRI_14_MASK;
  314. /* enable the AIPS */
  315. IP_AIPS->MPRA = 0x77777777;
  316. IP_AIPS->PACRA = 0x0;
  317. IP_AIPS->PACRB = 0x0;
  318. IP_AIPS->PACRD = 0x0;
  319. IP_AIPS->OPACR[0] = 0x0;
  320. IP_AIPS->OPACR[1] = 0x0;
  321. IP_AIPS->OPACR[2] = 0x0;
  322. IP_AIPS->OPACR[3] = 0x0;
  323. IP_AIPS->OPACR[4] = 0x0;
  324. IP_AIPS->OPACR[5] = 0x0;
  325. IP_AIPS->OPACR[6] = 0x0;
  326. IP_AIPS->OPACR[7] = 0x0;
  327. IP_AIPS->OPACR[8] = 0x0;
  328. IP_AIPS->OPACR[9] = 0x0;
  329. IP_AIPS->OPACR[10] = 0x0;
  330. IP_AIPS->OPACR[11] = 0x0;
  331. /**************************************************************************/
  332. /* DEFAULT MEMORY ENABLE*/
  333. /**************************************************************************/
  334. ASM_KEYWORD("dsb");
  335. ASM_KEYWORD("isb");
  336. #ifdef I_CACHE_ENABLE
  337. /**************************************************************************/
  338. /* ENABLE CACHE */
  339. /**************************************************************************/
  340. (void)sys_m4_cache_init(CODE_CACHE);
  341. #endif
  342. }
  343. #ifdef __ICCARM__
  344. #pragma default_function_attributes =
  345. #endif
  346. #ifdef __cplusplus
  347. }
  348. #endif