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Trgmux_Ip_Cfg_Defines.h

Trgmux_Ip_Cfg_Defines.h 13 KB
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  1. /*==================================================================================================
    2. 

  2. *   Project              : RTD AUTOSAR 4.4
    3. 

  3. *   Platform             : CORTEXM
    4. 

  4. *   Peripheral           : DMA,CACHE,TRGMUX,FLEXIO
    5. 

  5. *   Dependencies         : none
    6. 

  6. *
    7. 

  7. *   Autosar Version      : 4.4.0
    8. 

  8. *   Autosar Revision     : ASR_REL_4_4_REV_0000
    9. 

  9. *   Autosar Conf.Variant :
    10. 

  10. *   SW Version           : 1.0.0
    11. 

  11. *   Build Version        : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
    12. 

  12. *
    13. 

  13. *   (c) Copyright 2020-2021 NXP Semiconductors
    14. 

  14. *   All Rights Reserved.
    15. 

  15. *
    16. 

  16. *   NXP Confidential. This software is owned or controlled by NXP and may only be
    17. 

  17. *   used strictly in accordance with the applicable license terms. By expressly
    18. 

  18. *   accepting such terms or by downloading, installing, activating and/or otherwise
    19. 

  19. *   using the software, you are agreeing that you have read, and that you agree to
    20. 

  20. *   comply with and are bound by, such license terms. If you do not agree to be
    21. 

  21. *   bound by the applicable license terms, then you may not retain, install,
    22. 

  22. *   activate or otherwise use the software.
    23. 

  23. ==================================================================================================*/
    24. 

  24. 

  25. /* Prevention from multiple including the same header */
    26. 

  26. #ifndef TRGMUX_IP_CFG_DEFINES_H_
    27. 

  27. #define TRGMUX_IP_CFG_DEFINES_H_
    28. 

  28. 

  29. #ifdef __cplusplus
    30. 

  30. extern "C"
    31. 

  31. {
    32. 

  32. #endif
    33. 

  33. 

  34. /*==================================================================================================
    35. 

  35. *                                        INCLUDE FILES
    36. 

  36. * 1) system and project includes
    37. 

  37. * 2) needed interfaces from external units
    38. 

  38. * 3) internal and external interfaces from this unit
    39. 

  39. ==================================================================================================*/
    40. 

  40. #include "StandardTypes.h"
    41. 

  41. #include "BasicTypes.h"
    42. 

  42. 

  43. /*==================================================================================================
    44. 

  44. *                                 SOURCE FILE VERSION INFORMATION
    45. 

  45. ==================================================================================================*/
    46. 

  46. #define TRGMUX_IP_CFG_DEFINES_VENDOR_ID_H                    43
    47. 

  47. #define TRGMUX_IP_CFG_DEFINES_MODULE_ID_H                    255
    48. 

  48. #define TRGMUX_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION_H     4
    49. 

  49. #define TRGMUX_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION_H     4
    50. 

  50. #define TRGMUX_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION_H  0
    51. 

  51. #define TRGMUX_IP_CFG_DEFINES_SW_MAJOR_VERSION_H             1
    52. 

  52. #define TRGMUX_IP_CFG_DEFINES_SW_MINOR_VERSION_H             0
    53. 

  53. #define TRGMUX_IP_CFG_DEFINES_SW_PATCH_VERSION_H             0
    54. 

  54. 

  55. /*==================================================================================================
    56. 

  56.                                       FILE VERSION CHECKS
    57. 

  57. ==================================================================================================*/
    58. 

  58. #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
    59. 

  59. /* Check if header file and StandardTypes header file are of the same Autosar version */
    60. 

  60. #if ((TRGMUX_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION_H != STD_AR_RELEASE_MAJOR_VERSION) || \
    61. 

  61.      (TRGMUX_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION_H != STD_AR_RELEASE_MINOR_VERSION))
    62. 

  62.     #error "AutoSar Version Numbers of Trgmux_Ip_Cfg_Defines.h and StandardTypes.h are different"
    63. 

  63. #endif
    64. 

  64. #endif
    65. 

  65. 

  66. /*==================================================================================================
    67. 

  67. *                                       DEFINES AND MACROS
    68. 

  68. ==================================================================================================*/
    69. 

  69. /*-----------------------------------------------/
    70. 

  70. /  TRGMUX IP USER MODE SUPPORT                   /
    71. 

  71. /-----------------------------------------------*/
    72. 

  72. #define TRGMUX_IP_USER_MODE_SUPPORT_IS_AVAILABLE      STD_OFF
    73. 

  73. 

  74. #define TRGMUX_IP_IS_AVAILABLE                         STD_OFF
    75. 

  75. 

  76. /*-----------------------------------------------/
    77. 

  77. /  TRGMUX IP DEV ERROR DETECT SUPPORT            /
    78. 

  78. /-----------------------------------------------*/
    79. 

  79. #define TRGMUX_IP_DEV_ERROR_DETECT                     STD_OFF
    80. 

  80. 

  81. /*-----------------------------------------------/
    82. 

  82. /  TRGMUX HARDWARE INSTANCE                      /
    83. 

  83. /-----------------------------------------------*/
    84. 

  84. #define TRGMUX_IP_HW_INST_0                            ((uint8)0U)
    85. 

  85. 

  86. /*-----------------------------------------------/
    87. 

  87. /  TRGMUX HARDWARE TRIGGER INPUT                 /
    88. 

  88. /-----------------------------------------------*/
    89. 

  89. #define TRGMUX_IP_INPUT_LOGIC0_VSS                     ((uint8)0U)
    90. 

  90. #define TRGMUX_IP_INPUT_LOGIC1_VDD                     ((uint8)1U)
    91. 

  91. #define TRGMUX_IP_INPUT_TRGMUX_IN0                     ((uint8)2U)
    92. 

  92. #define TRGMUX_IP_INPUT_TRGMUX_IN1                     ((uint8)3U)
    93. 

  93. #define TRGMUX_IP_INPUT_TRGMUX_IN2                     ((uint8)4U)
    94. 

  94. #define TRGMUX_IP_INPUT_TRGMUX_IN3                     ((uint8)5U)
    95. 

  95. #define TRGMUX_IP_INPUT_TRGMUX_IN4                     ((uint8)6U)
    96. 

  96. #define TRGMUX_IP_INPUT_TRGMUX_IN5                     ((uint8)7U)
    97. 

  97. #define TRGMUX_IP_INPUT_TRGMUX_IN6                     ((uint8)8U)
    98. 

  98. #define TRGMUX_IP_INPUT_TRGMUX_IN7                     ((uint8)9U)
    99. 

  99. #define TRGMUX_IP_INPUT_TRGMUX_IN8                     ((uint8)10U)
    100. 

  100. #define TRGMUX_IP_INPUT_TRGMUX_IN9                     ((uint8)11U)
    101. 

  101. #define TRGMUX_IP_INPUT_TRGMUX_IN10                    ((uint8)12U)
    102. 

  102. #define TRGMUX_IP_INPUT_TRGMUX_IN11                    ((uint8)13U)
    103. 

  103. #define TRGMUX_IP_INPUT_CMP0_OUT                       ((uint8)14U)
    104. 

  104. #define TRGMUX_IP_INPUT_LPIT_CH0                       ((uint8)17U)
    105. 

  105. #define TRGMUX_IP_INPUT_LPIT_CH1                       ((uint8)18U)
    106. 

  106. #define TRGMUX_IP_INPUT_LPIT_CH2                       ((uint8)19U)
    107. 

  107. #define TRGMUX_IP_INPUT_LPIT_CH3                       ((uint8)20U)
    108. 

  108. #define TRGMUX_IP_INPUT_LPTMR0                         ((uint8)21U)
    109. 

  109. #define TRGMUX_IP_INPUT_FTM0_INIT_TRIG                 ((uint8)22U)
    110. 

  110. #define TRGMUX_IP_INPUT_FTM0_EXT_TRIG                  ((uint8)23U)
    111. 

  111. #define TRGMUX_IP_INPUT_FTM1_INIT_TRIG                 ((uint8)24U)
    112. 

  112. #define TRGMUX_IP_INPUT_FTM1_EXT_TRIG                  ((uint8)25U)
    113. 

  113. #define TRGMUX_IP_INPUT_FTM2_INIT_TRIG                 ((uint8)26U)
    114. 

  114. #define TRGMUX_IP_INPUT_FTM2_EXT_TRIG                  ((uint8)27U)
    115. 

  115. #define TRGMUX_IP_INPUT_FTM3_INIT_TRIG                 ((uint8)28U)
    116. 

  116. #define TRGMUX_IP_INPUT_FTM3_EXT_TRIG                  ((uint8)29U)
    117. 

  117. #define TRGMUX_IP_INPUT_ADC0_COCO_0                    ((uint8)30U)
    118. 

  118. #define TRGMUX_IP_INPUT_ADC0_COCO_1                    ((uint8)31U)
    119. 

  119. #define TRGMUX_IP_INPUT_ADC1_COCO_0                    ((uint8)32U)
    120. 

  120. #define TRGMUX_IP_INPUT_ADC1_COCO_1                    ((uint8)33U)
    121. 

  121. #define TRGMUX_IP_INPUT_PDB0_ADCH0_TRIG                ((uint8)34U)
    122. 

  122. #define TRGMUX_IP_INPUT_PDB0_PULSE_OUT                 ((uint8)36U)
    123. 

  123. #define TRGMUX_IP_INPUT_PDB1_ADCH0_TRIG                ((uint8)37U)
    124. 

  124. #define TRGMUX_IP_INPUT_PDB1_PULSE_OUT                 ((uint8)39U)
    125. 

  125. #define TRGMUX_IP_INPUT_RTC_ALARM                      ((uint8)43U)
    126. 

  126. #define TRGMUX_IP_INPUT_RTC_SECOND                     ((uint8)44U)
    127. 

  127. #define TRGMUX_IP_INPUT_FLEXIO_TRIG0                   ((uint8)45U)
    128. 

  128. #define TRGMUX_IP_INPUT_FLEXIO_TRIG1                   ((uint8)46U)
    129. 

  129. #define TRGMUX_IP_INPUT_FLEXIO_TRIG2                   ((uint8)47U)
    130. 

  130. #define TRGMUX_IP_INPUT_FLEXIO_TRIG3                   ((uint8)48U)
    131. 

  131. #define TRGMUX_IP_INPUT_LPUART0_RX_DATA                ((uint8)49U)
    132. 

  132. #define TRGMUX_IP_INPUT_LPUART0_TX_DATA                ((uint8)50U)
    133. 

  133. #define TRGMUX_IP_INPUT_LPUART0_RX_IDLE                ((uint8)51U)
    134. 

  134. #define TRGMUX_IP_INPUT_LPUART1_RX_DATA                ((uint8)52U)
    135. 

  135. #define TRGMUX_IP_INPUT_LPUART1_TX_DATA                ((uint8)53U)
    136. 

  136. #define TRGMUX_IP_INPUT_LPUART1_RX_IDLE                ((uint8)54U)
    137. 

  137. #define TRGMUX_IP_INPUT_LPI2C0_MASTER_TRIG             ((uint8)55U)
    138. 

  138. #define TRGMUX_IP_INPUT_LPI2C0_SLAVE_TRIG              ((uint8)56U)
    139. 

  139. #define TRGMUX_IP_INPUT_LPSPI0_FRAME                   ((uint8)59U)
    140. 

  140. #define TRGMUX_IP_INPUT_LPSPI0_RX_DATA                 ((uint8)60U)
    141. 

  141. #define TRGMUX_IP_INPUT_LPSPI1_FRAME                   ((uint8)61U)
    142. 

  142. #define TRGMUX_IP_INPUT_LPSPI1_RX_DATA                 ((uint8)62U)
    143. 

  143. #define TRGMUX_IP_INPUT_SIM_SW_TRIG                    ((uint8)63U)
    144. 

  144. #define TRGMUX_IP_INPUT_LPI2C1_MASTER_TRIG             ((uint8)67U)
    145. 

  145. #define TRGMUX_IP_INPUT_LPI2C1_SLAVE_TRIG              ((uint8)68U)
    146. 

  146. #define TRGMUX_IP_INPUT_FTM4_INIT_TRIG                 ((uint8)69U)
    147. 

  147. #define TRGMUX_IP_INPUT_FTM4_EXT_TRIG                  ((uint8)70U)
    148. 

  148. #define TRGMUX_IP_INPUT_FTM5_INIT_TRIG                 ((uint8)71U)
    149. 

  149. #define TRGMUX_IP_INPUT_FTM5_EXT_TRIG                  ((uint8)72U)
    150. 

  150. #define TRGMUX_IP_INPUT_FTM6_INIT_TRIG                 ((uint8)73U)
    151. 

  151. #define TRGMUX_IP_INPUT_FTM6_EXT_TRIG                  ((uint8)74U)
    152. 

  152. #define TRGMUX_IP_INPUT_FTM7_INIT_TRIG                 ((uint8)75U)
    153. 

  153. #define TRGMUX_IP_INPUT_FTM7_EXT_TRIG                  ((uint8)76U)
    154. 

  154. 

  155. /*-----------------------------------------------/
    156. 

  156. /  TRGMUX HARDWARE TRIGGER OUTPUT                /
    157. 

  157. /-----------------------------------------------*/
    158. 

  158. #define TRGMUX_IP_OUTPUT_DMA_CH0                       ((uint8)0U)
    159. 

  159. #define TRGMUX_IP_OUTPUT_DMA_CH1                       ((uint8)1U)
    160. 

  160. #define TRGMUX_IP_OUTPUT_DMA_CH2                       ((uint8)2U)
    161. 

  161. #define TRGMUX_IP_OUTPUT_DMA_CH3                       ((uint8)3U)
    162. 

  162. #define TRGMUX_IP_OUTPUT_EXTOUT0_TRGMUX_OUT0           ((uint8)4U)
    163. 

  163. #define TRGMUX_IP_OUTPUT_EXTOUT0_TRGMUX_OUT1           ((uint8)5U)
    164. 

  164. #define TRGMUX_IP_OUTPUT_EXTOUT0_TRGMUX_OUT2           ((uint8)6U)
    165. 

  165. #define TRGMUX_IP_OUTPUT_EXTOUT0_TRGMUX_OUT3           ((uint8)7U)
    166. 

  166. #define TRGMUX_IP_OUTPUT_EXTOUT1_TRGMUX_OUT4           ((uint8)8U)
    167. 

  167. #define TRGMUX_IP_OUTPUT_EXTOUT1_TRGMUX_OUT5           ((uint8)9U)
    168. 

  168. #define TRGMUX_IP_OUTPUT_EXTOUT1_TRGMUX_OUT6           ((uint8)10U)
    169. 

  169. #define TRGMUX_IP_OUTPUT_EXTOUT1_TRGMUX_OUT7           ((uint8)11U)
    170. 

  170. #define TRGMUX_IP_OUTPUT_ADC0_ADHWT_TRIG_0             ((uint8)12U)
    171. 

  171. #define TRGMUX_IP_OUTPUT_ADC0_ADHWT_TRIG_1             ((uint8)13U)
    172. 

  172. #define TRGMUX_IP_OUTPUT_ADC0_ADHWT_TRIG_2             ((uint8)14U)
    173. 

  173. #define TRGMUX_IP_OUTPUT_ADC0_ADHWT_TRIG_3             ((uint8)15U)
    174. 

  174. #define TRGMUX_IP_OUTPUT_ADC1_ADHWT_TRIG_0             ((uint8)16U)
    175. 

  175. #define TRGMUX_IP_OUTPUT_ADC1_ADHWT_TRIG_1             ((uint8)17U)
    176. 

  176. #define TRGMUX_IP_OUTPUT_ADC1_ADHWT_TRIG_2             ((uint8)18U)
    177. 

  177. #define TRGMUX_IP_OUTPUT_ADC1_ADHWT_TRIG_3             ((uint8)19U)
    178. 

  178. #define TRGMUX_IP_OUTPUT_CMP0_SAMPLE_INPUT             ((uint8)28U)
    179. 

  179. #define TRGMUX_IP_OUTPUT_FTM0_HWTRIG0                  ((uint8)40U)
    180. 

  180. #define TRGMUX_IP_OUTPUT_FTM0_FAULT0                   ((uint8)41U)
    181. 

  181. #define TRGMUX_IP_OUTPUT_FTM0_FAULT1                   ((uint8)42U)
    182. 

  182. #define TRGMUX_IP_OUTPUT_FTM0_FAULT2                   ((uint8)43U)
    183. 

  183. #define TRGMUX_IP_OUTPUT_FTM1_HWTRIG0                  ((uint8)44U)
    184. 

  184. #define TRGMUX_IP_OUTPUT_FTM1_FAULT0                   ((uint8)45U)
    185. 

  185. #define TRGMUX_IP_OUTPUT_FTM1_FAULT1                   ((uint8)46U)
    186. 

  186. #define TRGMUX_IP_OUTPUT_FTM1_FAULT2                   ((uint8)47U)
    187. 

  187. #define TRGMUX_IP_OUTPUT_FTM2_HWTRIG0                  ((uint8)48U)
    188. 

  188. #define TRGMUX_IP_OUTPUT_FTM2_FAULT0                   ((uint8)49U)
    189. 

  189. #define TRGMUX_IP_OUTPUT_FTM2_FAULT1                   ((uint8)50U)
    190. 

  190. #define TRGMUX_IP_OUTPUT_FTM2_FAULT2                   ((uint8)51U)
    191. 

  191. #define TRGMUX_IP_OUTPUT_FTM3_HWTRIG0                  ((uint8)52U)
    192. 

  192. #define TRGMUX_IP_OUTPUT_FTM3_FAULT0                   ((uint8)53U)
    193. 

  193. #define TRGMUX_IP_OUTPUT_FTM3_FAULT1                   ((uint8)54U)
    194. 

  194. #define TRGMUX_IP_OUTPUT_FTM3_FAULT2                   ((uint8)55U)
    195. 

  195. #define TRGMUX_IP_OUTPUT_PDB0_TRIGGER_IN0              ((uint8)56U)
    196. 

  196. #define TRGMUX_IP_OUTPUT_PDB1_TRIGGER_IN0              ((uint8)60U)
    197. 

  197. #define TRGMUX_IP_OUTPUT_FLEXIO_TRG_TIM0               ((uint8)68U)
    198. 

  198. #define TRGMUX_IP_OUTPUT_FLEXIO_TRG_TIM1               ((uint8)69U)
    199. 

  199. #define TRGMUX_IP_OUTPUT_FLEXIO_TRG_TIM2               ((uint8)70U)
    200. 

  200. #define TRGMUX_IP_OUTPUT_FLEXIO_TRG_TIM3               ((uint8)71U)
    201. 

  201. #define TRGMUX_IP_OUTPUT_LPIT0_TRG_CH0                 ((uint8)72U)
    202. 

  202. #define TRGMUX_IP_OUTPUT_LPIT0_TRG_CH1                 ((uint8)73U)
    203. 

  203. #define TRGMUX_IP_OUTPUT_LPIT0_TRG_CH2                 ((uint8)74U)
    204. 

  204. #define TRGMUX_IP_OUTPUT_LPIT0_TRG_CH3                 ((uint8)75U)
    205. 

  205. #define TRGMUX_IP_OUTPUT_LPUART0_TRG                   ((uint8)76U)
    206. 

  206. #define TRGMUX_IP_OUTPUT_LPUART1_TRG                   ((uint8)80U)
    207. 

  207. #define TRGMUX_IP_OUTPUT_LPI2C0_TRG                    ((uint8)84U)
    208. 

  208. #define TRGMUX_IP_OUTPUT_LPSPI0_TRG                    ((uint8)92U)
    209. 

  209. #define TRGMUX_IP_OUTPUT_LPSPI1_TRG                    ((uint8)96U)
    210. 

  210. #define TRGMUX_IP_OUTPUT_LPTMR0_ALT0                   ((uint8)100U)
    211. 

  211. #define TRGMUX_IP_OUTPUT_LPI2C1_TRG                    ((uint8)108U)
    212. 

  212. #define TRGMUX_IP_OUTPUT_FTM4_HWTRIG0                  ((uint8)112U)
    213. 

  213. #define TRGMUX_IP_OUTPUT_FTM5_HWTRIG0                  ((uint8)116U)
    214. 

  214. #define TRGMUX_IP_OUTPUT_FTM6_HWTRIG0                  ((uint8)120U)
    215. 

  215. #define TRGMUX_IP_OUTPUT_FTM7_HWTRIG0                  ((uint8)124U)
    216. 

  216. 

  217. 

  218. #ifdef __cplusplus
    219. 

  219. }
    220. 

  220. #endif
    221. 

  221. 

  222. #endif  /* TRGMUX_IP_CFG_DEFINES_H_ */
    223. 

  223. 

  224. /*==================================================================================================
    225. 

  225.  *                                        END OF FILE
    226. 

  226. ==================================================================================================*/
    227.