SchM_Dio.c 17 KB

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  1. /*==================================================================================================
  2. * Project : RTD AUTOSAR 4.4
  3. * Platform : CORTEXM
  4. * Peripheral :
  5. * Dependencies : none
  6. *
  7. * Autosar Version : 4.4.0
  8. * Autosar Revision : ASR_REL_4_4_REV_0000
  9. * Autosar Conf.Variant :
  10. * SW Version : 1.0.0
  11. * Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
  12. *
  13. * (c) Copyright 2020-2021 NXP Semiconductors
  14. * All Rights Reserved.
  15. *
  16. * NXP Confidential. This software is owned or controlled by NXP and may only be
  17. * used strictly in accordance with the applicable license terms. By expressly
  18. * accepting such terms or by downloading, installing, activating and/or otherwise
  19. * using the software, you are agreeing that you have read, and that you agree to
  20. * comply with and are bound by, such license terms. If you do not agree to be
  21. * bound by the applicable license terms, then you may not retain, install,
  22. * activate or otherwise use the software.
  23. ==================================================================================================*/
  24. /**
  25. * @file
  26. *
  27. * @addtogroup RTE_MODULE
  28. * @{
  29. */
  30. #ifdef __cplusplus
  31. extern "C"{
  32. #endif
  33. /*==================================================================================================
  34. * INCLUDE FILES
  35. * 1) system and project includes
  36. * 2) needed interfaces from external units
  37. * 3) internal and external interfaces from this unit
  38. ==================================================================================================*/
  39. #include "Std_Types.h"
  40. #include "Mcal.h"
  41. #include "OsIf.h"
  42. #include "SchM_Dio.h"
  43. #ifdef MCAL_TESTING_ENVIRONMENT
  44. #include "EUnit.h" /* EUnit Test Suite */
  45. #endif
  46. /*==================================================================================================
  47. * SOURCE FILE VERSION INFORMATION
  48. ==================================================================================================*/
  49. #define SCHM_DIO_AR_RELEASE_MAJOR_VERSION_C 4
  50. #define SCHM_DIO_AR_RELEASE_MINOR_VERSION_C 4
  51. #define SCHM_DIO_AR_RELEASE_REVISION_VERSION_C 0
  52. #define SCHM_DIO_SW_MAJOR_VERSION_C 1
  53. #define SCHM_DIO_SW_MINOR_VERSION_C 0
  54. #define SCHM_DIO_SW_PATCH_VERSION_C 0
  55. /*==================================================================================================
  56. * LOCAL CONSTANTS
  57. ==================================================================================================*/
  58. #ifdef MCAL_PLATFORM_ARM
  59. #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
  60. #define ISR_STATE_MASK ((uint32)0x00000002UL) /**< @brief DAIF bit I and F */
  61. #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
  62. #define ISR_STATE_MASK ((uint32)0x00000080UL) /**< @brief CPSR bit I */
  63. #else
  64. #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
  65. #define ISR_STATE_MASK ((uint32)0x000000FFUL) /**< @brief BASEPRI[7:0] mask */
  66. #else
  67. #define ISR_STATE_MASK ((uint32)0x00000001UL) /**< @brief PRIMASK bit 0 */
  68. #endif
  69. #endif
  70. #else
  71. #ifdef MCAL_PLATFORM_S12
  72. #define ISR_STATE_MASK ((uint32)0x00000010UL) /**< @brief I bit of CCR */
  73. #else
  74. #define ISR_STATE_MASK ((uint32)0x00008000UL) /**< @brief EE bit of MSR */
  75. #endif
  76. #endif
  77. /*==================================================================================================
  78. * LOCAL MACROS
  79. ==================================================================================================*/
  80. #ifdef MCAL_PLATFORM_ARM
  81. #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
  82. #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)3)
  83. #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
  84. #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR_STATE_MASK))
  85. #else
  86. #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0)
  87. #endif
  88. #else
  89. #ifdef MCAL_PLATFORM_S12
  90. #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0)
  91. #else
  92. #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK))
  93. #endif
  94. #endif
  95. /*==================================================================================================
  96. * FILE VERSION CHECKS
  97. ==================================================================================================*/
  98. /*==================================================================================================
  99. * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
  100. ==================================================================================================*/
  101. /*==================================================================================================
  102. * LOCAL VARIABLES
  103. ==================================================================================================*/
  104. #define RTE_START_SEC_VAR_CLEARED_32_NO_CACHEABLE
  105. #include "Rte_MemMap.h"
  106. static volatile uint32 msr_DIO_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
  107. static volatile uint32 reentry_guard_DIO_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
  108. static volatile uint32 msr_DIO_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
  109. static volatile uint32 reentry_guard_DIO_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
  110. #define RTE_STOP_SEC_VAR_CLEARED_32_NO_CACHEABLE
  111. #include "Rte_MemMap.h"
  112. /*==================================================================================================
  113. * GLOBAL CONSTANTS
  114. ==================================================================================================*/
  115. /*==================================================================================================
  116. * GLOBAL VARIABLES
  117. ==================================================================================================*/
  118. /*==================================================================================================
  119. * LOCAL FUNCTION PROTOTYPES
  120. ==================================================================================================*/
  121. #ifndef _COSMIC_C_S32K1XX_
  122. /*================================================================================================*/
  123. /**
  124. * @brief This function returns the MSR register value (32 bits).
  125. * @details This function returns the MSR register value (32 bits).
  126. *
  127. * @param[in] void No input parameters
  128. * @return uint32 msr This function returns the MSR register value (32 bits).
  129. *
  130. * @pre None
  131. * @post None
  132. *
  133. */
  134. uint32 Dio_schm_read_msr(void);
  135. #endif /*ifndef _COSMIC_C_S32K1XX_*/
  136. /*==================================================================================================
  137. * LOCAL FUNCTIONS
  138. ==================================================================================================*/
  139. #define RTE_START_SEC_CODE
  140. #include "Rte_MemMap.h"
  141. #if (defined(_GREENHILLS_C_S32K1XX_) || defined(_CODEWARRIOR_C_S32K1XX_))
  142. /*================================================================================================*/
  143. /**
  144. * @brief This macro returns the MSR register value (32 bits).
  145. * @details This macro function implementation returns the MSR register value in r3 (32 bits).
  146. *
  147. * @pre None
  148. * @post None
  149. *
  150. */
  151. #ifdef MCAL_PLATFORM_ARM
  152. #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
  153. ASM_KEYWORD uint32 Dio_schm_read_msr(void)
  154. {
  155. mrs x0, S3_3_c4_c2_1
  156. }
  157. #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
  158. ASM_KEYWORD uint32 Dio_schm_read_msr(void)
  159. {
  160. mrs r0, CPSR
  161. }
  162. #else
  163. ASM_KEYWORD uint32 Dio_schm_read_msr(void)
  164. {
  165. #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
  166. mrs r0, BASEPRI
  167. #else
  168. mrs r0, PRIMASK
  169. #endif
  170. }
  171. #endif
  172. #else
  173. #ifdef MCAL_PLATFORM_S12
  174. ASM_KEYWORD uint32 Dio_schm_read_msr(void)
  175. {
  176. tfr ccr, d6
  177. }
  178. #else
  179. ASM_KEYWORD uint32 Dio_schm_read_msr(void)
  180. {
  181. mfmsr r3
  182. }
  183. #endif
  184. #endif
  185. #endif /*#ifdef GHS||CW*/
  186. #ifdef _DIABDATA_C_S32K1XX_
  187. /**
  188. * @brief This function returns the MSR register value (32 bits).
  189. * @details This function returns the MSR register value (32 bits).
  190. *
  191. * @param[in] void No input parameters
  192. * @return uint32 msr This function returns the MSR register value (32 bits).
  193. *
  194. * @pre None
  195. * @post None
  196. *
  197. */
  198. #ifdef MCAL_PLATFORM_ARM
  199. uint32 Dio_schm_read_msr(void)
  200. {
  201. register uint32 reg_tmp;
  202. #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
  203. __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
  204. #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
  205. __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
  206. #else
  207. #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
  208. __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
  209. #else
  210. __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
  211. #endif
  212. #endif
  213. return (uint32)reg_tmp;
  214. }
  215. #else
  216. ASM_KEYWORD uint32 Dio_schm_read_msr(void)
  217. {
  218. mfmsr r3
  219. }
  220. #endif /* MCAL_PLATFORM_ARM */
  221. #endif /* _DIABDATA_C_S32K1XX_*/
  222. #ifdef _COSMIC_C_S32K1XX_
  223. /*================================================================================================*/
  224. /**
  225. * @brief This function returns the MSR register value (32 bits).
  226. * @details This function returns the MSR register value (32 bits).
  227. *
  228. * @param[in] void No input parameters
  229. * @return uint32 msr This function returns the MSR register value (32 bits).
  230. *
  231. * @pre None
  232. * @post None
  233. *
  234. */
  235. #ifdef MCAL_PLATFORM_S12
  236. #define Dio_schm_read_msr() ASM_KEYWORD("tfr ccr, d6")
  237. #else
  238. #define Dio_schm_read_msr() ASM_KEYWORD("mfmsr r3")
  239. #endif
  240. #endif /*Cosmic compiler only*/
  241. #ifdef _HITECH_C_S32K1XX_
  242. /*================================================================================================*/
  243. /**
  244. * @brief This function returns the MSR register value (32 bits).
  245. * @details This function returns the MSR register value (32 bits).
  246. *
  247. * @param[in] void No input parameters
  248. * @return uint32 msr This function returns the MSR register value (32 bits).
  249. *
  250. * @pre None
  251. * @post None
  252. *
  253. */
  254. uint32 Dio_schm_read_msr(void)
  255. {
  256. uint32 result;
  257. __asm volatile("mfmsr %0" : "=r" (result) :);
  258. return result;
  259. }
  260. #endif /*HighTec compiler only*/
  261. /*================================================================================================*/
  262. #ifdef _LINARO_C_S32K1XX_
  263. /**
  264. * @brief This function returns the MSR register value (32 bits).
  265. * @details This function returns the MSR register value (32 bits).
  266. *
  267. * @param[in] void No input parameters
  268. * @return uint32 msr This function returns the MSR register value (32 bits).
  269. *
  270. * @pre None
  271. * @post None
  272. *
  273. */
  274. uint32 Dio_schm_read_msr(void)
  275. {
  276. register uint32 reg_tmp;
  277. #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
  278. __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
  279. #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
  280. __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
  281. #else
  282. #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
  283. __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
  284. #else
  285. __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
  286. #endif
  287. #endif
  288. return (uint32)reg_tmp;
  289. }
  290. #endif /* _LINARO_C_S32K1XX_*/
  291. /*================================================================================================*/
  292. #ifdef _ARM_DS5_C_S32K1XX_
  293. /**
  294. * @brief This function returns the MSR register value (32 bits).
  295. * @details This function returns the MSR register value (32 bits).
  296. *
  297. * @param[in] void No input parameters
  298. * @return uint32 msr This function returns the MSR register value (32 bits).
  299. *
  300. * @pre None
  301. * @post None
  302. *
  303. */
  304. uint32 Dio_schm_read_msr(void)
  305. {
  306. register uint32 reg_tmp;
  307. #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
  308. __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
  309. #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
  310. __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
  311. #else
  312. #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
  313. __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
  314. #else
  315. __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
  316. #endif
  317. #endif
  318. return (uint32)reg_tmp;
  319. }
  320. #endif /* _ARM_DS5_C_S32K1XX_ */
  321. #ifdef _IAR_C_S32K1XX_
  322. /**
  323. * @brief This function returns the MSR register value (32 bits).
  324. * @details This function returns the MSR register value (32 bits).
  325. *
  326. * @param[in] void No input parameters
  327. * @return uint32 msr This function returns the MSR register value (32 bits).
  328. *
  329. * @pre None
  330. * @post None
  331. *
  332. */
  333. uint32 Dio_schm_read_msr(void)
  334. {
  335. register uint32 reg_tmp;
  336. #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
  337. __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
  338. #else
  339. __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
  340. #endif
  341. return (uint32)reg_tmp;
  342. }
  343. #endif /* _IAR_C_S32K1XX_ */
  344. #define RTE_STOP_SEC_CODE
  345. #include "Rte_MemMap.h"
  346. /*==================================================================================================
  347. * GLOBAL FUNCTIONS
  348. ==================================================================================================*/
  349. #define RTE_START_SEC_CODE
  350. #include "Rte_MemMap.h"
  351. void SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00(void)
  352. {
  353. uint32 u32CoreId = (uint32)OsIf_GetCoreID();
  354. if(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId])
  355. {
  356. #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
  357. msr_DIO_EXCLUSIVE_AREA_00[u32CoreId] = OsIf_Trusted_Call_Return(Dio_schm_read_msr);
  358. #else
  359. msr_DIO_EXCLUSIVE_AREA_00[u32CoreId] = Dio_schm_read_msr(); /*read MSR (to store interrupts state)*/
  360. #endif /* MCAL_ENABLE_USER_MODE_SUPPORT */
  361. if (ISR_ON(msr_DIO_EXCLUSIVE_AREA_00[u32CoreId])) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/
  362. {
  363. OsIf_SuspendAllInterrupts();
  364. #ifdef _ARM_DS5_C_S32K1XX_
  365. ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
  366. #endif
  367. }
  368. }
  369. reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId]++;
  370. }
  371. void SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_00(void)
  372. {
  373. uint32 u32CoreId = (uint32)OsIf_GetCoreID();
  374. reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId]--;
  375. if ((ISR_ON(msr_DIO_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId])) /*if interrupts were enabled*/
  376. {
  377. OsIf_ResumeAllInterrupts();
  378. #ifdef _ARM_DS5_C_S32K1XX_
  379. ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
  380. #endif
  381. }
  382. }
  383. void SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_01(void)
  384. {
  385. uint32 u32CoreId = (uint32)OsIf_GetCoreID();
  386. if(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId])
  387. {
  388. #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
  389. msr_DIO_EXCLUSIVE_AREA_01[u32CoreId] = OsIf_Trusted_Call_Return(Dio_schm_read_msr);
  390. #else
  391. msr_DIO_EXCLUSIVE_AREA_01[u32CoreId] = Dio_schm_read_msr(); /*read MSR (to store interrupts state)*/
  392. #endif /* MCAL_ENABLE_USER_MODE_SUPPORT */
  393. if (ISR_ON(msr_DIO_EXCLUSIVE_AREA_01[u32CoreId])) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/
  394. {
  395. OsIf_SuspendAllInterrupts();
  396. #ifdef _ARM_DS5_C_S32K1XX_
  397. ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
  398. #endif
  399. }
  400. }
  401. reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId]++;
  402. }
  403. void SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_01(void)
  404. {
  405. uint32 u32CoreId = (uint32)OsIf_GetCoreID();
  406. reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId]--;
  407. if ((ISR_ON(msr_DIO_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId])) /*if interrupts were enabled*/
  408. {
  409. OsIf_ResumeAllInterrupts();
  410. #ifdef _ARM_DS5_C_S32K1XX_
  411. ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
  412. #endif
  413. }
  414. }
  415. #ifdef MCAL_TESTING_ENVIRONMENT
  416. /**
  417. @brief This function checks that all entered exclusive areas were also exited.
  418. @details This function checks that all entered exclusive areas were also exited. The check
  419. is done by verifying that all reentry_guard_* static variables are back to the
  420. zero value.
  421. @param[in] void No input parameters
  422. @return void This function does not return a value. Test asserts are used instead.
  423. @pre None
  424. @post None
  425. @remarks Covers
  426. @remarks Implements
  427. */
  428. void SchM_Check_dio(void)
  429. {
  430. uint32 u32CoreId = (uint32)OsIf_GetCoreID();
  431. EU_ASSERT(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId]);
  432. reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId] = 0UL; /*reset reentry_guard_DIO_EXCLUSIVE_AREA_00 for the next test in the suite*/
  433. EU_ASSERT(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId]);
  434. reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId] = 0UL; /*reset reentry_guard_DIO_EXCLUSIVE_AREA_01 for the next test in the suite*/
  435. }
  436. #endif /*MCAL_TESTING_ENVIRONMENT*/
  437. #define RTE_STOP_SEC_CODE
  438. #include "Rte_MemMap.h"
  439. #ifdef __cplusplus
  440. }
  441. #endif
  442. /** @} */