Can_VS_0_PBcfg.c 25 KB

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  1. /*==================================================================================================
  2. * Project : RTD AUTOSAR 4.4
  3. * Platform : CORTEXM
  4. * Peripheral : FLEXCAN
  5. * Dependencies :
  6. *
  7. * Autosar Version : 4.4.0
  8. * Autosar Revision : ASR_REL_4_4_REV_0000
  9. * Autosar Conf.Variant :
  10. * SW Version : 1.0.0
  11. * Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
  12. *
  13. * (c) Copyright 2020-2021 NXP Semiconductors
  14. * All Rights Reserved.
  15. *
  16. * NXP Confidential. This software is owned or controlled by NXP and may only be
  17. * used strictly in accordance with the applicable license terms. By expressly
  18. * accepting such terms or by downloading, installing, activating and/or otherwise
  19. * using the software, you are agreeing that you have read, and that you agree to
  20. * comply with and are bound by, such license terms. If you do not agree to be
  21. * bound by the applicable license terms, then you may not retain, install,
  22. * activate or otherwise use the software.
  23. ==================================================================================================*/
  24. /*==================================================================================================
  25. ==================================================================================================*/
  26. /**
  27. * @file Can_PBcfg_VS_0.c
  28. * @version 1.0.0
  29. *
  30. * @brief AUTOSAR Can - module interface
  31. * @details Configuration Structures for PostBuild
  32. *
  33. * @addtogroup CAN_DRIVER
  34. * @{
  35. */
  36. #ifdef __cplusplus
  37. extern "C"{
  38. #endif
  39. /**
  40. * @page misra_violations MISRA-C:2012 violations
  41. *
  42. * @section [global]
  43. * Violates MISRA 2012 Required Rule 5.1, External identifiers shall be distinct.
  44. * The used compilers use more than 31 chars for identifiers.
  45. *
  46. * @section [global]
  47. * Violates MISRA 2012 Required Rule 5.2, Identifiers declared in the same scope and name space shall be distinct.
  48. * The used compilers use more than 31 chars for identifiers.
  49. *
  50. * @section [global]
  51. * Violates MISRA 2012 Required Rule 5.4, Macro identifiers shall be distinct.
  52. * The used compilers use more than 31 chars for identifiers.
  53. *
  54. * @section [global]
  55. * Violates MISRA 2012 Required Rule 5.5, Identifiers shall be distinct from macro names.
  56. * The used compilers use more than 31 chars for identifiers.
  57. *
  58. * @section Can_PBcfg_VS_0_c_REF_1
  59. * Violates MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents
  60. * of a header file being included more than once
  61. * This violation is not fixed since the inclusion of <MA>_MemMap.h is as per AUTOSAR requirement [SWS_MemMap_00003].
  62. *
  63. * @section Can_PBcfg_VS_0_c_REF_2
  64. * Violates MISRA 2012 Advisory Rule 20.1, #include directives should only be preceded by preprocessor directives or comments.
  65. * AUTOSAR imposes the specification of the sections in which certain parts of the driver must be placed.
  66. *
  67. * @section Can_PBcfg_VS_0_c_REF_3
  68. * Violates MISRA 2012 Advisory Rule 8.7, Function and objects should not be defined with external linkage if they
  69. * are referenced in only one translation unit.
  70. * This constant variable will be called by higher layer.
  71. *
  72. * @section Can_PBcfg_VS_0_c_REF_4
  73. * Violates MISRA 2012 Advisory Rule 8.9, An object should be defined at block scope if identifier only appears in a single function.
  74. * These objects are used when Precompile is supported.
  75. *
  76. * @section Can_PBcfg_VS_0_c_REF_5
  77. * Violates MISRA 2012 Required Rule 8.4, A compatible declaration shall be visible when an object or function with external linkage is defined.
  78. *
  79. */
  80. /*
  81. (CAN078) The code file structure shall not be defined within this specification completely.
  82. At this point it shall be pointed out that the code-file structure shall include the following file named: Can_PBcfg_VS_0.c.
  83. This file shall contain all post-build time configurable parameters.
  84. (CAN221) VariantPB: (Mix of precompile and Post Build multiple selectable configurable configurations.
  85. */
  86. /*==================================================================================================
  87. * INCLUDE FILES
  88. * 1) system and project includes
  89. * 2) needed interfaces from external units
  90. * 3) internal and external interfaces from this unit
  91. ==================================================================================================*/
  92. #include "Can.h"
  93. #include "Can_Ipw_Types.h"
  94. /*==================================================================================================
  95. * SOURCE FILE VERSION INFORMATION
  96. ==================================================================================================*/
  97. /*
  98. * @file Can_PBcfg_VS_0.c
  99. */
  100. #define CAN_VENDOR_ID_PBCFG_VS_0_C 43
  101. #define CAN_AR_RELEASE_MAJOR_VERSION_PBCFG_VS_0_C 4
  102. #define CAN_AR_RELEASE_MINOR_VERSION_PBCFG_VS_0_C 4
  103. #define CAN_AR_RELEASE_REVISION_VERSION_PBCFG_VS_0_C 0
  104. #define CAN_SW_MAJOR_VERSION_PBCFG_VS_0_C 1
  105. #define CAN_SW_MINOR_VERSION_PBCFG_VS_0_C 0
  106. #define CAN_SW_PATCH_VERSION_PBCFG_VS_0_C 0
  107. /*==================================================================================================
  108. * FILE VERSION CHECKS
  109. ==================================================================================================*/
  110. /* Check if current file and Can.h are of the same vendor */
  111. #if (CAN_VENDOR_ID_PBCFG_VS_0_C != CAN_VENDOR_ID)
  112. #error "Can_PBcfg_VS_0.c and Can.h have different vendor ids"
  113. #endif
  114. /* Check if current file and Can.h are of the same Autosar version */
  115. #if ((CAN_AR_RELEASE_MAJOR_VERSION_PBCFG_VS_0_C != CAN_AR_RELEASE_MAJOR_VERSION) || \
  116. (CAN_AR_RELEASE_MINOR_VERSION_PBCFG_VS_0_C != CAN_AR_RELEASE_MINOR_VERSION) || \
  117. (CAN_AR_RELEASE_REVISION_VERSION_PBCFG_VS_0_C != CAN_AR_RELEASE_REVISION_VERSION))
  118. #error "AutoSar Version Numbers of Can_PBcfg_VS_0.c and Can.h are different"
  119. #endif
  120. /* Check if current file and Can.h are of the same Software version */
  121. #if ((CAN_SW_MAJOR_VERSION_PBCFG_VS_0_C != CAN_SW_MAJOR_VERSION) || \
  122. (CAN_SW_MINOR_VERSION_PBCFG_VS_0_C != CAN_SW_MINOR_VERSION) || \
  123. (CAN_SW_PATCH_VERSION_PBCFG_VS_0_C != CAN_SW_PATCH_VERSION))
  124. #error "Software Version Numbers of Can_PBcfg_VS_0.c and Can.h are different"
  125. #endif
  126. /* Check if current file and Can_Ipw_Types.h are of the same vendor */
  127. #if (CAN_VENDOR_ID_PBCFG_VS_0_C != CAN_IPW_TYPES_VENDOR_ID_H)
  128. #error "Can_PBcfg_VS_0.c and Can_Ipw_Types.h have different vendor ids"
  129. #endif
  130. /* Check if current file and Can_Ipw_Types.h are of the same Autosar version */
  131. #if ((CAN_AR_RELEASE_MAJOR_VERSION_PBCFG_VS_0_C != CAN_IPW_TYPES_AR_RELEASE_MAJOR_VERSION_H) || \
  132. (CAN_AR_RELEASE_MINOR_VERSION_PBCFG_VS_0_C != CAN_IPW_TYPES_AR_RELEASE_MINOR_VERSION_H) || \
  133. (CAN_AR_RELEASE_REVISION_VERSION_PBCFG_VS_0_C != CAN_IPW_TYPES_AR_RELEASE_REVISION_VERSION_H))
  134. #error "AutoSar Version Numbers of Can_PBcfg_VS_0.c and Can_Ipw_Types.h are different"
  135. #endif
  136. /* Check if current file and Can_Ipw_Types.h are of the same Software version */
  137. #if ((CAN_SW_MAJOR_VERSION_PBCFG_VS_0_C != CAN_IPW_TYPES_SW_MAJOR_VERSION_H) || \
  138. (CAN_SW_MINOR_VERSION_PBCFG_VS_0_C != CAN_IPW_TYPES_SW_MINOR_VERSION_H) || \
  139. (CAN_SW_PATCH_VERSION_PBCFG_VS_0_C != CAN_IPW_TYPES_SW_PATCH_VERSION_H))
  140. #error "Software Version Numbers of Can_PBcfg_VS_0.c and Can_Ipw_Types.h are different"
  141. #endif
  142. /*==================================================================================================
  143. * GLOBAL VARIABLES
  144. ==================================================================================================*/
  145. #if (CAN_FEATURE_HAS_DMA_ENABLE == STD_ON)
  146. /* CAN_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE */
  147. #define CAN_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
  148. #include "Can_MemMap.h"
  149. #define CAN_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
  150. #include "Can_MemMap.h"
  151. /* CAN_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE */
  152. #endif /* (CAN_FEATURE_HAS_DMA_ENABLE == STD_ON) */
  153. /*==================================================================================================
  154. * GLOBAL FUNCTION PROTOTYPES
  155. ==================================================================================================*/
  156. #define CAN_START_SEC_CODE
  157. /* @violates @ref Can_PBcfg_VS_0_c_REF_1 MISRA 2012 Required Directive 4.10 */
  158. #include "Can_MemMap.h"
  159. #if (CAN_TIMESTAMP_ENABLE == STD_ON)
  160. #endif
  161. #define CAN_STOP_SEC_CODE
  162. /* @violates @ref Can_PBcfg_VS_0_c_REF_1 MISRA 2012 Required Directive 4.10 */
  163. /* @violates @ref Can_PBcfg_VS_0_c_REF_2 MISRA 2012 Advisory Rule 20.1 */
  164. #include "Can_MemMap.h"
  165. /*==================================================================================================
  166. * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
  167. ==================================================================================================*/
  168. /*==================================================================================================
  169. * LOCAL CONSTANTS
  170. ==================================================================================================*/
  171. #define CAN_START_SEC_CONFIG_DATA_32
  172. #include "Can_MemMap.h"
  173. /**
  174. * @brief Hardware Buffer Address of CanController_0
  175. */
  176. static const uint32 Can_au32HwBufferAddr_Ctrl0[11U]=
  177. {
  178. (FLEXCAN_0_BASE + (uint32)0x0080U),
  179. (FLEXCAN_0_BASE + (uint32)0x0100U),
  180. (FLEXCAN_0_BASE + (uint32)0x0110U),
  181. (FLEXCAN_0_BASE + (uint32)0x0120U),
  182. (FLEXCAN_0_BASE + (uint32)0x0130U),
  183. (FLEXCAN_0_BASE + (uint32)0x0140U),
  184. (FLEXCAN_0_BASE + (uint32)0x0150U),
  185. (FLEXCAN_0_BASE + (uint32)0x0160U),
  186. (FLEXCAN_0_BASE + (uint32)0x0170U),
  187. (FLEXCAN_0_BASE + (uint32)0x0180U),
  188. (FLEXCAN_0_BASE + (uint32)0x0190U)
  189. };
  190. /**
  191. * @brief Hardware Buffer Address of CanController_1
  192. */
  193. static const uint32 Can_au32HwBufferAddr_Ctrl1[11U]=
  194. {
  195. (FLEXCAN_1_BASE + (uint32)0x0080U),
  196. (FLEXCAN_1_BASE + (uint32)0x0100U),
  197. (FLEXCAN_1_BASE + (uint32)0x0110U),
  198. (FLEXCAN_1_BASE + (uint32)0x0120U),
  199. (FLEXCAN_1_BASE + (uint32)0x0130U),
  200. (FLEXCAN_1_BASE + (uint32)0x0140U),
  201. (FLEXCAN_1_BASE + (uint32)0x0150U),
  202. (FLEXCAN_1_BASE + (uint32)0x0160U),
  203. (FLEXCAN_1_BASE + (uint32)0x0170U),
  204. (FLEXCAN_1_BASE + (uint32)0x0180U),
  205. (FLEXCAN_1_BASE + (uint32)0x0190U)
  206. };
  207. /**
  208. * @brief Hardware Filter of Can0HardwareObject_RX
  209. */
  210. static const Can_HwFilterType Can_aHwFilter_Object0[8U]=
  211. {
  212. {
  213. (uint32)0x00000000U,
  214. (uint32)0x00000000U
  215. },
  216. {
  217. (uint32)0x00000000U,
  218. (uint32)0x00000000U
  219. },
  220. {
  221. (uint32)0x00000000U,
  222. (uint32)0x00000000U
  223. },
  224. {
  225. (uint32)0x00000000U,
  226. (uint32)0x00000000U
  227. },
  228. {
  229. (uint32)0x00000000U,
  230. (uint32)0x00000000U
  231. },
  232. {
  233. (uint32)0x00000000U,
  234. (uint32)0x00000000U
  235. },
  236. {
  237. (uint32)0x00000000U,
  238. (uint32)0x00000000U
  239. },
  240. {
  241. (uint32)0x00000000U,
  242. (uint32)0x00000000U
  243. }
  244. };
  245. /**
  246. * @brief Hardware Filter of Can1HardwareObject_RX
  247. */
  248. static const Can_HwFilterType Can_aHwFilter_Object1[8U]=
  249. {
  250. {
  251. (uint32)0x00000000U,
  252. (uint32)0x00000000U
  253. },
  254. {
  255. (uint32)0x00000000U,
  256. (uint32)0x00000000U
  257. },
  258. {
  259. (uint32)0x00000000U,
  260. (uint32)0x00000000U
  261. },
  262. {
  263. (uint32)0x00000000U,
  264. (uint32)0x00000000U
  265. },
  266. {
  267. (uint32)0x00000000U,
  268. (uint32)0x00000000U
  269. },
  270. {
  271. (uint32)0x00000000U,
  272. (uint32)0x00000000U
  273. },
  274. {
  275. (uint32)0x00000000U,
  276. (uint32)0x00000000U
  277. },
  278. {
  279. (uint32)0x00000000U,
  280. (uint32)0x00000000U
  281. }
  282. };
  283. #define CAN_STOP_SEC_CONFIG_DATA_32
  284. #include "Can_MemMap.h"
  285. #define CAN_START_SEC_CONFIG_DATA_8
  286. #include "Can_MemMap.h"
  287. /**
  288. * @brief Mapping Controller ID to Controller hardware offset
  289. */
  290. static const uint8 Can_aCtrlOffsetToCtrlIDMap[CAN_HWCONTROLLER_SUPPORT]=
  291. {
  292. (uint8)0,
  293. (uint8)1,
  294. (uint8)CAN_CONTROLLER_UNUSED
  295. };
  296. /**
  297. * @brief Mapping Controller ID to Hardware Object ID
  298. */
  299. static const uint8 Can_aHwObjIDToCtrlIDMap[CAN_HWOBJECT_CONFIG_COUNT]=
  300. {
  301. (uint8)0U,
  302. (uint8)1U,
  303. (uint8)0U,
  304. (uint8)1U
  305. };
  306. #define CAN_STOP_SEC_CONFIG_DATA_8
  307. #include "Can_MemMap.h"
  308. #define CAN_START_SEC_CONFIG_DATA_UNSPECIFIED
  309. /* @violates @ref Can_PBcfg_VS_0_c_REF_1 MISRA 2012 Required Directive 4.10 */
  310. /* @violates @ref Can_PBcfg_VS_0_c_REF_2 MISRA 2012 Advisory Rule 20.1 */
  311. #include "Can_MemMap.h"
  312. /**
  313. * @brief Can Hardware Object Config
  314. */
  315. /* @violates @ref Can_PBcfg_VS_0_c_REF_5 MISRA 2012 Required Rule 8.4*/
  316. static const Can_HwObjectConfigType Can_aHwObjectConfig[CAN_HWOBJECT_CONFIG_COUNT]=
  317. {
  318. /* Can0HardwareObject_RX of CanController_0*/
  319. {
  320. /* Hardware Object ID */
  321. (Can_HwHandleType)0U,
  322. /* Hardware Object handle type */
  323. CAN_RECEIVE,
  324. /* ID Message type */
  325. CAN_EXTENDED,
  326. /* Object uses polling */
  327. (boolean)TRUE,
  328. /* Object enable trigger transmit */
  329. (boolean)FALSE,
  330. /* Number of Hw Object used in one Hoh */
  331. (uint8)6U,
  332. /* MainFunction RW period reference */
  333. (uint8)CanMainFunctionRWPeriods_0,
  334. /* Data Payload length */
  335. (uint8)8U,
  336. /* Padding value */
  337. (uint8)0U,
  338. /* Hardware Filter Count */
  339. (uint8)8U,
  340. /* Hw Filter Config */
  341. Can_aHwFilter_Object0,
  342. /* Message Buffer is Legacy FIFO */
  343. CAN_RX_LEGACY_FIFO,
  344. /* Buffer Index in Message buffer ram */
  345. (uint8)0U,
  346. /* Message buffer address */
  347. &Can_au32HwBufferAddr_Ctrl0[0U]
  348. #if (CAN_TIMESTAMP_ENABLE == STD_ON)
  349. /* Time Stamp Enable */
  350. ,(boolean)FALSE
  351. #endif
  352. },
  353. /* Can1HardwareObject_RX of CanController_1*/
  354. {
  355. /* Hardware Object ID */
  356. (Can_HwHandleType)1U,
  357. /* Hardware Object handle type */
  358. CAN_RECEIVE,
  359. /* ID Message type */
  360. CAN_EXTENDED,
  361. /* Object uses polling */
  362. (boolean)TRUE,
  363. /* Object enable trigger transmit */
  364. (boolean)FALSE,
  365. /* Number of Hw Object used in one Hoh */
  366. (uint8)6U,
  367. /* MainFunction RW period reference */
  368. (uint8)CanMainFunctionRWPeriods_0,
  369. /* Data Payload length */
  370. (uint8)8U,
  371. /* Padding value */
  372. (uint8)0U,
  373. /* Hardware Filter Count */
  374. (uint8)8U,
  375. /* Hw Filter Config */
  376. Can_aHwFilter_Object1,
  377. /* Message Buffer is Legacy FIFO */
  378. CAN_RX_LEGACY_FIFO,
  379. /* Buffer Index in Message buffer ram */
  380. (uint8)0U,
  381. /* Message buffer address */
  382. &Can_au32HwBufferAddr_Ctrl1[0U]
  383. #if (CAN_TIMESTAMP_ENABLE == STD_ON)
  384. /* Time Stamp Enable */
  385. ,(boolean)FALSE
  386. #endif
  387. },
  388. /* Can0HardwareObject_TX of CanController_0*/
  389. {
  390. /* Hardware Object ID */
  391. (Can_HwHandleType)2U,
  392. /* Hardware Object handle type */
  393. CAN_TRANSMIT,
  394. /* ID Message type */
  395. CAN_EXTENDED,
  396. /* Object uses polling */
  397. (boolean)TRUE,
  398. /* Object enable trigger transmit */
  399. (boolean)FALSE,
  400. /* Number of Hw Object used in one Hoh */
  401. (uint8)10U,
  402. /* MainFunction RW period reference */
  403. (uint8)CanMainFunctionRWPeriods_0,
  404. /* Data Payload length */
  405. (uint8)8U,
  406. /* Padding value */
  407. (uint8)0U,
  408. /* Hardware Filter Count */
  409. (uint8)0U,
  410. /* Hw Filter Config */
  411. NULL_PTR,
  412. /* Message Buffer is Tx normal */
  413. CAN_TX_NORMAL,
  414. /* Buffer Index in Message buffer ram */
  415. (uint8)8U,
  416. /* Message buffer address */
  417. &Can_au32HwBufferAddr_Ctrl0[1U]
  418. #if (CAN_TIMESTAMP_ENABLE == STD_ON)
  419. /* Time Stamp Enable */
  420. ,(boolean)FALSE
  421. #endif
  422. },
  423. /* Can1HardwareObject_TX of CanController_1*/
  424. {
  425. /* Hardware Object ID */
  426. (Can_HwHandleType)3U,
  427. /* Hardware Object handle type */
  428. CAN_TRANSMIT,
  429. /* ID Message type */
  430. CAN_EXTENDED,
  431. /* Object uses polling */
  432. (boolean)TRUE,
  433. /* Object enable trigger transmit */
  434. (boolean)FALSE,
  435. /* Number of Hw Object used in one Hoh */
  436. (uint8)10U,
  437. /* MainFunction RW period reference */
  438. (uint8)CanMainFunctionRWPeriods_0,
  439. /* Data Payload length */
  440. (uint8)8U,
  441. /* Padding value */
  442. (uint8)0U,
  443. /* Hardware Filter Count */
  444. (uint8)0U,
  445. /* Hw Filter Config */
  446. NULL_PTR,
  447. /* Message Buffer is Tx normal */
  448. CAN_TX_NORMAL,
  449. /* Buffer Index in Message buffer ram */
  450. (uint8)8U,
  451. /* Message buffer address */
  452. &Can_au32HwBufferAddr_Ctrl1[1U]
  453. #if (CAN_TIMESTAMP_ENABLE == STD_ON)
  454. /* Time Stamp Enable */
  455. ,(boolean)FALSE
  456. #endif
  457. }
  458. };
  459. /**
  460. * @brief Can Baudrate Config of CanController_0
  461. */
  462. static const Can_BaudrateConfigType Can_aBaudrateConfig_Ctrl0[1U]=
  463. {
  464. {
  465. /*Can_bEnhanceCBTEnable*/
  466. (boolean)FALSE,
  467. /* Tx Bit Rate Switch */
  468. (boolean)FALSE,
  469. /* FD enable */
  470. (boolean)FALSE,
  471. /* Nominal bit rate */
  472. {
  473. (uint8)2U,
  474. (uint8)5U,
  475. (uint8)5U,
  476. (uint16)11U,
  477. #if (CAN_DUAL_CLOCK_MODE == STD_ON)
  478. /* Alternative Baudrate Nominal Prescaler */
  479. (uint16)9U,
  480. #endif
  481. (uint8)3U
  482. },
  483. /* Data bit rate */
  484. {
  485. (uint8)0U,
  486. (uint8)0U,
  487. (uint8)0U,
  488. (uint16)0U,
  489. #if (CAN_DUAL_CLOCK_MODE == STD_ON)
  490. (uint16)0U,
  491. #endif
  492. (uint8)0U
  493. },
  494. /* Tx Arbitration Start delay */
  495. (uint8)12U,
  496. (boolean)FALSE,
  497. (uint8)0U
  498. }
  499. };
  500. /**
  501. * @brief HwObject's pointer structure of CanController_0
  502. */
  503. static const Can_HwObjectConfigType * const Can_apHwObject_Ctrl0[2U]=
  504. {
  505. &Can_aHwObjectConfig[0U],
  506. &Can_aHwObjectConfig[2U]
  507. };
  508. /**
  509. * @brief Can Baudrate Config of CanController_1
  510. */
  511. static const Can_BaudrateConfigType Can_aBaudrateConfig_Ctrl1[1U]=
  512. {
  513. {
  514. /*Can_bEnhanceCBTEnable*/
  515. (boolean)FALSE,
  516. /* Tx Bit Rate Switch */
  517. (boolean)FALSE,
  518. /* FD enable */
  519. (boolean)FALSE,
  520. /* Nominal bit rate */
  521. {
  522. (uint8)2U,
  523. (uint8)5U,
  524. (uint8)5U,
  525. (uint16)11U,
  526. #if (CAN_DUAL_CLOCK_MODE == STD_ON)
  527. /* Alternative Baudrate Nominal Prescaler */
  528. (uint16)9U,
  529. #endif
  530. (uint8)3U
  531. },
  532. /* Data bit rate */
  533. {
  534. (uint8)0U,
  535. (uint8)0U,
  536. (uint8)0U,
  537. (uint16)0U,
  538. #if (CAN_DUAL_CLOCK_MODE == STD_ON)
  539. (uint16)0U,
  540. #endif
  541. (uint8)0U
  542. },
  543. /* Tx Arbitration Start delay */
  544. (uint8)12U,
  545. (boolean)FALSE,
  546. (uint8)0U
  547. }
  548. };
  549. /**
  550. * @brief HwObject's pointer structure of CanController_1
  551. */
  552. static const Can_HwObjectConfigType * const Can_apHwObject_Ctrl1[2U]=
  553. {
  554. &Can_aHwObjectConfig[1U],
  555. &Can_aHwObjectConfig[3U]
  556. };
  557. /* Inport external structure defined by IPW */
  558. CAN_IPW_EXT
  559. /**
  560. * @brief Can Controller Config
  561. */
  562. static const Can_ControllerConfigType Can_aControllerConfig[CAN_CONTROLLER_CONFIG_COUNT]=
  563. {
  564. {
  565. /* Abstracted CanIf Controller ID */
  566. (uint8)0U,
  567. /* Controller ID */
  568. (uint8)0U,
  569. /* Controller Offset */
  570. (uint8)0U,
  571. /* Controller Base Address */
  572. FLEXCAN_0_BASE,
  573. /* Controller Activation */
  574. (boolean)TRUE,
  575. /* Bus Off uses polling */
  576. (boolean)TRUE,
  577. /* Global mask of Legacy FIFO */
  578. (uint32)0xc0000000U,
  579. /* ID Acceptance Mode */
  580. CAN_LEGACY_FIFO_FORMAT_A,
  581. /* Legacy FIFO Warning Notification */
  582. NULL_PTR,
  583. /* Legacy FIFO Overflow Notification */
  584. NULL_PTR,
  585. /* Enhanced FIFO Overflow Notification */
  586. NULL_PTR,
  587. #if (CAN_FEATURE_HAS_DMA_ENABLE == STD_ON)
  588. /* Enhance FIFO Dma Error Notification */
  589. NULL_PTR,
  590. /* DMA is not enabled */
  591. NULL_PTR,
  592. #endif /* (CAN_FEATURE_HAS_DMA_ENABLE == STD_ON) */
  593. /* Error interrupt enable */
  594. (boolean)FALSE,
  595. /* Error Notification */
  596. NULL_PTR,
  597. /* Error FD Notification */
  598. NULL_PTR,
  599. /* Default Baudrate ID */
  600. (uint16)0U,
  601. /* Baudrate config Count*/
  602. (uint16)1U,
  603. /* Baudrate config Pointer Structure */
  604. Can_aBaudrateConfig_Ctrl0,
  605. /* Pointer to IPW structure to IP config */
  606. &CanIpwHwChannelConfig_VS_00,
  607. /* Hw Object reference count */
  608. (uint8)2U,
  609. /* Pointer point to Group of Hw Object that refer to Controller */
  610. Can_apHwObject_Ctrl0
  611. },
  612. {
  613. /* Abstracted CanIf Controller ID */
  614. (uint8)1U,
  615. /* Controller ID */
  616. (uint8)1U,
  617. /* Controller Offset */
  618. (uint8)1U,
  619. /* Controller Base Address */
  620. FLEXCAN_1_BASE,
  621. /* Controller Activation */
  622. (boolean)TRUE,
  623. /* Bus Off uses polling */
  624. (boolean)TRUE,
  625. /* Global mask of Legacy FIFO */
  626. (uint32)0xc0000000U,
  627. /* ID Acceptance Mode */
  628. CAN_LEGACY_FIFO_FORMAT_A,
  629. /* Legacy FIFO Warning Notification */
  630. NULL_PTR,
  631. /* Legacy FIFO Overflow Notification */
  632. NULL_PTR,
  633. /* Enhanced FIFO Overflow Notification */
  634. NULL_PTR,
  635. #if (CAN_FEATURE_HAS_DMA_ENABLE == STD_ON)
  636. /* Enhance FIFO Dma Error Notification */
  637. NULL_PTR,
  638. /* DMA is not enabled */
  639. NULL_PTR,
  640. #endif /* (CAN_FEATURE_HAS_DMA_ENABLE == STD_ON) */
  641. /* Error interrupt enable */
  642. (boolean)FALSE,
  643. /* Error Notification */
  644. NULL_PTR,
  645. /* Error FD Notification */
  646. NULL_PTR,
  647. /* Default Baudrate ID */
  648. (uint16)0U,
  649. /* Baudrate config Count*/
  650. (uint16)1U,
  651. /* Baudrate config Pointer Structure */
  652. Can_aBaudrateConfig_Ctrl1,
  653. /* Pointer to IPW structure to IP config */
  654. &CanIpwHwChannelConfig_VS_01,
  655. /* Hw Object reference count */
  656. (uint8)2U,
  657. /* Pointer point to Group of Hw Object that refer to Controller */
  658. Can_apHwObject_Ctrl1
  659. }
  660. };
  661. /* Inport external structure defined by IPW */
  662. CAN_IPW_ICOM_RXMESSAGE_EXT
  663. static const Can_IcomConfigsType Can_aIcomConfig[1U] =
  664. {
  665. {
  666. /* .u8CanIcomConfigId */
  667. (uint8)1,
  668. /* .bCanIcomWakeOnBusOff */
  669. (boolean)FALSE,
  670. /* .u8NumberCanIcomRxMessage */
  671. (uint8)1U,
  672. /* .pCanIcomRxMessageConfigs */
  673. &CanIpwIcomRxMessageConfig_VS_0_0
  674. }
  675. };
  676. static const Can_ControllerConfigType * const Can_apController[CAN_CONTROLLER_CONFIG_COUNT]=
  677. {
  678. &Can_aControllerConfig[0U],
  679. &Can_aControllerConfig[1U]
  680. };
  681. /*==================================================================================================
  682. * GLOBAL CONSTANTS
  683. ==================================================================================================*/
  684. /**
  685. * @brief Top level structure contain all Can driver Config
  686. */
  687. /* @violates @ref Can_PBcfg_VS_0_c_REF_3 MISRA 2012 Advisory Rule 8.7 */
  688. /* @violates @ref Can_PBcfg_VS_0_c_REF_4 MISRA 2012 Advisory Rule 8.9 */
  689. /* @violates @ref Can_PBcfg_VS_0_c_REF_5 MISRA 2012 Required Rule 8.4 */
  690. const Can_ConfigType Can_Config =
  691. {
  692. /* Configuration Core ID */
  693. (uint32)0U,
  694. /* The HTH first Index after HRH consecutive */
  695. (Can_HwHandleType)2U,
  696. /* Mapping Controller ID to Controller Hw Offset */
  697. Can_aCtrlOffsetToCtrlIDMap,
  698. /* Mapping Controller ID to Hardware Object ID */
  699. Can_aHwObjIDToCtrlIDMap,
  700. /* Pointer point to Can Hw Object Config */
  701. Can_aHwObjectConfig,
  702. /* The size of Can Icom Configs */
  703. (uint8)1U,
  704. /* Pointer point to Can Icom Configs */
  705. Can_aIcomConfig,
  706. /* Array of Pointer to Controller infomation have aligned by Controller ID */
  707. Can_apController
  708. };
  709. #define CAN_STOP_SEC_CONFIG_DATA_UNSPECIFIED
  710. /* @violates @ref Can_PBcfg_VS_0_c_REF_1 MISRA 2012 Required Directive 4.10 */
  711. /* @violates @ref Can_PBcfg_VS_0_c_REF_2 MISRA 2012 Advisory Rule 20.1 */
  712. #include "Can_MemMap.h"
  713. #ifdef __cplusplus
  714. }
  715. #endif
  716. /** @} */