Dma_Ip_Driver_State.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297
  1. /*==================================================================================================
  2. * Project : RTD AUTOSAR 4.4
  3. * Platform : CORTEXM
  4. * Peripheral : DMA,CACHE,TRGMUX,FLEXIO
  5. * Dependencies : none
  6. *
  7. * Autosar Version : 4.4.0
  8. * Autosar Revision : ASR_REL_4_4_REV_0000
  9. * Autosar Conf.Variant :
  10. * SW Version : 1.0.0
  11. * Build Version : S32K1_RTD_1_0_0_HF01_D2109_ASR_REL_4_4_REV_0000_20210907
  12. *
  13. * (c) Copyright 2020-2021 NXP Semiconductors
  14. * All Rights Reserved.
  15. *
  16. * NXP Confidential. This software is owned or controlled by NXP and may only be
  17. * used strictly in accordance with the applicable license terms. By expressly
  18. * accepting such terms or by downloading, installing, activating and/or otherwise
  19. * using the software, you are agreeing that you have read, and that you agree to
  20. * comply with and are bound by, such license terms. If you do not agree to be
  21. * bound by the applicable license terms, then you may not retain, install,
  22. * activate or otherwise use the software.
  23. ==================================================================================================*/
  24. /**
  25. * @file Dma_Ip_Driver_State.c
  26. *
  27. * @version 1.0.0
  28. *
  29. * @brief AUTOSAR Mcl - Dma Ip driver source file.
  30. * @details
  31. *
  32. * @addtogroup DMA_IP_DRIVER DMA IP Driver
  33. * @{
  34. */
  35. /*==================================================================================================
  36. * INCLUDE FILES
  37. * 1) system and project includes
  38. * 2) needed interfaces from external units
  39. * 3) internal and external interfaces from this unit
  40. ==================================================================================================*/
  41. #include "Dma_Ip_Driver_State.h"
  42. #if (DMA_IP_IS_AVAILABLE == STD_ON)
  43. /*==================================================================================================
  44. SOURCE FILE VERSION INFORMATION
  45. ==================================================================================================*/
  46. #define DMA_IP_DRIVER_STATE_VENDOR_ID_C 43
  47. #define DMA_IP_DRIVER_STATE_AR_RELEASE_MAJOR_VERSION_C 4
  48. #define DMA_IP_DRIVER_STATE_AR_RELEASE_MINOR_VERSION_C 4
  49. #define DMA_IP_DRIVER_STATE_AR_RELEASE_REVISION_VERSION_C 0
  50. #define DMA_IP_DRIVER_STATE_SW_MAJOR_VERSION_C 1
  51. #define DMA_IP_DRIVER_STATE_SW_MINOR_VERSION_C 0
  52. #define DMA_IP_DRIVER_STATE_SW_PATCH_VERSION_C 0
  53. /*==================================================================================================
  54. FILE VERSION CHECKS
  55. ==================================================================================================*/
  56. /* Check if Dma_Ip_Driver_State.c file and Dma_Ip_Driver_State.h file are of the same vendor */
  57. #if (DMA_IP_DRIVER_STATE_VENDOR_ID_C != DMA_IP_DRIVER_STATE_VENDOR_ID_H)
  58. #error "Dma_Ip_Driver_State.c and Dma_Ip_Driver_State.h have different vendor ids"
  59. #endif
  60. /* Check if Dma_Ip_Driver_State.c file and Dma_Ip_Driver_State.h file are of the same Autosar version */
  61. #if ((DMA_IP_DRIVER_STATE_AR_RELEASE_MAJOR_VERSION_C != DMA_IP_DRIVER_STATE_AR_RELEASE_MAJOR_VERSION_H) || \
  62. (DMA_IP_DRIVER_STATE_AR_RELEASE_MINOR_VERSION_C != DMA_IP_DRIVER_STATE_AR_RELEASE_MINOR_VERSION_H) || \
  63. (DMA_IP_DRIVER_STATE_AR_RELEASE_REVISION_VERSION_C != DMA_IP_DRIVER_STATE_AR_RELEASE_REVISION_VERSION_H) \
  64. )
  65. #error "AutoSar Version Numbers of Dma_Ip_Driver_State.c and Dma_Ip_Driver_State.h are different"
  66. #endif
  67. /* Check if Dma_Ip_Driver_State.c file and Dma_Ip_Driver_State.h file are of the same Software version */
  68. #if ((DMA_IP_DRIVER_STATE_SW_MAJOR_VERSION_C != DMA_IP_DRIVER_STATE_SW_MAJOR_VERSION_H) || \
  69. (DMA_IP_DRIVER_STATE_SW_MINOR_VERSION_C != DMA_IP_DRIVER_STATE_SW_MINOR_VERSION_H) || \
  70. (DMA_IP_DRIVER_STATE_SW_PATCH_VERSION_C != DMA_IP_DRIVER_STATE_SW_PATCH_VERSION_H) \
  71. )
  72. #error "Software Version Numbers of Dma_Ip_Driver_State.c and Dma_Ip_Driver_State.h are different"
  73. #endif
  74. /*==================================================================================================
  75. * FUNCTION PROTOYPES
  76. ==================================================================================================*/
  77. #define MCL_START_SEC_CODE
  78. /* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
  79. #include "Mcl_MemMap.h"
  80. static void Dma_Ip_SetHwChannel_ResetEvent(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh);
  81. static void Dma_Ip_SetHwChannel_ReadyEvent(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh);
  82. static void Dma_Ip_SetHwChannel_TransferEvent(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh);
  83. static void Dma_Ip_SetHwChannel_ScatterGatherEvent(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh);
  84. static void Dma_Ip_SetHwChannel_ErrorEvent(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh);
  85. #define MCL_STOP_SEC_CODE
  86. /* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
  87. #include "Mcl_MemMap.h"
  88. /*==================================================================================================
  89. * GLOBAL VARIABLES
  90. ==================================================================================================*/
  91. #define MCL_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
  92. /* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
  93. #include "Mcl_MemMap.h"
  94. static Dma_Ip_HwStateType Dma_Ip_xHwState;
  95. #define MCL_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
  96. /* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
  97. #include "Mcl_MemMap.h"
  98. /*==================================================================================================
  99. * STATE MACHINE FUNCTIONS
  100. ==================================================================================================*/
  101. #define MCL_START_SEC_CODE
  102. /* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
  103. #include "Mcl_MemMap.h"
  104. static void Dma_Ip_SetHwChannel_ResetEvent(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh)
  105. {
  106. #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE)
  107. if(DMA_IP_HARDWARE_VERSION_2 == LocHwVers)
  108. {
  109. Dma_Ip_xHwState.ptHwChV2StateArray[LocHwInst][LocHwCh]->StateValue = DMA_IP_CH_RESET_STATE;
  110. }
  111. #endif /* #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE) */
  112. #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE)
  113. if(DMA_IP_HARDWARE_VERSION_3 == LocHwVers)
  114. {
  115. Dma_Ip_xHwState.ptHwChV3StateArray[LocHwInst][LocHwCh]->StateValue = DMA_IP_CH_RESET_STATE;
  116. }
  117. #endif /* #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE) */
  118. }
  119. static void Dma_Ip_SetHwChannel_ReadyEvent(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh)
  120. {
  121. #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE)
  122. if(DMA_IP_HARDWARE_VERSION_2 == LocHwVers)
  123. {
  124. Dma_Ip_xHwState.ptHwChV2StateArray[LocHwInst][LocHwCh]->StateValue = DMA_IP_CH_READY_STATE;
  125. }
  126. #endif /* #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE) */
  127. #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE)
  128. if(DMA_IP_HARDWARE_VERSION_3 == LocHwVers)
  129. {
  130. Dma_Ip_xHwState.ptHwChV3StateArray[LocHwInst][LocHwCh]->StateValue = DMA_IP_CH_READY_STATE;
  131. }
  132. #endif /* #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE) */
  133. }
  134. static void Dma_Ip_SetHwChannel_TransferEvent(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh)
  135. {
  136. #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE)
  137. if(DMA_IP_HARDWARE_VERSION_2 == LocHwVers)
  138. {
  139. Dma_Ip_xHwState.ptHwChV2StateArray[LocHwInst][LocHwCh]->StateValue = DMA_IP_CH_TRANSFER_STATE;
  140. }
  141. #endif /* #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE) */
  142. #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE)
  143. if(DMA_IP_HARDWARE_VERSION_3 == LocHwVers)
  144. {
  145. Dma_Ip_xHwState.ptHwChV3StateArray[LocHwInst][LocHwCh]->StateValue = DMA_IP_CH_TRANSFER_STATE;
  146. }
  147. #endif /* #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE) */
  148. }
  149. static void Dma_Ip_SetHwChannel_ScatterGatherEvent(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh)
  150. {
  151. #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE)
  152. if(DMA_IP_HARDWARE_VERSION_2 == LocHwVers)
  153. {
  154. Dma_Ip_xHwState.ptHwChV2StateArray[LocHwInst][LocHwCh]->StateValue = DMA_IP_CH_SCATTERGATHER_STATE;
  155. }
  156. #endif /* #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE) */
  157. #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE)
  158. if(DMA_IP_HARDWARE_VERSION_3 == LocHwVers)
  159. {
  160. Dma_Ip_xHwState.ptHwChV3StateArray[LocHwInst][LocHwCh]->StateValue = DMA_IP_CH_SCATTERGATHER_STATE;
  161. }
  162. #endif /* #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE) */
  163. }
  164. static void Dma_Ip_SetHwChannel_ErrorEvent(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh)
  165. {
  166. #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE)
  167. if(DMA_IP_HARDWARE_VERSION_2 == LocHwVers)
  168. {
  169. Dma_Ip_xHwState.ptHwChV2StateArray[LocHwInst][LocHwCh]->StateValue = DMA_IP_CH_ERROR_STATE;
  170. }
  171. #endif /* #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE) */
  172. #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE)
  173. if(DMA_IP_HARDWARE_VERSION_3 == LocHwVers)
  174. {
  175. Dma_Ip_xHwState.ptHwChV3StateArray[LocHwInst][LocHwCh]->StateValue = DMA_IP_CH_ERROR_STATE;
  176. }
  177. #endif /* #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE) */
  178. }
  179. void Dma_Ip_SetHwChannelState(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh, const Dma_Ip_HwChannelEventValueEnum EventValue)
  180. {
  181. static void (* const fpa_Dma_Ip_HwChannelState[5U][5U])(const uint32 LocHwVers, const uint32 LocHwInst, const uint32 LocHwCh) =
  182. {
  183. {Dma_Ip_SetHwChannel_ResetEvent, Dma_Ip_SetHwChannel_ReadyEvent, Dma_Ip_SetHwChannel_ErrorEvent, Dma_Ip_SetHwChannel_ErrorEvent, Dma_Ip_SetHwChannel_ErrorEvent},
  184. {Dma_Ip_SetHwChannel_ResetEvent, Dma_Ip_SetHwChannel_ReadyEvent, Dma_Ip_SetHwChannel_TransferEvent, Dma_Ip_SetHwChannel_ScatterGatherEvent, Dma_Ip_SetHwChannel_ErrorEvent},
  185. {Dma_Ip_SetHwChannel_ResetEvent, Dma_Ip_SetHwChannel_ReadyEvent, Dma_Ip_SetHwChannel_TransferEvent, Dma_Ip_SetHwChannel_ScatterGatherEvent, Dma_Ip_SetHwChannel_ErrorEvent},
  186. {Dma_Ip_SetHwChannel_ResetEvent, Dma_Ip_SetHwChannel_ReadyEvent, Dma_Ip_SetHwChannel_TransferEvent, Dma_Ip_SetHwChannel_ScatterGatherEvent, Dma_Ip_SetHwChannel_ErrorEvent},
  187. {Dma_Ip_SetHwChannel_ResetEvent, Dma_Ip_SetHwChannel_ReadyEvent, Dma_Ip_SetHwChannel_ErrorEvent, Dma_Ip_SetHwChannel_ErrorEvent, Dma_Ip_SetHwChannel_ErrorEvent},
  188. };
  189. Dma_Ip_HwChannelStateValueType StateValue = DMA_IP_CH_RESET_STATE;
  190. #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE)
  191. if(DMA_IP_HARDWARE_VERSION_2 == LocHwVers)
  192. {
  193. StateValue = Dma_Ip_xHwState.ptHwChV2StateArray[LocHwInst][LocHwCh]->StateValue;
  194. fpa_Dma_Ip_HwChannelState[StateValue][EventValue](LocHwVers, LocHwInst, LocHwCh);
  195. }
  196. #endif /* #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE) */
  197. #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE)
  198. if(DMA_IP_HARDWARE_VERSION_3 == LocHwVers)
  199. {
  200. StateValue = Dma_Ip_xHwState.ptHwChV3StateArray[LocHwInst][LocHwCh]->StateValue;
  201. fpa_Dma_Ip_HwChannelState[StateValue][EventValue](LocHwVers, LocHwInst, LocHwCh);
  202. }
  203. #endif /* #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE) */
  204. }
  205. /*==================================================================================================
  206. * GLOBAL FUNCTIONS
  207. ==================================================================================================*/
  208. Dma_Ip_HwChannelStateValueType Dma_Ip_GetHwChannelState(uint32 LocHwVers, uint32 LocHwInst, uint32 LocHwCh)
  209. {
  210. Dma_Ip_HwChannelStateValueType StateValue = DMA_IP_CH_RESET_STATE;
  211. #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE)
  212. if(DMA_IP_HARDWARE_VERSION_2 == LocHwVers)
  213. {
  214. StateValue = Dma_Ip_xHwState.ptHwChV2StateArray[LocHwInst][LocHwCh]->StateValue;
  215. }
  216. #endif /* #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE) */
  217. #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE)
  218. if(DMA_IP_HARDWARE_VERSION_3 == LocHwVers)
  219. {
  220. StateValue = Dma_Ip_xHwState.ptHwChV3StateArray[LocHwInst][LocHwCh]->StateValue;
  221. }
  222. #endif /* #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE) */
  223. return StateValue;
  224. }
  225. Dma_Ip_HwChannelStateType * Dma_Ip_GetHwChannelStatePointer(uint32 LocHwVers, uint32 LocHwInst, uint32 LocHwCh)
  226. {
  227. Dma_Ip_HwChannelStateType * ptStatePtr = NULL_PTR;
  228. #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE)
  229. if(DMA_IP_HARDWARE_VERSION_2 == LocHwVers)
  230. {
  231. ptStatePtr = Dma_Ip_xHwState.ptHwChV2StateArray[LocHwInst][LocHwCh];
  232. }
  233. #endif /* #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE) */
  234. #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE)
  235. if(DMA_IP_HARDWARE_VERSION_3 == LocHwVers)
  236. {
  237. ptStatePtr = Dma_Ip_xHwState.ptHwChV3StateArray[LocHwInst][LocHwCh];
  238. }
  239. #endif /* #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE) */
  240. return ptStatePtr;
  241. }
  242. void Dma_Ip_SetHwChannelStatePointer(uint32 LocHwVers, uint32 LocHwInst, uint32 LocHwCh, Dma_Ip_HwChannelStateType * StatePointer)
  243. {
  244. #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE)
  245. if(DMA_IP_HARDWARE_VERSION_2 == LocHwVers)
  246. {
  247. Dma_Ip_xHwState.ptHwChV2StateArray[LocHwInst][LocHwCh] = StatePointer;
  248. }
  249. #endif /* #if (STD_ON == DMA_IP_HWV2_IS_AVAILABLE) */
  250. #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE)
  251. if(DMA_IP_HARDWARE_VERSION_3 == LocHwVers)
  252. {
  253. Dma_Ip_xHwState.ptHwChV3StateArray[LocHwInst][LocHwCh] = StatePointer;
  254. }
  255. #endif /* #if (STD_ON == DMA_IP_HWV3_IS_AVAILABLE) */
  256. }
  257. #define MCL_STOP_SEC_CODE
  258. /* @violates @ref Mcl_Dma_h_REF_1 MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
  259. #include "Mcl_MemMap.h"
  260. #endif /* #if (DMA_IP_IS_AVAILABLE == STD_ON) */
  261. /** @} */
  262. /*==================================================================================================
  263. * END OF FILE
  264. ==================================================================================================*/