hal_adapter.c 30 KB

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  1. /*
  2. * hal_adapter.c
  3. *中间层函数调用库
  4. * Created on: 2022年1月18日
  5. * Author: QiXiang_CHENJIE
  6. */
  7. #include "hal_adapter.h"
  8. #include "AppGlobalVar.h"
  9. #include "stdio.h"
  10. #include "stdarg.h"
  11. uint8_t __attribute__((section(".non_cacheable_data"))) RX_Buffer[3][BUFFER_SIZE];
  12. uint32_t bufferIdx[3] = {0};
  13. volatile uint32 VarNotification_0 = 0;
  14. volatile uint32 VarNotification_1 = 0;
  15. TP_Value_Type ConvertedBuffer[NUM_RESULTS];
  16. Adc_ValueGroupType ResultBuffer[NUM_RESULTS];
  17. volatile Uart_StatusType Uart_TransmitStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  18. QueueHandle_t UartRecvQueue[3];
  19. QueueHandle_t UartSendQueue[3];
  20. QueueHandle_t UartHalQueueHandle;
  21. Std_ReturnType UartStartRecvFunc(uint8 channel);
  22. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR);
  23. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len);
  24. void clear_ringBuffer(ringbuffer_t *ringBuf);
  25. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  26. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
  27. uint8 ringBufferforUart[3][BUFFER_SIZE*2];
  28. ringbuffer_t uartRingBuffer[3];
  29. #if UARTPRINTF==1
  30. uint8 ringbuffer[1024];
  31. ringbuffer_t printfRingBuffer;
  32. #endif
  33. sint8 AtcmdDelayRecvFunc(uint8 recvChannel,char *ResultStrPtr,uint16 delayTime)
  34. {
  35. sint8 outValue = -1;
  36. uint8 delayCnt = 0;
  37. uint8 UartData[256];
  38. uint16 ReadLen = 0;
  39. char *retptr = NULL;
  40. while (delayCnt<(delayTime/1000)&&outValue!=0)
  41. {
  42. UART_Receive_Data(recvChannel,UartData, &ReadLen,1000);
  43. retptr = (char *)strstr((char *)UartData, ResultStrPtr);
  44. if (retptr)
  45. {
  46. outValue = 0;
  47. break;
  48. }
  49. else
  50. {
  51. delayCnt++;
  52. }
  53. }
  54. return outValue;
  55. }
  56. #if UARTPRINTF==1
  57. uint16 myPrintf(const char *fmt, ...)
  58. {
  59. int n;
  60. uint8 databuffer[512]={0};
  61. va_list args;
  62. va_start(args, fmt);
  63. n = vsprintf((char *)databuffer, fmt, args);
  64. va_end(args);
  65. if( (printfRingBuffer.bw + n) <= printfRingBuffer.length )
  66. {
  67. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  68. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  69. printfRingBuffer.bw = printfRingBuffer.bw + n;
  70. }
  71. else
  72. {
  73. printfRingBuffer.bw = 0;
  74. memcpy(printfRingBuffer.source + printfRingBuffer.bw, databuffer, n);
  75. UART_Send_Data(UART_LPUART0, printfRingBuffer.source + printfRingBuffer.bw, n, 10);
  76. }
  77. return n;
  78. }
  79. #endif
  80. void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len)
  81. {
  82. ringBuf->br = 0;
  83. ringBuf->bw = 0;
  84. ringBuf->btoRead = 0;
  85. ringBuf->source = buf;
  86. ringBuf->length = buf_len;
  87. }
  88. void clear_ringBuffer(ringbuffer_t *ringBuf)
  89. {
  90. ringBuf->br = 0;
  91. ringBuf->bw = 0;
  92. ringBuf->btoRead = 0;
  93. }
  94. uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  95. {
  96. uint32_t len = 0;
  97. volatile uint32_t ringBuf_bw = ringBuf->bw;
  98. uint32_t ringBuf_len = ringBuf->length;
  99. uint8_t *ringBuf_source = ringBuf->source;
  100. if( (ringBuf_bw + size) > ringBuf_len )
  101. {
  102. ringBuf_bw = 0;
  103. }
  104. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  105. ringBuf->bw = (ringBuf->bw + size) % ringBuf_len;
  106. ringBuf->btoRead += size;
  107. /*
  108. if(ringBuf->br!=0)
  109. {
  110. memcpy(ringBuf_source, buffer, size);
  111. ringBuf->br = 0;
  112. }
  113. */
  114. /*
  115. if( (ringBuf_bw + size) <= ringBuf_len )
  116. {
  117. memcpy(ringBuf_source + ringBuf_bw, buffer, size);
  118. }
  119. else
  120. {
  121. len = ringBuf_len - ringBuf_bw;
  122. memcpy(ringBuf_source + ringBuf_bw, buffer, len);
  123. memcpy(ringBuf_source, buffer + ringBuf_bw, size - len);
  124. }
  125. ringBuf->bw = (ringBuf->bw + size) % ringBuf_len;
  126. ringBuf->btoRead += size;
  127. */
  128. return size;
  129. }
  130. uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
  131. {
  132. uint32_t len = 0;
  133. volatile uint32_t ringBuf_br = ringBuf->br;
  134. uint32_t ringBuf_len = ringBuf->length;
  135. uint8_t *ringBuf_source = ringBuf->source;
  136. memcpy(buffer, ringBuf_source, size);
  137. ringBuf->br = size;
  138. // if( (ringBuf_br + size ) <= ringBuf_len )
  139. // {
  140. // memcpy(buffer, ringBuf_source + ringBuf_br, size);
  141. // }
  142. // else
  143. // {
  144. // len = ringBuf_len - ringBuf_br;
  145. // memcpy(buffer, ringBuf_source + ringBuf_br, len);
  146. // memcpy(buffer + len, ringBuf_source, size - len);
  147. // }
  148. // ringBuf->br = (ringBuf->br + size) % ringBuf_len;
  149. // ringBuf->btoRead -= size;
  150. return size;
  151. }
  152. Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, uint8 *txBuffer, uint16 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  153. {
  154. UartMsg_t UartRecvMsg;
  155. UartMsg_t UartSendMsg;
  156. BaseType_t Sendret = pdFALSE;
  157. BaseType_t Recvret = pdFALSE;
  158. uint32 retVal = E_NOT_OK;
  159. UartSendMsg.DataLen = sendLength;
  160. UartSendMsg.dataPtr = txBuffer;
  161. *rxlen = 0;
  162. Sendret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,50);
  163. if(Sendret == pdTRUE)
  164. {
  165. Recvret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  166. if(Recvret == pdTRUE)
  167. {
  168. *rxlen = UartRecvMsg.DataLen;
  169. // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
  170. memcpy(rxBuffer,(uint8 *)(UartRecvMsg.dataAddr),UartRecvMsg.DataLen);
  171. retVal = E_OK;
  172. }
  173. else
  174. {
  175. retVal = 3;
  176. }
  177. }
  178. else
  179. {
  180. retVal = 2;
  181. }
  182. return retVal;
  183. }
  184. Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint8 *rxlen, uint32 T_timeout)
  185. {
  186. UartMsg_t UartRecvMsg;
  187. BaseType_t ret = pdFALSE;
  188. uint32 retVal = E_NOT_OK;
  189. *rxlen = 0;
  190. ret = xQueueReceive(UartRecvQueue[recvChannel],&UartRecvMsg,T_timeout);
  191. if(ret == pdTRUE)
  192. {
  193. *rxlen = UartRecvMsg.DataLen;
  194. // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
  195. memcpy(rxBuffer,(uint8 *)UartRecvMsg.dataAddr,UartRecvMsg.DataLen);
  196. retVal = E_OK;
  197. }
  198. return retVal;
  199. }
  200. Std_ReturnType UART_Reset(uint8 recvChannel)
  201. {
  202. uint32 retVal = E_NOT_OK;
  203. retVal = xQueueReset(UartRecvQueue[recvChannel]);
  204. return retVal;
  205. }
  206. Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  207. {
  208. UartMsg_t UartSendMsg;
  209. BaseType_t ret = pdFALSE;
  210. uint32 retVal = E_NOT_OK;
  211. UartSendMsg.DataLen = sendLength;
  212. UartSendMsg.dataPtr = txBuffer;
  213. ret = xQueueSend(UartSendQueue[transChannel],&UartSendMsg,T_timeout);
  214. if(ret == pdTRUE)
  215. {
  216. retVal = E_OK;
  217. }
  218. return retVal;
  219. }
  220. void UartInit(void)
  221. {
  222. create_ringBuffer(&uartRingBuffer[0],ringBufferforUart[0],sizeof(ringBufferforUart[0]));
  223. create_ringBuffer(&uartRingBuffer[1],ringBufferforUart[1],sizeof(ringBufferforUart[1]));
  224. create_ringBuffer(&uartRingBuffer[2],ringBufferforUart[2],sizeof(ringBufferforUart[2]));
  225. UartRecvQueue[0] = xQueueCreate(6, sizeof(UartMsg_t));
  226. UartRecvQueue[1] = xQueueCreate(6, sizeof(UartMsg_t));
  227. UartRecvQueue[2] = xQueueCreate(6, sizeof(UartMsg_t));
  228. UartSendQueue[0] = xQueueCreate(3, sizeof(UartMsg_t));
  229. UartSendQueue[1] = xQueueCreate(1, sizeof(UartMsg_t));
  230. UartSendQueue[2] = xQueueCreate(1, sizeof(UartMsg_t));
  231. UartHalQueueHandle = xQueueCreate(9, sizeof(UartHalMsg_t));
  232. xTaskCreate(Uart_Hal_RecvTask, (const char *const)"UartRecv", 256, (void *)0, main_TASK_PRIORITY + 5, NULL);
  233. xTaskCreate(Uart_Hal_SendTask, (const char *const)"UartSend", 256, (void *)0, main_TASK_PRIORITY + 4, NULL);
  234. }
  235. Std_ReturnType UartStartRecvFunc(uint8 channel)
  236. {
  237. sint8 out = 0;
  238. volatile Std_ReturnType R_Uart_Status=E_NOT_OK;
  239. bufferIdx[channel]=0;
  240. memset(RX_Buffer[channel],0x00,BUFFER_SIZE);
  241. switch(channel)
  242. {
  243. case 0:
  244. IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  245. break;
  246. case 1:
  247. IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  248. break;
  249. case 2:
  250. IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  251. break;
  252. default:
  253. break;
  254. }
  255. Uart_SetBuffer(channel, RX_Buffer[channel], DMA_SIZE, UART_RECEIVE);
  256. R_Uart_Status = Uart_AsyncReceive(channel, RX_Buffer[channel], DMA_SIZE);
  257. if (E_OK != R_Uart_Status)
  258. {
  259. Uart_Abort(channel, UART_RECEIVE);
  260. out = E_NOT_OK;
  261. }
  262. return out;
  263. }
  264. void Uart_Hal_RecvTask(void *pvParameters)
  265. {
  266. UartHalMsg_t UartHalMsgRecv;
  267. UartMsg_t UartRecvMsg;
  268. uint16 recvSize = 0;
  269. BaseType_t ret = pdFALSE;
  270. BaseType_t ret_send = pdFALSE;
  271. uint32 T_bytesRemaining[3] = {0};
  272. uint16 T_timeout[3] = {0};
  273. volatile Uart_StatusType Uart_ReceiveStatus[3] = {UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT,UART_STATUS_TIMEOUT};
  274. uint8 UartIdx = UART_LPUART0;
  275. uint8 UartState[3] = {UartAbortRecv,UartAbortRecv,UartAbortRecv};
  276. while(1)
  277. {
  278. if((T_timeout[UartIdx]>1000) && (Uart_ReceiveStatus[UartIdx] != UART_STATUS_NO_ERROR) )//判定UART停止,超时停止,不是接收状态则停止
  279. {
  280. Uart_Abort(UartIdx, UART_RECEIVE);
  281. UartState[UartIdx] = UartAbortRecv;
  282. T_timeout[UartIdx] = 0;
  283. }
  284. else if(Uart_ReceiveStatus[UartIdx] == UART_STATUS_NO_ERROR)
  285. {
  286. UartState[UartIdx] = UartRecvComplete;
  287. }
  288. if((UartState[UartIdx] == UartAbortRecv) || (UartState[UartIdx] == UartRecvComplete)) //判定UART开始接收:UART停止后开始接收
  289. {
  290. if(E_OK == UartStartRecvFunc(UartIdx))
  291. {
  292. UartState[UartIdx] = UartStartRecv;
  293. }
  294. }
  295. Uart_ReceiveStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_RECEIVE);
  296. T_timeout[UartIdx]++;
  297. UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
  298. ret = xQueueReceive(UartHalQueueHandle,&UartHalMsgRecv,1);
  299. if(ret==pdTRUE)
  300. {
  301. if(UartHalMsgRecv.event==LPUART_UART_IP_EVENT_RECV_IDLE)
  302. {
  303. if(UartHalMsgRecv.value>0)
  304. {
  305. recvSize = write_ringBuffer(RX_Buffer[UartHalMsgRecv.Channel],UartHalMsgRecv.value,&uartRingBuffer[UartHalMsgRecv.Channel]);
  306. UartRecvMsg.DataLen = UartHalMsgRecv.value;
  307. UartRecvMsg.dataAddr = (uint32)(uartRingBuffer[UartHalMsgRecv.Channel].bw + uartRingBuffer[UartHalMsgRecv.Channel].source - recvSize);
  308. ret_send = xQueueSend(UartRecvQueue[UartHalMsgRecv.Channel],&UartRecvMsg,10);
  309. }
  310. T_timeout[UartHalMsgRecv.Channel] = 0;
  311. UartState[UartHalMsgRecv.Channel] = UartRecvComplete;
  312. }
  313. }
  314. }
  315. }
  316. void Uart_Hal_SendTask(void *pvParameters)
  317. {
  318. UartMsg_t UartSendMsg;
  319. BaseType_t ret = pdFALSE;
  320. uint32 T_bytesRemaining[3] = {0};
  321. uint16 T_timeout[3] = {0};
  322. volatile Std_ReturnType T_Uart_Status[3];
  323. uint8 UartIdx = UART_LPUART0;
  324. uint8 UartSendState[3] = {UartNoDataSend,UartNoDataSend,UartNoDataSend};
  325. while(1)
  326. {
  327. ret = xQueueReceive(UartSendQueue[UartIdx],&UartSendMsg,1);
  328. if(ret==pdTRUE)
  329. {
  330. if(UartIdx==UART_LPUART0)
  331. {
  332. Dio_WriteChannel(DioConf_DioChannel_PTB4_GPIO_OUT_MCU_RS485_EN, STD_ON);
  333. }
  334. #if SEGGER_PRINTF==1
  335. if(UartIdx==1)
  336. {
  337. SEGGER_RTT_printf("[%d]uart1_s=%s\r\n",__LINE__,UartSendMsg.dataPtr);
  338. }
  339. #endif
  340. T_Uart_Status[UartIdx] = Uart_AsyncSend(UartIdx, UartSendMsg.dataPtr, UartSendMsg.DataLen);
  341. if (E_OK != T_Uart_Status[UartIdx])
  342. {
  343. Uart_Abort(UartIdx, UART_SEND);
  344. UartSendState[UartIdx] = UartAbortSend;
  345. }
  346. else
  347. {
  348. UartSendState[UartIdx] = UartStartSend;
  349. }
  350. }
  351. /*开始发送后的判定*/
  352. if(UartSendState[UartIdx] == UartStartSend)
  353. {
  354. Uart_TransmitStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_SEND);
  355. T_timeout[UartIdx]++;
  356. }
  357. if(T_timeout[UartIdx]>=1000 || ((Uart_TransmitStatus[UartIdx] != UART_STATUS_OPERATION_ONGOING) && (UartSendState[UartIdx] == UartStartSend)))
  358. {
  359. if(T_timeout[UartIdx]>=1000)
  360. {
  361. Uart_Abort(UartIdx, UART_SEND);
  362. UartSendState[UartIdx] = UartAbortSend;
  363. }
  364. else if(Uart_TransmitStatus[UartIdx] == UART_STATUS_NO_ERROR)
  365. {
  366. UartSendState[UartIdx] = UartSendComplete;
  367. }
  368. T_timeout[UartIdx] = 0;
  369. }
  370. UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
  371. }
  372. }
  373. //
  374. //Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, const uint8 *txBuffer, uint32 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
  375. //{
  376. // volatile Std_ReturnType R_Uart_Status;
  377. // volatile Std_ReturnType T_Uart_Status;
  378. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  379. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  380. // uint32 T_bytesRemaining;
  381. // uint32 R_bytesRemaining;
  382. // uint32 timeout = T_timeout;
  383. // uint32 retVal = E_NOT_OK;
  384. // bufferIdx[recvChannel] = 0;
  385. // switch (recvChannel)
  386. // {
  387. // case 0:
  388. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  389. // break;
  390. // case 1:
  391. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  392. // break;
  393. // case 2:
  394. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  395. // break;
  396. // default:
  397. // break;
  398. // }
  399. // if (txBuffer == NULL || rxBuffer == NULL)
  400. // {
  401. // return retVal;
  402. // }
  403. //
  404. // /* Uart_AsyncSend transmit data */
  405. // Uart_SetBuffer(transChannel, txBuffer, sendLength, UART_SEND);
  406. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  407. // if (E_OK != T_Uart_Status)
  408. // {
  409. // Uart_Abort(transChannel, UART_SEND);
  410. // return E_NOT_OK;
  411. // }
  412. // Uart_SetBuffer(recvChannel, &RX_Buffer[recvChannel][0], DMA_SIZE, UART_RECEIVE);
  413. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  414. // if (E_OK != R_Uart_Status)
  415. // {
  416. // Uart_Abort(recvChannel, UART_RECEIVE);
  417. // return E_NOT_OK;
  418. // }
  419. // /* Check for no on-going transmission */
  420. // do
  421. // {
  422. // if (Uart_TransmitStatus != UART_STATUS_NO_ERROR)
  423. // {
  424. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  425. // }
  426. // if (Uart_ReceiveStatus != UART_STATUS_NO_ERROR)
  427. // {
  428. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &R_bytesRemaining, UART_RECEIVE);
  429. // }
  430. // vTaskDelay(pdMS_TO_TICKS(1));
  431. // } while (((UART_STATUS_NO_ERROR != Uart_TransmitStatus || UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < --timeout));
  432. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  433. // {
  434. // Uart_Abort(transChannel, UART_SEND);
  435. // retVal = E_NOT_OK;
  436. // }
  437. // else
  438. // {
  439. // retVal = E_OK;
  440. // }
  441. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  442. // {
  443. // Uart_Abort(recvChannel, UART_RECEIVE);
  444. // *rxlen = bufferIdx[recvChannel];
  445. // retVal = E_NOT_OK;
  446. // }
  447. // else
  448. // {
  449. // *rxlen = bufferIdx[recvChannel];
  450. // retVal = E_OK;
  451. // }
  452. // return retVal;
  453. //}
  454. //
  455. //Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
  456. //{
  457. //
  458. // volatile Std_ReturnType T_Uart_Status;
  459. // volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
  460. // uint32 T_bytesRemaining;
  461. // uint32 timeout = T_timeout;
  462. // uint32 retVal = E_NOT_OK;
  463. // if (txBuffer == NULL)
  464. // {
  465. // return retVal;
  466. // }
  467. //
  468. // /* Uart_AsyncSend transmit data */
  469. // T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
  470. // if (E_OK != T_Uart_Status)
  471. // {
  472. // Uart_Abort(transChannel, UART_SEND);
  473. // return E_NOT_OK;
  474. // }
  475. // /* Check for no on-going transmission */
  476. // do
  477. // {
  478. // Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
  479. // vTaskDelay(pdMS_TO_TICKS(1));
  480. // } while ((UART_STATUS_NO_ERROR != Uart_TransmitStatus && 0 < --timeout));
  481. //
  482. // if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
  483. // {
  484. // retVal = E_NOT_OK;
  485. // }
  486. // else
  487. // {
  488. // retVal = E_OK;
  489. // }
  490. // return retVal;
  491. //}
  492. //
  493. //Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint16 *rxlen, sint32 T_timeout)
  494. //{
  495. // volatile Std_ReturnType R_Uart_Status = E_NOT_OK;
  496. // volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
  497. // uint32 T_bytesRemaining = 0;
  498. // uint32 retVal = E_NOT_OK;
  499. // // uint8 Rx_Buffer[MSG_LEN];
  500. // bufferIdx[recvChannel] = 0;
  501. // *rxlen = 0;
  502. // if (rxBuffer == NULL)
  503. // {
  504. // return retVal;
  505. // }
  506. // /* Uart_AsyncReceive transmit data */
  507. // switch (recvChannel)
  508. // {
  509. // case 0:
  510. // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
  511. // break;
  512. // case 1:
  513. // IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
  514. // break;
  515. // case 2:
  516. // IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
  517. // break;
  518. // default:
  519. // break;
  520. // }
  521. // Uart_SetBuffer(recvChannel, rxBuffer, DMA_SIZE, UART_RECEIVE);
  522. // R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
  523. // if (E_OK != R_Uart_Status)
  524. // {
  525. // Uart_Abort(recvChannel, UART_RECEIVE);
  526. // return E_NOT_OK;
  527. // }
  528. // /* Check for no on-going transmission */
  529. // do
  530. // {
  531. // Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &T_bytesRemaining, UART_RECEIVE);
  532. // vTaskDelay(pdMS_TO_TICKS(1));
  533. //
  534. // } while ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < T_timeout--);
  535. // if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
  536. // {
  537. // Uart_Abort(recvChannel, UART_RECEIVE);
  538. // *rxlen = bufferIdx[recvChannel];
  539. // retVal = E_NOT_OK;
  540. // }
  541. // else
  542. // {
  543. // *rxlen = bufferIdx[recvChannel];
  544. // retVal = E_OK;
  545. // }
  546. // return retVal;
  547. //}
  548. extern Lpuart_Uart_Ip_StateStructureType *Lpuart_Uart_Ip_apStateStructuresArray[LPUART_UART_IP_NUMBER_OF_INSTANCES];
  549. void UART_Callback(uint32 hwInstance, Lpuart_Uart_Ip_EventType event)
  550. {
  551. // (void)userData;
  552. Lpuart_Uart_Ip_StateStructureType * UartState;
  553. UartState = (Lpuart_Uart_Ip_StateStructureType *)Lpuart_Uart_Ip_apStateStructuresArray[hwInstance];
  554. if (hwInstance==0&&event == LPUART_UART_IP_EVENT_END_TRANSFER)
  555. {
  556. Dio_WriteChannel(DioConf_DioChannel_PTB4_GPIO_OUT_MCU_RS485_EN, STD_OFF);
  557. }
  558. /* Check the event type */
  559. if (event == LPUART_UART_IP_EVENT_RX_FULL)
  560. {
  561. /* The reception stops when receiving idle is detected or the buffer is full */
  562. if (bufferIdx[hwInstance] <= (BUFFER_SIZE - DMA_SIZE))
  563. {
  564. /* Update the buffer index and the rx buffer */
  565. bufferIdx[hwInstance] += DMA_SIZE;
  566. Uart_SetBuffer(hwInstance, &RX_Buffer[hwInstance][bufferIdx[hwInstance]], DMA_SIZE, UART_RECEIVE);
  567. // Lpuart_Uart_Ip_SetRxBuffer(hwInstance, &RX_Buffer[bufferIdx], DMA_SIZE);
  568. }
  569. }
  570. if (event == LPUART_UART_IP_EVENT_ERROR)
  571. {
  572. // /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  573. // temp = DMA_SIZE - (uint32_t)IP_DMA->TCD->CITER.ELINKNO;
  574. // /*Add the remaining data size to the sum of the received size*/
  575. // bufferIdx[hwInstance] += temp;
  576. /*Abort the receiving after detecting IDLE receiving*/
  577. Lpuart_Uart_Ip_AbortReceivingData(hwInstance);
  578. Lpuart_Uart_Ip_AbortSendingData(hwInstance);
  579. // bufferIdx = 0;
  580. }
  581. if (event == LPUART_UART_IP_EVENT_RECV_IDLE)
  582. {
  583. uint32_t temp;
  584. UartHalMsg_t UartHalMsg;
  585. UartHalMsg.Channel = hwInstance;
  586. UartHalMsg.event = event;
  587. /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
  588. temp = DMA_SIZE - (uint32_t)IP_DMA->TCD[hwInstance].CITER.ELINKNO;
  589. /*Add the remaining data size to the sum of the received size*/
  590. bufferIdx[hwInstance] += temp;
  591. /*Abort the receiving after detecting IDLE receiving*/
  592. UartHalMsg.value = bufferIdx[hwInstance];
  593. xQueueSendFromISR(UartHalQueueHandle,&UartHalMsg,pdFALSE);
  594. }
  595. }
  596. /*CAN*/
  597. Can_PduType Can_CreatePduInfo(Can_IdType id, CAN_IdFrameType idFrame, PduIdType swPduHandle, uint8 length, uint8 *sdu)
  598. {
  599. Can_PduType PduInfo;
  600. switch (idFrame)
  601. {
  602. case CAN_STANDARD_ID_TYPE:
  603. id = id & 0x7FF;
  604. break;
  605. case CANFD_STANDARD_ID_TYPE:
  606. id = (id & 0x7FF) | 0x40000000;
  607. break;
  608. case CAN_EXTENDED_ID_TYPE:
  609. id = id | 0x80000000;
  610. break;
  611. case CANFD_EXTENDED_ID_TYPE:
  612. id = id | 0xC0000000;
  613. break;
  614. default:
  615. id = id & 0x7FF;
  616. break;
  617. }
  618. PduInfo.id = id;
  619. PduInfo.swPduHandle = swPduHandle;
  620. PduInfo.length = length;
  621. PduInfo.sdu = sdu;
  622. return PduInfo;
  623. }
  624. Std_ReturnType CanIf_SendMessage(uint8 ControllerId, Can_Msg_Type CanMsg)
  625. {
  626. volatile Can_PduType Can_PduInfo;
  627. volatile Std_ReturnType CAN_Write_Status;
  628. Std_ReturnType retVal = E_NOT_OK;
  629. uint32 u8TimeOut = 100 * 100;
  630. Can_HwHandleType Hth = Can0HardwareObject_TX + (Can_HwHandleType)ControllerId; // controller 0 --> Can0HardwareObject_TX
  631. Can_PduInfo = Can_CreatePduInfo(CanMsg.id, CanMsg.idFrame, 0, CanMsg.length, CanMsg.sdu);
  632. CAN_Write_Status = Can_Write(Hth, &Can_PduInfo);
  633. CanIf_bTxFlag = FALSE;
  634. if (CAN_Write_Status == E_OK)
  635. {
  636. while ((!CanIf_bTxFlag) && (u8TimeOut != 0U))
  637. {
  638. Can_MainFunction_Write();
  639. u8TimeOut--;
  640. }
  641. }
  642. if (CanIf_bTxFlag == TRUE)
  643. {
  644. retVal = E_OK;
  645. }
  646. else
  647. {
  648. retVal = E_NOT_OK;
  649. }
  650. return retVal;
  651. }
  652. Can_Msg_Type Can_GetMsgInfo(Can_IdType id, uint8 length, uint8 *sdu)
  653. {
  654. Can_Msg_Type CanMsgInfo;
  655. CanMsgInfo.idFrame = (CAN_IdFrameType)((id >> 30) & 0x03);
  656. if (CanMsgInfo.idFrame & 0x01)
  657. {
  658. CanMsgInfo.id = id & 0x7FF;
  659. }
  660. else
  661. {
  662. CanMsgInfo.id = id & 0x1FFFFFFF;
  663. }
  664. CanMsgInfo.length = length;
  665. CanMsgInfo.sdu = sdu;
  666. return CanMsgInfo;
  667. }
  668. void CanIf_ControllerBusOff(uint8 ControllerId)
  669. {
  670. (void)ControllerId;
  671. }
  672. void CanIf_ControllerModeIndication(uint8 ControllerId, Can_ControllerStateType ControllerMode)
  673. {
  674. (void)ControllerId;
  675. (void)ControllerMode;
  676. }
  677. void CanIf_TxConfirmation(PduIdType CanTxPduId)
  678. {
  679. CanIf_u8TxConfirmCnt++;
  680. CanIf_bTxFlag = TRUE;
  681. (void)CanTxPduId;
  682. }
  683. void CanIf_RxIndication(const Can_HwType *Mailbox, const PduInfoType *PduInfoPtr)
  684. {
  685. Can_Msg_Type canRxMsg_Buff;
  686. Can_Msg_Type_Data canRxMsgQueueData;
  687. CanIf_bRxFlag = TRUE; // should not be delete
  688. // should put the msg into message queue
  689. canRxMsg_Buff = Can_GetMsgInfo(Mailbox->CanId, PduInfoPtr->SduLength, PduInfoPtr->SduDataPtr);
  690. canRxMsgQueueData.id = canRxMsg_Buff.id;
  691. canRxMsgQueueData.length = canRxMsg_Buff.length;
  692. memcpy(canRxMsgQueueData.data, canRxMsg_Buff.sdu, canRxMsgQueueData.length);
  693. xQueueSend(CanRecvQueueHandle, &canRxMsgQueueData, 0);
  694. }
  695. void CanIf_CurrentIcomConfiguration(uint8 ControllerId, IcomConfigIdType ConfigurationId, IcomSwitch_ErrorType Error)
  696. {
  697. (void)ControllerId;
  698. (void)ConfigurationId;
  699. (void)Error;
  700. }
  701. void Notification_0(void)
  702. {
  703. ADC_Converter(ResultBuffer, ConvertedBuffer);
  704. memcpy(BattTempR, &ConvertedBuffer[3], 4 * sizeof(uint32));
  705. }
  706. void Notification_1(void)
  707. {
  708. VarNotification_1++;
  709. }
  710. Std_ReturnType ADC_Converter(Adc_ValueGroupType *Buffer, TP_Value_Type *ConvertedValueR)
  711. {
  712. Adc_ValueGroupType REFH, REFL;
  713. REFH = Buffer[0];
  714. REFL = Buffer[2];
  715. for (int i = 3; i < NUM_RESULTS; i++)
  716. {
  717. if (Buffer[i] >= REFH)
  718. {
  719. ConvertedValueR[i] = 40930000;
  720. }
  721. else if (Buffer[i] <= REFL)
  722. {
  723. ConvertedValueR[i] = 0x00;
  724. }
  725. else
  726. {
  727. ConvertedValueR[i] = (TP_Value_Type)((float)(10000 * (Buffer[i] - REFL) / (float)(REFH - REFL)) / (1 - (float)((Buffer[i] - REFL) / (float)(REFH - REFL))));
  728. }
  729. }
  730. return 0;
  731. }
  732. Std_ReturnType ADC_ReadValue()
  733. {
  734. Std_ReturnType ret = E_NOT_OK;
  735. for (uint8 i = 0; i < NUM_RESULTS; i++)
  736. {
  737. ResultBuffer[i] = 0xFFFF;
  738. ConvertedBuffer[i] = 0x00;
  739. }
  740. Adc_SetupResultBuffer(AdcGroupSoftwareOneShot, ResultBuffer);
  741. Adc_EnableGroupNotification(AdcGroupSoftwareOneShot);
  742. VarNotification_0 = 0;
  743. Adc_StartGroupConversion(AdcGroupSoftwareOneShot);
  744. return ret;
  745. }
  746. /*EEP*/
  747. static Std_ReturnType TestEep_FlexNvmProgramPartCmd(
  748. VAR(TestEep_CsecKeySize, AUTOMATIC) eepKeysize,
  749. VAR(TestEep_SfeType, AUTOMATIC) eepSecurityFlagExtension,
  750. VAR(TestEep_LoadFlexRamType, AUTOMATIC) eepLoadFlexRamAtReset,
  751. VAR(TestEep_Eeprom_FlexRamPartitionType, AUTOMATIC) eepFlexRamPartition,
  752. VAR(TestEep_Eeprom_FlexNvmPartitionType, AUTOMATIC) eepFlexNvmPartition)
  753. {
  754. Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
  755. uint32 u32FlexNvmPartSize = 0;
  756. uint32 u32RegSimFcfg1 = 0UL;
  757. u32RegSimFcfg1 = IP_SIM->FCFG1;
  758. /*get DEPART value */
  759. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  760. /* check that it was not partitioned before */
  761. if (u32FlexNvmPartSize == 0xF)
  762. {
  763. // /* if error flags are set the cmd is not executed */
  764. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8);
  765. //
  766. // /*erase DF 0 sector*/
  767. // u32Addr=(TEST_EEP_DEEPROM_SECTOR_0_ADDR32 - D_EEPROM_BASE_ADDR) + 0x800000UL;
  768. //
  769. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, TEST_EEP_EEPROM_CMD_ERASE_SECTOR);
  770. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)(u32Addr >> 16UL));
  771. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)(u32Addr >> 8UL));
  772. // REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)(u32Addr >> 0UL));
  773. // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32 , TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  774. // while((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  775. // {
  776. // }
  777. //
  778. if (0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  779. {
  780. /* run program partition command */
  781. REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, EEPROM_CMD_PROGRAM_PARTITION);
  782. REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)eepKeysize);
  783. REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)eepSecurityFlagExtension);
  784. REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)eepLoadFlexRamAtReset);
  785. REG_WRITE8(TEST_EEP_EEPROM_FCCOB4_ADDR32, (uint8)eepFlexRamPartition);
  786. REG_WRITE8(TEST_EEP_EEPROM_FCCOB5_ADDR32, (uint8)eepFlexNvmPartition);
  787. REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8);
  788. while ((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
  789. {
  790. /* wait for operation to finish */
  791. }
  792. /* check if errors occured */
  793. if (REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
  794. {
  795. /* NOK, error flags are set */
  796. u8RetVal = (Std_ReturnType)E_NOT_OK;
  797. }
  798. }
  799. else
  800. {
  801. /* NOK, error flags are set */
  802. u8RetVal = (Std_ReturnType)E_NOT_OK;
  803. }
  804. }
  805. else
  806. {
  807. /* NOK, partitioned already */
  808. u8RetVal = (Std_ReturnType)E_NOT_OK;
  809. }
  810. return u8RetVal;
  811. }
  812. void Eep_DepartParitition(TestEep_Eeprom_FlexNvmPartitionType T_EEP_SIZE)
  813. {
  814. uint32 u32FlexNvmPartSize = 0;
  815. uint32 u32RegSimFcfg1 = 0UL;
  816. u32RegSimFcfg1 = IP_SIM->FCFG1;
  817. /*get DEPART value */
  818. u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
  819. if (u32FlexNvmPartSize == 0xF) /* We just partition again if curent size different with expected */
  820. {
  821. /* partition for EERAM 64K with NOT loading EERAM at reset in hardware */
  822. TestEep_FlexNvmProgramPartCmd(EEP_FTFC_KEY_SIZE_0_BYTES, EEP_FTFC_VERIFY_ONLY_DISABLED,
  823. EEP_FTFC_LOAD_AT_RESET_ENABLED, EEP_FTFC_EERAM_SIZE_4K, T_EEP_SIZE);
  824. }
  825. }
  826. /* Erase memory by writing erase value */
  827. Std_ReturnType HAL_EEP_Erase(uint32 eepEraseStartAddr, uint32 eepEraseSize)
  828. {
  829. Std_ReturnType retReturnType = E_OK;
  830. MemIf_JobResultType retJobResultType;
  831. retReturnType = Eep_Erase(eepEraseStartAddr, eepEraseSize);
  832. if (E_OK != retReturnType)
  833. {
  834. return E_NOT_OK;
  835. }
  836. while (MEMIF_IDLE != Eep_GetStatus())
  837. {
  838. Eep_MainFunction();
  839. }
  840. retJobResultType = Eep_GetJobResult();
  841. if (MEMIF_JOB_OK != retJobResultType)
  842. {
  843. return E_NOT_OK;
  844. }
  845. return E_OK;
  846. }
  847. /* Write one or more complete eeprom pages to the eeprom device */
  848. Std_ReturnType HAL_EEP_Write(uint32 eepWriteStartAddr, uint8 *pDataNeedtoWrite, uint32 dataSize)
  849. {
  850. Std_ReturnType retReturnType = E_OK;
  851. MemIf_JobResultType retJobResultType;
  852. /*Erase the EEP before write*/
  853. retReturnType = HAL_EEP_Erase(eepWriteStartAddr, dataSize);
  854. if (E_OK != retReturnType)
  855. {
  856. return E_NOT_OK;
  857. }
  858. retReturnType = Eep_Write(eepWriteStartAddr, pDataNeedtoWrite, dataSize);
  859. if (E_OK != retReturnType)
  860. {
  861. return E_NOT_OK;
  862. }
  863. while (MEMIF_IDLE != Eep_GetStatus())
  864. {
  865. Eep_MainFunction();
  866. }
  867. retJobResultType = Eep_GetJobResult();
  868. if (MEMIF_JOB_OK != retJobResultType)
  869. {
  870. return E_NOT_OK;
  871. }
  872. return E_OK;
  873. }
  874. /* Reads from eeprom memory */
  875. Std_ReturnType HAL_EEP_Read(uint32 eepReadStartAddr, uint8 *pDataBuffer, uint32 dataSize)
  876. {
  877. Std_ReturnType retReturnType = E_OK;
  878. MemIf_JobResultType retJobResultType;
  879. retReturnType = Eep_Read(eepReadStartAddr, pDataBuffer, dataSize);
  880. if (E_OK != retReturnType)
  881. {
  882. return E_NOT_OK;
  883. }
  884. while (MEMIF_IDLE != Eep_GetStatus())
  885. {
  886. Eep_MainFunction();
  887. }
  888. retJobResultType = Eep_GetJobResult();
  889. if (MEMIF_JOB_OK != retJobResultType)
  890. {
  891. return E_NOT_OK;
  892. }
  893. return E_OK;
  894. }
  895. /* Compares a eeprom memory area with an application data buffer */
  896. Std_ReturnType HAL_EEP_Compare(uint32 eepCompareStartAddr, uint8 *pDataNeedtoCompare, uint32 dataSize)
  897. {
  898. Std_ReturnType retReturnType = E_OK;
  899. MemIf_JobResultType retJobResultType;
  900. retReturnType = Eep_Compare(eepCompareStartAddr, pDataNeedtoCompare, dataSize);
  901. if (E_OK != retReturnType)
  902. {
  903. return E_NOT_OK;
  904. }
  905. while (MEMIF_IDLE != Eep_GetStatus())
  906. {
  907. Eep_MainFunction();
  908. }
  909. retJobResultType = Eep_GetJobResult();
  910. if (MEMIF_JOB_OK != retJobResultType)
  911. {
  912. return E_NOT_OK;
  913. }
  914. return E_OK;
  915. }
  916. /* @brief VECTKEY value so that AIRCR register write is not ignored. */
  917. #define FEATURE_SCB_VECTKEY (0x05FAU)
  918. void SystemSoftwareReset(void)
  919. {
  920. uint32_t regValue;
  921. /* Read Application Interrupt and Reset Control Register */
  922. regValue = S32_SCB->AIRCR;
  923. /* Clear register key */
  924. regValue &= ~( S32_SCB_AIRCR_VECTKEY_MASK);
  925. /* Configure System reset request bit and Register Key */
  926. regValue |= S32_SCB_AIRCR_VECTKEY(FEATURE_SCB_VECTKEY);
  927. regValue |= S32_SCB_AIRCR_SYSRESETREQ(0x1u);
  928. /* Write computed register value */
  929. S32_SCB->AIRCR = regValue;
  930. }