
Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:

Dma_Ip_GetLogicChannelStatus/82 (Dma_Ip_GetLogicChannelStatus) @0706c540
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_CompleteSendUsingDma/57 
  Calls: 
Dma_Ip_SetLogicChannelTransferList/81 (Dma_Ip_SetLogicChannelTransferList) @0706c0e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_StartSendDataUsingDma/55 
  Calls: 
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/80 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03) @0703dd20
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_AsyncReceive/42 Lpuart_Uart_Ip_AsyncReceive/42 
  Calls: 
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/79 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03) @0703dc40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_AsyncReceive/42 
  Calls: 
*.LC2/78 (*.LC2) @07041d38
  Type: variable definition analyzed
  Visibility: no_reorder prevailing_def_ironly artificial
  References: 
  Referring: Lpuart_Uart_Ip_StartGetData/41 (read)
  Availability: available
  Varpool flags: initialized read-only const-value-known
*.LC1/77 (*.LC1) @07041ca8
  Type: variable definition analyzed
  Visibility: no_reorder prevailing_def_ironly artificial
  References: 
  Referring: Lpuart_Uart_Ip_StartGetData/41 (read)
  Availability: available
  Varpool flags: initialized read-only const-value-known
*.LC0/76 (*.LC0) @07041c18
  Type: variable definition analyzed
  Visibility: no_reorder prevailing_def_ironly artificial
  References: 
  Referring: Lpuart_Uart_Ip_StartGetData/41 (read)
  Availability: available
  Varpool flags: initialized read-only const-value-known
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/75 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02) @0703d700
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_SyncReceive/40 
  Calls: 
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/74 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02) @0703d620
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_SyncReceive/40 
  Calls: 
Dma_Ip_SetLogicChannelCommand/73 (Dma_Ip_SetLogicChannelCommand) @0703d380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_AbortReceivingData/44 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 Lpuart_Uart_Ip_AbortSendingData/39 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_StartSendDataUsingDma/55 
  Calls: 
Dma_Ip_GetLogicChannelParam/72 (Dma_Ip_GetLogicChannelParam) @0703d1c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_GetReceiveStatus/43 Lpuart_Uart_Ip_GetTransmitStatus/38 
  Calls: 
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/71 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01) @0703d000
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_AsyncSend/37 Lpuart_Uart_Ip_AsyncSend/37 
  Calls: 
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/70 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01) @0702aee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_AsyncSend/37 
  Calls: 
SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/69 (SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00) @0702ac40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_SyncSend/36 
  Calls: 
SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/68 (SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00) @0702ab60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_SyncSend/36 
  Calls: 
OsIf_GetElapsed/67 (OsIf_GetElapsed) @0702a8c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_CheckTimeout/26 
  Calls: 
OsIf_MicrosToTicks/66 (OsIf_MicrosToTicks) @0702a620
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_StartTimeout/25 
  Calls: 
OsIf_GetCounter/65 (OsIf_GetCounter) @0702a540
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Lpuart_Uart_Ip_StartTimeout/25 
  Calls: 
Lpuart_Uart_Ip_GetData/64 (Lpuart_Uart_Ip_GetData) @06ff8a80
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_RxIrqHandler/50 Lpuart_Uart_Ip_StartGetData/41 
  Calls: Lpuart_Uart_Ip_Getchar10/20 Lpuart_Uart_Ip_Getchar9/19 Lpuart_Uart_Ip_Getchar/18 
Lpuart_Uart_Ip_PutData/63 (Lpuart_Uart_Ip_PutData) @06ff87e0
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_TxEmptyIrqHandler/51 Lpuart_Uart_Ip_SyncSend/36 
  Calls: Lpuart_Uart_Ip_Putchar10/17 Lpuart_Uart_Ip_Putchar9/16 Lpuart_Uart_Ip_Putchar/15 
Lpuart_Uart_Ip_SetupIntDmaMode/62 (Lpuart_Uart_Ip_SetupIntDmaMode) @06ff8540
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 
  Calls: Lpuart_Uart_Ip_SetRxDmaCmd/14 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 
Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 (Lpuart_Uart_Ip_CompleteReceiveUsingDma) @06ff82a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_AbortReceivingData/44 
  Calls: Lpuart_Uart_Ip_Getchar/18 Lpuart_Uart_Ip_SetReceiverCmd/2 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_StartTimeout/25 Lpuart_Uart_Ip_SetupIntDmaMode/62 DevAssert/29 Dma_Ip_SetLogicChannelCommand/73 DevAssert/29 Dma_Ip_SetLogicChannelTransferList/81 DevAssert/29 Dma_Ip_SetLogicChannelCommand/73 Dma_Ip_GetLogicChannelStatus/82 
   Indirect call
   Indirect call
   Indirect call
Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 (Lpuart_Uart_Ip_CompleteReceiveDataUsingInt) @06ff8000
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_RxIrqHandler/50 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_AbortReceivingData/44 
  Calls: Lpuart_Uart_Ip_Getchar/18 Lpuart_Uart_Ip_SetReceiverCmd/2 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_StartTimeout/25 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 
Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 (Lpuart_Uart_Ip_StartReceiveDataUsingDma) @06fe3b60
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_AsyncReceive/42 
  Calls: Lpuart_Uart_Ip_SetupIntDmaMode/62 Lpuart_Uart_Ip_SetReceiverCmd/2 DevAssert/29 Dma_Ip_SetLogicChannelCommand/73 DevAssert/29 Dma_Ip_SetLogicChannelTransferList/81 Lpuart_Uart_Ip_FlushRxBuffer/28 Lpuart_Uart_Ip_ClearErrorFlags/24 
Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 (Lpuart_Uart_Ip_StartReceiveDataUsingInt) @06fe3620
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_AsyncReceive/42 
  Calls: Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetReceiverCmd/2 Lpuart_Uart_Ip_FlushRxBuffer/28 Lpuart_Uart_Ip_ClearErrorFlags/24 
Lpuart_Uart_Ip_CompleteSendUsingDma/57 (Lpuart_Uart_Ip_CompleteSendUsingDma) @06fe30e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_AbortSendingData/39 
  Calls: Lpuart_Uart_Ip_SetTransmitterCmd/1 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_StartTimeout/25 Lpuart_Uart_Ip_SetTxDmaCmd/13 DevAssert/29 Dma_Ip_SetLogicChannelCommand/73 DevAssert/29 Dma_Ip_SetLogicChannelTransferList/81 DevAssert/29 Dma_Ip_SetLogicChannelCommand/73 Dma_Ip_GetLogicChannelStatus/82 
   Indirect call
   Indirect call
   Indirect call
Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 (Lpuart_Uart_Ip_CompleteSendDataUsingInt) @06fe3d20
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_AbortSendingData/39 Lpuart_Uart_Ip_TxCompleteIrqHandler/52 
  Calls: Lpuart_Uart_Ip_SetTransmitterCmd/1 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_StartTimeout/25 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 
Lpuart_Uart_Ip_StartSendDataUsingDma/55 (Lpuart_Uart_Ip_StartSendDataUsingDma) @06fe3a80
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_AsyncSend/37 
  Calls: Lpuart_Uart_Ip_SetTxDmaCmd/13 Lpuart_Uart_Ip_SetTransmitterCmd/1 DevAssert/29 Dma_Ip_SetLogicChannelCommand/73 DevAssert/29 Dma_Ip_SetLogicChannelTransferList/81 
Lpuart_Uart_Ip_StartSendDataUsingInt/54 (Lpuart_Uart_Ip_StartSendDataUsingInt) @06fe37e0
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_AsyncSend/37 
  Calls: Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetTransmitterCmd/1 
Lpuart_Uart_Ip_ErrIrqHandler/53 (Lpuart_Uart_Ip_ErrIrqHandler) @06fe3540
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_IrqHandler/49 
  Calls: Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Dma_Ip_SetLogicChannelCommand/73 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_GetIntMode/12 Lpuart_Uart_Ip_ClearStatusFlag/22 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_GetIntMode/12 Lpuart_Uart_Ip_ClearStatusFlag/22 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_GetIntMode/12 Lpuart_Uart_Ip_ClearStatusFlag/22 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_GetIntMode/12 Lpuart_Uart_Ip_ClearStatusFlag/22 Lpuart_Uart_Ip_GetStatusFlag/21 
   Indirect call
Lpuart_Uart_Ip_TxCompleteIrqHandler/52 (Lpuart_Uart_Ip_TxCompleteIrqHandler) @06fe32a0
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_IrqHandler/49 
  Calls: Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 
   Indirect call
Lpuart_Uart_Ip_TxEmptyIrqHandler/51 (Lpuart_Uart_Ip_TxEmptyIrqHandler) @06fe3000
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_IrqHandler/49 
  Calls: Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_PutData/63 
   Indirect call
Lpuart_Uart_Ip_RxIrqHandler/50 (Lpuart_Uart_Ip_RxIrqHandler) @06fd5b60
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_IrqHandler/49 
  Calls: Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_GetData/64 
   Indirect call
   Indirect call
Lpuart_Uart_Ip_IrqHandler/49 (Lpuart_Uart_Ip_IrqHandler) @06fd5620
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Lpuart_Uart_Ip_TxCompleteIrqHandler/52 Lpuart_Uart_Ip_GetIntMode/12 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_TxEmptyIrqHandler/51 Lpuart_Uart_Ip_GetIntMode/12 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_Getchar/18 Lpuart_Uart_Ip_RxIrqHandler/50 Lpuart_Uart_Ip_GetIntMode/12 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_ClearErrorFlags/24 Lpuart_Uart_Ip_Getchar/18 DevAssert/29 
Lpuart_Uart_Ip_SetRxBuffer/48 (Lpuart_Uart_Ip_SetRxBuffer) @06fd50e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_SetTxBuffer/47 (Lpuart_Uart_Ip_SetTxBuffer) @06fd5d20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_GetBaudRate/46 (Lpuart_Uart_Ip_GetBaudRate) @06fd5a80
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_SetBaudRate/45 (Lpuart_Uart_Ip_SetBaudRate) @06fd57e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Lpuart_Uart_Ip_SetBaudRateDivisor/3 Lpuart_Uart_Ip_SetOversamplingRatio/5 Lpuart_Uart_Ip_EnableBothEdgeSamplingCmd/7 DevAssert/29 DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_AbortReceivingData/44 (Lpuart_Uart_Ip_AbortReceivingData) @06fd5540
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Lpuart_Uart_Ip_FlushRxBuffer/28 Lpuart_Uart_Ip_ClearErrorFlags/24 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Dma_Ip_SetLogicChannelCommand/73 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_GetReceiveStatus/43 (Lpuart_Uart_Ip_GetReceiveStatus) @06fd52a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Dma_Ip_GetLogicChannelParam/72 DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_AsyncReceive/42 (Lpuart_Uart_Ip_AsyncReceive) @06fd5000
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apUserConfig/32 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 DevAssert/29 DevAssert/29 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/80 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03/80 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03/79 DevAssert/29 DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_StartGetData/41 (Lpuart_Uart_Ip_StartGetData) @06d229a0
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apBases/33 (read)*.LC0/76 (read)*.LC1/77 (read)*.LC2/78 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: Lpuart_Uart_Ip_SyncReceive/40 
  Calls: Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_GetData/64 Lpuart_Uart_Ip_ClearStatusFlagWithMask/23 Lpuart_Uart_Ip_SetReceiverCmd/2 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_GetStatusFlag/21 
Lpuart_Uart_Ip_SyncReceive/40 (Lpuart_Uart_Ip_SyncReceive) @06d22380
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Lpuart_Uart_Ip_Getchar/18 Lpuart_Uart_Ip_SetReceiverCmd/2 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_StartGetData/41 Lpuart_Uart_Ip_StartTimeout/25 Lpuart_Uart_Ip_SetReceiverCmd/2 Lpuart_Uart_Ip_SetIntMode/11 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/75 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02/75 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02/74 DevAssert/29 DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_AbortSendingData/39 (Lpuart_Uart_Ip_AbortSendingData) @06d22e00
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Lpuart_Uart_Ip_FlushTxBuffer/27 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Dma_Ip_SetLogicChannelCommand/73 Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_GetTransmitStatus/38 (Lpuart_Uart_Ip_GetTransmitStatus) @06d22b60
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Dma_Ip_GetLogicChannelParam/72 DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_AsyncSend/37 (Lpuart_Uart_Ip_AsyncSend) @06d228c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apUserConfig/32 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Lpuart_Uart_Ip_StartSendDataUsingDma/55 Lpuart_Uart_Ip_StartSendDataUsingInt/54 DevAssert/29 DevAssert/29 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/71 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01/71 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01/70 DevAssert/29 DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_SyncSend/36 (Lpuart_Uart_Ip_SyncSend) @06d22540
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_SetTransmitterCmd/1 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_PutData/63 Lpuart_Uart_Ip_StartTimeout/25 Lpuart_Uart_Ip_SetTransmitterCmd/1 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/69 SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00/69 SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00/68 DevAssert/29 DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_Deinit/35 (Lpuart_Uart_Ip_Deinit) @06d222a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_SetIntMode/11 Lpuart_Uart_Ip_CheckTimeout/26 Lpuart_Uart_Ip_GetStatusFlag/21 Lpuart_Uart_Ip_StartTimeout/25 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_Init/34 (Lpuart_Uart_Ip_Init) @06d1bb60
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apBases/33 (read)Lpuart_Uart_Ip_apStateStructuresArray/31 (write)Lpuart_Uart_Ip_apStateStructuresArray/31 (read)Lpuart_Uart_Ip_apUserConfig/32 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Lpuart_Uart_Ip_SetStopBitCount/10 Lpuart_Uart_Ip_SetParityMode/9 Lpuart_Uart_Ip_SetBitCountPerChar/8 Lpuart_Uart_Ip_SetBitCountPerChar/8 Lpuart_Uart_Ip_SetBaudRateDivisor/3 Lpuart_Uart_Ip_SetOversamplingRatio/5 Lpuart_Uart_Ip_EnableBothEdgeSamplingCmd/7 Lpuart_Uart_Ip_Hw_Init/0 DevAssert/29 DevAssert/29 DevAssert/29 DevAssert/29 DevAssert/29 DevAssert/29 DevAssert/29 
Lpuart_Uart_Ip_apBases/33 (Lpuart_Uart_Ip_apBases) @06cd0558
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: Lpuart_Uart_Ip_SyncSend/36 (read)Lpuart_Uart_Ip_SyncReceive/40 (read)Lpuart_Uart_Ip_ErrIrqHandler/53 (read)Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 (read)Lpuart_Uart_Ip_GetData/64 (read)Lpuart_Uart_Ip_TxEmptyIrqHandler/51 (read)Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 (read)Lpuart_Uart_Ip_Init/34 (read)Lpuart_Uart_Ip_StartGetData/41 (read)Lpuart_Uart_Ip_PutData/63 (read)Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 (read)Lpuart_Uart_Ip_Deinit/35 (read)Lpuart_Uart_Ip_SetBaudRate/45 (read)Lpuart_Uart_Ip_StartSendDataUsingInt/54 (read)Lpuart_Uart_Ip_StartSendDataUsingDma/55 (read)Lpuart_Uart_Ip_CompleteSendUsingDma/57 (read)Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 (read)Lpuart_Uart_Ip_AbortSendingData/39 (read)Lpuart_Uart_Ip_SetupIntDmaMode/62 (read)Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 (read)Lpuart_Uart_Ip_AbortReceivingData/44 (read)Lpuart_Uart_Ip_IrqHandler/49 (read)
  Availability: available
  Varpool flags: initialized read-only const-value-known
Lpuart_Uart_Ip_apUserConfig/32 (Lpuart_Uart_Ip_apUserConfig) @06cd04c8
  Type: variable definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: Lpuart_Uart_Ip_PutData/63 (read)Lpuart_Uart_Ip_GetReceiveStatus/43 (read)Lpuart_Uart_Ip_GetData/64 (read)Lpuart_Uart_Ip_TxCompleteIrqHandler/52 (read)Lpuart_Uart_Ip_AbortSendingData/39 (read)Lpuart_Uart_Ip_Init/34 (write)Lpuart_Uart_Ip_AsyncReceive/42 (read)Lpuart_Uart_Ip_TxEmptyIrqHandler/51 (read)Lpuart_Uart_Ip_ErrIrqHandler/53 (read)Lpuart_Uart_Ip_StartSendDataUsingDma/55 (read)Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 (read)Lpuart_Uart_Ip_GetTransmitStatus/38 (read)Lpuart_Uart_Ip_AsyncSend/37 (read)Lpuart_Uart_Ip_CompleteSendUsingDma/57 (read)Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 (read)Lpuart_Uart_Ip_AbortReceivingData/44 (read)Lpuart_Uart_Ip_RxIrqHandler/50 (read)
  Availability: available
  Varpool flags:
Lpuart_Uart_Ip_apStateStructuresArray/31 (Lpuart_Uart_Ip_apStateStructuresArray) @06cd0438
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 (read)Lpuart_Uart_Ip_AbortReceivingData/44 (read)Lpuart_Uart_Ip_SyncSend/36 (read)Lpuart_Uart_Ip_Init/34 (write)Lpuart_Uart_Ip_RxIrqHandler/50 (read)Lpuart_Uart_Ip_ErrIrqHandler/53 (read)Lpuart_Uart_Ip_StartSendDataUsingInt/54 (read)Lpuart_Uart_Ip_Init/34 (read)Lpuart_Uart_Ip_TxCompleteIrqHandler/52 (read)Lpuart_Uart_Ip_GetData/64 (read)Lpuart_Uart_Ip_TxEmptyIrqHandler/51 (read)Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 (read)Lpuart_Uart_Ip_Deinit/35 (write)Lpuart_Uart_Ip_AsyncReceive/42 (read)Lpuart_Uart_Ip_GetTransmitStatus/38 (read)Lpuart_Uart_Ip_GetReceiveStatus/43 (read)Lpuart_Uart_Ip_SetBaudRate/45 (read)Lpuart_Uart_Ip_GetBaudRate/46 (read)Lpuart_Uart_Ip_SyncReceive/40 (read)Lpuart_Uart_Ip_StartGetData/41 (read)Lpuart_Uart_Ip_PutData/63 (read)Lpuart_Uart_Ip_AsyncSend/37 (read)Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 (read)Lpuart_Uart_Ip_SetTxBuffer/47 (read)Lpuart_Uart_Ip_SetRxBuffer/48 (read)Lpuart_Uart_Ip_StartSendDataUsingDma/55 (read)Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 (read)Lpuart_Uart_Ip_CompleteSendUsingDma/57 (read)Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 (read)Lpuart_Uart_Ip_AbortSendingData/39 (read)Lpuart_Uart_Ip_Init/34 (read)Lpuart_Uart_Ip_Deinit/35 (read)Lpuart_Uart_Ip_IrqHandler/49 (read)
  Availability: available
  Varpool flags:
Lpuart_Uart_Ip_apStateStructure/30 (Lpuart_Uart_Ip_apStateStructure) @06cd03a8
  Type: variable definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Varpool flags:
DevAssert/29 (DevAssert) @06cccee0
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_IrqHandler/49 Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_AbortReceivingData/44 Lpuart_Uart_Ip_AbortReceivingData/44 Lpuart_Uart_Ip_AbortReceivingData/44 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_AsyncReceive/42 Lpuart_Uart_Ip_AsyncReceive/42 Lpuart_Uart_Ip_AsyncReceive/42 Lpuart_Uart_Ip_AsyncReceive/42 Lpuart_Uart_Ip_AsyncReceive/42 Lpuart_Uart_Ip_AsyncReceive/42 Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 Lpuart_Uart_Ip_AbortSendingData/39 Lpuart_Uart_Ip_AbortSendingData/39 Lpuart_Uart_Ip_AbortSendingData/39 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_AsyncSend/37 Lpuart_Uart_Ip_AsyncSend/37 Lpuart_Uart_Ip_AsyncSend/37 Lpuart_Uart_Ip_AsyncSend/37 Lpuart_Uart_Ip_AsyncSend/37 Lpuart_Uart_Ip_AsyncSend/37 Lpuart_Uart_Ip_StartSendDataUsingDma/55 Lpuart_Uart_Ip_StartSendDataUsingDma/55 Lpuart_Uart_Ip_SetRxBuffer/48 Lpuart_Uart_Ip_SetRxBuffer/48 Lpuart_Uart_Ip_SetRxBuffer/48 Lpuart_Uart_Ip_SetTxBuffer/47 Lpuart_Uart_Ip_SetTxBuffer/47 Lpuart_Uart_Ip_SetTxBuffer/47 Lpuart_Uart_Ip_GetBaudRate/46 Lpuart_Uart_Ip_GetBaudRate/46 Lpuart_Uart_Ip_SetBaudRate/45 Lpuart_Uart_Ip_SetBaudRate/45 Lpuart_Uart_Ip_SetBaudRate/45 Lpuart_Uart_Ip_SetBaudRate/45 Lpuart_Uart_Ip_GetReceiveStatus/43 Lpuart_Uart_Ip_GetReceiveStatus/43 Lpuart_Uart_Ip_GetReceiveStatus/43 Lpuart_Uart_Ip_GetTransmitStatus/38 Lpuart_Uart_Ip_GetTransmitStatus/38 Lpuart_Uart_Ip_GetTransmitStatus/38 Lpuart_Uart_Ip_Deinit/35 Lpuart_Uart_Ip_Deinit/35 Lpuart_Uart_Ip_Init/34 Lpuart_Uart_Ip_Init/34 Lpuart_Uart_Ip_Init/34 Lpuart_Uart_Ip_Init/34 Lpuart_Uart_Ip_Init/34 Lpuart_Uart_Ip_Init/34 Lpuart_Uart_Ip_Init/34 
  Calls: 
Lpuart_Uart_Ip_FlushRxBuffer/28 (Lpuart_Uart_Ip_FlushRxBuffer) @06b7e2a0
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_AbortReceivingData/44 Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 
  Calls: 
Lpuart_Uart_Ip_FlushTxBuffer/27 (Lpuart_Uart_Ip_FlushTxBuffer) @06b7e000
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_AbortSendingData/39 
  Calls: 
Lpuart_Uart_Ip_CheckTimeout/26 (Lpuart_Uart_Ip_CheckTimeout) @06b78d20
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_StartGetData/41 Lpuart_Uart_Ip_StartGetData/41 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 Lpuart_Uart_Ip_Deinit/35 
  Calls: OsIf_GetElapsed/67 
Lpuart_Uart_Ip_StartTimeout/25 (Lpuart_Uart_Ip_StartTimeout) @06b78a80
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 Lpuart_Uart_Ip_Deinit/35 
  Calls: OsIf_MicrosToTicks/66 OsIf_GetCounter/65 
Lpuart_Uart_Ip_ClearErrorFlags/24 (Lpuart_Uart_Ip_ClearErrorFlags) @06b787e0
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_IrqHandler/49 Lpuart_Uart_Ip_AbortReceivingData/44 Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 
  Calls: 
Lpuart_Uart_Ip_ClearStatusFlagWithMask/23 (Lpuart_Uart_Ip_ClearStatusFlagWithMask) @06b78540
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_StartGetData/41 
  Calls: 
Lpuart_Uart_Ip_ClearStatusFlag/22 (Lpuart_Uart_Ip_ClearStatusFlag) @06b782a0
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_ErrIrqHandler/53 
  Calls: 
Lpuart_Uart_Ip_GetStatusFlag/21 (Lpuart_Uart_Ip_GetStatusFlag) @06b78000
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_IrqHandler/49 Lpuart_Uart_Ip_IrqHandler/49 Lpuart_Uart_Ip_IrqHandler/49 Lpuart_Uart_Ip_StartGetData/41 Lpuart_Uart_Ip_StartGetData/41 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 Lpuart_Uart_Ip_Deinit/35 
  Calls: 
Lpuart_Uart_Ip_Getchar10/20 (Lpuart_Uart_Ip_Getchar10) @06b71d20
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_GetData/64 
  Calls: 
Lpuart_Uart_Ip_Getchar9/19 (Lpuart_Uart_Ip_Getchar9) @06b71a80
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_GetData/64 
  Calls: 
Lpuart_Uart_Ip_Getchar/18 (Lpuart_Uart_Ip_Getchar) @06b717e0
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_IrqHandler/49 Lpuart_Uart_Ip_IrqHandler/49 Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_GetData/64 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 
  Calls: 
Lpuart_Uart_Ip_Putchar10/17 (Lpuart_Uart_Ip_Putchar10) @06b71540
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_PutData/63 
  Calls: 
Lpuart_Uart_Ip_Putchar9/16 (Lpuart_Uart_Ip_Putchar9) @06b712a0
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_PutData/63 
  Calls: 
Lpuart_Uart_Ip_Putchar/15 (Lpuart_Uart_Ip_Putchar) @06b71000
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_PutData/63 
  Calls: 
Lpuart_Uart_Ip_SetRxDmaCmd/14 (Lpuart_Uart_Ip_SetRxDmaCmd) @06b6cd20
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_SetupIntDmaMode/62 
  Calls: 
Lpuart_Uart_Ip_SetTxDmaCmd/13 (Lpuart_Uart_Ip_SetTxDmaCmd) @06b6ca80
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_StartSendDataUsingDma/55 
  Calls: 
Lpuart_Uart_Ip_GetIntMode/12 (Lpuart_Uart_Ip_GetIntMode) @06b6c7e0
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_IrqHandler/49 Lpuart_Uart_Ip_IrqHandler/49 Lpuart_Uart_Ip_IrqHandler/49 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_ErrIrqHandler/53 Lpuart_Uart_Ip_ErrIrqHandler/53 
  Calls: 
Lpuart_Uart_Ip_SetIntMode/11 (Lpuart_Uart_Ip_SetIntMode) @06b6c540
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_TxEmptyIrqHandler/51 Lpuart_Uart_Ip_TxEmptyIrqHandler/51 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_SetupIntDmaMode/62 Lpuart_Uart_Ip_SetupIntDmaMode/62 Lpuart_Uart_Ip_SetupIntDmaMode/62 Lpuart_Uart_Ip_SetupIntDmaMode/62 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 Lpuart_Uart_Ip_StartSendDataUsingInt/54 Lpuart_Uart_Ip_Deinit/35 Lpuart_Uart_Ip_Deinit/35 Lpuart_Uart_Ip_Deinit/35 Lpuart_Uart_Ip_Deinit/35 Lpuart_Uart_Ip_Deinit/35 Lpuart_Uart_Ip_Deinit/35 Lpuart_Uart_Ip_Deinit/35 
  Calls: 
Lpuart_Uart_Ip_SetStopBitCount/10 (Lpuart_Uart_Ip_SetStopBitCount) @06b6c2a0
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_Init/34 
  Calls: 
Lpuart_Uart_Ip_SetParityMode/9 (Lpuart_Uart_Ip_SetParityMode) @06b6c000
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_Init/34 
  Calls: 
Lpuart_Uart_Ip_SetBitCountPerChar/8 (Lpuart_Uart_Ip_SetBitCountPerChar) @06b67d20
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_Init/34 Lpuart_Uart_Ip_Init/34 
  Calls: 
Lpuart_Uart_Ip_EnableBothEdgeSamplingCmd/7 (Lpuart_Uart_Ip_EnableBothEdgeSamplingCmd) @06b67a80
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_SetBaudRate/45 Lpuart_Uart_Ip_Init/34 
  Calls: 
Lpuart_Uart_Ip_SetOversamplingRatio/5 (Lpuart_Uart_Ip_SetOversamplingRatio) @06b67540
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_SetBaudRate/45 Lpuart_Uart_Ip_Init/34 
  Calls: 
Lpuart_Uart_Ip_SetBaudRateDivisor/3 (Lpuart_Uart_Ip_SetBaudRateDivisor) @06ac0ee0
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_SetBaudRate/45 Lpuart_Uart_Ip_Init/34 
  Calls: 
Lpuart_Uart_Ip_SetReceiverCmd/2 (Lpuart_Uart_Ip_SetReceiverCmd) @06ac0c40
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_SyncReceive/40 Lpuart_Uart_Ip_StartGetData/41 Lpuart_Uart_Ip_CompleteReceiveUsingDma/61 Lpuart_Uart_Ip_StartReceiveDataUsingDma/59 Lpuart_Uart_Ip_CompleteReceiveDataUsingInt/60 Lpuart_Uart_Ip_StartReceiveDataUsingInt/58 
  Calls: 
Lpuart_Uart_Ip_SetTransmitterCmd/1 (Lpuart_Uart_Ip_SetTransmitterCmd) @06ac09a0
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_SyncSend/36 Lpuart_Uart_Ip_CompleteSendUsingDma/57 Lpuart_Uart_Ip_CompleteSendDataUsingInt/56 Lpuart_Uart_Ip_StartSendDataUsingDma/55 Lpuart_Uart_Ip_StartSendDataUsingInt/54 
  Calls: 
Lpuart_Uart_Ip_Hw_Init/0 (Lpuart_Uart_Ip_Hw_Init) @06ac0700
  Type: function definition analyzed
  Visibility: no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local
  Called by: Lpuart_Uart_Ip_Init/34 
  Calls: 
Lpuart_Uart_Ip_GetData (const uint8 Instance)
{
  uint16 Data16b;
  const struct LPUART_Type * Base;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  int _1;
  int _2;
  int _3;
  <unnamed type> _4;
  <unnamed type> _5;
  uint8 * _6;
  unsigned char _7;
  <unnamed type> _8;
  uint8 * _9;
  unsigned char _10;
  uint8 * _11;
  unsigned char _12;
  uint8 * _13;
  uint8 * _14;
  long unsigned int _15;
  long unsigned int _16;
  <unnamed type> _17;
  long unsigned int _18;
  uint8 * _19;
  unsigned char _20;
  uint8 * _21;
  uint8 * _22;
  long unsigned int _23;
  long unsigned int _24;
  uint8 * _25;
  unsigned char _26;
  uint8 * _27;
  uint8 * _28;
  short unsigned int _29;
  uint8 * _30;
  unsigned char _31;
  uint8 * _32;
  uint8 * _33;
  long unsigned int _34;
  long unsigned int _35;

  <bb 2> :
  _1 = (int) Instance_40(D);
  Base_42 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_40(D);
  UartState_43 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 = (int) Instance_40(D);
  UartUserCfg_44 = Lpuart_Uart_Ip_apUserConfig[_3];
  _4 = UartUserCfg_44->BitCountPerChar;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 3>; [INV]

  <bb 3> :
  _5 = UartUserCfg_44->BitCountPerChar;
  if (_5 == 1)
    goto <bb 4>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 4> :
  _6 = UartState_43->RxBuff;
  _7 = Lpuart_Uart_Ip_Getchar (Base_42);
  *_6 = _7;
  _8 = UartUserCfg_44->BitCountPerChar;
  if (_8 == 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  _9 = UartState_43->RxBuff;
  _10 = *_9;
  _11 = UartState_43->RxBuff;
  _12 = _10 & 127;
  *_11 = _12;

  <bb 6> :
  _13 = UartState_43->RxBuff;
  _14 = _13 + 1;
  UartState_43->RxBuff = _14;
  _15 ={v} UartState_43->RxSize;
  _16 = _15 + 4294967295;
  UartState_43->RxSize ={v} _16;
  goto <bb 13>; [INV]

  <bb 7> :
  _17 = UartUserCfg_44->BitCountPerChar;
  if (_17 == 2)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  Data16b_48 = Lpuart_Uart_Ip_Getchar9 (Base_42);
  goto <bb 10>; [INV]

  <bb 9> :
  Data16b_46 = Lpuart_Uart_Ip_Getchar10 (Base_42);

  <bb 10> :
  # Data16b_36 = PHI <Data16b_48(8), Data16b_46(9)>
  _18 ={v} UartState_43->RxSize;
  if (_18 == 1)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  _19 = UartState_43->RxBuff;
  _20 = (unsigned char) Data16b_36;
  *_19 = _20;
  _21 = UartState_43->RxBuff;
  _22 = _21 + 1;
  UartState_43->RxBuff = _22;
  _23 ={v} UartState_43->RxSize;
  _24 = _23 + 4294967295;
  UartState_43->RxSize ={v} _24;
  goto <bb 13>; [INV]

  <bb 12> :
  _25 = UartState_43->RxBuff;
  _26 = (unsigned char) Data16b_36;
  *_25 = _26;
  _27 = UartState_43->RxBuff;
  _28 = _27 + 1;
  UartState_43->RxBuff = _28;
  _29 = Data16b_36 >> 8;
  _30 = UartState_43->RxBuff;
  _31 = (unsigned char) _29;
  *_30 = _31;
  _32 = UartState_43->RxBuff;
  _33 = _32 + 1;
  UartState_43->RxBuff = _33;
  _34 ={v} UartState_43->RxSize;
  _35 = _34 + 4294967294;
  UartState_43->RxSize ={v} _35;

  <bb 13> :
  return;

}


Lpuart_Uart_Ip_PutData (const uint8 Instance)
{
  uint8 Data8b;
  uint16 Data16b;
  struct LPUART_Type * Base;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  int _1;
  int _2;
  int _3;
  <unnamed type> _4;
  <unnamed type> _5;
  const uint8 * _6;
  const uint8 * _7;
  const uint8 * _8;
  long unsigned int _9;
  long unsigned int _10;
  const uint8 * _11;
  unsigned char _12;
  long unsigned int _13;
  const uint8 * _14;
  const uint8 * _15;
  long unsigned int _16;
  long unsigned int _17;
  const uint8 * _18;
  const uint8 * _19;
  const uint8 * _20;
  unsigned char _21;
  short unsigned int _22;
  short unsigned int _23;
  const uint8 * _24;
  const uint8 * _25;
  long unsigned int _26;
  long unsigned int _27;
  <unnamed type> _28;

  <bb 2> :
  _1 = (int) Instance_32(D);
  Base_34 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_32(D);
  UartState_35 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 = (int) Instance_32(D);
  UartUserCfg_36 = Lpuart_Uart_Ip_apUserConfig[_3];
  _4 = UartUserCfg_36->BitCountPerChar;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 3>; [INV]

  <bb 3> :
  _5 = UartUserCfg_36->BitCountPerChar;
  if (_5 == 1)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  _6 = UartState_35->TxBuff;
  Data8b_46 = *_6;
  _7 = UartState_35->TxBuff;
  _8 = _7 + 1;
  UartState_35->TxBuff = _8;
  _9 ={v} UartState_35->TxSize;
  _10 = _9 + 4294967295;
  UartState_35->TxSize ={v} _10;
  Lpuart_Uart_Ip_Putchar (Base_34, Data8b_46);
  goto <bb 11>; [INV]

  <bb 5> :
  _11 = UartState_35->TxBuff;
  _12 = *_11;
  Data16b_37 = (uint16) _12;
  _13 ={v} UartState_35->TxSize;
  if (_13 == 1)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  _14 = UartState_35->TxBuff;
  _15 = _14 + 1;
  UartState_35->TxBuff = _15;
  _16 ={v} UartState_35->TxSize;
  _17 = _16 + 4294967295;
  UartState_35->TxSize ={v} _17;
  goto <bb 8>; [INV]

  <bb 7> :
  _18 = UartState_35->TxBuff;
  _19 = _18 + 1;
  UartState_35->TxBuff = _19;
  _20 = UartState_35->TxBuff;
  _21 = *_20;
  _22 = (short unsigned int) _21;
  _23 = _22 << 8;
  Data16b_39 = Data16b_37 | _23;
  _24 = UartState_35->TxBuff;
  _25 = _24 + 1;
  UartState_35->TxBuff = _25;
  _26 ={v} UartState_35->TxSize;
  _27 = _26 + 4294967294;
  UartState_35->TxSize ={v} _27;

  <bb 8> :
  # Data16b_29 = PHI <Data16b_37(6), Data16b_39(7)>
  _28 = UartUserCfg_36->BitCountPerChar;
  if (_28 == 2)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  Lpuart_Uart_Ip_Putchar9 (Base_34, Data16b_29);
  goto <bb 11>; [INV]

  <bb 10> :
  Lpuart_Uart_Ip_Putchar10 (Base_34, Data16b_29);

  <bb 11> :
  return;

}


Lpuart_Uart_Ip_SetupIntDmaMode (const uint8 Instance, boolean Enable)
{
  struct LPUART_Type * Base;
  int _1;

  <bb 2> :
  _1 = (int) Instance_2(D);
  Base_4 = Lpuart_Uart_Ip_apBases[_1];
  Lpuart_Uart_Ip_SetIntMode (Base_4, 27, Enable_5(D));
  Lpuart_Uart_Ip_SetIntMode (Base_4, 24, Enable_5(D));
  Lpuart_Uart_Ip_SetIntMode (Base_4, 26, Enable_5(D));
  Lpuart_Uart_Ip_SetIntMode (Base_4, 25, Enable_5(D));
  Lpuart_Uart_Ip_SetRxDmaCmd (Base_4, Enable_5(D));
  return;

}


Lpuart_Uart_Ip_CompleteReceiveUsingDma (uint8 Instance)
{
  uint32 ElapsedTicks;
  uint32 TimeoutTicks;
  uint32 StartTime;
  struct Dma_Ip_LogicChannelStatusType DmaStatus;
  Dma_Ip_ReturnType DmaReturnStatus;
  struct Dma_Ip_LogicChannelTransferListType DmaTransferList[10];
  struct LPUART_Type * Base;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  int _1;
  int _2;
  int _3;
  long unsigned int _4;
  <unnamed type> _5;
  long unsigned int _6;
  _Bool _7;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _8;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _9;
  void * _10;
  <unnamed type> _11;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _12;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _13;
  void * _14;
  long unsigned int _15;
  <unnamed type> _16;
  uint8 * _17;
  long unsigned int _18;
  long unsigned int _19;
  long unsigned int _20;
  _Bool _21;
  long unsigned int _22;
  _Bool _23;
  <unnamed type> _24;
  _Bool _25;
  _Bool _26;
  long unsigned int TimeoutTicks.26_27;
  _Bool _28;
  _Bool _29;
  long unsigned int TimeoutTicks.27_30;
  _Bool _31;
  <unnamed type> _32;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _33;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _34;
  void * _35;

  <bb 2> :
  ElapsedTicks = 0;
  _1 = (int) Instance_44(D);
  Base_45 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_44(D);
  UartState_46 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 = (int) Instance_44(D);
  UartUserCfg_47 = Lpuart_Uart_Ip_apUserConfig[_3];
  _4 = UartUserCfg_47->RxDMAChannel;
  Dma_Ip_GetLogicChannelStatus (_4, &DmaStatus);
  _5 = DmaStatus.ChStateValue;
  if (_5 == 4)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = UartUserCfg_47->RxDMAChannel;
  DmaReturnStatus_50 = Dma_Ip_SetLogicChannelCommand (_6, 4);
  _7 = DmaReturnStatus_50 == 0;
  DevAssert (_7);
  UartState_46->ReceiveStatus ={v} 1;
  _8 = UartUserCfg_47->Callback;
  if (_8 != 0B)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  _9 = UartUserCfg_47->Callback;
  _10 = UartUserCfg_47->CallbackParam;
  _9 (Instance_44(D), 3, _10);

  <bb 5> :
  _11 ={v} UartState_46->ReceiveStatus;
  if (_11 == 2)
    goto <bb 6>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 6> :
  _12 = UartUserCfg_47->Callback;
  if (_12 != 0B)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  _13 = UartUserCfg_47->Callback;
  _14 = UartUserCfg_47->CallbackParam;
  _13 (Instance_44(D), 0, _14);

  <bb 8> :
  _15 ={v} UartState_46->RxSize;
  if (_15 != 0)
    goto <bb 9>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 9> :
  _16 ={v} UartState_46->ReceiveStatus;
  if (_16 != 1)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  DmaTransferList[0].Param = 5;
  _17 = UartState_46->RxBuff;
  _18 = (long unsigned int) _17;
  DmaTransferList[0].Value = _18;
  DmaTransferList[1].Param = 18;
  _19 ={v} UartState_46->RxSize;
  DmaTransferList[1].Value = _19;
  _20 = UartUserCfg_47->RxDMAChannel;
  DmaReturnStatus_60 = Dma_Ip_SetLogicChannelTransferList (_20, &DmaTransferList, 2);
  _21 = DmaReturnStatus_60 == 0;
  DevAssert (_21);
  UartState_46->RxSize ={v} 0;
  _22 = UartUserCfg_47->RxDMAChannel;
  DmaReturnStatus_64 = Dma_Ip_SetLogicChannelCommand (_22, 0);
  _23 = DmaReturnStatus_64 == 0;
  DevAssert (_23);
  goto <bb 20>; [INV]

  <bb 11> :
  Lpuart_Uart_Ip_SetupIntDmaMode (Instance_44(D), 0);
  _24 ={v} UartState_46->ReceiveStatus;
  if (_24 == 6)
    goto <bb 12>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 12> :
  Lpuart_Uart_Ip_StartTimeout (&StartTime, &TimeoutTicks, 500000, 0);

  <bb 13> :
  _25 = Lpuart_Uart_Ip_GetStatusFlag (Base_45, 21);
  _26 = ~_25;
  if (_26 != 0)
    goto <bb 14>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 14> :
  TimeoutTicks.26_27 = TimeoutTicks;
  _28 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.26_27, 0);
  _29 = ~_28;
  if (_29 != 0)
    goto <bb 13>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 15> :
  TimeoutTicks.27_30 = TimeoutTicks;
  _31 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.27_30, 0);
  if (_31 != 0)
    goto <bb 16>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 16> :
  UartState_46->ReceiveStatus ={v} 1;

  <bb 17> :
  Lpuart_Uart_Ip_SetReceiverCmd (Base_45, 0);
  Lpuart_Uart_Ip_Getchar (Base_45);
  UartState_46->IsRxBusy ={v} 0;
  _32 ={v} UartState_46->ReceiveStatus;
  if (_32 == 2)
    goto <bb 18>; [INV]
  else
    goto <bb 20>; [INV]

  <bb 18> :
  UartState_46->ReceiveStatus ={v} 0;
  _33 = UartUserCfg_47->Callback;
  if (_33 != 0B)
    goto <bb 19>; [INV]
  else
    goto <bb 20>; [INV]

  <bb 19> :
  _34 = UartUserCfg_47->Callback;
  _35 = UartUserCfg_47->CallbackParam;
  _34 (Instance_44(D), 2, _35);

  <bb 20> :
  DmaTransferList ={v} {CLOBBER};
  DmaStatus ={v} {CLOBBER};
  StartTime ={v} {CLOBBER};
  TimeoutTicks ={v} {CLOBBER};
  ElapsedTicks ={v} {CLOBBER};
  return;

}


Lpuart_Uart_Ip_CompleteReceiveDataUsingInt (const uint8 Instance)
{
  uint32 ElapsedTicks;
  uint32 TimeoutTicks;
  uint32 StartTime;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  struct LPUART_Type * Base;
  int _1;
  int _2;
  <unnamed type> _3;
  _Bool _4;
  _Bool _5;
  long unsigned int TimeoutTicks.24_6;
  _Bool _7;
  _Bool _8;
  long unsigned int TimeoutTicks.25_9;
  _Bool _10;
  <unnamed type> _11;

  <bb 2> :
  ElapsedTicks = 0;
  _1 = (int) Instance_18(D);
  Base_19 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_18(D);
  UartState_20 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  Lpuart_Uart_Ip_SetIntMode (Base_19, 27, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_19, 24, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_19, 26, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_19, 25, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_19, 21, 0);
  _3 ={v} UartState_20->ReceiveStatus;
  if (_3 == 6)
    goto <bb 3>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 3> :
  Lpuart_Uart_Ip_StartTimeout (&StartTime, &TimeoutTicks, 500000, 0);

  <bb 4> :
  _4 = Lpuart_Uart_Ip_GetStatusFlag (Base_19, 21);
  _5 = ~_4;
  if (_5 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  TimeoutTicks.24_6 = TimeoutTicks;
  _7 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.24_6, 0);
  _8 = ~_7;
  if (_8 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  TimeoutTicks.25_9 = TimeoutTicks;
  _10 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.25_9, 0);
  if (_10 != 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  UartState_20->ReceiveStatus ={v} 1;

  <bb 8> :
  Lpuart_Uart_Ip_SetReceiverCmd (Base_19, 0);
  Lpuart_Uart_Ip_Getchar (Base_19);
  UartState_20->IsRxBusy ={v} 0;
  _11 ={v} UartState_20->ReceiveStatus;
  if (_11 == 2)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  UartState_20->ReceiveStatus ={v} 0;

  <bb 10> :
  StartTime ={v} {CLOBBER};
  TimeoutTicks ={v} {CLOBBER};
  ElapsedTicks ={v} {CLOBBER};
  return;

}


Lpuart_Uart_Ip_StartReceiveDataUsingDma (const uint8 Instance, uint8 * RxBuff, const uint32 RxSize)
{
  Dma_Ip_ReturnType DmaReturnStatus;
  struct Dma_Ip_LogicChannelTransferListType DmaTransferList[10];
  struct LPUART_Type * Base;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  Lpuart_Uart_Ip_StatusType D.6930;
  int _1;
  int _2;
  int _3;
  volatile uint32_t * _4;
  long unsigned int _5;
  long unsigned int RxBuff.23_6;
  long unsigned int _7;
  _Bool _8;
  long unsigned int _9;
  _Bool _10;
  Lpuart_Uart_Ip_StatusType _52;

  <bb 2> :
  _1 = (int) Instance_11(D);
  Base_13 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_11(D);
  UartState_14 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 = (int) Instance_11(D);
  UartUserCfg_15 = Lpuart_Uart_Ip_apUserConfig[_3];
  Lpuart_Uart_Ip_ClearErrorFlags (Base_13);
  Lpuart_Uart_Ip_FlushRxBuffer (Base_13);
  DmaTransferList[0].Param = 0;
  _4 = &Base_13->DATA;
  _5 = (long unsigned int) _4;
  DmaTransferList[0].Value = _5;
  DmaTransferList[1].Param = 5;
  RxBuff.23_6 = (long unsigned int) RxBuff_21(D);
  DmaTransferList[1].Value = RxBuff.23_6;
  DmaTransferList[2].Param = 1;
  DmaTransferList[2].Value = 0;
  DmaTransferList[3].Param = 6;
  DmaTransferList[3].Value = 1;
  DmaTransferList[4].Param = 18;
  DmaTransferList[4].Value = RxSize_28(D);
  DmaTransferList[5].Param = 15;
  DmaTransferList[5].Value = 1;
  DmaTransferList[6].Param = 8;
  DmaTransferList[6].Value = 0;
  DmaTransferList[7].Param = 3;
  DmaTransferList[7].Value = 0;
  DmaTransferList[8].Param = 21;
  DmaTransferList[8].Value = 1;
  DmaTransferList[9].Param = 23;
  DmaTransferList[9].Value = 1;
  UartState_14->RxBuff = RxBuff_21(D);
  UartState_14->RxSize ={v} 0;
  UartState_14->IsRxBusy ={v} 1;
  UartState_14->ReceiveStatus ={v} 2;
  _7 = UartUserCfg_15->RxDMAChannel;
  DmaReturnStatus_45 = Dma_Ip_SetLogicChannelTransferList (_7, &DmaTransferList, 10);
  _8 = DmaReturnStatus_45 == 0;
  DevAssert (_8);
  _9 = UartUserCfg_15->RxDMAChannel;
  DmaReturnStatus_48 = Dma_Ip_SetLogicChannelCommand (_9, 0);
  _10 = DmaReturnStatus_48 == 0;
  DevAssert (_10);
  Lpuart_Uart_Ip_SetReceiverCmd (Base_13, 1);
  Lpuart_Uart_Ip_SetupIntDmaMode (Instance_11(D), 1);
  _52 = 0;
  DmaTransferList ={v} {CLOBBER};

  <bb 3> :
<L1>:
  return _52;

}


Lpuart_Uart_Ip_StartReceiveDataUsingInt (const uint8 Instance, uint8 * RxBuff, const uint32 RxSize)
{
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  struct LPUART_Type * Base;
  Lpuart_Uart_Ip_StatusType D.6928;
  int _1;
  int _2;
  Lpuart_Uart_Ip_StatusType _21;

  <bb 2> :
  _1 = (int) Instance_3(D);
  Base_5 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_3(D);
  UartState_6 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  UartState_6->IsRxBusy ={v} 1;
  UartState_6->RxBuff = RxBuff_8(D);
  UartState_6->RxSize ={v} RxSize_10(D);
  UartState_6->ReceiveStatus ={v} 2;
  Lpuart_Uart_Ip_ClearErrorFlags (Base_5);
  Lpuart_Uart_Ip_FlushRxBuffer (Base_5);
  Lpuart_Uart_Ip_SetReceiverCmd (Base_5, 1);
  Lpuart_Uart_Ip_SetIntMode (Base_5, 27, 1);
  Lpuart_Uart_Ip_SetIntMode (Base_5, 24, 1);
  Lpuart_Uart_Ip_SetIntMode (Base_5, 26, 1);
  Lpuart_Uart_Ip_SetIntMode (Base_5, 25, 1);
  Lpuart_Uart_Ip_SetIntMode (Base_5, 21, 1);
  _21 = 0;

  <bb 3> :
<L0>:
  return _21;

}


Lpuart_Uart_Ip_CompleteSendUsingDma (uint8 Instance)
{
  uint32 ElapsedTicks;
  uint32 TimeoutTicks;
  uint32 StartTime;
  struct Dma_Ip_LogicChannelStatusType DmaStatus;
  Dma_Ip_ReturnType DmaReturnStatus;
  struct Dma_Ip_LogicChannelTransferListType DmaTransferList[10];
  struct LPUART_Type * Base;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  int _1;
  int _2;
  int _3;
  long unsigned int _4;
  <unnamed type> _5;
  long unsigned int _6;
  _Bool _7;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _8;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _9;
  void * _10;
  <unnamed type> _11;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _12;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _13;
  void * _14;
  long unsigned int _15;
  <unnamed type> _16;
  const uint8 * _17;
  long unsigned int _18;
  long unsigned int _19;
  long unsigned int _20;
  _Bool _21;
  long unsigned int _22;
  _Bool _23;
  _Bool _24;
  _Bool _25;
  long unsigned int TimeoutTicks.21_26;
  _Bool _27;
  _Bool _28;
  long unsigned int TimeoutTicks.22_29;
  _Bool _30;
  <unnamed type> _31;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _32;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _33;
  void * _34;

  <bb 2> :
  ElapsedTicks = 0;
  _1 = (int) Instance_44(D);
  Base_45 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_44(D);
  UartState_46 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 = (int) Instance_44(D);
  UartUserCfg_47 = Lpuart_Uart_Ip_apUserConfig[_3];
  _4 = UartUserCfg_47->TxDMAChannel;
  Dma_Ip_GetLogicChannelStatus (_4, &DmaStatus);
  _5 = DmaStatus.ChStateValue;
  if (_5 == 4)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = UartUserCfg_47->TxDMAChannel;
  DmaReturnStatus_50 = Dma_Ip_SetLogicChannelCommand (_6, 4);
  _7 = DmaReturnStatus_50 == 0;
  DevAssert (_7);
  UartState_46->TransmitStatus ={v} 1;
  _8 = UartUserCfg_47->Callback;
  if (_8 != 0B)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  _9 = UartUserCfg_47->Callback;
  _10 = UartUserCfg_47->CallbackParam;
  _9 (Instance_44(D), 3, _10);

  <bb 5> :
  _11 ={v} UartState_46->TransmitStatus;
  if (_11 == 2)
    goto <bb 6>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 6> :
  _12 = UartUserCfg_47->Callback;
  if (_12 != 0B)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  _13 = UartUserCfg_47->Callback;
  _14 = UartUserCfg_47->CallbackParam;
  _13 (Instance_44(D), 1, _14);

  <bb 8> :
  _15 ={v} UartState_46->TxSize;
  if (_15 != 0)
    goto <bb 9>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 9> :
  _16 ={v} UartState_46->TransmitStatus;
  if (_16 != 1)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  DmaTransferList[0].Param = 0;
  _17 = UartState_46->TxBuff;
  _18 = (long unsigned int) _17;
  DmaTransferList[0].Value = _18;
  DmaTransferList[1].Param = 18;
  _19 ={v} UartState_46->TxSize;
  DmaTransferList[1].Value = _19;
  _20 = UartUserCfg_47->TxDMAChannel;
  DmaReturnStatus_60 = Dma_Ip_SetLogicChannelTransferList (_20, &DmaTransferList, 2);
  _21 = DmaReturnStatus_60 == 0;
  DevAssert (_21);
  UartState_46->TxSize ={v} 0;
  _22 = UartUserCfg_47->TxDMAChannel;
  DmaReturnStatus_64 = Dma_Ip_SetLogicChannelCommand (_22, 0);
  _23 = DmaReturnStatus_64 == 0;
  DevAssert (_23);
  goto <bb 20>; [INV]

  <bb 11> :
  Lpuart_Uart_Ip_SetTxDmaCmd (Base_45, 0);
  Lpuart_Uart_Ip_StartTimeout (&StartTime, &TimeoutTicks, 500000, 0);

  <bb 12> :
  _24 = Lpuart_Uart_Ip_GetStatusFlag (Base_45, 22);
  _25 = ~_24;
  if (_25 != 0)
    goto <bb 13>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 13> :
  TimeoutTicks.21_26 = TimeoutTicks;
  _27 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.21_26, 0);
  _28 = ~_27;
  if (_28 != 0)
    goto <bb 12>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 14> :
  TimeoutTicks.22_29 = TimeoutTicks;
  _30 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.22_29, 0);
  if (_30 != 0)
    goto <bb 15>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 15> :
  UartState_46->TransmitStatus ={v} 1;

  <bb 16> :
  Lpuart_Uart_Ip_SetTransmitterCmd (Base_45, 0);
  _31 ={v} UartState_46->TransmitStatus;
  if (_31 == 2)
    goto <bb 17>; [INV]
  else
    goto <bb 19>; [INV]

  <bb 17> :
  UartState_46->TransmitStatus ={v} 0;
  _32 = UartUserCfg_47->Callback;
  if (_32 != 0B)
    goto <bb 18>; [INV]
  else
    goto <bb 19>; [INV]

  <bb 18> :
  _33 = UartUserCfg_47->Callback;
  _34 = UartUserCfg_47->CallbackParam;
  _33 (Instance_44(D), 2, _34);

  <bb 19> :
  UartState_46->IsTxBusy ={v} 0;

  <bb 20> :
  DmaTransferList ={v} {CLOBBER};
  DmaStatus ={v} {CLOBBER};
  StartTime ={v} {CLOBBER};
  TimeoutTicks ={v} {CLOBBER};
  ElapsedTicks ={v} {CLOBBER};
  return;

}


Lpuart_Uart_Ip_CompleteSendDataUsingInt (const uint8 Instance)
{
  uint32 ElapsedTicks;
  uint32 TimeoutTicks;
  uint32 StartTime;
  struct LPUART_Type * Base;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  int _1;
  int _2;
  <unnamed type> _3;
  _Bool _4;
  _Bool _5;
  long unsigned int TimeoutTicks.19_6;
  _Bool _7;
  _Bool _8;
  long unsigned int TimeoutTicks.20_9;
  _Bool _10;
  <unnamed type> _11;

  <bb 2> :
  ElapsedTicks = 0;
  _1 = (int) Instance_19(D);
  Base_20 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_19(D);
  UartState_21 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 ={v} UartState_21->TransmitStatus;
  if (_3 != 2)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  Lpuart_Uart_Ip_SetIntMode (Base_20, 23, 0);

  <bb 4> :
  Lpuart_Uart_Ip_SetIntMode (Base_20, 22, 0);
  Lpuart_Uart_Ip_StartTimeout (&StartTime, &TimeoutTicks, 500000, 0);

  <bb 5> :
  _4 = Lpuart_Uart_Ip_GetStatusFlag (Base_20, 22);
  _5 = ~_4;
  if (_5 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  TimeoutTicks.19_6 = TimeoutTicks;
  _7 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.19_6, 0);
  _8 = ~_7;
  if (_8 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  TimeoutTicks.20_9 = TimeoutTicks;
  _10 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.20_9, 0);
  if (_10 != 0)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  UartState_21->TransmitStatus ={v} 1;

  <bb 9> :
  Lpuart_Uart_Ip_SetTransmitterCmd (Base_20, 0);
  _11 ={v} UartState_21->TransmitStatus;
  if (_11 == 2)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  UartState_21->TransmitStatus ={v} 0;

  <bb 11> :
  UartState_21->IsTxBusy ={v} 0;
  StartTime ={v} {CLOBBER};
  TimeoutTicks ={v} {CLOBBER};
  ElapsedTicks ={v} {CLOBBER};
  return;

}


Lpuart_Uart_Ip_StartSendDataUsingDma (const uint8 Instance, const uint8 * TxBuff, const uint32 TxSize)
{
  Dma_Ip_ReturnType DmaReturnStatus;
  struct Dma_Ip_LogicChannelTransferListType DmaTransferList[10];
  struct LPUART_Type * Base;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  Lpuart_Uart_Ip_StatusType D.6895;
  int _1;
  int _2;
  int _3;
  long unsigned int TxBuff.17_4;
  volatile uint32_t * _5;
  long unsigned int _6;
  long unsigned int _7;
  _Bool _8;
  long unsigned int _9;
  _Bool _10;
  Lpuart_Uart_Ip_StatusType _49;

  <bb 2> :
  _1 = (int) Instance_11(D);
  Base_13 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_11(D);
  UartState_14 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 = (int) Instance_11(D);
  UartUserCfg_15 = Lpuart_Uart_Ip_apUserConfig[_3];
  DmaTransferList[0].Param = 0;
  TxBuff.17_4 = (long unsigned int) TxBuff_17(D);
  DmaTransferList[0].Value = TxBuff.17_4;
  DmaTransferList[1].Param = 5;
  _5 = &Base_13->DATA;
  _6 = (long unsigned int) _5;
  DmaTransferList[1].Value = _6;
  DmaTransferList[2].Param = 1;
  DmaTransferList[2].Value = 1;
  DmaTransferList[3].Param = 6;
  DmaTransferList[3].Value = 0;
  DmaTransferList[4].Param = 18;
  DmaTransferList[4].Value = TxSize_26(D);
  DmaTransferList[5].Param = 15;
  DmaTransferList[5].Value = 1;
  DmaTransferList[6].Param = 8;
  DmaTransferList[6].Value = 0;
  DmaTransferList[7].Param = 3;
  DmaTransferList[7].Value = 0;
  DmaTransferList[8].Param = 21;
  DmaTransferList[8].Value = 1;
  DmaTransferList[9].Param = 23;
  DmaTransferList[9].Value = 1;
  UartState_14->TxBuff = TxBuff_17(D);
  UartState_14->TxSize ={v} 0;
  UartState_14->TransmitStatus ={v} 2;
  _7 = UartUserCfg_15->TxDMAChannel;
  DmaReturnStatus_42 = Dma_Ip_SetLogicChannelTransferList (_7, &DmaTransferList, 10);
  _8 = DmaReturnStatus_42 == 0;
  DevAssert (_8);
  _9 = UartUserCfg_15->TxDMAChannel;
  DmaReturnStatus_45 = Dma_Ip_SetLogicChannelCommand (_9, 0);
  _10 = DmaReturnStatus_45 == 0;
  DevAssert (_10);
  Lpuart_Uart_Ip_SetTransmitterCmd (Base_13, 1);
  Lpuart_Uart_Ip_SetTxDmaCmd (Base_13, 1);
  _49 = 0;
  DmaTransferList ={v} {CLOBBER};

  <bb 3> :
<L1>:
  return _49;

}


Lpuart_Uart_Ip_StartSendDataUsingInt (const uint8 Instance, const uint8 * TxBuff, const uint32 TxSize)
{
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  struct LPUART_Type * Base;
  Lpuart_Uart_Ip_StatusType D.6893;
  int _1;
  int _2;
  Lpuart_Uart_Ip_StatusType _14;

  <bb 2> :
  _1 = (int) Instance_3(D);
  Base_5 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_3(D);
  UartState_6 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  UartState_6->TxBuff = TxBuff_7(D);
  UartState_6->TxSize ={v} TxSize_9(D);
  UartState_6->TransmitStatus ={v} 2;
  Lpuart_Uart_Ip_SetTransmitterCmd (Base_5, 1);
  Lpuart_Uart_Ip_SetIntMode (Base_5, 23, 1);
  _14 = 0;

  <bb 3> :
<L0>:
  return _14;

}


Lpuart_Uart_Ip_ErrIrqHandler (const uint8 Instance)
{
  boolean IsReturn;
  boolean IsError;
  struct LPUART_Type * Base;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  int _1;
  int _2;
  int _3;
  _Bool _4;
  _Bool _5;
  _Bool _6;
  _Bool _7;
  _Bool _8;
  _Bool _9;
  _Bool _10;
  _Bool _11;
  _Bool _12;
  _Bool _13;
  _Bool _14;
  _Bool _15;
  _Bool _16;
  _Bool _17;
  _Bool _18;
  _Bool _19;
  <unnamed type> _20;
  long unsigned int _21;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _22;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _23;
  void * _24;

  <bb 2> :
  IsError_39 = 0;
  IsReturn_40 = 0;
  _1 = (int) Instance_41(D);
  Base_43 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_41(D);
  UartState_44 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 = (int) Instance_41(D);
  UartUserCfg_45 = Lpuart_Uart_Ip_apUserConfig[_3];
  _4 = Lpuart_Uart_Ip_GetStatusFlag (Base_43, 19);
  if (_4 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  Lpuart_Uart_Ip_ClearStatusFlag (Base_43, 19);
  _5 = Lpuart_Uart_Ip_GetIntMode (Base_43, 27);
  _6 = ~_5;
  if (_6 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  IsReturn_51 = 1;
  goto <bb 6>; [INV]

  <bb 5> :
  IsError_49 = 1;
  UartState_44->ReceiveStatus ={v} 5;

  <bb 6> :
  # IsError_25 = PHI <IsError_39(2), IsError_39(4), IsError_49(5)>
  # IsReturn_29 = PHI <IsReturn_40(2), IsReturn_51(4), IsReturn_40(5)>
  _7 = Lpuart_Uart_Ip_GetStatusFlag (Base_43, 17);
  if (_7 != 0)
    goto <bb 7>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 7> :
  _8 = ~IsReturn_29;
  if (_8 != 0)
    goto <bb 8>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 8> :
  Lpuart_Uart_Ip_ClearStatusFlag (Base_43, 17);
  _9 = Lpuart_Uart_Ip_GetIntMode (Base_43, 25);
  _10 = ~_9;
  if (_10 != 0)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  IsReturn_57 = 1;
  goto <bb 11>; [INV]

  <bb 10> :
  IsError_55 = 1;
  UartState_44->ReceiveStatus ={v} 7;

  <bb 11> :
  # IsError_26 = PHI <IsError_25(6), IsError_25(7), IsError_25(9), IsError_55(10)>
  # IsReturn_30 = PHI <IsReturn_29(6), IsReturn_29(7), IsReturn_57(9), IsReturn_29(10)>
  _11 = Lpuart_Uart_Ip_GetStatusFlag (Base_43, 16);
  if (_11 != 0)
    goto <bb 12>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 12> :
  _12 = ~IsReturn_30;
  if (_12 != 0)
    goto <bb 13>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 13> :
  Lpuart_Uart_Ip_ClearStatusFlag (Base_43, 16);
  _13 = Lpuart_Uart_Ip_GetIntMode (Base_43, 24);
  _14 = ~_13;
  if (_14 != 0)
    goto <bb 14>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 14> :
  IsReturn_63 = 1;
  goto <bb 16>; [INV]

  <bb 15> :
  IsError_61 = 1;
  UartState_44->ReceiveStatus ={v} 8;

  <bb 16> :
  # IsError_27 = PHI <IsError_26(11), IsError_26(12), IsError_26(14), IsError_61(15)>
  # IsReturn_31 = PHI <IsReturn_30(11), IsReturn_30(12), IsReturn_63(14), IsReturn_30(15)>
  _15 = Lpuart_Uart_Ip_GetStatusFlag (Base_43, 18);
  if (_15 != 0)
    goto <bb 17>; [INV]
  else
    goto <bb 21>; [INV]

  <bb 17> :
  _16 = ~IsReturn_31;
  if (_16 != 0)
    goto <bb 18>; [INV]
  else
    goto <bb 21>; [INV]

  <bb 18> :
  Lpuart_Uart_Ip_ClearStatusFlag (Base_43, 18);
  _17 = Lpuart_Uart_Ip_GetIntMode (Base_43, 26);
  _18 = ~_17;
  if (_18 != 0)
    goto <bb 19>; [INV]
  else
    goto <bb 20>; [INV]

  <bb 19> :
  IsReturn_69 = 1;
  goto <bb 21>; [INV]

  <bb 20> :
  IsError_67 = 1;
  UartState_44->ReceiveStatus ={v} 9;

  <bb 21> :
  # IsError_28 = PHI <IsError_27(16), IsError_27(17), IsError_27(19), IsError_67(20)>
  # IsReturn_32 = PHI <IsReturn_31(16), IsReturn_31(17), IsReturn_69(19), IsReturn_31(20)>
  _19 = ~IsReturn_32;
  if (_19 != 0)
    goto <bb 22>; [INV]
  else
    goto <bb 28>; [INV]

  <bb 22> :
  if (IsError_28 != 0)
    goto <bb 23>; [INV]
  else
    goto <bb 28>; [INV]

  <bb 23> :
  _20 = UartUserCfg_45->TransferType;
  if (_20 == 1)
    goto <bb 24>; [INV]
  else
    goto <bb 25>; [INV]

  <bb 24> :
  Lpuart_Uart_Ip_CompleteReceiveDataUsingInt (Instance_41(D));
  goto <bb 26>; [INV]

  <bb 25> :
  _21 = UartUserCfg_45->RxDMAChannel;
  Dma_Ip_SetLogicChannelCommand (_21, 1);
  Lpuart_Uart_Ip_CompleteReceiveUsingDma (Instance_41(D));

  <bb 26> :
  _22 = UartUserCfg_45->Callback;
  if (_22 != 0B)
    goto <bb 27>; [INV]
  else
    goto <bb 28>; [INV]

  <bb 27> :
  _23 = UartUserCfg_45->Callback;
  _24 = UartUserCfg_45->CallbackParam;
  _23 (Instance_41(D), 3, _24);

  <bb 28> :
  return;

}


Lpuart_Uart_Ip_TxCompleteIrqHandler (const uint8 Instance)
{
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  const struct Lpuart_Uart_Ip_StateStructureType * UartState;
  int _1;
  int _2;
  long unsigned int _3;
  <unnamed type> _4;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _5;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _6;
  void * _7;

  <bb 2> :
  _1 = (int) Instance_10(D);
  UartState_12 = Lpuart_Uart_Ip_apStateStructuresArray[_1];
  _2 = (int) Instance_10(D);
  UartUserCfg_13 = Lpuart_Uart_Ip_apUserConfig[_2];
  _3 ={v} UartState_12->TxSize;
  if (_3 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 3> :
  _4 = UartUserCfg_13->TransferType;
  if (_4 == 1)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  Lpuart_Uart_Ip_CompleteSendDataUsingInt (Instance_10(D));

  <bb 5> :
  _5 = UartUserCfg_13->Callback;
  if (_5 != 0B)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  _6 = UartUserCfg_13->Callback;
  _7 = UartUserCfg_13->CallbackParam;
  _6 (Instance_10(D), 2, _7);

  <bb 7> :
  return;

}


Lpuart_Uart_Ip_TxEmptyIrqHandler (const uint8 Instance)
{
  struct LPUART_Type * Base;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  const struct Lpuart_Uart_Ip_StateStructureType * UartState;
  int _1;
  int _2;
  int _3;
  long unsigned int _4;
  long unsigned int _5;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _6;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _7;
  void * _8;
  long unsigned int _9;

  <bb 2> :
  _1 = (int) Instance_12(D);
  Base_14 = Lpuart_Uart_Ip_apBases[_1];
  _2 = (int) Instance_12(D);
  UartState_15 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 = (int) Instance_12(D);
  UartUserCfg_16 = Lpuart_Uart_Ip_apUserConfig[_3];
  _4 ={v} UartState_15->TxSize;
  if (_4 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 3> :
  Lpuart_Uart_Ip_PutData (Instance_12(D));
  _5 ={v} UartState_15->TxSize;
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 4> :
  _6 = UartUserCfg_16->Callback;
  if (_6 != 0B)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  _7 = UartUserCfg_16->Callback;
  _8 = UartUserCfg_16->CallbackParam;
  _7 (Instance_12(D), 1, _8);

  <bb 6> :
  _9 ={v} UartState_15->TxSize;
  if (_9 == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  Lpuart_Uart_Ip_SetIntMode (Base_14, 23, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_14, 22, 1);

  <bb 8> :
  return;

}


Lpuart_Uart_Ip_RxIrqHandler (const uint8 Instance)
{
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  const struct Lpuart_Uart_Ip_StateStructureType * UartState;
  int _1;
  int _2;
  long unsigned int _3;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _4;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _5;
  void * _6;
  long unsigned int _7;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _8;
  void (*<T4ed>) (const uint8, const Lpuart_Uart_Ip_EventType, void *) _9;
  void * _10;

  <bb 2> :
  _1 = (int) Instance_13(D);
  UartState_15 = Lpuart_Uart_Ip_apStateStructuresArray[_1];
  _2 = (int) Instance_13(D);
  UartUserCfg_16 = Lpuart_Uart_Ip_apUserConfig[_2];
  Lpuart_Uart_Ip_GetData (Instance_13(D));
  _3 ={v} UartState_15->RxSize;
  if (_3 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _4 = UartUserCfg_16->Callback;
  if (_4 != 0B)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  _5 = UartUserCfg_16->Callback;
  _6 = UartUserCfg_16->CallbackParam;
  _5 (Instance_13(D), 0, _6);

  <bb 5> :
  _7 ={v} UartState_15->RxSize;
  if (_7 == 0)
    goto <bb 6>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 6> :
  Lpuart_Uart_Ip_CompleteReceiveDataUsingInt (Instance_13(D));
  _8 = UartUserCfg_16->Callback;
  if (_8 != 0B)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  _9 = UartUserCfg_16->Callback;
  _10 = UartUserCfg_16->CallbackParam;
  _9 (Instance_13(D), 2, _10);

  <bb 8> :
  return;

}


Lpuart_Uart_Ip_IrqHandler (const uint8 Instance)
{
  boolean IsReturn;
  const struct Lpuart_Uart_Ip_StateStructureType * UartState;
  struct LPUART_Type * Base;
  _Bool _1;
  int _2;
  int _3;
  _Bool _4;
  _Bool _5;
  _Bool _6;
  _Bool _7;
  _Bool _8;
  _Bool _9;
  _Bool _10;
  _Bool _11;

  <bb 2> :
  _1 = Instance_18(D) <= 2;
  DevAssert (_1);
  _2 = (int) Instance_18(D);
  Base_21 = Lpuart_Uart_Ip_apBases[_2];
  _3 = (int) Instance_18(D);
  UartState_22 = Lpuart_Uart_Ip_apStateStructuresArray[_3];
  IsReturn_23 = 0;
  if (UartState_22 == 0B)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  Lpuart_Uart_Ip_Getchar (Base_21);
  Lpuart_Uart_Ip_ClearErrorFlags (Base_21);
  goto <bb 17>; [INV]

  <bb 4> :
  Lpuart_Uart_Ip_ErrIrqHandler (Instance_18(D));
  _4 = Lpuart_Uart_Ip_GetStatusFlag (Base_21, 21);
  if (_4 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 5> :
  _5 = Lpuart_Uart_Ip_GetIntMode (Base_21, 21);
  if (_5 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  Lpuart_Uart_Ip_RxIrqHandler (Instance_18(D));
  goto <bb 8>; [INV]

  <bb 7> :
  Lpuart_Uart_Ip_Getchar (Base_21);

  <bb 8> :
  IsReturn_29 = 1;

  <bb 9> :
  # IsReturn_12 = PHI <IsReturn_23(4), IsReturn_29(8)>
  _6 = Lpuart_Uart_Ip_GetStatusFlag (Base_21, 23);
  if (_6 != 0)
    goto <bb 10>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 10> :
  _7 = ~IsReturn_12;
  if (_7 != 0)
    goto <bb 11>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 11> :
  _8 = Lpuart_Uart_Ip_GetIntMode (Base_21, 23);
  if (_8 != 0)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  Lpuart_Uart_Ip_TxEmptyIrqHandler (Instance_18(D));
  IsReturn_33 = 1;

  <bb 13> :
  # IsReturn_13 = PHI <IsReturn_12(9), IsReturn_12(10), IsReturn_12(11), IsReturn_33(12)>
  _9 = Lpuart_Uart_Ip_GetStatusFlag (Base_21, 22);
  if (_9 != 0)
    goto <bb 14>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 14> :
  _10 = ~IsReturn_13;
  if (_10 != 0)
    goto <bb 15>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 15> :
  _11 = Lpuart_Uart_Ip_GetIntMode (Base_21, 22);
  if (_11 != 0)
    goto <bb 16>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 16> :
  Lpuart_Uart_Ip_TxCompleteIrqHandler (Instance_18(D));

  <bb 17> :
  return;

}


Lpuart_Uart_Ip_SetRxBuffer (const uint8 Instance, uint8 * RxBuff, const uint32 RxSize)
{
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  Lpuart_Uart_Ip_StatusType D.6810;
  _Bool _1;
  _Bool _2;
  _Bool _3;
  int _4;
  Lpuart_Uart_Ip_StatusType _15;

  <bb 2> :
  _1 = Instance_5(D) <= 2;
  DevAssert (_1);
  _2 = RxBuff_8(D) != 0B;
  DevAssert (_2);
  _3 = RxSize_10(D) != 0;
  DevAssert (_3);
  _4 = (int) Instance_5(D);
  UartState_12 = Lpuart_Uart_Ip_apStateStructuresArray[_4];
  UartState_12->RxBuff = RxBuff_8(D);
  UartState_12->RxSize ={v} RxSize_10(D);
  _15 = 0;

  <bb 3> :
<L0>:
  return _15;

}


Lpuart_Uart_Ip_SetTxBuffer (const uint8 Instance, const uint8 * TxBuff, const uint32 TxSize)
{
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  Lpuart_Uart_Ip_StatusType D.6808;
  _Bool _1;
  _Bool _2;
  _Bool _3;
  int _4;
  Lpuart_Uart_Ip_StatusType _15;

  <bb 2> :
  _1 = Instance_5(D) <= 2;
  DevAssert (_1);
  _2 = TxBuff_8(D) != 0B;
  DevAssert (_2);
  _3 = TxSize_10(D) != 0;
  DevAssert (_3);
  _4 = (int) Instance_5(D);
  UartState_12 = Lpuart_Uart_Ip_apStateStructuresArray[_4];
  UartState_12->TxBuff = TxBuff_8(D);
  UartState_12->TxSize ={v} TxSize_10(D);
  _15 = 0;

  <bb 3> :
<L0>:
  return _15;

}


Lpuart_Uart_Ip_GetBaudRate (const uint8 Instance, uint32 * ConfiguredBaudRate)
{
  const struct Lpuart_Uart_Ip_StateStructureType * UartState;
  _Bool _1;
  _Bool _2;
  int _3;
  long unsigned int _4;

  <bb 2> :
  _1 = Instance_5(D) <= 2;
  DevAssert (_1);
  _2 = ConfiguredBaudRate_8(D) != 0B;
  DevAssert (_2);
  _3 = (int) Instance_5(D);
  UartState_10 = Lpuart_Uart_Ip_apStateStructuresArray[_3];
  _4 = UartState_10->BaudRate;
  *ConfiguredBaudRate_8(D) = _4;
  return;

}


Lpuart_Uart_Ip_SetBaudRate (const uint8 Instance, const Lpuart_Uart_Ip_BaudrateType DesiredBaudrate, const uint32 ClockFrequency)
{
  Lpuart_Uart_Ip_StatusType Status;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  struct LPUART_Type * Base;
  uint32 ExpectedBaud;
  uint32 MaxOsr;
  uint32 BaudDiff;
  uint32 CalculatedBaud;
  uint32 TempDiff;
  uint32 Osr;
  uint16 SbrTemp;
  uint16 Idx;
  uint16 Sbr;
  Lpuart_Uart_Ip_StatusType D.6806;
  _Bool _1;
  int _2;
  int _3;
  _Bool _4;
  _Bool _5;
  _Bool _6;
  _Bool _7;
  long unsigned int _8;
  _Bool _9;
  long unsigned int _10;
  long unsigned int _11;
  long unsigned int _12;
  long unsigned int _13;
  long unsigned int _14;
  long unsigned int _15;
  long unsigned int _16;
  long unsigned int _17;
  long unsigned int _18;
  long unsigned int _19;
  short unsigned int Idx.16_20;
  long unsigned int _21;
  long unsigned int _22;
  long unsigned int _23;
  Lpuart_Uart_Ip_StatusType _75;

  <bb 2> :
  _1 = Instance_41(D) <= 2;
  DevAssert (_1);
  ExpectedBaud_45 = DesiredBaudrate_44(D);
  _2 = (int) Instance_41(D);
  Base_46 = Lpuart_Uart_Ip_apBases[_2];
  _3 = (int) Instance_41(D);
  UartState_47 = Lpuart_Uart_Ip_apStateStructuresArray[_3];
  Status_48 = 1;
  _4 = UartState_47 != 0B;
  DevAssert (_4);
  _5 ={v} UartState_47->IsTxBusy;
  if (_5 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 3>; [INV]

  <bb 3> :
  _6 ={v} UartState_47->IsRxBusy;
  if (_6 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  Status_74 = 2;
  goto <bb 22>; [INV]

  <bb 5> :
  _7 = ClockFrequency_50(D) != 0;
  DevAssert (_7);
  _8 = ExpectedBaud_45 * 5;
  _9 = ClockFrequency_50(D) >= _8;
  DevAssert (_9);
  Osr_53 = 4;
  _10 = ExpectedBaud_45 * Osr_53;
  _11 = ClockFrequency_50(D) / _10;
  Sbr_54 = (uint16) _11;
  _12 = (long unsigned int) Sbr_54;
  _13 = Osr_53 * _12;
  CalculatedBaud_55 = ClockFrequency_50(D) / _13;
  if (CalculatedBaud_55 > ExpectedBaud_45)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  BaudDiff_57 = CalculatedBaud_55 - ExpectedBaud_45;
  goto <bb 8>; [INV]

  <bb 7> :
  BaudDiff_56 = ExpectedBaud_45 - CalculatedBaud_55;

  <bb 8> :
  # BaudDiff_34 = PHI <BaudDiff_57(6), BaudDiff_56(7)>
  MaxOsr_58 = ClockFrequency_50(D) / ExpectedBaud_45;
  if (MaxOsr_58 > 32)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  MaxOsr_59 = 32;

  <bb 10> :
  # MaxOsr_37 = PHI <MaxOsr_58(8), MaxOsr_59(9)>
  if (MaxOsr_37 > 4)
    goto <bb 11>; [INV]
  else
    goto <bb 19>; [INV]

  <bb 11> :
  Idx_60 = 5;
  goto <bb 18>; [INV]

  <bb 12> :
  _14 = (long unsigned int) Idx_27;
  _15 = ExpectedBaud_45 * _14;
  _16 = ClockFrequency_50(D) / _15;
  SbrTemp_61 = (uint16) _16;
  _17 = (long unsigned int) Idx_27;
  _18 = (long unsigned int) SbrTemp_61;
  _19 = _17 * _18;
  CalculatedBaud_62 = ClockFrequency_50(D) / _19;
  if (CalculatedBaud_62 > ExpectedBaud_45)
    goto <bb 13>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 13> :
  TempDiff_64 = CalculatedBaud_62 - ExpectedBaud_45;
  goto <bb 15>; [INV]

  <bb 14> :
  TempDiff_63 = ExpectedBaud_45 - CalculatedBaud_62;

  <bb 15> :
  # TempDiff_31 = PHI <TempDiff_64(13), TempDiff_63(14)>
  if (TempDiff_31 <= BaudDiff_36)
    goto <bb 16>; [INV]
  else
    goto <bb 17>; [INV]

  <bb 16> :
  BaudDiff_65 = TempDiff_31;
  Osr_66 = (uint32) Idx_27;
  Sbr_67 = SbrTemp_61;

  <bb 17> :
  # Sbr_24 = PHI <Sbr_25(15), Sbr_67(16)>
  # Osr_28 = PHI <Osr_29(15), Osr_66(16)>
  # BaudDiff_35 = PHI <BaudDiff_36(15), BaudDiff_65(16)>
  Idx.16_20 = Idx_27;
  Idx_68 = Idx.16_20 + 1;

  <bb 18> :
  # Sbr_25 = PHI <Sbr_54(11), Sbr_24(17)>
  # Idx_27 = PHI <Idx_60(11), Idx_68(17)>
  # Osr_29 = PHI <Osr_53(11), Osr_28(17)>
  # CalculatedBaud_32 = PHI <CalculatedBaud_55(11), CalculatedBaud_62(17)>
  # BaudDiff_36 = PHI <BaudDiff_34(11), BaudDiff_35(17)>
  _21 = (long unsigned int) Idx_27;
  if (MaxOsr_37 >= _21)
    goto <bb 12>; [INV]
  else
    goto <bb 19>; [INV]

  <bb 19> :
  # Sbr_26 = PHI <Sbr_54(10), Sbr_25(18)>
  # Osr_30 = PHI <Osr_53(10), Osr_29(18)>
  # CalculatedBaud_33 = PHI <CalculatedBaud_55(10), CalculatedBaud_32(18)>
  if (Osr_30 <= 7)
    goto <bb 20>; [INV]
  else
    goto <bb 21>; [INV]

  <bb 20> :
  Lpuart_Uart_Ip_EnableBothEdgeSamplingCmd (Base_46);

  <bb 21> :
  _22 = Osr_30 + 4294967295;
  Lpuart_Uart_Ip_SetOversamplingRatio (Base_46, _22);
  _23 = (long unsigned int) Sbr_26;
  Lpuart_Uart_Ip_SetBaudRateDivisor (Base_46, _23);
  UartState_47->BaudRate = CalculatedBaud_33;
  Status_73 = 0;

  <bb 22> :
  # Status_38 = PHI <Status_74(4), Status_73(21)>
  _75 = Status_38;

  <bb 23> :
<L21>:
  return _75;

}


Lpuart_Uart_Ip_AbortReceivingData (const uint8 Instance)
{
  Lpuart_Uart_Ip_StatusType RetVal;
  boolean IsReturn;
  struct LPUART_Type * Base;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  Lpuart_Uart_Ip_StatusType D.6786;
  _Bool _1;
  int _2;
  int _3;
  int _4;
  _Bool _5;
  _Bool _6;
  _Bool _7;
  _Bool _8;
  _Bool _9;
  <unnamed type> _10;
  long unsigned int _11;
  Lpuart_Uart_Ip_StatusType _36;

  <bb 2> :
  _1 = Instance_17(D) <= 2;
  DevAssert (_1);
  _2 = (int) Instance_17(D);
  Base_20 = Lpuart_Uart_Ip_apBases[_2];
  _3 = (int) Instance_17(D);
  UartState_21 = Lpuart_Uart_Ip_apStateStructuresArray[_3];
  _4 = (int) Instance_17(D);
  UartUserCfg_22 = Lpuart_Uart_Ip_apUserConfig[_4];
  _5 = UartState_21 != 0B;
  DevAssert (_5);
  _6 = UartUserCfg_22 != 0B;
  DevAssert (_6);
  IsReturn_25 = 0;
  RetVal_26 = 1;
  _7 ={v} UartState_21->IsRxBusy;
  _8 = ~_7;
  if (_8 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  RetVal_27 = 0;
  IsReturn_28 = 1;

  <bb 4> :
  # IsReturn_12 = PHI <IsReturn_25(2), IsReturn_28(3)>
  # RetVal_13 = PHI <RetVal_26(2), RetVal_27(3)>
  _9 = ~IsReturn_12;
  if (_9 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 5> :
  UartState_21->ReceiveStatus ={v} 6;
  _10 = UartUserCfg_22->TransferType;
  if (_10 == 1)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  Lpuart_Uart_Ip_CompleteReceiveDataUsingInt (Instance_17(D));
  goto <bb 8>; [INV]

  <bb 7> :
  _11 = UartUserCfg_22->RxDMAChannel;
  Dma_Ip_SetLogicChannelCommand (_11, 1);
  Lpuart_Uart_Ip_CompleteReceiveUsingDma (Instance_17(D));

  <bb 8> :
  Lpuart_Uart_Ip_ClearErrorFlags (Base_20);
  Lpuart_Uart_Ip_FlushRxBuffer (Base_20);
  RetVal_35 = 0;

  <bb 9> :
  # RetVal_14 = PHI <RetVal_13(4), RetVal_35(8)>
  _36 = RetVal_14;

  <bb 10> :
<L7>:
  return _36;

}


Lpuart_Uart_Ip_GetReceiveStatus (const uint8 Instance, uint32 * BytesRemaining)
{
  const Dma_Ip_LogicChannelInfoParamType DmaLogicChnParam;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  const struct Lpuart_Uart_Ip_StateStructureType * UartState;
  Lpuart_Uart_Ip_StatusType D.6777;
  _Bool _1;
  int _2;
  int _3;
  _Bool _4;
  _Bool _5;
  _Bool _6;
  <unnamed type> _7;
  long unsigned int _8;
  long unsigned int _9;
  Lpuart_Uart_Ip_StatusType _23;

  <bb 2> :
  _1 = Instance_11(D) <= 2;
  DevAssert (_1);
  DmaLogicChnParam_14 = 3;
  _2 = (int) Instance_11(D);
  UartState_15 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 = (int) Instance_11(D);
  UartUserCfg_16 = Lpuart_Uart_Ip_apUserConfig[_3];
  _4 = UartState_15 != 0B;
  DevAssert (_4);
  _5 = UartUserCfg_16 != 0B;
  DevAssert (_5);
  if (BytesRemaining_19(D) != 0B)
    goto <bb 3>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 3> :
  _6 ={v} UartState_15->IsRxBusy;
  if (_6 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 4> :
  _7 = UartUserCfg_16->TransferType;
  if (_7 == 1)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  _8 ={v} UartState_15->RxSize;
  *BytesRemaining_19(D) = _8;
  goto <bb 8>; [INV]

  <bb 6> :
  _9 = UartUserCfg_16->RxDMAChannel;
  Dma_Ip_GetLogicChannelParam (_9, DmaLogicChnParam_14, BytesRemaining_19(D));
  goto <bb 8>; [INV]

  <bb 7> :
  *BytesRemaining_19(D) = 0;

  <bb 8> :
  _23 ={v} UartState_15->ReceiveStatus;

  <bb 9> :
<L8>:
  return _23;

}


Lpuart_Uart_Ip_AsyncReceive (const uint8 Instance, uint8 * RxBuff, const uint32 RxSize)
{
  boolean IsReturn;
  Lpuart_Uart_Ip_StatusType RetVal;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  Lpuart_Uart_Ip_StatusType D.6767;
  int iftmp.15;
  _Bool _1;
  _Bool _2;
  _Bool _3;
  int _4;
  int _5;
  _Bool _6;
  _Bool _7;
  _Bool _8;
  _Bool _9;
  <unnamed type> _10;
  <unnamed type> _11;
  _Bool _12;
  <unnamed type> _13;
  int iftmp.15_17;
  int iftmp.15_39;
  int iftmp.15_40;
  Lpuart_Uart_Ip_StatusType _46;

  <bb 2> :
  _1 = Instance_20(D) <= 2;
  DevAssert (_1);
  _2 = RxBuff_23(D) != 0B;
  DevAssert (_2);
  _3 = RxSize_25(D) != 0;
  DevAssert (_3);
  RetVal_27 = 0;
  _4 = (int) Instance_20(D);
  UartUserCfg_28 = Lpuart_Uart_Ip_apUserConfig[_4];
  _5 = (int) Instance_20(D);
  UartState_29 = Lpuart_Uart_Ip_apStateStructuresArray[_5];
  IsReturn_30 = 0;
  _6 = UartState_29 != 0B;
  DevAssert (_6);
  SchM_Enter_Uart_UART_EXCLUSIVE_AREA_03 ();
  _7 ={v} UartState_29->IsRxBusy;
  if (_7 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03 ();
  RetVal_34 = 2;
  IsReturn_35 = 1;

  <bb 4> :
  # RetVal_14 = PHI <RetVal_27(2), RetVal_34(3)>
  # IsReturn_16 = PHI <IsReturn_30(2), IsReturn_35(3)>
  _8 = ~IsReturn_16;
  if (_8 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 5> :
  UartState_29->IsRxBusy ={v} 1;
  SchM_Exit_Uart_UART_EXCLUSIVE_AREA_03 ();
  _9 = UartUserCfg_28 != 0B;
  DevAssert (_9);
  _10 = UartUserCfg_28->TransferType;
  if (_10 == 1)
    goto <bb 7>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  _11 = UartUserCfg_28->TransferType;
  if (_11 == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  iftmp.15_40 = 1;
  goto <bb 9>; [INV]

  <bb 8> :
  iftmp.15_39 = 0;

  <bb 9> :
  # iftmp.15_17 = PHI <iftmp.15_40(7), iftmp.15_39(8)>
  _12 = (_Bool) iftmp.15_17;
  DevAssert (_12);
  _13 = UartUserCfg_28->TransferType;
  if (_13 == 1)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  RetVal_45 = Lpuart_Uart_Ip_StartReceiveDataUsingInt (Instance_20(D), RxBuff_23(D), RxSize_25(D));
  goto <bb 12>; [INV]

  <bb 11> :
  RetVal_43 = Lpuart_Uart_Ip_StartReceiveDataUsingDma (Instance_20(D), RxBuff_23(D), RxSize_25(D));

  <bb 12> :
  # RetVal_15 = PHI <RetVal_14(4), RetVal_45(10), RetVal_43(11)>
  _46 = RetVal_15;

  <bb 13> :
<L11>:
  return _46;

}


Lpuart_Uart_Ip_StartGetData (const uint8 Instance, uint32 * StartTime, uint32 * ElapsedTicks, uint32 TimeoutTicks)
{
  const uint32 Lpuart_Uart_Ip_StatusRegMask[4];
  const Lpuart_Uart_Ip_StatusType Lpuart_Uart_Ip_ReceiveStatusArray[4];
  const Lpuart_Uart_Ip_StatusFlagType Lpuart_Uart_Ip_StatusFlagTypeArray[4];
  uint32 Mask;
  uint8 StatusIndex;
  struct LPUART_Type * Base;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  int _1;
  int _2;
  _Bool _3;
  _Bool _4;
  _Bool _5;
  _Bool _6;
  int _7;
  <unnamed type> _8;
  _Bool _9;
  int _10;
  <unnamed type> _11;
  int _12;
  long unsigned int _13;
  unsigned char StatusIndex.14_14;
  long unsigned int _15;
  _Bool _16;
  _Bool _17;

  <bb 2> :
  _1 = (int) Instance_28(D);
  UartState_30 = Lpuart_Uart_Ip_apStateStructuresArray[_1];
  _2 = (int) Instance_28(D);
  Base_31 = Lpuart_Uart_Ip_apBases[_2];
  StatusIndex_32 = 0;
  Mask_33 = 0;
  Lpuart_Uart_Ip_StatusFlagTypeArray = *.LC0;
  Lpuart_Uart_Ip_ReceiveStatusArray = *.LC1;
  Lpuart_Uart_Ip_StatusRegMask = *.LC2;
  goto <bb 14>; [INV]

  <bb 3> :

  <bb 4> :
  _3 = Lpuart_Uart_Ip_GetStatusFlag (Base_31, 21);
  _4 = ~_3;
  if (_4 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  _5 = Lpuart_Uart_Ip_CheckTimeout (StartTime_37(D), ElapsedTicks_38(D), TimeoutTicks_39(D), 0);
  _6 = ~_5;
  if (_6 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  StatusIndex_43 = 0;
  goto <bb 10>; [INV]

  <bb 7> :
  _7 = (int) StatusIndex_18;
  _8 = Lpuart_Uart_Ip_StatusFlagTypeArray[_7];
  _9 = Lpuart_Uart_Ip_GetStatusFlag (Base_31, _8);
  if (_9 != 0)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  _10 = (int) StatusIndex_18;
  _11 = Lpuart_Uart_Ip_ReceiveStatusArray[_10];
  UartState_30->ReceiveStatus ={v} _11;
  _12 = (int) StatusIndex_18;
  _13 = Lpuart_Uart_Ip_StatusRegMask[_12];
  Mask_49 = Mask_20 | _13;

  <bb 9> :
  # Mask_19 = PHI <Mask_20(7), Mask_49(8)>
  StatusIndex.14_14 = StatusIndex_18;
  StatusIndex_50 = StatusIndex.14_14 + 1;

  <bb 10> :
  # StatusIndex_18 = PHI <StatusIndex_43(6), StatusIndex_50(9)>
  # Mask_20 = PHI <Mask_21(6), Mask_19(9)>
  if (StatusIndex_18 <= 3)
    goto <bb 7>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 11> :
  if (Mask_20 != 0)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  Lpuart_Uart_Ip_SetReceiverCmd (Base_31, 0);
  Lpuart_Uart_Ip_ClearStatusFlagWithMask (Base_31, Mask_20);
  goto <bb 16>; [INV]

  <bb 13> :
  Lpuart_Uart_Ip_GetData (Instance_28(D));

  <bb 14> :
  # Mask_21 = PHI <Mask_33(2), Mask_20(13)>
  _15 ={v} UartState_30->RxSize;
  if (_15 != 0)
    goto <bb 15>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 15> :
  _16 = Lpuart_Uart_Ip_CheckTimeout (StartTime_37(D), ElapsedTicks_38(D), TimeoutTicks_39(D), 0);
  _17 = ~_16;
  if (_17 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 16>; [INV]

  <bb 16> :
  Lpuart_Uart_Ip_StatusFlagTypeArray ={v} {CLOBBER};
  Lpuart_Uart_Ip_ReceiveStatusArray ={v} {CLOBBER};
  Lpuart_Uart_Ip_StatusRegMask ={v} {CLOBBER};
  return;

}


Lpuart_Uart_Ip_SyncReceive (const uint8 Instance, uint8 * RxBuff, const uint32 RxSize, const uint32 Timeout)
{
  Lpuart_Uart_Ip_StatusType RetVal;
  boolean IsReturn;
  uint32 ElapsedTicks;
  uint32 TimeoutTicks;
  uint32 StartTime;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  struct LPUART_Type * Base;
  Lpuart_Uart_Ip_StatusType D.6737;
  _Bool _1;
  _Bool _2;
  _Bool _3;
  int _4;
  int _5;
  _Bool _6;
  _Bool _7;
  _Bool _8;
  long unsigned int TimeoutTicks.11_9;
  long unsigned int TimeoutTicks.12_10;
  _Bool _11;
  <unnamed type> _12;
  long unsigned int _13;
  <unnamed type> _14;
  Lpuart_Uart_Ip_StatusType _58;

  <bb 2> :
  _1 = Instance_23(D) <= 2;
  DevAssert (_1);
  _2 = RxBuff_26(D) != 0B;
  DevAssert (_2);
  _3 = RxSize_28(D) != 0;
  DevAssert (_3);
  _4 = (int) Instance_23(D);
  Base_30 = Lpuart_Uart_Ip_apBases[_4];
  ElapsedTicks = 0;
  IsReturn_32 = 0;
  RetVal_33 = 0;
  _5 = (int) Instance_23(D);
  UartState_34 = Lpuart_Uart_Ip_apStateStructuresArray[_5];
  _6 = UartState_34 != 0B;
  DevAssert (_6);
  SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02 ();
  _7 ={v} UartState_34->IsRxBusy;
  if (_7 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02 ();
  RetVal_38 = 2;
  IsReturn_39 = 1;

  <bb 4> :
  # IsReturn_15 = PHI <IsReturn_32(2), IsReturn_39(3)>
  # RetVal_16 = PHI <RetVal_33(2), RetVal_38(3)>
  _8 = ~IsReturn_15;
  if (_8 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 5> :
  UartState_34->IsRxBusy ={v} 1;
  SchM_Exit_Uart_UART_EXCLUSIVE_AREA_02 ();
  UartState_34->RxBuff = RxBuff_26(D);
  UartState_34->RxSize ={v} RxSize_28(D);
  UartState_34->ReceiveStatus ={v} 2;
  Lpuart_Uart_Ip_SetIntMode (Base_30, 21, 0);
  Lpuart_Uart_Ip_SetReceiverCmd (Base_30, 1);
  Lpuart_Uart_Ip_StartTimeout (&StartTime, &TimeoutTicks, Timeout_47(D), 0);
  TimeoutTicks.11_9 = TimeoutTicks;
  Lpuart_Uart_Ip_StartGetData (Instance_23(D), &StartTime, &ElapsedTicks, TimeoutTicks.11_9);
  TimeoutTicks.12_10 = TimeoutTicks;
  _11 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.12_10, 0);
  if (_11 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  UartState_34->ReceiveStatus ={v} 3;

  <bb 7> :
  _12 ={v} UartState_34->ReceiveStatus;
  if (_12 == 2)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  UartState_34->ReceiveStatus ={v} 0;

  <bb 9> :
  _13 ={v} UartState_34->RxSize;
  if (_13 == 0)
    goto <bb 10>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 10> :
  _14 ={v} UartState_34->ReceiveStatus;
  if (_14 == 5)
    goto <bb 11>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 11> :
  UartState_34->ReceiveStatus ={v} 0;

  <bb 12> :
  Lpuart_Uart_Ip_SetReceiverCmd (Base_30, 0);
  UartState_34->IsRxBusy ={v} 0;
  Lpuart_Uart_Ip_Getchar (Base_30);
  RetVal_57 ={v} UartState_34->ReceiveStatus;

  <bb 13> :
  # RetVal_17 = PHI <RetVal_16(4), RetVal_57(12)>
  _58 = RetVal_17;
  StartTime ={v} {CLOBBER};
  TimeoutTicks ={v} {CLOBBER};
  ElapsedTicks ={v} {CLOBBER};

  <bb 14> :
<L13>:
  return _58;

}


Lpuart_Uart_Ip_AbortSendingData (const uint8 Instance)
{
  Lpuart_Uart_Ip_StatusType RetVal;
  boolean IsReturn;
  struct LPUART_Type * Base;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  Lpuart_Uart_Ip_StatusType D.6723;
  _Bool _1;
  int _2;
  int _3;
  int _4;
  _Bool _5;
  _Bool _6;
  _Bool _7;
  _Bool _8;
  _Bool _9;
  <unnamed type> _10;
  long unsigned int _11;
  Lpuart_Uart_Ip_StatusType _35;

  <bb 2> :
  _1 = Instance_17(D) <= 2;
  DevAssert (_1);
  _2 = (int) Instance_17(D);
  Base_20 = Lpuart_Uart_Ip_apBases[_2];
  IsReturn_21 = 0;
  RetVal_22 = 0;
  _3 = (int) Instance_17(D);
  UartState_23 = Lpuart_Uart_Ip_apStateStructuresArray[_3];
  _4 = (int) Instance_17(D);
  UartUserCfg_24 = Lpuart_Uart_Ip_apUserConfig[_4];
  _5 = UartState_23 != 0B;
  DevAssert (_5);
  _6 = UartUserCfg_24 != 0B;
  DevAssert (_6);
  _7 ={v} UartState_23->IsTxBusy;
  _8 = ~_7;
  if (_8 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  RetVal_27 = 0;
  IsReturn_28 = 1;

  <bb 4> :
  # IsReturn_12 = PHI <IsReturn_21(2), IsReturn_28(3)>
  # RetVal_13 = PHI <RetVal_22(2), RetVal_27(3)>
  _9 = ~IsReturn_12;
  if (_9 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 5> :
  UartState_23->TransmitStatus ={v} 6;
  _10 = UartUserCfg_24->TransferType;
  if (_10 == 1)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  Lpuart_Uart_Ip_CompleteSendDataUsingInt (Instance_17(D));
  goto <bb 8>; [INV]

  <bb 7> :
  _11 = UartUserCfg_24->TxDMAChannel;
  Dma_Ip_SetLogicChannelCommand (_11, 1);
  Lpuart_Uart_Ip_CompleteSendUsingDma (Instance_17(D));

  <bb 8> :
  Lpuart_Uart_Ip_FlushTxBuffer (Base_20);
  RetVal_34 = 0;

  <bb 9> :
  # RetVal_14 = PHI <RetVal_13(4), RetVal_34(8)>
  _35 = RetVal_14;

  <bb 10> :
<L7>:
  return _35;

}


Lpuart_Uart_Ip_GetTransmitStatus (const uint8 Instance, uint32 * BytesRemaining)
{
  const Dma_Ip_LogicChannelInfoParamType DmaLogicChnParam;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  const struct Lpuart_Uart_Ip_StateStructureType * UartState;
  Lpuart_Uart_Ip_StatusType D.6714;
  _Bool _1;
  int _2;
  int _3;
  _Bool _4;
  _Bool _5;
  _Bool _6;
  <unnamed type> _7;
  long unsigned int _8;
  long unsigned int _9;
  Lpuart_Uart_Ip_StatusType _23;

  <bb 2> :
  _1 = Instance_11(D) <= 2;
  DevAssert (_1);
  DmaLogicChnParam_14 = 3;
  _2 = (int) Instance_11(D);
  UartState_15 = Lpuart_Uart_Ip_apStateStructuresArray[_2];
  _3 = (int) Instance_11(D);
  UartUserCfg_16 = Lpuart_Uart_Ip_apUserConfig[_3];
  _4 = UartState_15 != 0B;
  DevAssert (_4);
  _5 = UartUserCfg_16 != 0B;
  DevAssert (_5);
  if (BytesRemaining_19(D) != 0B)
    goto <bb 3>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 3> :
  _6 ={v} UartState_15->IsTxBusy;
  if (_6 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 4> :
  _7 = UartUserCfg_16->TransferType;
  if (_7 == 1)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  _8 ={v} UartState_15->TxSize;
  *BytesRemaining_19(D) = _8;
  goto <bb 8>; [INV]

  <bb 6> :
  _9 = UartUserCfg_16->TxDMAChannel;
  Dma_Ip_GetLogicChannelParam (_9, DmaLogicChnParam_14, BytesRemaining_19(D));
  goto <bb 8>; [INV]

  <bb 7> :
  *BytesRemaining_19(D) = 0;

  <bb 8> :
  _23 ={v} UartState_15->TransmitStatus;

  <bb 9> :
<L8>:
  return _23;

}


Lpuart_Uart_Ip_AsyncSend (const uint8 Instance, const uint8 * TxBuff, const uint32 TxSize)
{
  boolean IsReturn;
  Lpuart_Uart_Ip_StatusType RetVal;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  const struct Lpuart_Uart_Ip_UserConfigType * UartUserCfg;
  Lpuart_Uart_Ip_StatusType D.6704;
  int iftmp.10;
  _Bool _1;
  _Bool _2;
  _Bool _3;
  int _4;
  int _5;
  _Bool _6;
  _Bool _7;
  _Bool _8;
  _Bool _9;
  <unnamed type> _10;
  <unnamed type> _11;
  _Bool _12;
  <unnamed type> _13;
  int iftmp.10_17;
  int iftmp.10_39;
  int iftmp.10_40;
  Lpuart_Uart_Ip_StatusType _46;

  <bb 2> :
  _1 = Instance_20(D) <= 2;
  DevAssert (_1);
  _2 = TxBuff_23(D) != 0B;
  DevAssert (_2);
  _3 = TxSize_25(D) != 0;
  DevAssert (_3);
  RetVal_27 = 0;
  _4 = (int) Instance_20(D);
  UartUserCfg_28 = Lpuart_Uart_Ip_apUserConfig[_4];
  _5 = (int) Instance_20(D);
  UartState_29 = Lpuart_Uart_Ip_apStateStructuresArray[_5];
  IsReturn_30 = 0;
  _6 = UartState_29 != 0B;
  DevAssert (_6);
  SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01 ();
  _7 ={v} UartState_29->IsTxBusy;
  if (_7 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01 ();
  RetVal_34 = 2;
  IsReturn_35 = 1;

  <bb 4> :
  # RetVal_14 = PHI <RetVal_27(2), RetVal_34(3)>
  # IsReturn_16 = PHI <IsReturn_30(2), IsReturn_35(3)>
  _8 = ~IsReturn_16;
  if (_8 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 5> :
  UartState_29->IsTxBusy ={v} 1;
  SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01 ();
  _9 = UartUserCfg_28 != 0B;
  DevAssert (_9);
  _10 = UartUserCfg_28->TransferType;
  if (_10 == 1)
    goto <bb 7>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  _11 = UartUserCfg_28->TransferType;
  if (_11 == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  iftmp.10_40 = 1;
  goto <bb 9>; [INV]

  <bb 8> :
  iftmp.10_39 = 0;

  <bb 9> :
  # iftmp.10_17 = PHI <iftmp.10_40(7), iftmp.10_39(8)>
  _12 = (_Bool) iftmp.10_17;
  DevAssert (_12);
  _13 = UartUserCfg_28->TransferType;
  if (_13 == 1)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  RetVal_45 = Lpuart_Uart_Ip_StartSendDataUsingInt (Instance_20(D), TxBuff_23(D), TxSize_25(D));
  goto <bb 12>; [INV]

  <bb 11> :
  RetVal_43 = Lpuart_Uart_Ip_StartSendDataUsingDma (Instance_20(D), TxBuff_23(D), TxSize_25(D));

  <bb 12> :
  # RetVal_15 = PHI <RetVal_14(4), RetVal_45(10), RetVal_43(11)>
  _46 = RetVal_15;

  <bb 13> :
<L11>:
  return _46;

}


Lpuart_Uart_Ip_SyncSend (const uint8 Instance, const uint8 * TxBuff, const uint32 TxSize, const uint32 Timeout)
{
  Lpuart_Uart_Ip_StatusType RetVal;
  boolean IsReturn;
  uint32 ElapsedTicks;
  uint32 TimeoutTicks;
  uint32 StartTime;
  struct Lpuart_Uart_Ip_StateStructureType * UartState;
  struct LPUART_Type * Base;
  Lpuart_Uart_Ip_StatusType D.6685;
  _Bool _1;
  _Bool _2;
  _Bool _3;
  int _4;
  int _5;
  _Bool _6;
  _Bool _7;
  _Bool _8;
  _Bool _9;
  _Bool _10;
  long unsigned int TimeoutTicks.6_11;
  _Bool _12;
  _Bool _13;
  long unsigned int _14;
  long unsigned int TimeoutTicks.7_15;
  _Bool _16;
  _Bool _17;
  long unsigned int TimeoutTicks.8_18;
  _Bool _19;
  Lpuart_Uart_Ip_StatusType _66;

  <bb 2> :
  _1 = Instance_29(D) <= 2;
  DevAssert (_1);
  _2 = TxBuff_32(D) != 0B;
  DevAssert (_2);
  _3 = TxSize_34(D) != 0;
  DevAssert (_3);
  ElapsedTicks = 0;
  IsReturn_37 = 0;
  RetVal_38 = 0;
  _4 = (int) Instance_29(D);
  Base_39 = Lpuart_Uart_Ip_apBases[_4];
  _5 = (int) Instance_29(D);
  UartState_40 = Lpuart_Uart_Ip_apStateStructuresArray[_5];
  _6 = UartState_40 != 0B;
  DevAssert (_6);
  SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00 ();
  _7 ={v} UartState_40->IsTxBusy;
  if (_7 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00 ();
  RetVal_44 = 2;
  IsReturn_45 = 1;

  <bb 4> :
  # IsReturn_20 = PHI <IsReturn_37(2), IsReturn_45(3)>
  # RetVal_21 = PHI <RetVal_38(2), RetVal_44(3)>
  _8 = ~IsReturn_20;
  if (_8 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 15>; [INV]

  <bb 5> :
  UartState_40->IsTxBusy ={v} 1;
  SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00 ();
  UartState_40->TxBuff = TxBuff_32(D);
  UartState_40->TxSize ={v} TxSize_34(D);
  UartState_40->TransmitStatus ={v} 2;
  Lpuart_Uart_Ip_SetIntMode (Base_39, 23, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_39, 22, 0);
  Lpuart_Uart_Ip_SetTransmitterCmd (Base_39, 1);
  Lpuart_Uart_Ip_StartTimeout (&StartTime, &TimeoutTicks, Timeout_54(D), 0);
  goto <bb 9>; [INV]

  <bb 6> :
  Lpuart_Uart_Ip_PutData (Instance_29(D));

  <bb 7> :
  _9 = Lpuart_Uart_Ip_GetStatusFlag (Base_39, 23);
  _10 = ~_9;
  if (_10 != 0)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  TimeoutTicks.6_11 = TimeoutTicks;
  _12 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.6_11, 0);
  _13 = ~_12;
  if (_13 != 0)
    goto <bb 7>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 9> :
  _14 ={v} UartState_40->TxSize;
  if (_14 != 0)
    goto <bb 10>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 10> :
  TimeoutTicks.7_15 = TimeoutTicks;
  _16 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.7_15, 0);
  _17 = ~_16;
  if (_17 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 11> :
  Lpuart_Uart_Ip_SetTransmitterCmd (Base_39, 0);
  TimeoutTicks.8_18 = TimeoutTicks;
  _19 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.8_18, 0);
  if (_19 != 0)
    goto <bb 12>; [INV]
  else
    goto <bb 13>; [INV]

  <bb 12> :
  UartState_40->TransmitStatus ={v} 3;
  goto <bb 14>; [INV]

  <bb 13> :
  UartState_40->TransmitStatus ={v} 0;

  <bb 14> :
  UartState_40->IsTxBusy ={v} 0;
  RetVal_65 ={v} UartState_40->TransmitStatus;

  <bb 15> :
  # RetVal_22 = PHI <RetVal_21(4), RetVal_65(14)>
  _66 = RetVal_22;
  StartTime ={v} {CLOBBER};
  TimeoutTicks ={v} {CLOBBER};
  ElapsedTicks ={v} {CLOBBER};

  <bb 16> :
<L16>:
  return _66;

}


Lpuart_Uart_Ip_Deinit (const uint8 Instance)
{
  struct LPUART_Type * Base;
  uint32 ElapsedTicks;
  uint32 TimeoutTicks;
  uint32 StartTime;
  _Bool _1;
  int _2;
  int _3;
  struct Lpuart_Uart_Ip_StateStructureType * _4;
  _Bool _5;
  _Bool _6;
  _Bool _7;
  long unsigned int TimeoutTicks.4_8;
  _Bool _9;
  _Bool _10;
  int _11;

  <bb 2> :
  _1 = Instance_14(D) <= 2;
  DevAssert (_1);
  ElapsedTicks = 0;
  _2 = (int) Instance_14(D);
  Base_18 = Lpuart_Uart_Ip_apBases[_2];
  _3 = (int) Instance_14(D);
  _4 = Lpuart_Uart_Ip_apStateStructuresArray[_3];
  _5 = _4 != 0B;
  DevAssert (_5);
  Lpuart_Uart_Ip_StartTimeout (&StartTime, &TimeoutTicks, 500000, 0);

  <bb 3> :
  _6 = Lpuart_Uart_Ip_GetStatusFlag (Base_18, 22);
  _7 = ~_6;
  if (_7 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  TimeoutTicks.4_8 = TimeoutTicks;
  _9 = Lpuart_Uart_Ip_CheckTimeout (&StartTime, &ElapsedTicks, TimeoutTicks.4_8, 0);
  _10 = ~_9;
  if (_10 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 5> :
  Lpuart_Uart_Ip_SetIntMode (Base_18, 23, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_18, 22, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_18, 21, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_18, 27, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_18, 24, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_18, 26, 0);
  Lpuart_Uart_Ip_SetIntMode (Base_18, 25, 0);
  _11 = (int) Instance_14(D);
  Lpuart_Uart_Ip_apStateStructuresArray[_11] = 0B;
  StartTime ={v} {CLOBBER};
  TimeoutTicks ={v} {CLOBBER};
  ElapsedTicks ={v} {CLOBBER};
  return;

}


Lpuart_Uart_Ip_Init (const uint8 Instance, const struct Lpuart_Uart_Ip_UserConfigType * UserConfig)
{
  uint8 * ClearStructPtr;
  uint32 Index;
  struct Lpuart_Uart_Ip_StateStructureType * UartStatePtr;
  struct LPUART_Type * Base;
  int iftmp.2;
  int iftmp.1;
  int iftmp.0;
  _Bool _1;
  _Bool _2;
  int _3;
  struct Lpuart_Uart_Ip_StateStructureType * _4;
  _Bool _5;
  unsigned char _6;
  _Bool _7;
  long unsigned int _8;
  long unsigned int _9;
  _Bool _10;
  int _11;
  int _12;
  struct Lpuart_Uart_Ip_StateStructureType * _13;
  int _14;
  int _15;
  <unnamed type> _16;
  <unnamed type> _17;
  <unnamed type> _18;
  _Bool _19;
  <unnamed type> _20;
  <unnamed type> _21;
  _Bool _22;
  uint8 * _23;
  unsigned char _24;
  unsigned char _25;
  long unsigned int _26;
  long unsigned int _27;
  long unsigned int _28;
  <unnamed type> _29;
  <unnamed type> _30;
  <unnamed type> _31;
  <unnamed type> _32;
  <unnamed type> _33;
  long unsigned int _34;
  int iftmp.0_36;
  int iftmp.1_37;
  int iftmp.2_38;
  int iftmp.0_49;
  int iftmp.0_50;
  int iftmp.1_57;
  int iftmp.1_58;
  int iftmp.2_60;
  int iftmp.2_61;

  <bb 2> :
  _1 = Instance_42(D) <= 2;
  DevAssert (_1);
  _2 = UserConfig_45(D) != 0B;
  DevAssert (_2);
  _3 = (int) Instance_42(D);
  _4 = Lpuart_Uart_Ip_apStateStructuresArray[_3];
  _5 = _4 == 0B;
  DevAssert (_5);
  _6 = UserConfig_45(D)->BaudOverSamplingRatio;
  _7 = _6 <= 32;
  DevAssert (_7);
  _8 = UserConfig_45(D)->BaudRateDivisor;
  if (_8 <= 8191)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _9 = UserConfig_45(D)->BaudRateDivisor;
  if (_9 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  iftmp.0_49 = 1;
  goto <bb 6>; [INV]

  <bb 5> :
  iftmp.0_50 = 0;

  <bb 6> :
  # iftmp.0_36 = PHI <iftmp.0_49(4), iftmp.0_50(5)>
  _10 = (_Bool) iftmp.0_36;
  DevAssert (_10);
  _11 = (int) Instance_42(D);
  Base_52 = Lpuart_Uart_Ip_apBases[_11];
  _12 = (int) Instance_42(D);
  _13 = UserConfig_45(D)->StateStruct;
  Lpuart_Uart_Ip_apStateStructuresArray[_12] = _13;
  _14 = (int) Instance_42(D);
  UartStatePtr_54 = Lpuart_Uart_Ip_apStateStructuresArray[_14];
  _15 = (int) Instance_42(D);
  Lpuart_Uart_Ip_apUserConfig[_15] = UserConfig_45(D);
  ClearStructPtr_56 = UartStatePtr_54;
  _16 = UserConfig_45(D)->TransferType;
  if (_16 != 0)
    goto <bb 9>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  _17 = UserConfig_45(D)->BitCountPerChar;
  if (_17 == 0)
    goto <bb 9>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 8> :
  _18 = UserConfig_45(D)->BitCountPerChar;
  if (_18 == 1)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  iftmp.1_58 = 1;
  goto <bb 11>; [INV]

  <bb 10> :
  iftmp.1_57 = 0;

  <bb 11> :
  # iftmp.1_37 = PHI <iftmp.1_58(9), iftmp.1_57(10)>
  _19 = (_Bool) iftmp.1_37;
  DevAssert (_19);
  _20 = UserConfig_45(D)->BitCountPerChar;
  if (_20 != 3)
    goto <bb 13>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 12> :
  _21 = UserConfig_45(D)->ParityMode;
  if (_21 == 0)
    goto <bb 13>; [INV]
  else
    goto <bb 14>; [INV]

  <bb 13> :
  iftmp.2_61 = 1;
  goto <bb 15>; [INV]

  <bb 14> :
  iftmp.2_60 = 0;

  <bb 15> :
  # iftmp.2_38 = PHI <iftmp.2_61(13), iftmp.2_60(14)>
  _22 = (_Bool) iftmp.2_38;
  DevAssert (_22);
  Index_63 = 0;
  goto <bb 17>; [INV]

  <bb 16> :
  _23 = ClearStructPtr_56 + Index_35;
  *_23 = 0;
  Index_76 = Index_35 + 1;

  <bb 17> :
  # Index_35 = PHI <Index_63(15), Index_76(16)>
  if (Index_35 <= 31)
    goto <bb 16>; [INV]
  else
    goto <bb 18>; [INV]

  <bb 18> :
  Lpuart_Uart_Ip_Hw_Init (Base_52);
  _24 = UserConfig_45(D)->BaudOverSamplingRatio;
  if (_24 <= 7)
    goto <bb 19>; [INV]
  else
    goto <bb 20>; [INV]

  <bb 19> :
  Lpuart_Uart_Ip_EnableBothEdgeSamplingCmd (Base_52);

  <bb 20> :
  _25 = UserConfig_45(D)->BaudOverSamplingRatio;
  _26 = (long unsigned int) _25;
  _27 = _26 + 4294967295;
  Lpuart_Uart_Ip_SetOversamplingRatio (Base_52, _27);
  _28 = UserConfig_45(D)->BaudRateDivisor;
  Lpuart_Uart_Ip_SetBaudRateDivisor (Base_52, _28);
  _29 = UserConfig_45(D)->ParityMode;
  if (_29 != 0)
    goto <bb 21>; [INV]
  else
    goto <bb 22>; [INV]

  <bb 21> :
  _30 = UserConfig_45(D)->BitCountPerChar;
  Lpuart_Uart_Ip_SetBitCountPerChar (Base_52, _30, 1);
  goto <bb 23>; [INV]

  <bb 22> :
  _31 = UserConfig_45(D)->BitCountPerChar;
  Lpuart_Uart_Ip_SetBitCountPerChar (Base_52, _31, 0);

  <bb 23> :
  _32 = UserConfig_45(D)->ParityMode;
  Lpuart_Uart_Ip_SetParityMode (Base_52, _32);
  _33 = UserConfig_45(D)->StopBitsCount;
  Lpuart_Uart_Ip_SetStopBitCount (Base_52, _33);
  UartStatePtr_54->TransmitStatus ={v} 0;
  UartStatePtr_54->ReceiveStatus ={v} 0;
  _34 = UserConfig_45(D)->BaudRate;
  UartStatePtr_54->BaudRate = _34;
  return;

}


DevAssert (volatile boolean x)
{
  _Bool x.3_1;

  <bb 2> :
  x.3_1 ={v} x;
  if (x.3_1 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 3>; [INV]

  <bb 3> :
  goto <bb 3>; [INV]

  <bb 4> :
  return;

}


Lpuart_Uart_Ip_FlushRxBuffer (struct LPUART_Type * Base)
{
  long unsigned int _1;
  long unsigned int _2;

  <bb 2> :
  _1 ={v} Base_4(D)->FIFO;
  _2 = _1 | 16384;
  Base_4(D)->FIFO ={v} _2;
  return;

}


Lpuart_Uart_Ip_FlushTxBuffer (struct LPUART_Type * Base)
{
  long unsigned int _1;
  long unsigned int _2;

  <bb 2> :
  _1 ={v} Base_4(D)->FIFO;
  _2 = _1 | 32768;
  Base_4(D)->FIFO ={v} _2;
  return;

}


Lpuart_Uart_Ip_CheckTimeout (uint32 * StartTime, uint32 * ElapsedTicks, uint32 TimeoutTicks, OsIf_CounterType OsifCounter)
{
  uint32 CurrentElapsedTicks;
  boolean D.6670;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  boolean _12;

  <bb 2> :
  CurrentElapsedTicks_8 = OsIf_GetElapsed (StartTime_5(D), OsifCounter_6(D));
  _1 = *ElapsedTicks_9(D);
  _2 = CurrentElapsedTicks_8 + _1;
  *ElapsedTicks_9(D) = _2;
  _3 = *ElapsedTicks_9(D);
  _12 = TimeoutTicks_11(D) <= _3;

  <bb 3> :
<L0>:
  return _12;

}


Lpuart_Uart_Ip_StartTimeout (uint32 * StartTimeOut, uint32 * TimeoutTicksOut, uint32 TimeoutUs, OsIf_CounterType OsifCounter)
{
  long unsigned int _1;
  long unsigned int _2;

  <bb 2> :
  _1 = OsIf_GetCounter (OsifCounter_4(D));
  *StartTimeOut_6(D) = _1;
  _2 = OsIf_MicrosToTicks (TimeoutUs_8(D), OsifCounter_4(D));
  *TimeoutTicksOut_10(D) = _2;
  return;

}


Lpuart_Uart_Ip_ClearErrorFlags (struct LPUART_Type * Base)
{
  uint32 Mask;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;

  <bb 2> :
  Mask_4 = 983040;
  _1 ={v} Base_6(D)->STAT;
  _2 = _1 & 1071661055;
  _3 = Mask_4 | _2;
  Base_6(D)->STAT ={v} _3;
  return;

}


Lpuart_Uart_Ip_ClearStatusFlagWithMask (struct LPUART_Type * Base, uint32 Mask)
{
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;

  <bb 2> :
  _1 ={v} Base_5(D)->STAT;
  _2 = _1 & 1071661055;
  _3 = Mask_6(D) | _2;
  Base_5(D)->STAT ={v} _3;
  return;

}


Lpuart_Uart_Ip_ClearStatusFlag (struct LPUART_Type * Base, Lpuart_Uart_Ip_StatusFlagType StatusFlag)
{
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  long unsigned int _8;
  long unsigned int _9;
  long unsigned int _10;
  long unsigned int _11;
  long unsigned int _12;

  <bb 2> :
  switch (StatusFlag_14(D)) <default: <L4> [INV], case 16: <L3> [INV], case 17: <L2> [INV], case 18: <L1> [INV], case 19: <L0> [INV]>

  <bb 3> :
<L0>:
  _1 ={v} Base_16(D)->STAT;
  _2 = _1 & 1071661055;
  _3 = _2 | 524288;
  Base_16(D)->STAT ={v} _3;
  goto <bb 8>; [INV]

  <bb 4> :
<L1>:
  _4 ={v} Base_16(D)->STAT;
  _5 = _4 & 1071661055;
  _6 = _5 | 262144;
  Base_16(D)->STAT ={v} _6;
  goto <bb 8>; [INV]

  <bb 5> :
<L2>:
  _7 ={v} Base_16(D)->STAT;
  _8 = _7 & 1071661055;
  _9 = _8 | 131072;
  Base_16(D)->STAT ={v} _9;
  goto <bb 8>; [INV]

  <bb 6> :
<L3>:
  _10 ={v} Base_16(D)->STAT;
  _11 = _10 & 1071661055;
  _12 = _11 | 65536;
  Base_16(D)->STAT ={v} _12;
  goto <bb 8>; [INV]

  <bb 7> :
<L4>:

  <bb 8> :
  return;

}


Lpuart_Uart_Ip_GetStatusFlag (const struct LPUART_Type * Base, Lpuart_Uart_Ip_StatusFlagType StatusFlag)
{
  boolean RetVal;
  boolean D.6668;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  boolean _9;

  <bb 2> :
  RetVal_4 = 0;
  _1 ={v} Base_6(D)->STAT;
  _2 = _1 >> StatusFlag_7(D);
  _3 = _2 & 1;
  RetVal_8 = _3 != 0;
  _9 = RetVal_8;

  <bb 3> :
<L0>:
  return _9;

}


Lpuart_Uart_Ip_Getchar10 (const struct LPUART_Type * Base)
{
  uint16 ReadData;
  uint16 D.6992;
  unsigned char D.6991;
  short unsigned int D.6990;
  long unsigned int _1;
  long unsigned int _2;
  short unsigned int _3;
  short unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  short unsigned int _7;
  short unsigned int _8;
  long unsigned int _9;
  short unsigned int _10;
  short unsigned int _14;
  unsigned char _16;
  uint16 _18;

  <bb 2> :
  _1 ={v} Base_12(D)->CTRL;
  _2 = _1 >> 30;
  _3 = (short unsigned int) _2;
  _4 = _3 << 9;
  ReadData_13 = _4 & 512;
  _5 ={v} Base_12(D)->CTRL;
  _6 = _5 >> 31;
  _7 = (short unsigned int) _6;
  _8 = _7 << 8;
  _14 = _8 & 256;
  ReadData_15 = _14 | ReadData_13;
  _9 ={v} Base_12(D)->DATA;
  _16 = (unsigned char) _9;
  _10 = (short unsigned int) _16;
  ReadData_17 = ReadData_15 | _10;
  _18 = ReadData_17;

  <bb 3> :
<L0>:
  return _18;

}


Lpuart_Uart_Ip_Getchar9 (const struct LPUART_Type * Base)
{
  uint16 ReadData;
  uint16 D.6988;
  unsigned char D.6987;
  long unsigned int _1;
  long unsigned int _2;
  short unsigned int _3;
  short unsigned int _4;
  long unsigned int _5;
  short unsigned int _6;
  unsigned char _10;
  uint16 _12;

  <bb 2> :
  _1 ={v} Base_8(D)->CTRL;
  _2 = _1 >> 31;
  _3 = (short unsigned int) _2;
  _4 = _3 << 8;
  ReadData_9 = _4 & 256;
  _5 ={v} Base_8(D)->DATA;
  _10 = (unsigned char) _5;
  _6 = (short unsigned int) _10;
  ReadData_11 = ReadData_9 | _6;
  _12 = ReadData_11;

  <bb 3> :
<L0>:
  return _12;

}


Lpuart_Uart_Ip_Getchar (const struct LPUART_Type * Base)
{
  uint8 D.6744;
  long unsigned int _1;
  uint8 _4;

  <bb 2> :
  _1 ={v} Base_3(D)->DATA;
  _4 = (uint8) _1;

  <bb 3> :
<L0>:
  return _4;

}


Lpuart_Uart_Ip_Putchar10 (struct LPUART_Type * Base, uint16 Data)
{
  volatile uint8 * DataRegBytes;
  uint32 CtrlRegVal;
  uint8 TenthDataBit;
  uint8 NinthDataBit;
  short unsigned int _1;
  unsigned char _2;
  short unsigned int _3;
  unsigned char _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  long unsigned int _8;
  long unsigned int _9;
  long unsigned int _10;
  unsigned char _11;

  <bb 2> :
  DataRegBytes_13 = &Base_12(D)->DATA;
  _1 = Data_14(D) >> 8;
  _2 = (unsigned char) _1;
  NinthDataBit_15 = _2 & 1;
  _3 = Data_14(D) >> 9;
  _4 = (unsigned char) _3;
  TenthDataBit_16 = _4 & 1;
  CtrlRegVal_18 ={v} Base_12(D)->CTRL;
  _5 = CtrlRegVal_18 & 3221225471;
  _6 = (long unsigned int) NinthDataBit_15;
  _7 = _6 << 30;
  CtrlRegVal_19 = _5 | _7;
  _8 = CtrlRegVal_19 & 2147483647;
  _9 = (long unsigned int) TenthDataBit_16;
  _10 = _9 << 31;
  CtrlRegVal_20 = _8 | _10;
  Base_12(D)->CTRL ={v} CtrlRegVal_20;
  _11 = (unsigned char) Data_14(D);
  *DataRegBytes_13 ={v} _11;
  return;

}


Lpuart_Uart_Ip_Putchar9 (struct LPUART_Type * Base, uint16 Data)
{
  volatile uint8 * DataRegBytes;
  uint8 NinthDataBit;
  short unsigned int _1;
  unsigned char _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  unsigned char _8;

  <bb 2> :
  DataRegBytes_10 = &Base_9(D)->DATA;
  _1 = Data_11(D) >> 8;
  _2 = (unsigned char) _1;
  NinthDataBit_12 = _2 & 1;
  _3 ={v} Base_9(D)->CTRL;
  _4 = _3 & 3221225471;
  _5 = (long unsigned int) NinthDataBit_12;
  _6 = _5 << 30;
  _7 = _4 | _6;
  Base_9(D)->CTRL ={v} _7;
  _8 = (unsigned char) Data_11(D);
  *DataRegBytes_10 ={v} _8;
  return;

}


Lpuart_Uart_Ip_Putchar (struct LPUART_Type * Base, uint8 Data)
{
  volatile uint8 * DataRegBytes;

  <bb 2> :
  DataRegBytes_2 = &Base_1(D)->DATA;
  *DataRegBytes_2 ={v} Data_4(D);
  return;

}


Lpuart_Uart_Ip_SetRxDmaCmd (struct LPUART_Type * Base, boolean Enable)
{
  long unsigned int iftmp.28;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int iftmp.28_4;
  long unsigned int iftmp.28_8;
  long unsigned int iftmp.28_9;

  <bb 2> :
  _1 ={v} Base_6(D)->BAUD;
  _2 = _1 & 4292870143;
  if (Enable_7(D) != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.28_9 = 2097152;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.28_8 = 0;

  <bb 5> :
  # iftmp.28_4 = PHI <iftmp.28_9(3), iftmp.28_8(4)>
  _3 = iftmp.28_4 | _2;
  Base_6(D)->BAUD ={v} _3;
  return;

}


Lpuart_Uart_Ip_SetTxDmaCmd (struct LPUART_Type * Base, boolean Enable)
{
  long unsigned int iftmp.18;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int iftmp.18_4;
  long unsigned int iftmp.18_8;
  long unsigned int iftmp.18_9;

  <bb 2> :
  _1 ={v} Base_6(D)->BAUD;
  _2 = _1 & 4286578687;
  if (Enable_7(D) != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.18_9 = 8388608;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.18_8 = 0;

  <bb 5> :
  # iftmp.18_4 = PHI <iftmp.18_9(3), iftmp.18_8(4)>
  _3 = iftmp.18_4 | _2;
  Base_6(D)->BAUD ={v} _3;
  return;

}


Lpuart_Uart_Ip_GetIntMode (const struct LPUART_Type * Base, Lpuart_Uart_Ip_InterruptType IntSrc)
{
  boolean RetVal;
  boolean D.6834;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  boolean _9;

  <bb 2> :
  RetVal_4 = 0;
  _1 ={v} Base_6(D)->CTRL;
  _2 = _1 >> IntSrc_7(D);
  _3 = _2 & 1;
  RetVal_8 = _3 != 0;
  _9 = RetVal_8;

  <bb 3> :
<L0>:
  return _9;

}


Lpuart_Uart_Ip_SetIntMode (struct LPUART_Type * Base, Lpuart_Uart_Ip_InterruptType IntSrc, boolean Enable)
{
  unsigned int iftmp.5;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  unsigned int _5;
  long unsigned int _6;
  unsigned int iftmp.5_7;
  unsigned int iftmp.5_12;
  unsigned int iftmp.5_13;

  <bb 2> :
  _1 ={v} Base_9(D)->CTRL;
  _2 = 1 << IntSrc_10(D);
  _3 = ~_2;
  _4 = _1 & _3;
  if (Enable_11(D) != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.5_13 = 1;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.5_12 = 0;

  <bb 5> :
  # iftmp.5_7 = PHI <iftmp.5_13(3), iftmp.5_12(4)>
  _5 = iftmp.5_7 << IntSrc_10(D);
  _6 = _4 | _5;
  Base_9(D)->CTRL ={v} _6;
  return;

}


Lpuart_Uart_Ip_SetStopBitCount (struct LPUART_Type * Base, Lpuart_Uart_Ip_StopBitCountType StopBitCount)
{
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;

  <bb 2> :
  _1 ={v} Base_6(D)->BAUD;
  _2 = _1 & 4294959103;
  _3 = StopBitCount_7(D) << 13;
  _4 = _2 | _3;
  Base_6(D)->BAUD ={v} _4;
  return;

}


Lpuart_Uart_Ip_SetParityMode (struct LPUART_Type * Base, Lpuart_Uart_Ip_ParityModeType ParityModeType)
{
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  long unsigned int _8;

  <bb 2> :
  _1 ={v} Base_10(D)->CTRL;
  _2 = _1 & 4294967293;
  _3 = ParityModeType_11(D) & 4294967294;
  _4 = _2 | _3;
  Base_10(D)->CTRL ={v} _4;
  _5 ={v} Base_10(D)->CTRL;
  _6 = _5 & 4294967294;
  _7 = ParityModeType_11(D) & 1;
  _8 = _6 | _7;
  Base_10(D)->CTRL ={v} _8;
  return;

}


Lpuart_Uart_Ip_SetBitCountPerChar (struct LPUART_Type * Base, Lpuart_Uart_Ip_BitCountPerCharType BitCountPerChar, boolean Parity)
{
  uint32 TmpBitCountPerChar;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;
  long unsigned int _7;
  long unsigned int _8;
  long unsigned int _9;
  long unsigned int _10;
  long unsigned int _11;
  long unsigned int _12;

  <bb 2> :
  TmpBitCountPerChar_17 = BitCountPerChar_16(D);
  if (Parity_18(D) != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  TmpBitCountPerChar_19 = TmpBitCountPerChar_17 + 1;

  <bb 4> :
  # TmpBitCountPerChar_13 = PHI <TmpBitCountPerChar_17(2), TmpBitCountPerChar_19(3)>
  if (TmpBitCountPerChar_13 == 3)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  _1 ={v} Base_22(D)->BAUD;
  _2 = _1 | 536870912;
  Base_22(D)->BAUD ={v} _2;
  goto <bb 12>; [INV]

  <bb 6> :
  if (BitCountPerChar_16(D) == 0)
    goto <bb 7>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 7> :
  if (Parity_18(D) != 0)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  _3 ={v} Base_22(D)->CTRL;
  _4 = _3 & 4294965231;
  Base_22(D)->CTRL ={v} _4;
  goto <bb 11>; [INV]

  <bb 9> :
  _5 ={v} Base_22(D)->CTRL;
  _6 = _5 | 2048;
  Base_22(D)->CTRL ={v} _6;
  goto <bb 11>; [INV]

  <bb 10> :
  TmpBitCountPerChar_20 = TmpBitCountPerChar_13 + 4294967295;
  _7 ={v} Base_22(D)->CTRL;
  _8 = _7 & 4294967279;
  _9 = TmpBitCountPerChar_20 << 4;
  _10 = _8 | _9;
  Base_22(D)->CTRL ={v} _10;

  <bb 11> :
  _11 ={v} Base_22(D)->BAUD;
  _12 = _11 & 3758096383;
  Base_22(D)->BAUD ={v} _12;

  <bb 12> :
  return;

}


Lpuart_Uart_Ip_EnableBothEdgeSamplingCmd (struct LPUART_Type * Base)
{
  long unsigned int _1;
  long unsigned int _2;

  <bb 2> :
  _1 ={v} Base_4(D)->BAUD;
  _2 = _1 | 131072;
  Base_4(D)->BAUD ={v} _2;
  return;

}


Lpuart_Uart_Ip_SetOversamplingRatio (struct LPUART_Type * Base, uint32 OverSamplingRatio)
{
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  _1 ={v} Base_7(D)->BAUD;
  _2 = _1 & 3774873599;
  _3 = OverSamplingRatio_8(D) << 24;
  _4 = _3 & 520093696;
  _5 = _2 | _4;
  Base_7(D)->BAUD ={v} _5;
  return;

}


Lpuart_Uart_Ip_SetBaudRateDivisor (struct LPUART_Type * Base, uint32 baudRateDivisor)
{
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;

  <bb 2> :
  _1 ={v} Base_6(D)->BAUD;
  _2 = _1 & 4294959104;
  _3 = baudRateDivisor_7(D) & 8191;
  _4 = _2 | _3;
  Base_6(D)->BAUD ={v} _4;
  return;

}


Lpuart_Uart_Ip_SetReceiverCmd (struct LPUART_Type * Base, boolean Enable)
{
  long unsigned int iftmp.13;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int iftmp.13_4;
  long unsigned int iftmp.13_8;
  long unsigned int iftmp.13_9;

  <bb 2> :
  _1 ={v} Base_6(D)->CTRL;
  _2 = _1 & 4294705151;
  if (Enable_7(D) != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.13_9 = 262144;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.13_8 = 0;

  <bb 5> :
  # iftmp.13_4 = PHI <iftmp.13_9(3), iftmp.13_8(4)>
  _3 = iftmp.13_4 | _2;
  Base_6(D)->CTRL ={v} _3;
  return;

}


Lpuart_Uart_Ip_SetTransmitterCmd (struct LPUART_Type * Base, boolean Enable)
{
  long unsigned int iftmp.9;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int iftmp.9_4;
  long unsigned int iftmp.9_8;
  long unsigned int iftmp.9_9;

  <bb 2> :
  _1 ={v} Base_6(D)->CTRL;
  _2 = _1 & 4294443007;
  if (Enable_7(D) != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  iftmp.9_9 = 524288;
  goto <bb 5>; [INV]

  <bb 4> :
  iftmp.9_8 = 0;

  <bb 5> :
  # iftmp.9_4 = PHI <iftmp.9_9(3), iftmp.9_8(4)>
  _3 = iftmp.9_4 | _2;
  Base_6(D)->CTRL ={v} _3;
  return;

}


Lpuart_Uart_Ip_Hw_Init (struct LPUART_Type * Base)
{
  <bb 2> :
  Base_2(D)->BAUD ={v} 251658244;
  Base_2(D)->STAT ={v} 3223306240;
  Base_2(D)->CTRL ={v} 0;
  return;

}


