
Marking local functions:


Marking externally visible functions: Cache_Ip_CleanByAddr Cache_Ip_InvalidateByAddr Cache_Ip_Clean Cache_Ip_Invalidate Cache_Ip_Disable Cache_Ip_Enable


Marking externally visible variables:


Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:

SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/30 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18) @06d68620
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_CleanByAddr/15 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/29 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18) @06d68540
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_CleanByAddr/15 
  Calls: 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/28 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17) @06d68380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_InvalidateByAddr/14 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/27 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17) @06d682a0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_InvalidateByAddr/14 
  Calls: 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/26 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16) @06d680e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_Clean/13 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/25 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16) @06d68000
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_Clean/13 
  Calls: 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/24 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15) @06b05e00
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_Invalidate/12 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/23 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15) @06b05d20
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_Invalidate/12 
  Calls: 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/22 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14) @06b05b60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_Disable/11 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/21 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14) @06b05a80
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_Disable/11 
  Calls: 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/20 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13) @06b058c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_Enable/10 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/19 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13) @06b057e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Cache_Ip_Enable/10 
  Calls: 
OsIf_GetElapsed/18 (OsIf_GetElapsed) @06afdb60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: hwAcc_Lmem_ProcessorCodeCacheDisable/5 hwAcc_Lmem_ProcessorCodeCacheEnable/4 hwAcc_Lmem_AddressReg/3 hwAcc_Lmem_LineControlReg/2 hwAcc_Lmem_ControlReg/1 
  Calls: 
OsIf_GetCounter/17 (OsIf_GetCounter) @06afd8c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: hwAcc_Lmem_ProcessorCodeCacheDisable/5 hwAcc_Lmem_ProcessorCodeCacheEnable/4 hwAcc_Lmem_AddressReg/3 hwAcc_Lmem_LineControlReg/2 hwAcc_Lmem_ControlReg/1 
  Calls: 
OsIf_MicrosToTicks/16 (OsIf_MicrosToTicks) @06afd620
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: hwAcc_Lmem_ProcessorCodeCacheDisable/5 hwAcc_Lmem_ProcessorCodeCacheEnable/4 hwAcc_Lmem_AddressReg/3 hwAcc_Lmem_LineControlReg/2 hwAcc_Lmem_ControlReg/1 
  Calls: 
Cache_Ip_CleanByAddr/15 (Cache_Ip_CleanByAddr) @06afdd20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/30 hwAcc_Lmem_ProcessorCodeCacheCleanByAddr/9 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/29 
Cache_Ip_InvalidateByAddr/14 (Cache_Ip_InvalidateByAddr) @06afda80
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/28 hwAcc_Lmem_ProcessorCodeInvalidateByAddr/8 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/27 
Cache_Ip_Clean/13 (Cache_Ip_Clean) @06afd7e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/26 hwAcc_Lmem_ProcessorCodeClean/7 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/25 
Cache_Ip_Invalidate/12 (Cache_Ip_Invalidate) @06afd540
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/24 hwAcc_Lmem_ProcessorCodeInvalidate/6 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/23 
Cache_Ip_Disable/11 (Cache_Ip_Disable) @06afd2a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/22 hwAcc_Lmem_ProcessorCodeCacheDisable/5 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/21 
Cache_Ip_Enable/10 (Cache_Ip_Enable) @06afd000
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/20 hwAcc_Lmem_ProcessorCodeCacheEnable/4 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/19 
hwAcc_Lmem_ProcessorCodeCacheCleanByAddr/9 (hwAcc_Lmem_ProcessorCodeCacheCleanByAddr) @06c0ee00
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: Cache_Ip_CleanByAddr/15 
  Calls: hwAcc_Lmem_AddressReg/3 hwAcc_Lmem_LineControlReg/2 hwAcc_Lmem_LineControlReg/2 
hwAcc_Lmem_ProcessorCodeInvalidateByAddr/8 (hwAcc_Lmem_ProcessorCodeInvalidateByAddr) @06c0e9a0
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: Cache_Ip_InvalidateByAddr/14 
  Calls: hwAcc_Lmem_AddressReg/3 hwAcc_Lmem_LineControlReg/2 
hwAcc_Lmem_ProcessorCodeClean/7 (hwAcc_Lmem_ProcessorCodeClean) @06c0e620
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: Cache_Ip_Clean/13 
  Calls: hwAcc_Lmem_ControlReg/1 hwAcc_Lmem_ControlReg/1 
hwAcc_Lmem_ProcessorCodeInvalidate/6 (hwAcc_Lmem_ProcessorCodeInvalidate) @06c0e380
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: Cache_Ip_Invalidate/12 
  Calls: hwAcc_Lmem_ControlReg/1 
hwAcc_Lmem_ProcessorCodeCacheDisable/5 (hwAcc_Lmem_ProcessorCodeCacheDisable) @06c0e0e0
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: Cache_Ip_Disable/11 
  Calls: OsIf_GetElapsed/18 OsIf_GetCounter/17 OsIf_MicrosToTicks/16 
hwAcc_Lmem_ProcessorCodeCacheEnable/4 (hwAcc_Lmem_ProcessorCodeCacheEnable) @06c069a0
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: Cache_Ip_Enable/10 
  Calls: OsIf_GetElapsed/18 OsIf_GetCounter/17 OsIf_MicrosToTicks/16 
hwAcc_Lmem_AddressReg/3 (hwAcc_Lmem_AddressReg) @06c06e00
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: hwAcc_Lmem_ProcessorCodeCacheCleanByAddr/9 hwAcc_Lmem_ProcessorCodeInvalidateByAddr/8 
  Calls: OsIf_GetElapsed/18 OsIf_GetCounter/17 OsIf_MicrosToTicks/16 
hwAcc_Lmem_LineControlReg/2 (hwAcc_Lmem_LineControlReg) @06c06b60
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: hwAcc_Lmem_ProcessorCodeCacheCleanByAddr/9 hwAcc_Lmem_ProcessorCodeCacheCleanByAddr/9 hwAcc_Lmem_ProcessorCodeInvalidateByAddr/8 
  Calls: OsIf_GetElapsed/18 OsIf_GetCounter/17 OsIf_MicrosToTicks/16 
hwAcc_Lmem_ControlReg/1 (hwAcc_Lmem_ControlReg) @06c068c0
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: hwAcc_Lmem_ProcessorCodeClean/7 hwAcc_Lmem_ProcessorCodeClean/7 hwAcc_Lmem_ProcessorCodeInvalidate/6 
  Calls: OsIf_GetElapsed/18 OsIf_GetCounter/17 OsIf_MicrosToTicks/16 
g_ptLmemBasePtrArray/0 (g_ptLmemBasePtrArray) @06af3d38
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Varpool flags: initialized read-only const-value-known
Cache_Ip_CleanByAddr (const Cache_Ip_Type CacheType, const boolean EnInvalidate, const uint32 Addr, const uint32 Length)
{
  Std_ReturnType Status;
  Std_ReturnType D.5992;

  <bb 2> :
  Status = 0;
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18 ();
  switch (CacheType) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV]>

  <bb 3> :
<L0>:
  Status = hwAcc_Lmem_ProcessorCodeCacheCleanByAddr (EnInvalidate, Addr, Length);
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:

  <bb 7> :
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18 ();
  D.5992 = Status;

  <bb 8> :
<L5>:
  return D.5992;

}


Cache_Ip_InvalidateByAddr (const Cache_Ip_Type CacheType, const uint32 Addr, const uint32 Length)
{
  Std_ReturnType Status;
  Std_ReturnType D.5990;

  <bb 2> :
  Status = 0;
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17 ();
  switch (CacheType) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV]>

  <bb 3> :
<L0>:
  Status = hwAcc_Lmem_ProcessorCodeInvalidateByAddr (Addr, Length);
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:

  <bb 7> :
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17 ();
  D.5990 = Status;

  <bb 8> :
<L5>:
  return D.5990;

}


Cache_Ip_Clean (const Cache_Ip_Type CacheType, const boolean EnInvalidate)
{
  Std_ReturnType Status;
  Std_ReturnType D.5988;

  <bb 2> :
  Status = 0;
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16 ();
  switch (CacheType) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV]>

  <bb 3> :
<L0>:
  Status = hwAcc_Lmem_ProcessorCodeClean (EnInvalidate);
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:

  <bb 7> :
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16 ();
  D.5988 = Status;

  <bb 8> :
<L5>:
  return D.5988;

}


Cache_Ip_Invalidate (const Cache_Ip_Type CacheType)
{
  Std_ReturnType Status;
  Std_ReturnType D.5986;

  <bb 2> :
  Status = 0;
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15 ();
  switch (CacheType) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV]>

  <bb 3> :
<L0>:
  Status = hwAcc_Lmem_ProcessorCodeInvalidate ();
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:

  <bb 7> :
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15 ();
  D.5986 = Status;

  <bb 8> :
<L5>:
  return D.5986;

}


Cache_Ip_Disable (const Cache_Ip_Type CacheType)
{
  Std_ReturnType Status;
  Std_ReturnType D.5984;

  <bb 2> :
  Status = 0;
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14 ();
  switch (CacheType) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV]>

  <bb 3> :
<L0>:
  Status = hwAcc_Lmem_ProcessorCodeCacheDisable ();
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:

  <bb 7> :
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14 ();
  D.5984 = Status;

  <bb 8> :
<L5>:
  return D.5984;

}


Cache_Ip_Enable (const Cache_Ip_Type CacheType)
{
  Std_ReturnType Status;
  Std_ReturnType D.5982;

  <bb 2> :
  Status = 0;
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13 ();
  switch (CacheType) <default: <L3> [INV], case 0: <L0> [INV], case 1: <L1> [INV], case 2: <L2> [INV]>

  <bb 3> :
<L0>:
  Status = hwAcc_Lmem_ProcessorCodeCacheEnable ();
  goto <bb 7>; [INV]

  <bb 4> :
<L1>:
  goto <bb 7>; [INV]

  <bb 5> :
<L2>:
  goto <bb 7>; [INV]

  <bb 6> :
<L3>:

  <bb 7> :
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13 ();
  D.5982 = Status;

  <bb 8> :
<L5>:
  return D.5982;

}


hwAcc_Lmem_ProcessorCodeCacheCleanByAddr (const boolean enInvalidate, const uint32 addr, const uint32 length)
{
  uint32 locEndAddr;
  uint32 locStartAddr;
  Std_ReturnType locStatus;
  Std_ReturnType D.5980;

  <bb 2> :
  locStatus = 0;
  locStartAddr = addr & 4294967280;
  locEndAddr = addr + length;
  if (enInvalidate != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  _1 = 3758628864B;
  locStatus = hwAcc_Lmem_LineControlReg (_1, 117506048, 0);
  goto <bb 5>; [INV]

  <bb 4> :
  _2 = 3758628864B;
  locStatus = hwAcc_Lmem_LineControlReg (_2, 100728832, 0);

  <bb 5> :
  goto <bb 7>; [INV]

  <bb 6> :
  _3 = 3758628864B;
  locStatus = hwAcc_Lmem_AddressReg (_3, locStartAddr, 1);
  locStartAddr = locStartAddr + 16;

  <bb 7> :
  if (locStartAddr < locEndAddr)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  if (locStatus == 0)
    goto <bb 6>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 9> :
  D.5980 = locStatus;

  <bb 10> :
<L7>:
  return D.5980;

}


hwAcc_Lmem_ProcessorCodeInvalidateByAddr (const uint32 addr, const uint32 length)
{
  uint32 locEndAddr;
  uint32 locStartAddr;
  Std_ReturnType locStatus;
  Std_ReturnType D.5974;

  <bb 2> :
  locStatus = 0;
  locStartAddr = addr & 4294967280;
  locEndAddr = addr + length;
  _1 = 3758628864B;
  locStatus = hwAcc_Lmem_LineControlReg (_1, 83951616, 0);
  goto <bb 4>; [INV]

  <bb 3> :
  _2 = 3758628864B;
  locStatus = hwAcc_Lmem_AddressReg (_2, locStartAddr, 1);
  locStartAddr = locStartAddr + 16;

  <bb 4> :
  if (locStartAddr < locEndAddr)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (locStatus == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  D.5974 = locStatus;

  <bb 7> :
<L4>:
  return D.5974;

}


hwAcc_Lmem_ProcessorCodeClean (const boolean enInvalidate)
{
  Std_ReturnType locStatus;
  Std_ReturnType D.5971;

  <bb 2> :
  locStatus = 0;
  _1 = ~enInvalidate;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  _2 = 3758628864B;
  locStatus = hwAcc_Lmem_ControlReg (_2, 167772160, 2147483648);
  goto <bb 5>; [INV]

  <bb 4> :
  _3 = 3758628864B;
  locStatus = hwAcc_Lmem_ControlReg (_3, 251658240, 2147483648);

  <bb 5> :
  D.5971 = locStatus;

  <bb 6> :
<L3>:
  return D.5971;

}


hwAcc_Lmem_ProcessorCodeInvalidate ()
{
  Std_ReturnType locStatus;
  Std_ReturnType D.5966;

  <bb 2> :
  locStatus = 0;
  _1 = 3758628864B;
  locStatus = hwAcc_Lmem_ControlReg (_1, 83886080, 2147483648);
  D.5966 = locStatus;

  <bb 3> :
<L0>:
  return D.5966;

}


hwAcc_Lmem_ProcessorCodeCacheDisable ()
{
  uint32 locReg;
  uint32 locElapsedTicks;
  uint32 locCurrentTicks;
  uint32 locTimeoutTicks;
  Std_ReturnType locStatus;
  Std_ReturnType D.5963;
  long unsigned int D.5959;

  <bb 2> :
  locStatus = 0;
  locTimeoutTicks = OsIf_MicrosToTicks (100000, 0);
  _1 = OsIf_GetCounter (0);
  locCurrentTicks = _1;
  locElapsedTicks = 0;
  _2 = 3758628864B;
  locReg = _2->PCCCR;
  locReg = locReg & 4294967294;
  _3 = 3758628864B;
  _3->PCCCR = locReg;
  goto <bb 4>; [INV]

  <bb 3> :
  D.5959 = OsIf_GetElapsed (&locCurrentTicks, 0);
  locElapsedTicks = D.5959 + locElapsedTicks;

  <bb 4> :
  _4 = 3758628864B;
  _5 = _4->PCCCR;
  _6 = _5 & 1;
  if (_6 == 1)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (locElapsedTicks < locTimeoutTicks)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  if (locElapsedTicks >= locTimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  locStatus = 1;

  <bb 8> :
  D.5963 = locStatus;
  locCurrentTicks = {CLOBBER};

  <bb 9> :
<L7>:
  return D.5963;

}


hwAcc_Lmem_ProcessorCodeCacheEnable ()
{
  uint32 locReg;
  uint32 locElapsedTicks;
  uint32 locCurrentTicks;
  uint32 locTimeoutTicks;
  Std_ReturnType locStatus;
  Std_ReturnType D.5956;
  long unsigned int D.5952;

  <bb 2> :
  locStatus = 0;
  locTimeoutTicks = OsIf_MicrosToTicks (100000, 0);
  _1 = OsIf_GetCounter (0);
  locCurrentTicks = _1;
  locElapsedTicks = 0;
  _2 = 3758628864B;
  locReg = _2->PCCCR;
  locReg = locReg | 1;
  _3 = 3758628864B;
  _3->PCCCR = locReg;
  goto <bb 4>; [INV]

  <bb 3> :
  D.5952 = OsIf_GetElapsed (&locCurrentTicks, 0);
  locElapsedTicks = D.5952 + locElapsedTicks;

  <bb 4> :
  _4 = 3758628864B;
  _5 = _4->PCCCR;
  _6 = _5 & 1;
  if (_6 != 1)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (locElapsedTicks < locTimeoutTicks)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  if (locElapsedTicks >= locTimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  locStatus = 1;

  <bb 8> :
  D.5956 = locStatus;
  locCurrentTicks = {CLOBBER};

  <bb 9> :
<L7>:
  return D.5956;

}


hwAcc_Lmem_AddressReg (struct LMEM_Type * pInst, uint32 Address, uint32 GoMask)
{
  uint32 locReg;
  uint32 locElapsedTicks;
  uint32 locCurrentTicks;
  uint32 locTimeoutTicks;
  Std_ReturnType locStatus;
  Std_ReturnType D.5949;
  long unsigned int D.5945;

  <bb 2> :
  locStatus = 0;
  locTimeoutTicks = OsIf_MicrosToTicks (100000, 0);
  _1 = OsIf_GetCounter (0);
  locCurrentTicks = _1;
  locElapsedTicks = 0;
  locReg = pInst->PCCSAR;
  locReg = locReg & 3;
  _2 = Address & 4294967292;
  _3 = GoMask | _2;
  locReg = locReg | _3;
  pInst->PCCSAR = locReg;
  if (GoMask != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 3> :
  goto <bb 5>; [INV]

  <bb 4> :
  D.5945 = OsIf_GetElapsed (&locCurrentTicks, 0);
  locElapsedTicks = D.5945 + locElapsedTicks;

  <bb 5> :
  _4 = pInst->PCCSAR;
  _5 = GoMask & _4;
  if (GoMask == _5)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  if (locElapsedTicks < locTimeoutTicks)
    goto <bb 4>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (locElapsedTicks >= locTimeoutTicks)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  locStatus = 1;

  <bb 9> :
  D.5949 = locStatus;
  locCurrentTicks = {CLOBBER};

  <bb 10> :
<L9>:
  return D.5949;

}


hwAcc_Lmem_LineControlReg (struct LMEM_Type * pInst, uint32 LineControlMask, uint32 GoMask)
{
  uint32 locReg;
  uint32 locElapsedTicks;
  uint32 locCurrentTicks;
  uint32 locTimeoutTicks;
  Std_ReturnType locStatus;
  Std_ReturnType D.5940;
  long unsigned int D.5936;

  <bb 2> :
  locStatus = 0;
  locTimeoutTicks = OsIf_MicrosToTicks (100000, 0);
  _1 = OsIf_GetCounter (0);
  locCurrentTicks = _1;
  locElapsedTicks = 0;
  locReg = pInst->PCCLCR;
  _2 = ~LineControlMask;
  locReg = locReg & _2;
  _3 = LineControlMask | GoMask;
  locReg = locReg | _3;
  pInst->PCCLCR = locReg;
  if (GoMask != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 3> :
  goto <bb 5>; [INV]

  <bb 4> :
  D.5936 = OsIf_GetElapsed (&locCurrentTicks, 0);
  locElapsedTicks = D.5936 + locElapsedTicks;

  <bb 5> :
  _4 = pInst->PCCLCR;
  _5 = GoMask & _4;
  if (GoMask == _5)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  if (locElapsedTicks < locTimeoutTicks)
    goto <bb 4>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (locElapsedTicks >= locTimeoutTicks)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  locStatus = 1;

  <bb 9> :
  D.5940 = locStatus;
  locCurrentTicks = {CLOBBER};

  <bb 10> :
<L9>:
  return D.5940;

}


hwAcc_Lmem_ControlReg (struct LMEM_Type * pInst, uint32 ControlMask, uint32 GoMask)
{
  uint32 locReg;
  uint32 locElapsedTicks;
  uint32 locCurrentTicks;
  uint32 locTimeoutTicks;
  Std_ReturnType locStatus;
  Std_ReturnType D.5931;
  long unsigned int D.5927;

  <bb 2> :
  locStatus = 0;
  locTimeoutTicks = OsIf_MicrosToTicks (100000, 0);
  _1 = OsIf_GetCounter (0);
  locCurrentTicks = _1;
  locElapsedTicks = 0;
  locReg = pInst->PCCCR;
  _2 = ~ControlMask;
  locReg = locReg & _2;
  _3 = ControlMask | GoMask;
  locReg = locReg | _3;
  pInst->PCCCR = locReg;
  if (GoMask != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 3> :
  goto <bb 5>; [INV]

  <bb 4> :
  D.5927 = OsIf_GetElapsed (&locCurrentTicks, 0);
  locElapsedTicks = D.5927 + locElapsedTicks;

  <bb 5> :
  _4 = pInst->PCCCR;
  _5 = GoMask & _4;
  if (GoMask == _5)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  if (locElapsedTicks < locTimeoutTicks)
    goto <bb 4>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  if (locElapsedTicks >= locTimeoutTicks)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  locStatus = 1;

  <bb 9> :
  D.5931 = locStatus;
  locCurrentTicks = {CLOBBER};

  <bb 10> :
<L9>:
  return D.5931;

}


