IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08/36 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08/35 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07/34 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07/33 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06/32 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06/31 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05/30 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05/29 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04/28 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04/27 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03/26 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03/25 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02/24 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02/23 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01/22 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01/21 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00/20 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00/19 is missing.
IPA summary for Port_schm_read_msr/18 is missing.

Flattening functions:
Overall time estimate: 0.000000 weighted by profile: 0.000000

Deciding on inlining of small functions.  Starting with size 0.

Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:

Deciding on functions to be inlined into all callers and removing useless speculations:
Overall time estimate: 0.000000 weighted by profile: 0.000000

Why inlining failed?
function not considered for inlining              :        9 calls, 9.000000 freq, 0 count
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08/36 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08/35 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07/34 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07/33 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06/32 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06/31 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05/30 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05/29 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04/28 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04/27 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03/26 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03/25 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02/24 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02/23 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01/22 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01/21 is missing.
IPA summary for SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00/20 is missing.
IPA summary for SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00/19 is missing.
IPA summary for Port_schm_read_msr/18 is missing.
Symbol table:

SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08/36 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08) @06a5fee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_08/17 (read)reentry_guard_PORT_EXCLUSIVE_AREA_08/17 (write)msr_PORT_EXCLUSIVE_AREA_08/16 (read)reentry_guard_PORT_EXCLUSIVE_AREA_08/17 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08/35 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08) @06a5fc40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_08/17 (read)msr_PORT_EXCLUSIVE_AREA_08/16 (write)msr_PORT_EXCLUSIVE_AREA_08/16 (read)reentry_guard_PORT_EXCLUSIVE_AREA_08/17 (read)reentry_guard_PORT_EXCLUSIVE_AREA_08/17 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Port_schm_read_msr/18 
SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07/34 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07) @06a5f9a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_07/15 (read)reentry_guard_PORT_EXCLUSIVE_AREA_07/15 (write)msr_PORT_EXCLUSIVE_AREA_07/14 (read)reentry_guard_PORT_EXCLUSIVE_AREA_07/15 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07/33 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07) @06a5f700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_07/15 (read)msr_PORT_EXCLUSIVE_AREA_07/14 (write)msr_PORT_EXCLUSIVE_AREA_07/14 (read)reentry_guard_PORT_EXCLUSIVE_AREA_07/15 (read)reentry_guard_PORT_EXCLUSIVE_AREA_07/15 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Port_schm_read_msr/18 
SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06/32 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06) @06a5f460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_06/13 (read)reentry_guard_PORT_EXCLUSIVE_AREA_06/13 (write)msr_PORT_EXCLUSIVE_AREA_06/12 (read)reentry_guard_PORT_EXCLUSIVE_AREA_06/13 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06/31 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06) @06a5f1c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_06/13 (read)msr_PORT_EXCLUSIVE_AREA_06/12 (write)msr_PORT_EXCLUSIVE_AREA_06/12 (read)reentry_guard_PORT_EXCLUSIVE_AREA_06/13 (read)reentry_guard_PORT_EXCLUSIVE_AREA_06/13 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Port_schm_read_msr/18 
SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05/30 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05) @06a59d20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_05/11 (read)reentry_guard_PORT_EXCLUSIVE_AREA_05/11 (write)msr_PORT_EXCLUSIVE_AREA_05/10 (read)reentry_guard_PORT_EXCLUSIVE_AREA_05/11 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05/29 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05) @06a597e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_05/11 (read)msr_PORT_EXCLUSIVE_AREA_05/10 (write)msr_PORT_EXCLUSIVE_AREA_05/10 (read)reentry_guard_PORT_EXCLUSIVE_AREA_05/11 (read)reentry_guard_PORT_EXCLUSIVE_AREA_05/11 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Port_schm_read_msr/18 
SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04/28 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04) @06a592a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_04/9 (read)reentry_guard_PORT_EXCLUSIVE_AREA_04/9 (write)msr_PORT_EXCLUSIVE_AREA_04/8 (read)reentry_guard_PORT_EXCLUSIVE_AREA_04/9 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04/27 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04) @06a59ee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_04/9 (read)msr_PORT_EXCLUSIVE_AREA_04/8 (write)msr_PORT_EXCLUSIVE_AREA_04/8 (read)reentry_guard_PORT_EXCLUSIVE_AREA_04/9 (read)reentry_guard_PORT_EXCLUSIVE_AREA_04/9 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Port_schm_read_msr/18 
SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03/26 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03) @06a59c40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_03/7 (read)reentry_guard_PORT_EXCLUSIVE_AREA_03/7 (write)msr_PORT_EXCLUSIVE_AREA_03/6 (read)reentry_guard_PORT_EXCLUSIVE_AREA_03/7 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03/25 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03) @06a599a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_03/7 (read)msr_PORT_EXCLUSIVE_AREA_03/6 (write)msr_PORT_EXCLUSIVE_AREA_03/6 (read)reentry_guard_PORT_EXCLUSIVE_AREA_03/7 (read)reentry_guard_PORT_EXCLUSIVE_AREA_03/7 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Port_schm_read_msr/18 
SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02/24 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02) @06a59700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_02/5 (read)reentry_guard_PORT_EXCLUSIVE_AREA_02/5 (write)msr_PORT_EXCLUSIVE_AREA_02/4 (read)reentry_guard_PORT_EXCLUSIVE_AREA_02/5 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02/23 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02) @06a59460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_02/5 (read)msr_PORT_EXCLUSIVE_AREA_02/4 (write)msr_PORT_EXCLUSIVE_AREA_02/4 (read)reentry_guard_PORT_EXCLUSIVE_AREA_02/5 (read)reentry_guard_PORT_EXCLUSIVE_AREA_02/5 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Port_schm_read_msr/18 
SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01/22 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01) @06a591c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_01/3 (read)reentry_guard_PORT_EXCLUSIVE_AREA_01/3 (write)msr_PORT_EXCLUSIVE_AREA_01/2 (read)reentry_guard_PORT_EXCLUSIVE_AREA_01/3 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01/21 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01) @06a54e00
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_01/3 (read)msr_PORT_EXCLUSIVE_AREA_01/2 (write)msr_PORT_EXCLUSIVE_AREA_01/2 (read)reentry_guard_PORT_EXCLUSIVE_AREA_01/3 (read)reentry_guard_PORT_EXCLUSIVE_AREA_01/3 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Port_schm_read_msr/18 
SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00/20 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00) @06a548c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_00/1 (read)reentry_guard_PORT_EXCLUSIVE_AREA_00/1 (write)msr_PORT_EXCLUSIVE_AREA_00/0 (read)reentry_guard_PORT_EXCLUSIVE_AREA_00/1 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00/19 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00) @06a54d20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_PORT_EXCLUSIVE_AREA_00/1 (read)msr_PORT_EXCLUSIVE_AREA_00/0 (write)msr_PORT_EXCLUSIVE_AREA_00/0 (read)reentry_guard_PORT_EXCLUSIVE_AREA_00/1 (read)reentry_guard_PORT_EXCLUSIVE_AREA_00/1 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Port_schm_read_msr/18 
Port_schm_read_msr/18 (Port_schm_read_msr) @06a54a80
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08/35 SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07/33 SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06/31 SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05/29 SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04/27 SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03/25 SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02/23 SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01/21 SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00/19 
  Calls: 
reentry_guard_PORT_EXCLUSIVE_AREA_08/17 (reentry_guard_PORT_EXCLUSIVE_AREA_08) @06a53558
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08/35 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08/35 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08/35 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08/36 (read)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08/36 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08/36 (read)
  Availability: available
  Varpool flags:
msr_PORT_EXCLUSIVE_AREA_08/16 (msr_PORT_EXCLUSIVE_AREA_08) @06a534c8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08/35 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08/35 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08/36 (read)
  Availability: available
  Varpool flags:
reentry_guard_PORT_EXCLUSIVE_AREA_07/15 (reentry_guard_PORT_EXCLUSIVE_AREA_07) @06a53438
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07/33 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07/33 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07/33 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07/34 (read)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07/34 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07/34 (read)
  Availability: available
  Varpool flags:
msr_PORT_EXCLUSIVE_AREA_07/14 (msr_PORT_EXCLUSIVE_AREA_07) @06a533a8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07/33 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07/33 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07/34 (read)
  Availability: available
  Varpool flags:
reentry_guard_PORT_EXCLUSIVE_AREA_06/13 (reentry_guard_PORT_EXCLUSIVE_AREA_06) @06a53318
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06/31 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06/31 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06/31 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06/32 (read)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06/32 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06/32 (read)
  Availability: available
  Varpool flags:
msr_PORT_EXCLUSIVE_AREA_06/12 (msr_PORT_EXCLUSIVE_AREA_06) @06a53288
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06/31 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06/31 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06/32 (read)
  Availability: available
  Varpool flags:
reentry_guard_PORT_EXCLUSIVE_AREA_05/11 (reentry_guard_PORT_EXCLUSIVE_AREA_05) @06a531f8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05/29 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05/29 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05/29 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05/30 (read)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05/30 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05/30 (read)
  Availability: available
  Varpool flags:
msr_PORT_EXCLUSIVE_AREA_05/10 (msr_PORT_EXCLUSIVE_AREA_05) @06a53168
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05/29 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05/29 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05/30 (read)
  Availability: available
  Varpool flags:
reentry_guard_PORT_EXCLUSIVE_AREA_04/9 (reentry_guard_PORT_EXCLUSIVE_AREA_04) @06a530d8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04/27 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04/27 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04/27 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04/28 (read)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04/28 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04/28 (read)
  Availability: available
  Varpool flags:
msr_PORT_EXCLUSIVE_AREA_04/8 (msr_PORT_EXCLUSIVE_AREA_04) @06a53048
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04/27 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04/27 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04/28 (read)
  Availability: available
  Varpool flags:
reentry_guard_PORT_EXCLUSIVE_AREA_03/7 (reentry_guard_PORT_EXCLUSIVE_AREA_03) @06ad4f78
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03/25 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03/25 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03/25 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03/26 (read)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03/26 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03/26 (read)
  Availability: available
  Varpool flags:
msr_PORT_EXCLUSIVE_AREA_03/6 (msr_PORT_EXCLUSIVE_AREA_03) @06ad4ee8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03/25 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03/25 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03/26 (read)
  Availability: available
  Varpool flags:
reentry_guard_PORT_EXCLUSIVE_AREA_02/5 (reentry_guard_PORT_EXCLUSIVE_AREA_02) @06ad4e58
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02/23 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02/23 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02/23 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02/24 (read)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02/24 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02/24 (read)
  Availability: available
  Varpool flags:
msr_PORT_EXCLUSIVE_AREA_02/4 (msr_PORT_EXCLUSIVE_AREA_02) @06ad4dc8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02/23 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02/23 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02/24 (read)
  Availability: available
  Varpool flags:
reentry_guard_PORT_EXCLUSIVE_AREA_01/3 (reentry_guard_PORT_EXCLUSIVE_AREA_01) @06ad4d38
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01/21 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01/21 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01/21 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01/22 (read)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01/22 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01/22 (read)
  Availability: available
  Varpool flags:
msr_PORT_EXCLUSIVE_AREA_01/2 (msr_PORT_EXCLUSIVE_AREA_01) @06ad4ca8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01/21 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01/21 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01/22 (read)
  Availability: available
  Varpool flags:
reentry_guard_PORT_EXCLUSIVE_AREA_00/1 (reentry_guard_PORT_EXCLUSIVE_AREA_00) @06ad4c18
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00/19 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00/19 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00/19 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00/20 (read)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00/20 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00/20 (read)
  Availability: available
  Varpool flags:
msr_PORT_EXCLUSIVE_AREA_00/0 (msr_PORT_EXCLUSIVE_AREA_00) @06ad4b88
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00/19 (read)SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00/19 (write)SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00/20 (read)
  Availability: available
  Varpool flags:

;; Function Port_schm_read_msr (Port_schm_read_msr, funcdef_no=0, decl_uid=5593, cgraph_uid=1, symbol_order=18)

Port_schm_read_msr ()
{
  register uint32 reg_tmp;
  uint32 D.5674;
  uint32 _2;

  <bb 2> :
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_1);
  _2 = reg_tmp_1;

  <bb 3> :
<L0>:
  return _2;

}



;; Function SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00, funcdef_no=1, decl_uid=5539, cgraph_uid=2, symbol_order=19)

SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_00[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Port_schm_read_msr ();
  msr_PORT_EXCLUSIVE_AREA_00[u32CoreId_8] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_00[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_00[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_PORT_EXCLUSIVE_AREA_00[u32CoreId_8] ={v} _6;
  return;

}



;; Function SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00, funcdef_no=2, decl_uid=5541, cgraph_uid=3, symbol_order=20)

SchM_Exit_Port_PORT_EXCLUSIVE_AREA_00 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_00[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_PORT_EXCLUSIVE_AREA_00[u32CoreId_7] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_00[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_00[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}



;; Function SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01, funcdef_no=3, decl_uid=5543, cgraph_uid=4, symbol_order=21)

SchM_Enter_Port_PORT_EXCLUSIVE_AREA_01 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_01[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Port_schm_read_msr ();
  msr_PORT_EXCLUSIVE_AREA_01[u32CoreId_8] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_01[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_01[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_PORT_EXCLUSIVE_AREA_01[u32CoreId_8] ={v} _6;
  return;

}



;; Function SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01, funcdef_no=4, decl_uid=5545, cgraph_uid=5, symbol_order=22)

SchM_Exit_Port_PORT_EXCLUSIVE_AREA_01 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_01[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_PORT_EXCLUSIVE_AREA_01[u32CoreId_7] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_01[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_01[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}



;; Function SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02, funcdef_no=5, decl_uid=5547, cgraph_uid=6, symbol_order=23)

SchM_Enter_Port_PORT_EXCLUSIVE_AREA_02 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_02[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Port_schm_read_msr ();
  msr_PORT_EXCLUSIVE_AREA_02[u32CoreId_8] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_02[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_02[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_PORT_EXCLUSIVE_AREA_02[u32CoreId_8] ={v} _6;
  return;

}



;; Function SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02, funcdef_no=6, decl_uid=5549, cgraph_uid=7, symbol_order=24)

SchM_Exit_Port_PORT_EXCLUSIVE_AREA_02 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_02[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_PORT_EXCLUSIVE_AREA_02[u32CoreId_7] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_02[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_02[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}



;; Function SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03, funcdef_no=7, decl_uid=5551, cgraph_uid=8, symbol_order=25)

SchM_Enter_Port_PORT_EXCLUSIVE_AREA_03 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_03[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Port_schm_read_msr ();
  msr_PORT_EXCLUSIVE_AREA_03[u32CoreId_8] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_03[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_03[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_PORT_EXCLUSIVE_AREA_03[u32CoreId_8] ={v} _6;
  return;

}



;; Function SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03, funcdef_no=8, decl_uid=5553, cgraph_uid=9, symbol_order=26)

SchM_Exit_Port_PORT_EXCLUSIVE_AREA_03 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_03[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_PORT_EXCLUSIVE_AREA_03[u32CoreId_7] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_03[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_03[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}



;; Function SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04, funcdef_no=9, decl_uid=5555, cgraph_uid=10, symbol_order=27)

SchM_Enter_Port_PORT_EXCLUSIVE_AREA_04 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_04[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Port_schm_read_msr ();
  msr_PORT_EXCLUSIVE_AREA_04[u32CoreId_8] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_04[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_04[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_PORT_EXCLUSIVE_AREA_04[u32CoreId_8] ={v} _6;
  return;

}



;; Function SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04, funcdef_no=10, decl_uid=5557, cgraph_uid=11, symbol_order=28)

SchM_Exit_Port_PORT_EXCLUSIVE_AREA_04 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_04[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_PORT_EXCLUSIVE_AREA_04[u32CoreId_7] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_04[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_04[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}



;; Function SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05, funcdef_no=11, decl_uid=5559, cgraph_uid=12, symbol_order=29)

SchM_Enter_Port_PORT_EXCLUSIVE_AREA_05 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_05[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Port_schm_read_msr ();
  msr_PORT_EXCLUSIVE_AREA_05[u32CoreId_8] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_05[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_05[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_PORT_EXCLUSIVE_AREA_05[u32CoreId_8] ={v} _6;
  return;

}



;; Function SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05, funcdef_no=12, decl_uid=5561, cgraph_uid=13, symbol_order=30)

SchM_Exit_Port_PORT_EXCLUSIVE_AREA_05 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_05[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_PORT_EXCLUSIVE_AREA_05[u32CoreId_7] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_05[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_05[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}



;; Function SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06, funcdef_no=13, decl_uid=5563, cgraph_uid=14, symbol_order=31)

SchM_Enter_Port_PORT_EXCLUSIVE_AREA_06 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_06[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Port_schm_read_msr ();
  msr_PORT_EXCLUSIVE_AREA_06[u32CoreId_8] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_06[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_06[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_PORT_EXCLUSIVE_AREA_06[u32CoreId_8] ={v} _6;
  return;

}



;; Function SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06, funcdef_no=14, decl_uid=5565, cgraph_uid=15, symbol_order=32)

SchM_Exit_Port_PORT_EXCLUSIVE_AREA_06 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_06[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_PORT_EXCLUSIVE_AREA_06[u32CoreId_7] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_06[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_06[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}



;; Function SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07, funcdef_no=15, decl_uid=5567, cgraph_uid=16, symbol_order=33)

SchM_Enter_Port_PORT_EXCLUSIVE_AREA_07 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_07[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Port_schm_read_msr ();
  msr_PORT_EXCLUSIVE_AREA_07[u32CoreId_8] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_07[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_07[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_PORT_EXCLUSIVE_AREA_07[u32CoreId_8] ={v} _6;
  return;

}



;; Function SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07, funcdef_no=16, decl_uid=5569, cgraph_uid=17, symbol_order=34)

SchM_Exit_Port_PORT_EXCLUSIVE_AREA_07 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_07[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_PORT_EXCLUSIVE_AREA_07[u32CoreId_7] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_07[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_07[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}



;; Function SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08 (SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08, funcdef_no=17, decl_uid=5571, cgraph_uid=18, symbol_order=35)

SchM_Enter_Port_PORT_EXCLUSIVE_AREA_08 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_08[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Port_schm_read_msr ();
  msr_PORT_EXCLUSIVE_AREA_08[u32CoreId_8] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_08[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_08[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_PORT_EXCLUSIVE_AREA_08[u32CoreId_8] ={v} _6;
  return;

}



;; Function SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08 (SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08, funcdef_no=18, decl_uid=5573, cgraph_uid=19, symbol_order=36)

SchM_Exit_Port_PORT_EXCLUSIVE_AREA_08 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_08[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_PORT_EXCLUSIVE_AREA_08[u32CoreId_7] ={v} _2;
  _3 ={v} msr_PORT_EXCLUSIVE_AREA_08[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_PORT_EXCLUSIVE_AREA_08[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


