
Marking local functions:


Marking externally visible functions: Dio_Ipw_WriteChannelGroup Dio_Ipw_ReadChannelGroup Dio_Ipw_WritePort Dio_Ipw_ReadPort Dio_Ipw_WriteChannel Dio_Ipw_ReadChannel


Marking externally visible variables:


Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:

Gpio_Dio_Ip_ClearPins/12 (Gpio_Dio_Ip_ClearPins) @06a780e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Dio_Ipw_WriteChannelGroup/5 
  Calls: 
Gpio_Dio_Ip_SetPins/11 (Gpio_Dio_Ip_SetPins) @06a78ee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Dio_Ipw_WriteChannelGroup/5 
  Calls: 
Gpio_Dio_Ip_WritePins/10 (Gpio_Dio_Ip_WritePins) @06a78c40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Dio_Ipw_WritePort/3 
  Calls: 
Gpio_Dio_Ip_ReadPins/9 (Gpio_Dio_Ip_ReadPins) @06a78a80
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Dio_Ipw_ReadChannelGroup/4 Dio_Ipw_ReadPort/2 
  Calls: 
Gpio_Dio_Ip_WritePin/8 (Gpio_Dio_Ip_WritePin) @06a788c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Dio_Ipw_WriteChannel/1 
  Calls: 
Gpio_Dio_Ip_ReadPin/7 (Gpio_Dio_Ip_ReadPin) @06a78700
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags:
  Called by: Dio_Ipw_ReadChannel/0 
  Calls: 
GpioBaseAdresses/6 (GpioBaseAdresses) @06a73828
  Type: variable
  Body removed by symtab_remove_unreachable_nodes
  Visibility: external public
  References: 
  Referring: Dio_Ipw_WritePort/3 (read)Dio_Ipw_ReadChannelGroup/4 (read)Dio_Ipw_ReadChannel/0 (read)Dio_Ipw_WriteChannel/1 (read)Dio_Ipw_ReadPort/2 (read)Dio_Ipw_WriteChannelGroup/5 (read)
  Availability: not_available
  Varpool flags:
Dio_Ipw_WriteChannelGroup/5 (Dio_Ipw_WriteChannelGroup) @06a782a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: GpioBaseAdresses/6 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Gpio_Dio_Ip_ClearPins/12 Gpio_Dio_Ip_SetPins/11 
Dio_Ipw_ReadChannelGroup/4 (Dio_Ipw_ReadChannelGroup) @06a78000
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: GpioBaseAdresses/6 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Gpio_Dio_Ip_ReadPins/9 
Dio_Ipw_WritePort/3 (Dio_Ipw_WritePort) @06a728c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: GpioBaseAdresses/6 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Gpio_Dio_Ip_WritePins/10 
Dio_Ipw_ReadPort/2 (Dio_Ipw_ReadPort) @06a72ee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: GpioBaseAdresses/6 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Gpio_Dio_Ip_ReadPins/9 
Dio_Ipw_WriteChannel/1 (Dio_Ipw_WriteChannel) @06a72c40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: GpioBaseAdresses/6 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Gpio_Dio_Ip_WritePin/8 
Dio_Ipw_ReadChannel/0 (Dio_Ipw_ReadChannel) @06a727e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: GpioBaseAdresses/6 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Gpio_Dio_Ip_ReadPin/7 
Dio_Ipw_WriteChannelGroup (const struct Dio_ChannelGroupType * pChannelGroupIdPtr, Dio_PortLevelType Level)
{
  struct GPIO_Type * GpioBase;
  Dio_PortLevelType ValueClear;
  Dio_PortLevelType ValueSet;
  unsigned char _1;
  int _2;
  long unsigned int _3;
  unsigned char _4;
  int _5;
  long unsigned int _6;
  long unsigned int _7;
  long unsigned int _8;
  long unsigned int _9;

  <bb 2> :
  _1 = pChannelGroupIdPtr_11(D)->port;
  _2 = (int) _1;
  _3 = GpioBaseAdresses[_2];
  GpioBase_12 = (struct GPIO_Type *) _3;
  _4 = pChannelGroupIdPtr_11(D)->u8offset;
  _5 = (int) _4;
  _6 = Level_13(D) << _5;
  _7 = pChannelGroupIdPtr_11(D)->mask;
  ValueSet_14 = _6 & _7;
  Gpio_Dio_Ip_SetPins (GpioBase_12, ValueSet_14);
  _8 = ~ValueSet_14;
  _9 = pChannelGroupIdPtr_11(D)->mask;
  ValueClear_16 = _8 & _9;
  Gpio_Dio_Ip_ClearPins (GpioBase_12, ValueClear_16);
  return;

}


Dio_Ipw_ReadChannelGroup (const struct Dio_ChannelGroupType * pChannelGroupIdPtr)
{
  const struct GPIO_Type * GpioBase;
  Dio_PortLevelType pinsValue;
  Dio_PortLevelType PortLevel;
  Dio_PortLevelType D.5625;
  unsigned char _1;
  int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  unsigned char _6;
  int _7;
  Dio_PortLevelType _15;

  <bb 2> :
  PortLevel_8 = 0;
  _1 = pChannelGroupIdPtr_10(D)->port;
  _2 = (int) _1;
  _3 = GpioBaseAdresses[_2];
  GpioBase_11 = (const struct GPIO_Type *) _3;
  pinsValue_13 = Gpio_Dio_Ip_ReadPins (GpioBase_11);
  _4 = pChannelGroupIdPtr_10(D)->mask;
  _5 = pinsValue_13 & _4;
  _6 = pChannelGroupIdPtr_10(D)->u8offset;
  _7 = (int) _6;
  PortLevel_14 = _5 >> _7;
  _15 = PortLevel_14;

  <bb 3> :
<L0>:
  return _15;

}


Dio_Ipw_WritePort (Dio_PortType PortId, Dio_PortLevelType Level)
{
  struct GPIO_Type * GpioBase;
  Dio_PortLevelType CrtLevel;
  int _1;
  long unsigned int _2;

  <bb 2> :
  CrtLevel_4 = Level_3(D);
  _1 = (int) PortId_5(D);
  _2 = GpioBaseAdresses[_1];
  GpioBase_7 = (struct GPIO_Type *) _2;
  Gpio_Dio_Ip_WritePins (GpioBase_7, CrtLevel_4);
  return;

}


Dio_Ipw_ReadPort (Dio_PortType PortId)
{
  const struct GPIO_Type * GpioBase;
  Dio_PortLevelType PortLevel;
  Dio_PortLevelType D.5623;
  int _1;
  long unsigned int _2;
  Dio_PortLevelType _9;

  <bb 2> :
  PortLevel_3 = 0;
  _1 = (int) PortId_4(D);
  _2 = GpioBaseAdresses[_1];
  GpioBase_6 = (const struct GPIO_Type *) _2;
  PortLevel_8 = Gpio_Dio_Ip_ReadPins (GpioBase_6);
  _9 = PortLevel_8;

  <bb 3> :
<L0>:
  return _9;

}


Dio_Ipw_WriteChannel (Dio_ChannelType ChannelId, Dio_LevelType Level)
{
  struct GPIO_Type * GpioBase;
  uint32 u32PinIndex;
  uint32 u32GpioInstance;
  short unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;

  <bb 2> :
  _1 = ChannelId_4(D) >> 5;
  u32GpioInstance_5 = (uint32) _1;
  _2 = (long unsigned int) ChannelId_4(D);
  u32PinIndex_6 = _2 & 31;
  _3 = GpioBaseAdresses[u32GpioInstance_5];
  GpioBase_8 = (struct GPIO_Type *) _3;
  Gpio_Dio_Ip_WritePin (GpioBase_8, u32PinIndex_6, Level_9(D));
  return;

}


Dio_Ipw_ReadChannel (Dio_ChannelType ChannelId)
{
  const struct GPIO_Type * GpioBase;
  uint32 u32PinIndex;
  uint32 u32GpioInstance;
  Dio_LevelType ChannelLevel;
  Dio_LevelType D.5621;
  short unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  Dio_LevelType _12;

  <bb 2> :
  ChannelLevel_4 = 0;
  _1 = ChannelId_5(D) >> 5;
  u32GpioInstance_6 = (uint32) _1;
  _2 = (long unsigned int) ChannelId_5(D);
  u32PinIndex_7 = _2 & 31;
  _3 = GpioBaseAdresses[u32GpioInstance_6];
  GpioBase_9 = (const struct GPIO_Type *) _3;
  ChannelLevel_11 = Gpio_Dio_Ip_ReadPin (GpioBase_9, u32PinIndex_7);
  _12 = ChannelLevel_11;

  <bb 3> :
<L0>:
  return _12;

}


