
Marking local functions: hwAcc_Lmem_ProcessorCodeCacheCleanByAddr hwAcc_Lmem_ProcessorCodeInvalidateByAddr hwAcc_Lmem_ProcessorCodeClean hwAcc_Lmem_ProcessorCodeInvalidate hwAcc_Lmem_ProcessorCodeCacheDisable hwAcc_Lmem_ProcessorCodeCacheEnable hwAcc_Lmem_AddressReg hwAcc_Lmem_LineControlReg hwAcc_Lmem_ControlReg


Marking externally visible functions: Cache_Ip_CleanByAddr Cache_Ip_InvalidateByAddr Cache_Ip_Clean Cache_Ip_Invalidate Cache_Ip_Disable Cache_Ip_Enable


Marking externally visible variables:


Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:

SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/30 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18) @06086540
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_CleanByAddr/15 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/29 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18) @06086460
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_CleanByAddr/15 
  Calls: 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/28 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17) @06086000
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_InvalidateByAddr/14 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/27 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17) @0607cee0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_InvalidateByAddr/14 
  Calls: 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/26 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16) @0607cc40
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_Clean/13 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/25 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16) @0607cb60
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_Clean/13 
  Calls: 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/24 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15) @0607c7e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_Invalidate/12 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/23 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15) @0607c700
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_Invalidate/12 
  Calls: 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/22 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14) @0607c460
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_Disable/11 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/21 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14) @0607c380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_Disable/11 
  Calls: 
OsIf_GetElapsed/20 (OsIf_GetElapsed) @0607c1c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: hwAcc_Lmem_AddressReg/3 hwAcc_Lmem_LineControlReg/2 hwAcc_Lmem_ControlReg/1 hwAcc_Lmem_ProcessorCodeCacheDisable/5 hwAcc_Lmem_ProcessorCodeCacheEnable/4 
  Calls: 
OsIf_GetCounter/19 (OsIf_GetCounter) @0607c0e0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: hwAcc_Lmem_AddressReg/3 hwAcc_Lmem_LineControlReg/2 hwAcc_Lmem_ControlReg/1 hwAcc_Lmem_ProcessorCodeCacheDisable/5 hwAcc_Lmem_ProcessorCodeCacheEnable/4 
  Calls: 
OsIf_MicrosToTicks/18 (OsIf_MicrosToTicks) @0607c000
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: hwAcc_Lmem_AddressReg/3 hwAcc_Lmem_LineControlReg/2 hwAcc_Lmem_ControlReg/1 hwAcc_Lmem_ProcessorCodeCacheDisable/5 hwAcc_Lmem_ProcessorCodeCacheEnable/4 
  Calls: 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/17 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13) @05e2c8c0
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_Enable/10 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/16 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13) @05e2c620
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: Cache_Ip_Enable/10 
  Calls: 
Cache_Ip_CleanByAddr/15 (Cache_Ip_CleanByAddr) @05e2cd20
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/30 hwAcc_Lmem_ProcessorCodeCacheCleanByAddr/9 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/29 
Cache_Ip_InvalidateByAddr/14 (Cache_Ip_InvalidateByAddr) @05e2ca80
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/28 hwAcc_Lmem_ProcessorCodeInvalidateByAddr/8 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/27 
Cache_Ip_Clean/13 (Cache_Ip_Clean) @05e2c7e0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/26 hwAcc_Lmem_ProcessorCodeClean/7 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/25 
Cache_Ip_Invalidate/12 (Cache_Ip_Invalidate) @05e2c540
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/24 hwAcc_Lmem_ProcessorCodeInvalidate/6 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/23 
Cache_Ip_Disable/11 (Cache_Ip_Disable) @05e2c2a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/22 hwAcc_Lmem_ProcessorCodeCacheDisable/5 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/21 
Cache_Ip_Enable/10 (Cache_Ip_Enable) @05e2c000
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/17 hwAcc_Lmem_ProcessorCodeCacheEnable/4 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/16 
hwAcc_Lmem_ProcessorCodeCacheCleanByAddr/9 (hwAcc_Lmem_ProcessorCodeCacheCleanByAddr) @05f3ee00
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Cache_Ip_CleanByAddr/15 
  Calls: hwAcc_Lmem_AddressReg/3 hwAcc_Lmem_LineControlReg/2 hwAcc_Lmem_LineControlReg/2 
hwAcc_Lmem_ProcessorCodeInvalidateByAddr/8 (hwAcc_Lmem_ProcessorCodeInvalidateByAddr) @05f3e9a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Cache_Ip_InvalidateByAddr/14 
  Calls: hwAcc_Lmem_AddressReg/3 hwAcc_Lmem_LineControlReg/2 
hwAcc_Lmem_ProcessorCodeClean/7 (hwAcc_Lmem_ProcessorCodeClean) @05f3e620
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Cache_Ip_Clean/13 
  Calls: hwAcc_Lmem_ControlReg/1 hwAcc_Lmem_ControlReg/1 
hwAcc_Lmem_ProcessorCodeInvalidate/6 (hwAcc_Lmem_ProcessorCodeInvalidate) @05f3e380
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Cache_Ip_Invalidate/12 
  Calls: hwAcc_Lmem_ControlReg/1 
hwAcc_Lmem_ProcessorCodeCacheDisable/5 (hwAcc_Lmem_ProcessorCodeCacheDisable) @05f3e0e0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Cache_Ip_Disable/11 
  Calls: OsIf_GetElapsed/20 OsIf_GetCounter/19 OsIf_MicrosToTicks/18 
hwAcc_Lmem_ProcessorCodeCacheEnable/4 (hwAcc_Lmem_ProcessorCodeCacheEnable) @05f359a0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: Cache_Ip_Enable/10 
  Calls: OsIf_GetElapsed/20 OsIf_GetCounter/19 OsIf_MicrosToTicks/18 
hwAcc_Lmem_AddressReg/3 (hwAcc_Lmem_AddressReg) @05f35e00
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: hwAcc_Lmem_ProcessorCodeCacheCleanByAddr/9 hwAcc_Lmem_ProcessorCodeInvalidateByAddr/8 
  Calls: OsIf_GetElapsed/20 OsIf_GetCounter/19 OsIf_MicrosToTicks/18 
hwAcc_Lmem_LineControlReg/2 (hwAcc_Lmem_LineControlReg) @05f35b60
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: hwAcc_Lmem_ProcessorCodeCacheCleanByAddr/9 hwAcc_Lmem_ProcessorCodeCacheCleanByAddr/9 hwAcc_Lmem_ProcessorCodeInvalidateByAddr/8 
  Calls: OsIf_GetElapsed/20 OsIf_GetCounter/19 OsIf_MicrosToTicks/18 
hwAcc_Lmem_ControlReg/1 (hwAcc_Lmem_ControlReg) @05f358c0
  Type: function definition analyzed
  Visibility: prevailing_def_ironly
  References: 
  Referring: 
  Availability: local
  Function flags: body local optimize_size
  Called by: hwAcc_Lmem_ProcessorCodeClean/7 hwAcc_Lmem_ProcessorCodeClean/7 hwAcc_Lmem_ProcessorCodeInvalidate/6 
  Calls: OsIf_GetElapsed/20 OsIf_GetCounter/19 OsIf_MicrosToTicks/18 
Cache_Ip_CleanByAddr (const Cache_Ip_Type CacheType, const boolean EnInvalidate, const uint32 Addr, const uint32 Length)
{
  Std_ReturnType Status;
  Std_ReturnType D.5991;

  <bb 2> :
  # DEBUG BEGIN_STMT
  Status = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18 ();
  # DEBUG BEGIN_STMT
  switch (CacheType) <default: <L6> [INV], case 0: <L0> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  Status = hwAcc_Lmem_ProcessorCodeCacheCleanByAddr (EnInvalidate, Addr, Length);
  # DEBUG BEGIN_STMT

  <bb 4> :
<L6>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18 ();
  # DEBUG BEGIN_STMT
  D.5991 = Status;
  return D.5991;

}


Cache_Ip_InvalidateByAddr (const Cache_Ip_Type CacheType, const uint32 Addr, const uint32 Length)
{
  Std_ReturnType Status;
  Std_ReturnType D.5967;

  <bb 2> :
  # DEBUG BEGIN_STMT
  Status = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17 ();
  # DEBUG BEGIN_STMT
  switch (CacheType) <default: <L6> [INV], case 0: <L0> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  Status = hwAcc_Lmem_ProcessorCodeInvalidateByAddr (Addr, Length);
  # DEBUG BEGIN_STMT

  <bb 4> :
<L6>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17 ();
  # DEBUG BEGIN_STMT
  D.5967 = Status;
  return D.5967;

}


Cache_Ip_Clean (const Cache_Ip_Type CacheType, const boolean EnInvalidate)
{
  Std_ReturnType Status;
  Std_ReturnType D.5959;

  <bb 2> :
  # DEBUG BEGIN_STMT
  Status = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16 ();
  # DEBUG BEGIN_STMT
  switch (CacheType) <default: <L6> [INV], case 0: <L0> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  Status = hwAcc_Lmem_ProcessorCodeClean (EnInvalidate);
  # DEBUG BEGIN_STMT

  <bb 4> :
<L6>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16 ();
  # DEBUG BEGIN_STMT
  D.5959 = Status;
  return D.5959;

}


Cache_Ip_Invalidate (const Cache_Ip_Type CacheType)
{
  Std_ReturnType Status;
  Std_ReturnType D.5945;

  <bb 2> :
  # DEBUG BEGIN_STMT
  Status = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15 ();
  # DEBUG BEGIN_STMT
  switch (CacheType) <default: <L6> [INV], case 0: <L0> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  Status = hwAcc_Lmem_ProcessorCodeInvalidate ();
  # DEBUG BEGIN_STMT

  <bb 4> :
<L6>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15 ();
  # DEBUG BEGIN_STMT
  D.5945 = Status;
  return D.5945;

}


Cache_Ip_Disable (const Cache_Ip_Type CacheType)
{
  Std_ReturnType Status;
  Std_ReturnType D.5935;

  <bb 2> :
  # DEBUG BEGIN_STMT
  Status = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14 ();
  # DEBUG BEGIN_STMT
  switch (CacheType) <default: <L6> [INV], case 0: <L0> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  Status = hwAcc_Lmem_ProcessorCodeCacheDisable ();
  # DEBUG BEGIN_STMT

  <bb 4> :
<L6>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14 ();
  # DEBUG BEGIN_STMT
  D.5935 = Status;
  return D.5935;

}


Cache_Ip_Enable (const Cache_Ip_Type CacheType)
{
  Std_ReturnType Status;
  Std_ReturnType D.5925;

  <bb 2> :
  # DEBUG BEGIN_STMT
  Status = 0;
  # DEBUG BEGIN_STMT
  SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13 ();
  # DEBUG BEGIN_STMT
  switch (CacheType) <default: <L6> [INV], case 0: <L0> [INV]>

  <bb 3> :
<L0>:
  # DEBUG BEGIN_STMT
  Status = hwAcc_Lmem_ProcessorCodeCacheEnable ();
  # DEBUG BEGIN_STMT

  <bb 4> :
<L6>:
  # DEBUG BEGIN_STMT
  SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13 ();
  # DEBUG BEGIN_STMT
  D.5925 = Status;
  return D.5925;

}


hwAcc_Lmem_ProcessorCodeCacheCleanByAddr (const boolean enInvalidate, const uint32 addr, const uint32 length)
{
  uint32 locEndAddr;
  uint32 locStartAddr;
  Std_ReturnType locStatus;
  Std_ReturnType D.5998;

  <bb 2> :
  # DEBUG BEGIN_STMT
  locStatus = 0;
  # DEBUG BEGIN_STMT
  locStartAddr = addr & 4294967280;
  # DEBUG BEGIN_STMT
  locEndAddr = addr + length;
  # DEBUG BEGIN_STMT
  if (enInvalidate != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _1 = 3758628864B;
  locStatus = hwAcc_Lmem_LineControlReg (_1, 117506048, 0);
  goto <bb 6>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _2 = 3758628864B;
  locStatus = hwAcc_Lmem_LineControlReg (_2, 100728832, 0);
  goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _3 = 3758628864B;
  locStatus = hwAcc_Lmem_AddressReg (_3, locStartAddr, 1);
  # DEBUG BEGIN_STMT
  locStartAddr = locStartAddr + 16;

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (locStartAddr < locEndAddr)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  if (locStatus == 0)
    goto <bb 5>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.5998 = locStatus;
  return D.5998;

}


hwAcc_Lmem_ProcessorCodeInvalidateByAddr (const uint32 addr, const uint32 length)
{
  uint32 locEndAddr;
  uint32 locStartAddr;
  Std_ReturnType locStatus;
  Std_ReturnType D.5971;

  <bb 2> :
  # DEBUG BEGIN_STMT
  locStatus = 0;
  # DEBUG BEGIN_STMT
  locStartAddr = addr & 4294967280;
  # DEBUG BEGIN_STMT
  locEndAddr = addr + length;
  # DEBUG BEGIN_STMT
  _1 = 3758628864B;
  locStatus = hwAcc_Lmem_LineControlReg (_1, 83951616, 0);
  # DEBUG BEGIN_STMT
  goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _2 = 3758628864B;
  locStatus = hwAcc_Lmem_AddressReg (_2, locStartAddr, 1);
  # DEBUG BEGIN_STMT
  locStartAddr = locStartAddr + 16;

  <bb 4> :
  # DEBUG BEGIN_STMT
  if (locStartAddr < locEndAddr)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (locStatus == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  D.5971 = locStatus;
  return D.5971;

}


hwAcc_Lmem_ProcessorCodeClean (const boolean enInvalidate)
{
  Std_ReturnType locStatus;
  Std_ReturnType D.5965;

  <bb 2> :
  # DEBUG BEGIN_STMT
  locStatus = 0;
  # DEBUG BEGIN_STMT
  _1 = ~enInvalidate;
  if (_1 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _2 = 3758628864B;
  locStatus = hwAcc_Lmem_ControlReg (_2, 167772160, 2147483648);
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _3 = 3758628864B;
  locStatus = hwAcc_Lmem_ControlReg (_3, 251658240, 2147483648);

  <bb 5> :
  # DEBUG BEGIN_STMT
  D.5965 = locStatus;
  return D.5965;

}


hwAcc_Lmem_ProcessorCodeInvalidate ()
{
  Std_ReturnType locStatus;
  Std_ReturnType D.5948;

  <bb 2> :
  # DEBUG BEGIN_STMT
  locStatus = 0;
  # DEBUG BEGIN_STMT
  _1 = 3758628864B;
  locStatus = hwAcc_Lmem_ControlReg (_1, 83886080, 2147483648);
  # DEBUG BEGIN_STMT
  D.5948 = locStatus;
  return D.5948;

}


hwAcc_Lmem_ProcessorCodeCacheDisable ()
{
  uint32 locReg;
  uint32 locElapsedTicks;
  uint32 locCurrentTicks;
  uint32 locTimeoutTicks;
  Std_ReturnType locStatus;
  Std_ReturnType D.5942;
  long unsigned int D.5938;

  <bb 2> :
  # DEBUG BEGIN_STMT
  locStatus = 0;
  # DEBUG BEGIN_STMT
  locTimeoutTicks = OsIf_MicrosToTicks (100000, 0);
  # DEBUG BEGIN_STMT
  _1 = OsIf_GetCounter (0);
  locCurrentTicks = _1;
  # DEBUG BEGIN_STMT
  locElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  _2 = 3758628864B;
  locReg = _2->PCCCR;
  # DEBUG BEGIN_STMT
  locReg = locReg & 4294967294;
  # DEBUG BEGIN_STMT
  _3 = 3758628864B;
  _3->PCCCR = locReg;
  # DEBUG BEGIN_STMT
  goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  D.5938 = OsIf_GetElapsed (&locCurrentTicks, 0);
  locElapsedTicks = D.5938 + locElapsedTicks;

  <bb 4> :
  # DEBUG BEGIN_STMT
  _4 = 3758628864B;
  _5 = _4->PCCCR;
  _6 = _5 & 1;
  if (_6 == 1)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (locElapsedTicks < locTimeoutTicks)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (locElapsedTicks >= locTimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  locStatus = 1;

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.5942 = locStatus;
  locCurrentTicks = {CLOBBER};
  return D.5942;

}


hwAcc_Lmem_ProcessorCodeCacheEnable ()
{
  uint32 locReg;
  uint32 locElapsedTicks;
  uint32 locCurrentTicks;
  uint32 locTimeoutTicks;
  Std_ReturnType locStatus;
  Std_ReturnType D.5932;
  long unsigned int D.5928;

  <bb 2> :
  # DEBUG BEGIN_STMT
  locStatus = 0;
  # DEBUG BEGIN_STMT
  locTimeoutTicks = OsIf_MicrosToTicks (100000, 0);
  # DEBUG BEGIN_STMT
  _1 = OsIf_GetCounter (0);
  locCurrentTicks = _1;
  # DEBUG BEGIN_STMT
  locElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  _2 = 3758628864B;
  locReg = _2->PCCCR;
  # DEBUG BEGIN_STMT
  locReg = locReg | 1;
  # DEBUG BEGIN_STMT
  _3 = 3758628864B;
  _3->PCCCR = locReg;
  # DEBUG BEGIN_STMT
  goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  D.5928 = OsIf_GetElapsed (&locCurrentTicks, 0);
  locElapsedTicks = D.5928 + locElapsedTicks;

  <bb 4> :
  # DEBUG BEGIN_STMT
  _4 = 3758628864B;
  _5 = _4->PCCCR;
  _6 = _5 & 1;
  if (_6 != 1)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (locElapsedTicks < locTimeoutTicks)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (locElapsedTicks >= locTimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  locStatus = 1;

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.5932 = locStatus;
  locCurrentTicks = {CLOBBER};
  return D.5932;

}


hwAcc_Lmem_AddressReg (struct LMEM_Type * pInst, uint32 Address, uint32 GoMask)
{
  uint32 locReg;
  uint32 locElapsedTicks;
  uint32 locCurrentTicks;
  uint32 locTimeoutTicks;
  Std_ReturnType locStatus;
  Std_ReturnType D.5988;
  long unsigned int D.5984;

  <bb 2> :
  # DEBUG BEGIN_STMT
  locStatus = 0;
  # DEBUG BEGIN_STMT
  locTimeoutTicks = OsIf_MicrosToTicks (100000, 0);
  # DEBUG BEGIN_STMT
  _1 = OsIf_GetCounter (0);
  locCurrentTicks = _1;
  # DEBUG BEGIN_STMT
  locElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  locReg = pInst->PCCSAR;
  # DEBUG BEGIN_STMT
  locReg = locReg & 3;
  # DEBUG BEGIN_STMT
  _2 = Address & 4294967292;
  _3 = GoMask | _2;
  locReg = locReg | _3;
  # DEBUG BEGIN_STMT
  pInst->PCCSAR = locReg;
  # DEBUG BEGIN_STMT
  if (GoMask != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  D.5984 = OsIf_GetElapsed (&locCurrentTicks, 0);
  locElapsedTicks = D.5984 + locElapsedTicks;

  <bb 4> :
  # DEBUG BEGIN_STMT
  _4 = pInst->PCCSAR;
  _5 = GoMask & _4;
  if (GoMask == _5)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (locElapsedTicks < locTimeoutTicks)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (locElapsedTicks >= locTimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  locStatus = 1;

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.5988 = locStatus;
  locCurrentTicks = {CLOBBER};
  return D.5988;

}


hwAcc_Lmem_LineControlReg (struct LMEM_Type * pInst, uint32 LineControlMask, uint32 GoMask)
{
  uint32 locReg;
  uint32 locElapsedTicks;
  uint32 locCurrentTicks;
  uint32 locTimeoutTicks;
  Std_ReturnType locStatus;
  Std_ReturnType D.5979;
  long unsigned int D.5975;

  <bb 2> :
  # DEBUG BEGIN_STMT
  locStatus = 0;
  # DEBUG BEGIN_STMT
  locTimeoutTicks = OsIf_MicrosToTicks (100000, 0);
  # DEBUG BEGIN_STMT
  _1 = OsIf_GetCounter (0);
  locCurrentTicks = _1;
  # DEBUG BEGIN_STMT
  locElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  locReg = pInst->PCCLCR;
  # DEBUG BEGIN_STMT
  _2 = ~LineControlMask;
  locReg = locReg & _2;
  # DEBUG BEGIN_STMT
  _3 = LineControlMask | GoMask;
  locReg = locReg | _3;
  # DEBUG BEGIN_STMT
  pInst->PCCLCR = locReg;
  # DEBUG BEGIN_STMT
  if (GoMask != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  D.5975 = OsIf_GetElapsed (&locCurrentTicks, 0);
  locElapsedTicks = D.5975 + locElapsedTicks;

  <bb 4> :
  # DEBUG BEGIN_STMT
  _4 = pInst->PCCLCR;
  _5 = GoMask & _4;
  if (GoMask == _5)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (locElapsedTicks < locTimeoutTicks)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (locElapsedTicks >= locTimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  locStatus = 1;

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.5979 = locStatus;
  locCurrentTicks = {CLOBBER};
  return D.5979;

}


hwAcc_Lmem_ControlReg (struct LMEM_Type * pInst, uint32 ControlMask, uint32 GoMask)
{
  uint32 locReg;
  uint32 locElapsedTicks;
  uint32 locCurrentTicks;
  uint32 locTimeoutTicks;
  Std_ReturnType locStatus;
  Std_ReturnType D.5956;
  long unsigned int D.5952;

  <bb 2> :
  # DEBUG BEGIN_STMT
  locStatus = 0;
  # DEBUG BEGIN_STMT
  locTimeoutTicks = OsIf_MicrosToTicks (100000, 0);
  # DEBUG BEGIN_STMT
  _1 = OsIf_GetCounter (0);
  locCurrentTicks = _1;
  # DEBUG BEGIN_STMT
  locElapsedTicks = 0;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  locReg = pInst->PCCCR;
  # DEBUG BEGIN_STMT
  _2 = ~ControlMask;
  locReg = locReg & _2;
  # DEBUG BEGIN_STMT
  _3 = ControlMask | GoMask;
  locReg = locReg | _3;
  # DEBUG BEGIN_STMT
  pInst->PCCCR = locReg;
  # DEBUG BEGIN_STMT
  if (GoMask != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  D.5952 = OsIf_GetElapsed (&locCurrentTicks, 0);
  locElapsedTicks = D.5952 + locElapsedTicks;

  <bb 4> :
  # DEBUG BEGIN_STMT
  _4 = pInst->PCCCR;
  _5 = GoMask & _4;
  if (GoMask == _5)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  if (locElapsedTicks < locTimeoutTicks)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  if (locElapsedTicks >= locTimeoutTicks)
    goto <bb 7>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  locStatus = 1;

  <bb 8> :
  # DEBUG BEGIN_STMT
  D.5956 = locStatus;
  locCurrentTicks = {CLOBBER};
  return D.5956;

}


