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@@ -1,598 +1,709 @@
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/*
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* hal_adapter.c
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*
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- * Created on: 2022Äê1ÔÂ18ÈÕ
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+ * Created on: 2022年1月18日
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* Author: QiXiang_CHENJIE
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*/
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#include "hal_adapter.h"
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#include "AppGlobalVar.h"
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-/*NB*/
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-/**
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- * @brief :??????
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- * @param {UINT8} *pSend
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- * @param {UINT32} sendLen
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- * @param {UINT8} *pRead
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- * @param {UINT32} readLen
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- * @param {UINT32} timeout
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- * @return {*}
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- */
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-/*
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-UINT8 UartTramsit(UINT8 *pSend, UINT32 sendLen, UINT8 *pRead, UINT32 readLen, UINT32 timeout)
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+#include "stdio.h"
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+#include "stdarg.h"
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+uint8_t __attribute__((section(".non_cacheable_data"))) RX_Buffer[3][BUFFER_SIZE];
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+uint32_t bufferIdx[3] = {0};
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+
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+volatile Uart_StatusType Uart_TransmitStatus[3] = {UART_STATUS_TIMEOUT, UART_STATUS_TIMEOUT, UART_STATUS_TIMEOUT};
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+QueueHandle_t UartRecvQueue[3];
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+QueueHandle_t UartSendQueue[3];
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+QueueHandle_t UartHalQueueHandle;
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+Std_ReturnType UartStartRecvFunc(uint8 channel);
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+
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+void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len);
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+void clear_ringBuffer(ringbuffer_t *ringBuf);
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+uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
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+uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf);
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+uint8 ringBufferforUart[3][BUFFER_SIZE];
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+ringbuffer_t uartRingBuffer[3];
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+
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+sint8 AtcmdDelayRecvFunc(uint8 recvChannel, char *ResultStrPtr, uint16 delayTime)
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+{
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+ sint8 outValue = -1;
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+ uint8 delayCnt = 0;
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+ uint8 UartData[256];
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+ uint16 ReadLen = 0;
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+ char *retptr = NULL;
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+ while (delayCnt < (delayTime / 1000) && outValue != 0)
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+ {
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+ UART_Receive_Data(recvChannel, UartData, &ReadLen, 1000);
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+ if (ReadLen > 0)
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+ {
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+ retptr = (char *)strstr((char *)UartData, ResultStrPtr);
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+ if (retptr)
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+ {
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+ outValue = 0;
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+ break;
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+ }
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+ }
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+ else
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+ {
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+ delayCnt++;
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+ }
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+ }
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+ return outValue;
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+}
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+
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+void create_ringBuffer(ringbuffer_t *ringBuf, uint8_t *buf, uint32_t buf_len)
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+{
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+ ringBuf->br = 0;
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+ ringBuf->bw = 0;
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+ ringBuf->btoRead = 0;
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+ ringBuf->source = buf;
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+ ringBuf->length = buf_len;
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+}
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+void clear_ringBuffer(ringbuffer_t *ringBuf)
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+{
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+ ringBuf->br = 0;
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+ ringBuf->bw = 0;
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+ ringBuf->btoRead = 0;
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+}
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+uint32_t write_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
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+{
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+ uint32_t len = 0;
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+ volatile uint32_t ringBuf_bw = ringBuf->bw;
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+ uint32_t ringBuf_len = ringBuf->length;
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+ uint8_t *ringBuf_source = ringBuf->source;
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+
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+ if ((ringBuf_bw + size) > ringBuf_len)
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+ {
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+ ringBuf_bw = 0;
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+ }
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+ memcpy(ringBuf_source + ringBuf_bw, buffer, size);
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+ ringBuf->bw = (ringBuf_bw + size) % ringBuf_len;
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+ ringBuf->btoRead += size;
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+
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+ /*
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+ if(ringBuf->br!=0)
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+ {
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+ memcpy(ringBuf_source, buffer, size);
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+ ringBuf->br = 0;
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+ }
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+ */
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+ /*
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+ if( (ringBuf_bw + size) <= ringBuf_len )
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+ {
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+ memcpy(ringBuf_source + ringBuf_bw, buffer, size);
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+ }
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+ else
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+ {
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+ len = ringBuf_len - ringBuf_bw;
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+ memcpy(ringBuf_source + ringBuf_bw, buffer, len);
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+ memcpy(ringBuf_source, buffer + ringBuf_bw, size - len);
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+ }
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+ ringBuf->bw = (ringBuf->bw + size) % ringBuf_len;
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+ ringBuf->btoRead += size;
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+ */
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+
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+ return size;
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+}
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+uint32_t read_ringBuffer(uint8_t *buffer, uint32_t size, ringbuffer_t *ringBuf)
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+{
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+ uint32_t len = 0;
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+ volatile uint32_t ringBuf_br = ringBuf->br;
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+ uint32_t ringBuf_len = ringBuf->length;
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+ uint8_t *ringBuf_source = ringBuf->source;
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+
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+ memcpy(buffer, ringBuf_source, size);
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+ ringBuf->br = size;
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+ // if( (ringBuf_br + size ) <= ringBuf_len )
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+ // {
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+ // memcpy(buffer, ringBuf_source + ringBuf_br, size);
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+ // }
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+ // else
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+ // {
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+ // len = ringBuf_len - ringBuf_br;
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+ // memcpy(buffer, ringBuf_source + ringBuf_br, len);
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+ // memcpy(buffer + len, ringBuf_source, size - len);
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+ // }
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+ // ringBuf->br = (ringBuf->br + size) % ringBuf_len;
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+ // ringBuf->btoRead -= size;
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+
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+ return size;
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+}
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+Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, uint8 *txBuffer, uint16 sendLength, uint8 *rxBuffer, uint16 *rxlen, uint32 T_timeout)
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+{
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+ UartMsg_t UartRecvMsg;
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+ UartMsg_t UartSendMsg;
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+ BaseType_t Sendret = pdFALSE;
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+ BaseType_t Recvret = pdFALSE;
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+ uint32 retVal = E_NOT_OK;
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+ UartSendMsg.DataLen = sendLength;
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+ UartSendMsg.dataPtr = txBuffer;
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+ *rxlen = 0;
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+ Sendret = xQueueSend(UartSendQueue[transChannel], &UartSendMsg, 50);
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+ if (Sendret == pdTRUE)
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+ {
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+ Recvret = xQueueReceive(UartRecvQueue[recvChannel], &UartRecvMsg, T_timeout);
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+ if (Recvret == pdTRUE)
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+ {
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+ *rxlen = UartRecvMsg.DataLen;
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+ // read_ringBuffer(rxBuffer, queueRecvSize, &uartRingBuffer[recvChannel]);
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+ memcpy(rxBuffer, (uint8 *)(UartRecvMsg.dataAddr), UartRecvMsg.DataLen);
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+ retVal = E_OK;
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+ }
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+ else
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+ {
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+ retVal = 3;
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+ }
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+ }
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+ else
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+ {
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+ retVal = 2;
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+ }
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+ return retVal;
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+}
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+Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint8 *rxlen, uint32 T_timeout)
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+{
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+ UartMsg_t UartRecvMsg;
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+ BaseType_t ret = pdFALSE;
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+ uint32 retVal = E_NOT_OK;
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+ *rxlen = 0;
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+ ret = xQueueReceive(UartRecvQueue[recvChannel], &UartRecvMsg, T_timeout);
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+ if (ret == pdTRUE)
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+ {
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+ *rxlen = UartRecvMsg.DataLen;
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+
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+ memcpy(rxBuffer, (uint8 *)UartRecvMsg.dataAddr, UartRecvMsg.DataLen);
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+
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+ retVal = E_OK;
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+ }
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+ return retVal;
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+}
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+Std_ReturnType UART_Reset(uint8 recvChannel)
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+{
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+ uint32 retVal = E_NOT_OK;
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+ retVal = xQueueReset(UartRecvQueue[recvChannel]);
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+ return retVal;
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+}
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+Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
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{
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- UartBufferPtr UartData = {NULL, 0};
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- uint8 ReadLen = 0;
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- if (pSend)
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+ UartMsg_t UartSendMsg;
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+ BaseType_t ret = pdFALSE;
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+ uint32 retVal = E_NOT_OK;
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+ UartSendMsg.DataLen = sendLength;
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+ UartSendMsg.dataPtr = txBuffer;
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+ ret = xQueueSend(UartSendQueue[transChannel], &UartSendMsg, T_timeout);
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+ if (ret == pdTRUE)
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{
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- HAL_UART_SendStr(PORT_USART_0, pSend, sendLen);
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+ retVal = E_OK;
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}
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- if (readLen > 0)
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+ return retVal;
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+}
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+void UartInit(void)
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+{
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+ create_ringBuffer(&uartRingBuffer[0], ringBufferforUart[0], sizeof(ringBufferforUart[0]));
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+ create_ringBuffer(&uartRingBuffer[1], ringBufferforUart[1], sizeof(ringBufferforUart[1]));
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+ create_ringBuffer(&uartRingBuffer[2], ringBufferforUart[2], sizeof(ringBufferforUart[2]));
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+ UartRecvQueue[0] = xQueueCreate(6, sizeof(UartMsg_t));
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+ UartRecvQueue[1] = xQueueCreate(6, sizeof(UartMsg_t));
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+ UartRecvQueue[2] = xQueueCreate(6, sizeof(UartMsg_t));
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+ UartSendQueue[0] = xQueueCreate(3, sizeof(UartMsg_t));
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+ UartSendQueue[1] = xQueueCreate(1, sizeof(UartMsg_t));
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+ UartSendQueue[2] = xQueueCreate(1, sizeof(UartMsg_t));
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+ UartHalQueueHandle = xQueueCreate(9, sizeof(UartHalMsg_t));
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+
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+ xTaskCreate(Uart_Hal_RecvTask, (const char *const)"UartRecv", 256, (void *)0, main_TASK_PRIORITY + 5, NULL);
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+ xTaskCreate(Uart_Hal_SendTask, (const char *const)"UartSend", 256, (void *)0, main_TASK_PRIORITY + 4, NULL);
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+}
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+Std_ReturnType UartStartRecvFunc(uint8 channel)
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+{
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+ sint8 out = 0;
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+ volatile Std_ReturnType R_Uart_Status = E_NOT_OK;
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+ bufferIdx[channel] = 0;
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+ memset(RX_Buffer[channel], 0x00, BUFFER_SIZE);
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+ switch (channel)
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+ {
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+ case 0:
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+ IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
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+ break;
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+ case 1:
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+ IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
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+ break;
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+ case 2:
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+ IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
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+ break;
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+ default:
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+ break;
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+ }
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+ Uart_SetBuffer(channel, RX_Buffer[channel], DMA_SIZE, UART_RECEIVE);
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+ R_Uart_Status = Uart_AsyncReceive(channel, RX_Buffer[channel], DMA_SIZE);
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+ if (E_OK != R_Uart_Status)
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+ {
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+ Uart_Abort(channel, UART_RECEIVE);
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+ out = E_NOT_OK;
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+ }
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+ return out;
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+}
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+void Uart_Hal_RecvTask(void *pvParameters)
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+{
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+ UartHalMsg_t UartHalMsgRecv;
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+ UartMsg_t UartRecvMsg;
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+ uint16 recvSize = 0;
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+ BaseType_t ret = pdFALSE;
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+ BaseType_t ret_send = pdFALSE;
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+ uint32 T_bytesRemaining[3] = {0};
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+ uint16 T_timeout[3] = {0};
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+ volatile Uart_StatusType Uart_ReceiveStatus[3] = {UART_STATUS_TIMEOUT, UART_STATUS_TIMEOUT, UART_STATUS_TIMEOUT};
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+ uint8 UartIdx = UART_LPUART0;
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+ uint8 UartState[3] = {UartAbortRecv, UartAbortRecv, UartAbortRecv};
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+ while (1)
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{
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- osStatus_t ret = osMessageQueueGet(uart0DataHandle, &UartData, 0, timeout);
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- if (ret == osOK)
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+ if ((T_timeout[UartIdx] > 1000) && (Uart_ReceiveStatus[UartIdx] != UART_STATUS_NO_ERROR)) //判定UARTå�œæ¢ï¼Œè¶…æ—¶å�œæ¢ï¼Œä¸�是接收状æ€�则å�œæ¢
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{
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- if (UartData.dataPtr != NULL)
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+ Uart_Abort(UartIdx, UART_RECEIVE);
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+ UartState[UartIdx] = UartAbortRecv;
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+ T_timeout[UartIdx] = 0;
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+ }
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+ else if (Uart_ReceiveStatus[UartIdx] == UART_STATUS_NO_ERROR)
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+ {
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+ UartState[UartIdx] = UartRecvComplete;
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+ }
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+
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+ if ((UartState[UartIdx] == UartAbortRecv) || (UartState[UartIdx] == UartRecvComplete)) //判定UART开始接收:UARTå�œæ¢å�Žå¼€å§‹æŽ¥æ”¶
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+ {
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+ if (E_OK == UartStartRecvFunc(UartIdx))
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{
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- memcpy(pRead, (UINT8 *)UartData.dataPtr, UartData.len);
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- free(UartData.dataPtr);
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+ UartState[UartIdx] = UartStartRecv;
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+ }
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+ }
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+ Uart_ReceiveStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_RECEIVE);
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+ T_timeout[UartIdx]++;
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+ UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
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+ ret = xQueueReceive(UartHalQueueHandle, &UartHalMsgRecv, 1);
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+ if (ret == pdTRUE)
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+ {
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+ if (UartHalMsgRecv.event == LPUART_UART_IP_EVENT_RECV_IDLE)
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+ {
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+ if (UartHalMsgRecv.value > 0)
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+ {
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+ recvSize = write_ringBuffer(RX_Buffer[UartHalMsgRecv.Channel], UartHalMsgRecv.value, &uartRingBuffer[UartHalMsgRecv.Channel]);
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+ UartRecvMsg.DataLen = UartHalMsgRecv.value;
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+ UartRecvMsg.dataAddr = (uint32)(uartRingBuffer[UartHalMsgRecv.Channel].bw + uartRingBuffer[UartHalMsgRecv.Channel].source - UartHalMsgRecv.value);
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+ ret_send = xQueueSend(UartRecvQueue[UartHalMsgRecv.Channel], &UartRecvMsg, 10);
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+ }
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+ T_timeout[UartHalMsgRecv.Channel] = 0;
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+ UartState[UartHalMsgRecv.Channel] = UartRecvComplete;
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+ }
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+ }
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+ }
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+}
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+void Uart_Hal_SendTask(void *pvParameters)
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+{
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+ UartMsg_t UartSendMsg;
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+ BaseType_t ret = pdFALSE;
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+ uint32 T_bytesRemaining[3] = {0};
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+ uint16 T_timeout[3] = {0};
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+ volatile Std_ReturnType T_Uart_Status[3];
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+ uint8 UartIdx = UART_LPUART0;
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+ uint8 UartSendState[3] = {UartNoDataSend, UartNoDataSend, UartNoDataSend};
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+ while (1)
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+ {
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+ ret = xQueueReceive(UartSendQueue[UartIdx], &UartSendMsg, 1);
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+ if (ret == pdTRUE)
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+ {
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+
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+ T_Uart_Status[UartIdx] = Uart_AsyncSend(UartIdx, UartSendMsg.dataPtr, UartSendMsg.DataLen);
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+ if (E_OK != T_Uart_Status[UartIdx])
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+ {
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+ Uart_Abort(UartIdx, UART_SEND);
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+ UartSendState[UartIdx] = UartAbortSend;
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+ }
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+ else
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+ {
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+ UartSendState[UartIdx] = UartStartSend;
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+ }
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+ }
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+ /*开始���的判定*/
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+ if (UartSendState[UartIdx] == UartStartSend)
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+ {
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+ Uart_TransmitStatus[UartIdx] = Uart_GetStatus(UartIdx, &T_bytesRemaining[UartIdx], UART_SEND);
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+ T_timeout[UartIdx]++;
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+ }
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+ if (T_timeout[UartIdx] >= 1000 || ((Uart_TransmitStatus[UartIdx] != UART_STATUS_OPERATION_ONGOING) && (UartSendState[UartIdx] == UartStartSend)))
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+ {
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+ if (T_timeout[UartIdx] >= 1000)
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+ {
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+ Uart_Abort(UartIdx, UART_SEND);
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+ UartSendState[UartIdx] = UartAbortSend;
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+ }
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+ else if (Uart_TransmitStatus[UartIdx] == UART_STATUS_NO_ERROR)
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+ {
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|
|
+ UartSendState[UartIdx] = UartSendComplete;
|
|
|
+ }
|
|
|
+ T_timeout[UartIdx] = 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ UartIdx = (UartIdx + 1) > 2 ? 0 : (UartIdx + 1);
|
|
|
+ }
|
|
|
+}
|
|
|
+extern Lpuart_Uart_Ip_StateStructureType *Lpuart_Uart_Ip_apStateStructuresArray[LPUART_UART_IP_NUMBER_OF_INSTANCES];
|
|
|
+void UART_Callback(uint32 hwInstance, Lpuart_Uart_Ip_EventType event)
|
|
|
+{
|
|
|
+ // (void)userData;
|
|
|
+ Lpuart_Uart_Ip_StateStructureType *UartState;
|
|
|
+ UartState = (Lpuart_Uart_Ip_StateStructureType *)Lpuart_Uart_Ip_apStateStructuresArray[hwInstance];
|
|
|
+
|
|
|
+ /* Check the event type */
|
|
|
+ if (event == LPUART_UART_IP_EVENT_RX_FULL)
|
|
|
+ {
|
|
|
+ /* The reception stops when receiving idle is detected or the buffer is full */
|
|
|
+ if (bufferIdx[hwInstance] <= (BUFFER_SIZE - DMA_SIZE))
|
|
|
+ {
|
|
|
+ /* Update the buffer index and the rx buffer */
|
|
|
+ bufferIdx[hwInstance] += DMA_SIZE;
|
|
|
+ Uart_SetBuffer(hwInstance, &RX_Buffer[hwInstance][bufferIdx[hwInstance]], DMA_SIZE, UART_RECEIVE);
|
|
|
+ // Lpuart_Uart_Ip_SetRxBuffer(hwInstance, &RX_Buffer[bufferIdx], DMA_SIZE);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ if (event == LPUART_UART_IP_EVENT_ERROR)
|
|
|
+ {
|
|
|
+ // /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
|
|
|
+ // temp = DMA_SIZE - (uint32_t)IP_DMA->TCD->CITER.ELINKNO;
|
|
|
+ // /*Add the remaining data size to the sum of the received size*/
|
|
|
+ // bufferIdx[hwInstance] += temp;
|
|
|
+ /*Abort the receiving after detecting IDLE receiving*/
|
|
|
+ Lpuart_Uart_Ip_AbortReceivingData(hwInstance);
|
|
|
+ Lpuart_Uart_Ip_AbortSendingData(hwInstance);
|
|
|
+ // bufferIdx = 0;
|
|
|
+ }
|
|
|
+ if (event == LPUART_UART_IP_EVENT_RECV_IDLE)
|
|
|
+ {
|
|
|
+ uint32_t temp;
|
|
|
+ UartHalMsg_t UartHalMsg;
|
|
|
+ UartHalMsg.Channel = hwInstance;
|
|
|
+ UartHalMsg.event = event;
|
|
|
+ /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
|
|
|
+ temp = DMA_SIZE - (uint32_t)IP_DMA->TCD[hwInstance].CITER.ELINKNO;
|
|
|
+ /*Add the remaining data size to the sum of the received size*/
|
|
|
+ bufferIdx[hwInstance] += temp;
|
|
|
+ /*Abort the receiving after detecting IDLE receiving*/
|
|
|
+ UartHalMsg.value = bufferIdx[hwInstance];
|
|
|
+ xQueueSendFromISR(UartHalQueueHandle, &UartHalMsg, pdFALSE);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+/*CAN*/
|
|
|
+Can_PduType Can_CreatePduInfo(Can_IdType id, CAN_IdFrameType idFrame, PduIdType swPduHandle, uint8 length, uint8 *sdu)
|
|
|
+{
|
|
|
+ Can_PduType PduInfo;
|
|
|
+ switch (idFrame)
|
|
|
+ {
|
|
|
+ case CAN_STANDARD_ID_TYPE:
|
|
|
+ id = id & 0x7FF;
|
|
|
+ break;
|
|
|
+ case CANFD_STANDARD_ID_TYPE:
|
|
|
+ id = (id & 0x7FF) | 0x40000000;
|
|
|
+ break;
|
|
|
+ case CAN_EXTENDED_ID_TYPE:
|
|
|
+ id = id | 0x80000000;
|
|
|
+ break;
|
|
|
+ case CANFD_EXTENDED_ID_TYPE:
|
|
|
+ id = id | 0xC0000000;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ id = id & 0x7FF;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ PduInfo.id = id;
|
|
|
+ PduInfo.swPduHandle = swPduHandle;
|
|
|
+ PduInfo.length = length;
|
|
|
+ PduInfo.sdu = sdu;
|
|
|
+ return PduInfo;
|
|
|
+}
|
|
|
+Std_ReturnType CanIf_SendMessage(uint8 ControllerId, Can_Msg_Type CanMsg)
|
|
|
+{
|
|
|
+ volatile Can_PduType Can_PduInfo;
|
|
|
+ volatile Std_ReturnType CAN_Write_Status;
|
|
|
+ Std_ReturnType retVal = E_NOT_OK;
|
|
|
+ uint32 u8TimeOut = 100 * 100;
|
|
|
+ Can_HwHandleType Hth = Can0HardwareObject_TX + (Can_HwHandleType)ControllerId; // controller 0 --> Can0HardwareObject_TX
|
|
|
+
|
|
|
+ Can_PduInfo = Can_CreatePduInfo(CanMsg.id, CanMsg.idFrame, 0, CanMsg.length, CanMsg.sdu);
|
|
|
+
|
|
|
+ CAN_Write_Status = Can_Write(Hth, &Can_PduInfo);
|
|
|
+
|
|
|
+ CanIf_bTxFlag = FALSE;
|
|
|
+ if (CAN_Write_Status == E_OK)
|
|
|
+ {
|
|
|
+ while ((!CanIf_bTxFlag) && (u8TimeOut != 0U))
|
|
|
+ {
|
|
|
+ Can_MainFunction_Write();
|
|
|
+ u8TimeOut--;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ if (CanIf_bTxFlag == TRUE)
|
|
|
+ {
|
|
|
+ retVal = E_OK;
|
|
|
+ }
|
|
|
+ else
|
|
|
+ {
|
|
|
+ retVal = E_NOT_OK;
|
|
|
+ }
|
|
|
+ return retVal;
|
|
|
+}
|
|
|
+Can_Msg_Type Can_GetMsgInfo(Can_IdType id, uint8 length, uint8 *sdu)
|
|
|
+{
|
|
|
+ Can_Msg_Type CanMsgInfo;
|
|
|
+
|
|
|
+ CanMsgInfo.idFrame = (CAN_IdFrameType)((id >> 30) & 0x03);
|
|
|
+ if (CanMsgInfo.idFrame & 0x01)
|
|
|
+ {
|
|
|
+ CanMsgInfo.id = id & 0x7FF;
|
|
|
+ }
|
|
|
+ else
|
|
|
+ {
|
|
|
+ CanMsgInfo.id = id & 0x1FFFFFFF;
|
|
|
+ }
|
|
|
+ CanMsgInfo.length = length;
|
|
|
+ CanMsgInfo.sdu = sdu;
|
|
|
+
|
|
|
+ return CanMsgInfo;
|
|
|
+}
|
|
|
+
|
|
|
+void CanIf_ControllerBusOff(uint8 ControllerId)
|
|
|
+{
|
|
|
+ (void)ControllerId;
|
|
|
+}
|
|
|
+
|
|
|
+void CanIf_ControllerModeIndication(uint8 ControllerId, Can_ControllerStateType ControllerMode)
|
|
|
+{
|
|
|
+ (void)ControllerId;
|
|
|
+ (void)ControllerMode;
|
|
|
+}
|
|
|
+void CanIf_TxConfirmation(PduIdType CanTxPduId)
|
|
|
+{
|
|
|
+ CanIf_u8TxConfirmCnt++;
|
|
|
+ CanIf_bTxFlag = TRUE;
|
|
|
+ (void)CanTxPduId;
|
|
|
+}
|
|
|
+void CanIf_RxIndication(const Can_HwType *Mailbox, const PduInfoType *PduInfoPtr)
|
|
|
+{
|
|
|
+ Can_Msg_Type canRxMsg_Buff;
|
|
|
+ Can_Msg_Type_Data canRxMsgQueueData;
|
|
|
+ CanIf_bRxFlag = TRUE; // should not be delete
|
|
|
+ // should put the msg into message queue
|
|
|
+ canRxMsg_Buff = Can_GetMsgInfo(Mailbox->CanId, PduInfoPtr->SduLength, PduInfoPtr->SduDataPtr);
|
|
|
+ canRxMsgQueueData.id = canRxMsg_Buff.id;
|
|
|
+ canRxMsgQueueData.length = canRxMsg_Buff.length;
|
|
|
+ memcpy(canRxMsgQueueData.data, canRxMsg_Buff.sdu, canRxMsgQueueData.length);
|
|
|
+ xQueueSend(CanRecvQueueHandle, &canRxMsgQueueData, 0);
|
|
|
+}
|
|
|
+
|
|
|
+void CanIf_CurrentIcomConfiguration(uint8 ControllerId, IcomConfigIdType ConfigurationId, IcomSwitch_ErrorType Error)
|
|
|
+{
|
|
|
+ (void)ControllerId;
|
|
|
+ (void)ConfigurationId;
|
|
|
+ (void)Error;
|
|
|
+}
|
|
|
+
|
|
|
+/*EEP*/
|
|
|
+static Std_ReturnType TestEep_FlexNvmProgramPartCmd(
|
|
|
+ VAR(TestEep_CsecKeySize, AUTOMATIC) eepKeysize,
|
|
|
+ VAR(TestEep_SfeType, AUTOMATIC) eepSecurityFlagExtension,
|
|
|
+ VAR(TestEep_LoadFlexRamType, AUTOMATIC) eepLoadFlexRamAtReset,
|
|
|
+ VAR(TestEep_Eeprom_FlexRamPartitionType, AUTOMATIC) eepFlexRamPartition,
|
|
|
+ VAR(TestEep_Eeprom_FlexNvmPartitionType, AUTOMATIC) eepFlexNvmPartition)
|
|
|
+{
|
|
|
+ Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
|
|
|
+ uint32 u32FlexNvmPartSize = 0;
|
|
|
+
|
|
|
+ uint32 u32RegSimFcfg1 = 0UL;
|
|
|
+
|
|
|
+ u32RegSimFcfg1 = IP_SIM->FCFG1;
|
|
|
+
|
|
|
+ /*get DEPART value */
|
|
|
+ u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
|
|
|
+
|
|
|
+ /* check that it was not partitioned before */
|
|
|
+ if (u32FlexNvmPartSize == 0xF)
|
|
|
+ {
|
|
|
+ // /* if error flags are set the cmd is not executed */
|
|
|
+ // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8);
|
|
|
+ //
|
|
|
+ // /*erase DF 0 sector*/
|
|
|
+ // u32Addr=(TEST_EEP_DEEPROM_SECTOR_0_ADDR32 - D_EEPROM_BASE_ADDR) + 0x800000UL;
|
|
|
+ //
|
|
|
+ // REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, TEST_EEP_EEPROM_CMD_ERASE_SECTOR);
|
|
|
+ // REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)(u32Addr >> 16UL));
|
|
|
+ // REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)(u32Addr >> 8UL));
|
|
|
+ // REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)(u32Addr >> 0UL));
|
|
|
+ // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32 , TEST_EEP_EEPROM_FSTAT_CCIF_U8);
|
|
|
+ // while((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
|
|
|
+ // {
|
|
|
+ // }
|
|
|
+ //
|
|
|
+ if (0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
|
|
|
+ {
|
|
|
+ /* run program partition command */
|
|
|
+ REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, EEPROM_CMD_PROGRAM_PARTITION);
|
|
|
+ REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)eepKeysize);
|
|
|
+ REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)eepSecurityFlagExtension);
|
|
|
+ REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)eepLoadFlexRamAtReset);
|
|
|
+ REG_WRITE8(TEST_EEP_EEPROM_FCCOB4_ADDR32, (uint8)eepFlexRamPartition);
|
|
|
+ REG_WRITE8(TEST_EEP_EEPROM_FCCOB5_ADDR32, (uint8)eepFlexNvmPartition);
|
|
|
+ REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8);
|
|
|
+ while ((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
|
|
|
+ {
|
|
|
+ /* wait for operation to finish */
|
|
|
+ }
|
|
|
+ /* check if errors occured */
|
|
|
+ if (REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
|
|
|
+ {
|
|
|
+ /* NOK, error flags are set */
|
|
|
+ u8RetVal = (Std_ReturnType)E_NOT_OK;
|
|
|
}
|
|
|
- UartData.dataPtr = NULL;
|
|
|
- ReadLen = UartData.len;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
- osDelayUntil(1000);
|
|
|
- osMessageQueueReset(uart0DataHandle);
|
|
|
- memset(pRead, 0x00, readLen);
|
|
|
- ReadLen = 0;
|
|
|
+ /* NOK, error flags are set */
|
|
|
+ u8RetVal = (Std_ReturnType)E_NOT_OK;
|
|
|
}
|
|
|
}
|
|
|
- return ReadLen;
|
|
|
+ else
|
|
|
+ {
|
|
|
+ /* NOK, partitioned already */
|
|
|
+ u8RetVal = (Std_ReturnType)E_NOT_OK;
|
|
|
+ }
|
|
|
+ return u8RetVal;
|
|
|
+}
|
|
|
+
|
|
|
+void Eep_DepartParitition(TestEep_Eeprom_FlexNvmPartitionType T_EEP_SIZE)
|
|
|
+{
|
|
|
+ uint32 u32FlexNvmPartSize = 0;
|
|
|
+
|
|
|
+ uint32 u32RegSimFcfg1 = 0UL;
|
|
|
+
|
|
|
+ u32RegSimFcfg1 = IP_SIM->FCFG1;
|
|
|
+
|
|
|
+ /*get DEPART value */
|
|
|
+ u32FlexNvmPartSize = (uint32)((u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
|
|
|
+ if (u32FlexNvmPartSize == 0xF) /* We just partition again if curent size different with expected */
|
|
|
+ {
|
|
|
+ /* partition for EERAM 64K with NOT loading EERAM at reset in hardware */
|
|
|
+ TestEep_FlexNvmProgramPartCmd(EEP_FTFC_KEY_SIZE_0_BYTES, EEP_FTFC_VERIFY_ONLY_DISABLED,
|
|
|
+ EEP_FTFC_LOAD_AT_RESET_ENABLED, EEP_FTFC_EERAM_SIZE_4K, T_EEP_SIZE);
|
|
|
+ }
|
|
|
+}
|
|
|
+/* Erase memory by writing erase value */
|
|
|
+Std_ReturnType HAL_EEP_Erase(uint32 eepEraseStartAddr, uint32 eepEraseSize)
|
|
|
+{
|
|
|
+ Std_ReturnType retReturnType = E_OK;
|
|
|
+ MemIf_JobResultType retJobResultType;
|
|
|
+ retReturnType = Eep_Erase(eepEraseStartAddr, eepEraseSize);
|
|
|
+ if (E_OK != retReturnType)
|
|
|
+ {
|
|
|
+ return E_NOT_OK;
|
|
|
+ }
|
|
|
+ while (MEMIF_IDLE != Eep_GetStatus())
|
|
|
+ {
|
|
|
+ Eep_MainFunction();
|
|
|
+ }
|
|
|
+ retJobResultType = Eep_GetJobResult();
|
|
|
+ if (MEMIF_JOB_OK != retJobResultType)
|
|
|
+ {
|
|
|
+ return E_NOT_OK;
|
|
|
+ }
|
|
|
+ return E_OK;
|
|
|
+}
|
|
|
+
|
|
|
+/* Write one or more complete eeprom pages to the eeprom device */
|
|
|
+Std_ReturnType HAL_EEP_Write(uint32 eepWriteStartAddr, uint8 *pDataNeedtoWrite, uint32 dataSize)
|
|
|
+{
|
|
|
+ Std_ReturnType retReturnType = E_OK;
|
|
|
+ MemIf_JobResultType retJobResultType;
|
|
|
+
|
|
|
+ /*Erase the EEP before write*/
|
|
|
+ retReturnType = HAL_EEP_Erase(eepWriteStartAddr, dataSize);
|
|
|
+ if (E_OK != retReturnType)
|
|
|
+ {
|
|
|
+ return E_NOT_OK;
|
|
|
+ }
|
|
|
+
|
|
|
+ retReturnType = Eep_Write(eepWriteStartAddr, pDataNeedtoWrite, dataSize);
|
|
|
+ if (E_OK != retReturnType)
|
|
|
+ {
|
|
|
+ return E_NOT_OK;
|
|
|
+ }
|
|
|
+ while (MEMIF_IDLE != Eep_GetStatus())
|
|
|
+ {
|
|
|
+ Eep_MainFunction();
|
|
|
+ }
|
|
|
+ retJobResultType = Eep_GetJobResult();
|
|
|
+ if (MEMIF_JOB_OK != retJobResultType)
|
|
|
+ {
|
|
|
+ return E_NOT_OK;
|
|
|
+ }
|
|
|
+ return E_OK;
|
|
|
+}
|
|
|
+
|
|
|
+/* Reads from eeprom memory */
|
|
|
+Std_ReturnType HAL_EEP_Read(uint32 eepReadStartAddr, uint8 *pDataBuffer, uint32 dataSize)
|
|
|
+{
|
|
|
+ Std_ReturnType retReturnType = E_OK;
|
|
|
+ MemIf_JobResultType retJobResultType;
|
|
|
+ retReturnType = Eep_Read(eepReadStartAddr, pDataBuffer, dataSize);
|
|
|
+ if (E_OK != retReturnType)
|
|
|
+ {
|
|
|
+ return E_NOT_OK;
|
|
|
+ }
|
|
|
+ while (MEMIF_IDLE != Eep_GetStatus())
|
|
|
+ {
|
|
|
+ Eep_MainFunction();
|
|
|
+ }
|
|
|
+ retJobResultType = Eep_GetJobResult();
|
|
|
+ if (MEMIF_JOB_OK != retJobResultType)
|
|
|
+ {
|
|
|
+ return E_NOT_OK;
|
|
|
+ }
|
|
|
+ return E_OK;
|
|
|
}
|
|
|
-*/
|
|
|
- uint8_t __attribute__((section(".non_cacheable_data"))) RX_Buffer[UART_CH_MAX_CONFIG][BUFFER_SIZE];
|
|
|
- uint32_t bufferIdx[3] = {0};
|
|
|
- Std_ReturnType UART_Query_Data(uint8 transChannel, uint8 recvChannel, const uint8 *txBuffer, uint32 sendLength, uint8 *rxBuffer, uint16 *rxlen,uint32 T_timeout)
|
|
|
- {
|
|
|
- volatile Std_ReturnType R_Uart_Status;
|
|
|
- volatile Std_ReturnType T_Uart_Status;
|
|
|
- volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
|
|
|
- volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
|
|
|
- uint32 T_bytesRemaining;
|
|
|
- uint32 R_bytesRemaining;
|
|
|
- uint32 timeout = T_timeout;
|
|
|
- uint32 retVal = E_NOT_OK;
|
|
|
- // uint8 Rx_Buffer[MSG_LEN];
|
|
|
-
|
|
|
- /* Uart_AsyncReceive transmit data */
|
|
|
- // IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(0);
|
|
|
- bufferIdx[recvChannel]=0;
|
|
|
- switch(recvChannel)
|
|
|
- {
|
|
|
- case 0:
|
|
|
- IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
|
|
|
- break;
|
|
|
- case 1:
|
|
|
- IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
|
|
|
- break;
|
|
|
- case 2:
|
|
|
- IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
|
|
|
- break;
|
|
|
- default:
|
|
|
- break;
|
|
|
- }
|
|
|
- if (txBuffer == NULL || rxBuffer == NULL)
|
|
|
- {
|
|
|
- return retVal;
|
|
|
- }
|
|
|
- /* Uart_AsyncSend transmit data */
|
|
|
- Uart_SetBuffer(transChannel, txBuffer, sendLength, UART_SEND);
|
|
|
- T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
|
|
|
- if (E_OK != T_Uart_Status)
|
|
|
- {
|
|
|
- Uart_Abort(transChannel, UART_SEND);
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
- Uart_SetBuffer(recvChannel, &RX_Buffer[recvChannel][0], DMA_SIZE, UART_RECEIVE);
|
|
|
- R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
|
|
|
- if (E_OK != R_Uart_Status)
|
|
|
- {
|
|
|
- Uart_Abort(recvChannel, UART_RECEIVE);
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
-
|
|
|
- /* Check for no on-going transmission */
|
|
|
- do
|
|
|
- {
|
|
|
- if(Uart_TransmitStatus != UART_STATUS_NO_ERROR)
|
|
|
- {
|
|
|
- Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
|
|
|
- }
|
|
|
- if(Uart_ReceiveStatus != UART_STATUS_NO_ERROR)
|
|
|
- {
|
|
|
- Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &R_bytesRemaining, UART_RECEIVE);
|
|
|
- }
|
|
|
- vTaskDelay(pdMS_TO_TICKS(1));
|
|
|
- } while (((UART_STATUS_NO_ERROR != Uart_TransmitStatus || UART_STATUS_NO_ERROR != Uart_ReceiveStatus) && 0 < --timeout));
|
|
|
-
|
|
|
- if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
|
|
|
- {
|
|
|
- Uart_Abort(transChannel, UART_SEND);
|
|
|
- retVal = E_NOT_OK;
|
|
|
- }
|
|
|
- else
|
|
|
- {
|
|
|
- retVal = E_OK;
|
|
|
- }
|
|
|
- if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
|
|
|
- {
|
|
|
- Uart_Abort(recvChannel, UART_RECEIVE);
|
|
|
- *rxlen = bufferIdx[recvChannel];
|
|
|
- //IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
|
|
|
- retVal = E_NOT_OK;
|
|
|
- }
|
|
|
- else
|
|
|
- {
|
|
|
- *rxlen = bufferIdx[recvChannel];
|
|
|
- retVal = E_OK;
|
|
|
- }
|
|
|
- return retVal;
|
|
|
- }
|
|
|
-
|
|
|
- Std_ReturnType UART_Send_Data(uint8 transChannel, const uint8 *txBuffer, uint32 sendLength, uint32 T_timeout)
|
|
|
- {
|
|
|
-
|
|
|
- volatile Std_ReturnType T_Uart_Status;
|
|
|
- volatile Uart_StatusType Uart_TransmitStatus = UART_STATUS_TIMEOUT;
|
|
|
- uint32 T_bytesRemaining;
|
|
|
- uint32 timeout = T_timeout;
|
|
|
- uint32 retVal = E_NOT_OK;
|
|
|
- // uint8 Rx_Buffer[MSG_LEN];
|
|
|
-
|
|
|
- if (txBuffer == NULL)
|
|
|
- {
|
|
|
- return retVal;
|
|
|
- }
|
|
|
-
|
|
|
- /* Uart_AsyncSend transmit data */
|
|
|
-// Uart_SetBuffer(transChannel, txBuffer, sendLength, UART_SEND);
|
|
|
- T_Uart_Status = Uart_AsyncSend(transChannel, txBuffer, sendLength);
|
|
|
- if (E_OK != T_Uart_Status)
|
|
|
- {
|
|
|
- Uart_Abort(transChannel, UART_SEND);
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
-
|
|
|
- /* Check for no on-going transmission */
|
|
|
- do
|
|
|
- {
|
|
|
- Uart_TransmitStatus = Uart_GetStatus(transChannel, &T_bytesRemaining, UART_SEND);
|
|
|
- vTaskDelay(pdMS_TO_TICKS(1));
|
|
|
- } while ((UART_STATUS_NO_ERROR != Uart_TransmitStatus && 0 < --timeout));
|
|
|
-
|
|
|
- if ((UART_STATUS_NO_ERROR != Uart_TransmitStatus))
|
|
|
- {
|
|
|
- //Uart_Abort(transChannel, UART_SEND);
|
|
|
- retVal = E_NOT_OK;
|
|
|
- }
|
|
|
- else
|
|
|
- {
|
|
|
- retVal = E_OK;
|
|
|
- }
|
|
|
- return retVal;
|
|
|
- }
|
|
|
-
|
|
|
- Std_ReturnType UART_Receive_Data(uint8 recvChannel, uint8 *rxBuffer, uint16 *rxlen,sint32 T_timeout)
|
|
|
- {
|
|
|
- volatile Std_ReturnType R_Uart_Status=E_NOT_OK;
|
|
|
- volatile Uart_StatusType Uart_ReceiveStatus = UART_STATUS_TIMEOUT;
|
|
|
- uint32 T_bytesRemaining = 0;
|
|
|
- uint32 retVal = E_NOT_OK;
|
|
|
- // uint8 Rx_Buffer[MSG_LEN];
|
|
|
- bufferIdx[recvChannel]=0;
|
|
|
- *rxlen = 0;
|
|
|
- if (rxBuffer == NULL)
|
|
|
- {
|
|
|
- return retVal;
|
|
|
- }
|
|
|
- /* Uart_AsyncReceive transmit data */
|
|
|
- switch(recvChannel)
|
|
|
- {
|
|
|
- case 0:
|
|
|
- IP_LPUART0->CTRL |= LPUART_CTRL_ILIE(1);
|
|
|
- break;
|
|
|
- case 1:
|
|
|
- IP_LPUART1->CTRL |= LPUART_CTRL_ILIE(1);
|
|
|
- break;
|
|
|
- case 2:
|
|
|
- IP_LPUART2->CTRL |= LPUART_CTRL_ILIE(1);
|
|
|
- break;
|
|
|
- default:
|
|
|
- break;
|
|
|
- }
|
|
|
- Uart_SetBuffer(recvChannel, rxBuffer, DMA_SIZE, UART_RECEIVE);
|
|
|
- R_Uart_Status = Uart_AsyncReceive(recvChannel, rxBuffer, DMA_SIZE);
|
|
|
- if (E_OK != R_Uart_Status)
|
|
|
- {
|
|
|
- Uart_Abort(recvChannel, UART_RECEIVE);
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
- /* Check for no on-going transmission */
|
|
|
- do
|
|
|
- {
|
|
|
- Uart_ReceiveStatus = Uart_GetStatus(recvChannel, &T_bytesRemaining, UART_RECEIVE);
|
|
|
- vTaskDelay(pdMS_TO_TICKS(1));
|
|
|
- } while ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus)&& 0<T_timeout--);
|
|
|
- if ((UART_STATUS_NO_ERROR != Uart_ReceiveStatus))
|
|
|
- {
|
|
|
- Uart_Abort(recvChannel, UART_RECEIVE);
|
|
|
- *rxlen = bufferIdx[recvChannel];
|
|
|
- retVal = E_NOT_OK;
|
|
|
- }
|
|
|
- else
|
|
|
- {
|
|
|
- *rxlen = bufferIdx[recvChannel];
|
|
|
- retVal = E_OK;
|
|
|
- }
|
|
|
- return retVal;
|
|
|
- }
|
|
|
- void UART_Callback(uint32 hwInstance, Lpuart_Uart_Ip_EventType event )
|
|
|
- {
|
|
|
- // (void)userData;
|
|
|
- uint32_t temp;
|
|
|
- /* Check the event type */
|
|
|
- if (event == LPUART_UART_IP_EVENT_RX_FULL)
|
|
|
- {
|
|
|
- /* The reception stops when receiving idle is detected or the buffer is full */
|
|
|
- if (bufferIdx[hwInstance] <= (BUFFER_SIZE - DMA_SIZE))
|
|
|
- {
|
|
|
- /* Update the buffer index and the rx buffer */
|
|
|
- bufferIdx[hwInstance] += DMA_SIZE;
|
|
|
- Uart_SetBuffer(hwInstance,&RX_Buffer[hwInstance][bufferIdx[hwInstance]],DMA_SIZE,UART_RECEIVE);
|
|
|
- //Lpuart_Uart_Ip_SetRxBuffer(hwInstance, &RX_Buffer[bufferIdx], DMA_SIZE);
|
|
|
- }
|
|
|
- }
|
|
|
- else if (event == LPUART_UART_IP_EVENT_ERROR)
|
|
|
- {
|
|
|
-// /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
|
|
|
-// temp = DMA_SIZE - (uint32_t)IP_DMA->TCD->CITER.ELINKNO;
|
|
|
-// /*Add the remaining data size to the sum of the received size*/
|
|
|
-// bufferIdx[hwInstance] += temp;
|
|
|
- /*Abort the receiving after detecting IDLE receiving*/
|
|
|
- Lpuart_Uart_Ip_AbortReceivingData(hwInstance);
|
|
|
- // bufferIdx = 0;
|
|
|
- }
|
|
|
- else if( event == LPUART_UART_IP_EVENT_RECV_IDLE)
|
|
|
- {
|
|
|
- /*Get the transfered data size. DMA Channel 1 is used for LPUART DMA receiving, please modify accordingly.*/
|
|
|
- temp = DMA_SIZE - (uint32_t)IP_DMA->TCD[hwInstance].CITER.ELINKNO;
|
|
|
- /*Add the remaining data size to the sum of the received size*/
|
|
|
- bufferIdx[hwInstance] += temp;
|
|
|
- /*Abort the receiving after detecting IDLE receiving*/
|
|
|
- Lpuart_Uart_Ip_AbortReceivingData(hwInstance);
|
|
|
- // rxSuccess = true;
|
|
|
- }
|
|
|
- else
|
|
|
- {
|
|
|
- temp = 0;
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- /*CAN*/
|
|
|
- Can_PduType Can_CreatePduInfo(Can_IdType id, CAN_IdFrameType idFrame, PduIdType swPduHandle, uint8 length, uint8 *sdu)
|
|
|
- {
|
|
|
- Can_PduType PduInfo;
|
|
|
- switch (idFrame)
|
|
|
- {
|
|
|
- case CAN_STANDARD_ID_TYPE:
|
|
|
- id = id & 0x7FF;
|
|
|
- break;
|
|
|
- case CANFD_STANDARD_ID_TYPE:
|
|
|
- id = (id & 0x7FF) | 0x40000000;
|
|
|
- break;
|
|
|
- case CAN_EXTENDED_ID_TYPE:
|
|
|
- id = id | 0x80000000;
|
|
|
- break;
|
|
|
- case CANFD_EXTENDED_ID_TYPE:
|
|
|
- id = id | 0xC0000000;
|
|
|
- break;
|
|
|
- default:
|
|
|
- id = id & 0x7FF;
|
|
|
- break;
|
|
|
- }
|
|
|
- PduInfo.id = id;
|
|
|
- PduInfo.swPduHandle = swPduHandle;
|
|
|
- PduInfo.length = length;
|
|
|
- PduInfo.sdu = sdu;
|
|
|
-
|
|
|
- return PduInfo;
|
|
|
- }
|
|
|
- Std_ReturnType CanIf_SendMessage(uint8 ControllerId, Can_Msg_Type CanMsg)
|
|
|
- {
|
|
|
- volatile Can_PduType Can_PduInfo;
|
|
|
- volatile Std_ReturnType CAN_Write_Status;
|
|
|
- Std_ReturnType retVal = E_NOT_OK;
|
|
|
- uint32 u8TimeOut = 100*100;
|
|
|
- Can_HwHandleType Hth = Can0HardwareObject_TX + (Can_HwHandleType)ControllerId; // controller 0 --> Can0HardwareObject_TX
|
|
|
-
|
|
|
- Can_PduInfo = Can_CreatePduInfo(CanMsg.id, CanMsg.idFrame, 0, CanMsg.length, CanMsg.sdu);
|
|
|
-
|
|
|
- CAN_Write_Status = Can_Write(Hth, &Can_PduInfo);
|
|
|
-
|
|
|
- CanIf_bTxFlag = FALSE;
|
|
|
- if (CAN_Write_Status == E_OK)
|
|
|
- {
|
|
|
- while ((!CanIf_bTxFlag) && (u8TimeOut != 0U))
|
|
|
- {
|
|
|
- Can_MainFunction_Write();
|
|
|
- u8TimeOut--;
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- if (CanIf_bTxFlag == TRUE)
|
|
|
- {
|
|
|
- retVal = E_OK;
|
|
|
- }
|
|
|
- else
|
|
|
- {
|
|
|
- retVal = E_NOT_OK;
|
|
|
- }
|
|
|
- return retVal;
|
|
|
- }
|
|
|
- Can_Msg_Type Can_GetMsgInfo(Can_IdType id, uint8 length, uint8 *sdu)
|
|
|
- {
|
|
|
- Can_Msg_Type CanMsgInfo;
|
|
|
-
|
|
|
- CanMsgInfo.idFrame = (CAN_IdFrameType)((id >> 30) & 0x03);
|
|
|
- if (CanMsgInfo.idFrame & 0x01)
|
|
|
- {
|
|
|
- CanMsgInfo.id = id & 0x7FF;
|
|
|
- }
|
|
|
- else
|
|
|
- {
|
|
|
- CanMsgInfo.id = id & 0x1FFFFFFF;
|
|
|
- }
|
|
|
- CanMsgInfo.length = length;
|
|
|
- CanMsgInfo.sdu = sdu;
|
|
|
-
|
|
|
- return CanMsgInfo;
|
|
|
- }
|
|
|
-
|
|
|
- void CanIf_ControllerBusOff(uint8 ControllerId)
|
|
|
- {
|
|
|
- (void)ControllerId;
|
|
|
- }
|
|
|
-
|
|
|
- void CanIf_ControllerModeIndication(uint8 ControllerId, Can_ControllerStateType ControllerMode)
|
|
|
- {
|
|
|
- (void)ControllerId;
|
|
|
- (void)ControllerMode;
|
|
|
- }
|
|
|
- void CanIf_TxConfirmation(PduIdType CanTxPduId)
|
|
|
- {
|
|
|
- CanIf_u8TxConfirmCnt++;
|
|
|
- CanIf_bTxFlag = TRUE;
|
|
|
- (void)CanTxPduId;
|
|
|
- }
|
|
|
-
|
|
|
- uint32 canrxcounter = 0;
|
|
|
- void CanIf_RxIndication(const Can_HwType *Mailbox, const PduInfoType *PduInfoPtr)
|
|
|
- {
|
|
|
- static portBASE_TYPE xHigherPriorityTaskWoken;
|
|
|
- xHigherPriorityTaskWoken = pdFALSE;
|
|
|
- Can_Msg_Type canRxMsg_Buff;
|
|
|
- CanIf_bRxFlag = TRUE; // should not be delete
|
|
|
- // should put the msg into message queue
|
|
|
- canRxMsg_Buff = Can_GetMsgInfo(Mailbox->CanId, PduInfoPtr->SduLength, PduInfoPtr->SduDataPtr);
|
|
|
-// xQueueSendFromISR(CanRecvQueueHandle,&canRxMsg_Buff,&xHigherPriorityTaskWoken);
|
|
|
- Can_Msg_Type_Data Can_Msg_Data;
|
|
|
- Can_Msg_Data.id = canRxMsg_Buff.id;
|
|
|
- Can_Msg_Data.length = canRxMsg_Buff.length;
|
|
|
- memcpy(Can_Msg_Data.data,canRxMsg_Buff.sdu,Can_Msg_Data.length);
|
|
|
- xQueueSend(CanRecvQueueHandle,&Can_Msg_Data,0);
|
|
|
- canrxcounter++;
|
|
|
- }
|
|
|
-
|
|
|
- void CanIf_CurrentIcomConfiguration(uint8 ControllerId, IcomConfigIdType ConfigurationId, IcomSwitch_ErrorType Error)
|
|
|
- {
|
|
|
- (void)ControllerId;
|
|
|
- (void)ConfigurationId;
|
|
|
- (void)Error;
|
|
|
- }
|
|
|
-
|
|
|
-
|
|
|
- /*EEP*/
|
|
|
- static Std_ReturnType TestEep_FlexNvmProgramPartCmd
|
|
|
- (
|
|
|
- VAR(TestEep_CsecKeySize, AUTOMATIC) eepKeysize,
|
|
|
- VAR(TestEep_SfeType, AUTOMATIC) eepSecurityFlagExtension,
|
|
|
- VAR(TestEep_LoadFlexRamType, AUTOMATIC) eepLoadFlexRamAtReset,
|
|
|
- VAR(TestEep_Eeprom_FlexRamPartitionType, AUTOMATIC) eepFlexRamPartition,
|
|
|
- VAR(TestEep_Eeprom_FlexNvmPartitionType, AUTOMATIC) eepFlexNvmPartition
|
|
|
- )
|
|
|
- {
|
|
|
- Std_ReturnType u8RetVal = (Std_ReturnType)E_OK;
|
|
|
- uint32 u32Addr=0;
|
|
|
- uint32 u32FlexNvmPartSize = 0;
|
|
|
-
|
|
|
- uint32 u32RegSimFcfg1 = 0UL;
|
|
|
-
|
|
|
- u32RegSimFcfg1 = IP_SIM->FCFG1;
|
|
|
-
|
|
|
- /*get DEPART value */
|
|
|
- u32FlexNvmPartSize = (uint32)( (u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT );
|
|
|
-
|
|
|
- /* check that it was not partitioned before */
|
|
|
- if (u32FlexNvmPartSize == 0xF)
|
|
|
- {
|
|
|
- // /* if error flags are set the cmd is not executed */
|
|
|
- // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8);
|
|
|
- //
|
|
|
- // /*erase DF 0 sector*/
|
|
|
- // u32Addr=(TEST_EEP_DEEPROM_SECTOR_0_ADDR32 - D_EEPROM_BASE_ADDR) + 0x800000UL;
|
|
|
- //
|
|
|
- // REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32, TEST_EEP_EEPROM_CMD_ERASE_SECTOR);
|
|
|
- // REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)(u32Addr >> 16UL));
|
|
|
- // REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)(u32Addr >> 8UL));
|
|
|
- // REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)(u32Addr >> 0UL));
|
|
|
- // REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32 , TEST_EEP_EEPROM_FSTAT_CCIF_U8);
|
|
|
- // while((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
|
|
|
- // {
|
|
|
- // }
|
|
|
- //
|
|
|
- if(0U==REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32,TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
|
|
|
- {
|
|
|
- /* run program partition command */
|
|
|
- REG_WRITE8(TEST_EEP_EEPROM_FCCOB0_ADDR32,EEPROM_CMD_PROGRAM_PARTITION);
|
|
|
- REG_WRITE8(TEST_EEP_EEPROM_FCCOB1_ADDR32, (uint8)eepKeysize);
|
|
|
- REG_WRITE8(TEST_EEP_EEPROM_FCCOB2_ADDR32, (uint8)eepSecurityFlagExtension);
|
|
|
- REG_WRITE8(TEST_EEP_EEPROM_FCCOB3_ADDR32, (uint8)eepLoadFlexRamAtReset);
|
|
|
- REG_WRITE8(TEST_EEP_EEPROM_FCCOB4_ADDR32, (uint8)eepFlexRamPartition);
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- REG_WRITE8(TEST_EEP_EEPROM_FCCOB5_ADDR32, (uint8)eepFlexNvmPartition);
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- REG_WRITE8(TEST_EEP_EEPROM_FSTAT_ADDR32 , TEST_EEP_EEPROM_FSTAT_CCIF_U8);
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- while((0U == REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32, TEST_EEP_EEPROM_FSTAT_CCIF_U8)))
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- {
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- /* wait for operation to finish */
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- }
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- /* check if errors occured */
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- if(REG_BIT_GET8(TEST_EEP_EEPROM_FSTAT_ADDR32,TEST_EEP_EEPROM_FSTAT_ACCERR_U8 | TEST_EEP_EEPROM_FSTAT_FPVIOL_U8))
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- {
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- /* NOK, error flags are set */
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- u8RetVal = (Std_ReturnType)E_NOT_OK;
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- }
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- }
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- else
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- {
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- /* NOK, error flags are set */
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- u8RetVal = (Std_ReturnType)E_NOT_OK;
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- }
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- }
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- else
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- {
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- /* NOK, partitioned already */
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- u8RetVal = (Std_ReturnType)E_NOT_OK;
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- }
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- return u8RetVal;
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- }
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-
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- void Eep_DepartParitition(TestEep_Eeprom_FlexNvmPartitionType T_EEP_SIZE)
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- {
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- uint32 u32FlexNvmPartSize = 0;
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-
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- uint32 u32RegSimFcfg1 = 0UL;
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-
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- u32RegSimFcfg1 = IP_SIM->FCFG1;
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-
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- /*get DEPART value */
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- u32FlexNvmPartSize = (uint32)( (u32RegSimFcfg1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT );
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- if (u32FlexNvmPartSize == 0xF) /* We just partition again if curent size different with expected */
|
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- {
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-
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- /* partition for EERAM 64K with NOT loading EERAM at reset in hardware */
|
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- TestEep_FlexNvmProgramPartCmd(EEP_FTFC_KEY_SIZE_0_BYTES, EEP_FTFC_VERIFY_ONLY_DISABLED, \
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- EEP_FTFC_LOAD_AT_RESET_ENABLED, EEP_FTFC_EERAM_SIZE_4K, T_EEP_SIZE);
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- }
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|
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-
|
|
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- }
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-
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-
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- /* Erase memory by writing erase value */
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- Std_ReturnType HAL_EEP_Erase(uint32 eepEraseStartAddr,uint32 eepEraseSize)
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|
|
- {
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- Std_ReturnType retReturnType = E_OK;
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- MemIf_JobResultType retJobResultType;
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- retReturnType = Eep_Erase(eepEraseStartAddr, eepEraseSize);
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- if(E_OK != retReturnType)
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- {
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- return E_NOT_OK;
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|
|
- }
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|
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- while(MEMIF_IDLE != Eep_GetStatus())
|
|
|
- {
|
|
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- Eep_MainFunction();
|
|
|
- }
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- retJobResultType = Eep_GetJobResult();
|
|
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- if(MEMIF_JOB_OK != retJobResultType)
|
|
|
- {
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
- return E_OK;
|
|
|
- }
|
|
|
-
|
|
|
- /* Write one or more complete eeprom pages to the eeprom device */
|
|
|
- Std_ReturnType HAL_EEP_Write(uint32 eepWriteStartAddr,uint8* pDataNeedtoWrite,uint32 dataSize)
|
|
|
- {
|
|
|
- Std_ReturnType retReturnType = E_OK;
|
|
|
- MemIf_JobResultType retJobResultType;
|
|
|
-
|
|
|
- /*Erase the EEP before write*/
|
|
|
- retReturnType = HAL_EEP_Erase(eepWriteStartAddr,dataSize);
|
|
|
- if(E_OK != retReturnType)
|
|
|
- {
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
-
|
|
|
- retReturnType = Eep_Write(eepWriteStartAddr, pDataNeedtoWrite, dataSize);
|
|
|
- if(E_OK != retReturnType)
|
|
|
- {
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
- while(MEMIF_IDLE != Eep_GetStatus())
|
|
|
- {
|
|
|
- Eep_MainFunction();
|
|
|
- }
|
|
|
- retJobResultType = Eep_GetJobResult();
|
|
|
- if(MEMIF_JOB_OK != retJobResultType)
|
|
|
- {
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
- return E_OK;
|
|
|
- }
|
|
|
-
|
|
|
-
|
|
|
- /* Reads from eeprom memory */
|
|
|
- Std_ReturnType HAL_EEP_Read(uint32 eepReadStartAddr,uint8* pDataBuffer,uint32 dataSize)
|
|
|
- {
|
|
|
- Std_ReturnType retReturnType = E_OK;
|
|
|
- MemIf_JobResultType retJobResultType;
|
|
|
- retReturnType = Eep_Read(eepReadStartAddr, pDataBuffer, dataSize);
|
|
|
- if(E_OK != retReturnType)
|
|
|
- {
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
- while(MEMIF_IDLE != Eep_GetStatus())
|
|
|
- {
|
|
|
- Eep_MainFunction();
|
|
|
- }
|
|
|
- retJobResultType = Eep_GetJobResult();
|
|
|
- if(MEMIF_JOB_OK != retJobResultType)
|
|
|
- {
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
- return E_OK;
|
|
|
- }
|
|
|
-
|
|
|
-
|
|
|
-
|
|
|
-
|
|
|
- /* Compares a eeprom memory area with an application data buffer */
|
|
|
- Std_ReturnType HAL_EEP_Compare(uint32 eepCompareStartAddr,uint8* pDataNeedtoCompare,uint32 dataSize)
|
|
|
- {
|
|
|
- Std_ReturnType retReturnType = E_OK;
|
|
|
- MemIf_JobResultType retJobResultType;
|
|
|
- retReturnType = Eep_Compare(eepCompareStartAddr, pDataNeedtoCompare, dataSize);
|
|
|
- if(E_OK != retReturnType)
|
|
|
- {
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
- while(MEMIF_IDLE != Eep_GetStatus())
|
|
|
- {
|
|
|
- Eep_MainFunction();
|
|
|
- }
|
|
|
- retJobResultType = Eep_GetJobResult();
|
|
|
- if(MEMIF_JOB_OK != retJobResultType)
|
|
|
- {
|
|
|
- return E_NOT_OK;
|
|
|
- }
|
|
|
- return E_OK;
|
|
|
- }
|
|
|
|
|
|
+/* Compares a eeprom memory area with an application data buffer */
|
|
|
+Std_ReturnType HAL_EEP_Compare(uint32 eepCompareStartAddr, uint8 *pDataNeedtoCompare, uint32 dataSize)
|
|
|
+{
|
|
|
+ Std_ReturnType retReturnType = E_OK;
|
|
|
+ MemIf_JobResultType retJobResultType;
|
|
|
+ retReturnType = Eep_Compare(eepCompareStartAddr, pDataNeedtoCompare, dataSize);
|
|
|
+ if (E_OK != retReturnType)
|
|
|
+ {
|
|
|
+ return E_NOT_OK;
|
|
|
+ }
|
|
|
+ while (MEMIF_IDLE != Eep_GetStatus())
|
|
|
+ {
|
|
|
+ Eep_MainFunction();
|
|
|
+ }
|
|
|
+ retJobResultType = Eep_GetJobResult();
|
|
|
+ if (MEMIF_JOB_OK != retJobResultType)
|
|
|
+ {
|
|
|
+ return E_NOT_OK;
|
|
|
+ }
|
|
|
+ return E_OK;
|
|
|
+}
|
|
|
+/* @brief VECTKEY value so that AIRCR register write is not ignored. */
|
|
|
+#define FEATURE_SCB_VECTKEY (0x05FAU)
|
|
|
+void SystemSoftwareReset(void)
|
|
|
+{
|
|
|
+ uint32_t regValue;
|
|
|
+
|
|
|
+ /* Read Application Interrupt and Reset Control Register */
|
|
|
+ regValue = S32_SCB->AIRCR;
|
|
|
|
|
|
+ /* Clear register key */
|
|
|
+ regValue &= ~(S32_SCB_AIRCR_VECTKEY_MASK);
|
|
|
+
|
|
|
+ /* Configure System reset request bit and Register Key */
|
|
|
+ regValue |= S32_SCB_AIRCR_VECTKEY(FEATURE_SCB_VECTKEY);
|
|
|
+ regValue |= S32_SCB_AIRCR_SYSRESETREQ(0x1u);
|
|
|
+
|
|
|
+ /* Write computed register value */
|
|
|
+ S32_SCB->AIRCR = regValue;
|
|
|
+}
|