|
@@ -61,12 +61,12 @@ extern "C" {
|
|
|
|
|
|
/* List of configurations for interrupts */
|
|
|
static const IntCtrl_Ip_IrqConfigType aIrqConfiguration[] = {
|
|
|
- {DMA0_IRQn, (boolean)TRUE, 0U},
|
|
|
- {DMA1_IRQn, (boolean)TRUE, 0U},
|
|
|
- {DMA2_IRQn, (boolean)TRUE, 0U},
|
|
|
- {DMA3_IRQn, (boolean)TRUE, 3U},
|
|
|
- {DMA4_IRQn, (boolean)TRUE, 3U},
|
|
|
- {DMA5_IRQn, (boolean)TRUE, 3U},
|
|
|
+ {DMA0_IRQn, (boolean)TRUE, 6U},
|
|
|
+ {DMA1_IRQn, (boolean)TRUE, 6U},
|
|
|
+ {DMA2_IRQn, (boolean)TRUE, 6U},
|
|
|
+ {DMA3_IRQn, (boolean)TRUE, 7U},
|
|
|
+ {DMA4_IRQn, (boolean)TRUE, 7U},
|
|
|
+ {DMA5_IRQn, (boolean)TRUE, 7U},
|
|
|
{DMA6_IRQn, (boolean)FALSE, 0U},
|
|
|
{DMA7_IRQn, (boolean)FALSE, 0U},
|
|
|
{DMA8_IRQn, (boolean)FALSE, 0U},
|
|
@@ -83,16 +83,16 @@ static const IntCtrl_Ip_IrqConfigType aIrqConfiguration[] = {
|
|
|
{FTFC_Read_Collision_IRQn, (boolean)FALSE, 0U},
|
|
|
{LVD_LVW_IRQn, (boolean)FALSE, 0U},
|
|
|
{FTFC_Fault_IRQn, (boolean)FALSE, 0U},
|
|
|
- {WDOG_EWM_IRQn, (boolean)FALSE, 0U},
|
|
|
+ {WDOG_EWM_IRQn, (boolean)TRUE, 5U},
|
|
|
{RCM_IRQn, (boolean)FALSE, 0U},
|
|
|
{LPI2C0_Master_IRQn, (boolean)FALSE, 0U},
|
|
|
{LPI2C0_Slave_IRQn, (boolean)FALSE, 0U},
|
|
|
{LPSPI0_IRQn, (boolean)FALSE, 0U},
|
|
|
{LPSPI1_IRQn, (boolean)FALSE, 0U},
|
|
|
{LPSPI2_IRQn, (boolean)FALSE, 0U},
|
|
|
- {LPUART0_RxTx_IRQn, (boolean)TRUE, 0U},
|
|
|
- {LPUART1_RxTx_IRQn, (boolean)TRUE, 0U},
|
|
|
- {LPUART2_RxTx_IRQn, (boolean)TRUE, 0U},
|
|
|
+ {LPUART0_RxTx_IRQn, (boolean)TRUE, 6U},
|
|
|
+ {LPUART1_RxTx_IRQn, (boolean)TRUE, 6U},
|
|
|
+ {LPUART2_RxTx_IRQn, (boolean)TRUE, 6U},
|
|
|
{ADC0_IRQn, (boolean)FALSE, 0U},
|
|
|
{ADC1_IRQn, (boolean)FALSE, 0U},
|
|
|
{CMP0_IRQn, (boolean)FALSE, 0U},
|
|
@@ -115,11 +115,11 @@ static const IntCtrl_Ip_IrqConfigType aIrqConfiguration[] = {
|
|
|
{SWI_IRQn, (boolean)FALSE, 0U},
|
|
|
{PDB1_IRQn, (boolean)FALSE, 0U},
|
|
|
{FLEXIO_IRQn, (boolean)TRUE, 3U},
|
|
|
- {CAN0_ORed_IRQn, (boolean)TRUE, 3U},
|
|
|
- {CAN0_Error_IRQn, (boolean)TRUE, 3U},
|
|
|
- {CAN0_Wake_Up_IRQn, (boolean)TRUE, 3U},
|
|
|
- {CAN0_ORed_0_15_MB_IRQn, (boolean)TRUE, 3U},
|
|
|
- {CAN0_ORed_16_31_MB_IRQn, (boolean)TRUE, 3U},
|
|
|
+ {CAN0_ORed_IRQn, (boolean)TRUE, 7U},
|
|
|
+ {CAN0_Error_IRQn, (boolean)TRUE, 7U},
|
|
|
+ {CAN0_Wake_Up_IRQn, (boolean)TRUE, 7U},
|
|
|
+ {CAN0_ORed_0_15_MB_IRQn, (boolean)TRUE, 7U},
|
|
|
+ {CAN0_ORed_16_31_MB_IRQn, (boolean)TRUE, 7U},
|
|
|
{CAN1_ORed_IRQn, (boolean)FALSE, 0U},
|
|
|
{CAN1_Error_IRQn, (boolean)FALSE, 0U},
|
|
|
{CAN1_ORed_0_15_MB_IRQn, (boolean)FALSE, 0U},
|