BLE/Debug_FLASH/Project_Settings/Startup_Code/system.c.016i.visibility

Marking local functions:


Marking externally visible functions: SystemInit Sys_GetCoreID default_interrupt_routine startup_go_to_user_mode


Marking externally visible variables: RESET_CATCH_CORE


Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:

SystemInit/6 (SystemInit) @06edd700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public section:.systeminit
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: sys_m4_cache_init/1 
Sys_GetCoreID/4 (Sys_GetCoreID) @06edde00
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
default_interrupt_routine/3 (default_interrupt_routine) @06eddb60
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
startup_go_to_user_mode/2 (startup_go_to_user_mode) @06edd8c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
sys_m4_cache_init/1 (sys_m4_cache_init) @06edd540
  Type: function definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: SystemInit/6 
  Calls: 
RESET_CATCH_CORE/0 (RESET_CATCH_CORE) @06edba68
  Type: variable definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Varpool flags: initialized
__attribute__((section (".systeminit")))
SystemInit ()
{
  <bb 2> :
  _1 = 3758153728B;
  _2 = _1->CPACR;
  _3 = 3758153728B;
  _4 = _2 | 15728640;
  _3->CPACR = _4;
  __asm__ __volatile__("dsb");
  __asm__ __volatile__("isb");
  _5 = 3758153728B;
  _6 = _5->CCR;
  _7 = 3758153728B;
  _8 = _6 | 1;
  _7->CCR = _8;
  _9 = 3758153728B;
  _10 = _9->SHPR3;
  _11 = 3758153728B;
  _12 = _10 & 4278255615;
  _11->SHPR3 = _12;
  _13 = 1073741824B;
  _13->MPRA = 2004318071;
  _14 = 1073741824B;
  _14->PACRA = 0;
  _15 = 1073741824B;
  _15->PACRB = 0;
  _16 = 1073741824B;
  _16->PACRD = 0;
  _17 = 1073741824B;
  _17->OPACR[0] = 0;
  _18 = 1073741824B;
  _18->OPACR[1] = 0;
  _19 = 1073741824B;
  _19->OPACR[2] = 0;
  _20 = 1073741824B;
  _20->OPACR[3] = 0;
  _21 = 1073741824B;
  _21->OPACR[4] = 0;
  _22 = 1073741824B;
  _22->OPACR[5] = 0;
  _23 = 1073741824B;
  _23->OPACR[6] = 0;
  _24 = 1073741824B;
  _24->OPACR[7] = 0;
  _25 = 1073741824B;
  _25->OPACR[8] = 0;
  _26 = 1073741824B;
  _26->OPACR[9] = 0;
  _27 = 1073741824B;
  _27->OPACR[10] = 0;
  _28 = 1073741824B;
  _28->OPACR[11] = 0;
  __asm__ __volatile__("dsb");
  __asm__ __volatile__("isb");
  sys_m4_cache_init (0);
  return;

}


Sys_GetCoreID ()
{
  uint8 D.6226;

  <bb 2> :
  D.6226 = 0;

  <bb 3> :
<L0>:
  return D.6226;

}


default_interrupt_routine ()
{
  <bb 2> :
  goto <bb 2>; [INV]

}


startup_go_to_user_mode ()
{
  <bb 2> :
  return;

}


sys_m4_cache_init (uint8 cache)
{
  uint8 RetValue;
  uint8 D.6224;

  <bb 2> :
  RetValue = 0;
  if (cache == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  _1 = 3758628864B;
  _1->PCCCR = 83886080;
  _2 = 3758628864B;
  _3 = _2->PCCCR;
  _4 = 3758628864B;
  _5 = _3 | 2147483648;
  _4->PCCCR = _5;

  <bb 4> :
  _6 = 3758628864B;
  _7 = _6->PCCCR;
  _8 = _7 & 2147483648;
  if (_8 == 2147483648)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 5> :
  _9 = 3758628864B;
  _10 = _9->PCCCR;
  _11 = 3758628864B;
  _12 = _10 | 1;
  _11->PCCCR = _12;
  goto <bb 7>; [INV]

  <bb 6> :
  RetValue = 1;

  <bb 7> :
  D.6224 = RetValue;

  <bb 8> :
<L6>:
  return D.6224;

}