Clock_Ip_Divider.c.082i.materialize-all-clones 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615
  1. SetSimTraceDivMul (const struct Clock_Ip_DividerConfigType * config)
  2. {
  3. <bb 2> :
  4. SetSimTraceDivMul_TrustedCall (config_2(D));
  5. return;
  6. }
  7. SetSimTraceDivMul_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  8. {
  9. struct SIM_Type * _1;
  10. long unsigned int _2;
  11. long unsigned int _3;
  12. long unsigned int _4;
  13. long unsigned int _5;
  14. long unsigned int _6;
  15. unsigned char _7;
  16. long unsigned int _8;
  17. long unsigned int _9;
  18. long unsigned int _10;
  19. long unsigned int _11;
  20. struct SIM_Type * _12;
  21. long unsigned int _13;
  22. <bb 2> :
  23. _1 = 1074036736B;
  24. _2 ={v} _1->CLKDIV4;
  25. _3 = config_15(D)->value;
  26. _4 = _3 + 4294967295;
  27. _5 = _4 << 1;
  28. _6 = _5 & 14;
  29. _7 = config_15(D)->options[0];
  30. _8 = (long unsigned int) _7;
  31. _9 = _8 + 4294967295;
  32. _10 = _9 & 1;
  33. _11 = _6 | _10;
  34. _12 = 1074036736B;
  35. _13 = _2 | _11;
  36. _12->CLKDIV4 ={v} _13;
  37. return;
  38. }
  39. SetPccPcdDivFrac (const struct Clock_Ip_DividerConfigType * config)
  40. {
  41. <bb 2> :
  42. SetPccPcdDivFrac_TrustedCall (config_2(D));
  43. return;
  44. }
  45. SetPccPcdDivFrac_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  46. {
  47. uint32 regValue;
  48. struct PCC_Type * _1;
  49. <unnamed type> _2;
  50. unsigned char _3;
  51. int _4;
  52. long unsigned int _5;
  53. long unsigned int _6;
  54. long unsigned int _7;
  55. unsigned char _8;
  56. long unsigned int _9;
  57. long unsigned int _10;
  58. long unsigned int _11;
  59. long unsigned int _12;
  60. struct PCC_Type * _13;
  61. <unnamed type> _14;
  62. unsigned char _15;
  63. int _16;
  64. <bb 2> :
  65. _1 = 1074155520B;
  66. _2 = config_18(D)->name;
  67. _3 = clockFeatures[_2][5];
  68. _4 = (int) _3;
  69. regValue_19 ={v} _1->PCCn[_4];
  70. regValue_20 = regValue_19 & 4294967280;
  71. _5 = config_18(D)->value;
  72. _6 = _5 + 4294967295;
  73. _7 = _6 & 7;
  74. regValue_21 = regValue_20 | _7;
  75. _8 = config_18(D)->options[0];
  76. _9 = (long unsigned int) _8;
  77. _10 = _9 + 4294967295;
  78. _11 = _10 << 3;
  79. _12 = _11 & 8;
  80. regValue_22 = regValue_21 | _12;
  81. _13 = 1074155520B;
  82. _14 = config_18(D)->name;
  83. _15 = clockFeatures[_14][5];
  84. _16 = (int) _15;
  85. _13->PCCn[_16] ={v} regValue_22;
  86. return;
  87. }
  88. SetSimClkoutDiv (const struct Clock_Ip_DividerConfigType * config)
  89. {
  90. <bb 2> :
  91. SetSimClkoutDiv_TrustedCall (config_2(D));
  92. return;
  93. }
  94. SetSimClkoutDiv_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  95. {
  96. uint32 regValue;
  97. long unsigned int _1;
  98. struct SIM_Type * _2;
  99. long unsigned int _3;
  100. long unsigned int _4;
  101. long unsigned int _5;
  102. long unsigned int _6;
  103. struct SIM_Type * _7;
  104. <bb 2> :
  105. _1 = config_10(D)->value;
  106. if (_1 != 0)
  107. goto <bb 3>; [INV]
  108. else
  109. goto <bb 4>; [INV]
  110. <bb 3> :
  111. _2 = 1074036736B;
  112. regValue_11 ={v} _2->CHIPCTL;
  113. regValue_12 = regValue_11 & 4294965503;
  114. _3 = config_10(D)->value;
  115. _4 = _3 + 4294967295;
  116. _5 = _4 << 8;
  117. _6 = _5 & 1792;
  118. regValue_13 = regValue_12 | _6;
  119. _7 = 1074036736B;
  120. _7->CHIPCTL ={v} regValue_13;
  121. <bb 4> :
  122. return;
  123. }
  124. SetScgHsrunDivslow (const struct Clock_Ip_DividerConfigType * config)
  125. {
  126. <bb 2> :
  127. SetScgHsrunDivslow_TrustedCall (config_2(D));
  128. return;
  129. }
  130. SetScgHsrunDivslow_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  131. {
  132. uint32 regValue;
  133. long unsigned int _1;
  134. struct SCG_Type * _2;
  135. long unsigned int _3;
  136. long unsigned int _4;
  137. struct SCG_Type * _5;
  138. <bb 2> :
  139. _1 = config_8(D)->value;
  140. if (_1 != 0)
  141. goto <bb 3>; [INV]
  142. else
  143. goto <bb 4>; [INV]
  144. <bb 3> :
  145. _2 = 1074151424B;
  146. regValue_9 ={v} _2->HCCR;
  147. regValue_10 = regValue_9 & 4294967280;
  148. _3 = config_8(D)->value;
  149. _4 = _3 + 4294967295;
  150. regValue_11 = regValue_10 | _4;
  151. _5 = 1074151424B;
  152. _5->HCCR ={v} regValue_11;
  153. <bb 4> :
  154. return;
  155. }
  156. SetScgHsrunDivbus (const struct Clock_Ip_DividerConfigType * config)
  157. {
  158. <bb 2> :
  159. SetScgHsrunDivbus_TrustedCall (config_2(D));
  160. return;
  161. }
  162. SetScgHsrunDivbus_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  163. {
  164. uint32 regValue;
  165. long unsigned int _1;
  166. struct SCG_Type * _2;
  167. long unsigned int _3;
  168. long unsigned int _4;
  169. long unsigned int _5;
  170. struct SCG_Type * _6;
  171. <bb 2> :
  172. _1 = config_9(D)->value;
  173. if (_1 != 0)
  174. goto <bb 3>; [INV]
  175. else
  176. goto <bb 4>; [INV]
  177. <bb 3> :
  178. _2 = 1074151424B;
  179. regValue_10 ={v} _2->HCCR;
  180. regValue_11 = regValue_10 & 4294967055;
  181. _3 = config_9(D)->value;
  182. _4 = _3 + 4294967295;
  183. _5 = _4 << 4;
  184. regValue_12 = regValue_11 | _5;
  185. _6 = 1074151424B;
  186. _6->HCCR ={v} regValue_12;
  187. <bb 4> :
  188. return;
  189. }
  190. SetScgHsrunDivcore (const struct Clock_Ip_DividerConfigType * config)
  191. {
  192. <bb 2> :
  193. SetScgHsrunDivcore_TrustedCall (config_2(D));
  194. return;
  195. }
  196. SetScgHsrunDivcore_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  197. {
  198. uint32 regValue;
  199. long unsigned int _1;
  200. struct SCG_Type * _2;
  201. long unsigned int _3;
  202. long unsigned int _4;
  203. long unsigned int _5;
  204. struct SCG_Type * _6;
  205. <bb 2> :
  206. _1 = config_9(D)->value;
  207. if (_1 != 0)
  208. goto <bb 3>; [INV]
  209. else
  210. goto <bb 4>; [INV]
  211. <bb 3> :
  212. _2 = 1074151424B;
  213. regValue_10 ={v} _2->HCCR;
  214. regValue_11 = regValue_10 & 4293984255;
  215. _3 = config_9(D)->value;
  216. _4 = _3 + 4294967295;
  217. _5 = _4 << 16;
  218. regValue_12 = regValue_11 | _5;
  219. _6 = 1074151424B;
  220. _6->HCCR ={v} regValue_12;
  221. <bb 4> :
  222. return;
  223. }
  224. SetScgVlprDivslow (const struct Clock_Ip_DividerConfigType * config)
  225. {
  226. <bb 2> :
  227. SetScgVlprDivslow_TrustedCall (config_2(D));
  228. return;
  229. }
  230. SetScgVlprDivslow_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  231. {
  232. uint32 regValue;
  233. long unsigned int _1;
  234. struct SCG_Type * _2;
  235. long unsigned int _3;
  236. long unsigned int _4;
  237. struct SCG_Type * _5;
  238. <bb 2> :
  239. _1 = config_8(D)->value;
  240. if (_1 != 0)
  241. goto <bb 3>; [INV]
  242. else
  243. goto <bb 4>; [INV]
  244. <bb 3> :
  245. _2 = 1074151424B;
  246. regValue_9 ={v} _2->VCCR;
  247. regValue_10 = regValue_9 & 4294967280;
  248. _3 = config_8(D)->value;
  249. _4 = _3 + 4294967295;
  250. regValue_11 = regValue_10 | _4;
  251. _5 = 1074151424B;
  252. _5->VCCR ={v} regValue_11;
  253. <bb 4> :
  254. return;
  255. }
  256. SetScgVlprDivbus (const struct Clock_Ip_DividerConfigType * config)
  257. {
  258. <bb 2> :
  259. SetScgVlprDivbus_TrustedCall (config_2(D));
  260. return;
  261. }
  262. SetScgVlprDivbus_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  263. {
  264. uint32 regValue;
  265. long unsigned int _1;
  266. struct SCG_Type * _2;
  267. long unsigned int _3;
  268. long unsigned int _4;
  269. long unsigned int _5;
  270. struct SCG_Type * _6;
  271. <bb 2> :
  272. _1 = config_9(D)->value;
  273. if (_1 != 0)
  274. goto <bb 3>; [INV]
  275. else
  276. goto <bb 4>; [INV]
  277. <bb 3> :
  278. _2 = 1074151424B;
  279. regValue_10 ={v} _2->VCCR;
  280. regValue_11 = regValue_10 & 4294967055;
  281. _3 = config_9(D)->value;
  282. _4 = _3 + 4294967295;
  283. _5 = _4 << 4;
  284. regValue_12 = regValue_11 | _5;
  285. _6 = 1074151424B;
  286. _6->VCCR ={v} regValue_12;
  287. <bb 4> :
  288. return;
  289. }
  290. SetScgVlprDivcore (const struct Clock_Ip_DividerConfigType * config)
  291. {
  292. <bb 2> :
  293. SetScgVlprDivcore_TrustedCall (config_2(D));
  294. return;
  295. }
  296. SetScgVlprDivcore_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  297. {
  298. uint32 regValue;
  299. long unsigned int _1;
  300. struct SCG_Type * _2;
  301. long unsigned int _3;
  302. long unsigned int _4;
  303. long unsigned int _5;
  304. struct SCG_Type * _6;
  305. <bb 2> :
  306. _1 = config_9(D)->value;
  307. if (_1 != 0)
  308. goto <bb 3>; [INV]
  309. else
  310. goto <bb 4>; [INV]
  311. <bb 3> :
  312. _2 = 1074151424B;
  313. regValue_10 ={v} _2->VCCR;
  314. regValue_11 = regValue_10 & 4293984255;
  315. _3 = config_9(D)->value;
  316. _4 = _3 + 4294967295;
  317. _5 = _4 << 16;
  318. regValue_12 = regValue_11 | _5;
  319. _6 = 1074151424B;
  320. _6->VCCR ={v} regValue_12;
  321. <bb 4> :
  322. return;
  323. }
  324. SetScgRunDivslow (const struct Clock_Ip_DividerConfigType * config)
  325. {
  326. <bb 2> :
  327. SetScgRunDivslow_TrustedCall (config_2(D));
  328. return;
  329. }
  330. SetScgRunDivslow_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  331. {
  332. uint32 regValue;
  333. long unsigned int _1;
  334. struct SCG_Type * _2;
  335. long unsigned int _3;
  336. long unsigned int _4;
  337. struct SCG_Type * _5;
  338. <bb 2> :
  339. _1 = config_8(D)->value;
  340. if (_1 != 0)
  341. goto <bb 3>; [INV]
  342. else
  343. goto <bb 4>; [INV]
  344. <bb 3> :
  345. _2 = 1074151424B;
  346. regValue_9 ={v} _2->RCCR;
  347. regValue_10 = regValue_9 & 4294967280;
  348. _3 = config_8(D)->value;
  349. _4 = _3 + 4294967295;
  350. regValue_11 = regValue_10 | _4;
  351. _5 = 1074151424B;
  352. _5->RCCR ={v} regValue_11;
  353. <bb 4> :
  354. return;
  355. }
  356. SetScgRunDivbus (const struct Clock_Ip_DividerConfigType * config)
  357. {
  358. <bb 2> :
  359. SetScgRunDivbus_TrustedCall (config_2(D));
  360. return;
  361. }
  362. SetScgRunDivbus_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  363. {
  364. uint32 regValue;
  365. long unsigned int _1;
  366. struct SCG_Type * _2;
  367. long unsigned int _3;
  368. long unsigned int _4;
  369. long unsigned int _5;
  370. struct SCG_Type * _6;
  371. <bb 2> :
  372. _1 = config_9(D)->value;
  373. if (_1 != 0)
  374. goto <bb 3>; [INV]
  375. else
  376. goto <bb 4>; [INV]
  377. <bb 3> :
  378. _2 = 1074151424B;
  379. regValue_10 ={v} _2->RCCR;
  380. regValue_11 = regValue_10 & 4294967055;
  381. _3 = config_9(D)->value;
  382. _4 = _3 + 4294967295;
  383. _5 = _4 << 4;
  384. regValue_12 = regValue_11 | _5;
  385. _6 = 1074151424B;
  386. _6->RCCR ={v} regValue_12;
  387. <bb 4> :
  388. return;
  389. }
  390. SetScgRunDivcore (const struct Clock_Ip_DividerConfigType * config)
  391. {
  392. <bb 2> :
  393. SetScgRunDivcore_TrustedCall (config_2(D));
  394. return;
  395. }
  396. SetScgRunDivcore_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  397. {
  398. uint32 regValue;
  399. long unsigned int _1;
  400. struct SCG_Type * _2;
  401. long unsigned int _3;
  402. long unsigned int _4;
  403. long unsigned int _5;
  404. struct SCG_Type * _6;
  405. <bb 2> :
  406. _1 = config_9(D)->value;
  407. if (_1 != 0)
  408. goto <bb 3>; [INV]
  409. else
  410. goto <bb 4>; [INV]
  411. <bb 3> :
  412. _2 = 1074151424B;
  413. regValue_10 ={v} _2->RCCR;
  414. regValue_11 = regValue_10 & 4293984255;
  415. _3 = config_9(D)->value;
  416. _4 = _3 + 4294967295;
  417. _5 = _4 << 16;
  418. regValue_12 = regValue_11 | _5;
  419. _6 = 1074151424B;
  420. _6->RCCR ={v} regValue_12;
  421. <bb 4> :
  422. return;
  423. }
  424. SetScgAsyncDiv2 (const struct Clock_Ip_DividerConfigType * config)
  425. {
  426. <bb 2> :
  427. SetScgAsyncDiv2_TrustedCall (config_2(D));
  428. return;
  429. }
  430. SetScgAsyncDiv2_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  431. {
  432. uint32 dividerValue;
  433. uint32 instance;
  434. uint32 regValue;
  435. <unnamed type> _1;
  436. unsigned char _2;
  437. long unsigned int _3;
  438. unsigned char _4;
  439. volatile struct scgPeriphAsyncDiv_Type * _5;
  440. long unsigned int _6;
  441. volatile struct scgPeriphAsyncDiv_Type * _7;
  442. <bb 2> :
  443. _1 = config_9(D)->name;
  444. _2 = clockFeatures[_1][0];
  445. instance_10 = (uint32) _2;
  446. _3 = config_9(D)->value;
  447. _4 = dividerValue_hardwareValue[_3];
  448. dividerValue_11 = (uint32) _4;
  449. _5 = scgPeriphAsyncDivs[instance_10];
  450. regValue_12 ={v} _5->ASYNC_DIV;
  451. regValue_13 = regValue_12 & 4294965503;
  452. _6 = dividerValue_11 << 8;
  453. regValue_14 = regValue_13 | _6;
  454. _7 = scgPeriphAsyncDivs[instance_10];
  455. _7->ASYNC_DIV ={v} regValue_14;
  456. return;
  457. }
  458. SetScgAsyncDiv1 (const struct Clock_Ip_DividerConfigType * config)
  459. {
  460. <bb 2> :
  461. SetScgAsyncDiv1_TrustedCall (config_2(D));
  462. return;
  463. }
  464. SetScgAsyncDiv1_TrustedCall (const struct Clock_Ip_DividerConfigType * config)
  465. {
  466. uint32 dividerValue;
  467. uint32 instance;
  468. uint32 regValue;
  469. <unnamed type> _1;
  470. unsigned char _2;
  471. long unsigned int _3;
  472. unsigned char _4;
  473. volatile struct scgPeriphAsyncDiv_Type * _5;
  474. volatile struct scgPeriphAsyncDiv_Type * _6;
  475. <bb 2> :
  476. _1 = config_8(D)->name;
  477. _2 = clockFeatures[_1][0];
  478. instance_9 = (uint32) _2;
  479. _3 = config_8(D)->value;
  480. _4 = dividerValue_hardwareValue[_3];
  481. dividerValue_10 = (uint32) _4;
  482. _5 = scgPeriphAsyncDivs[instance_9];
  483. regValue_11 ={v} _5->ASYNC_DIV;
  484. regValue_12 = regValue_11 & 4294967288;
  485. regValue_13 = regValue_12 | dividerValue_10;
  486. _6 = scgPeriphAsyncDivs[instance_9];
  487. _6->ASYNC_DIV ={v} regValue_13;
  488. return;
  489. }
  490. Callback_DividerEmpty (const struct Clock_Ip_DividerConfigType * config)
  491. {
  492. <bb 2> :
  493. return;
  494. }