Gpio_Dio_Ip.c.078i.free-fnsummary2 2.3 KB

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  1. Gpio_Dio_Ip_ReadPin (const struct GPIO_Type * const base, Gpio_Dio_Ip_PinsChannelType pin)
  2. {
  3. Gpio_Dio_Ip_PinsLevelType returnValue;
  4. Gpio_Dio_Ip_PinsLevelType D.5597;
  5. long unsigned int _1;
  6. long unsigned int _2;
  7. long unsigned int _3;
  8. long unsigned int _4;
  9. Gpio_Dio_Ip_PinsLevelType _10;
  10. <bb 2> :
  11. returnValue_5 = 0;
  12. _1 ={v} base_7(D)->PDIR;
  13. _2 = 1 << pin_8(D);
  14. _3 = _1 & _2;
  15. _4 = _3 >> pin_8(D);
  16. returnValue_9 = (Gpio_Dio_Ip_PinsLevelType) _4;
  17. _10 = returnValue_9;
  18. <bb 3> :
  19. <L0>:
  20. return _10;
  21. }
  22. Gpio_Dio_Ip_ReadPins (const struct GPIO_Type * const base)
  23. {
  24. Gpio_Dio_Ip_PinsChannelType returnValue;
  25. Gpio_Dio_Ip_PinsChannelType D.5595;
  26. Gpio_Dio_Ip_PinsChannelType _5;
  27. <bb 2> :
  28. returnValue_1 = 0;
  29. returnValue_4 ={v} base_3(D)->PDIR;
  30. _5 = returnValue_4;
  31. <bb 3> :
  32. <L0>:
  33. return _5;
  34. }
  35. Gpio_Dio_Ip_TogglePins (struct GPIO_Type * const base, Gpio_Dio_Ip_PinsChannelType pins)
  36. {
  37. <bb 2> :
  38. base_2(D)->PTOR ={v} pins_3(D);
  39. return;
  40. }
  41. Gpio_Dio_Ip_ClearPins (struct GPIO_Type * const base, Gpio_Dio_Ip_PinsChannelType pins)
  42. {
  43. <bb 2> :
  44. base_2(D)->PCOR ={v} pins_3(D);
  45. return;
  46. }
  47. Gpio_Dio_Ip_SetPins (struct GPIO_Type * const base, Gpio_Dio_Ip_PinsChannelType pins)
  48. {
  49. <bb 2> :
  50. base_2(D)->PSOR ={v} pins_3(D);
  51. return;
  52. }
  53. Gpio_Dio_Ip_GetPinsOutput (const struct GPIO_Type * const base)
  54. {
  55. Gpio_Dio_Ip_PinsChannelType returnValue;
  56. Gpio_Dio_Ip_PinsChannelType D.5593;
  57. Gpio_Dio_Ip_PinsChannelType _5;
  58. <bb 2> :
  59. returnValue_1 = 0;
  60. returnValue_4 ={v} base_3(D)->PDOR;
  61. _5 = returnValue_4;
  62. <bb 3> :
  63. <L0>:
  64. return _5;
  65. }
  66. Gpio_Dio_Ip_WritePins (struct GPIO_Type * const base, Gpio_Dio_Ip_PinsChannelType pins)
  67. {
  68. <bb 2> :
  69. base_2(D)->PDOR ={v} pins_3(D);
  70. return;
  71. }
  72. Gpio_Dio_Ip_WritePin (struct GPIO_Type * const base, Gpio_Dio_Ip_PinsChannelType pin, Gpio_Dio_Ip_PinsLevelType value)
  73. {
  74. Gpio_Dio_Ip_PinsChannelType pinsValues;
  75. long unsigned int _1;
  76. long unsigned int _2;
  77. long unsigned int _3;
  78. long unsigned int _4;
  79. <bb 2> :
  80. SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00 ();
  81. pinsValues_8 ={v} base_7(D)->PDOR;
  82. _1 = 1 << pin_9(D);
  83. _2 = ~_1;
  84. pinsValues_10 = pinsValues_8 & _2;
  85. _3 = (long unsigned int) value_11(D);
  86. _4 = _3 << pin_9(D);
  87. pinsValues_12 = pinsValues_10 | _4;
  88. base_7(D)->PDOR ={v} pinsValues_12;
  89. SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_00 ();
  90. return;
  91. }