BLE/Debug_FLASH/RTD/src/SchM_Mcl.c.068i.whole-program

Marking local functions:


Marking externally visible functions: SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01 SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00 Mcl_schm_read_msr


Marking externally visible variables:


Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:

SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46) @06bc7c40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (write)msr_MCL_EXCLUSIVE_AREA_46/92 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46) @06bc79a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)msr_MCL_EXCLUSIVE_AREA_46/92 (write)msr_MCL_EXCLUSIVE_AREA_46/92 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (read)reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45) @06bc7700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (write)msr_MCL_EXCLUSIVE_AREA_45/90 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45) @06bc7460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)msr_MCL_EXCLUSIVE_AREA_45/90 (write)msr_MCL_EXCLUSIVE_AREA_45/90 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (read)reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44) @06bc71c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (write)msr_MCL_EXCLUSIVE_AREA_44/88 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44) @06bbfd20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)msr_MCL_EXCLUSIVE_AREA_44/88 (write)msr_MCL_EXCLUSIVE_AREA_44/88 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (read)reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43) @06bbf7e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (write)msr_MCL_EXCLUSIVE_AREA_43/86 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43) @06bbf2a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)msr_MCL_EXCLUSIVE_AREA_43/86 (write)msr_MCL_EXCLUSIVE_AREA_43/86 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (read)reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42) @06bbfee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (write)msr_MCL_EXCLUSIVE_AREA_42/84 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42) @06bbfc40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)msr_MCL_EXCLUSIVE_AREA_42/84 (write)msr_MCL_EXCLUSIVE_AREA_42/84 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (read)reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41) @06bbf9a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (write)msr_MCL_EXCLUSIVE_AREA_41/82 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41) @06bbf700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)msr_MCL_EXCLUSIVE_AREA_41/82 (write)msr_MCL_EXCLUSIVE_AREA_41/82 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (read)reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40) @06bbf460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (write)msr_MCL_EXCLUSIVE_AREA_40/80 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40) @06bbf1c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)msr_MCL_EXCLUSIVE_AREA_40/80 (write)msr_MCL_EXCLUSIVE_AREA_40/80 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (read)reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39) @06bb8d20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (write)msr_MCL_EXCLUSIVE_AREA_39/78 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39) @06bb87e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)msr_MCL_EXCLUSIVE_AREA_39/78 (write)msr_MCL_EXCLUSIVE_AREA_39/78 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (read)reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38) @06bb82a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (write)msr_MCL_EXCLUSIVE_AREA_38/76 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38) @06bb8ee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)msr_MCL_EXCLUSIVE_AREA_38/76 (write)msr_MCL_EXCLUSIVE_AREA_38/76 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (read)reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37) @06bb8c40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (write)msr_MCL_EXCLUSIVE_AREA_37/74 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37) @06bb89a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)msr_MCL_EXCLUSIVE_AREA_37/74 (write)msr_MCL_EXCLUSIVE_AREA_37/74 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (read)reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36) @06bb8700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (write)msr_MCL_EXCLUSIVE_AREA_36/72 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36) @06bb8460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)msr_MCL_EXCLUSIVE_AREA_36/72 (write)msr_MCL_EXCLUSIVE_AREA_36/72 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (read)reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35) @06bb81c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (write)msr_MCL_EXCLUSIVE_AREA_35/70 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35) @06bb2d20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)msr_MCL_EXCLUSIVE_AREA_35/70 (write)msr_MCL_EXCLUSIVE_AREA_35/70 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (read)reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34) @06bb27e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (write)msr_MCL_EXCLUSIVE_AREA_34/68 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34) @06bb22a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)msr_MCL_EXCLUSIVE_AREA_34/68 (write)msr_MCL_EXCLUSIVE_AREA_34/68 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (read)reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33) @06bb2ee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (write)msr_MCL_EXCLUSIVE_AREA_33/66 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33) @06bb2c40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)msr_MCL_EXCLUSIVE_AREA_33/66 (write)msr_MCL_EXCLUSIVE_AREA_33/66 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (read)reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32) @06bb29a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (write)msr_MCL_EXCLUSIVE_AREA_32/64 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32) @06bb2700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)msr_MCL_EXCLUSIVE_AREA_32/64 (write)msr_MCL_EXCLUSIVE_AREA_32/64 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (read)reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31) @06bb2460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (write)msr_MCL_EXCLUSIVE_AREA_31/62 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31) @06bb21c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)msr_MCL_EXCLUSIVE_AREA_31/62 (write)msr_MCL_EXCLUSIVE_AREA_31/62 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (read)reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30) @06babd20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (write)msr_MCL_EXCLUSIVE_AREA_30/60 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30) @06bab7e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)msr_MCL_EXCLUSIVE_AREA_30/60 (write)msr_MCL_EXCLUSIVE_AREA_30/60 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (read)reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29) @06bab2a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (write)msr_MCL_EXCLUSIVE_AREA_29/58 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29) @06babee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)msr_MCL_EXCLUSIVE_AREA_29/58 (write)msr_MCL_EXCLUSIVE_AREA_29/58 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (read)reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28) @06babc40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (write)msr_MCL_EXCLUSIVE_AREA_28/56 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28) @06bab9a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)msr_MCL_EXCLUSIVE_AREA_28/56 (write)msr_MCL_EXCLUSIVE_AREA_28/56 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (read)reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27) @06bab700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (write)msr_MCL_EXCLUSIVE_AREA_27/54 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27) @06bab460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)msr_MCL_EXCLUSIVE_AREA_27/54 (write)msr_MCL_EXCLUSIVE_AREA_27/54 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (read)reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26) @06bab1c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (write)msr_MCL_EXCLUSIVE_AREA_26/52 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26) @06ba1d20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)msr_MCL_EXCLUSIVE_AREA_26/52 (write)msr_MCL_EXCLUSIVE_AREA_26/52 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (read)reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25) @06ba17e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (write)msr_MCL_EXCLUSIVE_AREA_25/50 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25) @06ba12a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)msr_MCL_EXCLUSIVE_AREA_25/50 (write)msr_MCL_EXCLUSIVE_AREA_25/50 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (read)reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24) @06ba1ee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (write)msr_MCL_EXCLUSIVE_AREA_24/48 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24) @06ba1c40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)msr_MCL_EXCLUSIVE_AREA_24/48 (write)msr_MCL_EXCLUSIVE_AREA_24/48 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (read)reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23) @06ba19a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (write)msr_MCL_EXCLUSIVE_AREA_23/46 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23) @06ba1700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)msr_MCL_EXCLUSIVE_AREA_23/46 (write)msr_MCL_EXCLUSIVE_AREA_23/46 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (read)reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22) @06ba1460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (write)msr_MCL_EXCLUSIVE_AREA_22/44 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22) @06ba11c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)msr_MCL_EXCLUSIVE_AREA_22/44 (write)msr_MCL_EXCLUSIVE_AREA_22/44 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (read)reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21) @06b9cd20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (write)msr_MCL_EXCLUSIVE_AREA_21/42 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21) @06b9c7e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)msr_MCL_EXCLUSIVE_AREA_21/42 (write)msr_MCL_EXCLUSIVE_AREA_21/42 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (read)reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20) @06b9c2a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (write)msr_MCL_EXCLUSIVE_AREA_20/40 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20) @06b9cee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)msr_MCL_EXCLUSIVE_AREA_20/40 (write)msr_MCL_EXCLUSIVE_AREA_20/40 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (read)reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19) @06b9cc40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (write)msr_MCL_EXCLUSIVE_AREA_19/38 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19) @06b9c9a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)msr_MCL_EXCLUSIVE_AREA_19/38 (write)msr_MCL_EXCLUSIVE_AREA_19/38 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (read)reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18) @06b9c700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (write)msr_MCL_EXCLUSIVE_AREA_18/36 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18) @06b9c460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)msr_MCL_EXCLUSIVE_AREA_18/36 (write)msr_MCL_EXCLUSIVE_AREA_18/36 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (read)reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17) @06b9c1c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (write)msr_MCL_EXCLUSIVE_AREA_17/34 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17) @06b97d20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)msr_MCL_EXCLUSIVE_AREA_17/34 (write)msr_MCL_EXCLUSIVE_AREA_17/34 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (read)reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16) @06b977e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (write)msr_MCL_EXCLUSIVE_AREA_16/32 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16) @06b972a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)msr_MCL_EXCLUSIVE_AREA_16/32 (write)msr_MCL_EXCLUSIVE_AREA_16/32 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (read)reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15) @06b97ee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (write)msr_MCL_EXCLUSIVE_AREA_15/30 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15) @06b97c40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)msr_MCL_EXCLUSIVE_AREA_15/30 (write)msr_MCL_EXCLUSIVE_AREA_15/30 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (read)reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14) @06b979a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (write)msr_MCL_EXCLUSIVE_AREA_14/28 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14) @06b97700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)msr_MCL_EXCLUSIVE_AREA_14/28 (write)msr_MCL_EXCLUSIVE_AREA_14/28 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (read)reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13) @06b97460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (write)msr_MCL_EXCLUSIVE_AREA_13/26 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13) @06b971c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)msr_MCL_EXCLUSIVE_AREA_13/26 (write)msr_MCL_EXCLUSIVE_AREA_13/26 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (read)reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12) @06b90d20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (write)msr_MCL_EXCLUSIVE_AREA_12/24 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12) @06b907e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)msr_MCL_EXCLUSIVE_AREA_12/24 (write)msr_MCL_EXCLUSIVE_AREA_12/24 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (read)reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11) @06b902a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (write)msr_MCL_EXCLUSIVE_AREA_11/22 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11) @06b90ee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)msr_MCL_EXCLUSIVE_AREA_11/22 (write)msr_MCL_EXCLUSIVE_AREA_11/22 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (read)reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10) @06b90c40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (write)msr_MCL_EXCLUSIVE_AREA_10/20 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10) @06b909a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)msr_MCL_EXCLUSIVE_AREA_10/20 (write)msr_MCL_EXCLUSIVE_AREA_10/20 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (read)reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09) @06b90700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (write)msr_MCL_EXCLUSIVE_AREA_09/18 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09) @06b90460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)msr_MCL_EXCLUSIVE_AREA_09/18 (write)msr_MCL_EXCLUSIVE_AREA_09/18 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (read)reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08) @06b901c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (write)msr_MCL_EXCLUSIVE_AREA_08/16 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08) @06b87d20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)msr_MCL_EXCLUSIVE_AREA_08/16 (write)msr_MCL_EXCLUSIVE_AREA_08/16 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (read)reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07) @06b877e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (write)msr_MCL_EXCLUSIVE_AREA_07/14 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07) @06b872a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)msr_MCL_EXCLUSIVE_AREA_07/14 (write)msr_MCL_EXCLUSIVE_AREA_07/14 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (read)reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06) @06b87ee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (write)msr_MCL_EXCLUSIVE_AREA_06/12 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06) @06b87c40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)msr_MCL_EXCLUSIVE_AREA_06/12 (write)msr_MCL_EXCLUSIVE_AREA_06/12 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (read)reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05) @06b879a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (write)msr_MCL_EXCLUSIVE_AREA_05/10 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05) @06b87700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)msr_MCL_EXCLUSIVE_AREA_05/10 (write)msr_MCL_EXCLUSIVE_AREA_05/10 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (read)reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04) @06b87460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (write)msr_MCL_EXCLUSIVE_AREA_04/8 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04) @06b871c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)msr_MCL_EXCLUSIVE_AREA_04/8 (write)msr_MCL_EXCLUSIVE_AREA_04/8 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (read)reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03) @06aedd20
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (write)msr_MCL_EXCLUSIVE_AREA_03/6 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03) @06aed7e0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)msr_MCL_EXCLUSIVE_AREA_03/6 (write)msr_MCL_EXCLUSIVE_AREA_03/6 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (read)reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02) @06aed2a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (write)msr_MCL_EXCLUSIVE_AREA_02/4 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02) @06aedee0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)msr_MCL_EXCLUSIVE_AREA_02/4 (write)msr_MCL_EXCLUSIVE_AREA_02/4 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (read)reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01) @06aedc40
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (write)msr_MCL_EXCLUSIVE_AREA_01/2 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01) @06aed9a0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)msr_MCL_EXCLUSIVE_AREA_01/2 (write)msr_MCL_EXCLUSIVE_AREA_01/2 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (read)reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00) @06aed700
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (write)msr_MCL_EXCLUSIVE_AREA_00/0 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: 
SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00) @06aed460
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)msr_MCL_EXCLUSIVE_AREA_00/0 (write)msr_MCL_EXCLUSIVE_AREA_00/0 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (read)reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (write)
  Referring: 
  Availability: available
  Function flags: body
  Called by: 
  Calls: Mcl_schm_read_msr/94 
Mcl_schm_read_msr/94 (Mcl_schm_read_msr) @06aed1c0
  Type: function definition analyzed
  Visibility: force_output externally_visible no_reorder public
  References: 
  Referring: 
  Availability: available
  Function flags: body
  Called by: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 
  Calls: 
reentry_guard_MCL_EXCLUSIVE_AREA_46/93 (reentry_guard_MCL_EXCLUSIVE_AREA_46) @06aeb678
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_46/92 (msr_MCL_EXCLUSIVE_AREA_46) @06aeb5e8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46/187 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46/188 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_45/91 (reentry_guard_MCL_EXCLUSIVE_AREA_45) @06aeb558
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_45/90 (msr_MCL_EXCLUSIVE_AREA_45) @06aeb4c8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45/185 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45/186 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_44/89 (reentry_guard_MCL_EXCLUSIVE_AREA_44) @06aeb438
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_44/88 (msr_MCL_EXCLUSIVE_AREA_44) @06aeb3a8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44/183 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44/184 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_43/87 (reentry_guard_MCL_EXCLUSIVE_AREA_43) @06aeb318
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_43/86 (msr_MCL_EXCLUSIVE_AREA_43) @06aeb288
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43/181 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43/182 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_42/85 (reentry_guard_MCL_EXCLUSIVE_AREA_42) @06aeb1f8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_42/84 (msr_MCL_EXCLUSIVE_AREA_42) @06aeb168
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42/179 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42/180 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_41/83 (reentry_guard_MCL_EXCLUSIVE_AREA_41) @06aeb0d8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_41/82 (msr_MCL_EXCLUSIVE_AREA_41) @06aeb048
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41/177 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41/178 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_40/81 (reentry_guard_MCL_EXCLUSIVE_AREA_40) @06ae5f78
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_40/80 (msr_MCL_EXCLUSIVE_AREA_40) @06ae5ee8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40/175 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40/176 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_39/79 (reentry_guard_MCL_EXCLUSIVE_AREA_39) @06ae5e58
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_39/78 (msr_MCL_EXCLUSIVE_AREA_39) @06ae5dc8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39/173 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39/174 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_38/77 (reentry_guard_MCL_EXCLUSIVE_AREA_38) @06ae5d38
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_38/76 (msr_MCL_EXCLUSIVE_AREA_38) @06ae5ca8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38/171 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38/172 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_37/75 (reentry_guard_MCL_EXCLUSIVE_AREA_37) @06ae5c18
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_37/74 (msr_MCL_EXCLUSIVE_AREA_37) @06ae5b88
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37/169 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37/170 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_36/73 (reentry_guard_MCL_EXCLUSIVE_AREA_36) @06ae5af8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_36/72 (msr_MCL_EXCLUSIVE_AREA_36) @06ae5a68
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36/167 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36/168 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_35/71 (reentry_guard_MCL_EXCLUSIVE_AREA_35) @06ae59d8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_35/70 (msr_MCL_EXCLUSIVE_AREA_35) @06ae5948
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35/165 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35/166 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_34/69 (reentry_guard_MCL_EXCLUSIVE_AREA_34) @06ae58b8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_34/68 (msr_MCL_EXCLUSIVE_AREA_34) @06ae5828
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34/163 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34/164 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_33/67 (reentry_guard_MCL_EXCLUSIVE_AREA_33) @06ae5798
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_33/66 (msr_MCL_EXCLUSIVE_AREA_33) @06ae5708
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33/161 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33/162 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_32/65 (reentry_guard_MCL_EXCLUSIVE_AREA_32) @06ae5678
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_32/64 (msr_MCL_EXCLUSIVE_AREA_32) @06ae55e8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32/159 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32/160 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_31/63 (reentry_guard_MCL_EXCLUSIVE_AREA_31) @06ae5558
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_31/62 (msr_MCL_EXCLUSIVE_AREA_31) @06ae54c8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31/157 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31/158 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_30/61 (reentry_guard_MCL_EXCLUSIVE_AREA_30) @06ae5438
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_30/60 (msr_MCL_EXCLUSIVE_AREA_30) @06ae53a8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30/155 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30/156 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_29/59 (reentry_guard_MCL_EXCLUSIVE_AREA_29) @06ae5318
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_29/58 (msr_MCL_EXCLUSIVE_AREA_29) @06ae5288
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29/153 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29/154 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_28/57 (reentry_guard_MCL_EXCLUSIVE_AREA_28) @06ae51f8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_28/56 (msr_MCL_EXCLUSIVE_AREA_28) @06ae5168
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28/151 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28/152 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_27/55 (reentry_guard_MCL_EXCLUSIVE_AREA_27) @06ae50d8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_27/54 (msr_MCL_EXCLUSIVE_AREA_27) @06ae5048
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27/149 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27/150 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_26/53 (reentry_guard_MCL_EXCLUSIVE_AREA_26) @06a9ff78
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_26/52 (msr_MCL_EXCLUSIVE_AREA_26) @06a9fee8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26/147 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26/148 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_25/51 (reentry_guard_MCL_EXCLUSIVE_AREA_25) @06a9fe58
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_25/50 (msr_MCL_EXCLUSIVE_AREA_25) @06a9fdc8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25/145 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25/146 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_24/49 (reentry_guard_MCL_EXCLUSIVE_AREA_24) @06a9fd38
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_24/48 (msr_MCL_EXCLUSIVE_AREA_24) @06a9fca8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24/143 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24/144 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_23/47 (reentry_guard_MCL_EXCLUSIVE_AREA_23) @06a9fc18
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_23/46 (msr_MCL_EXCLUSIVE_AREA_23) @06a9fb88
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23/141 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23/142 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_22/45 (reentry_guard_MCL_EXCLUSIVE_AREA_22) @06a9faf8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_22/44 (msr_MCL_EXCLUSIVE_AREA_22) @06a9fa68
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22/139 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22/140 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_21/43 (reentry_guard_MCL_EXCLUSIVE_AREA_21) @06a9f9d8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_21/42 (msr_MCL_EXCLUSIVE_AREA_21) @06a9f948
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21/137 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21/138 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_20/41 (reentry_guard_MCL_EXCLUSIVE_AREA_20) @06a9f8b8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_20/40 (msr_MCL_EXCLUSIVE_AREA_20) @06a9f828
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20/135 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20/136 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_19/39 (reentry_guard_MCL_EXCLUSIVE_AREA_19) @06a9f798
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_19/38 (msr_MCL_EXCLUSIVE_AREA_19) @06a9f708
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19/133 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19/134 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_18/37 (reentry_guard_MCL_EXCLUSIVE_AREA_18) @06a9f678
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_18/36 (msr_MCL_EXCLUSIVE_AREA_18) @06a9f5e8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18/131 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18/132 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_17/35 (reentry_guard_MCL_EXCLUSIVE_AREA_17) @06a9f558
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_17/34 (msr_MCL_EXCLUSIVE_AREA_17) @06a9f4c8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17/129 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17/130 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_16/33 (reentry_guard_MCL_EXCLUSIVE_AREA_16) @06a9f438
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_16/32 (msr_MCL_EXCLUSIVE_AREA_16) @06a9f3a8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16/127 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16/128 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_15/31 (reentry_guard_MCL_EXCLUSIVE_AREA_15) @06a9f318
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_15/30 (msr_MCL_EXCLUSIVE_AREA_15) @06a9f288
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15/125 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15/126 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_14/29 (reentry_guard_MCL_EXCLUSIVE_AREA_14) @06a9f1f8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_14/28 (msr_MCL_EXCLUSIVE_AREA_14) @06a9f168
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14/123 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14/124 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_13/27 (reentry_guard_MCL_EXCLUSIVE_AREA_13) @06a9f0d8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_13/26 (msr_MCL_EXCLUSIVE_AREA_13) @06a9f048
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13/121 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13/122 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_12/25 (reentry_guard_MCL_EXCLUSIVE_AREA_12) @06a99f78
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_12/24 (msr_MCL_EXCLUSIVE_AREA_12) @06a99ee8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12/119 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12/120 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_11/23 (reentry_guard_MCL_EXCLUSIVE_AREA_11) @06a99e58
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_11/22 (msr_MCL_EXCLUSIVE_AREA_11) @06a99dc8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11/117 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11/118 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_10/21 (reentry_guard_MCL_EXCLUSIVE_AREA_10) @06a99d38
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_10/20 (msr_MCL_EXCLUSIVE_AREA_10) @06a99ca8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10/115 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10/116 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_09/19 (reentry_guard_MCL_EXCLUSIVE_AREA_09) @06a99c18
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_09/18 (msr_MCL_EXCLUSIVE_AREA_09) @06a99b88
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09/113 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09/114 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_08/17 (reentry_guard_MCL_EXCLUSIVE_AREA_08) @06a99af8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_08/16 (msr_MCL_EXCLUSIVE_AREA_08) @06a99a68
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08/111 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08/112 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_07/15 (reentry_guard_MCL_EXCLUSIVE_AREA_07) @06a999d8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_07/14 (msr_MCL_EXCLUSIVE_AREA_07) @06a99948
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07/109 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07/110 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_06/13 (reentry_guard_MCL_EXCLUSIVE_AREA_06) @06a998b8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_06/12 (msr_MCL_EXCLUSIVE_AREA_06) @06a99828
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06/107 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06/108 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_05/11 (reentry_guard_MCL_EXCLUSIVE_AREA_05) @06a99798
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_05/10 (msr_MCL_EXCLUSIVE_AREA_05) @06a99708
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05/105 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05/106 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_04/9 (reentry_guard_MCL_EXCLUSIVE_AREA_04) @06a99678
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_04/8 (msr_MCL_EXCLUSIVE_AREA_04) @06a995e8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04/103 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04/104 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_03/7 (reentry_guard_MCL_EXCLUSIVE_AREA_03) @06a99558
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_03/6 (msr_MCL_EXCLUSIVE_AREA_03) @06a994c8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03/101 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03/102 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_02/5 (reentry_guard_MCL_EXCLUSIVE_AREA_02) @06a99438
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_02/4 (msr_MCL_EXCLUSIVE_AREA_02) @06a993a8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02/99 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02/100 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_01/3 (reentry_guard_MCL_EXCLUSIVE_AREA_01) @06a99318
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_01/2 (msr_MCL_EXCLUSIVE_AREA_01) @06a99288
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01/97 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01/98 (read)
  Availability: available
  Varpool flags:
reentry_guard_MCL_EXCLUSIVE_AREA_00/1 (reentry_guard_MCL_EXCLUSIVE_AREA_00) @06a991f8
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)
  Availability: available
  Varpool flags:
msr_MCL_EXCLUSIVE_AREA_00/0 (msr_MCL_EXCLUSIVE_AREA_00) @06a99168
  Type: variable definition analyzed
  Visibility: force_output no_reorder prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (read)SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00/95 (write)SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00/96 (read)
  Availability: available
  Varpool flags:
SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_8] ={v} _6;
  return;

}


SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;

  <bb 2> :
  u32CoreId_7 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_7];
  _2 = _1 + 4294967295;
  reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_7] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_7];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_7];
  if (_5 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00 ()
{
  uint32 u32CoreId;
  long unsigned int _1;
  long unsigned int _2;
  long unsigned int _3;
  long unsigned int _4;
  long unsigned int _5;
  long unsigned int _6;

  <bb 2> :
  u32CoreId_8 = 0;
  _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_8];
  if (_1 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _2 = Mcl_schm_read_msr ();
  msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_8] ={v} _2;
  _3 ={v} msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_8];
  _4 = _3 & 1;
  if (_4 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_8];
  _6 = _5 + 1;
  reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_8] ={v} _6;
  return;

}


Mcl_schm_read_msr ()
{
  register uint32 reg_tmp;
  uint32 D.6206;
  uint32 _2;

  <bb 2> :
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_1);
  _2 = reg_tmp_1;

  <bb 3> :
<L0>:
  return _2;

}