SchM_Mcl.c.078i.free-fnsummary2 69 KB

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  1. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_46 ()
  2. {
  3. uint32 u32CoreId;
  4. long unsigned int _1;
  5. long unsigned int _2;
  6. long unsigned int _3;
  7. long unsigned int _4;
  8. long unsigned int _5;
  9. <bb 2> :
  10. u32CoreId_7 = 0;
  11. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_7];
  12. _2 = _1 + 4294967295;
  13. reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_7] ={v} _2;
  14. _3 ={v} msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_7];
  15. _4 = _3 & 1;
  16. if (_4 == 0)
  17. goto <bb 3>; [INV]
  18. else
  19. goto <bb 5>; [INV]
  20. <bb 3> :
  21. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_7];
  22. if (_5 == 0)
  23. goto <bb 4>; [INV]
  24. else
  25. goto <bb 5>; [INV]
  26. <bb 4> :
  27. __asm__ __volatile__(" cpsie i");
  28. <bb 5> :
  29. return;
  30. }
  31. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_46 ()
  32. {
  33. uint32 u32CoreId;
  34. long unsigned int _1;
  35. long unsigned int _2;
  36. long unsigned int _3;
  37. long unsigned int _4;
  38. long unsigned int _5;
  39. long unsigned int _6;
  40. <bb 2> :
  41. u32CoreId_8 = 0;
  42. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_8];
  43. if (_1 == 0)
  44. goto <bb 3>; [INV]
  45. else
  46. goto <bb 5>; [INV]
  47. <bb 3> :
  48. _2 = Mcl_schm_read_msr ();
  49. msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_8] ={v} _2;
  50. _3 ={v} msr_MCL_EXCLUSIVE_AREA_46[u32CoreId_8];
  51. _4 = _3 & 1;
  52. if (_4 == 0)
  53. goto <bb 4>; [INV]
  54. else
  55. goto <bb 5>; [INV]
  56. <bb 4> :
  57. __asm__ __volatile__(" cpsid i");
  58. <bb 5> :
  59. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_8];
  60. _6 = _5 + 1;
  61. reentry_guard_MCL_EXCLUSIVE_AREA_46[u32CoreId_8] ={v} _6;
  62. return;
  63. }
  64. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_45 ()
  65. {
  66. uint32 u32CoreId;
  67. long unsigned int _1;
  68. long unsigned int _2;
  69. long unsigned int _3;
  70. long unsigned int _4;
  71. long unsigned int _5;
  72. <bb 2> :
  73. u32CoreId_7 = 0;
  74. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_7];
  75. _2 = _1 + 4294967295;
  76. reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_7] ={v} _2;
  77. _3 ={v} msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_7];
  78. _4 = _3 & 1;
  79. if (_4 == 0)
  80. goto <bb 3>; [INV]
  81. else
  82. goto <bb 5>; [INV]
  83. <bb 3> :
  84. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_7];
  85. if (_5 == 0)
  86. goto <bb 4>; [INV]
  87. else
  88. goto <bb 5>; [INV]
  89. <bb 4> :
  90. __asm__ __volatile__(" cpsie i");
  91. <bb 5> :
  92. return;
  93. }
  94. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_45 ()
  95. {
  96. uint32 u32CoreId;
  97. long unsigned int _1;
  98. long unsigned int _2;
  99. long unsigned int _3;
  100. long unsigned int _4;
  101. long unsigned int _5;
  102. long unsigned int _6;
  103. <bb 2> :
  104. u32CoreId_8 = 0;
  105. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_8];
  106. if (_1 == 0)
  107. goto <bb 3>; [INV]
  108. else
  109. goto <bb 5>; [INV]
  110. <bb 3> :
  111. _2 = Mcl_schm_read_msr ();
  112. msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_8] ={v} _2;
  113. _3 ={v} msr_MCL_EXCLUSIVE_AREA_45[u32CoreId_8];
  114. _4 = _3 & 1;
  115. if (_4 == 0)
  116. goto <bb 4>; [INV]
  117. else
  118. goto <bb 5>; [INV]
  119. <bb 4> :
  120. __asm__ __volatile__(" cpsid i");
  121. <bb 5> :
  122. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_8];
  123. _6 = _5 + 1;
  124. reentry_guard_MCL_EXCLUSIVE_AREA_45[u32CoreId_8] ={v} _6;
  125. return;
  126. }
  127. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_44 ()
  128. {
  129. uint32 u32CoreId;
  130. long unsigned int _1;
  131. long unsigned int _2;
  132. long unsigned int _3;
  133. long unsigned int _4;
  134. long unsigned int _5;
  135. <bb 2> :
  136. u32CoreId_7 = 0;
  137. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_7];
  138. _2 = _1 + 4294967295;
  139. reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_7] ={v} _2;
  140. _3 ={v} msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_7];
  141. _4 = _3 & 1;
  142. if (_4 == 0)
  143. goto <bb 3>; [INV]
  144. else
  145. goto <bb 5>; [INV]
  146. <bb 3> :
  147. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_7];
  148. if (_5 == 0)
  149. goto <bb 4>; [INV]
  150. else
  151. goto <bb 5>; [INV]
  152. <bb 4> :
  153. __asm__ __volatile__(" cpsie i");
  154. <bb 5> :
  155. return;
  156. }
  157. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_44 ()
  158. {
  159. uint32 u32CoreId;
  160. long unsigned int _1;
  161. long unsigned int _2;
  162. long unsigned int _3;
  163. long unsigned int _4;
  164. long unsigned int _5;
  165. long unsigned int _6;
  166. <bb 2> :
  167. u32CoreId_8 = 0;
  168. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_8];
  169. if (_1 == 0)
  170. goto <bb 3>; [INV]
  171. else
  172. goto <bb 5>; [INV]
  173. <bb 3> :
  174. _2 = Mcl_schm_read_msr ();
  175. msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_8] ={v} _2;
  176. _3 ={v} msr_MCL_EXCLUSIVE_AREA_44[u32CoreId_8];
  177. _4 = _3 & 1;
  178. if (_4 == 0)
  179. goto <bb 4>; [INV]
  180. else
  181. goto <bb 5>; [INV]
  182. <bb 4> :
  183. __asm__ __volatile__(" cpsid i");
  184. <bb 5> :
  185. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_8];
  186. _6 = _5 + 1;
  187. reentry_guard_MCL_EXCLUSIVE_AREA_44[u32CoreId_8] ={v} _6;
  188. return;
  189. }
  190. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_43 ()
  191. {
  192. uint32 u32CoreId;
  193. long unsigned int _1;
  194. long unsigned int _2;
  195. long unsigned int _3;
  196. long unsigned int _4;
  197. long unsigned int _5;
  198. <bb 2> :
  199. u32CoreId_7 = 0;
  200. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_7];
  201. _2 = _1 + 4294967295;
  202. reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_7] ={v} _2;
  203. _3 ={v} msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_7];
  204. _4 = _3 & 1;
  205. if (_4 == 0)
  206. goto <bb 3>; [INV]
  207. else
  208. goto <bb 5>; [INV]
  209. <bb 3> :
  210. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_7];
  211. if (_5 == 0)
  212. goto <bb 4>; [INV]
  213. else
  214. goto <bb 5>; [INV]
  215. <bb 4> :
  216. __asm__ __volatile__(" cpsie i");
  217. <bb 5> :
  218. return;
  219. }
  220. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_43 ()
  221. {
  222. uint32 u32CoreId;
  223. long unsigned int _1;
  224. long unsigned int _2;
  225. long unsigned int _3;
  226. long unsigned int _4;
  227. long unsigned int _5;
  228. long unsigned int _6;
  229. <bb 2> :
  230. u32CoreId_8 = 0;
  231. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_8];
  232. if (_1 == 0)
  233. goto <bb 3>; [INV]
  234. else
  235. goto <bb 5>; [INV]
  236. <bb 3> :
  237. _2 = Mcl_schm_read_msr ();
  238. msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_8] ={v} _2;
  239. _3 ={v} msr_MCL_EXCLUSIVE_AREA_43[u32CoreId_8];
  240. _4 = _3 & 1;
  241. if (_4 == 0)
  242. goto <bb 4>; [INV]
  243. else
  244. goto <bb 5>; [INV]
  245. <bb 4> :
  246. __asm__ __volatile__(" cpsid i");
  247. <bb 5> :
  248. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_8];
  249. _6 = _5 + 1;
  250. reentry_guard_MCL_EXCLUSIVE_AREA_43[u32CoreId_8] ={v} _6;
  251. return;
  252. }
  253. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_42 ()
  254. {
  255. uint32 u32CoreId;
  256. long unsigned int _1;
  257. long unsigned int _2;
  258. long unsigned int _3;
  259. long unsigned int _4;
  260. long unsigned int _5;
  261. <bb 2> :
  262. u32CoreId_7 = 0;
  263. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_7];
  264. _2 = _1 + 4294967295;
  265. reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_7] ={v} _2;
  266. _3 ={v} msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_7];
  267. _4 = _3 & 1;
  268. if (_4 == 0)
  269. goto <bb 3>; [INV]
  270. else
  271. goto <bb 5>; [INV]
  272. <bb 3> :
  273. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_7];
  274. if (_5 == 0)
  275. goto <bb 4>; [INV]
  276. else
  277. goto <bb 5>; [INV]
  278. <bb 4> :
  279. __asm__ __volatile__(" cpsie i");
  280. <bb 5> :
  281. return;
  282. }
  283. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_42 ()
  284. {
  285. uint32 u32CoreId;
  286. long unsigned int _1;
  287. long unsigned int _2;
  288. long unsigned int _3;
  289. long unsigned int _4;
  290. long unsigned int _5;
  291. long unsigned int _6;
  292. <bb 2> :
  293. u32CoreId_8 = 0;
  294. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_8];
  295. if (_1 == 0)
  296. goto <bb 3>; [INV]
  297. else
  298. goto <bb 5>; [INV]
  299. <bb 3> :
  300. _2 = Mcl_schm_read_msr ();
  301. msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_8] ={v} _2;
  302. _3 ={v} msr_MCL_EXCLUSIVE_AREA_42[u32CoreId_8];
  303. _4 = _3 & 1;
  304. if (_4 == 0)
  305. goto <bb 4>; [INV]
  306. else
  307. goto <bb 5>; [INV]
  308. <bb 4> :
  309. __asm__ __volatile__(" cpsid i");
  310. <bb 5> :
  311. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_8];
  312. _6 = _5 + 1;
  313. reentry_guard_MCL_EXCLUSIVE_AREA_42[u32CoreId_8] ={v} _6;
  314. return;
  315. }
  316. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_41 ()
  317. {
  318. uint32 u32CoreId;
  319. long unsigned int _1;
  320. long unsigned int _2;
  321. long unsigned int _3;
  322. long unsigned int _4;
  323. long unsigned int _5;
  324. <bb 2> :
  325. u32CoreId_7 = 0;
  326. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_7];
  327. _2 = _1 + 4294967295;
  328. reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_7] ={v} _2;
  329. _3 ={v} msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_7];
  330. _4 = _3 & 1;
  331. if (_4 == 0)
  332. goto <bb 3>; [INV]
  333. else
  334. goto <bb 5>; [INV]
  335. <bb 3> :
  336. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_7];
  337. if (_5 == 0)
  338. goto <bb 4>; [INV]
  339. else
  340. goto <bb 5>; [INV]
  341. <bb 4> :
  342. __asm__ __volatile__(" cpsie i");
  343. <bb 5> :
  344. return;
  345. }
  346. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_41 ()
  347. {
  348. uint32 u32CoreId;
  349. long unsigned int _1;
  350. long unsigned int _2;
  351. long unsigned int _3;
  352. long unsigned int _4;
  353. long unsigned int _5;
  354. long unsigned int _6;
  355. <bb 2> :
  356. u32CoreId_8 = 0;
  357. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_8];
  358. if (_1 == 0)
  359. goto <bb 3>; [INV]
  360. else
  361. goto <bb 5>; [INV]
  362. <bb 3> :
  363. _2 = Mcl_schm_read_msr ();
  364. msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_8] ={v} _2;
  365. _3 ={v} msr_MCL_EXCLUSIVE_AREA_41[u32CoreId_8];
  366. _4 = _3 & 1;
  367. if (_4 == 0)
  368. goto <bb 4>; [INV]
  369. else
  370. goto <bb 5>; [INV]
  371. <bb 4> :
  372. __asm__ __volatile__(" cpsid i");
  373. <bb 5> :
  374. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_8];
  375. _6 = _5 + 1;
  376. reentry_guard_MCL_EXCLUSIVE_AREA_41[u32CoreId_8] ={v} _6;
  377. return;
  378. }
  379. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_40 ()
  380. {
  381. uint32 u32CoreId;
  382. long unsigned int _1;
  383. long unsigned int _2;
  384. long unsigned int _3;
  385. long unsigned int _4;
  386. long unsigned int _5;
  387. <bb 2> :
  388. u32CoreId_7 = 0;
  389. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_7];
  390. _2 = _1 + 4294967295;
  391. reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_7] ={v} _2;
  392. _3 ={v} msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_7];
  393. _4 = _3 & 1;
  394. if (_4 == 0)
  395. goto <bb 3>; [INV]
  396. else
  397. goto <bb 5>; [INV]
  398. <bb 3> :
  399. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_7];
  400. if (_5 == 0)
  401. goto <bb 4>; [INV]
  402. else
  403. goto <bb 5>; [INV]
  404. <bb 4> :
  405. __asm__ __volatile__(" cpsie i");
  406. <bb 5> :
  407. return;
  408. }
  409. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_40 ()
  410. {
  411. uint32 u32CoreId;
  412. long unsigned int _1;
  413. long unsigned int _2;
  414. long unsigned int _3;
  415. long unsigned int _4;
  416. long unsigned int _5;
  417. long unsigned int _6;
  418. <bb 2> :
  419. u32CoreId_8 = 0;
  420. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_8];
  421. if (_1 == 0)
  422. goto <bb 3>; [INV]
  423. else
  424. goto <bb 5>; [INV]
  425. <bb 3> :
  426. _2 = Mcl_schm_read_msr ();
  427. msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_8] ={v} _2;
  428. _3 ={v} msr_MCL_EXCLUSIVE_AREA_40[u32CoreId_8];
  429. _4 = _3 & 1;
  430. if (_4 == 0)
  431. goto <bb 4>; [INV]
  432. else
  433. goto <bb 5>; [INV]
  434. <bb 4> :
  435. __asm__ __volatile__(" cpsid i");
  436. <bb 5> :
  437. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_8];
  438. _6 = _5 + 1;
  439. reentry_guard_MCL_EXCLUSIVE_AREA_40[u32CoreId_8] ={v} _6;
  440. return;
  441. }
  442. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_39 ()
  443. {
  444. uint32 u32CoreId;
  445. long unsigned int _1;
  446. long unsigned int _2;
  447. long unsigned int _3;
  448. long unsigned int _4;
  449. long unsigned int _5;
  450. <bb 2> :
  451. u32CoreId_7 = 0;
  452. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_7];
  453. _2 = _1 + 4294967295;
  454. reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_7] ={v} _2;
  455. _3 ={v} msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_7];
  456. _4 = _3 & 1;
  457. if (_4 == 0)
  458. goto <bb 3>; [INV]
  459. else
  460. goto <bb 5>; [INV]
  461. <bb 3> :
  462. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_7];
  463. if (_5 == 0)
  464. goto <bb 4>; [INV]
  465. else
  466. goto <bb 5>; [INV]
  467. <bb 4> :
  468. __asm__ __volatile__(" cpsie i");
  469. <bb 5> :
  470. return;
  471. }
  472. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_39 ()
  473. {
  474. uint32 u32CoreId;
  475. long unsigned int _1;
  476. long unsigned int _2;
  477. long unsigned int _3;
  478. long unsigned int _4;
  479. long unsigned int _5;
  480. long unsigned int _6;
  481. <bb 2> :
  482. u32CoreId_8 = 0;
  483. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_8];
  484. if (_1 == 0)
  485. goto <bb 3>; [INV]
  486. else
  487. goto <bb 5>; [INV]
  488. <bb 3> :
  489. _2 = Mcl_schm_read_msr ();
  490. msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_8] ={v} _2;
  491. _3 ={v} msr_MCL_EXCLUSIVE_AREA_39[u32CoreId_8];
  492. _4 = _3 & 1;
  493. if (_4 == 0)
  494. goto <bb 4>; [INV]
  495. else
  496. goto <bb 5>; [INV]
  497. <bb 4> :
  498. __asm__ __volatile__(" cpsid i");
  499. <bb 5> :
  500. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_8];
  501. _6 = _5 + 1;
  502. reentry_guard_MCL_EXCLUSIVE_AREA_39[u32CoreId_8] ={v} _6;
  503. return;
  504. }
  505. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_38 ()
  506. {
  507. uint32 u32CoreId;
  508. long unsigned int _1;
  509. long unsigned int _2;
  510. long unsigned int _3;
  511. long unsigned int _4;
  512. long unsigned int _5;
  513. <bb 2> :
  514. u32CoreId_7 = 0;
  515. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_7];
  516. _2 = _1 + 4294967295;
  517. reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_7] ={v} _2;
  518. _3 ={v} msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_7];
  519. _4 = _3 & 1;
  520. if (_4 == 0)
  521. goto <bb 3>; [INV]
  522. else
  523. goto <bb 5>; [INV]
  524. <bb 3> :
  525. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_7];
  526. if (_5 == 0)
  527. goto <bb 4>; [INV]
  528. else
  529. goto <bb 5>; [INV]
  530. <bb 4> :
  531. __asm__ __volatile__(" cpsie i");
  532. <bb 5> :
  533. return;
  534. }
  535. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_38 ()
  536. {
  537. uint32 u32CoreId;
  538. long unsigned int _1;
  539. long unsigned int _2;
  540. long unsigned int _3;
  541. long unsigned int _4;
  542. long unsigned int _5;
  543. long unsigned int _6;
  544. <bb 2> :
  545. u32CoreId_8 = 0;
  546. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_8];
  547. if (_1 == 0)
  548. goto <bb 3>; [INV]
  549. else
  550. goto <bb 5>; [INV]
  551. <bb 3> :
  552. _2 = Mcl_schm_read_msr ();
  553. msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_8] ={v} _2;
  554. _3 ={v} msr_MCL_EXCLUSIVE_AREA_38[u32CoreId_8];
  555. _4 = _3 & 1;
  556. if (_4 == 0)
  557. goto <bb 4>; [INV]
  558. else
  559. goto <bb 5>; [INV]
  560. <bb 4> :
  561. __asm__ __volatile__(" cpsid i");
  562. <bb 5> :
  563. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_8];
  564. _6 = _5 + 1;
  565. reentry_guard_MCL_EXCLUSIVE_AREA_38[u32CoreId_8] ={v} _6;
  566. return;
  567. }
  568. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_37 ()
  569. {
  570. uint32 u32CoreId;
  571. long unsigned int _1;
  572. long unsigned int _2;
  573. long unsigned int _3;
  574. long unsigned int _4;
  575. long unsigned int _5;
  576. <bb 2> :
  577. u32CoreId_7 = 0;
  578. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_7];
  579. _2 = _1 + 4294967295;
  580. reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_7] ={v} _2;
  581. _3 ={v} msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_7];
  582. _4 = _3 & 1;
  583. if (_4 == 0)
  584. goto <bb 3>; [INV]
  585. else
  586. goto <bb 5>; [INV]
  587. <bb 3> :
  588. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_7];
  589. if (_5 == 0)
  590. goto <bb 4>; [INV]
  591. else
  592. goto <bb 5>; [INV]
  593. <bb 4> :
  594. __asm__ __volatile__(" cpsie i");
  595. <bb 5> :
  596. return;
  597. }
  598. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_37 ()
  599. {
  600. uint32 u32CoreId;
  601. long unsigned int _1;
  602. long unsigned int _2;
  603. long unsigned int _3;
  604. long unsigned int _4;
  605. long unsigned int _5;
  606. long unsigned int _6;
  607. <bb 2> :
  608. u32CoreId_8 = 0;
  609. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_8];
  610. if (_1 == 0)
  611. goto <bb 3>; [INV]
  612. else
  613. goto <bb 5>; [INV]
  614. <bb 3> :
  615. _2 = Mcl_schm_read_msr ();
  616. msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_8] ={v} _2;
  617. _3 ={v} msr_MCL_EXCLUSIVE_AREA_37[u32CoreId_8];
  618. _4 = _3 & 1;
  619. if (_4 == 0)
  620. goto <bb 4>; [INV]
  621. else
  622. goto <bb 5>; [INV]
  623. <bb 4> :
  624. __asm__ __volatile__(" cpsid i");
  625. <bb 5> :
  626. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_8];
  627. _6 = _5 + 1;
  628. reentry_guard_MCL_EXCLUSIVE_AREA_37[u32CoreId_8] ={v} _6;
  629. return;
  630. }
  631. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_36 ()
  632. {
  633. uint32 u32CoreId;
  634. long unsigned int _1;
  635. long unsigned int _2;
  636. long unsigned int _3;
  637. long unsigned int _4;
  638. long unsigned int _5;
  639. <bb 2> :
  640. u32CoreId_7 = 0;
  641. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_7];
  642. _2 = _1 + 4294967295;
  643. reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_7] ={v} _2;
  644. _3 ={v} msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_7];
  645. _4 = _3 & 1;
  646. if (_4 == 0)
  647. goto <bb 3>; [INV]
  648. else
  649. goto <bb 5>; [INV]
  650. <bb 3> :
  651. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_7];
  652. if (_5 == 0)
  653. goto <bb 4>; [INV]
  654. else
  655. goto <bb 5>; [INV]
  656. <bb 4> :
  657. __asm__ __volatile__(" cpsie i");
  658. <bb 5> :
  659. return;
  660. }
  661. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_36 ()
  662. {
  663. uint32 u32CoreId;
  664. long unsigned int _1;
  665. long unsigned int _2;
  666. long unsigned int _3;
  667. long unsigned int _4;
  668. long unsigned int _5;
  669. long unsigned int _6;
  670. <bb 2> :
  671. u32CoreId_8 = 0;
  672. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_8];
  673. if (_1 == 0)
  674. goto <bb 3>; [INV]
  675. else
  676. goto <bb 5>; [INV]
  677. <bb 3> :
  678. _2 = Mcl_schm_read_msr ();
  679. msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_8] ={v} _2;
  680. _3 ={v} msr_MCL_EXCLUSIVE_AREA_36[u32CoreId_8];
  681. _4 = _3 & 1;
  682. if (_4 == 0)
  683. goto <bb 4>; [INV]
  684. else
  685. goto <bb 5>; [INV]
  686. <bb 4> :
  687. __asm__ __volatile__(" cpsid i");
  688. <bb 5> :
  689. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_8];
  690. _6 = _5 + 1;
  691. reentry_guard_MCL_EXCLUSIVE_AREA_36[u32CoreId_8] ={v} _6;
  692. return;
  693. }
  694. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_35 ()
  695. {
  696. uint32 u32CoreId;
  697. long unsigned int _1;
  698. long unsigned int _2;
  699. long unsigned int _3;
  700. long unsigned int _4;
  701. long unsigned int _5;
  702. <bb 2> :
  703. u32CoreId_7 = 0;
  704. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_7];
  705. _2 = _1 + 4294967295;
  706. reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_7] ={v} _2;
  707. _3 ={v} msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_7];
  708. _4 = _3 & 1;
  709. if (_4 == 0)
  710. goto <bb 3>; [INV]
  711. else
  712. goto <bb 5>; [INV]
  713. <bb 3> :
  714. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_7];
  715. if (_5 == 0)
  716. goto <bb 4>; [INV]
  717. else
  718. goto <bb 5>; [INV]
  719. <bb 4> :
  720. __asm__ __volatile__(" cpsie i");
  721. <bb 5> :
  722. return;
  723. }
  724. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_35 ()
  725. {
  726. uint32 u32CoreId;
  727. long unsigned int _1;
  728. long unsigned int _2;
  729. long unsigned int _3;
  730. long unsigned int _4;
  731. long unsigned int _5;
  732. long unsigned int _6;
  733. <bb 2> :
  734. u32CoreId_8 = 0;
  735. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_8];
  736. if (_1 == 0)
  737. goto <bb 3>; [INV]
  738. else
  739. goto <bb 5>; [INV]
  740. <bb 3> :
  741. _2 = Mcl_schm_read_msr ();
  742. msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_8] ={v} _2;
  743. _3 ={v} msr_MCL_EXCLUSIVE_AREA_35[u32CoreId_8];
  744. _4 = _3 & 1;
  745. if (_4 == 0)
  746. goto <bb 4>; [INV]
  747. else
  748. goto <bb 5>; [INV]
  749. <bb 4> :
  750. __asm__ __volatile__(" cpsid i");
  751. <bb 5> :
  752. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_8];
  753. _6 = _5 + 1;
  754. reentry_guard_MCL_EXCLUSIVE_AREA_35[u32CoreId_8] ={v} _6;
  755. return;
  756. }
  757. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_34 ()
  758. {
  759. uint32 u32CoreId;
  760. long unsigned int _1;
  761. long unsigned int _2;
  762. long unsigned int _3;
  763. long unsigned int _4;
  764. long unsigned int _5;
  765. <bb 2> :
  766. u32CoreId_7 = 0;
  767. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_7];
  768. _2 = _1 + 4294967295;
  769. reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_7] ={v} _2;
  770. _3 ={v} msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_7];
  771. _4 = _3 & 1;
  772. if (_4 == 0)
  773. goto <bb 3>; [INV]
  774. else
  775. goto <bb 5>; [INV]
  776. <bb 3> :
  777. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_7];
  778. if (_5 == 0)
  779. goto <bb 4>; [INV]
  780. else
  781. goto <bb 5>; [INV]
  782. <bb 4> :
  783. __asm__ __volatile__(" cpsie i");
  784. <bb 5> :
  785. return;
  786. }
  787. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_34 ()
  788. {
  789. uint32 u32CoreId;
  790. long unsigned int _1;
  791. long unsigned int _2;
  792. long unsigned int _3;
  793. long unsigned int _4;
  794. long unsigned int _5;
  795. long unsigned int _6;
  796. <bb 2> :
  797. u32CoreId_8 = 0;
  798. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_8];
  799. if (_1 == 0)
  800. goto <bb 3>; [INV]
  801. else
  802. goto <bb 5>; [INV]
  803. <bb 3> :
  804. _2 = Mcl_schm_read_msr ();
  805. msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_8] ={v} _2;
  806. _3 ={v} msr_MCL_EXCLUSIVE_AREA_34[u32CoreId_8];
  807. _4 = _3 & 1;
  808. if (_4 == 0)
  809. goto <bb 4>; [INV]
  810. else
  811. goto <bb 5>; [INV]
  812. <bb 4> :
  813. __asm__ __volatile__(" cpsid i");
  814. <bb 5> :
  815. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_8];
  816. _6 = _5 + 1;
  817. reentry_guard_MCL_EXCLUSIVE_AREA_34[u32CoreId_8] ={v} _6;
  818. return;
  819. }
  820. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_33 ()
  821. {
  822. uint32 u32CoreId;
  823. long unsigned int _1;
  824. long unsigned int _2;
  825. long unsigned int _3;
  826. long unsigned int _4;
  827. long unsigned int _5;
  828. <bb 2> :
  829. u32CoreId_7 = 0;
  830. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_7];
  831. _2 = _1 + 4294967295;
  832. reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_7] ={v} _2;
  833. _3 ={v} msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_7];
  834. _4 = _3 & 1;
  835. if (_4 == 0)
  836. goto <bb 3>; [INV]
  837. else
  838. goto <bb 5>; [INV]
  839. <bb 3> :
  840. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_7];
  841. if (_5 == 0)
  842. goto <bb 4>; [INV]
  843. else
  844. goto <bb 5>; [INV]
  845. <bb 4> :
  846. __asm__ __volatile__(" cpsie i");
  847. <bb 5> :
  848. return;
  849. }
  850. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_33 ()
  851. {
  852. uint32 u32CoreId;
  853. long unsigned int _1;
  854. long unsigned int _2;
  855. long unsigned int _3;
  856. long unsigned int _4;
  857. long unsigned int _5;
  858. long unsigned int _6;
  859. <bb 2> :
  860. u32CoreId_8 = 0;
  861. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_8];
  862. if (_1 == 0)
  863. goto <bb 3>; [INV]
  864. else
  865. goto <bb 5>; [INV]
  866. <bb 3> :
  867. _2 = Mcl_schm_read_msr ();
  868. msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_8] ={v} _2;
  869. _3 ={v} msr_MCL_EXCLUSIVE_AREA_33[u32CoreId_8];
  870. _4 = _3 & 1;
  871. if (_4 == 0)
  872. goto <bb 4>; [INV]
  873. else
  874. goto <bb 5>; [INV]
  875. <bb 4> :
  876. __asm__ __volatile__(" cpsid i");
  877. <bb 5> :
  878. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_8];
  879. _6 = _5 + 1;
  880. reentry_guard_MCL_EXCLUSIVE_AREA_33[u32CoreId_8] ={v} _6;
  881. return;
  882. }
  883. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_32 ()
  884. {
  885. uint32 u32CoreId;
  886. long unsigned int _1;
  887. long unsigned int _2;
  888. long unsigned int _3;
  889. long unsigned int _4;
  890. long unsigned int _5;
  891. <bb 2> :
  892. u32CoreId_7 = 0;
  893. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_7];
  894. _2 = _1 + 4294967295;
  895. reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_7] ={v} _2;
  896. _3 ={v} msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_7];
  897. _4 = _3 & 1;
  898. if (_4 == 0)
  899. goto <bb 3>; [INV]
  900. else
  901. goto <bb 5>; [INV]
  902. <bb 3> :
  903. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_7];
  904. if (_5 == 0)
  905. goto <bb 4>; [INV]
  906. else
  907. goto <bb 5>; [INV]
  908. <bb 4> :
  909. __asm__ __volatile__(" cpsie i");
  910. <bb 5> :
  911. return;
  912. }
  913. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_32 ()
  914. {
  915. uint32 u32CoreId;
  916. long unsigned int _1;
  917. long unsigned int _2;
  918. long unsigned int _3;
  919. long unsigned int _4;
  920. long unsigned int _5;
  921. long unsigned int _6;
  922. <bb 2> :
  923. u32CoreId_8 = 0;
  924. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_8];
  925. if (_1 == 0)
  926. goto <bb 3>; [INV]
  927. else
  928. goto <bb 5>; [INV]
  929. <bb 3> :
  930. _2 = Mcl_schm_read_msr ();
  931. msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_8] ={v} _2;
  932. _3 ={v} msr_MCL_EXCLUSIVE_AREA_32[u32CoreId_8];
  933. _4 = _3 & 1;
  934. if (_4 == 0)
  935. goto <bb 4>; [INV]
  936. else
  937. goto <bb 5>; [INV]
  938. <bb 4> :
  939. __asm__ __volatile__(" cpsid i");
  940. <bb 5> :
  941. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_8];
  942. _6 = _5 + 1;
  943. reentry_guard_MCL_EXCLUSIVE_AREA_32[u32CoreId_8] ={v} _6;
  944. return;
  945. }
  946. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_31 ()
  947. {
  948. uint32 u32CoreId;
  949. long unsigned int _1;
  950. long unsigned int _2;
  951. long unsigned int _3;
  952. long unsigned int _4;
  953. long unsigned int _5;
  954. <bb 2> :
  955. u32CoreId_7 = 0;
  956. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_7];
  957. _2 = _1 + 4294967295;
  958. reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_7] ={v} _2;
  959. _3 ={v} msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_7];
  960. _4 = _3 & 1;
  961. if (_4 == 0)
  962. goto <bb 3>; [INV]
  963. else
  964. goto <bb 5>; [INV]
  965. <bb 3> :
  966. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_7];
  967. if (_5 == 0)
  968. goto <bb 4>; [INV]
  969. else
  970. goto <bb 5>; [INV]
  971. <bb 4> :
  972. __asm__ __volatile__(" cpsie i");
  973. <bb 5> :
  974. return;
  975. }
  976. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_31 ()
  977. {
  978. uint32 u32CoreId;
  979. long unsigned int _1;
  980. long unsigned int _2;
  981. long unsigned int _3;
  982. long unsigned int _4;
  983. long unsigned int _5;
  984. long unsigned int _6;
  985. <bb 2> :
  986. u32CoreId_8 = 0;
  987. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_8];
  988. if (_1 == 0)
  989. goto <bb 3>; [INV]
  990. else
  991. goto <bb 5>; [INV]
  992. <bb 3> :
  993. _2 = Mcl_schm_read_msr ();
  994. msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_8] ={v} _2;
  995. _3 ={v} msr_MCL_EXCLUSIVE_AREA_31[u32CoreId_8];
  996. _4 = _3 & 1;
  997. if (_4 == 0)
  998. goto <bb 4>; [INV]
  999. else
  1000. goto <bb 5>; [INV]
  1001. <bb 4> :
  1002. __asm__ __volatile__(" cpsid i");
  1003. <bb 5> :
  1004. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_8];
  1005. _6 = _5 + 1;
  1006. reentry_guard_MCL_EXCLUSIVE_AREA_31[u32CoreId_8] ={v} _6;
  1007. return;
  1008. }
  1009. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_30 ()
  1010. {
  1011. uint32 u32CoreId;
  1012. long unsigned int _1;
  1013. long unsigned int _2;
  1014. long unsigned int _3;
  1015. long unsigned int _4;
  1016. long unsigned int _5;
  1017. <bb 2> :
  1018. u32CoreId_7 = 0;
  1019. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_7];
  1020. _2 = _1 + 4294967295;
  1021. reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_7] ={v} _2;
  1022. _3 ={v} msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_7];
  1023. _4 = _3 & 1;
  1024. if (_4 == 0)
  1025. goto <bb 3>; [INV]
  1026. else
  1027. goto <bb 5>; [INV]
  1028. <bb 3> :
  1029. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_7];
  1030. if (_5 == 0)
  1031. goto <bb 4>; [INV]
  1032. else
  1033. goto <bb 5>; [INV]
  1034. <bb 4> :
  1035. __asm__ __volatile__(" cpsie i");
  1036. <bb 5> :
  1037. return;
  1038. }
  1039. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_30 ()
  1040. {
  1041. uint32 u32CoreId;
  1042. long unsigned int _1;
  1043. long unsigned int _2;
  1044. long unsigned int _3;
  1045. long unsigned int _4;
  1046. long unsigned int _5;
  1047. long unsigned int _6;
  1048. <bb 2> :
  1049. u32CoreId_8 = 0;
  1050. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_8];
  1051. if (_1 == 0)
  1052. goto <bb 3>; [INV]
  1053. else
  1054. goto <bb 5>; [INV]
  1055. <bb 3> :
  1056. _2 = Mcl_schm_read_msr ();
  1057. msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_8] ={v} _2;
  1058. _3 ={v} msr_MCL_EXCLUSIVE_AREA_30[u32CoreId_8];
  1059. _4 = _3 & 1;
  1060. if (_4 == 0)
  1061. goto <bb 4>; [INV]
  1062. else
  1063. goto <bb 5>; [INV]
  1064. <bb 4> :
  1065. __asm__ __volatile__(" cpsid i");
  1066. <bb 5> :
  1067. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_8];
  1068. _6 = _5 + 1;
  1069. reentry_guard_MCL_EXCLUSIVE_AREA_30[u32CoreId_8] ={v} _6;
  1070. return;
  1071. }
  1072. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_29 ()
  1073. {
  1074. uint32 u32CoreId;
  1075. long unsigned int _1;
  1076. long unsigned int _2;
  1077. long unsigned int _3;
  1078. long unsigned int _4;
  1079. long unsigned int _5;
  1080. <bb 2> :
  1081. u32CoreId_7 = 0;
  1082. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_7];
  1083. _2 = _1 + 4294967295;
  1084. reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_7] ={v} _2;
  1085. _3 ={v} msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_7];
  1086. _4 = _3 & 1;
  1087. if (_4 == 0)
  1088. goto <bb 3>; [INV]
  1089. else
  1090. goto <bb 5>; [INV]
  1091. <bb 3> :
  1092. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_7];
  1093. if (_5 == 0)
  1094. goto <bb 4>; [INV]
  1095. else
  1096. goto <bb 5>; [INV]
  1097. <bb 4> :
  1098. __asm__ __volatile__(" cpsie i");
  1099. <bb 5> :
  1100. return;
  1101. }
  1102. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_29 ()
  1103. {
  1104. uint32 u32CoreId;
  1105. long unsigned int _1;
  1106. long unsigned int _2;
  1107. long unsigned int _3;
  1108. long unsigned int _4;
  1109. long unsigned int _5;
  1110. long unsigned int _6;
  1111. <bb 2> :
  1112. u32CoreId_8 = 0;
  1113. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_8];
  1114. if (_1 == 0)
  1115. goto <bb 3>; [INV]
  1116. else
  1117. goto <bb 5>; [INV]
  1118. <bb 3> :
  1119. _2 = Mcl_schm_read_msr ();
  1120. msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_8] ={v} _2;
  1121. _3 ={v} msr_MCL_EXCLUSIVE_AREA_29[u32CoreId_8];
  1122. _4 = _3 & 1;
  1123. if (_4 == 0)
  1124. goto <bb 4>; [INV]
  1125. else
  1126. goto <bb 5>; [INV]
  1127. <bb 4> :
  1128. __asm__ __volatile__(" cpsid i");
  1129. <bb 5> :
  1130. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_8];
  1131. _6 = _5 + 1;
  1132. reentry_guard_MCL_EXCLUSIVE_AREA_29[u32CoreId_8] ={v} _6;
  1133. return;
  1134. }
  1135. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_28 ()
  1136. {
  1137. uint32 u32CoreId;
  1138. long unsigned int _1;
  1139. long unsigned int _2;
  1140. long unsigned int _3;
  1141. long unsigned int _4;
  1142. long unsigned int _5;
  1143. <bb 2> :
  1144. u32CoreId_7 = 0;
  1145. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_7];
  1146. _2 = _1 + 4294967295;
  1147. reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_7] ={v} _2;
  1148. _3 ={v} msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_7];
  1149. _4 = _3 & 1;
  1150. if (_4 == 0)
  1151. goto <bb 3>; [INV]
  1152. else
  1153. goto <bb 5>; [INV]
  1154. <bb 3> :
  1155. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_7];
  1156. if (_5 == 0)
  1157. goto <bb 4>; [INV]
  1158. else
  1159. goto <bb 5>; [INV]
  1160. <bb 4> :
  1161. __asm__ __volatile__(" cpsie i");
  1162. <bb 5> :
  1163. return;
  1164. }
  1165. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_28 ()
  1166. {
  1167. uint32 u32CoreId;
  1168. long unsigned int _1;
  1169. long unsigned int _2;
  1170. long unsigned int _3;
  1171. long unsigned int _4;
  1172. long unsigned int _5;
  1173. long unsigned int _6;
  1174. <bb 2> :
  1175. u32CoreId_8 = 0;
  1176. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_8];
  1177. if (_1 == 0)
  1178. goto <bb 3>; [INV]
  1179. else
  1180. goto <bb 5>; [INV]
  1181. <bb 3> :
  1182. _2 = Mcl_schm_read_msr ();
  1183. msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_8] ={v} _2;
  1184. _3 ={v} msr_MCL_EXCLUSIVE_AREA_28[u32CoreId_8];
  1185. _4 = _3 & 1;
  1186. if (_4 == 0)
  1187. goto <bb 4>; [INV]
  1188. else
  1189. goto <bb 5>; [INV]
  1190. <bb 4> :
  1191. __asm__ __volatile__(" cpsid i");
  1192. <bb 5> :
  1193. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_8];
  1194. _6 = _5 + 1;
  1195. reentry_guard_MCL_EXCLUSIVE_AREA_28[u32CoreId_8] ={v} _6;
  1196. return;
  1197. }
  1198. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_27 ()
  1199. {
  1200. uint32 u32CoreId;
  1201. long unsigned int _1;
  1202. long unsigned int _2;
  1203. long unsigned int _3;
  1204. long unsigned int _4;
  1205. long unsigned int _5;
  1206. <bb 2> :
  1207. u32CoreId_7 = 0;
  1208. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_7];
  1209. _2 = _1 + 4294967295;
  1210. reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_7] ={v} _2;
  1211. _3 ={v} msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_7];
  1212. _4 = _3 & 1;
  1213. if (_4 == 0)
  1214. goto <bb 3>; [INV]
  1215. else
  1216. goto <bb 5>; [INV]
  1217. <bb 3> :
  1218. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_7];
  1219. if (_5 == 0)
  1220. goto <bb 4>; [INV]
  1221. else
  1222. goto <bb 5>; [INV]
  1223. <bb 4> :
  1224. __asm__ __volatile__(" cpsie i");
  1225. <bb 5> :
  1226. return;
  1227. }
  1228. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_27 ()
  1229. {
  1230. uint32 u32CoreId;
  1231. long unsigned int _1;
  1232. long unsigned int _2;
  1233. long unsigned int _3;
  1234. long unsigned int _4;
  1235. long unsigned int _5;
  1236. long unsigned int _6;
  1237. <bb 2> :
  1238. u32CoreId_8 = 0;
  1239. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_8];
  1240. if (_1 == 0)
  1241. goto <bb 3>; [INV]
  1242. else
  1243. goto <bb 5>; [INV]
  1244. <bb 3> :
  1245. _2 = Mcl_schm_read_msr ();
  1246. msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_8] ={v} _2;
  1247. _3 ={v} msr_MCL_EXCLUSIVE_AREA_27[u32CoreId_8];
  1248. _4 = _3 & 1;
  1249. if (_4 == 0)
  1250. goto <bb 4>; [INV]
  1251. else
  1252. goto <bb 5>; [INV]
  1253. <bb 4> :
  1254. __asm__ __volatile__(" cpsid i");
  1255. <bb 5> :
  1256. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_8];
  1257. _6 = _5 + 1;
  1258. reentry_guard_MCL_EXCLUSIVE_AREA_27[u32CoreId_8] ={v} _6;
  1259. return;
  1260. }
  1261. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_26 ()
  1262. {
  1263. uint32 u32CoreId;
  1264. long unsigned int _1;
  1265. long unsigned int _2;
  1266. long unsigned int _3;
  1267. long unsigned int _4;
  1268. long unsigned int _5;
  1269. <bb 2> :
  1270. u32CoreId_7 = 0;
  1271. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_7];
  1272. _2 = _1 + 4294967295;
  1273. reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_7] ={v} _2;
  1274. _3 ={v} msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_7];
  1275. _4 = _3 & 1;
  1276. if (_4 == 0)
  1277. goto <bb 3>; [INV]
  1278. else
  1279. goto <bb 5>; [INV]
  1280. <bb 3> :
  1281. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_7];
  1282. if (_5 == 0)
  1283. goto <bb 4>; [INV]
  1284. else
  1285. goto <bb 5>; [INV]
  1286. <bb 4> :
  1287. __asm__ __volatile__(" cpsie i");
  1288. <bb 5> :
  1289. return;
  1290. }
  1291. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_26 ()
  1292. {
  1293. uint32 u32CoreId;
  1294. long unsigned int _1;
  1295. long unsigned int _2;
  1296. long unsigned int _3;
  1297. long unsigned int _4;
  1298. long unsigned int _5;
  1299. long unsigned int _6;
  1300. <bb 2> :
  1301. u32CoreId_8 = 0;
  1302. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_8];
  1303. if (_1 == 0)
  1304. goto <bb 3>; [INV]
  1305. else
  1306. goto <bb 5>; [INV]
  1307. <bb 3> :
  1308. _2 = Mcl_schm_read_msr ();
  1309. msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_8] ={v} _2;
  1310. _3 ={v} msr_MCL_EXCLUSIVE_AREA_26[u32CoreId_8];
  1311. _4 = _3 & 1;
  1312. if (_4 == 0)
  1313. goto <bb 4>; [INV]
  1314. else
  1315. goto <bb 5>; [INV]
  1316. <bb 4> :
  1317. __asm__ __volatile__(" cpsid i");
  1318. <bb 5> :
  1319. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_8];
  1320. _6 = _5 + 1;
  1321. reentry_guard_MCL_EXCLUSIVE_AREA_26[u32CoreId_8] ={v} _6;
  1322. return;
  1323. }
  1324. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_25 ()
  1325. {
  1326. uint32 u32CoreId;
  1327. long unsigned int _1;
  1328. long unsigned int _2;
  1329. long unsigned int _3;
  1330. long unsigned int _4;
  1331. long unsigned int _5;
  1332. <bb 2> :
  1333. u32CoreId_7 = 0;
  1334. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_7];
  1335. _2 = _1 + 4294967295;
  1336. reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_7] ={v} _2;
  1337. _3 ={v} msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_7];
  1338. _4 = _3 & 1;
  1339. if (_4 == 0)
  1340. goto <bb 3>; [INV]
  1341. else
  1342. goto <bb 5>; [INV]
  1343. <bb 3> :
  1344. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_7];
  1345. if (_5 == 0)
  1346. goto <bb 4>; [INV]
  1347. else
  1348. goto <bb 5>; [INV]
  1349. <bb 4> :
  1350. __asm__ __volatile__(" cpsie i");
  1351. <bb 5> :
  1352. return;
  1353. }
  1354. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_25 ()
  1355. {
  1356. uint32 u32CoreId;
  1357. long unsigned int _1;
  1358. long unsigned int _2;
  1359. long unsigned int _3;
  1360. long unsigned int _4;
  1361. long unsigned int _5;
  1362. long unsigned int _6;
  1363. <bb 2> :
  1364. u32CoreId_8 = 0;
  1365. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_8];
  1366. if (_1 == 0)
  1367. goto <bb 3>; [INV]
  1368. else
  1369. goto <bb 5>; [INV]
  1370. <bb 3> :
  1371. _2 = Mcl_schm_read_msr ();
  1372. msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_8] ={v} _2;
  1373. _3 ={v} msr_MCL_EXCLUSIVE_AREA_25[u32CoreId_8];
  1374. _4 = _3 & 1;
  1375. if (_4 == 0)
  1376. goto <bb 4>; [INV]
  1377. else
  1378. goto <bb 5>; [INV]
  1379. <bb 4> :
  1380. __asm__ __volatile__(" cpsid i");
  1381. <bb 5> :
  1382. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_8];
  1383. _6 = _5 + 1;
  1384. reentry_guard_MCL_EXCLUSIVE_AREA_25[u32CoreId_8] ={v} _6;
  1385. return;
  1386. }
  1387. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_24 ()
  1388. {
  1389. uint32 u32CoreId;
  1390. long unsigned int _1;
  1391. long unsigned int _2;
  1392. long unsigned int _3;
  1393. long unsigned int _4;
  1394. long unsigned int _5;
  1395. <bb 2> :
  1396. u32CoreId_7 = 0;
  1397. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_7];
  1398. _2 = _1 + 4294967295;
  1399. reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_7] ={v} _2;
  1400. _3 ={v} msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_7];
  1401. _4 = _3 & 1;
  1402. if (_4 == 0)
  1403. goto <bb 3>; [INV]
  1404. else
  1405. goto <bb 5>; [INV]
  1406. <bb 3> :
  1407. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_7];
  1408. if (_5 == 0)
  1409. goto <bb 4>; [INV]
  1410. else
  1411. goto <bb 5>; [INV]
  1412. <bb 4> :
  1413. __asm__ __volatile__(" cpsie i");
  1414. <bb 5> :
  1415. return;
  1416. }
  1417. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_24 ()
  1418. {
  1419. uint32 u32CoreId;
  1420. long unsigned int _1;
  1421. long unsigned int _2;
  1422. long unsigned int _3;
  1423. long unsigned int _4;
  1424. long unsigned int _5;
  1425. long unsigned int _6;
  1426. <bb 2> :
  1427. u32CoreId_8 = 0;
  1428. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_8];
  1429. if (_1 == 0)
  1430. goto <bb 3>; [INV]
  1431. else
  1432. goto <bb 5>; [INV]
  1433. <bb 3> :
  1434. _2 = Mcl_schm_read_msr ();
  1435. msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_8] ={v} _2;
  1436. _3 ={v} msr_MCL_EXCLUSIVE_AREA_24[u32CoreId_8];
  1437. _4 = _3 & 1;
  1438. if (_4 == 0)
  1439. goto <bb 4>; [INV]
  1440. else
  1441. goto <bb 5>; [INV]
  1442. <bb 4> :
  1443. __asm__ __volatile__(" cpsid i");
  1444. <bb 5> :
  1445. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_8];
  1446. _6 = _5 + 1;
  1447. reentry_guard_MCL_EXCLUSIVE_AREA_24[u32CoreId_8] ={v} _6;
  1448. return;
  1449. }
  1450. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_23 ()
  1451. {
  1452. uint32 u32CoreId;
  1453. long unsigned int _1;
  1454. long unsigned int _2;
  1455. long unsigned int _3;
  1456. long unsigned int _4;
  1457. long unsigned int _5;
  1458. <bb 2> :
  1459. u32CoreId_7 = 0;
  1460. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_7];
  1461. _2 = _1 + 4294967295;
  1462. reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_7] ={v} _2;
  1463. _3 ={v} msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_7];
  1464. _4 = _3 & 1;
  1465. if (_4 == 0)
  1466. goto <bb 3>; [INV]
  1467. else
  1468. goto <bb 5>; [INV]
  1469. <bb 3> :
  1470. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_7];
  1471. if (_5 == 0)
  1472. goto <bb 4>; [INV]
  1473. else
  1474. goto <bb 5>; [INV]
  1475. <bb 4> :
  1476. __asm__ __volatile__(" cpsie i");
  1477. <bb 5> :
  1478. return;
  1479. }
  1480. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_23 ()
  1481. {
  1482. uint32 u32CoreId;
  1483. long unsigned int _1;
  1484. long unsigned int _2;
  1485. long unsigned int _3;
  1486. long unsigned int _4;
  1487. long unsigned int _5;
  1488. long unsigned int _6;
  1489. <bb 2> :
  1490. u32CoreId_8 = 0;
  1491. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_8];
  1492. if (_1 == 0)
  1493. goto <bb 3>; [INV]
  1494. else
  1495. goto <bb 5>; [INV]
  1496. <bb 3> :
  1497. _2 = Mcl_schm_read_msr ();
  1498. msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_8] ={v} _2;
  1499. _3 ={v} msr_MCL_EXCLUSIVE_AREA_23[u32CoreId_8];
  1500. _4 = _3 & 1;
  1501. if (_4 == 0)
  1502. goto <bb 4>; [INV]
  1503. else
  1504. goto <bb 5>; [INV]
  1505. <bb 4> :
  1506. __asm__ __volatile__(" cpsid i");
  1507. <bb 5> :
  1508. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_8];
  1509. _6 = _5 + 1;
  1510. reentry_guard_MCL_EXCLUSIVE_AREA_23[u32CoreId_8] ={v} _6;
  1511. return;
  1512. }
  1513. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_22 ()
  1514. {
  1515. uint32 u32CoreId;
  1516. long unsigned int _1;
  1517. long unsigned int _2;
  1518. long unsigned int _3;
  1519. long unsigned int _4;
  1520. long unsigned int _5;
  1521. <bb 2> :
  1522. u32CoreId_7 = 0;
  1523. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_7];
  1524. _2 = _1 + 4294967295;
  1525. reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_7] ={v} _2;
  1526. _3 ={v} msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_7];
  1527. _4 = _3 & 1;
  1528. if (_4 == 0)
  1529. goto <bb 3>; [INV]
  1530. else
  1531. goto <bb 5>; [INV]
  1532. <bb 3> :
  1533. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_7];
  1534. if (_5 == 0)
  1535. goto <bb 4>; [INV]
  1536. else
  1537. goto <bb 5>; [INV]
  1538. <bb 4> :
  1539. __asm__ __volatile__(" cpsie i");
  1540. <bb 5> :
  1541. return;
  1542. }
  1543. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_22 ()
  1544. {
  1545. uint32 u32CoreId;
  1546. long unsigned int _1;
  1547. long unsigned int _2;
  1548. long unsigned int _3;
  1549. long unsigned int _4;
  1550. long unsigned int _5;
  1551. long unsigned int _6;
  1552. <bb 2> :
  1553. u32CoreId_8 = 0;
  1554. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_8];
  1555. if (_1 == 0)
  1556. goto <bb 3>; [INV]
  1557. else
  1558. goto <bb 5>; [INV]
  1559. <bb 3> :
  1560. _2 = Mcl_schm_read_msr ();
  1561. msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_8] ={v} _2;
  1562. _3 ={v} msr_MCL_EXCLUSIVE_AREA_22[u32CoreId_8];
  1563. _4 = _3 & 1;
  1564. if (_4 == 0)
  1565. goto <bb 4>; [INV]
  1566. else
  1567. goto <bb 5>; [INV]
  1568. <bb 4> :
  1569. __asm__ __volatile__(" cpsid i");
  1570. <bb 5> :
  1571. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_8];
  1572. _6 = _5 + 1;
  1573. reentry_guard_MCL_EXCLUSIVE_AREA_22[u32CoreId_8] ={v} _6;
  1574. return;
  1575. }
  1576. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_21 ()
  1577. {
  1578. uint32 u32CoreId;
  1579. long unsigned int _1;
  1580. long unsigned int _2;
  1581. long unsigned int _3;
  1582. long unsigned int _4;
  1583. long unsigned int _5;
  1584. <bb 2> :
  1585. u32CoreId_7 = 0;
  1586. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_7];
  1587. _2 = _1 + 4294967295;
  1588. reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_7] ={v} _2;
  1589. _3 ={v} msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_7];
  1590. _4 = _3 & 1;
  1591. if (_4 == 0)
  1592. goto <bb 3>; [INV]
  1593. else
  1594. goto <bb 5>; [INV]
  1595. <bb 3> :
  1596. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_7];
  1597. if (_5 == 0)
  1598. goto <bb 4>; [INV]
  1599. else
  1600. goto <bb 5>; [INV]
  1601. <bb 4> :
  1602. __asm__ __volatile__(" cpsie i");
  1603. <bb 5> :
  1604. return;
  1605. }
  1606. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_21 ()
  1607. {
  1608. uint32 u32CoreId;
  1609. long unsigned int _1;
  1610. long unsigned int _2;
  1611. long unsigned int _3;
  1612. long unsigned int _4;
  1613. long unsigned int _5;
  1614. long unsigned int _6;
  1615. <bb 2> :
  1616. u32CoreId_8 = 0;
  1617. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_8];
  1618. if (_1 == 0)
  1619. goto <bb 3>; [INV]
  1620. else
  1621. goto <bb 5>; [INV]
  1622. <bb 3> :
  1623. _2 = Mcl_schm_read_msr ();
  1624. msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_8] ={v} _2;
  1625. _3 ={v} msr_MCL_EXCLUSIVE_AREA_21[u32CoreId_8];
  1626. _4 = _3 & 1;
  1627. if (_4 == 0)
  1628. goto <bb 4>; [INV]
  1629. else
  1630. goto <bb 5>; [INV]
  1631. <bb 4> :
  1632. __asm__ __volatile__(" cpsid i");
  1633. <bb 5> :
  1634. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_8];
  1635. _6 = _5 + 1;
  1636. reentry_guard_MCL_EXCLUSIVE_AREA_21[u32CoreId_8] ={v} _6;
  1637. return;
  1638. }
  1639. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_20 ()
  1640. {
  1641. uint32 u32CoreId;
  1642. long unsigned int _1;
  1643. long unsigned int _2;
  1644. long unsigned int _3;
  1645. long unsigned int _4;
  1646. long unsigned int _5;
  1647. <bb 2> :
  1648. u32CoreId_7 = 0;
  1649. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_7];
  1650. _2 = _1 + 4294967295;
  1651. reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_7] ={v} _2;
  1652. _3 ={v} msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_7];
  1653. _4 = _3 & 1;
  1654. if (_4 == 0)
  1655. goto <bb 3>; [INV]
  1656. else
  1657. goto <bb 5>; [INV]
  1658. <bb 3> :
  1659. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_7];
  1660. if (_5 == 0)
  1661. goto <bb 4>; [INV]
  1662. else
  1663. goto <bb 5>; [INV]
  1664. <bb 4> :
  1665. __asm__ __volatile__(" cpsie i");
  1666. <bb 5> :
  1667. return;
  1668. }
  1669. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_20 ()
  1670. {
  1671. uint32 u32CoreId;
  1672. long unsigned int _1;
  1673. long unsigned int _2;
  1674. long unsigned int _3;
  1675. long unsigned int _4;
  1676. long unsigned int _5;
  1677. long unsigned int _6;
  1678. <bb 2> :
  1679. u32CoreId_8 = 0;
  1680. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_8];
  1681. if (_1 == 0)
  1682. goto <bb 3>; [INV]
  1683. else
  1684. goto <bb 5>; [INV]
  1685. <bb 3> :
  1686. _2 = Mcl_schm_read_msr ();
  1687. msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_8] ={v} _2;
  1688. _3 ={v} msr_MCL_EXCLUSIVE_AREA_20[u32CoreId_8];
  1689. _4 = _3 & 1;
  1690. if (_4 == 0)
  1691. goto <bb 4>; [INV]
  1692. else
  1693. goto <bb 5>; [INV]
  1694. <bb 4> :
  1695. __asm__ __volatile__(" cpsid i");
  1696. <bb 5> :
  1697. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_8];
  1698. _6 = _5 + 1;
  1699. reentry_guard_MCL_EXCLUSIVE_AREA_20[u32CoreId_8] ={v} _6;
  1700. return;
  1701. }
  1702. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_19 ()
  1703. {
  1704. uint32 u32CoreId;
  1705. long unsigned int _1;
  1706. long unsigned int _2;
  1707. long unsigned int _3;
  1708. long unsigned int _4;
  1709. long unsigned int _5;
  1710. <bb 2> :
  1711. u32CoreId_7 = 0;
  1712. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_7];
  1713. _2 = _1 + 4294967295;
  1714. reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_7] ={v} _2;
  1715. _3 ={v} msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_7];
  1716. _4 = _3 & 1;
  1717. if (_4 == 0)
  1718. goto <bb 3>; [INV]
  1719. else
  1720. goto <bb 5>; [INV]
  1721. <bb 3> :
  1722. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_7];
  1723. if (_5 == 0)
  1724. goto <bb 4>; [INV]
  1725. else
  1726. goto <bb 5>; [INV]
  1727. <bb 4> :
  1728. __asm__ __volatile__(" cpsie i");
  1729. <bb 5> :
  1730. return;
  1731. }
  1732. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_19 ()
  1733. {
  1734. uint32 u32CoreId;
  1735. long unsigned int _1;
  1736. long unsigned int _2;
  1737. long unsigned int _3;
  1738. long unsigned int _4;
  1739. long unsigned int _5;
  1740. long unsigned int _6;
  1741. <bb 2> :
  1742. u32CoreId_8 = 0;
  1743. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_8];
  1744. if (_1 == 0)
  1745. goto <bb 3>; [INV]
  1746. else
  1747. goto <bb 5>; [INV]
  1748. <bb 3> :
  1749. _2 = Mcl_schm_read_msr ();
  1750. msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_8] ={v} _2;
  1751. _3 ={v} msr_MCL_EXCLUSIVE_AREA_19[u32CoreId_8];
  1752. _4 = _3 & 1;
  1753. if (_4 == 0)
  1754. goto <bb 4>; [INV]
  1755. else
  1756. goto <bb 5>; [INV]
  1757. <bb 4> :
  1758. __asm__ __volatile__(" cpsid i");
  1759. <bb 5> :
  1760. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_8];
  1761. _6 = _5 + 1;
  1762. reentry_guard_MCL_EXCLUSIVE_AREA_19[u32CoreId_8] ={v} _6;
  1763. return;
  1764. }
  1765. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_18 ()
  1766. {
  1767. uint32 u32CoreId;
  1768. long unsigned int _1;
  1769. long unsigned int _2;
  1770. long unsigned int _3;
  1771. long unsigned int _4;
  1772. long unsigned int _5;
  1773. <bb 2> :
  1774. u32CoreId_7 = 0;
  1775. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_7];
  1776. _2 = _1 + 4294967295;
  1777. reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_7] ={v} _2;
  1778. _3 ={v} msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_7];
  1779. _4 = _3 & 1;
  1780. if (_4 == 0)
  1781. goto <bb 3>; [INV]
  1782. else
  1783. goto <bb 5>; [INV]
  1784. <bb 3> :
  1785. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_7];
  1786. if (_5 == 0)
  1787. goto <bb 4>; [INV]
  1788. else
  1789. goto <bb 5>; [INV]
  1790. <bb 4> :
  1791. __asm__ __volatile__(" cpsie i");
  1792. <bb 5> :
  1793. return;
  1794. }
  1795. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_18 ()
  1796. {
  1797. uint32 u32CoreId;
  1798. long unsigned int _1;
  1799. long unsigned int _2;
  1800. long unsigned int _3;
  1801. long unsigned int _4;
  1802. long unsigned int _5;
  1803. long unsigned int _6;
  1804. <bb 2> :
  1805. u32CoreId_8 = 0;
  1806. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_8];
  1807. if (_1 == 0)
  1808. goto <bb 3>; [INV]
  1809. else
  1810. goto <bb 5>; [INV]
  1811. <bb 3> :
  1812. _2 = Mcl_schm_read_msr ();
  1813. msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_8] ={v} _2;
  1814. _3 ={v} msr_MCL_EXCLUSIVE_AREA_18[u32CoreId_8];
  1815. _4 = _3 & 1;
  1816. if (_4 == 0)
  1817. goto <bb 4>; [INV]
  1818. else
  1819. goto <bb 5>; [INV]
  1820. <bb 4> :
  1821. __asm__ __volatile__(" cpsid i");
  1822. <bb 5> :
  1823. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_8];
  1824. _6 = _5 + 1;
  1825. reentry_guard_MCL_EXCLUSIVE_AREA_18[u32CoreId_8] ={v} _6;
  1826. return;
  1827. }
  1828. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_17 ()
  1829. {
  1830. uint32 u32CoreId;
  1831. long unsigned int _1;
  1832. long unsigned int _2;
  1833. long unsigned int _3;
  1834. long unsigned int _4;
  1835. long unsigned int _5;
  1836. <bb 2> :
  1837. u32CoreId_7 = 0;
  1838. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_7];
  1839. _2 = _1 + 4294967295;
  1840. reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_7] ={v} _2;
  1841. _3 ={v} msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_7];
  1842. _4 = _3 & 1;
  1843. if (_4 == 0)
  1844. goto <bb 3>; [INV]
  1845. else
  1846. goto <bb 5>; [INV]
  1847. <bb 3> :
  1848. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_7];
  1849. if (_5 == 0)
  1850. goto <bb 4>; [INV]
  1851. else
  1852. goto <bb 5>; [INV]
  1853. <bb 4> :
  1854. __asm__ __volatile__(" cpsie i");
  1855. <bb 5> :
  1856. return;
  1857. }
  1858. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_17 ()
  1859. {
  1860. uint32 u32CoreId;
  1861. long unsigned int _1;
  1862. long unsigned int _2;
  1863. long unsigned int _3;
  1864. long unsigned int _4;
  1865. long unsigned int _5;
  1866. long unsigned int _6;
  1867. <bb 2> :
  1868. u32CoreId_8 = 0;
  1869. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_8];
  1870. if (_1 == 0)
  1871. goto <bb 3>; [INV]
  1872. else
  1873. goto <bb 5>; [INV]
  1874. <bb 3> :
  1875. _2 = Mcl_schm_read_msr ();
  1876. msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_8] ={v} _2;
  1877. _3 ={v} msr_MCL_EXCLUSIVE_AREA_17[u32CoreId_8];
  1878. _4 = _3 & 1;
  1879. if (_4 == 0)
  1880. goto <bb 4>; [INV]
  1881. else
  1882. goto <bb 5>; [INV]
  1883. <bb 4> :
  1884. __asm__ __volatile__(" cpsid i");
  1885. <bb 5> :
  1886. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_8];
  1887. _6 = _5 + 1;
  1888. reentry_guard_MCL_EXCLUSIVE_AREA_17[u32CoreId_8] ={v} _6;
  1889. return;
  1890. }
  1891. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_16 ()
  1892. {
  1893. uint32 u32CoreId;
  1894. long unsigned int _1;
  1895. long unsigned int _2;
  1896. long unsigned int _3;
  1897. long unsigned int _4;
  1898. long unsigned int _5;
  1899. <bb 2> :
  1900. u32CoreId_7 = 0;
  1901. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_7];
  1902. _2 = _1 + 4294967295;
  1903. reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_7] ={v} _2;
  1904. _3 ={v} msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_7];
  1905. _4 = _3 & 1;
  1906. if (_4 == 0)
  1907. goto <bb 3>; [INV]
  1908. else
  1909. goto <bb 5>; [INV]
  1910. <bb 3> :
  1911. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_7];
  1912. if (_5 == 0)
  1913. goto <bb 4>; [INV]
  1914. else
  1915. goto <bb 5>; [INV]
  1916. <bb 4> :
  1917. __asm__ __volatile__(" cpsie i");
  1918. <bb 5> :
  1919. return;
  1920. }
  1921. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_16 ()
  1922. {
  1923. uint32 u32CoreId;
  1924. long unsigned int _1;
  1925. long unsigned int _2;
  1926. long unsigned int _3;
  1927. long unsigned int _4;
  1928. long unsigned int _5;
  1929. long unsigned int _6;
  1930. <bb 2> :
  1931. u32CoreId_8 = 0;
  1932. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_8];
  1933. if (_1 == 0)
  1934. goto <bb 3>; [INV]
  1935. else
  1936. goto <bb 5>; [INV]
  1937. <bb 3> :
  1938. _2 = Mcl_schm_read_msr ();
  1939. msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_8] ={v} _2;
  1940. _3 ={v} msr_MCL_EXCLUSIVE_AREA_16[u32CoreId_8];
  1941. _4 = _3 & 1;
  1942. if (_4 == 0)
  1943. goto <bb 4>; [INV]
  1944. else
  1945. goto <bb 5>; [INV]
  1946. <bb 4> :
  1947. __asm__ __volatile__(" cpsid i");
  1948. <bb 5> :
  1949. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_8];
  1950. _6 = _5 + 1;
  1951. reentry_guard_MCL_EXCLUSIVE_AREA_16[u32CoreId_8] ={v} _6;
  1952. return;
  1953. }
  1954. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_15 ()
  1955. {
  1956. uint32 u32CoreId;
  1957. long unsigned int _1;
  1958. long unsigned int _2;
  1959. long unsigned int _3;
  1960. long unsigned int _4;
  1961. long unsigned int _5;
  1962. <bb 2> :
  1963. u32CoreId_7 = 0;
  1964. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_7];
  1965. _2 = _1 + 4294967295;
  1966. reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_7] ={v} _2;
  1967. _3 ={v} msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_7];
  1968. _4 = _3 & 1;
  1969. if (_4 == 0)
  1970. goto <bb 3>; [INV]
  1971. else
  1972. goto <bb 5>; [INV]
  1973. <bb 3> :
  1974. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_7];
  1975. if (_5 == 0)
  1976. goto <bb 4>; [INV]
  1977. else
  1978. goto <bb 5>; [INV]
  1979. <bb 4> :
  1980. __asm__ __volatile__(" cpsie i");
  1981. <bb 5> :
  1982. return;
  1983. }
  1984. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_15 ()
  1985. {
  1986. uint32 u32CoreId;
  1987. long unsigned int _1;
  1988. long unsigned int _2;
  1989. long unsigned int _3;
  1990. long unsigned int _4;
  1991. long unsigned int _5;
  1992. long unsigned int _6;
  1993. <bb 2> :
  1994. u32CoreId_8 = 0;
  1995. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_8];
  1996. if (_1 == 0)
  1997. goto <bb 3>; [INV]
  1998. else
  1999. goto <bb 5>; [INV]
  2000. <bb 3> :
  2001. _2 = Mcl_schm_read_msr ();
  2002. msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_8] ={v} _2;
  2003. _3 ={v} msr_MCL_EXCLUSIVE_AREA_15[u32CoreId_8];
  2004. _4 = _3 & 1;
  2005. if (_4 == 0)
  2006. goto <bb 4>; [INV]
  2007. else
  2008. goto <bb 5>; [INV]
  2009. <bb 4> :
  2010. __asm__ __volatile__(" cpsid i");
  2011. <bb 5> :
  2012. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_8];
  2013. _6 = _5 + 1;
  2014. reentry_guard_MCL_EXCLUSIVE_AREA_15[u32CoreId_8] ={v} _6;
  2015. return;
  2016. }
  2017. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_14 ()
  2018. {
  2019. uint32 u32CoreId;
  2020. long unsigned int _1;
  2021. long unsigned int _2;
  2022. long unsigned int _3;
  2023. long unsigned int _4;
  2024. long unsigned int _5;
  2025. <bb 2> :
  2026. u32CoreId_7 = 0;
  2027. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_7];
  2028. _2 = _1 + 4294967295;
  2029. reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_7] ={v} _2;
  2030. _3 ={v} msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_7];
  2031. _4 = _3 & 1;
  2032. if (_4 == 0)
  2033. goto <bb 3>; [INV]
  2034. else
  2035. goto <bb 5>; [INV]
  2036. <bb 3> :
  2037. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_7];
  2038. if (_5 == 0)
  2039. goto <bb 4>; [INV]
  2040. else
  2041. goto <bb 5>; [INV]
  2042. <bb 4> :
  2043. __asm__ __volatile__(" cpsie i");
  2044. <bb 5> :
  2045. return;
  2046. }
  2047. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_14 ()
  2048. {
  2049. uint32 u32CoreId;
  2050. long unsigned int _1;
  2051. long unsigned int _2;
  2052. long unsigned int _3;
  2053. long unsigned int _4;
  2054. long unsigned int _5;
  2055. long unsigned int _6;
  2056. <bb 2> :
  2057. u32CoreId_8 = 0;
  2058. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_8];
  2059. if (_1 == 0)
  2060. goto <bb 3>; [INV]
  2061. else
  2062. goto <bb 5>; [INV]
  2063. <bb 3> :
  2064. _2 = Mcl_schm_read_msr ();
  2065. msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_8] ={v} _2;
  2066. _3 ={v} msr_MCL_EXCLUSIVE_AREA_14[u32CoreId_8];
  2067. _4 = _3 & 1;
  2068. if (_4 == 0)
  2069. goto <bb 4>; [INV]
  2070. else
  2071. goto <bb 5>; [INV]
  2072. <bb 4> :
  2073. __asm__ __volatile__(" cpsid i");
  2074. <bb 5> :
  2075. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_8];
  2076. _6 = _5 + 1;
  2077. reentry_guard_MCL_EXCLUSIVE_AREA_14[u32CoreId_8] ={v} _6;
  2078. return;
  2079. }
  2080. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_13 ()
  2081. {
  2082. uint32 u32CoreId;
  2083. long unsigned int _1;
  2084. long unsigned int _2;
  2085. long unsigned int _3;
  2086. long unsigned int _4;
  2087. long unsigned int _5;
  2088. <bb 2> :
  2089. u32CoreId_7 = 0;
  2090. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_7];
  2091. _2 = _1 + 4294967295;
  2092. reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_7] ={v} _2;
  2093. _3 ={v} msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_7];
  2094. _4 = _3 & 1;
  2095. if (_4 == 0)
  2096. goto <bb 3>; [INV]
  2097. else
  2098. goto <bb 5>; [INV]
  2099. <bb 3> :
  2100. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_7];
  2101. if (_5 == 0)
  2102. goto <bb 4>; [INV]
  2103. else
  2104. goto <bb 5>; [INV]
  2105. <bb 4> :
  2106. __asm__ __volatile__(" cpsie i");
  2107. <bb 5> :
  2108. return;
  2109. }
  2110. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_13 ()
  2111. {
  2112. uint32 u32CoreId;
  2113. long unsigned int _1;
  2114. long unsigned int _2;
  2115. long unsigned int _3;
  2116. long unsigned int _4;
  2117. long unsigned int _5;
  2118. long unsigned int _6;
  2119. <bb 2> :
  2120. u32CoreId_8 = 0;
  2121. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_8];
  2122. if (_1 == 0)
  2123. goto <bb 3>; [INV]
  2124. else
  2125. goto <bb 5>; [INV]
  2126. <bb 3> :
  2127. _2 = Mcl_schm_read_msr ();
  2128. msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_8] ={v} _2;
  2129. _3 ={v} msr_MCL_EXCLUSIVE_AREA_13[u32CoreId_8];
  2130. _4 = _3 & 1;
  2131. if (_4 == 0)
  2132. goto <bb 4>; [INV]
  2133. else
  2134. goto <bb 5>; [INV]
  2135. <bb 4> :
  2136. __asm__ __volatile__(" cpsid i");
  2137. <bb 5> :
  2138. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_8];
  2139. _6 = _5 + 1;
  2140. reentry_guard_MCL_EXCLUSIVE_AREA_13[u32CoreId_8] ={v} _6;
  2141. return;
  2142. }
  2143. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_12 ()
  2144. {
  2145. uint32 u32CoreId;
  2146. long unsigned int _1;
  2147. long unsigned int _2;
  2148. long unsigned int _3;
  2149. long unsigned int _4;
  2150. long unsigned int _5;
  2151. <bb 2> :
  2152. u32CoreId_7 = 0;
  2153. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_7];
  2154. _2 = _1 + 4294967295;
  2155. reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_7] ={v} _2;
  2156. _3 ={v} msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_7];
  2157. _4 = _3 & 1;
  2158. if (_4 == 0)
  2159. goto <bb 3>; [INV]
  2160. else
  2161. goto <bb 5>; [INV]
  2162. <bb 3> :
  2163. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_7];
  2164. if (_5 == 0)
  2165. goto <bb 4>; [INV]
  2166. else
  2167. goto <bb 5>; [INV]
  2168. <bb 4> :
  2169. __asm__ __volatile__(" cpsie i");
  2170. <bb 5> :
  2171. return;
  2172. }
  2173. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_12 ()
  2174. {
  2175. uint32 u32CoreId;
  2176. long unsigned int _1;
  2177. long unsigned int _2;
  2178. long unsigned int _3;
  2179. long unsigned int _4;
  2180. long unsigned int _5;
  2181. long unsigned int _6;
  2182. <bb 2> :
  2183. u32CoreId_8 = 0;
  2184. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_8];
  2185. if (_1 == 0)
  2186. goto <bb 3>; [INV]
  2187. else
  2188. goto <bb 5>; [INV]
  2189. <bb 3> :
  2190. _2 = Mcl_schm_read_msr ();
  2191. msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_8] ={v} _2;
  2192. _3 ={v} msr_MCL_EXCLUSIVE_AREA_12[u32CoreId_8];
  2193. _4 = _3 & 1;
  2194. if (_4 == 0)
  2195. goto <bb 4>; [INV]
  2196. else
  2197. goto <bb 5>; [INV]
  2198. <bb 4> :
  2199. __asm__ __volatile__(" cpsid i");
  2200. <bb 5> :
  2201. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_8];
  2202. _6 = _5 + 1;
  2203. reentry_guard_MCL_EXCLUSIVE_AREA_12[u32CoreId_8] ={v} _6;
  2204. return;
  2205. }
  2206. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_11 ()
  2207. {
  2208. uint32 u32CoreId;
  2209. long unsigned int _1;
  2210. long unsigned int _2;
  2211. long unsigned int _3;
  2212. long unsigned int _4;
  2213. long unsigned int _5;
  2214. <bb 2> :
  2215. u32CoreId_7 = 0;
  2216. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_7];
  2217. _2 = _1 + 4294967295;
  2218. reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_7] ={v} _2;
  2219. _3 ={v} msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_7];
  2220. _4 = _3 & 1;
  2221. if (_4 == 0)
  2222. goto <bb 3>; [INV]
  2223. else
  2224. goto <bb 5>; [INV]
  2225. <bb 3> :
  2226. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_7];
  2227. if (_5 == 0)
  2228. goto <bb 4>; [INV]
  2229. else
  2230. goto <bb 5>; [INV]
  2231. <bb 4> :
  2232. __asm__ __volatile__(" cpsie i");
  2233. <bb 5> :
  2234. return;
  2235. }
  2236. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_11 ()
  2237. {
  2238. uint32 u32CoreId;
  2239. long unsigned int _1;
  2240. long unsigned int _2;
  2241. long unsigned int _3;
  2242. long unsigned int _4;
  2243. long unsigned int _5;
  2244. long unsigned int _6;
  2245. <bb 2> :
  2246. u32CoreId_8 = 0;
  2247. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_8];
  2248. if (_1 == 0)
  2249. goto <bb 3>; [INV]
  2250. else
  2251. goto <bb 5>; [INV]
  2252. <bb 3> :
  2253. _2 = Mcl_schm_read_msr ();
  2254. msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_8] ={v} _2;
  2255. _3 ={v} msr_MCL_EXCLUSIVE_AREA_11[u32CoreId_8];
  2256. _4 = _3 & 1;
  2257. if (_4 == 0)
  2258. goto <bb 4>; [INV]
  2259. else
  2260. goto <bb 5>; [INV]
  2261. <bb 4> :
  2262. __asm__ __volatile__(" cpsid i");
  2263. <bb 5> :
  2264. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_8];
  2265. _6 = _5 + 1;
  2266. reentry_guard_MCL_EXCLUSIVE_AREA_11[u32CoreId_8] ={v} _6;
  2267. return;
  2268. }
  2269. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_10 ()
  2270. {
  2271. uint32 u32CoreId;
  2272. long unsigned int _1;
  2273. long unsigned int _2;
  2274. long unsigned int _3;
  2275. long unsigned int _4;
  2276. long unsigned int _5;
  2277. <bb 2> :
  2278. u32CoreId_7 = 0;
  2279. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_7];
  2280. _2 = _1 + 4294967295;
  2281. reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_7] ={v} _2;
  2282. _3 ={v} msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_7];
  2283. _4 = _3 & 1;
  2284. if (_4 == 0)
  2285. goto <bb 3>; [INV]
  2286. else
  2287. goto <bb 5>; [INV]
  2288. <bb 3> :
  2289. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_7];
  2290. if (_5 == 0)
  2291. goto <bb 4>; [INV]
  2292. else
  2293. goto <bb 5>; [INV]
  2294. <bb 4> :
  2295. __asm__ __volatile__(" cpsie i");
  2296. <bb 5> :
  2297. return;
  2298. }
  2299. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_10 ()
  2300. {
  2301. uint32 u32CoreId;
  2302. long unsigned int _1;
  2303. long unsigned int _2;
  2304. long unsigned int _3;
  2305. long unsigned int _4;
  2306. long unsigned int _5;
  2307. long unsigned int _6;
  2308. <bb 2> :
  2309. u32CoreId_8 = 0;
  2310. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_8];
  2311. if (_1 == 0)
  2312. goto <bb 3>; [INV]
  2313. else
  2314. goto <bb 5>; [INV]
  2315. <bb 3> :
  2316. _2 = Mcl_schm_read_msr ();
  2317. msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_8] ={v} _2;
  2318. _3 ={v} msr_MCL_EXCLUSIVE_AREA_10[u32CoreId_8];
  2319. _4 = _3 & 1;
  2320. if (_4 == 0)
  2321. goto <bb 4>; [INV]
  2322. else
  2323. goto <bb 5>; [INV]
  2324. <bb 4> :
  2325. __asm__ __volatile__(" cpsid i");
  2326. <bb 5> :
  2327. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_8];
  2328. _6 = _5 + 1;
  2329. reentry_guard_MCL_EXCLUSIVE_AREA_10[u32CoreId_8] ={v} _6;
  2330. return;
  2331. }
  2332. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_09 ()
  2333. {
  2334. uint32 u32CoreId;
  2335. long unsigned int _1;
  2336. long unsigned int _2;
  2337. long unsigned int _3;
  2338. long unsigned int _4;
  2339. long unsigned int _5;
  2340. <bb 2> :
  2341. u32CoreId_7 = 0;
  2342. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_7];
  2343. _2 = _1 + 4294967295;
  2344. reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_7] ={v} _2;
  2345. _3 ={v} msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_7];
  2346. _4 = _3 & 1;
  2347. if (_4 == 0)
  2348. goto <bb 3>; [INV]
  2349. else
  2350. goto <bb 5>; [INV]
  2351. <bb 3> :
  2352. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_7];
  2353. if (_5 == 0)
  2354. goto <bb 4>; [INV]
  2355. else
  2356. goto <bb 5>; [INV]
  2357. <bb 4> :
  2358. __asm__ __volatile__(" cpsie i");
  2359. <bb 5> :
  2360. return;
  2361. }
  2362. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_09 ()
  2363. {
  2364. uint32 u32CoreId;
  2365. long unsigned int _1;
  2366. long unsigned int _2;
  2367. long unsigned int _3;
  2368. long unsigned int _4;
  2369. long unsigned int _5;
  2370. long unsigned int _6;
  2371. <bb 2> :
  2372. u32CoreId_8 = 0;
  2373. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_8];
  2374. if (_1 == 0)
  2375. goto <bb 3>; [INV]
  2376. else
  2377. goto <bb 5>; [INV]
  2378. <bb 3> :
  2379. _2 = Mcl_schm_read_msr ();
  2380. msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_8] ={v} _2;
  2381. _3 ={v} msr_MCL_EXCLUSIVE_AREA_09[u32CoreId_8];
  2382. _4 = _3 & 1;
  2383. if (_4 == 0)
  2384. goto <bb 4>; [INV]
  2385. else
  2386. goto <bb 5>; [INV]
  2387. <bb 4> :
  2388. __asm__ __volatile__(" cpsid i");
  2389. <bb 5> :
  2390. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_8];
  2391. _6 = _5 + 1;
  2392. reentry_guard_MCL_EXCLUSIVE_AREA_09[u32CoreId_8] ={v} _6;
  2393. return;
  2394. }
  2395. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_08 ()
  2396. {
  2397. uint32 u32CoreId;
  2398. long unsigned int _1;
  2399. long unsigned int _2;
  2400. long unsigned int _3;
  2401. long unsigned int _4;
  2402. long unsigned int _5;
  2403. <bb 2> :
  2404. u32CoreId_7 = 0;
  2405. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_7];
  2406. _2 = _1 + 4294967295;
  2407. reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_7] ={v} _2;
  2408. _3 ={v} msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_7];
  2409. _4 = _3 & 1;
  2410. if (_4 == 0)
  2411. goto <bb 3>; [INV]
  2412. else
  2413. goto <bb 5>; [INV]
  2414. <bb 3> :
  2415. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_7];
  2416. if (_5 == 0)
  2417. goto <bb 4>; [INV]
  2418. else
  2419. goto <bb 5>; [INV]
  2420. <bb 4> :
  2421. __asm__ __volatile__(" cpsie i");
  2422. <bb 5> :
  2423. return;
  2424. }
  2425. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_08 ()
  2426. {
  2427. uint32 u32CoreId;
  2428. long unsigned int _1;
  2429. long unsigned int _2;
  2430. long unsigned int _3;
  2431. long unsigned int _4;
  2432. long unsigned int _5;
  2433. long unsigned int _6;
  2434. <bb 2> :
  2435. u32CoreId_8 = 0;
  2436. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_8];
  2437. if (_1 == 0)
  2438. goto <bb 3>; [INV]
  2439. else
  2440. goto <bb 5>; [INV]
  2441. <bb 3> :
  2442. _2 = Mcl_schm_read_msr ();
  2443. msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_8] ={v} _2;
  2444. _3 ={v} msr_MCL_EXCLUSIVE_AREA_08[u32CoreId_8];
  2445. _4 = _3 & 1;
  2446. if (_4 == 0)
  2447. goto <bb 4>; [INV]
  2448. else
  2449. goto <bb 5>; [INV]
  2450. <bb 4> :
  2451. __asm__ __volatile__(" cpsid i");
  2452. <bb 5> :
  2453. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_8];
  2454. _6 = _5 + 1;
  2455. reentry_guard_MCL_EXCLUSIVE_AREA_08[u32CoreId_8] ={v} _6;
  2456. return;
  2457. }
  2458. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_07 ()
  2459. {
  2460. uint32 u32CoreId;
  2461. long unsigned int _1;
  2462. long unsigned int _2;
  2463. long unsigned int _3;
  2464. long unsigned int _4;
  2465. long unsigned int _5;
  2466. <bb 2> :
  2467. u32CoreId_7 = 0;
  2468. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_7];
  2469. _2 = _1 + 4294967295;
  2470. reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_7] ={v} _2;
  2471. _3 ={v} msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_7];
  2472. _4 = _3 & 1;
  2473. if (_4 == 0)
  2474. goto <bb 3>; [INV]
  2475. else
  2476. goto <bb 5>; [INV]
  2477. <bb 3> :
  2478. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_7];
  2479. if (_5 == 0)
  2480. goto <bb 4>; [INV]
  2481. else
  2482. goto <bb 5>; [INV]
  2483. <bb 4> :
  2484. __asm__ __volatile__(" cpsie i");
  2485. <bb 5> :
  2486. return;
  2487. }
  2488. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_07 ()
  2489. {
  2490. uint32 u32CoreId;
  2491. long unsigned int _1;
  2492. long unsigned int _2;
  2493. long unsigned int _3;
  2494. long unsigned int _4;
  2495. long unsigned int _5;
  2496. long unsigned int _6;
  2497. <bb 2> :
  2498. u32CoreId_8 = 0;
  2499. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_8];
  2500. if (_1 == 0)
  2501. goto <bb 3>; [INV]
  2502. else
  2503. goto <bb 5>; [INV]
  2504. <bb 3> :
  2505. _2 = Mcl_schm_read_msr ();
  2506. msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_8] ={v} _2;
  2507. _3 ={v} msr_MCL_EXCLUSIVE_AREA_07[u32CoreId_8];
  2508. _4 = _3 & 1;
  2509. if (_4 == 0)
  2510. goto <bb 4>; [INV]
  2511. else
  2512. goto <bb 5>; [INV]
  2513. <bb 4> :
  2514. __asm__ __volatile__(" cpsid i");
  2515. <bb 5> :
  2516. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_8];
  2517. _6 = _5 + 1;
  2518. reentry_guard_MCL_EXCLUSIVE_AREA_07[u32CoreId_8] ={v} _6;
  2519. return;
  2520. }
  2521. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_06 ()
  2522. {
  2523. uint32 u32CoreId;
  2524. long unsigned int _1;
  2525. long unsigned int _2;
  2526. long unsigned int _3;
  2527. long unsigned int _4;
  2528. long unsigned int _5;
  2529. <bb 2> :
  2530. u32CoreId_7 = 0;
  2531. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_7];
  2532. _2 = _1 + 4294967295;
  2533. reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_7] ={v} _2;
  2534. _3 ={v} msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_7];
  2535. _4 = _3 & 1;
  2536. if (_4 == 0)
  2537. goto <bb 3>; [INV]
  2538. else
  2539. goto <bb 5>; [INV]
  2540. <bb 3> :
  2541. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_7];
  2542. if (_5 == 0)
  2543. goto <bb 4>; [INV]
  2544. else
  2545. goto <bb 5>; [INV]
  2546. <bb 4> :
  2547. __asm__ __volatile__(" cpsie i");
  2548. <bb 5> :
  2549. return;
  2550. }
  2551. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_06 ()
  2552. {
  2553. uint32 u32CoreId;
  2554. long unsigned int _1;
  2555. long unsigned int _2;
  2556. long unsigned int _3;
  2557. long unsigned int _4;
  2558. long unsigned int _5;
  2559. long unsigned int _6;
  2560. <bb 2> :
  2561. u32CoreId_8 = 0;
  2562. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_8];
  2563. if (_1 == 0)
  2564. goto <bb 3>; [INV]
  2565. else
  2566. goto <bb 5>; [INV]
  2567. <bb 3> :
  2568. _2 = Mcl_schm_read_msr ();
  2569. msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_8] ={v} _2;
  2570. _3 ={v} msr_MCL_EXCLUSIVE_AREA_06[u32CoreId_8];
  2571. _4 = _3 & 1;
  2572. if (_4 == 0)
  2573. goto <bb 4>; [INV]
  2574. else
  2575. goto <bb 5>; [INV]
  2576. <bb 4> :
  2577. __asm__ __volatile__(" cpsid i");
  2578. <bb 5> :
  2579. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_8];
  2580. _6 = _5 + 1;
  2581. reentry_guard_MCL_EXCLUSIVE_AREA_06[u32CoreId_8] ={v} _6;
  2582. return;
  2583. }
  2584. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_05 ()
  2585. {
  2586. uint32 u32CoreId;
  2587. long unsigned int _1;
  2588. long unsigned int _2;
  2589. long unsigned int _3;
  2590. long unsigned int _4;
  2591. long unsigned int _5;
  2592. <bb 2> :
  2593. u32CoreId_7 = 0;
  2594. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_7];
  2595. _2 = _1 + 4294967295;
  2596. reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_7] ={v} _2;
  2597. _3 ={v} msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_7];
  2598. _4 = _3 & 1;
  2599. if (_4 == 0)
  2600. goto <bb 3>; [INV]
  2601. else
  2602. goto <bb 5>; [INV]
  2603. <bb 3> :
  2604. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_7];
  2605. if (_5 == 0)
  2606. goto <bb 4>; [INV]
  2607. else
  2608. goto <bb 5>; [INV]
  2609. <bb 4> :
  2610. __asm__ __volatile__(" cpsie i");
  2611. <bb 5> :
  2612. return;
  2613. }
  2614. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_05 ()
  2615. {
  2616. uint32 u32CoreId;
  2617. long unsigned int _1;
  2618. long unsigned int _2;
  2619. long unsigned int _3;
  2620. long unsigned int _4;
  2621. long unsigned int _5;
  2622. long unsigned int _6;
  2623. <bb 2> :
  2624. u32CoreId_8 = 0;
  2625. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_8];
  2626. if (_1 == 0)
  2627. goto <bb 3>; [INV]
  2628. else
  2629. goto <bb 5>; [INV]
  2630. <bb 3> :
  2631. _2 = Mcl_schm_read_msr ();
  2632. msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_8] ={v} _2;
  2633. _3 ={v} msr_MCL_EXCLUSIVE_AREA_05[u32CoreId_8];
  2634. _4 = _3 & 1;
  2635. if (_4 == 0)
  2636. goto <bb 4>; [INV]
  2637. else
  2638. goto <bb 5>; [INV]
  2639. <bb 4> :
  2640. __asm__ __volatile__(" cpsid i");
  2641. <bb 5> :
  2642. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_8];
  2643. _6 = _5 + 1;
  2644. reentry_guard_MCL_EXCLUSIVE_AREA_05[u32CoreId_8] ={v} _6;
  2645. return;
  2646. }
  2647. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_04 ()
  2648. {
  2649. uint32 u32CoreId;
  2650. long unsigned int _1;
  2651. long unsigned int _2;
  2652. long unsigned int _3;
  2653. long unsigned int _4;
  2654. long unsigned int _5;
  2655. <bb 2> :
  2656. u32CoreId_7 = 0;
  2657. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_7];
  2658. _2 = _1 + 4294967295;
  2659. reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_7] ={v} _2;
  2660. _3 ={v} msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_7];
  2661. _4 = _3 & 1;
  2662. if (_4 == 0)
  2663. goto <bb 3>; [INV]
  2664. else
  2665. goto <bb 5>; [INV]
  2666. <bb 3> :
  2667. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_7];
  2668. if (_5 == 0)
  2669. goto <bb 4>; [INV]
  2670. else
  2671. goto <bb 5>; [INV]
  2672. <bb 4> :
  2673. __asm__ __volatile__(" cpsie i");
  2674. <bb 5> :
  2675. return;
  2676. }
  2677. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_04 ()
  2678. {
  2679. uint32 u32CoreId;
  2680. long unsigned int _1;
  2681. long unsigned int _2;
  2682. long unsigned int _3;
  2683. long unsigned int _4;
  2684. long unsigned int _5;
  2685. long unsigned int _6;
  2686. <bb 2> :
  2687. u32CoreId_8 = 0;
  2688. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_8];
  2689. if (_1 == 0)
  2690. goto <bb 3>; [INV]
  2691. else
  2692. goto <bb 5>; [INV]
  2693. <bb 3> :
  2694. _2 = Mcl_schm_read_msr ();
  2695. msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_8] ={v} _2;
  2696. _3 ={v} msr_MCL_EXCLUSIVE_AREA_04[u32CoreId_8];
  2697. _4 = _3 & 1;
  2698. if (_4 == 0)
  2699. goto <bb 4>; [INV]
  2700. else
  2701. goto <bb 5>; [INV]
  2702. <bb 4> :
  2703. __asm__ __volatile__(" cpsid i");
  2704. <bb 5> :
  2705. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_8];
  2706. _6 = _5 + 1;
  2707. reentry_guard_MCL_EXCLUSIVE_AREA_04[u32CoreId_8] ={v} _6;
  2708. return;
  2709. }
  2710. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_03 ()
  2711. {
  2712. uint32 u32CoreId;
  2713. long unsigned int _1;
  2714. long unsigned int _2;
  2715. long unsigned int _3;
  2716. long unsigned int _4;
  2717. long unsigned int _5;
  2718. <bb 2> :
  2719. u32CoreId_7 = 0;
  2720. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_7];
  2721. _2 = _1 + 4294967295;
  2722. reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_7] ={v} _2;
  2723. _3 ={v} msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_7];
  2724. _4 = _3 & 1;
  2725. if (_4 == 0)
  2726. goto <bb 3>; [INV]
  2727. else
  2728. goto <bb 5>; [INV]
  2729. <bb 3> :
  2730. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_7];
  2731. if (_5 == 0)
  2732. goto <bb 4>; [INV]
  2733. else
  2734. goto <bb 5>; [INV]
  2735. <bb 4> :
  2736. __asm__ __volatile__(" cpsie i");
  2737. <bb 5> :
  2738. return;
  2739. }
  2740. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_03 ()
  2741. {
  2742. uint32 u32CoreId;
  2743. long unsigned int _1;
  2744. long unsigned int _2;
  2745. long unsigned int _3;
  2746. long unsigned int _4;
  2747. long unsigned int _5;
  2748. long unsigned int _6;
  2749. <bb 2> :
  2750. u32CoreId_8 = 0;
  2751. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_8];
  2752. if (_1 == 0)
  2753. goto <bb 3>; [INV]
  2754. else
  2755. goto <bb 5>; [INV]
  2756. <bb 3> :
  2757. _2 = Mcl_schm_read_msr ();
  2758. msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_8] ={v} _2;
  2759. _3 ={v} msr_MCL_EXCLUSIVE_AREA_03[u32CoreId_8];
  2760. _4 = _3 & 1;
  2761. if (_4 == 0)
  2762. goto <bb 4>; [INV]
  2763. else
  2764. goto <bb 5>; [INV]
  2765. <bb 4> :
  2766. __asm__ __volatile__(" cpsid i");
  2767. <bb 5> :
  2768. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_8];
  2769. _6 = _5 + 1;
  2770. reentry_guard_MCL_EXCLUSIVE_AREA_03[u32CoreId_8] ={v} _6;
  2771. return;
  2772. }
  2773. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_02 ()
  2774. {
  2775. uint32 u32CoreId;
  2776. long unsigned int _1;
  2777. long unsigned int _2;
  2778. long unsigned int _3;
  2779. long unsigned int _4;
  2780. long unsigned int _5;
  2781. <bb 2> :
  2782. u32CoreId_7 = 0;
  2783. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_7];
  2784. _2 = _1 + 4294967295;
  2785. reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_7] ={v} _2;
  2786. _3 ={v} msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_7];
  2787. _4 = _3 & 1;
  2788. if (_4 == 0)
  2789. goto <bb 3>; [INV]
  2790. else
  2791. goto <bb 5>; [INV]
  2792. <bb 3> :
  2793. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_7];
  2794. if (_5 == 0)
  2795. goto <bb 4>; [INV]
  2796. else
  2797. goto <bb 5>; [INV]
  2798. <bb 4> :
  2799. __asm__ __volatile__(" cpsie i");
  2800. <bb 5> :
  2801. return;
  2802. }
  2803. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02 ()
  2804. {
  2805. uint32 u32CoreId;
  2806. long unsigned int _1;
  2807. long unsigned int _2;
  2808. long unsigned int _3;
  2809. long unsigned int _4;
  2810. long unsigned int _5;
  2811. long unsigned int _6;
  2812. <bb 2> :
  2813. u32CoreId_8 = 0;
  2814. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_8];
  2815. if (_1 == 0)
  2816. goto <bb 3>; [INV]
  2817. else
  2818. goto <bb 5>; [INV]
  2819. <bb 3> :
  2820. _2 = Mcl_schm_read_msr ();
  2821. msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_8] ={v} _2;
  2822. _3 ={v} msr_MCL_EXCLUSIVE_AREA_02[u32CoreId_8];
  2823. _4 = _3 & 1;
  2824. if (_4 == 0)
  2825. goto <bb 4>; [INV]
  2826. else
  2827. goto <bb 5>; [INV]
  2828. <bb 4> :
  2829. __asm__ __volatile__(" cpsid i");
  2830. <bb 5> :
  2831. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_8];
  2832. _6 = _5 + 1;
  2833. reentry_guard_MCL_EXCLUSIVE_AREA_02[u32CoreId_8] ={v} _6;
  2834. return;
  2835. }
  2836. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01 ()
  2837. {
  2838. uint32 u32CoreId;
  2839. long unsigned int _1;
  2840. long unsigned int _2;
  2841. long unsigned int _3;
  2842. long unsigned int _4;
  2843. long unsigned int _5;
  2844. <bb 2> :
  2845. u32CoreId_7 = 0;
  2846. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_7];
  2847. _2 = _1 + 4294967295;
  2848. reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_7] ={v} _2;
  2849. _3 ={v} msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_7];
  2850. _4 = _3 & 1;
  2851. if (_4 == 0)
  2852. goto <bb 3>; [INV]
  2853. else
  2854. goto <bb 5>; [INV]
  2855. <bb 3> :
  2856. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_7];
  2857. if (_5 == 0)
  2858. goto <bb 4>; [INV]
  2859. else
  2860. goto <bb 5>; [INV]
  2861. <bb 4> :
  2862. __asm__ __volatile__(" cpsie i");
  2863. <bb 5> :
  2864. return;
  2865. }
  2866. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01 ()
  2867. {
  2868. uint32 u32CoreId;
  2869. long unsigned int _1;
  2870. long unsigned int _2;
  2871. long unsigned int _3;
  2872. long unsigned int _4;
  2873. long unsigned int _5;
  2874. long unsigned int _6;
  2875. <bb 2> :
  2876. u32CoreId_8 = 0;
  2877. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_8];
  2878. if (_1 == 0)
  2879. goto <bb 3>; [INV]
  2880. else
  2881. goto <bb 5>; [INV]
  2882. <bb 3> :
  2883. _2 = Mcl_schm_read_msr ();
  2884. msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_8] ={v} _2;
  2885. _3 ={v} msr_MCL_EXCLUSIVE_AREA_01[u32CoreId_8];
  2886. _4 = _3 & 1;
  2887. if (_4 == 0)
  2888. goto <bb 4>; [INV]
  2889. else
  2890. goto <bb 5>; [INV]
  2891. <bb 4> :
  2892. __asm__ __volatile__(" cpsid i");
  2893. <bb 5> :
  2894. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_8];
  2895. _6 = _5 + 1;
  2896. reentry_guard_MCL_EXCLUSIVE_AREA_01[u32CoreId_8] ={v} _6;
  2897. return;
  2898. }
  2899. SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00 ()
  2900. {
  2901. uint32 u32CoreId;
  2902. long unsigned int _1;
  2903. long unsigned int _2;
  2904. long unsigned int _3;
  2905. long unsigned int _4;
  2906. long unsigned int _5;
  2907. <bb 2> :
  2908. u32CoreId_7 = 0;
  2909. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_7];
  2910. _2 = _1 + 4294967295;
  2911. reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_7] ={v} _2;
  2912. _3 ={v} msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_7];
  2913. _4 = _3 & 1;
  2914. if (_4 == 0)
  2915. goto <bb 3>; [INV]
  2916. else
  2917. goto <bb 5>; [INV]
  2918. <bb 3> :
  2919. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_7];
  2920. if (_5 == 0)
  2921. goto <bb 4>; [INV]
  2922. else
  2923. goto <bb 5>; [INV]
  2924. <bb 4> :
  2925. __asm__ __volatile__(" cpsie i");
  2926. <bb 5> :
  2927. return;
  2928. }
  2929. SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00 ()
  2930. {
  2931. uint32 u32CoreId;
  2932. long unsigned int _1;
  2933. long unsigned int _2;
  2934. long unsigned int _3;
  2935. long unsigned int _4;
  2936. long unsigned int _5;
  2937. long unsigned int _6;
  2938. <bb 2> :
  2939. u32CoreId_8 = 0;
  2940. _1 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_8];
  2941. if (_1 == 0)
  2942. goto <bb 3>; [INV]
  2943. else
  2944. goto <bb 5>; [INV]
  2945. <bb 3> :
  2946. _2 = Mcl_schm_read_msr ();
  2947. msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_8] ={v} _2;
  2948. _3 ={v} msr_MCL_EXCLUSIVE_AREA_00[u32CoreId_8];
  2949. _4 = _3 & 1;
  2950. if (_4 == 0)
  2951. goto <bb 4>; [INV]
  2952. else
  2953. goto <bb 5>; [INV]
  2954. <bb 4> :
  2955. __asm__ __volatile__(" cpsid i");
  2956. <bb 5> :
  2957. _5 ={v} reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_8];
  2958. _6 = _5 + 1;
  2959. reentry_guard_MCL_EXCLUSIVE_AREA_00[u32CoreId_8] ={v} _6;
  2960. return;
  2961. }
  2962. Mcl_schm_read_msr ()
  2963. {
  2964. register uint32 reg_tmp;
  2965. uint32 D.6206;
  2966. uint32 _2;
  2967. <bb 2> :
  2968. __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp_1);
  2969. _2 = reg_tmp_1;
  2970. <bb 3> :
  2971. <L0>:
  2972. return _2;
  2973. }