system.c.017i.build_ssa_passes 2.9 KB

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  1. __attribute__((section (".systeminit")))
  2. SystemInit ()
  3. {
  4. <bb 2> :
  5. # DEBUG BEGIN_STMT
  6. _1 = 3758153728B;
  7. _2 = _1->CPACR;
  8. _3 = 3758153728B;
  9. _4 = _2 | 15728640;
  10. _3->CPACR = _4;
  11. # DEBUG BEGIN_STMT
  12. __asm__ __volatile__("dsb");
  13. # DEBUG BEGIN_STMT
  14. __asm__ __volatile__("isb");
  15. # DEBUG BEGIN_STMT
  16. _5 = 3758153728B;
  17. _6 = _5->CCR;
  18. _7 = 3758153728B;
  19. _8 = _6 | 1;
  20. _7->CCR = _8;
  21. # DEBUG BEGIN_STMT
  22. _9 = 3758153728B;
  23. _10 = _9->SHPR3;
  24. _11 = 3758153728B;
  25. _12 = _10 & 4278255615;
  26. _11->SHPR3 = _12;
  27. # DEBUG BEGIN_STMT
  28. _13 = 1073741824B;
  29. _13->MPRA = 2004318071;
  30. # DEBUG BEGIN_STMT
  31. _14 = 1073741824B;
  32. _14->PACRA = 0;
  33. # DEBUG BEGIN_STMT
  34. _15 = 1073741824B;
  35. _15->PACRB = 0;
  36. # DEBUG BEGIN_STMT
  37. _16 = 1073741824B;
  38. _16->PACRD = 0;
  39. # DEBUG BEGIN_STMT
  40. _17 = 1073741824B;
  41. _17->OPACR[0] = 0;
  42. # DEBUG BEGIN_STMT
  43. _18 = 1073741824B;
  44. _18->OPACR[1] = 0;
  45. # DEBUG BEGIN_STMT
  46. _19 = 1073741824B;
  47. _19->OPACR[2] = 0;
  48. # DEBUG BEGIN_STMT
  49. _20 = 1073741824B;
  50. _20->OPACR[3] = 0;
  51. # DEBUG BEGIN_STMT
  52. _21 = 1073741824B;
  53. _21->OPACR[4] = 0;
  54. # DEBUG BEGIN_STMT
  55. _22 = 1073741824B;
  56. _22->OPACR[5] = 0;
  57. # DEBUG BEGIN_STMT
  58. _23 = 1073741824B;
  59. _23->OPACR[6] = 0;
  60. # DEBUG BEGIN_STMT
  61. _24 = 1073741824B;
  62. _24->OPACR[7] = 0;
  63. # DEBUG BEGIN_STMT
  64. _25 = 1073741824B;
  65. _25->OPACR[8] = 0;
  66. # DEBUG BEGIN_STMT
  67. _26 = 1073741824B;
  68. _26->OPACR[9] = 0;
  69. # DEBUG BEGIN_STMT
  70. _27 = 1073741824B;
  71. _27->OPACR[10] = 0;
  72. # DEBUG BEGIN_STMT
  73. _28 = 1073741824B;
  74. _28->OPACR[11] = 0;
  75. # DEBUG BEGIN_STMT
  76. __asm__ __volatile__("dsb");
  77. # DEBUG BEGIN_STMT
  78. __asm__ __volatile__("isb");
  79. # DEBUG BEGIN_STMT
  80. sys_m4_cache_init (0);
  81. return;
  82. }
  83. Sys_GetCoreID ()
  84. {
  85. uint8 D.6221;
  86. <bb 2> :
  87. # DEBUG BEGIN_STMT
  88. D.6221 = 0;
  89. return D.6221;
  90. }
  91. default_interrupt_routine ()
  92. {
  93. <bb 2> :
  94. # DEBUG BEGIN_STMT
  95. # DEBUG BEGIN_STMT
  96. # DEBUG BEGIN_STMT
  97. goto <bb 2>; [INV]
  98. }
  99. startup_go_to_user_mode ()
  100. {
  101. <bb 2> :
  102. # DEBUG BEGIN_STMT
  103. return;
  104. }
  105. sys_m4_cache_init (uint8 cache)
  106. {
  107. uint8 RetValue;
  108. uint8 D.6226;
  109. <bb 2> :
  110. # DEBUG BEGIN_STMT
  111. RetValue = 0;
  112. # DEBUG BEGIN_STMT
  113. if (cache == 0)
  114. goto <bb 3>; [INV]
  115. else
  116. goto <bb 6>; [INV]
  117. <bb 3> :
  118. # DEBUG BEGIN_STMT
  119. _1 = 3758628864B;
  120. _1->PCCCR = 83886080;
  121. # DEBUG BEGIN_STMT
  122. _2 = 3758628864B;
  123. _3 = _2->PCCCR;
  124. _4 = 3758628864B;
  125. _5 = _3 | 2147483648;
  126. _4->PCCCR = _5;
  127. # DEBUG BEGIN_STMT
  128. <bb 4> :
  129. # DEBUG BEGIN_STMT
  130. # DEBUG BEGIN_STMT
  131. _6 = 3758628864B;
  132. _7 = _6->PCCCR;
  133. _8 = _7 & 2147483648;
  134. if (_8 == 2147483648)
  135. goto <bb 4>; [INV]
  136. else
  137. goto <bb 5>; [INV]
  138. <bb 5> :
  139. # DEBUG BEGIN_STMT
  140. # DEBUG BEGIN_STMT
  141. _9 = 3758628864B;
  142. _10 = _9->PCCCR;
  143. _11 = 3758628864B;
  144. _12 = _10 | 1;
  145. _11->PCCCR = _12;
  146. goto <bb 7>; [INV]
  147. <bb 6> :
  148. # DEBUG BEGIN_STMT
  149. RetValue = 1;
  150. <bb 7> :
  151. # DEBUG BEGIN_STMT
  152. D.6226 = RetValue;
  153. return D.6226;
  154. }