电压采样测试

ARMCC/Makefile

@@ -30,6 +30,7 @@ PLAT/project/$(TARGET)/apps/qx_app/src/BCU.o \
 PLAT/project/$(TARGET)/apps/qx_app/src/SOH.o \
 PLAT/project/$(TARGET)/apps/qx_app/src/SOC.o \
 	PLAT/project/$(TARGET)/apps/qx_app/src/BLC.o \
+	PLAT/project/$(TARGET)/apps/qx_app/src/SFM.o \
 	PLAT/project/$(TARGET)/apps/qx_app/src/div_nde_s32_floor.o \
 	PLAT/project/$(TARGET)/apps/qx_app/src/look1_is16lu16n16tu16_binlcase.o \
 	PLAT/project/$(TARGET)/apps/qx_app/src/look1_iu16lu16n16tu16_binlcase.o \
@@ -48,7 +49,12 @@ PLAT/project/$(TARGET)/apps/qx_app/src/SOC.o \
 	PLAT/project/$(TARGET)/apps/qx_app/src/BINARYSEARCH_U16.o \
 	PLAT/project/$(TARGET)/apps/qx_app/src/div_nzp_repeat_u32.o \
 	PLAT/project/$(TARGET)/apps/qx_app/src/div_nzp_repeat_u32_ceiling.o \
-	PLAT/project/$(TARGET)/apps/qx_app/src/const_params.o \
+	PLAT/project/$(TARGET)/apps/qx_app/src/BCUCal.o \
+        PLAT/project/$(TARGET)/apps/qx_app/src/BCUDisp.o \
+	PLAT/project/$(TARGET)/apps/qx_app/src/div_su32.o \
+	PLAT/project/$(TARGET)/apps/qx_app/src/mul_s32_hiSR.o \
+	PLAT/project/$(TARGET)/apps/qx_app/src/div_uus32_sat.o \
+	PLAT/project/$(TARGET)/apps/qx_app/src/div_repeat_u32.o \
 	PLAT/project/$(TARGET)/apps/qx_app/src/mul_u32_hiSR_near.o
 include $(TOP)/PLAT/tools/scripts/Makefile.rules 
 #enable wdt

inc/AppConfig.h

@@ -104,10 +104,11 @@ typedef struct _AppDataType
     UINT16 socd_pct_bcuSocE;            //电池显示SOC 读取量；
     UINT16 socd_pct_battSocE;           //电池真实SOC 读取量；
     UINT16 sohd_tm_chrgStartStatE;      //充电前静置时间读取量；
-    UINT8  sohd_flg_chrgEndE;           //充电结束标志位读取量；
+    BOOL   sohd_flg_chrgEndE;           //充电结束标志位读取量；
     UINT16 sohv_V_chrgStartStatE[28];   //充电开始时刻的单体电压（数组）读取量；
     UINT16 sohd_Q_chrgE;                //充入容量读取量；
     UINT16 sohv_Q_packCapArrE[10];     //10次整包容量（数组）读取量；
+    UINT16 sohv_Q_cellCapArrE[28];     //  
 }AppDataBody;
 typedef struct _AppDataHeader
 {

inc/AppSignal.h

@@ -12,9 +12,11 @@
 #include "osasys.h"
 #include "queue.h"
 #include "bsp_custom.h"
+#include "lwip_config_ec6160h00.h"
 //declear the bool vars
 extern volatile BOOL NB_Fota_update_flag;
 extern volatile BOOL BMS_Fota_update_flag;
+extern UINT32 ErrFlg;
 
 extern BOOL downloadReady;
 

inc/BCU.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'BCU'.
  *
- * Model version                  : 1.13
+ * Model version                  : 1.19
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:42 2021
+ * C/C++ source code generated on : Fri Aug 20 13:49:53 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -13,6 +13,8 @@
  * Validation result: Not run
  */
 
+
+
 #ifndef RTW_HEADER_BCU_h_
 #define RTW_HEADER_BCU_h_
 #ifndef BCU_COMMON_INCLUDES_
@@ -20,6 +22,8 @@
 #include "rtwtypes.h"
 #include "commontypedef.h"
 #include "AppSignal.h"
+#include "zero_crossing_types.h"
+
 #endif                                 /* BCU_COMMON_INCLUDES_ */
 
 #include "BCU_types.h"
@@ -32,9 +36,22 @@ typedef enum
     PROCESS_STATE_SLEEP
 }process_Bcu;
 /* Child system includes */
+
+//=======================================================================
+/* Child system includes */
+#define SOH_MDLREF_HIDE_CHILD_
 #include "SOH.h"
+#define SOC_MDLREF_HIDE_CHILD_
 #include "SOC.h"
+#define BLC_MDLREF_HIDE_CHILD_
 #include "BLC.h"
+#define SFM_MDLREF_HIDE_CHILD_
+
+extern uint16_T Time;
+
+/* Includes for objects with custom storage classes. */
+#include "BCUCal.h"
+#include "BCUDisp.h"
 
 /* Macros for accessing real-time model data structure */
 #ifndef rtmGetErrorStatus
@@ -49,136 +66,16 @@ typedef enum
 #define rtmGetErrorStatusPointer(rtm)  ((const char_T **)(&((rtm)->errorStatus)))
 #endif
 
-/* Block states (default storage) for system '<Root>' */
-typedef struct {
-  MdlrefDW_SOH_T SOH_InstanceData;     /* '<Root>/SOH' */
-  MdlrefDW_SOC_T SOC_InstanceData;     /* '<Root>/SOC' */
-  MdlrefDW_BLC_T BLC_InstanceData;     /* '<Root>/BLC' */
-} DW_BCU_T;
-
 /* Real-time Model Data Structure */
 struct tag_RTM_BCU_T {
   const char_T *errorStatus;
 };
 
-/* Block states (default storage) */
-extern DW_BCU_T BCU_DW;
-
 /* Model entry point functions */
 extern void BCU_initialize(void);
 extern void BCU_step(void);
 extern void BCU_terminate(void);
 
-/* Exported data declaration */
-
-/* Declaration for custom storage class: ExportToFile */
-extern uint16_T blcv_Q_reqCpEi[28];    /* '<Root>/blcv_Q_reqCpEi' */
-
-/* ������������ ��ȡ�������飩�� */
-extern uint16_T blcv_Q_reqCpEo[28];    /* '<Root>/BLC' */
-
-/* ������������ д���������飩�� */
-extern uint32_T blcv_Q_totalCpEi[28];  /* '<Root>/blcv_Q_totalCpEi' */
-
-/* �ۼƾ������� ��ȡ�������飩�� */
-extern uint32_T blcv_Q_totalCpEo[28];  /* '<Root>/BLC' */
-
-/* �ۼƾ������� д���������飩�� */
-extern boolean_T blcv_flg_excute[28];  /* '<Root>/BLC' */
-
-/* ����ִ�������־λ �����飩 */
-extern int16_T ihd_I_curr;             /* '<Root>/ihd_I_curr' */
-
-/* ��ذ������� */
-extern int16_T ihd_T_bdtemp;           /* '<Root>/Constant' */
-extern int16_T ihd_T_modTMax;          /* '<Root>/ihd_T_modTMax' */
-
-/* ģ���¶���� */
-extern int16_T ihd_T_modTMin;          /* '<Root>/ihd_T_modTMin' */
-
-/* ģ���¶���С */
-extern uint16_T ihd_V_cellUAvrg;       /* '<Root>/ihd_V_cellUAvrg' */
-
-/* ��ص����ѹƽ���� */
-extern uint16_T ihd_V_cellUMax;        /* '<Root>/ihd_V_cellUMax' */
-
-/* ��ص����ѹ��� */
-extern uint16_T ihd_V_cellUMin;        /* '<Root>/ihd_V_cellUMin' */
-
-/* ��ص����ѹ��С�� */
-extern uint8_T ihd_st_fault;           /* '<Root>/ihd_st_fault' */
-
-/* ���ϵȼ� */
-extern uint8_T ihd_st_workStat;        /* '<Root>/ihd_st_workStat' */
-
-/* ��ع���״̬�� */
-extern uint32_T ihd_tm_parkTime;       /* '<Root>/ihd_tm_packTime' */
-
-/* פ��ʱ�䣻 */
-extern int16_T ihv_T_modT[6];          /* '<Root>/ihv_T_modT' */
-
-/* ģ���¶ȣ����飩 */
-extern uint16_T ihv_V_cellU[28];       /* '<Root>/ihv_V_cellU' */
-
-/* ��ص����ѹ�����飩�� */
-extern uint16_T socd_pct_ahSoc;        /* '<Root>/SOC' */
-
-/* ��ʱSOC�� */
-extern uint16_T socd_pct_battSoc;      /* '<Root>/SOC' */
-
-/* �����ʵSOC�� */
-extern uint16_T socd_pct_battSocEi;    /* '<Root>/socd_pct_battSocEi' */
-
-/* �����ʵSOC ��ȡ���� */
-extern uint16_T socd_pct_battSocEo;    /* '<Root>/SOC' */
-
-/* �����ʵSOC д������ */
-extern uint16_T socd_pct_bcuSoc;       /* '<Root>/SOC' */
-
-/* �����ʾSOC�� */
-extern uint16_T socd_pct_bcuSocEi;     /* '<Root>/socd_pct_bcuSocEi' */
-
-/* �����ʾSOC��ȡ���� */
-extern uint16_T socd_pct_bcuSocEo;     /* '<Root>/SOC' */
-
-/* �����ʾSOCд������ */
-extern uint16_T sohd_Q_chrgEi;         /* '<Root>/sohd_Q_chrgEi ' */
-
-/* ����������ȡ���� */
-extern uint16_T sohd_Q_chrgEo;         /* '<Root>/SOH' */
-
-/* ������������� */
-extern boolean_T sohd_flg_chrgEndEi;   /* '<Root>/sohd_flg_chrgEndEi ' */
-
-/* ��������־λ��ȡ���� */
-extern boolean_T sohd_flg_chrgEndEo;   /* '<Root>/SOH' */
-
-/* ��������־λд������ */
-extern uint16_T sohd_pct_bcuSoh;       /* '<Root>/SOH' */
-
-/* ���SOH�� */
-extern uint16_T sohd_tm_chrgStartStatEi;/* '<Root>/sohd_tm_chrgStartStatEi ' */
-
-/* ���ǰ����ʱ���ȡ���� */
-extern uint16_T sohd_tm_chrgStartStatEo;/* '<Root>/SOH' */
-
-/* ���ǰ����ʱ��д������ */
-extern uint16_T sohv_Q_cellCap[28];    /* '<Root>/SOH' */
-
-/* ������������� */
-extern uint16_T sohv_Q_packCapArrEi[10];/* '<Root>/sohv_Q_packCapArrEi ' */
-
-/* 10���������������飩��ȡ���� */
-extern uint16_T sohv_Q_packCapArrEo[10];/* '<Root>/SOH' */
-
-/* 10���������������飩д������ */
-extern uint16_T sohv_V_chrgStartStatEi[28];/* '<Root>/sohv_V_chrgStartStatEi ' */
-
-/* ��翪ʼʱ�̵ĵ����ѹ�����飩��ȡ���� */
-extern uint16_T sohv_V_chrgStartStatEo[28];/* '<Root>/SOH' */
-
-/* ��翪ʼʱ�̵ĵ����ѹ�����飩д������ */
-
 /* Real-time Model object */
 extern RT_MODEL_BCU_T *const BCU_M;
 

inc/BCU1.h

@@ -0,0 +1,214 @@
+/*
+ * File: BCU.h
+ *
+ * Code generated for Simulink model 'BCU'.
+ *
+ * Model version                  : 1.13
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Thu Aug 12 17:54:42 2021
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: Intel->x86-64 (Windows64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef RTW_HEADER_BCU_h_
+#define RTW_HEADER_BCU_h_
+#ifndef BCU_COMMON_INCLUDES_
+#define BCU_COMMON_INCLUDES_
+#include "rtwtypes.h"
+#include "commontypedef.h"
+#include "AppSignal.h"
+#include "zero_crossing_types.h"
+#endif                                 /* BCU_COMMON_INCLUDES_ */
+
+#include "BCU_types.h"
+#define PROC_BCU_TASK_STACK_SIZE           (2048)
+typedef enum
+{
+    PROCESS_STATE_INIT = 0,
+    PROCESS_STATE_IDLE,
+    PROCESS_STATE_WORK,
+    PROCESS_STATE_SLEEP
+}process_Bcu;
+/* Child system includes */
+#include "SOH.h"
+#include "SOC.h"
+#include "BLC.h"
+
+/* Macros for accessing real-time model data structure */
+#ifndef rtmGetErrorStatus
+#define rtmGetErrorStatus(rtm)         ((rtm)->errorStatus)
+#endif
+
+#ifndef rtmSetErrorStatus
+#define rtmSetErrorStatus(rtm, val)    ((rtm)->errorStatus = (val))
+#endif
+
+#ifndef rtmGetErrorStatusPointer
+#define rtmGetErrorStatusPointer(rtm)  ((const char_T **)(&((rtm)->errorStatus)))
+#endif
+
+/* Block states (default storage) for system '<Root>' */
+typedef struct {
+  MdlrefDW_SOH_T SOH_InstanceData;     /* '<Root>/SOH' */
+  MdlrefDW_SOC_T SOC_InstanceData;     /* '<Root>/SOC' */
+  MdlrefDW_BLC_T BLC_InstanceData;     /* '<Root>/BLC' */
+} DW_BCU_T;
+
+/* Real-time Model Data Structure */
+struct tag_RTM_BCU_T {
+  const char_T *errorStatus;
+};
+
+/* Block states (default storage) */
+extern DW_BCU_T BCU_DW;
+
+/* Model entry point functions */
+extern void BCU_initialize(void);
+extern void BCU_step(void);
+extern void BCU_terminate(void);
+
+/* Exported data declaration */
+
+/* Declaration for custom storage class: ExportToFile */
+extern uint16_T blcv_Q_reqCpEi[28];    /* '<Root>/blcv_Q_reqCpEi' */
+
+/* ������������ ��ȡ�������飩�� */
+extern uint16_T blcv_Q_reqCpEo[28];    /* '<Root>/BLC' */
+
+/* ������������ д���������飩�� */
+extern uint32_T blcv_Q_totalCpEi[28];  /* '<Root>/blcv_Q_totalCpEi' */
+
+/* �ۼƾ������� ��ȡ�������飩�� */
+extern uint32_T blcv_Q_totalCpEo[28];  /* '<Root>/BLC' */
+
+/* �ۼƾ������� д���������飩�� */
+extern boolean_T blcv_flg_excute[28];  /* '<Root>/BLC' */
+
+/* ����ִ�������־λ �����飩 */
+extern int16_T ihd_I_curr;             /* '<Root>/ihd_I_curr' */
+
+/* ��ذ������� */
+extern int16_T ihd_T_bdtemp;           /* '<Root>/Constant' */
+extern int16_T ihd_T_modTMax;          /* '<Root>/ihd_T_modTMax' */
+
+/* ģ���¶���� */
+extern int16_T ihd_T_modTMin;          /* '<Root>/ihd_T_modTMin' */
+
+/* ģ���¶���С */
+extern uint16_T ihd_V_cellUAvrg;       /* '<Root>/ihd_V_cellUAvrg' */
+
+/* ��ص����ѹƽ���� */
+extern uint16_T ihd_V_cellUMax;        /* '<Root>/ihd_V_cellUMax' */
+
+/* ��ص����ѹ��� */
+extern uint16_T ihd_V_cellUMin;        /* '<Root>/ihd_V_cellUMin' */
+
+/* ��ص����ѹ��С�� */
+extern uint8_T ihd_st_fault;           /* '<Root>/ihd_st_fault' */
+
+/* ���ϵȼ� */
+extern uint8_T ihd_st_workStat;        /* '<Root>/ihd_st_workStat' */
+
+/* ��ع���״̬�� */
+extern uint32_T ihd_tm_parkTime;       /* '<Root>/ihd_tm_packTime' */
+
+/* פ��ʱ�䣻 */
+extern int16_T ihv_T_modT[6];          /* '<Root>/ihv_T_modT' */
+
+/* ģ���¶ȣ����飩 */
+extern uint16_T ihv_V_cellU[28];       /* '<Root>/ihv_V_cellU' */
+
+/* ��ص����ѹ�����飩�� */
+extern uint16_T socd_pct_ahSoc;        /* '<Root>/SOC' */
+
+/* ��ʱSOC�� */
+extern uint16_T socd_pct_battSoc;      /* '<Root>/SOC' */
+
+/* �����ʵSOC�� */
+extern uint16_T socd_pct_battSocEi;    /* '<Root>/socd_pct_battSocEi' */
+
+/* �����ʵSOC ��ȡ���� */
+extern uint16_T socd_pct_battSocEo;    /* '<Root>/SOC' */
+
+/* �����ʵSOC д������ */
+extern uint16_T socd_pct_bcuSoc;       /* '<Root>/SOC' */
+
+/* �����ʾSOC�� */
+extern uint16_T socd_pct_bcuSocEi;     /* '<Root>/socd_pct_bcuSocEi' */
+
+/* �����ʾSOC��ȡ���� */
+extern uint16_T socd_pct_bcuSocEo;     /* '<Root>/SOC' */
+
+extern uint16_T  socd_pct_ekfSoc;			  
+extern boolean_T socd_flg_EEsave;	   
+
+
+/* �����ʾSOCд������ */
+extern uint16_T sohd_Q_chrgEi;         /* '<Root>/sohd_Q_chrgEi ' */
+
+/* ����������ȡ���� */
+extern uint16_T sohd_Q_chrgEo;         /* '<Root>/SOH' */
+
+/* ������������� */
+extern boolean_T sohd_flg_chrgEndEi;   /* '<Root>/sohd_flg_chrgEndEi ' */
+
+/* ��������־λ��ȡ���� */
+extern boolean_T sohd_flg_chrgEndEo;   /* '<Root>/SOH' */
+
+/* ��������־λд������ */
+extern uint16_T sohd_pct_bcuSoh;       /* '<Root>/SOH' */
+
+/* ���SOH�� */
+extern uint16_T sohd_tm_chrgStartStatEi;/* '<Root>/sohd_tm_chrgStartStatEi ' */
+
+/* ���ǰ����ʱ���ȡ���� */
+extern uint16_T sohd_tm_chrgStartStatEo;/* '<Root>/SOH' */
+
+/* ���ǰ����ʱ��д������ */
+extern uint16_T sohv_Q_cellCap[28];    /* '<Root>/SOH' */
+
+/* ������������� */
+extern uint16_T sohv_Q_packCapArrEi[10];/* '<Root>/sohv_Q_packCapArrEi ' */
+
+/* 10���������������飩��ȡ���� */
+extern uint16_T sohv_Q_packCapArrEo[10];/* '<Root>/SOH' */
+
+/* 10���������������飩д������ */
+extern uint16_T sohv_V_chrgStartStatEi[28];/* '<Root>/sohv_V_chrgStartStatEi ' */
+
+/* ��翪ʼʱ�̵ĵ����ѹ�����飩��ȡ���� */
+extern uint16_T sohv_V_chrgStartStatEo[28];/* '<Root>/SOH' */
+extern uint16_T sleepTime;
+
+
+/* ��翪ʼʱ�̵ĵ����ѹ�����飩д������ */
+
+/* Real-time Model object */
+extern RT_MODEL_BCU_T *const BCU_M;
+
+/*-
+ * The generated code includes comments that allow you to trace directly
+ * back to the appropriate location in the model.  The basic format
+ * is <system>/block_name, where system is the system number (uniquely
+ * assigned by Simulink) and block_name is the name of the block.
+ *
+ * Use the MATLAB hilite_system command to trace the generated code back
+ * to the model.  For example,
+ *
+ * hilite_system('<S3>')    - opens system 3
+ * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
+ *
+ * Here is the system hierarchy for this model
+ *
+ * '<Root>' : 'BCU'
+ */
+#endif                                 /* RTW_HEADER_BCU_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

inc/BCUCal.h

@@ -0,0 +1,73 @@
+/*
+ * File: BCUCal.h
+ *
+ * Code generated for Simulink model 'SOC'.
+ *
+ * Model version                  : 1.32
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Wed Aug 18 17:24:25 2021
+ */
+
+#ifndef RTW_HEADER_BCUCal_h_
+#define RTW_HEADER_BCUCal_h_
+#include "rtwtypes.h"
+
+/* Const memory section */
+/* Exported data declaration */
+/* Declaration for custom storage class: Const */
+extern const uint16_T blc_V_low;
+extern const uint16_T blcc_R_esr;
+extern const int16_T blcc_T_close;
+extern const int16_T blcc_T_open;
+extern const uint16_T cmnc_Q_ratedCp;
+
+/* 额定容量； */
+extern const uint8_T cmnc_num_cellUnum;
+
+/* 电压采样点个数； */
+extern const uint16_T cmnc_tm_parkTime;
+
+/* 静置时间阈值； */
+extern const uint16_T cmnm_F_polar[13];
+
+/* 放电OCV-SOC的SOC数组； */
+extern const uint16_T cmnm_R_ohm[13];
+
+/* 放电OCV-SOC的SOC数组； */
+extern const uint16_T cmnm_R_polar[13];
+
+/* 放电OCV-SOC的SOC数组； */
+extern const uint16_T cmnm_V_ocv[13];
+
+/* 放电OCV-SOC的OCV数组； */
+extern const uint16_T cmnm_pct_soc[13];
+
+/* 放电OCV-SOC的SOC数组； */
+extern const uint16_T socc_V_chrgFulV;
+
+/* 充满电的截至电压； */
+extern const uint16_T socc_pct_battSocLow;
+
+/* SOC下限值； */
+extern const uint16_T socc_pct_battSocUp;
+
+/* SOC上限值； */
+extern const int16_T socm_I_chrgCor[4];
+
+/* 充电CCV对应的电流数据； */
+extern const int16_T socm_I_disChrgCor[3];
+
+/* 放电CCV对应的电流数据； */
+extern const uint16_T socm_V_chrgCor[4];
+
+/* 充电CCV对应的电压； */
+extern const uint16_T socm_V_disChrgCor[3];
+
+/* 放电CCV对应的电压； */
+#endif                                 /* RTW_HEADER_BCUCal_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

inc/BCUDisp.h

@@ -0,0 +1,153 @@
+/*
+ * File: BCUDisp.h
+ *
+ * Code generated for Simulink model 'BLC'.
+ *
+ * Model version                  : 1.42
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Fri Aug 20 13:49:38 2021
+ */
+
+#ifndef RTW_HEADER_BCUDisp_h_
+#define RTW_HEADER_BCUDisp_h_
+#include "rtwtypes.h"
+
+/* Exported data declaration */
+/* Declaration for custom storage class: ExportToFile */
+
+/* 电池工作状态； */
+extern real_T OCV;
+extern uint16_T SOC1[28];
+extern uint16_T SOC2[28];
+extern real_T UL;
+extern real_T Up;
+extern uint16_T sohv_Q_cellCapArrEo[28];
+extern uint16_T sohv_Q_cellCapArrEi[28];
+extern real_T deltaU;
+
+
+/* 电池单体电压最大； */
+/* 电池单体电压（数组）； */
+extern uint16_T blcn_Q_impleCp[28];
+extern uint16_T blcv_Q_reqCpEi[28];
+
+/* 均衡需求容量 读取量（数组）； */
+extern uint16_T blcv_Q_reqCpEo[28];
+
+/* 均衡需求容量 写入量（数组）； */
+extern uint32_T blcv_Q_totalCpEi[28];
+
+/* 累计均衡容量 读取量（数组）； */
+extern uint32_T blcv_Q_totalCpEo[28];
+
+/* 累计均衡容量 写入量（数组）； */
+extern boolean_T blcv_flg_excute[28];
+
+/* 均衡执行请求标志位 （数组） */
+extern uint16_T deltaSoc[28];
+extern int16_T ihd_I_curr;
+
+/* 电池包电流； */
+extern int16_T ihd_T_bdtemp;
+extern int16_T ihd_T_modTMax;
+
+/* 模组温度最大 */
+extern int16_T ihd_T_modTMin;
+
+/* 模组温度最小 */
+extern uint16_T ihd_V_cellUAvrg;
+
+/* 电池单体电压平均； */
+extern uint16_T ihd_V_cellUMax;
+
+/* 电池单体电压最大； */
+extern uint16_T ihd_V_cellUMin;
+
+/* 电池单体电压最小； */
+extern uint8_T ihd_st_fault;
+
+/* 故障等级 */
+extern uint8_T ihd_st_workStat;
+
+/* 电池工作状态； */
+extern uint32_T ihd_tm_parkTime;
+
+/* 驻车时间； */
+extern int16_T ihv_T_modT[6];
+
+/* 模组温度（数组） */
+extern uint16_T ihv_V_cellU[28];
+
+/* 电池单体电压（数组）； */
+extern real_T k1;
+extern real_T k2;
+
+/* 电池单体电压最小； */
+extern uint16_T minChrg[28];
+extern uint16_T minDischrg[28];
+extern boolean_T socd_flg_EEsave;
+extern uint16_T socd_pct_ahSoc;
+
+/* 安时SOC； */
+extern uint16_T socd_pct_battSoc;
+
+/* 电池真实SOC； */
+extern uint16_T socd_pct_battSocEi;
+
+/* 电池真实SOC 读取量； */
+extern uint16_T socd_pct_battSocEo;
+
+/* 电池真实SOC 写入量； */
+extern uint16_T socd_pct_bcuSoc;
+
+/* 电池显示SOC； */
+extern uint16_T socd_pct_bcuSocEi;
+
+/* 电池显示SOC读取量； */
+extern uint16_T socd_pct_bcuSocEo;
+
+/* 电池显示SOC写入量； */
+extern uint16_T socd_pct_ekfSoc;
+
+/* EKFSOC； */
+extern uint16_T sohd_Q_chrgEi;
+
+/* 充入容量读取量； */
+extern uint16_T sohd_Q_chrgEo;
+
+/* 充入容量写入量； */
+extern boolean_T sohd_flg_chrgEndEi;
+
+/* 充电结束标志位读取量； */
+extern boolean_T sohd_flg_chrgEndEo;
+
+/* 充电结束标志位写入量； */
+extern uint16_T sohd_pct_bcuSoh;
+
+/* 电池SOH； */
+extern uint16_T sohd_tm_chrgStartStatEi;
+
+/* 充电前静置时间读取量； */
+extern uint16_T sohd_tm_chrgStartStatEo;
+
+/* 充电前静置时间写入量； */
+extern uint16_T sohv_Q_cellCap[28];
+extern uint16_T sohv_Q_packCapArrEi[10];
+
+/* 10次整包容量（数组）读取量； */
+extern uint16_T sohv_Q_packCapArrEo[10];
+
+/* 10次整包容量（数组）写入量； */
+extern uint16_T sohv_V_chrgStartStatEi[28];
+
+/* 充电开始时刻的单体电压（数组）读取量； */
+extern uint16_T sohv_V_chrgStartStatEo[28];
+
+/* 充电开始时刻的单体电压（数组）写入量； */
+#endif                                 /* RTW_HEADER_BCUDisp_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

inc/BCU_private.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'BCU'.
  *
- * Model version                  : 1.13
+ * Model version                  : 1.19
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:42 2021
+ * C/C++ source code generated on : Fri Aug 20 13:49:53 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -16,6 +16,7 @@
 #ifndef RTW_HEADER_BCU_private_h_
 #define RTW_HEADER_BCU_private_h_
 #include "rtwtypes.h"
+#include "zero_crossing_types.h"
 #ifndef UCHAR_MAX
 #include <limits.h>
 #endif

inc/BCU_types.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'BCU'.
  *
- * Model version                  : 1.13
+ * Model version                  : 1.19
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:42 2021
+ * C/C++ source code generated on : Fri Aug 20 13:49:53 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)

inc/BLC.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'BLC'.
  *
- * Model version                  : 1.24
+ * Model version                  : 1.42
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:13 2021
+ * C/C++ source code generated on : Fri Aug 20 13:55:26 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -23,18 +23,26 @@
 
 #include "BLC_types.h"
 
+/* Includes for objects with custom storage classes. */
+#include "BCUCal.h"
+#include "BCUDisp.h"
+
 /* Block signals for model 'BLC' */
+#ifndef BLC_MDLREF_HIDE_CHILD_
+
 typedef struct {
-  uint32_T Merge1[28];                 /* '<S2>/Merge1' */
+  uint32_T blcv_Q_totalCpEE_Merge[28]; /* '<S2>/blcv_Q_totalCpEE_Merge' */
   uint16_T blcn_Q_reqCpNow_j[28];      /* '<S6>/Chart' */
-  uint16_T blcn_Q_impleCp[28];         /* '<S5>/Chart' */
-  uint16_T Merge[28];                  /* '<S2>/Merge' */
+  uint16_T blcv_Q_reqCpEE_Merge[28];   /* '<S2>/blcv_Q_reqCpEE_Merge' */
   boolean_T blcn_flg_stop[28];         /* '<S7>/Chart' */
-  boolean_T blcn_flg_blcable[28];      /* '<S5>/Chart' */
   boolean_T blcn_flg_pause[28];        /* '<S4>/Chart' */
 } B_BLC_c_T;
 
+#endif                                 /*BLC_MDLREF_HIDE_CHILD_*/
+
 /* Block states (default storage) for model 'BLC' */
+#ifndef BLC_MDLREF_HIDE_CHILD_
+
 typedef struct {
   uint32_T blcCap[28];                 /* '<S5>/Chart' */
   uint16_T UnitDelay_DSTATE[28];       /* '<S1>/Unit Delay' */
@@ -46,71 +54,52 @@ typedef struct {
   boolean_T FristFlg_b;                /* '<S6>/Chart' */
 } DW_BLC_f_T;
 
+#endif                                 /*BLC_MDLREF_HIDE_CHILD_*/
+
+#ifndef BLC_MDLREF_HIDE_CHILD_
+
 /* Real-time Model Data Structure */
 struct tag_RTM_BLC_T {
   const char_T **errorStatus;
 };
 
+#endif                                 /*BLC_MDLREF_HIDE_CHILD_*/
+
+#ifndef BLC_MDLREF_HIDE_CHILD_
+
 typedef struct {
-  B_BLC_c_T rtb;
-  DW_BLC_f_T rtdw;
   RT_MODEL_BLC_T rtm;
 } MdlrefDW_BLC_T;
 
-/* Model reference registration function */
-extern void BLC_initialize(const char_T **rt_errorStatus, RT_MODEL_BLC_T *const
-  BLC_M);
-extern void BLC_Init(DW_BLC_f_T *localDW);
-extern void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW);
-
-/* Exported data declaration */
+#endif                                 /*BLC_MDLREF_HIDE_CHILD_*/
 
-/* Declaration for custom storage class: ExportToFile */
-extern uint16_T blcv_Q_reqCpEi[28];
+extern void BLC_Init(void);
+extern void BLC(void);
 
-/* 均衡需求容量 读取量（数组）； */
-extern uint16_T blcv_Q_reqCpEo[28];    /* '<S5>/Add' */
-
-/* 均衡需求容量 写入量（数组）； */
-extern uint32_T blcv_Q_totalCpEi[28];
-
-/* 累计均衡容量 读取量（数组）； */
-extern uint32_T blcv_Q_totalCpEo[28];  /* '<S5>/Add1' */
+/* Model reference registration function */
+extern void BLC_initialize(const char_T **rt_errorStatus);
 
-/* 累计均衡容量 写入量（数组）； */
-extern boolean_T blcv_flg_excute[28];  /* '<S5>/Chart' */
+#ifndef BLC_MDLREF_HIDE_CHILD_
 
-/* 均衡执行请求标志位 （数组） */
-extern int16_T ihd_T_bdtemp;
-extern uint16_T ihd_V_cellUMin;
+extern MdlrefDW_BLC_T BLC_MdlrefDW;
 
-/* 电池单体电压最小； */
-extern uint8_T ihd_st_fault;
+#endif                                 /*BLC_MDLREF_HIDE_CHILD_*/
 
-/* 故障等级 */
-extern uint32_T ihd_tm_parkTime;
+#ifndef BLC_MDLREF_HIDE_CHILD_
 
-/* 驻车时间； */
-extern uint16_T ihv_V_cellU[28];
+/* Block signals (default storage) */
+extern B_BLC_c_T BLC_B;
 
-/* 电池单体电压（数组）； */
-extern uint16_T sohv_Q_cellCap[28];
+/* Block states (default storage) */
+extern DW_BLC_f_T BLC_DW;
 
-/* 充入容量写入量； */
+#endif                                 /*BLC_MDLREF_HIDE_CHILD_*/
 
 /*-
  * These blocks were eliminated from the model due to optimizations:
  *
- * Block '<S1>/Display' : Unused code path elimination
- * Block '<S1>/Display1' : Unused code path elimination
- * Block '<S1>/Display2' : Unused code path elimination
- * Block '<S1>/Display3' : Unused code path elimination
- * Block '<S1>/Display4' : Unused code path elimination
- * Block '<S3>/Display' : Unused code path elimination
  * Block '<S5>/Display' : Unused code path elimination
  * Block '<S5>/Scope' : Unused code path elimination
- * Block '<S6>/Display' : Unused code path elimination
- * Block '<S6>/Display2' : Unused code path elimination
  */
 
 /*-

inc/BLC_private.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'BLC'.
  *
- * Model version                  : 1.24
+ * Model version                  : 1.42
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:13 2021
+ * C/C++ source code generated on : Fri Aug 20 13:55:26 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -80,22 +80,6 @@ preprocessor word size checks.
 #ifndef rtmSetErrorStatusPointer
 #define rtmSetErrorStatusPointer(rtm, val) ((rtm)->errorStatus = (val))
 #endif
-
-extern const uint16_T rtCP_pooled_neXCembKU1Do[13];
-extern const uint16_T rtCP_pooled_Pg3wA7d95Txu[13];
-
-#define rtCP_uDLookupTable1_bp01Data   rtCP_pooled_neXCembKU1Do  /* Expression: cmnm_V_ocv
-                                                                  * Referenced by: '<S6>/1-D Lookup Table1'
-                                                                  */
-#define rtCP_uDLookupTable_bp01Data    rtCP_pooled_neXCembKU1Do  /* Expression: cmnm_V_ocv
-                                                                  * Referenced by: '<S6>/1-D Lookup Table'
-                                                                  */
-#define rtCP_uDLookupTable1_tableData  rtCP_pooled_Pg3wA7d95Txu  /* Expression: cmnm_pct_soc
-                                                                  * Referenced by: '<S6>/1-D Lookup Table1'
-                                                                  */
-#define rtCP_uDLookupTable_tableData   rtCP_pooled_Pg3wA7d95Txu  /* Expression: cmnm_pct_soc
-                                                                  * Referenced by: '<S6>/1-D Lookup Table'
-                                                                  */
 #endif                                 /* RTW_HEADER_BLC_private_h_ */
 
 /*

inc/BLC_types.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'BLC'.
  *
- * Model version                  : 1.24
+ * Model version                  : 1.42
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:13 2021
+ * C/C++ source code generated on : Fri Aug 20 13:55:26 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)

inc/SOC.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'SOC'.
  *
- * Model version                  : 1.24
+ * Model version                  : 1.41
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:23 2021
+ * C/C++ source code generated on : Thu Sep  2 15:51:15 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -19,127 +19,148 @@
 #ifndef SOC_COMMON_INCLUDES_
 #define SOC_COMMON_INCLUDES_
 #include "rtwtypes.h"
+#include "zero_crossing_types.h"
 #endif                                 /* SOC_COMMON_INCLUDES_ */
 
 #include "SOC_types.h"
 
+/* Includes for objects with custom storage classes. */
+#include "BCUCal.h"
+#include "BCUDisp.h"
+
 /* Block signals for model 'SOC' */
+#ifndef SOC_MDLREF_HIDE_CHILD_
+
 typedef struct {
+  uint16_T in;                         /* '<S54>/in' */
+  uint16_T in_c;                       /* '<S50>/in' */
   uint16_T Switch;                     /* '<S5>/Switch' */
   uint16_T Divide;                     /* '<S5>/Divide' */
-  uint16_T Merge;                      /* '<S2>/Merge' */
-  uint16_T Merge1;                     /* '<S2>/Merge1' */
+  uint16_T socn_pct_bcuSocEE_Merge;    /* '<S2>/socn_pct_bcuSocEE_Merge' */
 } B_SOC_c_T;
 
+#endif                                 /*SOC_MDLREF_HIDE_CHILD_*/
+
 /* Block states (default storage) for model 'SOC' */
+#ifndef SOC_MDLREF_HIDE_CHILD_
+
 typedef struct {
-  real_T UnitDelay_DSTATE;             /* '<S11>/Unit Delay' */
-  real_T UnitDelay_DSTATE_c;           /* '<S14>/Unit Delay' */
-  real_T UnitDelay1_DSTATE[4];         /* '<S11>/Unit Delay1' */
-  real_T UnitDelay_DSTATE_o;           /* '<S12>/Unit Delay' */
-  real_T UnitDelay_DSTATE_e;           /* '<S23>/Unit Delay' */
-  real_T UnitDelay1_DSTATE_j[4];       /* '<S12>/Unit Delay1' */
-  real_T UnitDelay2_DSTATE;            /* '<S12>/Unit Delay2' */
-  real_T UnitDelay1_DSTATE_h;          /* '<S23>/Unit Delay1' */
-  real_T UnitDelay3_DSTATE[2];         /* '<S12>/Unit Delay3' */
-  real_T UnitDelay2_DSTATE_k;          /* '<S11>/Unit Delay2' */
-  real_T UnitDelay1_DSTATE_l;          /* '<S14>/Unit Delay1' */
-  real_T UnitDelay3_DSTATE_g[2];       /* '<S11>/Unit Delay3' */
+  real_T SOCk_Delay_DSTATE;            /* '<S12>/SOCk_Delay' */
+  real_T P_Delay_DSTATE[4];            /* '<S12>/P_Delay' */
+  real_T SOCk_Delay_DSTATE_e;          /* '<S13>/SOCk_Delay' */
+  real_T P_Delay_DSTATE_m[4];          /* '<S13>/P_Delay' */
+  real_T Up_Delay_DSTATE;              /* '<S13>/Up_Delay' */
+  real_T Up_Delay_DSTATE_h;            /* '<S12>/Up_Delay' */
   real_T Divide_DWORK4;                /* '<S17>/Divide' */
-  real_T Divide_DWORK4_c;              /* '<S26>/Divide' */
-  int32_T UnitDelay1_DSTATE_b;         /* '<S4>/Unit Delay1' */
-  uint16_T UnitDelay_DSTATE_i;         /* '<S33>/Unit Delay' */
-  uint16_T UnitDelay_DSTATE_l;         /* '<S45>/Unit Delay' */
-  uint16_T UnitDelay_DSTATE_h;         /* '<S43>/Unit Delay' */
+  real_T Divide_DWORK4_h;              /* '<S26>/Divide' */
+  int32_T curr_integral_Delay_DSTATE;  /* '<S4>/curr_integral_Delay  ' */
+  uint16_T Time_Delay_DSTATE;          /* '<S35>/Time_Delay' */
+  uint16_T Time_Delay_DSTATE_f;        /* '<S55>/Time_Delay' */
+  uint16_T Time_Delay_DSTATE_n;        /* '<S52>/Time_Delay' */
+  uint16_T Time_Delay_DSTATE_h;        /* '<S53>/Time_Delay' */
   uint16_T UnitDelay7_DSTATE;          /* '<S6>/Unit Delay7' */
-  uint16_T UnitDelay3_DSTATE_l;        /* '<S6>/Unit Delay3' */
-  uint16_T UnitDelay6_DSTATE;          /* '<S6>/Unit Delay6' */
-  uint16_T UnitDelay4_DSTATE;          /* '<S6>/Unit Delay4' */
-  uint16_T UnitDelay3_DSTATE_p;        /* '<S32>/Unit Delay3' */
-  uint16_T UnitDelay1_DSTATE_o;        /* '<S44>/Unit Delay1' */
-  uint16_T UnitDelay1_DSTATE_i;        /* '<S42>/Unit Delay1' */
-  uint16_T UnitDelay_DSTATE_b;         /* '<S41>/Unit Delay' */
-  uint8_T UnitDelay_DSTATE_m;          /* '<S38>/Unit Delay' */
-  uint8_T UnitDelay1_DSTATE_a;         /* '<S6>/Unit Delay1' */
-  uint8_T UnitDelay2_DSTATE_d;         /* '<S6>/Unit Delay2' */
-  boolean_T UnitDelay_DSTATE_et;       /* '<S1>/Unit Delay' */
-  boolean_T UnitDelay1_DSTATE_c;       /* '<S1>/Unit Delay1' */
-  boolean_T UnitDelay_DSTATE_j;        /* '<S6>/Unit Delay' */
-  boolean_T UnitDelay5_DSTATE;         /* '<S6>/Unit Delay5' */
-  boolean_T UnitDelay_DSTATE_cu;       /* '<S44>/Unit Delay' */
-  boolean_T UnitDelay_DSTATE_iz;       /* '<S42>/Unit Delay' */
+  uint16_T socd_pct_battSoc0_Delay_DSTATE;/* '<S6>/socd_pct_battSoc0_Delay' */
+  uint16_T socd_pct_bcusocDelay_DSTATE;/* '<S6>/socd_pct_bcusocDelay' */
+  uint16_T socd_pct_bcuSoc0_Delay_DSTATE;/* '<S6>/socd_pct_bcuSoc0_Delay' */
+  uint16_T socd_flg_EEsave_Delay_DSTATE;/* '<S32>/socd_flg_EEsave_Delay' */
+  uint16_T socn_pct_estsoc_Delay_DSTATE;/* '<S51>/socn_pct_estsoc_Delay' */
+  uint16_T socfit_Delay_DSTATE;        /* '<S42>/socfit_Delay' */
+  uint16_T socfit_Delay_DSTATE_n;      /* '<S37>/socfit_Delay' */
+  uint8_T Time_Delay_DSTATE_c;         /* '<S47>/Time_Delay' */
+  uint8_T ihd_st_chrgSta_Delay_DSTATE; /* '<S6>/ihd_st_chrgSta_Delay' */
+  boolean_T FirstDelay_DSTATE;         /* '<S1>/FirstDelay' */
+  boolean_T Frist_DSTATE;              /* '<S14>/Frist' */
+  boolean_T Frist_DSTATE_h;            /* '<S23>/Frist' */
+  boolean_T First_Delay_DSTATE;        /* '<S6>/First_Delay' */
+  boolean_T First_Delay1_DSTATE;       /* '<S6>/First_Delay1' */
+  boolean_T lowFLg_Delay_DSTATE;       /* '<S49>/lowFLg_Delay' */
+  boolean_T overFlg_Delay_DSTATE;      /* '<S48>/overFlg_Delay' */
+  boolean_T fulFLg_Delay_DSTATE;       /* '<S48>/fulFLg_Delay' */
+  int8_T If_ActiveSubsystem;           /* '<S7>/If' */
+  int8_T If_ActiveSubsystem_p;         /* '<S6>/If' */
 } DW_SOC_f_T;
 
+#endif                                 /*SOC_MDLREF_HIDE_CHILD_*/
+
+/* Zero-crossing (trigger) state for model 'SOC' */
+#ifndef SOC_MDLREF_HIDE_CHILD_
+
+typedef struct {
+  ZCSigState Subsystem2_Trig_ZCE;      /* '<S49>/Subsystem2' */
+  ZCSigState Subsystem2_Trig_ZCE_k;    /* '<S48>/Subsystem2' */
+} ZCE_SOC_T;
+
+#endif                                 /*SOC_MDLREF_HIDE_CHILD_*/
+
+#ifndef SOC_MDLREF_HIDE_CHILD_
+
 /* Real-time Model Data Structure */
 struct tag_RTM_SOC_T {
   const char_T **errorStatus;
 };
 
+#endif                                 /*SOC_MDLREF_HIDE_CHILD_*/
+
+#ifndef SOC_MDLREF_HIDE_CHILD_
+
 typedef struct {
-  B_SOC_c_T rtb;
-  DW_SOC_f_T rtdw;
   RT_MODEL_SOC_T rtm;
 } MdlrefDW_SOC_T;
 
-/* Model reference registration function */
-extern void SOC_initialize(const char_T **rt_errorStatus, RT_MODEL_SOC_T *const
-  SOC_M);
-extern void SOC_MATLABFunction(real_T rtu_x, real_T *rty_y);
-extern void SOC_Init(DW_SOC_f_T *localDW);
-extern void SOC(B_SOC_c_T *localB, DW_SOC_f_T *localDW);
-
-/* Exported data declaration */
+#endif                                 /*SOC_MDLREF_HIDE_CHILD_*/
 
-/* Declaration for custom storage class: ExportToFile */
-extern int16_T ihd_I_curr;
+extern void SOC_Init(void);
+extern void SOC_Disable(void);
+extern void SOC(void);
 
-/* 电池包电流； */
-extern uint16_T ihd_V_cellUAvrg;
-
-/* 电池单体电压平均； */
-extern uint16_T ihd_V_cellUMax;
-
-/* 电池单体电压最大； */
-extern uint16_T ihd_V_cellUMin;
+/* Model reference registration function */
+extern void SOC_initialize(const char_T **rt_errorStatus);
 
-/* 电池单体电压最小； */
-extern uint8_T ihd_st_workStat;
+#ifndef SOC_MDLREF_HIDE_CHILD_
 
-/* 电池工作状态； */
-extern uint32_T ihd_tm_parkTime;
+extern void SOC_MATLABFunction(real_T rtu_x, real_T *rty_y);
+extern void SOC_IfActionSubsystem(uint16_T rtu_SOC, uint16_T rtu_SOCfit,
+  uint16_T *rty_Out1, uint16_T rtp_m);
+extern void SOC_IfActionSubsystem1(uint16_T rtu_SOC, uint16_T rtu_SOCfit,
+  uint16_T *rty_Out1);
 
-/* 驻车时间； */
-extern uint16_T socd_pct_ahSoc;        /* '<S4>/Saturation' */
+#endif                                 /*SOC_MDLREF_HIDE_CHILD_*/
 
-/* 安时SOC； */
-extern uint16_T socd_pct_battSoc;      /* '<S6>/Signal Conversion' */
+#ifndef SOC_MDLREF_HIDE_CHILD_
 
-/* 电池真实SOC； */
-extern uint16_T socd_pct_battSocEi;
+extern MdlrefDW_SOC_T SOC_MdlrefDW;
 
-/* 电池真实SOC 读取量； */
-extern uint16_T socd_pct_battSocEo;    /* '<S6>/Signal Conversion1' */
+#endif                                 /*SOC_MDLREF_HIDE_CHILD_*/
 
-/* 电池真实SOC 写入量； */
-extern uint16_T socd_pct_bcuSoc;       /* '<S6>/Signal Conversion2' */
+#ifndef SOC_MDLREF_HIDE_CHILD_
 
-/* 电池显示SOC； */
-extern uint16_T socd_pct_bcuSocEi;
+/* Block signals (default storage) */
+extern B_SOC_c_T SOC_B;
 
-/* 电池显示SOC读取量； */
-extern uint16_T socd_pct_bcuSocEo;     /* '<S6>/Signal Conversion3' */
+/* Block states (default storage) */
+extern DW_SOC_f_T SOC_DW;
 
-/* 电池显示SOC写入量； */
-extern uint16_T sohd_pct_bcuSoh;
+/* Previous zero-crossings (trigger) states */
+extern ZCE_SOC_T SOC_PrevZCX;
 
-/* 电池SOH； */
+#endif                                 /*SOC_MDLREF_HIDE_CHILD_*/
 
 /*-
  * These blocks were eliminated from the model due to optimizations:
  *
- * Block '<S18>/Display' : Unused code path elimination
- * Block '<S27>/Display' : Unused code path elimination
+ * Block '<S12>/Scope' : Unused code path elimination
+ * Block '<S12>/Signal Conversion' : Unused code path elimination
+ * Block '<S29>/Display' : Unused code path elimination
  * Block '<S4>/Scope' : Unused code path elimination
+ * Block '<S6>/Scope' : Unused code path elimination
+ * Block '<S6>/Scope1' : Unused code path elimination
+ * Block '<S6>/Scope2' : Unused code path elimination
+ * Block '<S33>/Scope' : Unused code path elimination
+ * Block '<S33>/Scope1' : Unused code path elimination
+ * Block '<S33>/Scope2' : Unused code path elimination
+ * Block '<S33>/Scope3' : Unused code path elimination
+ * Block '<S12>/Signal Conversion1' : Eliminate redundant signal conversion block
+ * Block '<S37>/Signal Conversion' : Eliminate redundant signal conversion block
  */
 
 /*-
@@ -162,46 +183,56 @@ extern uint16_T sohd_pct_bcuSoh;
  * '<S3>'   : 'SOC/SOC/EKF'
  * '<S4>'   : 'SOC/SOC/EKF1'
  * '<S5>'   : 'SOC/SOC/Inti_correct'
- * '<S6>'   : 'SOC/SOC/bcusoc'
+ * '<S6>'   : 'SOC/SOC/bcuSoc'
  * '<S7>'   : 'SOC/SOC/estSOC'
  * '<S8>'   : 'SOC/SOC/EEcheck/If Action Subsystem'
  * '<S9>'   : 'SOC/SOC/EEcheck/If Action Subsystem1'
  * '<S10>'  : 'SOC/SOC/EEcheck/Subsystem'
- * '<S11>'  : 'SOC/SOC/EKF/EFKmax'
- * '<S12>'  : 'SOC/SOC/EKF/EFKmin'
- * '<S13>'  : 'SOC/SOC/EKF/EKF'
- * '<S14>'  : 'SOC/SOC/EKF/EFKmax/初始'
- * '<S15>'  : 'SOC/SOC/EKF/EFKmax/协方差更新'
- * '<S16>'  : 'SOC/SOC/EKF/EFKmax/协方差计算'
- * '<S17>'  : 'SOC/SOC/EKF/EFKmax/卡尔曼增益'
- * '<S18>'  : 'SOC/SOC/EKF/EFKmax/状态修正'
- * '<S19>'  : 'SOC/SOC/EKF/EFKmax/状态更新'
- * '<S20>'  : 'SOC/SOC/EKF/EFKmax/电池参数'
- * '<S21>'  : 'SOC/SOC/EKF/EFKmax/矩阵计算'
- * '<S22>'  : 'SOC/SOC/EKF/EFKmax/矩阵计算/MATLAB Function'
- * '<S23>'  : 'SOC/SOC/EKF/EFKmin/初始'
- * '<S24>'  : 'SOC/SOC/EKF/EFKmin/协方差更新'
- * '<S25>'  : 'SOC/SOC/EKF/EFKmin/协方差计算'
- * '<S26>'  : 'SOC/SOC/EKF/EFKmin/卡尔曼增益'
- * '<S27>'  : 'SOC/SOC/EKF/EFKmin/状态修正'
- * '<S28>'  : 'SOC/SOC/EKF/EFKmin/状态更新'
- * '<S29>'  : 'SOC/SOC/EKF/EFKmin/电池参数'
- * '<S30>'  : 'SOC/SOC/EKF/EFKmin/矩阵计算'
- * '<S31>'  : 'SOC/SOC/EKF/EFKmin/矩阵计算/MATLAB Function'
- * '<S32>'  : 'SOC/SOC/bcusoc/SOCfit'
- * '<S33>'  : 'SOC/SOC/bcusoc/keep'
- * '<S34>'  : 'SOC/SOC/bcusoc/SOCfit/If Action Subsystem'
- * '<S35>'  : 'SOC/SOC/bcusoc/SOCfit/If Action Subsystem1'
- * '<S36>'  : 'SOC/SOC/bcusoc/SOCfit/If Action Subsystem2'
- * '<S37>'  : 'SOC/SOC/estSOC/If Action Subsystem2'
- * '<S38>'  : 'SOC/SOC/estSOC/Time++'
- * '<S39>'  : 'SOC/SOC/estSOC/chrgCCV'
- * '<S40>'  : 'SOC/SOC/estSOC/disChrgCCV'
- * '<S41>'  : 'SOC/SOC/estSOC/chrgCCV/Subsystem'
- * '<S42>'  : 'SOC/SOC/estSOC/chrgCCV/Subsystem2'
- * '<S43>'  : 'SOC/SOC/estSOC/chrgCCV/keep'
- * '<S44>'  : 'SOC/SOC/estSOC/disChrgCCV/Subsystem2'
- * '<S45>'  : 'SOC/SOC/estSOC/disChrgCCV/keep'
+ * '<S11>'  : 'SOC/SOC/EKF/EKF'
+ * '<S12>'  : 'SOC/SOC/EKF/Subsystem'
+ * '<S13>'  : 'SOC/SOC/EKF/Subsystem1'
+ * '<S14>'  : 'SOC/SOC/EKF/Subsystem/初始'
+ * '<S15>'  : 'SOC/SOC/EKF/Subsystem/协方差更新'
+ * '<S16>'  : 'SOC/SOC/EKF/Subsystem/协方差计算'
+ * '<S17>'  : 'SOC/SOC/EKF/Subsystem/卡尔曼增益'
+ * '<S18>'  : 'SOC/SOC/EKF/Subsystem/状态修正'
+ * '<S19>'  : 'SOC/SOC/EKF/Subsystem/状态更新'
+ * '<S20>'  : 'SOC/SOC/EKF/Subsystem/电池参数'
+ * '<S21>'  : 'SOC/SOC/EKF/Subsystem/矩阵计算'
+ * '<S22>'  : 'SOC/SOC/EKF/Subsystem/矩阵计算/MATLAB Function'
+ * '<S23>'  : 'SOC/SOC/EKF/Subsystem1/初始'
+ * '<S24>'  : 'SOC/SOC/EKF/Subsystem1/协方差更新'
+ * '<S25>'  : 'SOC/SOC/EKF/Subsystem1/协方差计算'
+ * '<S26>'  : 'SOC/SOC/EKF/Subsystem1/卡尔曼增益'
+ * '<S27>'  : 'SOC/SOC/EKF/Subsystem1/状态修正'
+ * '<S28>'  : 'SOC/SOC/EKF/Subsystem1/状态更新'
+ * '<S29>'  : 'SOC/SOC/EKF/Subsystem1/电池参数'
+ * '<S30>'  : 'SOC/SOC/EKF/Subsystem1/矩阵计算'
+ * '<S31>'  : 'SOC/SOC/EKF/Subsystem1/矩阵计算/MATLAB Function'
+ * '<S32>'  : 'SOC/SOC/bcuSoc/Subsystem1'
+ * '<S33>'  : 'SOC/SOC/bcuSoc/Subsystem2'
+ * '<S34>'  : 'SOC/SOC/bcuSoc/Subsystem3'
+ * '<S35>'  : 'SOC/SOC/bcuSoc/keep2'
+ * '<S36>'  : 'SOC/SOC/bcuSoc/Subsystem2/LookUP'
+ * '<S37>'  : 'SOC/SOC/bcuSoc/Subsystem2/SOCfit'
+ * '<S38>'  : 'SOC/SOC/bcuSoc/Subsystem2/SOCfit/If Action Subsystem'
+ * '<S39>'  : 'SOC/SOC/bcuSoc/Subsystem2/SOCfit/If Action Subsystem1'
+ * '<S40>'  : 'SOC/SOC/bcuSoc/Subsystem2/SOCfit/If Action Subsystem2'
+ * '<S41>'  : 'SOC/SOC/bcuSoc/Subsystem3/LookUP1'
+ * '<S42>'  : 'SOC/SOC/bcuSoc/Subsystem3/SOCfit1'
+ * '<S43>'  : 'SOC/SOC/bcuSoc/Subsystem3/SOCfit1/If Action Subsystem'
+ * '<S44>'  : 'SOC/SOC/bcuSoc/Subsystem3/SOCfit1/If Action Subsystem1'
+ * '<S45>'  : 'SOC/SOC/bcuSoc/Subsystem3/SOCfit1/If Action Subsystem2'
+ * '<S46>'  : 'SOC/SOC/estSOC/If Action Subsystem2'
+ * '<S47>'  : 'SOC/SOC/estSOC/Time++'
+ * '<S48>'  : 'SOC/SOC/estSOC/chrgCCV'
+ * '<S49>'  : 'SOC/SOC/estSOC/disChrgCCV'
+ * '<S50>'  : 'SOC/SOC/estSOC/chrgCCV/Subsystem2'
+ * '<S51>'  : 'SOC/SOC/estSOC/chrgCCV/inc'
+ * '<S52>'  : 'SOC/SOC/estSOC/chrgCCV/keep'
+ * '<S53>'  : 'SOC/SOC/estSOC/chrgCCV/keep1'
+ * '<S54>'  : 'SOC/SOC/estSOC/disChrgCCV/Subsystem2'
+ * '<S55>'  : 'SOC/SOC/estSOC/disChrgCCV/keep'
  */
 #endif                                 /* RTW_HEADER_SOC_h_ */
 

inc/SOC_private.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'SOC'.
  *
- * Model version                  : 1.24
+ * Model version                  : 1.34
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:23 2021
+ * C/C++ source code generated on : Fri Aug 20 11:42:20 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -16,6 +16,7 @@
 #ifndef RTW_HEADER_SOC_private_h_
 #define RTW_HEADER_SOC_private_h_
 #include "rtwtypes.h"
+#include "zero_crossing_types.h"
 #ifndef UCHAR_MAX
 #include <limits.h>
 #endif
@@ -80,91 +81,6 @@ preprocessor word size checks.
 #ifndef rtmSetErrorStatusPointer
 #define rtmSetErrorStatusPointer(rtm, val) ((rtm)->errorStatus = (val))
 #endif
-
-extern const real_T rtCP_pooled_2yqyybnjRkAg[13];
-extern const real_T rtCP_pooled_Hq33G5zkPPgT[13];
-extern const real_T rtCP_pooled_4Oms9Dl3djxK[13];
-extern const real_T rtCP_pooled_ygMHmGen2OIb[13];
-extern const real_T rtCP_pooled_6SXVB9Ymnskr[13];
-extern const int16_T rtCP_pooled_5IPKsXGYnKyg[4];
-extern const int16_T rtCP_pooled_9BXJPVWA4BJI[3];
-extern const uint16_T rtCP_pooled_neXCembKU1Do[13];
-extern const uint16_T rtCP_pooled_qce4hcBQN8fp[4];
-extern const uint16_T rtCP_pooled_J4vL4j1Fk1zG[3];
-extern const uint16_T rtCP_pooled_Pg3wA7d95Txu[13];
-
-#define rtCP_SOCRp_tableData           rtCP_pooled_2yqyybnjRkAg  /* Computed Parameter: rtCP_SOCRp_tableData
-                                                                  * Referenced by: '<S20>/SOC-Rp'
-                                                                  */
-#define rtCP_SOCRp_bp01Data            rtCP_pooled_Hq33G5zkPPgT  /* Computed Parameter: rtCP_SOCRp_bp01Data
-                                                                  * Referenced by: '<S20>/SOC-Rp'
-                                                                  */
-#define rtCP_SOCC_tableData            rtCP_pooled_4Oms9Dl3djxK  /* Computed Parameter: rtCP_SOCC_tableData
-                                                                  * Referenced by: '<S20>/SOC-C'
-                                                                  */
-#define rtCP_SOCC_bp01Data             rtCP_pooled_Hq33G5zkPPgT  /* Computed Parameter: rtCP_SOCC_bp01Data
-                                                                  * Referenced by: '<S20>/SOC-C'
-                                                                  */
-#define rtCP_SOCRp_tableData_b         rtCP_pooled_2yqyybnjRkAg  /* Computed Parameter: rtCP_SOCRp_tableData_b
-                                                                  * Referenced by: '<S29>/SOC-Rp'
-                                                                  */
-#define rtCP_SOCRp_bp01Data_a          rtCP_pooled_Hq33G5zkPPgT  /* Computed Parameter: rtCP_SOCRp_bp01Data_a
-                                                                  * Referenced by: '<S29>/SOC-Rp'
-                                                                  */
-#define rtCP_SOCC_tableData_l          rtCP_pooled_4Oms9Dl3djxK  /* Computed Parameter: rtCP_SOCC_tableData_l
-                                                                  * Referenced by: '<S29>/SOC-C'
-                                                                  */
-#define rtCP_SOCC_bp01Data_o           rtCP_pooled_Hq33G5zkPPgT  /* Computed Parameter: rtCP_SOCC_bp01Data_o
-                                                                  * Referenced by: '<S29>/SOC-C'
-                                                                  */
-#define rtCP_SOCOCV_tableData          rtCP_pooled_ygMHmGen2OIb  /* Computed Parameter: rtCP_SOCOCV_tableData
-                                                                  * Referenced by: '<S29>/SOC-OCV'
-                                                                  */
-#define rtCP_SOCOCV_bp01Data           rtCP_pooled_Hq33G5zkPPgT  /* Computed Parameter: rtCP_SOCOCV_bp01Data
-                                                                  * Referenced by: '<S29>/SOC-OCV'
-                                                                  */
-#define rtCP_SOCRo_tableData           rtCP_pooled_6SXVB9Ymnskr  /* Computed Parameter: rtCP_SOCRo_tableData
-                                                                  * Referenced by: '<S29>/SOC-Ro'
-                                                                  */
-#define rtCP_SOCRo_bp01Data            rtCP_pooled_Hq33G5zkPPgT  /* Computed Parameter: rtCP_SOCRo_bp01Data
-                                                                  * Referenced by: '<S29>/SOC-Ro'
-                                                                  */
-#define rtCP_SOCOCV_tableData_c        rtCP_pooled_ygMHmGen2OIb  /* Computed Parameter: rtCP_SOCOCV_tableData_c
-                                                                  * Referenced by: '<S20>/SOC-OCV'
-                                                                  */
-#define rtCP_SOCOCV_bp01Data_a         rtCP_pooled_Hq33G5zkPPgT  /* Computed Parameter: rtCP_SOCOCV_bp01Data_a
-                                                                  * Referenced by: '<S20>/SOC-OCV'
-                                                                  */
-#define rtCP_SOCRo_tableData_n         rtCP_pooled_6SXVB9Ymnskr  /* Computed Parameter: rtCP_SOCRo_tableData_n
-                                                                  * Referenced by: '<S20>/SOC-Ro'
-                                                                  */
-#define rtCP_SOCRo_bp01Data_c          rtCP_pooled_Hq33G5zkPPgT  /* Computed Parameter: rtCP_SOCRo_bp01Data_c
-                                                                  * Referenced by: '<S20>/SOC-Ro'
-                                                                  */
-#define rtCP_uDLookupTable_bp01Data    rtCP_pooled_5IPKsXGYnKyg  /* Expression: socm_I_chrgCor
-                                                                  * Referenced by: '<S39>/1-D Lookup Table'
-                                                                  */
-#define rtCP_uDLookupTable_bp01Data_g  rtCP_pooled_9BXJPVWA4BJI  /* Expression: socm_I_disChrgCor
-                                                                  * Referenced by: '<S40>/1-D Lookup Table'
-                                                                  */
-#define rtCP_OCVSOC_bp01Data           rtCP_pooled_neXCembKU1Do  /* Expression: cmnm_V_ocv
-                                                                  * Referenced by: '<S8>/OCV-SOC'
-                                                                  */
-#define rtCP_OCVSOC_bp01Data_b         rtCP_pooled_neXCembKU1Do  /* Expression: cmnm_V_ocv
-                                                                  * Referenced by: '<S5>/OCV-SOC'
-                                                                  */
-#define rtCP_uDLookupTable_tableData   rtCP_pooled_qce4hcBQN8fp  /* Expression: socm_V_chrgCor
-                                                                  * Referenced by: '<S39>/1-D Lookup Table'
-                                                                  */
-#define rtCP_uDLookupTable_tableData_b rtCP_pooled_J4vL4j1Fk1zG  /* Expression: socm_V_disChrgCor
-                                                                  * Referenced by: '<S40>/1-D Lookup Table'
-                                                                  */
-#define rtCP_OCVSOC_tableData          rtCP_pooled_Pg3wA7d95Txu  /* Expression: cmnm_pct_soc
-                                                                  * Referenced by: '<S8>/OCV-SOC'
-                                                                  */
-#define rtCP_OCVSOC_tableData_b        rtCP_pooled_Pg3wA7d95Txu  /* Expression: cmnm_pct_soc
-                                                                  * Referenced by: '<S5>/OCV-SOC'
-                                                                  */
 #endif                                 /* RTW_HEADER_SOC_private_h_ */
 
 /*

inc/SOC_types.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'SOC'.
  *
- * Model version                  : 1.24
+ * Model version                  : 1.34
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:23 2021
+ * C/C++ source code generated on : Fri Aug 20 11:42:20 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)

inc/SOH.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'SOH'.
  *
- * Model version                  : 1.14
+ * Model version                  : 1.31
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:32 2021
+ * C/C++ source code generated on : Thu Sep  2 11:40:39 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -22,98 +22,93 @@
 
 #include "SOH_types.h"
 
+/* Includes for objects with custom storage classes. */
+#include "BCUCal.h"
+#include "BCUDisp.h"
+
 /* Block signals for model 'SOH' */
+#ifndef SOH_MDLREF_HIDE_CHILD_
+
 typedef struct {
-  uint16_T Divide1[28];                /* '<S13>/Divide1' */
+  uint16_T Divide;                     /* '<S9>/Divide' */
+  uint16_T d[28];                      /* '<S13>/d' */
   uint16_T Add2;                       /* '<S13>/Add2' */
   uint16_T Qavrg;                      /* '<S3>/Chart' */
   uint16_T sohn_Q_packCapArrEo[10];    /* '<S3>/Chart' */
-  uint16_T Divide1_c;                  /* '<S11>/Divide1' */
+  uint16_T Divide1;                    /* '<S11>/Divide1' */
 } B_SOH_c_T;
 
+#endif                                 /*SOH_MDLREF_HIDE_CHILD_*/
+
 /* Block states (default storage) for model 'SOH' */
+#ifndef SOH_MDLREF_HIDE_CHILD_
+
 typedef struct {
-  int32_T UnitDelay_DSTATE;            /* '<S11>/Unit Delay' */
-  uint16_T UnitDelay2_DSTATE;          /* '<S6>/Unit Delay2' */
+  int32_T curr_icr_Delay_DSTATE;       /* '<S11>/curr_icr_Delay' */
+  uint16_T Time_Delay_DSTATE;          /* '<S10>/Time_Delay' */
+  uint16_T sohd_tm_chrgStartSta_Delay_DSTA;/* '<S6>/sohd_tm_chrgStartSta_Delay' */
   uint16_T UnitDelay1_DSTATE;          /* '<S7>/Unit Delay1' */
-  uint16_T UnitDelay_DSTATE_o;         /* '<S9>/Unit Delay' */
-  uint16_T UnitDelay1_DSTATE_i[28];    /* '<S6>/Unit Delay1' */
-  uint8_T UnitDelay_DSTATE_e;          /* '<S6>/Unit Delay' */
+  uint16_T Time_Delay_DSTATE_k;        /* '<S9>/Time_Delay' */
+  uint16_T sohv_V_chrgStartEo_Delay_DSTATE[28];/* '<S6>/sohv_V_chrgStartEo_Delay' */
+  uint8_T UnitDelay_DSTATE;            /* '<S6>/Unit Delay' */
   uint8_T UnitDelay_DSTATE_g;          /* '<S7>/Unit Delay' */
-  uint8_T UnitDelay_DSTATE_gh;         /* '<S8>/Unit Delay' */
-  boolean_T UnitDelay3_DSTATE;         /* '<S10>/Unit Delay3' */
-  boolean_T UnitDelay1_DSTATE_m;       /* '<S4>/Unit Delay1' */
-  boolean_T flg;                       /* '<S3>/Chart' */
+  boolean_T First_Delay_DSTATE;        /* '<S4>/First_Delay' */
+  boolean_T UnitDelay_DSTATE_e;        /* '<S3>/Unit Delay' */
+  boolean_T UnitDelay1_DSTATE_j;       /* '<S6>/Unit Delay1' */
+  boolean_T Fflg;                      /* '<S3>/Chart' */
+  boolean_T ResettableSubsystem_MODE;  /* '<S8>/Resettable Subsystem' */
+  boolean_T ResettableSubsystem_MODE_i;/* '<S6>/Resettable Subsystem' */
 } DW_SOH_f_T;
 
+#endif                                 /*SOH_MDLREF_HIDE_CHILD_*/
+
+#ifndef SOH_MDLREF_HIDE_CHILD_
+
 /* Real-time Model Data Structure */
 struct tag_RTM_SOH_T {
   const char_T **errorStatus;
 };
 
+#endif                                 /*SOH_MDLREF_HIDE_CHILD_*/
+
+#ifndef SOH_MDLREF_HIDE_CHILD_
+
 typedef struct {
-  B_SOH_c_T rtb;
-  DW_SOH_f_T rtdw;
   RT_MODEL_SOH_T rtm;
 } MdlrefDW_SOH_T;
 
-/* Model reference registration function */
-extern void SOH_initialize(const char_T **rt_errorStatus, RT_MODEL_SOH_T *const
-  SOH_M);
-extern void SOH_Init(DW_SOH_f_T *localDW);
-extern void SOH(B_SOH_c_T *localB, DW_SOH_f_T *localDW);
-
-/* Exported data declaration */
-
-/* Declaration for custom storage class: ExportToFile */
-extern int16_T ihd_I_curr;
-
-/* 电池包电流； */
-extern uint8_T ihd_st_workStat;
+#endif                                 /*SOH_MDLREF_HIDE_CHILD_*/
 
-/* 电池工作状态； */
-extern uint32_T ihd_tm_parkTime;
+extern void SOH_Init(void);
+extern void SOH_Disable(void);
+extern void SOH(void);
 
-/* 驻车时间； */
-extern uint16_T ihv_V_cellU[28];
-
-/* 电池单体电压（数组）； */
-extern uint16_T sohd_Q_chrgEi;
-
-/* 充入容量读取量； */
-extern uint16_T sohd_Q_chrgEo;         /* '<S8>/Resettable Subsystem' */
-
-/* 充入容量写入量； */
-extern boolean_T sohd_flg_chrgEndEi;
+/* Model reference registration function */
+extern void SOH_initialize(const char_T **rt_errorStatus);
 
-/* 充电结束标志位读取量； */
-extern boolean_T sohd_flg_chrgEndEo;   /* '<S7>/Switch' */
+#ifndef SOH_MDLREF_HIDE_CHILD_
 
-/* 充电结束标志位写入量； */
-extern uint16_T sohd_pct_bcuSoh;       /* '<S3>/Saturation' */
+extern void SOH_ArrMin_Init(uint16_T *rty_minCap);
+extern void SOH_ArrMin(const uint16_T rtu_sohn_Q_cellCap[28], uint8_T rtu_N,
+  uint16_T *rty_minCap);
 
-/* 电池SOH； */
-extern uint16_T sohd_tm_chrgStartStatEi;
+#endif                                 /*SOH_MDLREF_HIDE_CHILD_*/
 
-/* 充电前静置时间读取量； */
-extern uint16_T sohd_tm_chrgStartStatEo;/* '<S6>/Saturation' */
+#ifndef SOH_MDLREF_HIDE_CHILD_
 
-/* 充电前静置时间写入量； */
-extern uint16_T sohv_Q_cellCap[28];    /* '<S3>/Subsystem' */
+extern MdlrefDW_SOH_T SOH_MdlrefDW;
 
-/* 充入容量写入量； */
-extern uint16_T sohv_Q_packCapArrEi[10];
+#endif                                 /*SOH_MDLREF_HIDE_CHILD_*/
 
-/* 10次整包容量（数组）读取量； */
-extern uint16_T sohv_Q_packCapArrEo[10];/* '<S3>/Chart' */
+#ifndef SOH_MDLREF_HIDE_CHILD_
 
-/* 10次整包容量（数组）写入量； */
-extern uint16_T sohv_V_chrgStartStatEi[28];
+/* Block signals (default storage) */
+extern B_SOH_c_T SOH_B;
 
-/* 充电开始时刻的单体电压（数组）读取量； */
-extern uint16_T sohv_V_chrgStartStatEo[28];/* '<S6>/Switch' */
+/* Block states (default storage) */
+extern DW_SOH_f_T SOH_DW;
 
-/* 充电开始时刻的单体电压（数组）写入量； */
+#endif                                 /*SOH_MDLREF_HIDE_CHILD_*/
 
 /*-
  * These blocks were eliminated from the model due to optimizations:
@@ -138,22 +133,26 @@ extern uint16_T sohv_V_chrgStartStatEo[28];/* '<S6>/Switch' */
  * Here is the system hierarchy for this model
  *
  * '<Root>' : 'SOH'
- * '<S1>'   : 'SOH/Subsystem4'
- * '<S2>'   : 'SOH/Subsystem4/Chrgmation'
- * '<S3>'   : 'SOH/Subsystem4/Conut'
- * '<S4>'   : 'SOH/Subsystem4/CountEn'
- * '<S5>'   : 'SOH/Subsystem4/EEDeal'
- * '<S6>'   : 'SOH/Subsystem4/Chrgmation/ChrgBe'
- * '<S7>'   : 'SOH/Subsystem4/Chrgmation/ChrgEnd'
- * '<S8>'   : 'SOH/Subsystem4/Chrgmation/Chrging'
- * '<S9>'   : 'SOH/Subsystem4/Chrgmation/ChrgBe/Resettable Subsystem'
- * '<S10>'  : 'SOH/Subsystem4/Chrgmation/ChrgBe/keep'
- * '<S11>'  : 'SOH/Subsystem4/Chrgmation/Chrging/Resettable Subsystem'
- * '<S12>'  : 'SOH/Subsystem4/Conut/Chart'
- * '<S13>'  : 'SOH/Subsystem4/Conut/Subsystem'
- * '<S14>'  : 'SOH/Subsystem4/EEDeal/EECkeck'
- * '<S15>'  : 'SOH/Subsystem4/EEDeal/FalseAction'
- * '<S16>'  : 'SOH/Subsystem4/EEDeal/TureAction'
+ * '<S1>'   : 'SOH/SOH'
+ * '<S2>'   : 'SOH/SOH/Chrgmation'
+ * '<S3>'   : 'SOH/SOH/Conut'
+ * '<S4>'   : 'SOH/SOH/CountEn'
+ * '<S5>'   : 'SOH/SOH/EEDeal'
+ * '<S6>'   : 'SOH/SOH/Chrgmation/ChrgBe'
+ * '<S7>'   : 'SOH/SOH/Chrgmation/ChrgEnd'
+ * '<S8>'   : 'SOH/SOH/Chrgmation/Chrging'
+ * '<S9>'   : 'SOH/SOH/Chrgmation/ChrgBe/Resettable Subsystem'
+ * '<S10>'  : 'SOH/SOH/Chrgmation/ChrgBe/keep2'
+ * '<S11>'  : 'SOH/SOH/Chrgmation/Chrging/Resettable Subsystem'
+ * '<S12>'  : 'SOH/SOH/Conut/Chart'
+ * '<S13>'  : 'SOH/SOH/Conut/Subsystem'
+ * '<S14>'  : 'SOH/SOH/Conut/Subsystem/Subsystem'
+ * '<S15>'  : 'SOH/SOH/Conut/Subsystem/Subsystem1'
+ * '<S16>'  : 'SOH/SOH/Conut/Subsystem/Subsystem/ArrMin'
+ * '<S17>'  : 'SOH/SOH/Conut/Subsystem/Subsystem1/ArrMin'
+ * '<S18>'  : 'SOH/SOH/EEDeal/EECkeck'
+ * '<S19>'  : 'SOH/SOH/EEDeal/FalseAction'
+ * '<S20>'  : 'SOH/SOH/EEDeal/TureAction'
  */
 #endif                                 /* RTW_HEADER_SOH_h_ */
 

inc/SOH_private.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'SOH'.
  *
- * Model version                  : 1.14
+ * Model version                  : 1.23
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:32 2021
+ * C/C++ source code generated on : Fri Aug 20 11:42:33 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -80,22 +80,6 @@ preprocessor word size checks.
 #ifndef rtmSetErrorStatusPointer
 #define rtmSetErrorStatusPointer(rtm, val) ((rtm)->errorStatus = (val))
 #endif
-
-extern const uint16_T rtCP_pooled_neXCembKU1Do[13];
-extern const uint16_T rtCP_pooled_Pg3wA7d95Txu[13];
-
-#define rtCP_uDLookupTable1_bp01Data   rtCP_pooled_neXCembKU1Do  /* Expression: cmnm_V_ocv
-                                                                  * Referenced by: '<S13>/1-D Lookup Table1'
-                                                                  */
-#define rtCP_uDLookupTable2_bp01Data   rtCP_pooled_neXCembKU1Do  /* Expression: cmnm_V_ocv
-                                                                  * Referenced by: '<S13>/1-D Lookup Table2'
-                                                                  */
-#define rtCP_uDLookupTable1_tableData  rtCP_pooled_Pg3wA7d95Txu  /* Expression: cmnm_pct_soc
-                                                                  * Referenced by: '<S13>/1-D Lookup Table1'
-                                                                  */
-#define rtCP_uDLookupTable2_tableData  rtCP_pooled_Pg3wA7d95Txu  /* Expression: cmnm_pct_soc
-                                                                  * Referenced by: '<S13>/1-D Lookup Table2'
-                                                                  */
 #endif                                 /* RTW_HEADER_SOH_private_h_ */
 
 /*

inc/SOH_types.h

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'SOH'.
  *
- * Model version                  : 1.14
+ * Model version                  : 1.23
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:32 2021
+ * C/C++ source code generated on : Fri Aug 20 11:42:33 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)

inc/div_repeat_u32.h

@@ -0,0 +1,24 @@
+/*
+ * File: div_repeat_u32.h
+ *
+ * Code generated for Simulink model 'SOC'.
+ *
+ * Model version                  : 1.41
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Wed Sep  1 15:06:09 2021
+ */
+
+#ifndef RTW_HEADER_div_repeat_u32_h_
+#define RTW_HEADER_div_repeat_u32_h_
+#include "rtwtypes.h"
+
+extern uint32_T div_repeat_u32(uint32_T numerator, uint32_T denominator,
+  uint32_T nRepeatSub);
+
+#endif                                 /* RTW_HEADER_div_repeat_u32_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

inc/div_su32.h

@@ -0,0 +1,23 @@
+/*
+ * File: div_su32.h
+ *
+ * Code generated for Simulink model 'BLC'.
+ *
+ * Model version                  : 1.33
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Wed Aug 18 14:01:45 2021
+ */
+
+#ifndef RTW_HEADER_div_su32_h_
+#define RTW_HEADER_div_su32_h_
+#include "rtwtypes.h"
+
+extern int32_T div_su32(uint32_T numerator, uint32_T denominator);
+
+#endif                                 /* RTW_HEADER_div_su32_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

inc/div_uus32_sat.h

@@ -0,0 +1,23 @@
+/*
+ * File: div_uus32_sat.h
+ *
+ * Code generated for Simulink model 'SFM'.
+ *
+ * Model version                  : 1.37
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Tue Aug 24 16:20:45 2021
+ */
+
+#ifndef RTW_HEADER_div_uus32_sat_h_
+#define RTW_HEADER_div_uus32_sat_h_
+#include "rtwtypes.h"
+
+extern uint32_T div_uus32_sat(uint32_T numerator, int32_T denominator);
+
+#endif                                 /* RTW_HEADER_div_uus32_sat_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

inc/mul_s32_hiSR.h

@@ -0,0 +1,23 @@
+/*
+ * File: mul_s32_hiSR.h
+ *
+ * Code generated for Simulink model 'SFM'.
+ *
+ * Model version                  : 1.36
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Tue Aug 24 14:53:06 2021
+ */
+
+#ifndef RTW_HEADER_mul_s32_hiSR_h_
+#define RTW_HEADER_mul_s32_hiSR_h_
+#include "rtwtypes.h"
+
+extern int32_T mul_s32_hiSR(int32_T a, int32_T b, uint32_T aShift);
+
+#endif                                 /* RTW_HEADER_mul_s32_hiSR_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

inc/zero_crossing_types.h

@@ -0,0 +1,44 @@
+/*
+ * File: zero_crossing_types.h
+ *
+ * Code generated for Simulink model 'SOC'.
+ *
+ * Model version                  : 1.34
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Fri Aug 20 11:42:20 2021
+ */
+
+#ifndef ZERO_CROSSING_TYPES_H
+#define ZERO_CROSSING_TYPES_H
+#include "rtwtypes.h"
+
+/* Trigger directions: falling, either, and rising */
+typedef enum {
+  FALLING_ZERO_CROSSING = -1,
+  ANY_ZERO_CROSSING = 0,
+  RISING_ZERO_CROSSING = 1
+} ZCDirection;
+
+/* Previous state of a trigger signal */
+typedef uint8_T ZCSigState;
+
+/* Initial value of a trigger zero crossing signal */
+#define UNINITIALIZED_ZCSIG            0x03U
+#define NEG_ZCSIG                      0x02U
+#define POS_ZCSIG                      0x01U
+#define ZERO_ZCSIG                     0x00U
+
+/* Current state of a trigger signal */
+typedef enum {
+  FALLING_ZCEVENT = -1,
+  NO_ZCEVENT = 0,
+  RISING_ZCEVENT = 1
+} ZCEventType;
+
+#endif                                 /* ZERO_CROSSING_TYPES_H */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

src/AppFunc.c

@@ -1153,15 +1153,17 @@ static void setDefaultAppDataInfo(void)
 	AppDataInfo.RelayControl = 0;
 	AppDataInfo.BattLock = 0;
 	AppDataInfo.BattStolenFlag = 0;    
-	memset(&AppDataInfo.blcv_Q_totalCpE, 0x00, 28);          
-	memset(&AppDataInfo.blcv_Q_reqCpE, 0x00, 28);
+	memset(AppDataInfo.blcv_Q_totalCpE, 0x00, 28*sizeof(UINT32));          
+	memset(AppDataInfo.blcv_Q_reqCpE, 0x00, 28*sizeof(UINT16));
     AppDataInfo.socd_pct_bcuSocE = 0;            
     AppDataInfo.socd_pct_battSocE = 0;           
     AppDataInfo.sohd_tm_chrgStartStatE = 0;      
-    AppDataInfo.sohd_flg_chrgEndE = 0;            
-	memset(&AppDataInfo.sohv_V_chrgStartStatE, 0x00, 28);
-    AppDataInfo. sohd_Q_chrgE = 0;                
-	memset(&AppDataInfo.sohv_Q_packCapArrE, 300, 10);   
+    AppDataInfo.sohd_flg_chrgEndE = 0; 
+	AppDataInfo.sohv_Q_cellCapArrE[28];
+	memset(AppDataInfo.sohv_Q_cellCapArrE, 300, 28*sizeof(UINT16));
+	memset(AppDataInfo.sohv_V_chrgStartStatE, 0x00, 28*sizeof(UINT16));
+    AppDataInfo.sohd_Q_chrgE = 0;                
+	memset(AppDataInfo.sohv_Q_packCapArrE, 300, 10*sizeof(UINT16));   
     return;
 }
 /***********************************************************************************************************************

src/AppSignal.c

@@ -14,7 +14,7 @@ volatile BOOL NB_Fota_update_flag = FALSE;
 volatile BOOL BMS_Fota_update_flag = FALSE;
 volatile BOOL CanInterruptFlag = FALSE;
 
-
+UINT32 ErrFlg = FALSE;
 BOOL downloadReady = FALSE;   
 
 

src/AppTaskCan.c

@@ -117,7 +117,8 @@ static void CanTask()
 					{	
 						UDS_Service(CanRxMsg);
 						udsFlag = 0;
-					}			
+					}
+									
 				}
 				else
 				{
@@ -127,7 +128,7 @@ static void CanTask()
 				if(msgFlag == 1)
 				{
 					CanMsgTx1000ms();							
-				}	
+				}
 				if(delayconuter>=100 && msgFlag == 0)
 				{
 					delayconuter=0;

src/AppTaskMain.c

@@ -115,6 +115,10 @@ static void MainTask(void* arg)
                     appSetCFUN(0);
                     osDelay(1000);
                     EC_SystemReset();
+                }
+				if(AppDataInfo.appDataModify)
+                {
+                    SaveAppData();
                 }
                 break;
             }

src/AppTaskTcp.c

@@ -542,12 +542,15 @@ static void TcpDataInfoAssembleSend()
             }
         }
     }
-    if(send_counter%30==0)//调试信息暂时不发，需调整之后发送
+    if(send_counter%12==0)
     {
         DebugMsgtoTcpType DebugMsgInfo;
-        UINT16 BufferLen = 1000;
+        UINT16 BufferLen = 0;
+        UINT8 rbuf[100];
+		sprintf((char *)rbuf,"%2x",ErrFlg);
+		BufferLen = strlen(rbuf);
         SendBuffer = malloc(BufferLen+sizeof(DebugMsgInfo));
-        memset(SendBuffer+sizeof(DebugMsgInfo)-1, 0x41,BufferLen);
+        memcpy(SendBuffer+sizeof(DebugMsgInfo)-1, rbuf,BufferLen);
         appGetSystemTimeUtcSync(&TimeStracture);
         year=(TimeStracture.UTCtimer1&0xffff0000)>>16;
         month=(TimeStracture.UTCtimer1&0xff00)>>8;
@@ -578,12 +581,12 @@ static void TcpDataInfoAssembleSend()
         DebugMsgInfo.CRC = bcc_chk(SendBuffer, BufferLen+sizeof(DebugMsgInfo)-1);
         memcpy(SendBuffer+BufferLen+sizeof(DebugMsgInfo)-1,&DebugMsgInfo.CRC,1);
         len = tcpipConnectionSend(socContext.id, SendBuffer, BufferLen+sizeof(DebugMsgInfo), 0, 0, 0);
-        #ifdef USING_PRINTF
+        #ifdef USING_PRINTF1
             printf("DebugMsg-[%d]:\n",len);
-            for (int i = 0; i < BufferLen+sizeof(DebugMsgInfo); i++)
-            {
-                printf("%02x ",*(SendBuffer + i));
-            }
+            // for (int i = 0; i < BufferLen+sizeof(DebugMsgInfo); i++)
+            // {
+            //     printf("%02x ",*(SendBuffer + i));
+            // }
         #endif
         if(SendBuffer!=NULL)
         {
@@ -591,7 +594,7 @@ static void TcpDataInfoAssembleSend()
         }
         SendBuffer=NULL;
     }
-    if(FALSE)//调试信息暂时不发，需调整之后发送
+    if(send_counter==0)//调试信息暂时不发，需调整之后发送
     {
         DebugMsgtoTcpType DebugMsgInfo;
         UINT16 BufferLen = 0;

src/AppTaskUart.c

@@ -190,9 +190,14 @@ static void UartTask(void* arg)
                 #endif
                 UartRecvFlag = 0;
 				USARTdrv->PowerControl(ARM_POWER_LOW);
-                while (gProcess_app==LISTEN)
+                while (true)
                 {
                     osDelay(100);
+					if(gProcess_app==WORK)
+					{
+						 PROC_UART_STATE_SWITCH(PROCESS_UART_STATE_INTI);
+						 break;
+					}	
                 }
                 break;
             }
@@ -332,9 +337,6 @@ void Uart_Cmd_Control(QueueHandle_t UartWriteCmdHandle,UartWriteData_S UartWrite
 		UartWriteData.Data[0] = 0x00|(UartAnswerData.data[(0x1B+AppNVMData.BattCellCount + AppNVMData.BattTempCount + BMS_OTHER_TEMP)*2]);
 		UartWriteData.Data[1] = 0x02;
 		osMessageQueuePut(UartWriteCmdHandle,&UartWriteData,0,0);
-		#ifdef USING_PRINTF
-            printf("try to lock %d,%d,%d,%d\n",AppDataInfo.BattLock,(UartAnswerData.data[(0x1B+AppNVMData.BattCellCount + AppNVMData.BattTempCount + BMS_OTHER_TEMP)*2+1]),AppNVMData.BattCellCount,AppNVMData.BattTempCount);
-        #endif
 	}
 	else if (battWorkState ==0x00 && AppDataInfo.BattLock==FALSE && ((UartAnswerData.data[(0x1B+AppNVMData.BattCellCount + AppNVMData.BattTempCount + BMS_OTHER_TEMP)*2+1])&0x01)!=0x01 ) // try to unlock
 	{
@@ -342,9 +344,6 @@ void Uart_Cmd_Control(QueueHandle_t UartWriteCmdHandle,UartWriteData_S UartWrite
 		UartWriteData.Data[0] = 0x00|(UartAnswerData.data[(0x1B+AppNVMData.BattCellCount + AppNVMData.BattTempCount + BMS_OTHER_TEMP)*2]);
 		UartWriteData.Data[1] = 0x03;
 		osMessageQueuePut(UartWriteCmdHandle,&UartWriteData,0,0);
-		#ifdef USING_PRINTF
-            printf("try to unlock %d,%d,%d,%d\n",AppDataInfo.BattLock,(UartAnswerData.data[(0x1B+AppNVMData.BattCellCount + AppNVMData.BattTempCount + BMS_OTHER_TEMP)*2+1]),AppNVMData.BattCellCount,AppNVMData.BattTempCount);
-        #endif
 	}
 	if(AppDataInfo.RelayControl==TRUE && getbit((UartAnswerData.data[(0x09+AppNVMData.BattCellCount+AppNVMData.BattTempCount + BMS_OTHER_TEMP)*2+1]),0)==0x00)//继电器断开
 	{

src/BCU.c

@@ -1,11 +1,12 @@
+
 /*
  * File: BCU.c
  *
  * Code generated for Simulink model 'BCU'.
  *
- * Model version                  : 1.13
+ * Model version                  : 1.19
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:42 2021
+ * C/C++ source code generated on : Fri Aug 20 13:49:53 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -15,262 +16,221 @@
 
 #include "BCU.h"
 #include "BCU_private.h"
+
+
 static StaticTask_t                 gProcess_Bcu_Task_t;
 static UINT8                        gProcess_Bcu_TaskStack[PROC_BCU_TASK_STACK_SIZE];
 static osThreadId_t                 BcuTaskId = NULL;
 static process_Bcu 		    gProcess_Bcu_Task;
 #define PROC_BCU_STATE_SWITCH(a)  (gProcess_Bcu_Task = a)
-/* Block states (default storage) */
-DW_BCU_T BCU_DW;
-
 /* Real-time model */
 static RT_MODEL_BCU_T BCU_M_;
 RT_MODEL_BCU_T *const BCU_M = &BCU_M_;
-/* Model step function */
-  /* Exported data definition */
-  /* Definition for custom storage class: ExportToFile */
-  uint16_T blcv_Q_reqCpEi[28];           /* '<Root>/blcv_Q_reqCpEi' */
-
-  /* ������������ ��ȡ�������飩�� */
-  uint16_T blcv_Q_reqCpEo[28];           /* '<Root>/BLC' */
-
-  /* ������������ д���������飩�� */
-  uint32_T blcv_Q_totalCpEi[28];         /* '<Root>/blcv_Q_totalCpEi' */
-
-  /* �ۼƾ������� ��ȡ�������飩�� */
-  uint32_T blcv_Q_totalCpEo[28];         /* '<Root>/BLC' */
-
-  /* �ۼƾ������� д���������飩�� */
-  boolean_T blcv_flg_excute[28];         /* '<Root>/BLC' */
-
-  /* ����ִ�������־λ �����飩 */
-  int16_T ihd_I_curr;                    /* '<Root>/ihd_I_curr' */
-
-  /* ��ذ������� */
-  int16_T ihd_T_bdtemp;                  /* '<Root>/Constant' */
-  int16_T ihd_T_modTMax;                 /* '<Root>/ihd_T_modTMax' */
-
-  /* ģ���¶���� */
-  int16_T ihd_T_modTMin;                 /* '<Root>/ihd_T_modTMin' */
-
-  /* ģ���¶���С */
-  uint16_T ihd_V_cellUAvrg;              /* '<Root>/ihd_V_cellUAvrg' */
-
-  /* ��ص����ѹƽ���� */
-  uint16_T ihd_V_cellUMax;               /* '<Root>/ihd_V_cellUMax' */
-
-  /* ��ص����ѹ��� */
-  uint16_T ihd_V_cellUMin;               /* '<Root>/ihd_V_cellUMin' */
-
-  /* ��ص����ѹ��С�� */
-  uint8_T ihd_st_fault;                  /* '<Root>/ihd_st_fault' */
-
-  /* ���ϵȼ� */
-  uint8_T ihd_st_workStat;               /* '<Root>/ihd_st_workStat' */
-
-  /* ��ع���״̬�� */
-  uint32_T ihd_tm_parkTime;              /* '<Root>/ihd_tm_packTime' */
-
-  /* פ��ʱ�䣻 */
-  int16_T ihv_T_modT[6];                 /* '<Root>/ihv_T_modT' */
-
-  /* ģ���¶ȣ����飩 */
-  uint16_T ihv_V_cellU[28];              /* '<Root>/ihv_V_cellU' */
-
-  /* ��ص����ѹ�����飩�� */
-  uint16_T socd_pct_ahSoc;               /* '<Root>/SOC' */
-
-  /* ��ʱSOC�� */
-  uint16_T socd_pct_battSoc;             /* '<Root>/SOC' */
-
-  /* �����ʵSOC�� */
-  uint16_T socd_pct_battSocEi;           /* '<Root>/socd_pct_battSocEi' */
-
-  /* �����ʵSOC ��ȡ���� */
-  uint16_T socd_pct_battSocEo;           /* '<Root>/SOC' */
-
-  /* �����ʵSOC д������ */
-  uint16_T socd_pct_bcuSoc;              /* '<Root>/SOC' */
-
-  /* �����ʾSOC�� */
-  uint16_T socd_pct_bcuSocEi;            /* '<Root>/socd_pct_bcuSocEi' */
-
-  /* �����ʾSOC��ȡ���� */
-  uint16_T socd_pct_bcuSocEo;            /* '<Root>/SOC' */
-
-  /* �����ʾSOCд������ */
-  uint16_T sohd_Q_chrgEi;                /* '<Root>/sohd_Q_chrgEi ' */
-
-  /* ����������ȡ���� */
-  uint16_T sohd_Q_chrgEo;                /* '<Root>/SOH' */
-
-  /* ������������� */
-  boolean_T sohd_flg_chrgEndEi;          /* '<Root>/sohd_flg_chrgEndEi ' */
-
-  /* ��������־λ��ȡ���� */
-  boolean_T sohd_flg_chrgEndEo;          /* '<Root>/SOH' */
-
-  /* ��������־λд������ */
-  uint16_T sohd_pct_bcuSoh;              /* '<Root>/SOH' */
-
-  /* ���SOH�� */
-  uint16_T sohd_tm_chrgStartStatEi;      /* '<Root>/sohd_tm_chrgStartStatEi ' */
 
-  /* ���ǰ����ʱ���ȡ���� */
-  uint16_T sohd_tm_chrgStartStatEo;      /* '<Root>/SOH' */
-
-  /* ���ǰ����ʱ��д������ */
-  uint16_T sohv_Q_cellCap[28];           /* '<Root>/SOH' */
-
-  /* ������������� */
-  uint16_T sohv_Q_packCapArrEi[10];      /* '<Root>/sohv_Q_packCapArrEi ' */
-
-  /* 10���������������飩��ȡ���� */
-  uint16_T sohv_Q_packCapArrEo[10];      /* '<Root>/SOH' */
-
-  /* 10���������������飩д������ */
-  uint16_T sohv_V_chrgStartStatEi[28];   /* '<Root>/sohv_V_chrgStartStatEi ' */
-
-  /* ��翪ʼʱ�̵ĵ����ѹ�����飩��ȡ���� */
-  uint16_T sohv_V_chrgStartStatEo[28];   /* '<Root>/SOH' */
+uint16_T Time=0;
 
+/* Model step function */
 void BCU_step(void)
-{
-  osDelay(1000);
-  PROC_BCU_STATE_SWITCH(PROCESS_STATE_INIT);
-  while (TRUE)
-  {
-    switch(gProcess_Bcu_Task)
-    {
-      case PROCESS_STATE_INIT:
-      {   
-        memcpy(&blcv_Q_totalCpEi,&AppDataInfo.blcv_Q_totalCpE, 28);       
-        memcpy(&blcv_Q_reqCpEi,&AppDataInfo.blcv_Q_reqCpE, 28);    
-        socd_pct_bcuSocEi = AppDataInfo.socd_pct_bcuSocE;           
-        socd_pct_battSocEi = AppDataInfo.socd_pct_battSocE;         
-        sohd_tm_chrgStartStatEi = AppDataInfo.sohd_tm_chrgStartStatE;     
-        sohd_flg_chrgEndEi = AppDataInfo.sohd_flg_chrgEndE;            
-        memcpy(&sohv_V_chrgStartStatEi,&AppDataInfo.sohv_V_chrgStartStatE, 28);
-        sohd_Q_chrgEi = AppDataInfo. sohd_Q_chrgE;                 
-        memcpy(&sohv_Q_packCapArrEi,&AppDataInfo.sohv_Q_packCapArrE, 10);
-        BCU_initialize();
-        PROC_BCU_STATE_SWITCH(PROCESS_STATE_IDLE);
-        break;
-      }
-      case PROCESS_STATE_IDLE:
-      {
-        while (TRUE)
-        {
-          osDelay(100);
-          if(gProcess_app!=LISTEN)
-          {
-            PROC_BCU_STATE_SWITCH(PROCESS_STATE_WORK);
-            break;
-          }
-          else
-          {
-            PROC_BCU_STATE_SWITCH(PROCESS_STATE_SLEEP);
-            break;
-          }
-        }
-        break;
-      }
-      case PROCESS_STATE_WORK:
-      {
-        while (TRUE)
-        {
-          osDelay(100);
-          if(gProcess_app==LISTEN)
-          {
-            PROC_BCU_STATE_SWITCH(PROCESS_STATE_SLEEP);
-            break;
-          }
-          ihd_I_curr = battI;
-          ihd_V_cellUMax = maxCellVol;
-          ihd_V_cellUMin = minCellVol;
-          ihd_V_cellUAvrg = avrgCellVol;
-          memcpy(battCellU,ihv_V_cellU,AppNVMData.BattCellCount);
-          memcpy(battCellTemp,ihv_T_modT,AppNVMData.BattTempCount);
-          ihd_T_modTMax = maxCellTemp;
-          ihd_T_modTMin = minCellTemp;
-          ihd_st_workStat  = BattWorkStateDelay;
-          ihd_st_fault = 0;
-          #ifdef USING_PRINTF1
-            printf("[%d]-%d-Begin:\n",__LINE__,TimeCounter);
-          #endif
-          /* ModelReference: '<Root>/SOH' incorporates:
-          *  Inport: '<Root>/ihd_I_curr'
-          *  Inport: '<Root>/ihd_st_workStat'
-          *  Inport: '<Root>/ihd_tm_packTime'
-          *  Inport: '<Root>/ihv_V_cellU'
-          *  Inport: '<Root>/sohd_Q_chrgEi '
-          *  Inport: '<Root>/sohd_flg_chrgEndEi '
-          *  Inport: '<Root>/sohd_tm_chrgStartStatEi '
-          *  Inport: '<Root>/sohv_Q_packCapArrEi '
-          *  Inport: '<Root>/sohv_V_chrgStartStatEi '
-          */
-          SOH(&(BCU_DW.SOH_InstanceData.rtb), &(BCU_DW.SOH_InstanceData.rtdw));
-
-          /* ModelReference: '<Root>/SOC' incorporates:
-          *  Inport: '<Root>/ihd_I_curr'
-          *  Inport: '<Root>/ihd_V_cellUAvrg'
-          *  Inport: '<Root>/ihd_V_cellUMax'
-          *  Inport: '<Root>/ihd_V_cellUMin'
-          *  Inport: '<Root>/ihd_st_workStat'
-          *  Inport: '<Root>/ihd_tm_packTime'
-          *  Inport: '<Root>/socd_pct_battSocEi'
-          *  Inport: '<Root>/socd_pct_bcuSocEi'
-          */
-          SOC(&(BCU_DW.SOC_InstanceData.rtb), &(BCU_DW.SOC_InstanceData.rtdw));
-          /* Constant: '<Root>/Constant' */
-          ihd_T_bdtemp = 400;
-          /* ModelReference: '<Root>/BLC' incorporates:
-          *  Inport: '<Root>/blcv_Q_reqCpEi'
-          *  Inport: '<Root>/blcv_Q_totalCpEi'
-          *  Inport: '<Root>/ihd_V_cellUMin'
-          *  Inport: '<Root>/ihd_st_fault'
-          *  Inport: '<Root>/ihd_tm_packTime'
-          *  Inport: '<Root>/ihv_V_cellU'
-          */
-          BLC(&(BCU_DW.BLC_InstanceData.rtb), &(BCU_DW.BLC_InstanceData.rtdw));
-          #ifdef USING_PRINTF
-            printf("[%d]-%d-End:\n",__LINE__,TimeCounter);
-            printf("[%d]-battI:%d,maxCellTemp:%d,minCellTemp:%d,avrgCellVol:%d\n",__LINE__,battI,maxCellTemp,minCellTemp,avrgCellVol);
-            printf("[%d]-socd_pct_bcuSoc:%d,socd_pct_ahSoc:%d,socd_pct_battSoc:%d,sohd_pct_bcuSoh:%d\n",__LINE__,socd_pct_bcuSoc,socd_pct_ahSoc,socd_pct_battSoc,sohd_pct_bcuSoh);
-          #endif
-        }
-        break;
-      }
-      case PROCESS_STATE_SLEEP:
-      {
-        memcpy(&AppDataInfo.blcv_Q_totalCpE,&blcv_Q_totalCpEo, 28);       
-        memcpy(&AppDataInfo.blcv_Q_reqCpE,&blcv_Q_reqCpEo, 28);    
-        AppDataInfo.socd_pct_bcuSocE =  socd_pct_bcuSocEo;  
-        AppDataInfo.socd_pct_battSocE = socd_pct_battSocEo;
-        AppDataInfo.sohd_tm_chrgStartStatE = sohd_tm_chrgStartStatEo;
-        AppDataInfo.sohd_flg_chrgEndE = sohd_flg_chrgEndEo;     
-        memcpy(&AppDataInfo.sohv_V_chrgStartStatE,&sohv_V_chrgStartStatEo, 28);
-        AppDataInfo. sohd_Q_chrgE = sohd_Q_chrgEo;           
-        memcpy(&AppDataInfo.sohv_Q_packCapArrE,&sohv_Q_packCapArrEo, 10);
-        AppDataInfo.appDataModify = TRUE;
-        while (TRUE)
-        {
-          osDelay(100);
-          if(gProcess_app!=LISTEN)
-          {
-            PROC_BCU_STATE_SWITCH(PROCESS_STATE_INIT);
-            break;
-          }
-        }
-        break;
-      }
-      default:
-      {
-        PROC_BCU_STATE_SWITCH(PROCESS_STATE_INIT);
-        break;
-      }
-    }
-  }
+{ uint8_T i;
+ 
+	  osDelay(1000);
+	  PROC_BCU_STATE_SWITCH(PROCESS_STATE_INIT);
+	  while (TRUE)
+	  {
+		switch(gProcess_Bcu_Task)
+		{
+		  case PROCESS_STATE_INIT:
+		  { BCU_initialize();  
+			memcpy(blcv_Q_totalCpEi,AppDataInfo.blcv_Q_totalCpE, 28*sizeof(uint32_T));		 
+			memcpy(blcv_Q_reqCpEi,AppDataInfo.blcv_Q_reqCpE, 28*sizeof(uint16_T));	 
+			socd_pct_bcuSocEi = AppDataInfo.socd_pct_bcuSocE;			
+			socd_pct_battSocEi = AppDataInfo.socd_pct_battSocE; 		
+			sohd_tm_chrgStartStatEi = AppDataInfo.sohd_tm_chrgStartStatE;	  
+			sohd_flg_chrgEndEi = AppDataInfo.sohd_flg_chrgEndE; 		   
+			memcpy(sohv_V_chrgStartStatEi,AppDataInfo.sohv_V_chrgStartStatE, 28*sizeof(uint16_T));
+			sohd_Q_chrgEi = AppDataInfo.sohd_Q_chrgE;				  
+			memcpy(sohv_Q_packCapArrEi,AppDataInfo.sohv_Q_packCapArrE, 10*sizeof(uint16_T));
+			memcpy(sohv_Q_cellCapArrEi,AppDataInfo.sohv_Q_cellCapArrE, 28*sizeof(uint16_T));
+			PROC_BCU_STATE_SWITCH(PROCESS_STATE_IDLE);
+			break;
+		  }
+		  case PROCESS_STATE_IDLE:
+		  {
+			while (TRUE)
+			{
+			  osDelay(100);
+			  if(gProcess_app!=LISTEN)
+			  {
+				PROC_BCU_STATE_SWITCH(PROCESS_STATE_WORK);
+				break;
+			  }
+			  else
+			  {
+				PROC_BCU_STATE_SWITCH(PROCESS_STATE_SLEEP);
+				break;
+			  }
+			}
+			break;
+		  }
+		  case PROCESS_STATE_WORK:
+		  {
+			while (TRUE)
+			{
+			  osDelay(1000);
+			  if(gProcess_app==LISTEN)
+			  {
+				PROC_BCU_STATE_SWITCH(PROCESS_STATE_SLEEP);
+				break;
+			  }
+			  //***************
+			  ihd_I_curr = (int16_T)(-(battI - 10000)*10);
+			  ihd_V_cellUMax = maxCellVol;
+			  ihd_V_cellUMin = minCellVol;
+			  ihd_V_cellUAvrg = avrgCellVol;
+			  memcpy(ihv_V_cellU,battCellU,AppNVMData.BattCellCount*sizeof(uint16_T));
+			  memcpy(ihv_T_modT,battCellTemp,AppNVMData.BattTempCount*sizeof(uint16_T));
+			  ihd_T_modTMax = maxCellTemp;
+			  ihd_T_modTMin = minCellTemp;
+			  ihd_st_workStat  = battWorkState;//BattWorkStateDelay;
+			  ihd_st_fault = 0;
+			 // socd_pct_battSocEi=300;
+			  ihd_T_bdtemp = 400;
+
+			  /* Constant: '<Root>/Constant' */
+			  
+			  //****************************
+			  /* ModelReference: '<Root>/SOH' incorporates:
+			  *  Inport: '<Root>/ihd_I_curr'
+			  *  Inport: '<Root>/ihd_st_workStat'
+			  *  Inport: '<Root>/ihd_tm_packTime'
+			  *  Inport: '<Root>/ihv_V_cellU'
+			  *  Inport: '<Root>/sohd_Q_chrgEi '
+			  *  Inport: '<Root>/sohd_flg_chrgEndEi '
+			  *  Inport: '<Root>/sohd_tm_chrgStartStatEi '
+			  *  Inport: '<Root>/sohv_Q_packCapArrEi '
+			  *  Inport: '<Root>/sohv_V_chrgStartStatEi '
+			  */
+			   SOH();
+	
+			  /* ModelReference: '<Root>/SOC' incorporates:
+			  *  Inport: '<Root>/ihd_I_curr'
+			  *  Inport: '<Root>/ihd_V_cellUAvrg'
+			  *  Inport: '<Root>/ihd_V_cellUMax'
+			  *  Inport: '<Root>/ihd_V_cellUMin'
+			  *  Inport: '<Root>/ihd_st_workStat'
+			  *  Inport: '<Root>/ihd_tm_packTime'
+			  *  Inport: '<Root>/socd_pct_battSocEi'
+			  *  Inport: '<Root>/socd_pct_bcuSocEi'
+			  */
+			  SOC();
+			  // printf("[%d]-:socd_pct_battSocEi:%d,socd_pct_battSoc:%d,socd_pct_ekfSoc:%d,socd_pct_bcuSoc:%d,Umax:%d,Umin:%d,ocv:%f,UL:%f,Up:%f,k1:%f,k2:%f\n",__LINE__,socd_pct_battSocEi,socd_pct_battSoc,socd_pct_ekfSoc,socd_pct_bcuSoc,ihd_V_cellUMax,ihd_V_cellUMin,OCV,UL,Up,k1,k2);
+			  /* Constant: '<Root>/Constant' */
+			  /* ModelReference: '<Root>/BLC' incorporates:
+			  *  Inport: '<Root>/blcv_Q_reqCpEi'
+			  *  Inport: '<Root>/blcv_Q_totalCpEi'
+			  *  Inport: '<Root>/ihd_V_cellUMin'
+			  *  Inport: '<Root>/ihd_st_fault'
+			  *  Inport: '<Root>/ihd_tm_packTime'
+			  *  Inport: '<Root>/ihv_V_cellU'
+			  */
+			   BLC();
+			   SFM();
+              //
+              //
+             
+			 //printf("time:%d,socd_pct_battSocEi:%d,socd_pct_bcuSocEi:%d,ihd_I_curr:%d,ihd_V_cellUAvrg:%d,deltaU:%f,socd_pct_ahSoc:%d,socd_pct_ekfSoc:%d,socd_pct_battSoc:%d,socd_pct_bcuSoc:%d\n",Time++,socd_pct_battSocEi,socd_pct_bcuSocEi,ihd_I_curr,ihd_V_cellUAvrg,deltaU,socd_pct_ahSoc,socd_pct_ekfSoc,socd_pct_battSoc,socd_pct_bcuSoc);
+              
+             /* printf("time:%d,  ihd_st_workStat:%d,  ihd_I_curr:%d,  tm:%d,  sohd_Q_chrgEo:%d,sohd_flg_chrgEndEo:%d\n",Time++,ihd_st_workStat,ihd_I_curr,sohd_tm_chrgStartStatEo,sohd_Q_chrgEo,sohd_flg_chrgEndEo);
+
+             printf("sohd_Q_chrgEi:%d,  sohd_flg_chrgEndEi:%d,sohd_pct_bcuSoh:%d\n",sohd_Q_chrgEi,sohd_flg_chrgEndEi,sohd_pct_bcuSoh);
+			 for(i=0;i<17;i++)
+			  {
+			  printf("_cell%d_%d   ",i,battCellU[i]);
+			 }
+			 printf("\n");
+			 for(i=0;i<17;i++)
+			  {
+			  printf("_celo%d_%d   ",i,sohv_V_chrgStartStatEo[i]);
+			 }
+			 	 printf("\n");
+			 for(i=0;i<17;i++)
+			  {
+			  printf("_celi%d_%d   ",i,sohv_V_chrgStartStatEi[i]);
+			 }
+			 	 	 printf("\n");
+			 for(i=0;i<17;i++)
+			  {
+			  printf("_celpo%d_%d   ",i,sohv_Q_cellCapArrEo[i]);
+			 }
+			  	 	 printf("\n");
+			 for(i=0;i<17;i++)
+			  {
+			  printf("_celpi%d_%d   ",i,sohv_Q_cellCapArrEi[i]);
+			 }
+			 	 	 	 printf("\n");
+			 for(i=0;i<10;i++)
+			  {
+			  printf("_celp%d_%d   ",i,sohv_Q_packCapArrEo[i]);
+			 }
+			 printf("\n\n");*/
+
+			
+				if(socd_flg_EEsave==1)
+				{
+				  memcpy(AppDataInfo.blcv_Q_totalCpE,blcv_Q_totalCpEo, 28*sizeof(uint32_T));	   
+				  memcpy(AppDataInfo.blcv_Q_reqCpE,blcv_Q_reqCpEo, 28*sizeof(uint16_T));	
+				  AppDataInfo.socd_pct_bcuSocE =  socd_pct_bcuSocEo;  
+				  AppDataInfo.socd_pct_battSocE = socd_pct_battSocEo;
+				  AppDataInfo.sohd_tm_chrgStartStatE = sohd_tm_chrgStartStatEo;
+				  AppDataInfo.sohd_flg_chrgEndE = sohd_flg_chrgEndEo;	  
+				  memcpy(AppDataInfo.sohv_V_chrgStartStatE,sohv_V_chrgStartStatEo, 28*sizeof(uint16_T));
+				  AppDataInfo. sohd_Q_chrgE = sohd_Q_chrgEo;		   
+				  memcpy(AppDataInfo.sohv_Q_packCapArrE,sohv_Q_packCapArrEo, 10*sizeof(uint16_T));
+				  memcpy(AppDataInfo.sohv_Q_cellCapArrE,sohv_Q_cellCapArrEo, 28*sizeof(uint16_T));
+				  AppDataInfo.appDataModify = TRUE;
+				  printf("save\n");
+				 }
+
+			}
+			break;
+		  }
+		  case PROCESS_STATE_SLEEP:
+		  { 
+			memcpy(AppDataInfo.blcv_Q_totalCpE,blcv_Q_totalCpEo, 28*sizeof(uint32_T));		 
+			memcpy(AppDataInfo.blcv_Q_reqCpE,blcv_Q_reqCpEo, 28*sizeof(uint16_T));	  
+			AppDataInfo.socd_pct_bcuSocE =	socd_pct_bcuSocEo;	
+			AppDataInfo.socd_pct_battSocE = socd_pct_battSocEo;
+			AppDataInfo.sohd_tm_chrgStartStatE = sohd_tm_chrgStartStatEo;
+			AppDataInfo.sohd_flg_chrgEndE = sohd_flg_chrgEndEo; 	
+			memcpy(AppDataInfo.sohv_V_chrgStartStatE,sohv_V_chrgStartStatEo, 28*sizeof(uint16_T));
+			AppDataInfo. sohd_Q_chrgE = sohd_Q_chrgEo;			 
+			memcpy(AppDataInfo.sohv_Q_packCapArrE,sohv_Q_packCapArrEo, 10*sizeof(uint16_T));
+			memcpy(AppDataInfo.sohv_Q_cellCapArrE,sohv_Q_cellCapArrEo, 28*sizeof(uint16_T));
+			AppDataInfo.appDataModify = TRUE;
+			//
+			Time=0;
+			ihd_tm_parkTime=0;
+			while (TRUE)
+			{
+			  osDelay(1000);
+			  ihd_tm_parkTime++;
+			  printf("[%d]-ihd_tm_parkTime:%d\n",__LINE__,ihd_tm_parkTime);
+	  
+			  if(gProcess_app!=LISTEN)
+			  {
+				PROC_BCU_STATE_SWITCH(PROCESS_STATE_INIT);
+				break;
+			  }
+			}
+			break;
+		  }
+		  default:
+		  {
+			PROC_BCU_STATE_SWITCH(PROCESS_STATE_INIT);
+			break;
+		  }
+		}
+	  }
 }
 
 /* Model initialize function */
@@ -290,32 +250,18 @@ void BCU_initialize(void)
 
   sohd_pct_bcuSoh = 1000U;
 
-  {
-    int32_T i;
-    for (i = 0; i < 10; i++) {
-      sohv_Q_packCapArrEo[i] = 300U;
-    }
-  }
-
-  /* external inputs */
-  {
-    int32_T i;
-    for (i = 0; i < 10; i++) {
-      sohv_Q_packCapArrEi[i] = 300U;
-    }
-  }
-
   /* Model Initialize function for ModelReference Block: '<Root>/BLC' */
-  BLC_initialize(rtmGetErrorStatusPointer(BCU_M), &(BCU_DW.BLC_InstanceData.rtm));
+  BLC_initialize(rtmGetErrorStatusPointer(BCU_M));
 
   /* Model Initialize function for ModelReference Block: '<Root>/SOC' */
-  SOC_initialize(rtmGetErrorStatusPointer(BCU_M), &(BCU_DW.SOC_InstanceData.rtm));
+  SOC_initialize(rtmGetErrorStatusPointer(BCU_M));
 
   /* Model Initialize function for ModelReference Block: '<Root>/SOH' */
-  SOH_initialize(rtmGetErrorStatusPointer(BCU_M), &(BCU_DW.SOH_InstanceData.rtm));
+  SOH_initialize(rtmGetErrorStatusPointer(BCU_M));
+  //SFM_initialize(rtmGetErrorStatusPointer(BCU_M));
 
   /* SystemInitialize for ModelReference: '<Root>/SOH' incorporates:
-   *  Inport: '<Root>/ihd_I_curr'
+   *  Inport: '<Root>/battI '
    *  Inport: '<Root>/ihd_st_workStat'
    *  Inport: '<Root>/ihd_tm_packTime'
    *  Inport: '<Root>/ihv_V_cellU'
@@ -325,10 +271,10 @@ void BCU_initialize(void)
    *  Inport: '<Root>/sohv_Q_packCapArrEi '
    *  Inport: '<Root>/sohv_V_chrgStartStatEi '
    */
-  SOH_Init(&(BCU_DW.SOH_InstanceData.rtdw));
+  SOH_Init();
 
   /* SystemInitialize for ModelReference: '<Root>/SOC' incorporates:
-   *  Inport: '<Root>/ihd_I_curr'
+   *  Inport: '<Root>/battI '
    *  Inport: '<Root>/ihd_V_cellUAvrg'
    *  Inport: '<Root>/ihd_V_cellUMax'
    *  Inport: '<Root>/ihd_V_cellUMin'
@@ -337,7 +283,7 @@ void BCU_initialize(void)
    *  Inport: '<Root>/socd_pct_battSocEi'
    *  Inport: '<Root>/socd_pct_bcuSocEi'
    */
-  SOC_Init(&(BCU_DW.SOC_InstanceData.rtdw));
+  SOC_Init();
 
   /* SystemInitialize for ModelReference: '<Root>/BLC' incorporates:
    *  Inport: '<Root>/blcv_Q_reqCpEi'
@@ -347,7 +293,8 @@ void BCU_initialize(void)
    *  Inport: '<Root>/ihd_tm_packTime'
    *  Inport: '<Root>/ihv_V_cellU'
    */
-  BLC_Init(&(BCU_DW.BLC_InstanceData.rtdw));
+  BLC_Init();
+  //SFM_Init();
 }
 
 /* Model terminate function */
@@ -355,7 +302,13 @@ void BCU_terminate(void)
 {
   /* (no terminate code required) */
 }
-void AppTaskBcuInit(void *arg)
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */
+  void AppTaskBcuInit(void *arg)
 {
     osThreadAttr_t task_attr;
     memset(&task_attr,0,sizeof(task_attr));
@@ -368,8 +321,3 @@ void AppTaskBcuInit(void *arg)
     task_attr.cb_size = sizeof(StaticTask_t);
     BcuTaskId = osThreadNew(BCU_step, NULL, &task_attr);
 }
-/*
- * File trailer for generated code.
- *
- * [EOF]
- */

src/BCU1.c

@@ -0,0 +1,288 @@
+/*
+ * File: BCU.c
+ *
+ * Code generated for Simulink model 'BCU'.
+ *
+ * Model version                  : 1.19
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Thu Aug 19 14:23:24 2021
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: Intel->x86-64 (Windows64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "BCU.h"
+#include "BCU_private.h"
+static StaticTask_t                 gProcess_Bcu_Task_t;
+static UINT8                        gProcess_Bcu_TaskStack[PROC_BCU_TASK_STACK_SIZE];
+static osThreadId_t                 BcuTaskId = NULL;
+static process_Bcu 		    gProcess_Bcu_Task;
+#define PROC_BCU_STATE_SWITCH(a)  (gProcess_Bcu_Task = a)
+
+
+/* Block states (default storage) */
+DW_BCU_T BCU_DW;
+
+/* Real-time model */
+static RT_MODEL_BCU_T BCU_M_;
+RT_MODEL_BCU_T *const BCU_M = &BCU_M_;
+
+/* Model step function */
+void BCU_step(void)
+{
+  uint8_T i;
+	  osDelay(1000);
+	  PROC_BCU_STATE_SWITCH(PROCESS_STATE_INIT);
+	  while (TRUE)
+	  {
+		switch(gProcess_Bcu_Task)
+		{
+		  case PROCESS_STATE_INIT:
+		  { BCU_initialize();  
+			memcpy(blcv_Q_totalCpEi,AppDataInfo.blcv_Q_totalCpE, 28*sizeof(uint32_T));		 
+			memcpy(blcv_Q_reqCpEi,AppDataInfo.blcv_Q_reqCpE, 28*sizeof(uint16_T));	 
+			socd_pct_bcuSocEi = AppDataInfo.socd_pct_bcuSocE;			
+			socd_pct_battSocEi = AppDataInfo.socd_pct_battSocE; 		
+			sohd_tm_chrgStartStatEi = AppDataInfo.sohd_tm_chrgStartStatE;	  
+			sohd_flg_chrgEndEi = AppDataInfo.sohd_flg_chrgEndE; 		   
+			memcpy(sohv_V_chrgStartStatEi,AppDataInfo.sohv_V_chrgStartStatE, 28*sizeof(uint16_T));
+			sohd_Q_chrgEi = AppDataInfo.sohd_Q_chrgE;				  
+			memcpy(sohv_Q_packCapArrEi,AppDataInfo.sohv_Q_packCapArrE, 10*sizeof(uint16_T));
+			PROC_BCU_STATE_SWITCH(PROCESS_STATE_IDLE);
+			break;
+		  }
+		  case PROCESS_STATE_IDLE:
+		  {
+			while (TRUE)
+			{
+			  osDelay(100);
+			  if(gProcess_app!=LISTEN)
+			  {
+				PROC_BCU_STATE_SWITCH(PROCESS_STATE_WORK);
+				break;
+			  }
+			  else
+			  {
+				PROC_BCU_STATE_SWITCH(PROCESS_STATE_SLEEP);
+				break;
+			  }
+			}
+			break;
+		  }
+		  case PROCESS_STATE_WORK:
+		  {
+			while (TRUE)
+			{
+			  osDelay(100);
+			  if(gProcess_app==LISTEN)
+			  {
+				PROC_BCU_STATE_SWITCH(PROCESS_STATE_SLEEP);
+				break;
+			  }
+			  //***************
+			  ihd_I_curr = (int16_T)(battI - 10000);
+			  ihd_V_cellUMax = maxCellVol;
+			  ihd_V_cellUMin = minCellVol;
+			  ihd_V_cellUAvrg = avrgCellVol;
+			  memcpy(ihv_V_cellU,battCellU,AppNVMData.BattCellCount*sizeof(uint16_T));
+			  memcpy(ihv_T_modT,battCellTemp,AppNVMData.BattTempCount*sizeof(uint16_T));
+			  ihd_T_modTMax = maxCellTemp;
+			  ihd_T_modTMin = minCellTemp;
+			  ihd_st_workStat  = BattWorkStateDelay;
+			  ihd_st_fault = 0;
+
+			  socd_pct_battSocEi=300;
+			  /*for(i=0;i<17;i++)
+			  	{sohv_V_chrgStartStatEi[i]=3400;
+			  	}
+			  for(i=0;i<10;i++)
+			  	{sohv_Q_packCapArrEi[i]=300;
+			  	}*/
+
+			  
+			  //****************************
+			  /* ModelReference: '<Root>/SOH' incorporates:
+			  *  Inport: '<Root>/ihd_I_curr'
+			  *  Inport: '<Root>/ihd_st_workStat'
+			  *  Inport: '<Root>/ihd_tm_packTime'
+			  *  Inport: '<Root>/ihv_V_cellU'
+			  *  Inport: '<Root>/sohd_Q_chrgEi '
+			  *  Inport: '<Root>/sohd_flg_chrgEndEi '
+			  *  Inport: '<Root>/sohd_tm_chrgStartStatEi '
+			  *  Inport: '<Root>/sohv_Q_packCapArrEi '
+			  *  Inport: '<Root>/sohv_V_chrgStartStatEi '
+			  */
+			    SOH();
+	
+			  /* ModelReference: '<Root>/SOC' incorporates:
+			  *  Inport: '<Root>/ihd_I_curr'
+			  *  Inport: '<Root>/ihd_V_cellUAvrg'
+			  *  Inport: '<Root>/ihd_V_cellUMax'
+			  *  Inport: '<Root>/ihd_V_cellUMin'
+			  *  Inport: '<Root>/ihd_st_workStat'
+			  *  Inport: '<Root>/ihd_tm_packTime'
+			  *  Inport: '<Root>/socd_pct_battSocEi'
+			  *  Inport: '<Root>/socd_pct_bcuSocEi'
+			  */
+			  SOC();
+			   printf("[%d]-:socd_pct_battSocEi:%d,socd_pct_battSoc:%d,socd_pct_ekfSoc:%d,Umax:%d,Umin:%d,ocv:%f,UL:%f,Up:%f,k1:%f,k2:%f\n",__LINE__,socd_pct_battSocEi,socd_pct_battSoc,socd_pct_ekfSoc,ihd_V_cellUMax,ihd_V_cellUMin,OCV,UL,Up,k1,k2);
+			  /* Constant: '<Root>/Constant' */
+			  ihd_T_bdtemp = 400;
+			  /* ModelReference: '<Root>/BLC' incorporates:
+			  *  Inport: '<Root>/blcv_Q_reqCpEi'
+			  *  Inport: '<Root>/blcv_Q_totalCpEi'
+			  *  Inport: '<Root>/ihd_V_cellUMin'
+			  *  Inport: '<Root>/ihd_st_fault'
+			  *  Inport: '<Root>/ihd_tm_packTime'
+			  *  Inport: '<Root>/ihv_V_cellU'
+			  */
+			   BLC(&(BCU_DW.BLC_InstanceData.rtb), &(BCU_DW.BLC_InstanceData.rtdw));
+              //
+              //
+				if(socd_flg_EEsave==1)
+				{
+				  memcpy(AppDataInfo.blcv_Q_totalCpE,blcv_Q_totalCpEo, 28*sizeof(uint32_T));	   
+				  memcpy(AppDataInfo.blcv_Q_reqCpE,blcv_Q_reqCpEo, 28*sizeof(uint16_T));	
+				  AppDataInfo.socd_pct_bcuSocE =  socd_pct_bcuSocEo;  
+				  AppDataInfo.socd_pct_battSocE = socd_pct_battSocEo;
+				  AppDataInfo.sohd_tm_chrgStartStatE = sohd_tm_chrgStartStatEo;
+				  AppDataInfo.sohd_flg_chrgEndE = sohd_flg_chrgEndEo;	  
+				  memcpy(AppDataInfo.sohv_V_chrgStartStatE,sohv_V_chrgStartStatEo, 28*sizeof(uint16_T));
+				  AppDataInfo. sohd_Q_chrgE = sohd_Q_chrgEo;		   
+				  memcpy(AppDataInfo.sohv_Q_packCapArrE,sohv_Q_packCapArrEo, 10*sizeof(uint16_T));
+				  AppDataInfo.appDataModify = TRUE;
+				 }
+
+			}
+			break;
+		  }
+		  case PROCESS_STATE_SLEEP:
+		  { 
+			memcpy(AppDataInfo.blcv_Q_totalCpE,blcv_Q_totalCpEo, 28*sizeof(uint32_T));		 
+			memcpy(AppDataInfo.blcv_Q_reqCpE,blcv_Q_reqCpEo, 28*sizeof(uint16_T));	  
+			AppDataInfo.socd_pct_bcuSocE =	socd_pct_bcuSocEo;	
+			AppDataInfo.socd_pct_battSocE = socd_pct_battSocEo;
+			AppDataInfo.sohd_tm_chrgStartStatE = sohd_tm_chrgStartStatEo;
+			AppDataInfo.sohd_flg_chrgEndE = sohd_flg_chrgEndEo; 	
+			memcpy(AppDataInfo.sohv_V_chrgStartStatE,sohv_V_chrgStartStatEo, 28*sizeof(uint16_T));
+			AppDataInfo. sohd_Q_chrgE = sohd_Q_chrgEo;			 
+			memcpy(AppDataInfo.sohv_Q_packCapArrE,sohv_Q_packCapArrEo, 10*sizeof(uint16_T));
+			AppDataInfo.appDataModify = TRUE;
+			//
+			ihd_tm_parkTime=0;
+			while (TRUE)
+			{
+			  osDelay(1000);
+			  ihd_tm_parkTime++;
+			  printf("[%d]-ihd_tm_parkTime:%d\n",__LINE__,ihd_tm_parkTime);
+	  
+			  if(gProcess_app!=LISTEN)
+			  {
+				PROC_BCU_STATE_SWITCH(PROCESS_STATE_INIT);
+				break;
+			  }
+			}
+			break;
+		  }
+		  default:
+		  {
+			PROC_BCU_STATE_SWITCH(PROCESS_STATE_INIT);
+			break;
+		  }
+		}
+	  }
+}
+
+/* Model initialize function */
+void BCU_initialize(void)
+{
+  /* Registration code */
+
+  /* block I/O */
+
+  /* custom signals */
+  {
+    int32_T i;
+    for (i = 0; i < 28; i++) {
+      sohv_Q_cellCap[i] = 300U;
+    }
+  }
+
+  sohd_pct_bcuSoh = 1000U;
+
+  /* external inputs */
+  battI = 10000U;
+
+  {
+    int32_T i;
+    for (i = 0; i < 8; i++) {
+      battCellTemp[i] = ((uint16_T)40U);
+    }
+  }
+
+  maxCellTemp = ((uint16_T)40U);
+  minCellTemp = ((uint16_T)40U);
+
+  /* Model Initialize function for ModelReference Block: '<Root>/BLC' */
+  BLC_initialize(rtmGetErrorStatusPointer(BCU_M), &(BCU_DW.BLC_InstanceData.rtm));
+
+  /* Model Initialize function for ModelReference Block: '<Root>/SOC' */
+  SOC_initialize(rtmGetErrorStatusPointer(BCU_M));
+
+  /* Model Initialize function for ModelReference Block: '<Root>/SOH' */
+  SOH_initialize(rtmGetErrorStatusPointer(BCU_M));
+
+  /* SystemInitialize for ModelReference: '<Root>/SOH' incorporates:
+   *  Inport: '<Root>/ihd_tm_packTime'
+   *  Inport: '<Root>/sohd_Q_chrgEi '
+   *  Inport: '<Root>/sohd_flg_chrgEndEi '
+   *  Inport: '<Root>/sohd_tm_chrgStartStatEi '
+   *  Inport: '<Root>/sohv_Q_packCapArrEi '
+   *  Inport: '<Root>/sohv_V_chrgStartStatEi '
+   */
+  SOH_Init();
+
+
+  /* SystemInitialize for ModelReference: '<Root>/SOC' incorporates:
+   *  Inport: '<Root>/ihd_tm_packTime'
+   *  Inport: '<Root>/socd_pct_battSocEi'
+   *  Inport: '<Root>/socd_pct_bcuSocEi'
+   */
+    SOC_Init();
+
+  /* SystemInitialize for ModelReference: '<Root>/BLC' incorporates:
+   *  Inport: '<Root>/blcv_Q_reqCpEi'
+   *  Inport: '<Root>/blcv_Q_totalCpEi'
+   *  Inport: '<Root>/ihd_st_fault'
+   *  Inport: '<Root>/ihd_tm_packTime'
+   */
+  BLC_Init(&(BCU_DW.BLC_InstanceData.rtdw));
+}
+
+/* Model terminate function */
+void BCU_terminate(void)
+{
+  /* (no terminate code required) */
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */
+ void AppTaskBcuInit(void *arg)
+{
+    osThreadAttr_t task_attr;
+    memset(&task_attr,0,sizeof(task_attr));
+    memset(gProcess_Bcu_TaskStack, 0xA5, PROC_BCU_TASK_STACK_SIZE);
+    task_attr.name = "Bcu_Task";
+    task_attr.stack_mem = gProcess_Bcu_TaskStack;
+    task_attr.stack_size = PROC_BCU_TASK_STACK_SIZE;
+    task_attr.priority = osPriorityBelowNormal7;
+    task_attr.cb_mem = &gProcess_Bcu_Task_t;
+    task_attr.cb_size = sizeof(StaticTask_t);
+    BcuTaskId = osThreadNew(BCU_step, NULL, &task_attr);
+}
+ 

src/BCUCal.c

@@ -0,0 +1,83 @@
+/*
+ * File: BCUCal.c
+ *
+ * Code generated for Simulink model 'BCU'.
+ *
+ * Model version                  : 1.19
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Fri Aug 20 13:49:53 2021
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: Intel->x86-64 (Windows64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "rtwtypes.h"
+#include "zero_crossing_types.h"
+#include "BCU_types.h"
+
+/* Exported data definition */
+
+/* Const memory section */
+/* Definition for custom storage class: Const */
+const uint16_T blc_V_low = 10U;
+const uint16_T blcc_R_esr = 1U;
+const int16_T blcc_T_close = 850;
+const int16_T blcc_T_open = 600;
+const uint16_T cmnc_Q_ratedCp = 300U;
+
+/* 额定容量； */
+const uint8_T cmnc_num_cellUnum = 17U;
+
+/* 电压采样点个数； */
+const uint16_T cmnc_tm_parkTime = 1800U;
+
+/* 静置时间阈值； */
+const uint16_T cmnm_F_polar[13] = { 3880U, 5062U, 4454U, 10798U, 12885U, 12990U,
+  14331U, 10754U, 9378U, 10340U, 10592U, 11946U, 11515U } ;
+
+/* 放电OCV-SOC的SOC数组； */
+const uint16_T cmnm_R_ohm[13] = { 2181U, 2043U, 2040U, 1927U, 1850U, 1802U,
+  1771U, 1743U, 1733U, 1728U, 1748U, 1762U, 1789U } ;
+
+/* 放电OCV-SOC的SOC数组； */
+const uint16_T cmnm_R_polar[13] = { 1837U, 1055U, 7352U, 1453U, 1181U, 1125U,
+  1205U, 1283U, 1228U, 1187U, 1104U, 1170U, 1049U } ;
+
+/* 放电OCV-SOC的SOC数组； */
+const uint16_T cmnm_V_ocv[13] = { 3311U, 3411U, 3476U, 3553U, 3610U, 3638U,
+  3674U, 3758U, 3845U, 3942U, 4051U, 4106U, 4175U } ;
+
+/* 放电OCV-SOC的OCV数组； */
+const uint16_T cmnm_pct_soc[13] = { 0U, 50U, 100U, 200U, 300U, 400U, 500U, 600U,
+  700U, 800U, 900U, 950U, 1000U } ;
+
+/* 放电OCV-SOC的SOC数组； */
+const uint16_T socc_V_chrgFulV = 4200U;
+
+/* 充满电的截至电压； */
+const uint16_T socc_pct_battSocLow = 0U;
+
+/* SOC下限值； */
+const uint16_T socc_pct_battSocUp = 1000U;
+
+/* SOC上限值； */
+const int16_T socm_I_chrgCor[4] = { 50, 100, 200, 400 } ;
+
+/* 充电CCV对应的电流数据； */
+const int16_T socm_I_disChrgCor[3] = { -400, -200, -100 } ;
+
+/* 放电CCV对应的电流数据； */
+const uint16_T socm_V_chrgCor[4] = { 4125U, 4128U, 4132U, 4137U } ;
+
+/* 充电CCV对应的电压； */
+const uint16_T socm_V_disChrgCor[3] = { 3100U, 3270U, 3380U } ;
+
+/* 放电CCV对应的电压； */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

src/BCUDisp.c

@@ -0,0 +1,160 @@
+/*
+ * File: BCUDisp.c
+ *
+ * Code generated for Simulink model 'BCU'.
+ *
+ * Model version                  : 1.20
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Fri Aug 20 14:17:40 2021
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: Intel->x86-64 (Windows64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "rtwtypes.h"
+#include "zero_crossing_types.h"
+#include "BCU_types.h"
+
+/* Exported data definition */
+
+/* Definition for custom storage class: ExportToFile */
+
+
+uint16_T SOC1[28];
+uint16_T SOC2[28];
+uint16_T deltaSoc[28];
+uint16_T minChrg[28];
+uint16_T minDischrg[28];
+real_T k1;
+real_T k2;
+real_T OCV;
+real_T UL;
+real_T Up;
+real_T deltaU;
+
+uint16_T blcn_Q_impleCp[28];
+uint16_T sohv_Q_cellCapArrEo[28];
+uint16_T sohv_Q_cellCapArrEi[28];
+
+
+/* 电池单体电压最小； */
+uint16_T minChrg[28];
+uint16_T minDischrg[28];
+
+
+uint16_T blcv_Q_reqCpEi[28];
+
+/* 均衡需求容量 读取量（数组）； */
+uint16_T blcv_Q_reqCpEo[28];
+
+/* 均衡需求容量 写入量（数组）； */
+uint32_T blcv_Q_totalCpEi[28];
+
+/* 累计均衡容量 读取量（数组）； */
+uint32_T blcv_Q_totalCpEo[28];
+
+/* 累计均衡容量 写入量（数组）； */
+boolean_T blcv_flg_excute[28];
+
+/* 均衡执行请求标志位 （数组） */
+int16_T ihd_I_curr;
+
+/* 电池包电流； */
+int16_T ihd_T_bdtemp;
+int16_T ihd_T_modTMax;
+
+/* 模组温度最大 */
+int16_T ihd_T_modTMin;
+
+/* 模组温度最小 */
+uint16_T ihd_V_cellUAvrg;
+
+/* 电池单体电压平均； */
+uint16_T ihd_V_cellUMax;
+
+/* 电池单体电压最大； */
+uint16_T ihd_V_cellUMin;
+
+/* 电池单体电压最小； */
+uint8_T ihd_st_fault;
+
+/* 故障等级 */
+uint8_T ihd_st_workStat;
+
+/* 电池工作状态； */
+uint32_T ihd_tm_parkTime;
+
+/* 驻车时间； */
+int16_T ihv_T_modT[6];
+
+/* 模组温度（数组） */
+uint16_T ihv_V_cellU[28];
+
+/* 电池单体电压（数组）； */
+boolean_T socd_flg_EEsave;
+uint16_T socd_pct_ahSoc;
+
+/* 安时SOC； */
+uint16_T socd_pct_battSoc;
+
+/* 电池真实SOC； */
+uint16_T socd_pct_battSocEi;
+
+/* 电池真实SOC 读取量； */
+uint16_T socd_pct_battSocEo;
+
+/* 电池真实SOC 写入量； */
+uint16_T socd_pct_bcuSoc;
+
+/* 电池显示SOC； */
+uint16_T socd_pct_bcuSocEi;
+
+/* 电池显示SOC读取量； */
+uint16_T socd_pct_bcuSocEo;
+
+/* 电池显示SOC写入量； */
+uint16_T socd_pct_ekfSoc;
+
+/* EKFSOC； */
+uint16_T sohd_Q_chrgEi;
+
+/* 充入容量读取量； */
+uint16_T sohd_Q_chrgEo;
+
+/* 充入容量写入量； */
+boolean_T sohd_flg_chrgEndEi;
+
+/* 充电结束标志位读取量； */
+boolean_T sohd_flg_chrgEndEo;
+
+/* 充电结束标志位写入量； */
+uint16_T sohd_pct_bcuSoh;
+
+/* 电池SOH； */
+uint16_T sohd_tm_chrgStartStatEi;
+
+/* 充电前静置时间读取量； */
+uint16_T sohd_tm_chrgStartStatEo;
+
+/* 充电前静置时间写入量； */
+uint16_T sohv_Q_cellCap[28];
+uint16_T sohv_Q_packCapArrEi[10];
+
+/* 10次整包容量（数组）读取量； */
+uint16_T sohv_Q_packCapArrEo[10];
+
+/* 10次整包容量（数组）写入量； */
+uint16_T sohv_V_chrgStartStatEi[28];
+
+/* 充电开始时刻的单体电压（数组）读取量； */
+uint16_T sohv_V_chrgStartStatEo[28];
+
+/* 充电开始时刻的单体电压（数组）写入量； */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

src/BLC.c

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'BLC'.
  *
- * Model version                  : 1.24
+ * Model version                  : 1.42
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:13 2021
+ * C/C++ source code generated on : Fri Aug 20 13:55:26 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -15,6 +15,7 @@
 
 #include "BLC.h"
 #include "BLC_private.h"
+#include "div_su32.h"
 #include "look1_iu16lu16n16tu16_binlcase.h"
 #include "mul_s32_loSR_sat.h"
 #include "mul_s32_sat.h"
@@ -22,69 +23,80 @@
 #include "mul_u32_hiSR.h"
 #include "mul_us32_sat.h"
 
+MdlrefDW_BLC_T BLC_MdlrefDW;
+
+/* Block signals (default storage) */
+B_BLC_c_T BLC_B;
+
+/* Block states (default storage) */
+DW_BLC_f_T BLC_DW;
+
 /* System initialize for referenced model: 'BLC' */
-void BLC_Init(DW_BLC_f_T *localDW)
+void BLC_Init(void)
 {
   /* InitializeConditions for UnitDelay: '<S1>/Unit Delay1' */
-  localDW->UnitDelay1_DSTATE = true;
+  BLC_DW.UnitDelay1_DSTATE = true;
 
   /* SystemInitialize for Chart: '<S6>/Chart' */
-  localDW->FristFlg_b = true;
+  BLC_DW.FristFlg_b = true;
 
   /* SystemInitialize for Chart: '<S6>/Chart1' */
-  localDW->FristFlg = true;
+  BLC_DW.FristFlg = true;
 }
 
 /* Output and update for referenced model: 'BLC' */
-void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
+void BLC(void)
 {
   int32_T i_0;
   int32_T q1;
   uint32_T tmp;
-  uint32_T tmp_1;
+  uint32_T tmp_0;
+  int16_T u0;
   uint16_T rtb_uDLookupTable[28];
   uint16_T rtb_uDLookupTable1;
-  uint16_T tmp_0;
+  uint16_T tmp_1;
   uint8_T i;
-  boolean_T rtb_RelationalOperator1;
+  boolean_T RelationalOperator1;
 
   /* Chart: '<S4>/Chart' incorporates:
+   *  Constant: '<S4>/Constant'
+   *  Constant: '<S4>/Constant1'
    *  Constant: '<S4>/Constant2'
    *  Inport: '<Root>/ihd_T_bdtemp'
    */
-  if (ihd_T_bdtemp > 600) {
-    i_0 = localDW->i_close + 1;
-    if (localDW->i_close + 1 > 255) {
+  if (ihd_T_bdtemp > blcc_T_open) {
+    i_0 = BLC_DW.i_close + 1;
+    if (BLC_DW.i_close + 1 > 255) {
       i_0 = 255;
     }
 
-    localDW->i_close = (uint8_T)i_0;
+    BLC_DW.i_close = (uint8_T)i_0;
   } else {
-    localDW->i_close = 0U;
+    BLC_DW.i_close = 0U;
   }
 
-  if (localDW->i_close > 10) {
-    localDW->i_close = 11U;
-    for (i = 0U; i < 28; i++) {
-      localB->blcn_flg_pause[i] = true;
+  if (BLC_DW.i_close > 10) {
+    BLC_DW.i_close = 11U;
+    for (i = 0U; i < cmnc_num_cellUnum; i++) {
+      BLC_B.blcn_flg_pause[i] = true;
     }
   }
 
-  if (ihd_T_bdtemp < 850) {
-    i_0 = localDW->i_open + 1;
-    if (localDW->i_open + 1 > 255) {
+  if (ihd_T_bdtemp < blcc_T_close) {
+    i_0 = BLC_DW.i_open + 1;
+    if (BLC_DW.i_open + 1 > 255) {
       i_0 = 255;
     }
 
-    localDW->i_open = (uint8_T)i_0;
+    BLC_DW.i_open = (uint8_T)i_0;
   } else {
-    localDW->i_open = 0U;
+    BLC_DW.i_open = 0U;
   }
 
-  if (localDW->i_open > 10) {
-    localDW->i_open = 11U;
-    for (i = 0U; i < 28; i++) {
-      localB->blcn_flg_pause[i] = false;
+  if (BLC_DW.i_open > 10) {
+    BLC_DW.i_open = 11U;
+    for (i = 0U; i < cmnc_num_cellUnum; i++) {
+      BLC_B.blcn_flg_pause[i] = false;
     }
   }
 
@@ -94,11 +106,11 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
    *  Constant: '<S7>/Constant2'
    *  UnitDelay: '<S1>/Unit Delay'
    */
-  for (i = 0U; i < 28; i++) {
+  for (i = 0U; i < cmnc_num_cellUnum; i++) {
     if ((int32_T)(blcv_Q_reqCpEo[i] * 16777U) > 0) {
-      localB->blcn_flg_stop[i] = false;
+      BLC_B.blcn_flg_stop[i] = false;
     } else {
-      localB->blcn_flg_stop[i] = true;
+      BLC_B.blcn_flg_stop[i] = true;
     }
   }
 
@@ -107,19 +119,29 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
   /* RelationalOperator: '<S3>/Relational Operator1?' incorporates:
    *  Inport: '<Root>/ihd_st_fault'
    */
-  rtb_RelationalOperator1 = (ihd_st_fault < 1);
+  RelationalOperator1 = (ihd_st_fault < 1);
+  for (i_0 = 0; i_0 < 28; i_0++) {
+    /* SignalConversion generated from: '<S5>/Chart' incorporates:
+     *  Chart: '<S5>/Chart'
+     */
+    blcv_flg_excute[i_0] = false;
+
+    /* Chart: '<S5>/Chart' */
+    blcn_Q_impleCp[i_0] = 0U;
+  }
 
   /* Chart: '<S5>/Chart' incorporates:
    *  Constant: '<S5>/Constant1'
    *  Constant: '<S5>/Constant2'
    *  Inport: '<Root>/ihv_V_cellU'
+   *  SignalConversion generated from: '<S5>/Chart'
    */
-  for (i = 0U; i < 28; i++) {
-    if (rtb_RelationalOperator1 && (!localB->blcn_flg_pause[i]) &&
-        (!localB->blcn_flg_stop[i])) {
-      localB->blcn_flg_blcable[i] = true;
-      i_0 = (int32_T)mul_u32_hiSR(localDW->blcCap[i], 3435973837U, 3U);
-      q1 = (int32_T)(ihv_V_cellU[i] / 1000U);
+  for (i = 0U; i < cmnc_num_cellUnum; i++) {
+    if (RelationalOperator1 && (!BLC_B.blcn_flg_pause[i]) &&
+        (!BLC_B.blcn_flg_stop[i])) {
+      blcv_flg_excute[i] = true;
+      i_0 = (int32_T)mul_u32_hiSR(BLC_DW.blcCap[i], 3435973837U, 3U);
+      q1 = div_su32(ihv_V_cellU[i], blcc_R_esr);
       if ((i_0 < 0) && (q1 < MIN_int32_T - i_0)) {
         i_0 = MIN_int32_T;
       } else if ((i_0 > 0) && (q1 > MAX_int32_T - i_0)) {
@@ -128,42 +150,45 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
         i_0 += q1;
       }
 
-      localDW->blcCap[i] = mul_us32_sat(i_0, 10);
-      tmp_1 = localDW->blcCap[i] / 36000U;
-      if (tmp_1 > 65535U) {
-        tmp_1 = 65535U;
-      }
-
-      localB->blcn_Q_impleCp[i] = (uint16_T)tmp_1;
+      BLC_DW.blcCap[i] = mul_us32_sat(i_0, 10);
     } else {
-      localB->blcn_flg_blcable[i] = false;
+      blcv_flg_excute[i] = false;
     }
   }
 
-  /* End of Chart: '<S5>/Chart' */
+  for (i = 0U; i < cmnc_num_cellUnum; i++) {
+    tmp_0 = BLC_DW.blcCap[i] / 36000U;
+    if (tmp_0 > 65535U) {
+      tmp_0 = 65535U;
+    }
+
+    blcn_Q_impleCp[i] = (uint16_T)tmp_0;
+  }
 
   /* RelationalOperator: '<S3>/Relational Operator' incorporates:
+   *  Constant: '<S3>/Constant'
    *  Inport: '<Root>/ihd_tm_packTime'
    */
-  rtb_RelationalOperator1 = (ihd_tm_parkTime >= 1800U);
+  RelationalOperator1 = (ihd_tm_parkTime >= cmnc_tm_parkTime);
 
   /* Lookup_n-D: '<S6>/1-D Lookup Table1' incorporates:
    *  Inport: '<Root>/ihd_V_cellUMin'
    */
   rtb_uDLookupTable1 = look1_iu16lu16n16tu16_binlcase(ihd_V_cellUMin,
-    rtCP_uDLookupTable1_bp01Data, rtCP_uDLookupTable1_tableData, 12U);
+    (&(cmnm_V_ocv[0])), (&(cmnm_pct_soc[0])), 12U);
 
   /* Lookup_n-D: '<S6>/1-D Lookup Table' incorporates:
    *  Inport: '<Root>/ihv_V_cellU'
    */
   for (i_0 = 0; i_0 < 28; i_0++) {
     rtb_uDLookupTable[i_0] = look1_iu16lu16n16tu16_binlcase(ihv_V_cellU[i_0],
-      rtCP_uDLookupTable_bp01Data, rtCP_uDLookupTable_tableData, 12U);
+      (&(cmnm_V_ocv[0])), (&(cmnm_pct_soc[0])), 12U);
   }
 
   /* End of Lookup_n-D: '<S6>/1-D Lookup Table' */
 
   /* Chart: '<S6>/Chart' incorporates:
+   *  Constant: '<S6>/Constant'
    *  Constant: '<S6>/Constant1'
    *  Constant: '<S6>/Constant2'
    *  Inport: '<Root>/ihd_V_cellUMin'
@@ -172,11 +197,11 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
    *  Lookup_n-D: '<S6>/1-D Lookup Table1'
    */
   i = 0U;
-  if (localDW->FristFlg_b && rtb_RelationalOperator1) {
-    while (i < 28) {
-      if (ihv_V_cellU[i] - ihd_V_cellUMin > 10) {
+  if (BLC_DW.FristFlg_b && RelationalOperator1) {
+    while (i < cmnc_num_cellUnum) {
+      if (ihv_V_cellU[i] - ihd_V_cellUMin > blc_V_low) {
         i_0 = mul_s32_sat(mul_ssu32_sat(rtb_uDLookupTable[i] -
-          rtb_uDLookupTable1, 300U) / 100, 10);
+          rtb_uDLookupTable1, cmnc_Q_ratedCp) / 100, 10);
         if (i_0 < 0) {
           i_0 = 0;
         } else {
@@ -185,14 +210,14 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
           }
         }
 
-        localB->blcn_Q_reqCpNow_j[i] = (uint16_T)i_0;
+        BLC_B.blcn_Q_reqCpNow_j[i] = (uint16_T)i_0;
       }
 
       i++;
     }
   }
 
-  localDW->FristFlg_b = false;
+  BLC_DW.FristFlg_b = false;
 
   /* End of Chart: '<S6>/Chart' */
 
@@ -202,21 +227,21 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
    *  Lookup_n-D: '<S6>/1-D Lookup Table'
    */
   i = 0U;
-  if (localDW->FristFlg && rtb_RelationalOperator1) {
+  if (BLC_DW.FristFlg && RelationalOperator1) {
     rtb_uDLookupTable1 = 65000U;
-    while (i < 28) {
-      tmp_1 = (uint32_T)sohv_Q_cellCap[i] * rtb_uDLookupTable[i];
-      tmp = tmp_1;
-      if (tmp_1 > 2147483647U) {
+    while (i < cmnc_num_cellUnum) {
+      tmp_0 = (uint32_T)sohv_Q_cellCap[i] * rtb_uDLookupTable[i];
+      tmp = tmp_0;
+      if (tmp_0 > 2147483647U) {
         tmp = 2147483647U;
       }
 
       if ((int32_T)tmp / 100 < (int32_T)((rtb_uDLookupTable1 * 52429U) >> 19)) {
-        if (tmp_1 > 2147483647U) {
-          tmp_1 = 2147483647U;
+        if (tmp_0 > 2147483647U) {
+          tmp_0 = 2147483647U;
         }
 
-        i_0 = mul_s32_sat((int32_T)tmp_1 / 100, 10);
+        i_0 = mul_s32_sat((int32_T)tmp_0 / 100, 10);
         if (i_0 < 0) {
           i_0 = 0;
         } else {
@@ -236,14 +261,14 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
           }
         }
 
-        localDW->QL = (uint16_T)i_0;
+        BLC_DW.QL = (uint16_T)i_0;
       }
 
       i++;
     }
   }
 
-  localDW->FristFlg = false;
+  BLC_DW.FristFlg = false;
 
   /* End of Chart: '<S6>/Chart1' */
 
@@ -251,15 +276,15 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
    *  EnablePort: '<S2>/Enable'
    */
   /* UnitDelay: '<S1>/Unit Delay1' */
-  if (localDW->UnitDelay1_DSTATE) {
+  if (BLC_DW.UnitDelay1_DSTATE) {
     /* MinMax: '<S10>/Min' incorporates:
      *  Inport: '<Root>/blcv_Q_reqCpEi'
      */
     rtb_uDLookupTable1 = blcv_Q_reqCpEi[0];
     for (i_0 = 0; i_0 < 27; i_0++) {
-      tmp_0 = blcv_Q_reqCpEi[i_0 + 1];
-      if (rtb_uDLookupTable1 <= tmp_0) {
-        rtb_uDLookupTable1 = tmp_0;
+      tmp_1 = blcv_Q_reqCpEi[i_0 + 1];
+      if (rtb_uDLookupTable1 <= tmp_1) {
+        rtb_uDLookupTable1 = tmp_1;
       }
     }
 
@@ -272,17 +297,18 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
       /* Outputs for IfAction SubSystem: '<S2>/If Action Subsystem1' incorporates:
        *  ActionPort: '<S9>/Action Port'
        */
-      /* Merge: '<S2>/Merge1' incorporates:
+      /* Merge: '<S2>/blcv_Q_totalCpEE_Merge' incorporates:
        *  Inport: '<Root>/blcv_Q_totalCpEi'
        *  Inport: '<S9>/blcv_Q_totalCpEi'
        */
-      memcpy(&localB->Merge1[0], (&(blcv_Q_totalCpEi[0])), 28U * sizeof(uint32_T));
+      memcpy(&BLC_B.blcv_Q_totalCpEE_Merge[0], (&(blcv_Q_totalCpEi[0])), 28U *
+             sizeof(uint32_T));
       for (i_0 = 0; i_0 < 28; i_0++) {
-        /* Merge: '<S2>/Merge' incorporates:
+        /* Merge: '<S2>/blcv_Q_reqCpEE_Merge' incorporates:
          *  Inport: '<Root>/blcv_Q_reqCpEi'
          *  Inport: '<S9>/blcv_Q_reqCpEi'
          */
-        localB->Merge[i_0] = blcv_Q_reqCpEi[i_0];
+        BLC_B.blcv_Q_reqCpEE_Merge[i_0] = blcv_Q_reqCpEi[i_0];
       }
 
       /* End of Outputs for SubSystem: '<S2>/If Action Subsystem1' */
@@ -290,15 +316,15 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
       /* Outputs for IfAction SubSystem: '<S2>/If Action Subsystem' incorporates:
        *  ActionPort: '<S8>/Action Port'
        */
-      /* Merge: '<S2>/Merge1' incorporates:
+      /* Merge: '<S2>/blcv_Q_totalCpEE_Merge' incorporates:
        *  SignalConversion generated from: '<S8>/blcv_Q_totalCpEE1'
        */
-      memset(&localB->Merge1[0], 0, 28U * sizeof(uint32_T));
+      memset(&BLC_B.blcv_Q_totalCpEE_Merge[0], 0, 28U * sizeof(uint32_T));
       for (i_0 = 0; i_0 < 28; i_0++) {
-        /* Merge: '<S2>/Merge' incorporates:
+        /* Merge: '<S2>/blcv_Q_reqCpEE_Merge' incorporates:
          *  SignalConversion generated from: '<S8>/blcv_Q_reqCpEE1'
          */
-        localB->Merge[i_0] = 0U;
+        BLC_B.blcv_Q_reqCpEE_Merge[i_0] = 0U;
       }
 
       /* End of Outputs for SubSystem: '<S2>/If Action Subsystem' */
@@ -311,50 +337,62 @@ void BLC(B_BLC_c_T *localB, DW_BLC_f_T *localDW)
   /* End of Outputs for SubSystem: '<S1>/EE' */
   for (i_0 = 0; i_0 < 28; i_0++) {
     /* Switch: '<S6>/Switch' incorporates:
-     *  Merge: '<S2>/Merge'
+     *  Merge: '<S2>/blcv_Q_reqCpEE_Merge'
      */
-    if (rtb_RelationalOperator1) {
-      /* Saturate: '<S6>/Saturation' incorporates:
-       *  Switch: '<S6>/Switch'
-       */
-      rtb_uDLookupTable1 = localB->blcn_Q_reqCpNow_j[i_0];
-      if (rtb_uDLookupTable1 < 30000) {
-        blcv_Q_reqCpEo[i_0] = rtb_uDLookupTable1;
-      } else {
-        blcv_Q_reqCpEo[i_0] = 30000U;
+    if (RelationalOperator1) {
+      /* Saturate: '<S6>/Saturation' */
+      tmp_0 = cmnc_Q_ratedCp * 100U;
+      if (tmp_0 > 65535U) {
+        tmp_0 = 65535U;
+      }
+
+      rtb_uDLookupTable1 = BLC_B.blcn_Q_reqCpNow_j[i_0];
+      if (rtb_uDLookupTable1 >= (uint16_T)tmp_0) {
+        rtb_uDLookupTable1 = (uint16_T)tmp_0;
       }
 
       /* End of Saturate: '<S6>/Saturation' */
     } else {
-      blcv_Q_reqCpEo[i_0] = localB->Merge[i_0];
+      rtb_uDLookupTable1 = BLC_B.blcv_Q_reqCpEE_Merge[i_0];
     }
 
     /* End of Switch: '<S6>/Switch' */
 
-    /* Sum: '<S5>/Add' incorporates:
-     *  Switch: '<S6>/Switch'
-     */
-    blcv_Q_reqCpEo[i_0] = (uint16_T)(blcv_Q_reqCpEo[i_0] -
-      localB->blcn_Q_impleCp[i_0]);
+    /* Sum: '<S5>/Add' */
+    u0 = (int16_T)(rtb_uDLookupTable1 - blcn_Q_impleCp[i_0]);
+
+    /* Saturate: '<S5>/Saturation' */
+    if (u0 >= 30000) {
+      /* Saturate: '<S5>/Saturation' */
+      blcv_Q_reqCpEo[i_0] = 30000U;
+    } else if (u0 <= 0) {
+      /* Saturate: '<S5>/Saturation' */
+      blcv_Q_reqCpEo[i_0] = 0U;
+    } else {
+      /* Saturate: '<S5>/Saturation' */
+      blcv_Q_reqCpEo[i_0] = (uint16_T)u0;
+    }
+
+    /* End of Saturate: '<S5>/Saturation' */
 
     /* Sum: '<S5>/Add1' incorporates:
-     *  Merge: '<S2>/Merge1'
+     *  Merge: '<S2>/blcv_Q_totalCpEE_Merge'
      */
-    blcv_Q_totalCpEo[i_0] = localB->Merge1[i_0] + localB->blcn_Q_impleCp[i_0];
-
-    /* SignalConversion generated from: '<S5>/Chart' */
-    blcv_flg_excute[i_0] = localB->blcn_flg_blcable[i_0];
+    blcv_Q_totalCpEo[i_0] = BLC_B.blcv_Q_totalCpEE_Merge[i_0] +
+      blcn_Q_impleCp[i_0];
   }
 
   /* Update for UnitDelay: '<S1>/Unit Delay1' incorporates:
    *  Constant: '<S1>/Constant'
    */
-  localDW->UnitDelay1_DSTATE = false;
+  BLC_DW.UnitDelay1_DSTATE = false;
 }
 
 /* Model initialize function */
-void BLC_initialize(const char_T **rt_errorStatus, RT_MODEL_BLC_T *const BLC_M)
+void BLC_initialize(const char_T **rt_errorStatus)
 {
+  RT_MODEL_BLC_T *const BLC_M = &(BLC_MdlrefDW.rtm);
+
   /* Registration code */
 
   /* initialize error status */

src/SFM-1.c

@@ -0,0 +1,175 @@
+
+UINT32 ErrFlg = FALSE; // if ErrFlg != 0, the voltage open-circuit error occurs, while the bit0 stand for cell 0, and so on..
+UINT16 avrgU = 0; //the modfied average cell voltage
+
+void SFM(void)
+{    
+    static UINT16 CellUAry[3][32]={0};
+    static UINT8  RecNr[32]={0};
+    static UINT8  ErrNr[32]={0};
+    static BOOL   FirstFlg = true;
+    static UINT32 ErrUFlg = 0;
+    static UINT32 Flg = 0;
+    UINT8 i;
+    UINT8 j;
+    UINT8 k;
+    UINT32 SumU;
+    UINT8 Num;
+    UINT16 MinU;
+    UINT16 MaxU;     
+//--------------------上电第一时刻对矩阵CellUAry（保存3s电压）初始赋值----------------------
+    if(FirstFlg)
+    {
+        for (j = 0U; j < 3; j++)
+        {
+            for (i = 0U; i < batSeries; i++)
+            {
+                CellUAry[j][i] = eachVoltageValue[i];
+            }
+        }
+    }
+    FirstFlg=false;
+       
+//--------------------矩阵周期迭代数据，最新电压放置最后一行----------------------
+    for (j = 0U; j < 2; j++)
+    {
+        for (i = 0U; i < batSeries; i++)
+        {
+            CellUAry[j][i] = CellUAry[j+1][i];
+        }
+    }
+    for (i = 0U; i < batSeries; i++)
+    {
+        CellUAry[2][i] = eachVoltageValue[i];
+    }
+    
+//-------------相邻单体电压2s内（前降后升50mv）  的连续次数        -------------------
+    for (i = 0U; i < batSeries - 1; i++)
+    {
+        if (((INT16)(CellUAry[2][i] - CellUAry[0][i]) <-50) && ((INT16)(CellUAry[2][i+1] - CellUAry[0][i+1]) >50))
+        {
+            ErrNr[i] =ErrNr[i]+1;
+        }
+        else
+        {
+            ErrNr[i] = 0U;
+        }
+    }
+    
+//-----------------------连续两次满足50mv或者 单次 最近1s变化满足1000mv------------------------
+    for (i = 0U; i < batSeries - 1; i++)
+    {
+        if ((ErrNr[i] >= 2) ||((INT16)(CellUAry[2][i] - CellUAry[1][i]) <-1000) && ((INT16)(CellUAry[2][i+1] - CellUAry[1][i+1]) >1000) )
+        {
+            ErrNr[i]=2;
+            ErrFlg = ErrFlg |(1<<i);
+            ErrUFlg = ErrUFlg |(1<<i);
+            ErrUFlg = ErrUFlg |(1<<(i+1));
+        }
+    }
+    
+//-----------------从判断故障单体编号           向前循环判断单体电压是否下降超过200mv----------------------------------------------
+    for (i = 1U; i < batSeries; i++)
+    {
+        if(((ErrFlg>>i)&0x01)==0x01)
+        {
+            for (k = 1U; k < i; k++)
+            {
+                if((INT16)(CellUAry[2][i-k] - CellUAry[1][i-k]) <-200)
+                {
+                    ErrFlg = ErrFlg |(1<<(i-k));
+                    ErrUFlg = ErrUFlg |(1<<(i-k));
+                }
+                else
+                {
+                    break;
+                }
+            }
+        }
+    }
+    
+//-----------------------B0开路:0 1 2 单体下降1000mv--- -------------------------
+    if(((INT16)(CellUAry[2][0] - CellUAry[1][0]) <-1000)&&((INT16)(CellUAry[2][1] - CellUAry[1][1]) <-1000)&&((INT16)(CellUAry[2][2] - CellUAry[1][2]) <-1000))
+    {
+        ErrUFlg = ErrUFlg|0x07;
+    }
+    
+//-----------------------求正常单体电压的平均--------------------
+    SumU=0;
+    Num=0;
+    MinU=eachVoltageValue[0];
+    MaxU=eachVoltageValue[0];
+    for (i = 0U; i < batSeries ; i++)
+    {
+        if ( ((ErrUFlg>>i)&0x01) == 0)
+        {
+            SumU=SumU+eachVoltageValue[i];
+            Num++;
+            if(MinU>eachVoltageValue[i])
+            {
+                MinU=eachVoltageValue[i];
+            }
+            if(MaxU<eachVoltageValue[i])
+            {
+                MaxU=eachVoltageValue[i];
+            }
+        }
+    }
+    if(MaxU-MinU>3000)
+    {
+        avrgU=(SumU-MaxU-MinU)/(Num-2);
+    }
+    else
+    {
+        avrgU=SumU/Num;
+    }
+//----------------------若上电初始已开路，无变化趋势，则采用压差判断-----------------------------------
+    if(MaxU-MinU>3000)
+    {
+        for (i = 0U; i < batSeries ; i++)
+        {   
+            if ( ((ErrUFlg>>i)&0x01) == 0)
+            {
+	            if((((INT16)(eachVoltageValue[i]-avrgU)>1500)||((INT16)(eachVoltageValue[i]-avrgU)<-1500))&&((Flg>>i)&0x01)==0x01)
+	            {
+	                ErrUFlg = ErrUFlg |(1<<i);
+	                ErrFlg = ErrFlg |(1<<i);
+	            }
+	            
+	            if(((INT16)(eachVoltageValue[i]-avrgU)>1500)||((INT16)(eachVoltageValue[i]-avrgU)<-1500))
+	            {
+	                Flg = Flg |(1<<i);
+	            }
+	            else
+	            {
+	                Flg = Flg&(~(1<<i));
+	            }
+        	}
+        }
+    }
+    
+//----------------------恢复条件：在平均电压的-200~200mv之间的连续次数----------------
+    for (i = 0U; i < batSeries ; i++)
+    {
+        if (((INT16)(eachVoltageValue[i]-avrgU) > -200) &&((INT16)(eachVoltageValue[i]-avrgU) < 200 && ((ErrUFlg>>i)&0x01==1)))
+        {
+            RecNr[i] =RecNr[i] + 1;
+        }
+        else
+        {
+            RecNr[i] =0;
+        }
+    }
+    
+//---------------------------------------------------------------------------
+    for (i = 0U; i < batSeries ; i++)
+    {
+        if (RecNr[i] > 3)
+        {
+            ErrFlg = ErrFlg&(~(1<<i)); //the bit i of ErrUFlg is 0
+            RecNr[i] = 4U;
+            ErrUFlg = ErrUFlg&(~(1<<i)); //the bit i of ErrUFlg is 0
+        }
+    }
+}
+

src/SFM.c

@@ -0,0 +1,164 @@
+
+ // if ErrFlg != 0, the voltage open-circuit error occurs, while the bit0 stand for cell 0, and so on..
+//UINT16 avrgU = 0; //the modfied average cell voltage
+#include "AppSignal.h"
+void SFM(void)
+{
+    static UINT16 CellUAry[3][32]={0};
+    static BOOL   FirstFlg = true;
+    static UINT32 RecFlg=0;
+    static UINT32 changeFlg=0;
+    static UINT32 ErrUFlg = 0;
+    static UINT32 intiFlg = 0;
+	UINT16 avrgU;
+    UINT8 i;
+    UINT8 j;
+    UINT8 k;
+    UINT32 SumU;
+    UINT8 Num;
+    UINT16 MinU;
+    UINT16 MaxU;
+//--------------------上电第一时刻对矩阵CellUAry（保存3s电压）初始赋值----------------------
+    if(FirstFlg)
+    {
+        for (j = 0U; j < 3; j++)
+        {
+            for (i = 0U; i < AppNVMData.BattCellCount; i++)
+            {
+                CellUAry[j][i] = battCellU[i];
+            }
+        }
+    }
+    FirstFlg=false;
+    
+//--------------------矩阵周期迭代数据，最新电压放置最后一行----------------------
+    for (j = 0U; j < 2; j++)
+    {
+        for (i = 0U; i < AppNVMData.BattCellCount; i++)
+        {
+            CellUAry[j][i] = CellUAry[j+1][i];
+        }
+    }
+    for (i = 0U; i < AppNVMData.BattCellCount; i++)
+    {
+        CellUAry[2][i] = battCellU[i];
+    }
+    
+//-------------相邻单体电压2s内（前降后升50mv）连续两次或者单次 最近1s变化满足1000mv-------------------
+    for (i = 0U; i < AppNVMData.BattCellCount - 1; i++)
+    {
+        if ((((INT16)(CellUAry[2][i] - CellUAry[0][i]) <-50) && ((INT16)(CellUAry[2][i+1] - CellUAry[0][i+1]) >50)&&((changeFlg>>i)&0x01)==0x01) ||((INT16)(CellUAry[2][i] - CellUAry[1][i]) <-1000) && ((INT16)(CellUAry[2][i+1] - CellUAry[1][i+1]) >1000) )
+        {
+            ErrFlg = ErrFlg |(1<<i);
+            ErrUFlg = ErrUFlg |(1<<i);
+            ErrUFlg = ErrUFlg |(1<<(i+1));
+        }
+        if (((INT16)(CellUAry[2][i] - CellUAry[0][i]) <-50) && ((INT16)(CellUAry[2][i+1] - CellUAry[0][i+1]) >50))
+        {
+            changeFlg = changeFlg |(1<<i);
+        }
+        else
+        {
+            changeFlg = changeFlg&(~(1<<i));
+        }
+    }
+
+//-----------------从判断故障单体编号           向前循环判断单体电压是否下降超过200mv----------------------------------------------
+    for (i = 1U; i < AppNVMData.BattCellCount; i++)
+    {
+        if(((ErrFlg>>i)&0x01)==0x01)
+        {
+            for (k = 1U; k < i; k++)
+            {
+                if((INT16)(CellUAry[2][i-k] - CellUAry[1][i-k]) <-200)
+                {
+                    ErrFlg = ErrFlg |(1<<(i-k));
+                    ErrUFlg = ErrUFlg |(1<<(i-k));
+                }
+                else
+                {
+                    break;
+                }
+            }
+        }
+    }
+    
+//-----------------------B0开路:0 1 2 单体下降1000mv--- -------------------------
+    if(((INT16)(CellUAry[2][0] - CellUAry[1][0]) <-1000)&&((INT16)(CellUAry[2][1] - CellUAry[1][1]) <-1000)&&((INT16)(CellUAry[2][2] - CellUAry[1][2]) <-1000))
+    {
+        ErrUFlg = ErrUFlg|0x07;
+    }
+    
+//-----------------------求正常单体电压的平均--------------------
+    SumU=0;
+    Num=0;
+    MinU=battCellU[0];
+    MaxU=battCellU[0];
+    for (i = 0U; i < AppNVMData.BattCellCount ; i++)
+    {
+        if ( ((ErrUFlg>>i)&0x01) == 0)
+        {
+            SumU=SumU+battCellU[i];
+            Num++;
+            if(MinU>battCellU[i])
+            {
+                MinU=battCellU[i];
+            }
+            if(MaxU<battCellU[i])
+            {
+                MaxU=battCellU[i];
+            }
+        }
+    }
+    if(MaxU-MinU>3000)
+    {
+        avrgU=(SumU-MaxU-MinU)/(Num-2);
+    }
+    else
+    {
+        avrgU=SumU/Num;
+    }
+//----------------------若上电初始已开路，无变化趋势，则采用压差判断-----------------------------------
+    if(MaxU-MinU>3000)
+    {
+        for (i = 0U; i < AppNVMData.BattCellCount ; i++)
+        {   if ( ((ErrUFlg>>i)&0x01) == 0)
+            {
+                if((((INT16)(battCellU[i]-avrgU)>1500)||((INT16)(battCellU[i]-avrgU)<-1500))&&((intiFlg>>i)&0x01)==0x01)
+                {
+                    ErrUFlg = ErrUFlg |(1<<i);
+                    ErrFlg = ErrFlg |(1<<i);
+                }
+                if(((INT16)(battCellU[i]-avrgU)>1500)||((INT16)(battCellU[i]-avrgU)<-1500))
+                {
+                    intiFlg = intiFlg |(1<<i);
+                }
+                else
+                {
+                    intiFlg = intiFlg&(~(1<<i));
+                }
+            }
+        }
+    }
+    
+//----------------------恢复条件：在平均电压的-200~200mv之间的连续两次----------------
+    for (i = 0U; i < AppNVMData.BattCellCount ; i++)
+    {
+        if (((INT16)(battCellU[i]-avrgU) > -200) &&((INT16)(battCellU[i]-avrgU) < 200 && ((ErrUFlg>>i)&0x01==1))&& ((RecFlg>>i)&0x01==1))
+        {
+            ErrFlg = ErrFlg&(~(1<<i)); 
+            ErrUFlg = ErrUFlg&(~(1<<i)); 
+        }
+        if (((INT16)(battCellU[i]-avrgU) > -200) &&((INT16)(battCellU[i]-avrgU) < 200 && ((ErrUFlg>>i)&0x01==1)))
+        {
+            RecFlg = RecFlg |(1<<i);
+        }
+        else
+        {
+            RecFlg = RecFlg&(~(1<<i));
+        }
+    }
+    
+}
+
+

src/SOH.c

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'SOH'.
  *
- * Model version                  : 1.14
+ * Model version                  : 1.31
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:32 2021
+ * C/C++ source code generated on : Thu Sep  2 11:40:39 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -18,197 +18,238 @@
 #include "div_nde_s32_floor.h"
 #include "look1_iu16lu16n16tu16_binlcase.h"
 
-/* System initialize for referenced model: 'SOH' */
-void SOH_Init(DW_SOH_f_T *localDW)
-{
-  /* InitializeConditions for UnitDelay: '<S4>/Unit Delay1' */
-  localDW->UnitDelay1_DSTATE_m = true;
+MdlrefDW_SOH_T SOH_MdlrefDW;
 
-  /* SystemInitialize for Chart: '<S3>/Chart' */
-  localDW->flg = true;
+/* Block signals (default storage) */
+B_SOH_c_T SOH_B;
+
+/* Block states (default storage) */
+DW_SOH_f_T SOH_DW;
+
+/*
+ * System initialize for atomic system:
+ *    '<S14>/ArrMin'
+ *    '<S15>/ArrMin'
+ */
+void SOH_ArrMin_Init(uint16_T *rty_minCap)
+{
+  *rty_minCap = 0U;
 }
 
-/* Output and update for referenced model: 'SOH' */
-void SOH(B_SOH_c_T *localB, DW_SOH_f_T *localDW)
+/*
+ * Output and update for atomic system:
+ *    '<S14>/ArrMin'
+ *    '<S15>/ArrMin'
+ */
+void SOH_ArrMin(const uint16_T rtu_sohn_Q_cellCap[28], uint8_T rtu_N, uint16_T
+                *rty_minCap)
 {
-  int32_T i_0;
-  int32_T tmp;
-  uint32_T tmp_1;
-  int16_T tmp_0;
-  uint16_T rtb_Divide2[28];
-  uint16_T rtb_Merge1[28];
-  uint16_T rtb_Merge3[10];
-  uint16_T rtb_Divide2_i;
-  uint16_T rtb_Merge2;
-  uint16_T tmp_2;
   uint8_T i;
-  boolean_T rtb_RelationalOperator2;
-  boolean_T rtb_RelationalOperator_e;
 
-  /* Logic: '<S6>/Logical Operator' incorporates:
-   *  Constant: '<S6>/Constant'
-   *  Constant: '<S6>/Constant1'
-   *  Inport: '<Root>/ihd_st_ChrgStat '
-   *  RelationalOperator: '<S6>/Relational Operator'
-   *  RelationalOperator: '<S6>/Relational Operator1'
-   *  UnitDelay: '<S6>/Unit Delay'
-   */
-  rtb_RelationalOperator_e = ((localDW->UnitDelay_DSTATE_e != 2) &&
-    (ihd_st_workStat == 2));
-  for (i_0 = 0; i_0 < 28; i_0++) {
-    /* Switch: '<S6>/Switch' */
-    if (rtb_RelationalOperator_e) {
-      /* Switch: '<S6>/Switch' incorporates:
-       *  Inport: '<Root>/ihv_V_cellU'
-       */
-      sohv_V_chrgStartStatEo[i_0] = ihv_V_cellU[i_0];
-    } else {
-      /* Switch: '<S6>/Switch' incorporates:
-       *  Product: '<S13>/Divide3'
-       *  UnitDelay: '<S6>/Unit Delay1'
-       */
-      sohv_V_chrgStartStatEo[i_0] = localDW->UnitDelay1_DSTATE_i[i_0];
+  /* Chart: '<S14>/ArrMin' */
+  i = 0U;
+  *rty_minCap = rtu_sohn_Q_cellCap[0];
+  while (i < rtu_N) {
+    if (*rty_minCap > rtu_sohn_Q_cellCap[i]) {
+      *rty_minCap = rtu_sohn_Q_cellCap[i];
     }
 
-    /* End of Switch: '<S6>/Switch' */
+    i++;
   }
 
-  /* Abs: '<S6>/Abs' incorporates:
-   *  Inport: '<Root>/ihd_I_curr'
-   */
-  if (ihd_I_curr < 0) {
-    tmp_0 = (int16_T)-ihd_I_curr;
-  } else {
-    tmp_0 = ihd_I_curr;
-  }
+  /* End of Chart: '<S14>/ArrMin' */
+}
 
-  /* End of Abs: '<S6>/Abs' */
+/* System initialize for referenced model: 'SOH' */
+void SOH_Init(void)
+{
+  /* local block i/o variables */
+  uint16_T rtb_minCap;
+  uint16_T rtb_minCap_g;
 
-  /* RelationalOperator: '<S6>/Relational Operator2' */
-  rtb_RelationalOperator2 = (tmp_0 >= 20);
+  /* InitializeConditions for UnitDelay: '<S4>/First_Delay' */
+  SOH_DW.First_Delay_DSTATE = true;
 
-  /* Outputs for Resettable SubSystem: '<S6>/Resettable Subsystem' incorporates:
-   *  ResetPort: '<S9>/Reset'
-   */
-  if (rtb_RelationalOperator2) {
-    /* InitializeConditions for UnitDelay: '<S9>/Unit Delay' */
-    localDW->UnitDelay_DSTATE_o = 0U;
-  }
+  /* InitializeConditions for UnitDelay: '<S3>/Unit Delay' */
+  SOH_DW.UnitDelay_DSTATE_e = true;
 
-  /* Sum: '<S9>/Add' incorporates:
-   *  Constant: '<S9>/Constant'
-   *  UnitDelay: '<S9>/Unit Delay'
+  /* InitializeConditions for UnitDelay: '<S6>/Unit Delay' */
+  SOH_DW.UnitDelay_DSTATE = 1U;
+
+  /* InitializeConditions for Logic: '<S6>/Logical Operator1' incorporates:
+   *  UnitDelay: '<S6>/Unit Delay1'
    */
-  localDW->UnitDelay_DSTATE_o++;
+  SOH_DW.UnitDelay1_DSTATE_j = true;
 
-  /* End of Outputs for SubSystem: '<S6>/Resettable Subsystem' */
+  /* SystemInitialize for Enabled SubSystem: '<S3>/Subsystem' */
+
+  /* SystemInitialize for Chart: '<S14>/ArrMin' */
+  SOH_ArrMin_Init(&rtb_minCap_g);
 
-  /* Switch: '<S10>/Switch3' incorporates:
-   *  UnitDelay: '<S10>/Unit Delay3'
+  /* SystemInitialize for Chart: '<S15>/ArrMin' */
+  SOH_ArrMin_Init(&rtb_minCap);
+
+  /* End of SystemInitialize for SubSystem: '<S3>/Subsystem' */
+
+  /* SystemInitialize for Chart: '<S3>/Chart' */
+  SOH_DW.Fflg = true;
+  SOH_B.Divide1=0;
+  SOH_DW.ResettableSubsystem_MODE=false;
+  SOH_DW.UnitDelay1_DSTATE=false;
+  SOH_DW.UnitDelay1_DSTATE_j=0;
+  SOH_DW.Time_Delay_DSTATE=0;
+  SOH_DW.sohd_tm_chrgStartSta_Delay_DSTA=0;
+  SOH_DW.UnitDelay_DSTATE_e=false;
+  SOH_DW.ResettableSubsystem_MODE_i=false;
+  SOH_DW.Time_Delay_DSTATE_k=0;
+}
+
+/* Disable for referenced model: 'SOH' */
+void SOH_Disable(void)
+{
+  /* Disable for Enabled SubSystem: '<S6>/Resettable Subsystem' */
+  SOH_DW.ResettableSubsystem_MODE_i = false;
+
+  /* End of Disable for SubSystem: '<S6>/Resettable Subsystem' */
+
+  /* Disable for Enabled SubSystem: '<S8>/Resettable Subsystem' */
+  SOH_DW.ResettableSubsystem_MODE = false;
+
+  /* End of Disable for SubSystem: '<S8>/Resettable Subsystem' */
+}
+
+/* Output and update for referenced model: 'SOH' */
+void SOH(void)
+{
+  /* local block i/o variables */
+  uint16_T rtb_minCap;
+  uint16_T rtb_minCap_g;
+  int32_T i_0;
+  int32_T i_1;
+  uint32_T rtb_LogicalOperator1_0;
+  int16_T tmp;
+  uint16_T rtb_sohn_V_chrgStartStatEE_Merg[28];
+  uint16_T rtb_sohn_Q_packCapArrEE_Merge[10];
+  uint16_T maxV;
+  uint16_T rtb_sohn_Q_chrgEE_Merge;
+  uint16_T tmp_0;
+  uint8_T i;
+  boolean_T rtb_RelationalOperator1_n;
+  boolean_T rtb_sohn_flg_chrgEndEE_Merge;
+  
+
+  /* MinMax: '<S18>/Min' incorporates:
+   *  Inport: '<Root>/sohv_Q_packCapArrEi '
    */
-  localDW->UnitDelay3_DSTATE = (rtb_RelationalOperator2 ||
-    localDW->UnitDelay3_DSTATE);
+  rtb_sohn_Q_chrgEE_Merge = sohv_Q_packCapArrEi[0];
 
-  /* Switch: '<S6>/Switch2' incorporates:
-   *  Constant: '<S9>/Constant1'
-   *  Product: '<S9>/Divide'
-   *  Sum: '<S6>/Add'
-   *  UnitDelay: '<S6>/Unit Delay2'
-   *  UnitDelay: '<S9>/Unit Delay'
+  /* MinMax: '<S18>/Min1' incorporates:
+   *  Inport: '<Root>/sohv_Q_packCapArrEi '
    */
-  if (rtb_RelationalOperator_e) {
-    /* Switch: '<S6>/Switch1' incorporates:
-     *  Constant: '<S6>/Constant3'
-     *  Inport: '<Root>/ihd_tm_parkTime'
-     *  UnitDelay: '<S10>/Unit Delay3'
+  maxV = sohv_Q_packCapArrEi[0];
+  for (i_0 = 0; i_0 < 9; i_0++) {
+    /* MinMax: '<S18>/Min' incorporates:
+     *  Inport: '<Root>/sohv_Q_packCapArrEi '
+     *  MinMax: '<S18>/Min1'
      */
-    if (localDW->UnitDelay3_DSTATE) {
-      tmp_1 = 0U;
-    } else {
-      tmp_1 = ihd_tm_parkTime;
+    tmp_0 = sohv_Q_packCapArrEi[i_0 + 1];
+    if (rtb_sohn_Q_chrgEE_Merge >= tmp_0) {
+      rtb_sohn_Q_chrgEE_Merge = sohv_Q_packCapArrEi[i_0 + 1];
     }
 
-    /* End of Switch: '<S6>/Switch1' */
-
-    /* Outputs for Resettable SubSystem: '<S6>/Resettable Subsystem' incorporates:
-     *  ResetPort: '<S9>/Reset'
+    /* MinMax: '<S18>/Min1' incorporates:
+     *  Inport: '<Root>/sohv_Q_packCapArrEi '
+     *  MinMax: '<S18>/Min'
      */
-    localDW->UnitDelay2_DSTATE = (uint16_T)(localDW->UnitDelay_DSTATE_o / 10U +
-      tmp_1);
-
-    /* End of Outputs for SubSystem: '<S6>/Resettable Subsystem' */
+    if (maxV <= tmp_0) {
+      maxV = tmp_0;
+    }
   }
 
-  /* End of Switch: '<S6>/Switch2' */
-
-  /* Saturate: '<S6>/Saturation' incorporates:
-   *  UnitDelay: '<S6>/Unit Delay2'
-   */
-  sohd_tm_chrgStartStatEo = localDW->UnitDelay2_DSTATE;
-
   /* If: '<S5>/If' incorporates:
+   *  Constant: '<S18>/C'
+   *  Constant: '<S18>/C1'
+   *  Constant: '<S18>/Constant'
    *  Inport: '<Root>/sohd_Q_chrgEi '
    *  Inport: '<Root>/sohd_flg_chrgEndEi '
+   *  Inport: '<Root>/sohv_Q_cellCapArrEi 1'
    *  Inport: '<Root>/sohv_Q_packCapArrEi '
    *  Inport: '<Root>/sohv_V_chrgStartStatEi '
-   *  Inport: '<S16>/sohd_Q_chrgEi '
-   *  Inport: '<S16>/sohd_flg_chrgEndEi '
-   *  Inport: '<S16>/sohv_Q_packCapArrEi '
-   *  Inport: '<S16>/sohv_V_chrgStartStatEi '
-   *  Merge: '<S5>/Merge1'
-   *  Merge: '<S5>/Merge2'
-   *  Merge: '<S5>/Merge3'
-   *  RelationalOperator: '<S14>/Relational Operator2'
+   *  Inport: '<S20>/sohd_Q_chrgEi '
+   *  Inport: '<S20>/sohd_flg_chrgEndEi '
+   *  Inport: '<S20>/sohv_Q_cellCapArrEi'
+   *  Inport: '<S20>/sohv_Q_packCapArrEi '
+   *  Inport: '<S20>/sohv_V_chrgStartStatEi '
+   *  Logic: '<S18>/Logical Operator3'
+   *  Merge: '<S5>/sohn_Q_chrgEE_Merge'
+   *  Merge: '<S5>/sohn_Q_packCapArrEE_Merge'
+   *  Merge: '<S5>/sohn_V_chrgStartStatEE_Merge'
+   *  MinMax: '<S18>/Min'
+   *  MinMax: '<S18>/Min1'
+   *  RelationalOperator: '<S18>/Relational Operator1'
+   *  RelationalOperator: '<S18>/Relational Operator2'
+   *  RelationalOperator: '<S18>/Relational Operator3'
+   *  UnitDelay: '<S6>/sohv_V_chrgStartEo_Delay'
    */
-  if (sohd_Q_chrgEi < 300) {
+  if ((sohd_Q_chrgEi < cmnc_Q_ratedCp) && (!((real_T)rtb_sohn_Q_chrgEE_Merge *
+        0.1 < 1.0)) && (maxV <= cmnc_Q_ratedCp)) {
     /* Outputs for IfAction SubSystem: '<S5>/TureAction' incorporates:
-     *  ActionPort: '<S16>/Action Port'
+     *  ActionPort: '<S20>/Action Port'
      */
-    rtb_RelationalOperator_e = sohd_flg_chrgEndEi;
+    rtb_sohn_flg_chrgEndEE_Merge = sohd_flg_chrgEndEi;
     for (i_0 = 0; i_0 < 28; i_0++) {
-      rtb_Merge1[i_0] = sohv_V_chrgStartStatEi[i_0];
+      rtb_sohn_V_chrgStartStatEE_Merg[i_0] = sohv_V_chrgStartStatEi[i_0];
     }
 
-    rtb_Merge2 = sohd_Q_chrgEi;
+    rtb_sohn_Q_chrgEE_Merge = sohd_Q_chrgEi;
     for (i_0 = 0; i_0 < 10; i_0++) {
-      rtb_Merge3[i_0] = sohv_Q_packCapArrEi[i_0];
+      rtb_sohn_Q_packCapArrEE_Merge[i_0] = sohv_Q_packCapArrEi[i_0];
+    }
+
+    for (i_0 = 0; i_0 < 28; i_0++) {
+      sohv_Q_cellCapArrEo[i_0] = sohv_Q_cellCapArrEi[i_0];
     }
 
     /* End of Outputs for SubSystem: '<S5>/TureAction' */
   } else {
     /* Outputs for IfAction SubSystem: '<S5>/FalseAction' incorporates:
-     *  ActionPort: '<S15>/Action Port'
-     */
-    /* SignalConversion generated from: '<S15>/sohn_V_chrgStartStatEE1' incorporates:
-     *  Merge: '<S5>/Merge1'
+     *  ActionPort: '<S19>/Action Port'
      */
     for (i_0 = 0; i_0 < 28; i_0++) {
-      rtb_Merge1[i_0] = 0U;
-    }
+      /* SignalConversion generated from: '<S19>/sohn_V_chrgStartStatEE1' incorporates:
+       *  Merge: '<S5>/sohn_V_chrgStartStatEE_Merge'
+       */
+      rtb_sohn_V_chrgStartStatEE_Merg[i_0] = 0U;
 
-    /* End of SignalConversion generated from: '<S15>/sohn_V_chrgStartStatEE1' */
+      /* Product: '<S19>/Product1' incorporates:
+       *  Constant: '<S19>/Constant7'
+       *  UnitDelay: '<S6>/sohv_V_chrgStartEo_Delay'
+       */
+      sohv_Q_cellCapArrEo[i_0] = (uint16_T)((((5U * cmnc_Q_ratedCp) >> 3) *
+        52429U) >> 15);
+    }
 
-    /* Product: '<S15>/Product' incorporates:
-     *  Constant: '<S15>/Constant2'
-     *  Constant: '<S15>/Constant5'
-     *  Merge: '<S5>/Merge3'
+    /* Product: '<S19>/Product' incorporates:
+     *  Constant: '<S19>/Constant5'
+     *  Merge: '<S5>/sohn_Q_packCapArrEE_Merge'
      */
     for (i_0 = 0; i_0 < 10; i_0++) {
-      rtb_Merge3[i_0] = 299U;
+      rtb_sohn_Q_packCapArrEE_Merge[i_0] = (uint16_T)((((5U * cmnc_Q_ratedCp) >>
+        3) * 52429U) >> 15);
     }
 
-    /* End of Product: '<S15>/Product' */
+    /* End of Product: '<S19>/Product' */
 
-    /* SignalConversion generated from: '<S15>/sohn_flg_chrgEndEE1' incorporates:
-     *  Constant: '<S15>/Constant'
+    /* SignalConversion generated from: '<S19>/sohn_flg_chrgEndEE1' incorporates:
+     *  Constant: '<S19>/Constant'
      */
-    rtb_RelationalOperator_e = false;
+    rtb_sohn_flg_chrgEndEE_Merge = false;
 
-    /* SignalConversion generated from: '<S15>/sohn_Q_chrgEE1' incorporates:
-     *  Constant: '<S15>/Constant3'
-     *  Merge: '<S5>/Merge2'
+    /* SignalConversion generated from: '<S19>/sohn_Q_chrgEE1' incorporates:
+     *  Constant: '<S19>/Constant3'
+     *  Merge: '<S5>/sohn_Q_chrgEE_Merge'
      */
-    rtb_Merge2 = 0U;
+    rtb_sohn_Q_chrgEE_Merge = 0U;
 
     /* End of Outputs for SubSystem: '<S5>/FalseAction' */
   }
@@ -216,192 +257,311 @@ void SOH(B_SOH_c_T *localB, DW_SOH_f_T *localDW)
   /* End of If: '<S5>/If' */
 
   /* Logic: '<S4>/Logical Operator' incorporates:
+   *  Constant: '<S4>/Constant1'
    *  Inport: '<Root>/ihd_tm_parkTime'
-   *  Merge: '<S5>/Merge2'
+   *  Merge: '<S5>/sohn_Q_chrgEE_Merge'
    *  RelationalOperator: '<S4>/Relational Operator'
    *  RelationalOperator: '<S4>/Relational Operator1'
-   *  UnitDelay: '<S4>/Unit Delay1'
+   *  UnitDelay: '<S4>/First_Delay'
    */
-  rtb_RelationalOperator_e = ((ihd_tm_parkTime >= 1800U) &&
-    rtb_RelationalOperator_e && (rtb_Merge2 >= 150) &&
-    localDW->UnitDelay1_DSTATE_m);
+  rtb_sohn_flg_chrgEndEE_Merge = ((ihd_tm_parkTime >= cmnc_tm_parkTime) &&
+    rtb_sohn_flg_chrgEndEE_Merge && (rtb_sohn_Q_chrgEE_Merge >= 150) &&
+    SOH_DW.First_Delay_DSTATE);
 
   /* Outputs for Enabled SubSystem: '<S3>/Subsystem' incorporates:
    *  EnablePort: '<S13>/Enable'
    */
-  if (rtb_RelationalOperator_e) {
+  if (rtb_sohn_flg_chrgEndEE_Merge) {
     for (i_0 = 0; i_0 < 28; i_0++) {
-      /* Lookup_n-D: '<S13>/1-D Lookup Table1' incorporates:
-       *  Merge: '<S5>/Merge1'
-       *  Product: '<S13>/Divide3'
-       *  UnitDelay: '<S6>/Unit Delay1'
+      /* Lookup_n-D: '<S13>/SOC2' incorporates:
+       *  Inport: '<Root>/ihv_V_cellU'
        */
-      localDW->UnitDelay1_DSTATE_i[i_0] = look1_iu16lu16n16tu16_binlcase
-        (rtb_Merge1[i_0], rtCP_uDLookupTable1_bp01Data,
-         rtCP_uDLookupTable1_tableData, 12U);
+      SOC2[i_0] = look1_iu16lu16n16tu16_binlcase(ihv_V_cellU[i_0],
+        (&(cmnm_V_ocv[0])), (&(cmnm_pct_soc[0])), 12U);
 
-      /* Lookup_n-D: '<S13>/1-D Lookup Table2' incorporates:
-       *  Inport: '<Root>/ihv_V_cellU'
+      /* Lookup_n-D: '<S13>/SOC1' incorporates:
+       *  Merge: '<S5>/sohn_V_chrgStartStatEE_Merge'
        */
-      rtb_Divide2_i = look1_iu16lu16n16tu16_binlcase(ihv_V_cellU[i_0],
-        rtCP_uDLookupTable2_bp01Data, rtCP_uDLookupTable2_tableData, 12U);
+      SOC1[i_0] = look1_iu16lu16n16tu16_binlcase
+        (rtb_sohn_V_chrgStartStatEE_Merg[i_0], (&(cmnm_V_ocv[0])),
+         (&(cmnm_pct_soc[0])), 12U);
 
       /* Product: '<S13>/Divide4' incorporates:
-       *  Product: '<S13>/Divide2'
-       *  Product: '<S13>/Divide3'
+       *  Lookup_n-D: '<S13>/SOC1'
+       *  Lookup_n-D: '<S13>/SOC2'
        *  Sum: '<S13>/Add'
-       *  UnitDelay: '<S6>/Unit Delay1'
        */
-      localDW->UnitDelay1_DSTATE_i[i_0] = (uint16_T)((((uint32_T)(uint16_T)
-        (rtb_Divide2_i - localDW->UnitDelay1_DSTATE_i[i_0]) << 6) / 125U * 125U)
-        >> 6);
+      deltaSoc[i_0] = (uint16_T)((((uint32_T)(uint16_T)(SOC2[i_0] - SOC1[i_0]) <<
+        6) / 125U * 125U) >> 6);
 
-      /* Product: '<S13>/Divide1' incorporates:
-       *  Product: '<S13>/Divide3'
-       *  UnitDelay: '<S6>/Unit Delay1'
+      /* Product: '<S13>/d' incorporates:
+       *  Product: '<S13>/Divide4'
        */
-      tmp = localDW->UnitDelay1_DSTATE_i[i_0];
+      i_1 = deltaSoc[i_0];
 
-      /* Product: '<S13>/Divide1' incorporates:
-       *  Merge: '<S5>/Merge2'
+      /* Product: '<S13>/d' incorporates:
+       *  Merge: '<S5>/sohn_Q_chrgEE_Merge'
        */
-      localB->Divide1[i_0] = (uint16_T)(((uint16_T)((uint32_T)tmp == 0U ?
-        MAX_uint32_T : ((uint32_T)rtb_Merge2 << 9) / tmp) * 125U) >> 6);
+      SOH_B.d[i_0] = (uint16_T)(((uint16_T)((uint32_T)i_1 == 0U ? MAX_uint32_T :
+        ((uint32_T)rtb_sohn_Q_chrgEE_Merge << 9) / i_1) * 125U) >> 6);
 
-      /* Product: '<S13>/Divide5' */
-      rtb_Divide2_i = (uint16_T)((((uint32_T)rtb_Divide2_i << 6) / 125U * 125U) >>
+      /* Product: '<S13>/Divide5' incorporates:
+       *  Lookup_n-D: '<S13>/SOC2'
+       */
+      minDischrg[i_0] = (uint16_T)((((uint32_T)SOC2[i_0] << 6) / 125U * 125U) >>
         6);
 
       /* Product: '<S13>/Divide3' incorporates:
        *  Constant: '<S13>/Constant3'
-       *  Product: '<S13>/Divide1'
+       *  Product: '<S13>/Divide5'
+       *  Product: '<S13>/d'
        *  Sum: '<S13>/Add1'
-       *  UnitDelay: '<S6>/Unit Delay1'
        */
-      localDW->UnitDelay1_DSTATE_i[i_0] = (uint16_T)(((uint16_T)(((uint32_T)
-        (uint16_T)(1000 - rtb_Divide2_i) * localB->Divide1[i_0]) >> 10) * 16777U)
-        >> 14);
+      minChrg[i_0] = (uint16_T)(((uint16_T)(((uint32_T)(uint16_T)(1000 -
+        minDischrg[i_0]) * SOH_B.d[i_0]) >> 10) * 16777U) >> 14);
 
-      /* Lookup_n-D: '<S13>/1-D Lookup Table2' incorporates:
-       *  Product: '<S13>/Divide1'
-       *  Product: '<S13>/Divide2'
+      /* Product: '<S13>/Divide2' incorporates:
+       *  Product: '<S13>/Divide5'
+       *  Product: '<S13>/d'
        */
-      rtb_Divide2[i_0] = (uint16_T)(((uint16_T)(((uint32_T)localB->Divide1[i_0] *
-        rtb_Divide2_i) >> 10) * 16777U) >> 14);
+      minDischrg[i_0] = (uint16_T)(((uint16_T)(((uint32_T)SOH_B.d[i_0] *
+        minDischrg[i_0]) >> 10) * 16777U) >> 14);
     }
 
-    /* MinMax: '<S13>/Min1' incorporates:
-     *  Product: '<S13>/Divide2'
+    /* Chart: '<S14>/ArrMin' incorporates:
+     *  Constant: '<S14>/Constant'
      */
-    rtb_Merge2 = rtb_Divide2[0];
+    SOH_ArrMin((&(minChrg[0])), cmnc_num_cellUnum, &rtb_minCap_g);
 
-    /* MinMax: '<S13>/Min' incorporates:
-     *  Product: '<S13>/Divide3'
-     *  UnitDelay: '<S6>/Unit Delay1'
+    /* Chart: '<S15>/ArrMin' incorporates:
+     *  Constant: '<S15>/Constant'
      */
-    rtb_Divide2_i = localDW->UnitDelay1_DSTATE_i[0];
-    for (i_0 = 0; i_0 < 27; i_0++) {
-      /* MinMax: '<S13>/Min1' incorporates:
-       *  Product: '<S13>/Divide2'
-       */
-      tmp_2 = rtb_Divide2[i_0 + 1];
-      if (rtb_Merge2 >= tmp_2) {
-        rtb_Merge2 = tmp_2;
-      }
+    SOH_ArrMin((&(minDischrg[0])), cmnc_num_cellUnum, &rtb_minCap);
 
-      /* MinMax: '<S13>/Min' incorporates:
-       *  Product: '<S13>/Divide3'
-       *  UnitDelay: '<S6>/Unit Delay1'
-       */
-      tmp_2 = localDW->UnitDelay1_DSTATE_i[i_0 + 1];
-      if (rtb_Divide2_i >= tmp_2) {
-        rtb_Divide2_i = tmp_2;
-      }
-    }
-
-    /* Sum: '<S13>/Add2' incorporates:
-     *  MinMax: '<S13>/Min'
-     *  MinMax: '<S13>/Min1'
-     */
-    localB->Add2 = (uint16_T)((uint32_T)rtb_Divide2_i + rtb_Merge2);
+    /* Sum: '<S13>/Add2' */
+    SOH_B.Add2 = (uint16_T)((uint32_T)rtb_minCap_g + rtb_minCap);
   }
 
   /* End of Outputs for SubSystem: '<S3>/Subsystem' */
+
+  /* Logic: '<S3>/Logical Operator' incorporates:
+   *  UnitDelay: '<S3>/Unit Delay'
+   */
+  SOH_DW.UnitDelay_DSTATE_e = (rtb_sohn_flg_chrgEndEE_Merge ||
+    SOH_DW.UnitDelay_DSTATE_e);
   for (i_0 = 0; i_0 < 28; i_0++) {
-    /* SignalConversion generated from: '<S3>/Subsystem' incorporates:
-     *  Product: '<S13>/Divide1'
+    /* Switch: '<S3>/Switch' incorporates:
+     *  UnitDelay: '<S3>/Unit Delay'
+     */
+    if (SOH_DW.UnitDelay_DSTATE_e) {
+      /* Switch: '<S3>/Switch' incorporates:
+       *  Product: '<S13>/d'
+       */
+      sohv_Q_cellCapArrEo[i_0] = SOH_B.d[i_0];
+    }
+
+    /* End of Switch: '<S3>/Switch' */
+
+    /* SignalConversion: '<S3>/Signal Conversion' incorporates:
+     *  Switch: '<S3>/Switch'
      */
-    sohv_Q_cellCap[i_0] = localB->Divide1[i_0];
+    sohv_Q_cellCap[i_0] = sohv_Q_cellCapArrEo[i_0];
   }
 
   /* Chart: '<S3>/Chart' incorporates:
-   *  Merge: '<S5>/Merge3'
+   *  Merge: '<S5>/sohn_Q_packCapArrEE_Merge'
    *  Sum: '<S13>/Add2'
    */
   i = 0U;
-  if (localDW->flg) {
+  if (SOH_DW.Fflg) {
     for (i_0 = 0; i_0 < 10; i_0++) {
-      localB->sohn_Q_packCapArrEo[i_0] = rtb_Merge3[i_0];
+      SOH_B.sohn_Q_packCapArrEo[i_0] = rtb_sohn_Q_packCapArrEE_Merge[i_0];
     }
 
-    tmp = rtb_Merge3[9] - localB->Add2;
-    if (tmp < 0) {
-      tmp = -tmp;
+    i_1 = rtb_sohn_Q_packCapArrEE_Merge[9] - SOH_B.Add2;
+    if (i_1 < 0) {
+      i_1 = -i_1;
     }
 
-    if (rtb_RelationalOperator_e && (tmp < 50)) {
+    if (rtb_sohn_flg_chrgEndEE_Merge && (i_1 < 50)) {
       while (i < 9) {
-        localB->sohn_Q_packCapArrEo[i] = rtb_Merge3[i + 1];
+        SOH_B.sohn_Q_packCapArrEo[i] = rtb_sohn_Q_packCapArrEE_Merge[i + 1];
         i++;
       }
 
-      localB->sohn_Q_packCapArrEo[9] = localB->Add2;
+      SOH_B.sohn_Q_packCapArrEo[9] = SOH_B.Add2;
     }
 
     i = 0U;
-    rtb_Merge2 = 0U;
+    rtb_sohn_Q_chrgEE_Merge = 0U;
     while (i < 10) {
-      tmp = rtb_Merge2 + localB->sohn_Q_packCapArrEo[i];
-      if (tmp > 65535) {
-        tmp = 65535;
+      i_1 = rtb_sohn_Q_chrgEE_Merge + SOH_B.sohn_Q_packCapArrEo[i];
+      if (i_1 > 65535) {
+        i_1 = 65535;
       }
 
-      rtb_Merge2 = (uint16_T)tmp;
+      rtb_sohn_Q_chrgEE_Merge = (uint16_T)i_1;
       i++;
     }
 
-    localB->Qavrg = (uint16_T)(rtb_Merge2 / 10U);
+    SOH_B.Qavrg = (uint16_T)(rtb_sohn_Q_chrgEE_Merge / 10U);
   }
 
-  localDW->flg = false;
+  SOH_DW.Fflg = false;
 
   /* End of Chart: '<S3>/Chart' */
   for (i_0 = 0; i_0 < 10; i_0++) {
     /* SignalConversion generated from: '<S3>/Chart' */
-    sohv_Q_packCapArrEo[i_0] = localB->sohn_Q_packCapArrEo[i_0];
+    sohv_Q_packCapArrEo[i_0] = SOH_B.sohn_Q_packCapArrEo[i_0];
   }
 
-  /* UnitDelay: '<S7>/Unit Delay1' incorporates:
-   *  Product: '<S3>/Divide'
+  /* Product: '<S3>/Divide' incorporates:
+   *  Constant: '<S3>/Constant2'
    *  Product: '<S3>/Product'
+   *  UnitDelay: '<S7>/Unit Delay1'
    */
-  sohd_pct_bcuSoh = (uint16_T)((((uint32_T)(uint16_T)(((uint16_T)((localB->Qavrg
-    * 125U) >> 1) * 52429U) >> 15) << 1) / 75U * 5U) >> 2);
+  rtb_sohn_Q_chrgEE_Merge = (uint16_T)(((uint16_T)(cmnc_Q_ratedCp == 0U ?
+    MAX_uint32_T : ((uint32_T)(uint16_T)(((uint16_T)((SOH_B.Qavrg * 125U) >> 1) *
+    52429U) >> 15) << 3) / cmnc_Q_ratedCp) * 5U) >> 2);
 
   /* Saturate: '<S3>/Saturation' incorporates:
    *  UnitDelay: '<S7>/Unit Delay1'
    */
-  if (sohd_pct_bcuSoh >= 1000) {
+  if (rtb_sohn_Q_chrgEE_Merge < 1000) {
+    /* Saturate: '<S3>/Saturation' */
+    sohd_pct_bcuSoh = rtb_sohn_Q_chrgEE_Merge;
+  } else {
     /* Saturate: '<S3>/Saturation' */
     sohd_pct_bcuSoh = 1000U;
   }
 
   /* End of Saturate: '<S3>/Saturation' */
 
+  /* Logic: '<S6>/Logical Operator' incorporates:
+   *  Constant: '<S6>/Constant'
+   *  Constant: '<S6>/Constant1'
+   *  Inport: '<Root>/ihd_st_ChrgStat '
+   *  RelationalOperator: '<S6>/Relational Operator'
+   *  RelationalOperator: '<S6>/Relational Operator1'
+   *  UnitDelay: '<S6>/Unit Delay'
+   */
+  rtb_sohn_flg_chrgEndEE_Merge = ((SOH_DW.UnitDelay_DSTATE != 2) &&
+    (ihd_st_workStat == 2));
+
+  /* Switch: '<S6>/Switch' */
+  if (rtb_sohn_flg_chrgEndEE_Merge) {
+    /* Switch: '<S6>/Switch' incorporates:
+     *  Inport: '<Root>/ihv_V_cellU'
+     */
+    for (i_1 = 0; i_1 < 28; i_1++) {
+      sohv_V_chrgStartStatEo[i_1] = ihv_V_cellU[i_1];
+    }
+
+    /* End of Switch: '<S6>/Switch' */
+  }
+
+  /* End of Switch: '<S6>/Switch' */
+
+  /* Saturate: '<S10>/Saturation' incorporates:
+   *  Constant: '<S10>/Constant'
+   *  Sum: '<S10>/Add'
+   *  UnitDelay: '<S10>/Time_Delay'
+   */
+  if ((uint16_T)(SOH_DW.Time_Delay_DSTATE + 1U) < 60000) {
+    rtb_sohn_Q_chrgEE_Merge = (uint16_T)(SOH_DW.Time_Delay_DSTATE + 1U);
+  } else {
+    rtb_sohn_Q_chrgEE_Merge = 60000U;
+  }
+
+  /* End of Saturate: '<S10>/Saturation' */
+
+  /* RelationalOperator: '<S10>/Relational Operator1' incorporates:
+   *  Constant: '<S10>/para'
+   */
+  rtb_RelationalOperator1_n = (rtb_sohn_Q_chrgEE_Merge >= 20);
+
+  /* Outputs for Enabled SubSystem: '<S6>/Resettable Subsystem' incorporates:
+   *  EnablePort: '<S9>/Enable'
+   */
+  if (rtb_RelationalOperator1_n) {
+    if (!SOH_DW.ResettableSubsystem_MODE_i) {
+      /* InitializeConditions for UnitDelay: '<S9>/Time_Delay' */
+      SOH_DW.Time_Delay_DSTATE_k = 0U;
+      SOH_DW.ResettableSubsystem_MODE_i = true;
+    }
+
+    /* Sum: '<S9>/Add' incorporates:
+     *  Constant: '<S9>/Constant'
+     *  UnitDelay: '<S9>/Time_Delay'
+     */
+    SOH_DW.Time_Delay_DSTATE_k++;
+
+    /* Product: '<S9>/Divide' incorporates:
+     *  Constant: '<S9>/Constant1'
+     *  UnitDelay: '<S9>/Time_Delay'
+     */
+    SOH_B.Divide = (uint16_T)(SOH_DW.Time_Delay_DSTATE_k / 10U);
+  } else {
+    SOH_DW.ResettableSubsystem_MODE_i = false;
+  }
+
+  /* End of Outputs for SubSystem: '<S6>/Resettable Subsystem' */
+
+  /* Logic: '<S6>/Logical Operator1' incorporates:
+   *  UnitDelay: '<S6>/Unit Delay1'
+   */
+  SOH_DW.UnitDelay1_DSTATE_j = (rtb_RelationalOperator1_n ||
+    SOH_DW.UnitDelay1_DSTATE_j);
+
+  /* Switch: '<S6>/Switch2' incorporates:
+   *  Sum: '<S6>/Add'
+   *  UnitDelay: '<S6>/sohd_tm_chrgStartSta_Delay'
+   */
+  if (rtb_sohn_flg_chrgEndEE_Merge) {
+    /* Switch: '<S6>/Switch1' incorporates:
+     *  Constant: '<S6>/Constant3'
+     *  Inport: '<Root>/ihd_tm_parkTime'
+     */
+    if (SOH_DW.UnitDelay1_DSTATE_j) {
+      rtb_LogicalOperator1_0 = 0U;
+    } else {
+      rtb_LogicalOperator1_0 = ihd_tm_parkTime;
+    }
+
+    /* End of Switch: '<S6>/Switch1' */
+    SOH_DW.sohd_tm_chrgStartSta_Delay_DSTA = (uint16_T)(SOH_B.Divide +
+      rtb_LogicalOperator1_0);
+  }
+
+  /* End of Switch: '<S6>/Switch2' */
+
+  /* Saturate: '<S6>/Saturation' incorporates:
+   *  UnitDelay: '<S6>/sohd_tm_chrgStartSta_Delay'
+   */
+  sohd_tm_chrgStartStatEo = SOH_DW.sohd_tm_chrgStartSta_Delay_DSTA;
+
+  /* Abs: '<S6>/Abs' incorporates:
+   *  Inport: '<Root>/ihd_I_curr'
+   */
+  if (ihd_I_curr < 0) {
+    tmp = (int16_T)-ihd_I_curr;
+  } else {
+    tmp = ihd_I_curr;
+  }
+
+  /* End of Abs: '<S6>/Abs' */
+
+  /* Product: '<S10>/Product' incorporates:
+   *  RelationalOperator: '<S6>/Relational Operator2'
+   *  UnitDelay: '<S10>/Time_Delay'
+   */
+  SOH_DW.Time_Delay_DSTATE = (uint16_T)(tmp >= 20 ? (int32_T)
+    rtb_sohn_Q_chrgEE_Merge : 0);
+
   /* UnitDelay: '<S7>/Unit Delay' incorporates:
    *  UnitDelay: '<S6>/Unit Delay'
    */
-  localDW->UnitDelay_DSTATE_e = localDW->UnitDelay_DSTATE_g;
+  SOH_DW.UnitDelay_DSTATE = SOH_DW.UnitDelay_DSTATE_g;
 
   /* Switch: '<S7>/Switch' incorporates:
    *  Constant: '<S7>/Constant'
@@ -413,13 +573,8 @@ void SOH(B_SOH_c_T *localB, DW_SOH_f_T *localDW)
    *  UnitDelay: '<S6>/Unit Delay'
    *  UnitDelay: '<S7>/Unit Delay1'
    */
-  sohd_flg_chrgEndEo = (((localDW->UnitDelay_DSTATE_e == 2) && (ihd_st_workStat
-    != 2)) || (localDW->UnitDelay1_DSTATE != 0));
-
-  /* UnitDelay: '<S8>/Unit Delay' incorporates:
-   *  UnitDelay: '<S6>/Unit Delay'
-   */
-  localDW->UnitDelay_DSTATE_e = localDW->UnitDelay_DSTATE_gh;
+  sohd_flg_chrgEndEo = (((SOH_DW.UnitDelay_DSTATE == 2) && (ihd_st_workStat != 2))
+                        || (SOH_DW.UnitDelay1_DSTATE != 0));
 
   /* Outputs for Enabled SubSystem: '<S8>/Resettable Subsystem' incorporates:
    *  EnablePort: '<S11>/Enable'
@@ -429,33 +584,27 @@ void SOH(B_SOH_c_T *localB, DW_SOH_f_T *localDW)
    *  Inport: '<Root>/ihd_st_ChrgStat '
    */
   if (ihd_st_workStat == 2) {
+    if (!SOH_DW.ResettableSubsystem_MODE) {
+      /* InitializeConditions for UnitDelay: '<S11>/curr_icr_Delay' */
+      SOH_DW.curr_icr_Delay_DSTATE = 0;
+      SOH_DW.ResettableSubsystem_MODE = true;
+    }
+
     /* Sum: '<S11>/Add' incorporates:
      *  Inport: '<Root>/ihd_I_curr'
-     *  UnitDelay: '<S11>/Unit Delay'
+     *  UnitDelay: '<S11>/curr_icr_Delay'
      */
-    i_0 = ihd_I_curr * 10 + localDW->UnitDelay_DSTATE;
+    SOH_DW.curr_icr_Delay_DSTATE += ihd_I_curr * 10;
 
     /* Product: '<S11>/Divide1' incorporates:
      *  Product: '<S11>/Divide'
      *  Sum: '<S11>/Add'
+     *  UnitDelay: '<S11>/curr_icr_Delay'
      */
-    localB->Divide1_c = (uint16_T)(((uint16_T)(((uint32_T)div_nde_s32_floor(i_0,
-      200) << 1) / 4500U) * 5U) >> 2);
-
-    /* Logic: '<S11>/Logical Operator' incorporates:
-     *  Constant: '<S8>/Constant2'
-     *  RelationalOperator: '<S8>/Relational Operator2'
-     *  UnitDelay: '<S4>/Unit Delay1'
-     *  UnitDelay: '<S6>/Unit Delay'
-     */
-    localDW->UnitDelay1_DSTATE_m = (localDW->UnitDelay_DSTATE_e == 2);
-
-    /* Product: '<S11>/Product' incorporates:
-     *  Sum: '<S11>/Add'
-     *  UnitDelay: '<S11>/Unit Delay'
-     *  UnitDelay: '<S4>/Unit Delay1'
-     */
-    localDW->UnitDelay_DSTATE = localDW->UnitDelay1_DSTATE_m ? i_0 : 0;
+    SOH_B.Divide1 = (uint16_T)(((uint16_T)(((uint32_T)div_nde_s32_floor
+      (SOH_DW.curr_icr_Delay_DSTATE, 200) << 1) / 4500U) * 5U) >> 2);
+  } else {
+    SOH_DW.ResettableSubsystem_MODE = false;
   }
 
   /* End of RelationalOperator: '<S8>/Relational Operator1' */
@@ -464,39 +613,30 @@ void SOH(B_SOH_c_T *localB, DW_SOH_f_T *localDW)
   /* SignalConversion generated from: '<S8>/Resettable Subsystem' incorporates:
    *  Product: '<S11>/Divide1'
    */
-  sohd_Q_chrgEo = localB->Divide1_c;
+  sohd_Q_chrgEo = SOH_B.Divide1;
 
-  /* Update for UnitDelay: '<S6>/Unit Delay1' incorporates:
-   *  Switch: '<S6>/Switch'
+  /* Update for UnitDelay: '<S4>/First_Delay' incorporates:
+   *  Constant: '<S4>/Constant2'
    */
-  for (i_0 = 0; i_0 < 28; i_0++) {
-    localDW->UnitDelay1_DSTATE_i[i_0] = sohv_V_chrgStartStatEo[i_0];
-  }
-
-  /* End of Update for UnitDelay: '<S6>/Unit Delay1' */
+  SOH_DW.First_Delay_DSTATE = false;
 
   /* Update for UnitDelay: '<S6>/Unit Delay' incorporates:
    *  Inport: '<Root>/ihd_st_ChrgStat '
    */
-  localDW->UnitDelay_DSTATE_e = ihd_st_workStat;
-
-  /* Update for UnitDelay: '<S4>/Unit Delay1' incorporates:
-   *  Constant: '<S4>/Constant2'
-   */
-  localDW->UnitDelay1_DSTATE_m = false;
+  SOH_DW.UnitDelay_DSTATE = ihd_st_workStat;
 
   /* Update for UnitDelay: '<S7>/Unit Delay' incorporates:
    *  Inport: '<Root>/ihd_st_ChrgStat '
    */
-  localDW->UnitDelay_DSTATE_g = ihd_st_workStat;
+  SOH_DW.UnitDelay_DSTATE_g = ihd_st_workStat;
 
   /* Abs: '<S7>/Abs' incorporates:
    *  Inport: '<Root>/ihd_I_curr'
    */
   if (ihd_I_curr < 0) {
-    tmp_0 = (int16_T)-ihd_I_curr;
+    tmp = (int16_T)-ihd_I_curr;
   } else {
-    tmp_0 = ihd_I_curr;
+    tmp = ihd_I_curr;
   }
 
   /* End of Abs: '<S7>/Abs' */
@@ -506,17 +646,14 @@ void SOH(B_SOH_c_T *localB, DW_SOH_f_T *localDW)
    *  Product: '<S7>/Product'
    *  RelationalOperator: '<S7>/Relational Operator3'
    */
-  localDW->UnitDelay1_DSTATE = (uint16_T)(sohd_flg_chrgEndEo ? tmp_0 < 20 : 0);
-
-  /* Update for UnitDelay: '<S8>/Unit Delay' incorporates:
-   *  Inport: '<Root>/ihd_st_ChrgStat '
-   */
-  localDW->UnitDelay_DSTATE_gh = ihd_st_workStat;
+  SOH_DW.UnitDelay1_DSTATE = (uint16_T)(sohd_flg_chrgEndEo ? tmp < 20 : 0);
 }
 
 /* Model initialize function */
-void SOH_initialize(const char_T **rt_errorStatus, RT_MODEL_SOH_T *const SOH_M)
+void SOH_initialize(const char_T **rt_errorStatus)
 {
+  RT_MODEL_SOH_T *const SOH_M = &(SOH_MdlrefDW.rtm);
+
   /* Registration code */
 
   /* initialize error status */

src/SOH1.c

@@ -0,0 +1,599 @@
+/*
+ * File: SOH.c
+ *
+ * Code generated for Simulink model 'SOH'.
+ *
+ * Model version                  : 1.28
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Wed Sep  1 19:07:37 2021
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: Intel->x86-64 (Windows64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "SOH.h"
+#include "SOH_private.h"
+#include "div_nde_s32_floor.h"
+#include "look1_iu16lu16n16tu16_binlcase.h"
+
+MdlrefDW_SOH_T SOH_MdlrefDW;
+
+/* Block signals (default storage) */
+B_SOH_c_T SOH_B;
+
+/* Block states (default storage) */
+DW_SOH_f_T SOH_DW;
+
+/*
+ * System initialize for atomic system:
+ *    '<S14>/ArrMin'
+ *    '<S15>/ArrMin'
+ */
+void SOH_ArrMin_Init(uint16_T *rty_minCap)
+{
+  *rty_minCap = 0U;
+}
+
+/*
+ * Output and update for atomic system:
+ *    '<S14>/ArrMin'
+ *    '<S15>/ArrMin'
+ */
+void SOH_ArrMin(const uint16_T rtu_sohn_Q_cellCap[28], uint8_T rtu_N, uint16_T
+                *rty_minCap)
+{
+  uint8_T i;
+
+  /* Chart: '<S14>/ArrMin' */
+  i = 0U;
+  *rty_minCap = 1000U;
+  while (i < rtu_N) {
+    if (*rty_minCap > rtu_sohn_Q_cellCap[i]) {
+      *rty_minCap = rtu_sohn_Q_cellCap[i];
+    }
+
+    i++;
+  }
+
+  /* End of Chart: '<S14>/ArrMin' */
+}
+
+/* System initialize for referenced model: 'SOH' */
+void SOH_Init(void)
+{
+  /* local block i/o variables */
+  uint16_T rtb_minCap;
+  uint16_T rtb_minCap_g;
+
+  /* InitializeConditions for UnitDelay: '<S4>/First_Delay' */
+  SOH_DW.First_Delay_DSTATE = true;
+
+  /* InitializeConditions for UnitDelay: '<S6>/Unit Delay' */
+  SOH_DW.UnitDelay_DSTATE = 1U;
+
+  /* SystemInitialize for Enabled SubSystem: '<S3>/Subsystem' */
+
+  /* SystemInitialize for Chart: '<S14>/ArrMin' */
+  SOH_ArrMin_Init(&rtb_minCap_g);
+
+  /* SystemInitialize for Chart: '<S15>/ArrMin' */
+  SOH_ArrMin_Init(&rtb_minCap);
+
+  /* End of SystemInitialize for SubSystem: '<S3>/Subsystem' */
+
+  /* SystemInitialize for Chart: '<S3>/Chart' */
+  SOH_DW.Fflg = true;
+  //
+  SOH_B.Divide1=0;
+  SOH_DW.ResettableSubsystem_MODE=false;
+  SOH_DW.UnitDelay1_DSTATE=false;
+  SOH_DW.statflg_Delay_DSTATE=false;
+  SOH_DW.Time_Delay_DSTATE=0;
+  SOH_DW.sohd_tm_chrgStartSta_Delay_DSTA=0;
+}
+
+/* Disable for referenced model: 'SOH' */
+void SOH_Disable(void)
+{
+  /* Disable for Enabled SubSystem: '<S8>/Resettable Subsystem' */
+  SOH_DW.ResettableSubsystem_MODE = false;
+
+  /* End of Disable for SubSystem: '<S8>/Resettable Subsystem' */
+}
+
+/* Output and update for referenced model: 'SOH' */
+void SOH(void)
+{
+  /* local block i/o variables */
+  uint16_T rtb_minCap;
+  uint16_T rtb_minCap_g;
+  int32_T i_0;
+  int32_T i_1;
+  uint32_T rtb_Switch3_0;
+  int16_T tmp;
+  uint16_T rtb_sohn_V_chrgStartStatEE_Merg[28];
+  uint16_T rtb_sohn_Q_packCapArrEE_Merge[10];
+  uint16_T rtb_sohn_Q_chrgEE_Merge;
+  uint16_T tmp_0;
+  uint8_T i;
+  boolean_T rtb_RelationalOperator2_l;
+  boolean_T sohn_flg_countEn;
+  boolean_T rtb_sohn_flg_chrgEndEE_Merge;
+  uint16_T sohv_Q_packCapMin;
+  uint16_T sohv_Q_packCapMax;
+  /* MinMax: '<S18>/Min' incorporates:
+   *  Inport: '<Root>/sohv_Q_packCapArrEi '
+   */
+  sohv_Q_packCapMax = sohv_Q_packCapArrEi[0];
+  sohv_Q_packCapMin = sohv_Q_packCapArrEi[0];
+  for (i_0 = 0; i_0 < 9; i_0++) {
+   if(sohv_Q_packCapArrEi[i_0]>sohv_Q_packCapMax)
+   	{
+   	sohv_Q_packCapMax=sohv_Q_packCapArrEi[i_0];
+   	}
+      if(sohv_Q_packCapArrEi[i_0]<sohv_Q_packCapMin)
+   	{
+   	sohv_Q_packCapMin=sohv_Q_packCapArrEi[i_0];
+   	}
+  }
+
+  /* If: '<S5>/If' incorporates:
+   *  Constant: '<S18>/C'
+   *  Constant: '<S18>/Constant'
+   *  Inport: '<Root>/sohd_Q_chrgEi '
+   *  Inport: '<Root>/sohd_flg_chrgEndEi '
+   *  Inport: '<Root>/sohv_Q_cellCapArrEi 1'
+   *  Inport: '<Root>/sohv_Q_packCapArrEi '
+   *  Inport: '<Root>/sohv_V_chrgStartStatEi '
+   *  Inport: '<S20>/sohd_Q_chrgEi '
+   *  Inport: '<S20>/sohd_flg_chrgEndEi '
+   *  Inport: '<S20>/sohv_Q_cellCapArrEi'
+   *  Inport: '<S20>/sohv_Q_packCapArrEi '
+   *  Inport: '<S20>/sohv_V_chrgStartStatEi '
+   *  Logic: '<S18>/Logical Operator3'
+   *  Merge: '<S5>/sohn_Q_chrgEE_Merge'
+   *  Merge: '<S5>/sohn_Q_packCapArrEE_Merge'
+   *  Merge: '<S5>/sohn_V_chrgStartStatEE_Merge'
+   *  MinMax: '<S18>/Min'
+   *  RelationalOperator: '<S18>/Relational Operator1'
+   *  RelationalOperator: '<S18>/Relational Operator2'
+   *  UnitDelay: '<S6>/sohv_V_chrgStartEo_Delay'
+   */
+  if ((sohd_Q_chrgEi < cmnc_Q_ratedCp) && (sohv_Q_packCapMax <= cmnc_Q_ratedCp && sohv_Q_packCapMin > 1)) {
+    /* Outputs for IfAction SubSystem: '<S5>/TureAction' incorporates:
+     *  ActionPort: '<S20>/Action Port'
+     */
+    rtb_sohn_flg_chrgEndEE_Merge = sohd_flg_chrgEndEi;
+    for (i_0 = 0; i_0 < 28; i_0++) {
+      rtb_sohn_V_chrgStartStatEE_Merg[i_0] = sohv_V_chrgStartStatEi[i_0];
+    }
+
+    rtb_sohn_Q_chrgEE_Merge = sohd_Q_chrgEi;
+    for (i_0 = 0; i_0 < 10; i_0++) {
+      rtb_sohn_Q_packCapArrEE_Merge[i_0] = sohv_Q_packCapArrEi[i_0];
+    }
+
+    for (i_0 = 0; i_0 < 28; i_0++) {
+      sohv_Q_cellCapArrEo[i_0] = sohv_Q_cellCapArrEi[i_0];
+    }
+
+    /* End of Outputs for SubSystem: '<S5>/TureAction' */
+  } else {
+    /* Outputs for IfAction SubSystem: '<S5>/FalseAction' incorporates:
+     *  ActionPort: '<S19>/Action Port'
+     */
+    for (i_0 = 0; i_0 < 28; i_0++) {
+      /* SignalConversion generated from: '<S19>/sohn_V_chrgStartStatEE1' incorporates:
+       *  Merge: '<S5>/sohn_V_chrgStartStatEE_Merge'
+       */
+      rtb_sohn_V_chrgStartStatEE_Merg[i_0] = 0U;
+
+      /* Product: '<S19>/Product1' incorporates:
+       *  Constant: '<S19>/Constant7'
+       *  UnitDelay: '<S6>/sohv_V_chrgStartEo_Delay'
+       */
+      sohv_Q_cellCapArrEo[i_0] = cmnc_Q_ratedCp;
+    }
+
+    /* Product: '<S19>/Product' incorporates:
+     *  Constant: '<S19>/Constant5'
+     *  Merge: '<S5>/sohn_Q_packCapArrEE_Merge'
+     */
+    for (i_0 = 0; i_0 < 10; i_0++) {
+      rtb_sohn_Q_packCapArrEE_Merge[i_0] =  cmnc_Q_ratedCp;
+
+    }
+
+    /* End of Product: '<S19>/Product' */
+
+    /* SignalConversion generated from: '<S19>/sohn_flg_chrgEndEE1' incorporates:
+     *  Constant: '<S19>/Constant'
+     */
+    rtb_sohn_flg_chrgEndEE_Merge = false;
+
+    /* SignalConversion generated from: '<S19>/sohn_Q_chrgEE1' incorporates:
+     *  Constant: '<S19>/Constant3'
+     *  Merge: '<S5>/sohn_Q_chrgEE_Merge'
+     */
+    rtb_sohn_Q_chrgEE_Merge = 0U;
+
+    /* End of Outputs for SubSystem: '<S5>/FalseAction' */
+  }
+
+  /* End of If: '<S5>/If' */
+
+  /* Logic: '<S4>/Logical Operator' incorporates:
+   *  Constant: '<S4>/Constant1'
+   *  Inport: '<Root>/ihd_tm_parkTime'
+   *  Merge: '<S5>/sohn_Q_chrgEE_Merge'
+   *  RelationalOperator: '<S4>/Relational Operator'
+   *  RelationalOperator: '<S4>/Relational Operator1'
+   *  UnitDelay: '<S4>/First_Delay'
+   */
+  sohn_flg_countEn = ((ihd_tm_parkTime >= cmnc_tm_parkTime) &&
+    rtb_sohn_flg_chrgEndEE_Merge && (rtb_sohn_Q_chrgEE_Merge >= 150) &&
+    SOH_DW.First_Delay_DSTATE);
+
+  /* Outputs for Enabled SubSystem: '<S3>/Subsystem' incorporates:
+   *  EnablePort: '<S13>/Enable'
+   */
+  if (sohn_flg_countEn) {
+    for (i_0 = 0; i_0 < 28; i_0++) {
+      /* Lookup_n-D: '<S13>/SOC2' incorporates:
+       *  Inport: '<Root>/ihv_V_cellU'
+       */
+      SOC2[i_0] = look1_iu16lu16n16tu16_binlcase(ihv_V_cellU[i_0],
+        (&(cmnm_V_ocv[0])), (&(cmnm_pct_soc[0])), 12U);
+
+      /* Lookup_n-D: '<S13>/SOC1' incorporates:
+       *  Merge: '<S5>/sohn_V_chrgStartStatEE_Merge'
+       */
+      SOC1[i_0] = look1_iu16lu16n16tu16_binlcase
+        (rtb_sohn_V_chrgStartStatEE_Merg[i_0], (&(cmnm_V_ocv[0])),
+         (&(cmnm_pct_soc[0])), 12U);
+
+      /* Product: '<S13>/Divide4' incorporates:
+       *  Lookup_n-D: '<S13>/SOC1'
+       *  Lookup_n-D: '<S13>/SOC2'
+       *  Sum: '<S13>/Add'
+       */
+      deltaSoc[i_0] = SOC2[i_0] - SOC1[i_0] ;
+      /* Product: '<S13>/sohn_Q_CellCap' incorporates:
+       *  Product: '<S13>/Divide4'
+       */
+      i_1 = deltaSoc[i_0];
+
+      /* Product: '<S13>/sohn_Q_CellCap' incorporates:
+       *  Merge: '<S5>/sohn_Q_chrgEE_Merge'
+       */
+      SOH_B.sohn_Q_CellCap[i_0] = (uint16_T)(((uint16_T)((uint32_T)i_1 == 0U ?
+        MAX_uint32_T : ((uint32_T)rtb_sohn_Q_chrgEE_Merge << 9) / i_1) * 125U) >>
+        6);
+
+      /* Product: '<S13>/Divide5' incorporates:
+       *  Lookup_n-D: '<S13>/SOC2'
+       */
+      minDischrg[i_0] = (uint16_T)((((uint32_T)SOC2[i_0] << 6) / 125U * 125U) >>
+        6);
+
+      /* Product: '<S13>/Divide3' incorporates:
+       *  Constant: '<S13>/Constant3'
+       *  Product: '<S13>/Divide5'
+       *  Product: '<S13>/sohn_Q_CellCap'
+       *  Sum: '<S13>/Add1'
+       */
+      minChrg[i_0] = (uint16_T)(((uint16_T)(((uint32_T)(uint16_T)(1000 -
+        minDischrg[i_0]) * SOH_B.sohn_Q_CellCap[i_0]) >> 10) * 16777U) >> 14);
+
+      /* Product: '<S13>/Divide2' incorporates:
+       *  Product: '<S13>/Divide5'
+       *  Product: '<S13>/sohn_Q_CellCap'
+       */
+      minDischrg[i_0] = (uint16_T)(((uint16_T)(((uint32_T)
+        SOH_B.sohn_Q_CellCap[i_0] * minDischrg[i_0]) >> 10) * 16777U) >> 14);
+    }
+
+    /* Chart: '<S14>/ArrMin' incorporates:
+     *  Constant: '<S14>/Constant'
+     */
+    SOH_ArrMin((&(minChrg[0])), cmnc_num_cellUnum, &rtb_minCap_g);
+
+    /* Chart: '<S15>/ArrMin' incorporates:
+     *  Constant: '<S15>/Constant'
+     */
+    SOH_ArrMin((&(minDischrg[0])), cmnc_num_cellUnum, &rtb_minCap);
+
+    /* Sum: '<S13>/Add2' */
+    SOH_B.Add2 = (uint16_T)((uint32_T)rtb_minCap_g + rtb_minCap);
+  }
+
+  /* End of Outputs for SubSystem: '<S3>/Subsystem' */
+  for (i_0 = 0; i_0 < 28; i_0++) {
+    /* SignalConversion generated from: '<S3>/Subsystem' incorporates:
+     *  Product: '<S13>/sohn_Q_CellCap'
+     */
+    
+
+    /* Switch: '<S3>/Switch' */
+    if (sohn_flg_countEn) {
+      /* Switch: '<S3>/Switch' incorporates:
+       *  SignalConversion generated from: '<S3>/Subsystem'
+       */
+      sohv_Q_cellCapArrEo[i_0] = SOH_B.sohn_Q_CellCap[i_0];
+    }
+	sohv_Q_cellCap[i_0] = sohv_Q_cellCapArrEo[i_0];
+
+    /* End of Switch: '<S3>/Switch' */
+  }
+
+  /* Chart: '<S3>/Chart' incorporates:
+   *  Merge: '<S5>/sohn_Q_packCapArrEE_Merge'
+   *  Sum: '<S13>/Add2'
+   */
+  i = 0U;
+  if (SOH_DW.Fflg) {
+    for (i_0 = 0; i_0 < 10; i_0++) {
+      SOH_B.sohn_Q_packCapArrEo[i_0] = rtb_sohn_Q_packCapArrEE_Merge[i_0];
+    }
+
+    i_1 = rtb_sohn_Q_packCapArrEE_Merge[9] - SOH_B.Add2;
+    if (i_1 < 0) {
+      i_1 = -i_1;
+    }
+
+    if (sohn_flg_countEn && (i_1 < 50)) {
+      while (i < 9) {
+        SOH_B.sohn_Q_packCapArrEo[i] = rtb_sohn_Q_packCapArrEE_Merge[i + 1];
+        i++;
+      }
+
+      SOH_B.sohn_Q_packCapArrEo[9] = SOH_B.Add2;
+    }
+
+    i = 0U;
+    rtb_sohn_Q_chrgEE_Merge = 0U;
+    while (i < 10) {
+      i_1 = rtb_sohn_Q_chrgEE_Merge + SOH_B.sohn_Q_packCapArrEo[i];
+      if (i_1 > 65535) {
+        i_1 = 65535;
+      }
+
+      rtb_sohn_Q_chrgEE_Merge = (uint16_T)i_1;
+      i++;
+    }
+
+    SOH_B.Qavrg = (uint16_T)(rtb_sohn_Q_chrgEE_Merge / 10U);
+  }
+
+  SOH_DW.Fflg = false;
+
+  /* End of Chart: '<S3>/Chart' */
+  for (i_0 = 0; i_0 < 10; i_0++) {
+    /* SignalConversion generated from: '<S3>/Chart' */
+    sohv_Q_packCapArrEo[i_0] = SOH_B.sohn_Q_packCapArrEo[i_0];
+  }
+
+  /* UnitDelay: '<S7>/Unit Delay1' incorporates:
+   *  Constant: '<S3>/Constant2'
+   *  Product: '<S3>/Divide'
+   *  Product: '<S3>/Product'
+   */
+  sohd_pct_bcuSoh = (uint16_T)(((uint16_T)(cmnc_Q_ratedCp == 0U ? MAX_uint32_T :
+    ((uint32_T)(uint16_T)(((uint16_T)((SOH_B.Qavrg * 125U) >> 1) * 52429U) >> 15)
+     << 3) / cmnc_Q_ratedCp) * 5U) >> 2);
+
+  /* Saturate: '<S3>/Saturation' incorporates:
+   *  UnitDelay: '<S7>/Unit Delay1'
+   */
+  if (sohd_pct_bcuSoh >= 1000) {
+    /* Saturate: '<S3>/Saturation' */
+    sohd_pct_bcuSoh = 1000U;
+  }
+
+  /* End of Saturate: '<S3>/Saturation' */
+
+  /* Logic: '<S6>/Logical Operator' incorporates:
+   *  Constant: '<S6>/Constant'
+   *  Constant: '<S6>/Constant1'
+   *  Inport: '<Root>/ihd_st_ChrgStat '
+   *  RelationalOperator: '<S6>/Relational Operator'
+   *  RelationalOperator: '<S6>/Relational Operator1'
+   *  UnitDelay: '<S6>/Unit Delay'
+   */
+  rtb_sohn_flg_chrgEndEE_Merge = ((SOH_DW.UnitDelay_DSTATE != 2) &&
+    (ihd_st_workStat == 2));
+
+  /* Switch: '<S6>/Switch' */
+  if (rtb_sohn_flg_chrgEndEE_Merge) {
+    /* Switch: '<S6>/Switch' incorporates:
+     *  Inport: '<Root>/ihv_V_cellU'
+     */
+    for (i_1 = 0; i_1 < 28; i_1++) {
+      sohv_V_chrgStartStatEo[i_1] = ihv_V_cellU[i_1];
+    }
+
+    /* End of Switch: '<S6>/Switch' */
+  }
+
+  /* End of Switch: '<S6>/Switch' */
+
+  /* Abs: '<S6>/Abs' incorporates:
+   *  Inport: '<Root>/ihd_I_curr'
+   */
+  if (ihd_I_curr < 0) {
+    tmp = (int16_T)-ihd_I_curr;
+  } else {
+    tmp = ihd_I_curr;
+  }
+
+  /* End of Abs: '<S6>/Abs' */
+
+  /* RelationalOperator: '<S6>/Relational Operator2' */
+  rtb_RelationalOperator2_l = (tmp >= 20);
+
+  /* Outputs for Resettable SubSystem: '<S6>/Resettable Subsystem' incorporates:
+   *  ResetPort: '<S9>/Reset'
+   */
+  if (rtb_RelationalOperator2_l) {
+    /* InitializeConditions for UnitDelay: '<S9>/Time_Delay' */
+    SOH_DW.Time_Delay_DSTATE = 0U;
+  }
+
+  /* Sum: '<S9>/Add' incorporates:
+   *  Constant: '<S9>/Constant'
+   *  UnitDelay: '<S9>/Time_Delay'
+   */
+  SOH_DW.Time_Delay_DSTATE++;
+
+  /* End of Outputs for SubSystem: '<S6>/Resettable Subsystem' */
+
+  /* Switch: '<S10>/Switch3' incorporates:
+   *  UnitDelay: '<S10>/statflg_Delay'
+   */
+  SOH_DW.statflg_Delay_DSTATE = (rtb_RelationalOperator2_l ||
+    SOH_DW.statflg_Delay_DSTATE);
+
+  /* Switch: '<S6>/Switch2' incorporates:
+   *  Constant: '<S9>/Constant1'
+   *  Product: '<S9>/Divide'
+   *  Sum: '<S6>/Add'
+   *  UnitDelay: '<S6>/sohd_tm_chrgStartSta_Delay'
+   *  UnitDelay: '<S9>/Time_Delay'
+   */
+  if (rtb_sohn_flg_chrgEndEE_Merge) {
+    /* Switch: '<S6>/Switch1' incorporates:
+     *  Constant: '<S6>/Constant3'
+     *  Inport: '<Root>/ihd_tm_parkTime'
+     */
+    if (SOH_DW.statflg_Delay_DSTATE) {
+      rtb_Switch3_0 = 0U;
+    } else {
+      rtb_Switch3_0 = ihd_tm_parkTime;
+    }
+
+    /* End of Switch: '<S6>/Switch1' */
+
+    /* Outputs for Resettable SubSystem: '<S6>/Resettable Subsystem' incorporates:
+     *  ResetPort: '<S9>/Reset'
+     */
+    SOH_DW.sohd_tm_chrgStartSta_Delay_DSTA = (uint16_T)(SOH_DW.Time_Delay_DSTATE
+      / 10U + rtb_Switch3_0);
+
+    /* End of Outputs for SubSystem: '<S6>/Resettable Subsystem' */
+  }
+
+  /* End of Switch: '<S6>/Switch2' */
+
+  /* Saturate: '<S6>/Saturation' incorporates:
+   *  UnitDelay: '<S6>/sohd_tm_chrgStartSta_Delay'
+   */
+  sohd_tm_chrgStartStatEo = SOH_DW.sohd_tm_chrgStartSta_Delay_DSTA;
+  /* UnitDelay: '<S7>/Unit Delay' incorporates:
+   *  UnitDelay: '<S6>/Unit Delay'
+   */
+  SOH_DW.UnitDelay_DSTATE = SOH_DW.UnitDelay_DSTATE_g;
+
+  /* Switch: '<S7>/Switch' incorporates:
+   *  Constant: '<S7>/Constant'
+   *  Constant: '<S7>/Constant1'
+   *  Inport: '<Root>/ihd_st_ChrgStat '
+   *  Logic: '<S7>/Logical Operator'
+   *  RelationalOperator: '<S7>/Relational Operator'
+   *  RelationalOperator: '<S7>/Relational Operator1'
+   *  UnitDelay: '<S6>/Unit Delay'
+   *  UnitDelay: '<S7>/Unit Delay1'
+   */
+  sohd_flg_chrgEndEo = (((SOH_DW.UnitDelay_DSTATE == 2) && (ihd_st_workStat != 2))
+                        || (SOH_DW.UnitDelay1_DSTATE != 0));
+
+  /* Outputs for Enabled SubSystem: '<S8>/Resettable Subsystem' incorporates:
+   *  EnablePort: '<S11>/Enable'
+   */
+  /* RelationalOperator: '<S8>/Relational Operator1' incorporates:
+   *  Constant: '<S8>/Constant1'
+   *  Inport: '<Root>/ihd_st_ChrgStat '
+   */
+  if (ihd_st_workStat == 2) {
+    if (!SOH_DW.ResettableSubsystem_MODE) {
+      /* InitializeConditions for UnitDelay: '<S11>/curr_icr_Delay' */
+      SOH_DW.curr_icr_Delay_DSTATE = 0;
+      SOH_DW.ResettableSubsystem_MODE = true;
+    }
+
+    /* Sum: '<S11>/Add' incorporates:
+     *  Inport: '<Root>/ihd_I_curr'
+     *  UnitDelay: '<S11>/curr_icr_Delay'
+     */
+    SOH_DW.curr_icr_Delay_DSTATE += ihd_I_curr * 10;
+
+    /* Product: '<S11>/Divide1' incorporates:
+     *  Product: '<S11>/Divide'
+     *  Sum: '<S11>/Add'
+     *  UnitDelay: '<S11>/curr_icr_Delay'
+     */
+    SOH_B.Divide1 = (uint16_T)(((uint16_T)(((uint32_T)div_nde_s32_floor
+      (SOH_DW.curr_icr_Delay_DSTATE, 200) << 1) / 4500U) * 5U) >> 2);
+  } else {
+    SOH_DW.ResettableSubsystem_MODE = false;
+  }
+
+  /* End of RelationalOperator: '<S8>/Relational Operator1' */
+  /* End of Outputs for SubSystem: '<S8>/Resettable Subsystem' */
+
+  /* SignalConversion generated from: '<S8>/Resettable Subsystem' incorporates:
+   *  Product: '<S11>/Divide1'
+   */
+  sohd_Q_chrgEo = SOH_B.Divide1;
+
+  /* Update for UnitDelay: '<S4>/First_Delay' incorporates:
+   *  Constant: '<S4>/Constant2'
+   */
+  SOH_DW.First_Delay_DSTATE = false;
+
+  /* Update for UnitDelay: '<S6>/Unit Delay' incorporates:
+   *  Inport: '<Root>/ihd_st_ChrgStat '
+   */
+  SOH_DW.UnitDelay_DSTATE = ihd_st_workStat;
+
+  /* Update for UnitDelay: '<S7>/Unit Delay' incorporates:
+   *  Inport: '<Root>/ihd_st_ChrgStat '
+   */
+  SOH_DW.UnitDelay_DSTATE_g = ihd_st_workStat;
+
+  /* Abs: '<S7>/Abs' incorporates:
+   *  Inport: '<Root>/ihd_I_curr'
+   */
+  if (ihd_I_curr < 0) {
+    tmp = (int16_T)-ihd_I_curr;
+  } else {
+    tmp = ihd_I_curr;
+  }
+
+  /* End of Abs: '<S7>/Abs' */
+
+  /* Update for UnitDelay: '<S7>/Unit Delay1' incorporates:
+   *  Logic: '<S7>/Logical Operator1'
+   *  Product: '<S7>/Product'
+   *  RelationalOperator: '<S7>/Relational Operator3'
+   */
+  SOH_DW.UnitDelay1_DSTATE = (uint16_T)(sohd_flg_chrgEndEo ? tmp < 20 : 0);
+}
+
+/* Model initialize function */
+void SOH_initialize(const char_T **rt_errorStatus)
+{
+  RT_MODEL_SOH_T *const SOH_M = &(SOH_MdlrefDW.rtm);
+
+  /* Registration code */
+
+  /* initialize error status */
+  rtmSetErrorStatusPointer(SOH_M, rt_errorStatus);
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

src/app.c

@@ -16,7 +16,7 @@ void appInit(void *arg)
     AppTaskGpsInit(arg);
     AppTaskUartInit(arg);
     AppTaskCanInit(arg);
-    //AppTaskBcuInit(arg);
+    AppTaskBcuInit(arg);
 }
 void main_entry(void) 
 {

src/const_params.c

@@ -1,56 +1,37 @@
-/*
- * const_params.c
- *
- * Code generation for model "SOC".
- *
- * Model version              : 1.24
- * Simulink Coder version : 9.4 (R2020b) 29-Jul-2020
- * C source code generated on : Thu Aug 12 17:54:23 2021
- */
 #include "rtwtypes.h"
 
 extern const real_T rtCP_pooled_2yqyybnjRkAg[13];
-const real_T rtCP_pooled_2yqyybnjRkAg[13] = { 1.8, 1.1, 7.4, 1.5,
-  1.2000000000000002, 1.1, 1.2000000000000002, 1.3, 1.2000000000000002,
-  1.2000000000000002, 1.1, 1.2000000000000002, 1.0 } ;
+const real_T rtCP_pooled_2yqyybnjRkAg[13] = {   1.8, 1.1, 7.4, 1.5, 1.2000000000000002, 1.1, 1.2000000000000002, 1.3, 1.2000000000000002, 1.2000000000000002, 1.1, 1.2000000000000002, 1.0 } ;
 
 extern const real_T rtCP_pooled_4Oms9Dl3djxK[13];
-const real_T rtCP_pooled_4Oms9Dl3djxK[13] = { 3.88, 5.0600000000000005, 4.45,
-  10.8, 12.89, 12.99, 14.33, 10.75, 9.38, 10.34, 10.59, 11.950000000000001,
-  11.51 } ;
+const real_T rtCP_pooled_4Oms9Dl3djxK[13] = {   3.88, 5.0600000000000005, 4.45, 10.8, 12.89, 12.99, 14.33, 10.75, 9.38, 10.34, 10.59, 11.950000000000001, 11.51 } ;
 
 extern const int16_T rtCP_pooled_5IPKsXGYnKyg[4];
-const int16_T rtCP_pooled_5IPKsXGYnKyg[4] = { 50, 100, 200, 400 } ;
+const int16_T rtCP_pooled_5IPKsXGYnKyg[4] = {   50, 100, 200, 400 } ;
 
 extern const real_T rtCP_pooled_6SXVB9Ymnskr[13];
-const real_T rtCP_pooled_6SXVB9Ymnskr[13] = { 2.2, 2.0, 2.0, 1.9000000000000001,
-  1.8, 1.8, 1.8, 1.7000000000000002, 1.7000000000000002, 1.7000000000000002,
-  1.7000000000000002, 1.8, 1.8 } ;
+const real_T rtCP_pooled_6SXVB9Ymnskr[13] = {   2.2, 2.0, 2.0, 1.9000000000000001, 1.8, 1.8, 1.8, 1.7000000000000002, 1.7000000000000002, 1.7000000000000002, 1.7000000000000002, 1.8, 1.8 } ;
 
 extern const int16_T rtCP_pooled_9BXJPVWA4BJI[3];
-const int16_T rtCP_pooled_9BXJPVWA4BJI[3] = { -400, -200, -100 } ;
+const int16_T rtCP_pooled_9BXJPVWA4BJI[3] = {   -400, -200, -100 } ;
 
 extern const real_T rtCP_pooled_Hq33G5zkPPgT[13];
-const real_T rtCP_pooled_Hq33G5zkPPgT[13] = { 0.0, 5.0, 10.0, 20.0, 30.0, 40.0,
-  50.0, 60.0, 70.0, 80.0, 90.0, 95.0, 100.0 } ;
+const real_T rtCP_pooled_Hq33G5zkPPgT[13] = {   0.0, 5.0, 10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0, 90.0, 95.0, 100.0 } ;
 
 extern const uint16_T rtCP_pooled_J4vL4j1Fk1zG[3];
-const uint16_T rtCP_pooled_J4vL4j1Fk1zG[3] = { 3100U, 3270U, 3380U } ;
+const uint16_T rtCP_pooled_J4vL4j1Fk1zG[3] = {   3100U, 3270U, 3380U } ;
 
 extern const uint16_T rtCP_pooled_P4rYfkzHqAVr[4];
-const uint16_T rtCP_pooled_P4rYfkzHqAVr[4] = { 4126U, 4128U, 4132U, 4137U } ;
+const uint16_T rtCP_pooled_P4rYfkzHqAVr[4] = {   4126U, 4128U, 4132U, 4137U } ;
 
 extern const uint16_T rtCP_pooled_Pg3wA7d95Txu[13];
-const uint16_T rtCP_pooled_Pg3wA7d95Txu[13] = { 0U, 50U, 100U, 200U, 300U, 400U,
-  500U, 600U, 700U, 800U, 900U, 950U, 1000U } ;
+const uint16_T rtCP_pooled_Pg3wA7d95Txu[13] = {   0U, 50U, 100U, 200U, 300U, 400U, 500U, 600U, 700U, 800U, 900U, 950U, 1000U } ;
 
 extern const uint16_T rtCP_pooled_neXCembKU1Do[13];
-const uint16_T rtCP_pooled_neXCembKU1Do[13] = { 3311U, 3411U, 3476U, 3553U,
-  3610U, 3638U, 3674U, 3758U, 3845U, 3942U, 4051U, 4106U, 4175U } ;
+const uint16_T rtCP_pooled_neXCembKU1Do[13] = {   3311U, 3411U, 3476U, 3553U, 3610U, 3638U, 3674U, 3758U, 3845U, 3942U, 4051U, 4106U, 4175U } ;
 
 extern const uint16_T rtCP_pooled_qce4hcBQN8fp[4];
-const uint16_T rtCP_pooled_qce4hcBQN8fp[4] = { 4125U, 4128U, 4132U, 4137U } ;
+const uint16_T rtCP_pooled_qce4hcBQN8fp[4] = {   4125U, 4128U, 4132U, 4137U } ;
 
 extern const real_T rtCP_pooled_ygMHmGen2OIb[13];
-const real_T rtCP_pooled_ygMHmGen2OIb[13] = { 3.311, 3.411, 3.476, 3.553, 3.61,
-  3.638, 3.674, 3.758, 3.845, 3.942, 4.051, 4.106, 4.175 } ;
+const real_T rtCP_pooled_ygMHmGen2OIb[13] = {   3.311, 3.411, 3.476, 3.553, 3.61, 3.638, 3.674, 3.758, 3.845, 3.942, 4.051, 4.106, 4.175 } ;

src/div_repeat_u32.c

@@ -0,0 +1,45 @@
+/*
+ * File: div_repeat_u32.c
+ *
+ * Code generated for Simulink model 'SOC'.
+ *
+ * Model version                  : 1.41
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Wed Sep  1 15:06:09 2021
+ */
+
+#include "rtwtypes.h"
+#include "div_repeat_u32.h"
+
+uint32_T div_repeat_u32(uint32_T numerator, uint32_T denominator, uint32_T
+  nRepeatSub)
+{
+  uint32_T iRepeatSub;
+  uint32_T quotient;
+  boolean_T numeratorExtraBit;
+  if (denominator == 0U) {
+    quotient = MAX_uint32_T;
+
+    /* Divide by zero handler */
+  } else {
+    quotient = numerator / denominator;
+    numerator %= denominator;
+    for (iRepeatSub = 0U; iRepeatSub < nRepeatSub; iRepeatSub++) {
+      numeratorExtraBit = (numerator >= 2147483648U);
+      numerator <<= 1U;
+      quotient <<= 1U;
+      if (numeratorExtraBit || (numerator >= denominator)) {
+        quotient++;
+        numerator -= denominator;
+      }
+    }
+  }
+
+  return quotient;
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

src/div_su32.c

@@ -0,0 +1,32 @@
+/*
+ * File: div_su32.c
+ *
+ * Code generated for Simulink model 'BLC'.
+ *
+ * Model version                  : 1.33
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Wed Aug 18 14:01:45 2021
+ */
+
+#include "rtwtypes.h"
+#include "div_su32.h"
+
+int32_T div_su32(uint32_T numerator, uint32_T denominator)
+{
+  int32_T quotient;
+  if (denominator == 0U) {
+    quotient = MAX_int32_T;
+
+    /* Divide by zero handler */
+  } else {
+    quotient = (int32_T)(numerator / denominator);
+  }
+
+  return quotient;
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

src/div_uus32_sat.c

@@ -0,0 +1,35 @@
+/*
+ * File: div_uus32_sat.c
+ *
+ * Code generated for Simulink model 'SFM'.
+ *
+ * Model version                  : 1.37
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Tue Aug 24 16:20:45 2021
+ */
+
+#include "rtwtypes.h"
+#include "div_uus32_sat.h"
+
+uint32_T div_uus32_sat(uint32_T numerator, int32_T denominator)
+{
+  uint32_T quotient;
+  if (denominator == 0) {
+    quotient = MAX_uint32_T;
+
+    /* Divide by zero handler */
+  } else if (denominator < 0) {
+    quotient = 0U;
+  } else {
+    quotient = numerator / (denominator < 0 ? ~(uint32_T)denominator + 1U :
+      (uint32_T)denominator);
+  }
+
+  return quotient;
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

src/ert_main.c

@@ -3,9 +3,9 @@
  *
  * Code generated for Simulink model 'BCU'.
  *
- * Model version                  : 1.13
+ * Model version                  : 1.19
  * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
- * C/C++ source code generated on : Thu Aug 12 17:54:42 2021
+ * C/C++ source code generated on : Fri Aug 20 13:49:53 2021
  *
  * Target selection: ert.tlc
  * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -17,6 +17,7 @@
 #include <stdio.h>              /* This ert_main.c example uses printf/fflush */
 #include "BCU.h"                       /* Model's header file */
 #include "rtwtypes.h"
+#include "zero_crossing_types.h"
 
 /*
  * Associating rt_OneStep with a real-time clock or interrupt service routine

src/mul_s32_hiSR.c

@@ -0,0 +1,27 @@
+/*
+ * File: mul_s32_hiSR.c
+ *
+ * Code generated for Simulink model 'SFM'.
+ *
+ * Model version                  : 1.36
+ * Simulink Coder version         : 9.4 (R2020b) 29-Jul-2020
+ * C/C++ source code generated on : Tue Aug 24 14:53:06 2021
+ */
+
+#include "rtwtypes.h"
+#include "mul_wide_s32.h"
+#include "mul_s32_hiSR.h"
+
+int32_T mul_s32_hiSR(int32_T a, int32_T b, uint32_T aShift)
+{
+  uint32_T u32_chi;
+  uint32_T u32_clo;
+  mul_wide_s32(a, b, &u32_chi, &u32_clo);
+  return (int32_T)u32_chi >> aShift;
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */