#include "hal_uart.h"
#include "hc32_ll_dma.h"
#include "hc32_ll_aos.h"

#include "FreeRTOS.h"
#include "task.h"


/************************************串口2**********************************************************/
__IO en_flag_status_t m_enRxFrameEnd;
__IO uint16_t m_u16RxLen;
uint8_t m_au8RxBuf[APP_FRAME_LEN_MAX];

/*******************************************************************************
 * Function implementation - global ('extern') and local ('static')
 ******************************************************************************/

/**
 * @brief  DMA transfer complete IRQ callback function.
 * @param  None
 * @retval None
 */
static void RX_DMA_TC_IrqCallback(void)
{
    m_enRxFrameEnd = SET;
    m_u16RxLen = APP_FRAME_LEN_MAX;

    USART_FuncCmd(USART_UNIT, USART_RX_TIMEOUT, DISABLE);

    DMA_ClearTransCompleteStatus(RX_DMA_UNIT, RX_DMA_TC_FLAG);
}

/**
 * @brief  DMA transfer complete IRQ callback function.
 * @param  None
 * @retval None
 */
static void TX_DMA_TC_IrqCallback(void)
{
    USART_FuncCmd(USART_UNIT, USART_INT_TX_CPLT, ENABLE);

    DMA_ClearTransCompleteStatus(TX_DMA_UNIT, TX_DMA_TC_FLAG);
}

/**
 * @brief  Initialize DMA.
 * @param  None
 * @retval int32_t:
 *           - LL_OK:                   Initialize successfully.
 *           - LL_ERR_INVD_PARAM:       Initialization parameters is invalid.
 */
static int32_t DMA_Config(void)
{
    int32_t i32Ret;
    stc_dma_init_t stcDmaInit;
    stc_dma_llp_init_t stcDmaLlpInit;
    stc_irq_signin_config_t stcIrqSignConfig;
    static stc_dma_llp_descriptor_t stcLlpDesc;

    /* DMA&AOS FCG enable */
    RX_DMA_FCG_ENABLE();
    TX_DMA_FCG_ENABLE();
    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE);

    /* USART_RX_DMA */
    (void)DMA_StructInit(&stcDmaInit);
    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = ARRAY_SZ(m_au8RxBuf);
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)m_au8RxBuf;
    stcDmaInit.u32SrcAddr = ((uint32_t)(&USART_UNIT->DR) + 2UL);
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_INC;
    i32Ret = DMA_Init(RX_DMA_UNIT, RX_DMA_CH, &stcDmaInit);
    if (LL_OK == i32Ret) {
        (void)DMA_LlpStructInit(&stcDmaLlpInit);
        stcDmaLlpInit.u32State = DMA_LLP_ENABLE;
        stcDmaLlpInit.u32Mode  = DMA_LLP_WAIT;
        stcDmaLlpInit.u32Addr  = (uint32_t)&stcLlpDesc;
        (void)DMA_LlpInit(RX_DMA_UNIT, RX_DMA_CH, &stcDmaLlpInit);

        stcLlpDesc.SARx   = stcDmaInit.u32SrcAddr;
        stcLlpDesc.DARx   = stcDmaInit.u32DestAddr;
        stcLlpDesc.DTCTLx = (stcDmaInit.u32TransCount << DMA_DTCTL_CNT_POS) | (stcDmaInit.u32BlockSize << DMA_DTCTL_BLKSIZE_POS);;
        stcLlpDesc.LLPx   = (uint32_t)&stcLlpDesc;
        stcLlpDesc.CHCTLx = stcDmaInit.u32SrcAddrInc | stcDmaInit.u32DestAddrInc | stcDmaInit.u32DataWidth |  \
                            stcDmaInit.u32IntEn      | stcDmaLlpInit.u32State    | stcDmaLlpInit.u32Mode;

        DMA_ReconfigLlpCmd(RX_DMA_UNIT, RX_DMA_CH, ENABLE);
        DMA_ReconfigCmd(RX_DMA_UNIT, ENABLE);
        AOS_SetTriggerEventSrc(RX_DMA_RECONF_TRIG_SEL, RX_DMA_RECONF_TRIG_EVT_SRC);

        stcIrqSignConfig.enIntSrc = RX_DMA_TC_INT_SRC;
        stcIrqSignConfig.enIRQn  = RX_DMA_TC_IRQn;
        stcIrqSignConfig.pfnCallback = &RX_DMA_TC_IrqCallback;
        (void)INTC_IrqSignIn(&stcIrqSignConfig);
        NVIC_ClearPendingIRQ(stcIrqSignConfig.enIRQn);
        NVIC_SetPriority(stcIrqSignConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
        NVIC_EnableIRQ(stcIrqSignConfig.enIRQn);

        AOS_SetTriggerEventSrc(RX_DMA_TRIG_SEL, RX_DMA_TRIG_EVT_SRC);

        DMA_Cmd(RX_DMA_UNIT, ENABLE);
        DMA_TransCompleteIntCmd(RX_DMA_UNIT, RX_DMA_TC_INT, ENABLE);
        (void)DMA_ChCmd(RX_DMA_UNIT, RX_DMA_CH, ENABLE);
    }

    /* USART_TX_DMA */
    (void)DMA_StructInit(&stcDmaInit);
    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = ARRAY_SZ(m_au8RxBuf);
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)(&USART_UNIT->DR);
    stcDmaInit.u32SrcAddr = (uint32_t)m_au8RxBuf;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;
    i32Ret = DMA_Init(TX_DMA_UNIT, TX_DMA_CH, &stcDmaInit);
    if (LL_OK == i32Ret) {
        stcIrqSignConfig.enIntSrc = TX_DMA_TC_INT_SRC;
        stcIrqSignConfig.enIRQn  = TX_DMA_TC_IRQn;
        stcIrqSignConfig.pfnCallback = &TX_DMA_TC_IrqCallback;
        (void)INTC_IrqSignIn(&stcIrqSignConfig);
        NVIC_ClearPendingIRQ(stcIrqSignConfig.enIRQn);
        NVIC_SetPriority(stcIrqSignConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
        NVIC_EnableIRQ(stcIrqSignConfig.enIRQn);

        AOS_SetTriggerEventSrc(TX_DMA_TRIG_SEL, TX_DMA_TRIG_EVT_SRC);

        DMA_Cmd(TX_DMA_UNIT, ENABLE);
        DMA_TransCompleteIntCmd(TX_DMA_UNIT, TX_DMA_TC_INT, ENABLE);
    }

    return i32Ret;
}

/**
 * @brief  Configure TMR0.
 * @param  [in] u16TimeoutBits:         Timeout bits
 * @retval None
 */
static void TMR0_Config(uint16_t u16TimeoutBits)
{
    uint16_t u16Div;
    uint16_t u16Delay;
    uint16_t u16CompareValue;
    stc_tmr0_init_t stcTmr0Init;

    TMR0_FCG_ENABLE();

    /* Initialize TMR0 base function. */
    stcTmr0Init.u32ClockSrc = TMR0_CLK_SRC_XTAL32;
    stcTmr0Init.u32ClockDiv = TMR0_CLK_DIV8;
    stcTmr0Init.u32Func     = TMR0_FUNC_CMP;
    if (TMR0_CLK_DIV1 == stcTmr0Init.u32ClockDiv) {
        u16Delay = 7U;
    } else if (TMR0_CLK_DIV2 == stcTmr0Init.u32ClockDiv) {
        u16Delay = 5U;
    } else if ((TMR0_CLK_DIV4 == stcTmr0Init.u32ClockDiv) || \
               (TMR0_CLK_DIV8 == stcTmr0Init.u32ClockDiv) || \
               (TMR0_CLK_DIV16 == stcTmr0Init.u32ClockDiv)) {
        u16Delay = 3U;
    } else {
        u16Delay = 2U;
    }

    u16Div = (uint16_t)1U << (stcTmr0Init.u32ClockDiv >> TMR0_BCONR_CKDIVA_POS);
    u16CompareValue = ((u16TimeoutBits + u16Div - 1U) / u16Div) - u16Delay;
    stcTmr0Init.u16CompareValue = u16CompareValue;
    (void)TMR0_Init(TMR0_UNIT, TMR0_CH, &stcTmr0Init);

    TMR0_HWStartCondCmd(TMR0_UNIT, TMR0_CH, ENABLE);
    TMR0_HWClearCondCmd(TMR0_UNIT, TMR0_CH, ENABLE);
}

/**
 * @brief  USART RX timeout IRQ callback.
 * @param  None
 * @retval None
 */
static void USART_RxTimeout_IrqCallback(void)
{
    if (m_enRxFrameEnd != SET) {
        m_enRxFrameEnd = SET;
        m_u16RxLen = APP_FRAME_LEN_MAX - (uint16_t)DMA_GetTransCount(RX_DMA_UNIT, RX_DMA_CH);

        /* Trigger for re-config USART RX DMA */
        AOS_SW_Trigger();
    }

    TMR0_Stop(TMR0_UNIT, TMR0_CH);

    USART_ClearStatus(USART_UNIT, USART_FLAG_RX_TIMEOUT);
}

/**
 * @brief  USART TX complete IRQ callback function.
 * @param  None
 * @retval None
 */
static void USART_TxComplete_IrqCallback(void)
{
    USART_FuncCmd(USART_UNIT, (USART_TX | USART_INT_TX_CPLT), DISABLE);

    TMR0_Stop(TMR0_UNIT, TMR0_CH);

    USART_ClearStatus(USART_UNIT, USART_FLAG_RX_TIMEOUT);

    USART_FuncCmd(USART_UNIT, USART_RX_TIMEOUT, ENABLE);

    USART_ClearStatus(USART_UNIT, USART_FLAG_TX_CPLT);
}

/**
 * @brief  USART RX error IRQ callback.
 * @param  None
 * @retval None
 */
static void USART_RxError_IrqCallback(void)
{
    (void)USART_ReadData(USART_UNIT);

    USART_ClearStatus(USART_UNIT, (USART_FLAG_PARITY_ERR | USART_FLAG_FRAME_ERR | USART_FLAG_OVERRUN));
}

/**
 * @brief  Main function of UART DMA project
 * @param  None
 * @retval int32_t return value, if needed
 */
void bsp_uart2_init(void)
{
    stc_usart_uart_init_t stcUartInit;
    stc_irq_signin_config_t stcIrqSigninConfig;

    /* Initialize DMA. */
    (void)DMA_Config();
    /* Initialize TMR0. */
    TMR0_Config(USART_TIMEOUT_BITS);
    /* Configure USART RX/TX pin. */
    GPIO_SetFunc(USART_RX_PORT, USART_RX_PIN, USART_RX_GPIO_FUNC);
    GPIO_SetFunc(USART_TX_PORT, USART_TX_PIN, USART_TX_GPIO_FUNC);
    /* Enable peripheral clock */
    USART_FCG_ENABLE();
    /* Initialize UART. */
    (void)USART_UART_StructInit(&stcUartInit);
    stcUartInit.u32ClockDiv = USART_CLK_DIV64;
    stcUartInit.u32CKOutput = USART_CK_OUTPUT_ENABLE;
    stcUartInit.u32Baudrate = USART_BAUDRATE;
    stcUartInit.u32OverSampleBit = USART_OVER_SAMPLE_8BIT;
    if (LL_OK != USART_UART_Init(USART_UNIT, &stcUartInit, NULL)) {       
    }

    /* Register TX complete IRQ handler. */
    stcIrqSigninConfig.enIRQn = USART_TX_CPLT_IRQn;
    stcIrqSigninConfig.enIntSrc = USART_TX_CPLT_INT_SRC;
    stcIrqSigninConfig.pfnCallback = &USART_TxComplete_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrqSigninConfig);
    NVIC_ClearPendingIRQ(stcIrqSigninConfig.enIRQn);
    NVIC_SetPriority(stcIrqSigninConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
    NVIC_EnableIRQ(stcIrqSigninConfig.enIRQn);

    /* Register RX error IRQ handler. */
    stcIrqSigninConfig.enIRQn = USART_RX_ERR_IRQn;
    stcIrqSigninConfig.enIntSrc = USART_RX_ERR_INT_SRC;
    stcIrqSigninConfig.pfnCallback = &USART_RxError_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrqSigninConfig);
    NVIC_ClearPendingIRQ(stcIrqSigninConfig.enIRQn);
    NVIC_SetPriority(stcIrqSigninConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
    NVIC_EnableIRQ(stcIrqSigninConfig.enIRQn);

    /* Register RX timeout IRQ handler. */
    stcIrqSigninConfig.enIRQn = USART_RX_TIMEOUT_IRQn;
    stcIrqSigninConfig.enIntSrc = USART_RX_TIMEOUT_INT_SRC;
    stcIrqSigninConfig.pfnCallback = &USART_RxTimeout_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrqSigninConfig);
    NVIC_ClearPendingIRQ(stcIrqSigninConfig.enIRQn);
    NVIC_SetPriority(stcIrqSigninConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
    NVIC_EnableIRQ(stcIrqSigninConfig.enIRQn);

    /* Enable TX && RX && RX interrupt function */
    USART_FuncCmd(USART_UNIT, (USART_RX | USART_INT_RX | USART_RX_TIMEOUT | \
                               USART_INT_RX_TIMEOUT|USART_TX), ENABLE);
}

void test_task2(void *pvParameters)
{
	while(1)
	{
		if (SET == m_enRxFrameEnd) 
		{			
				DMA_SetSrcAddr(TX_DMA_UNIT, TX_DMA_CH, (uint32_t)m_au8RxBuf);

				DMA_SetTransCount(TX_DMA_UNIT, TX_DMA_CH, m_u16RxLen);

				(void)DMA_ChCmd(TX_DMA_UNIT, TX_DMA_CH, ENABLE);

				USART_FuncCmd(USART_UNIT, USART_TX, ENABLE);

				m_enRxFrameEnd = RESET;
		}
		vTaskDelay(1);				
	}
}



///************************************串口4**********************************************************/
//__IO en_flag_status_t m_enRxFrameEnd1;
//__IO uint16_t m_u16RxLen1;
//uint8_t m_au8RxBuf1[APP_FRAME_LEN_MAX];

///*******************************************************************************
// * Function implementation - global ('extern') and local ('static')
// ******************************************************************************/

///**
// * @brief  DMA transfer complete IRQ callback function.
// * @param  None
// * @retval None
// */
//static void RX_DMA_TC_IrqCallback(void)
//{
//    m_enRxFrameEnd = SET;
//    m_u16RxLen = APP_FRAME_LEN_MAX;

//    USART_FuncCmd(USART_UNIT, USART_RX_TIMEOUT, DISABLE);

//    DMA_ClearTransCompleteStatus(RX_DMA_UNIT, RX_DMA_TC_FLAG);
//}

///**
// * @brief  DMA transfer complete IRQ callback function.
// * @param  None
// * @retval None
// */
//static void TX_DMA_TC_IrqCallback(void)
//{
//    USART_FuncCmd(USART_UNIT, USART_INT_TX_CPLT, ENABLE);

//    DMA_ClearTransCompleteStatus(TX_DMA_UNIT, TX_DMA_TC_FLAG);
//}

///**
// * @brief  Initialize DMA.
// * @param  None
// * @retval int32_t:
// *           - LL_OK:                   Initialize successfully.
// *           - LL_ERR_INVD_PARAM:       Initialization parameters is invalid.
// */
//static int32_t DMA_Config(void)
//{
//    int32_t i32Ret;
//    stc_dma_init_t stcDmaInit;
//    stc_dma_llp_init_t stcDmaLlpInit;
//    stc_irq_signin_config_t stcIrqSignConfig;
//    static stc_dma_llp_descriptor_t stcLlpDesc;

//    /* DMA&AOS FCG enable */
//    RX_DMA_FCG_ENABLE();
//    TX_DMA_FCG_ENABLE();
//    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE);

//    /* USART_RX_DMA */
//    (void)DMA_StructInit(&stcDmaInit);
//    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
//    stcDmaInit.u32BlockSize = 1UL;
//    stcDmaInit.u32TransCount = ARRAY_SZ(m_au8RxBuf);
//    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
//    stcDmaInit.u32DestAddr = (uint32_t)m_au8RxBuf;
//    stcDmaInit.u32SrcAddr = ((uint32_t)(&USART_UNIT->DR) + 2UL);
//    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
//    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_INC;
//    i32Ret = DMA_Init(RX_DMA_UNIT, RX_DMA_CH, &stcDmaInit);
//    if (LL_OK == i32Ret) {
//        (void)DMA_LlpStructInit(&stcDmaLlpInit);
//        stcDmaLlpInit.u32State = DMA_LLP_ENABLE;
//        stcDmaLlpInit.u32Mode  = DMA_LLP_WAIT;
//        stcDmaLlpInit.u32Addr  = (uint32_t)&stcLlpDesc;
//        (void)DMA_LlpInit(RX_DMA_UNIT, RX_DMA_CH, &stcDmaLlpInit);

//        stcLlpDesc.SARx   = stcDmaInit.u32SrcAddr;
//        stcLlpDesc.DARx   = stcDmaInit.u32DestAddr;
//        stcLlpDesc.DTCTLx = (stcDmaInit.u32TransCount << DMA_DTCTL_CNT_POS) | (stcDmaInit.u32BlockSize << DMA_DTCTL_BLKSIZE_POS);;
//        stcLlpDesc.LLPx   = (uint32_t)&stcLlpDesc;
//        stcLlpDesc.CHCTLx = stcDmaInit.u32SrcAddrInc | stcDmaInit.u32DestAddrInc | stcDmaInit.u32DataWidth |  \
//                            stcDmaInit.u32IntEn      | stcDmaLlpInit.u32State    | stcDmaLlpInit.u32Mode;

//        DMA_ReconfigLlpCmd(RX_DMA_UNIT, RX_DMA_CH, ENABLE);
//        DMA_ReconfigCmd(RX_DMA_UNIT, ENABLE);
//        AOS_SetTriggerEventSrc(RX_DMA_RECONF_TRIG_SEL, RX_DMA_RECONF_TRIG_EVT_SRC);

//        stcIrqSignConfig.enIntSrc = RX_DMA_TC_INT_SRC;
//        stcIrqSignConfig.enIRQn  = RX_DMA_TC_IRQn;
//        stcIrqSignConfig.pfnCallback = &RX_DMA_TC_IrqCallback;
//        (void)INTC_IrqSignIn(&stcIrqSignConfig);
//        NVIC_ClearPendingIRQ(stcIrqSignConfig.enIRQn);
//        NVIC_SetPriority(stcIrqSignConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
//        NVIC_EnableIRQ(stcIrqSignConfig.enIRQn);

//        AOS_SetTriggerEventSrc(RX_DMA_TRIG_SEL, RX_DMA_TRIG_EVT_SRC);

//        DMA_Cmd(RX_DMA_UNIT, ENABLE);
//        DMA_TransCompleteIntCmd(RX_DMA_UNIT, RX_DMA_TC_INT, ENABLE);
//        (void)DMA_ChCmd(RX_DMA_UNIT, RX_DMA_CH, ENABLE);
//    }

//    /* USART_TX_DMA */
//    (void)DMA_StructInit(&stcDmaInit);
//    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
//    stcDmaInit.u32BlockSize = 1UL;
//    stcDmaInit.u32TransCount = ARRAY_SZ(m_au8RxBuf);
//    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
//    stcDmaInit.u32DestAddr = (uint32_t)(&USART_UNIT->DR);
//    stcDmaInit.u32SrcAddr = (uint32_t)m_au8RxBuf;
//    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
//    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;
//    i32Ret = DMA_Init(TX_DMA_UNIT, TX_DMA_CH, &stcDmaInit);
//    if (LL_OK == i32Ret) {
//        stcIrqSignConfig.enIntSrc = TX_DMA_TC_INT_SRC;
//        stcIrqSignConfig.enIRQn  = TX_DMA_TC_IRQn;
//        stcIrqSignConfig.pfnCallback = &TX_DMA_TC_IrqCallback;
//        (void)INTC_IrqSignIn(&stcIrqSignConfig);
//        NVIC_ClearPendingIRQ(stcIrqSignConfig.enIRQn);
//        NVIC_SetPriority(stcIrqSignConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
//        NVIC_EnableIRQ(stcIrqSignConfig.enIRQn);

//        AOS_SetTriggerEventSrc(TX_DMA_TRIG_SEL, TX_DMA_TRIG_EVT_SRC);

//        DMA_Cmd(TX_DMA_UNIT, ENABLE);
//        DMA_TransCompleteIntCmd(TX_DMA_UNIT, TX_DMA_TC_INT, ENABLE);
//    }

//    return i32Ret;
//}

///**
// * @brief  Configure TMR0.
// * @param  [in] u16TimeoutBits:         Timeout bits
// * @retval None
// */
//static void TMR0_Config(uint16_t u16TimeoutBits)
//{
//    uint16_t u16Div;
//    uint16_t u16Delay;
//    uint16_t u16CompareValue;
//    stc_tmr0_init_t stcTmr0Init;

//    TMR0_FCG_ENABLE();

//    /* Initialize TMR0 base function. */
//    stcTmr0Init.u32ClockSrc = TMR0_CLK_SRC_XTAL32;
//    stcTmr0Init.u32ClockDiv = TMR0_CLK_DIV8;
//    stcTmr0Init.u32Func     = TMR0_FUNC_CMP;
//    if (TMR0_CLK_DIV1 == stcTmr0Init.u32ClockDiv) {
//        u16Delay = 7U;
//    } else if (TMR0_CLK_DIV2 == stcTmr0Init.u32ClockDiv) {
//        u16Delay = 5U;
//    } else if ((TMR0_CLK_DIV4 == stcTmr0Init.u32ClockDiv) || \
//               (TMR0_CLK_DIV8 == stcTmr0Init.u32ClockDiv) || \
//               (TMR0_CLK_DIV16 == stcTmr0Init.u32ClockDiv)) {
//        u16Delay = 3U;
//    } else {
//        u16Delay = 2U;
//    }

//    u16Div = (uint16_t)1U << (stcTmr0Init.u32ClockDiv >> TMR0_BCONR_CKDIVA_POS);
//    u16CompareValue = ((u16TimeoutBits + u16Div - 1U) / u16Div) - u16Delay;
//    stcTmr0Init.u16CompareValue = u16CompareValue;
//    (void)TMR0_Init(TMR0_UNIT, TMR0_CH, &stcTmr0Init);

//    TMR0_HWStartCondCmd(TMR0_UNIT, TMR0_CH, ENABLE);
//    TMR0_HWClearCondCmd(TMR0_UNIT, TMR0_CH, ENABLE);
//}

///**
// * @brief  USART RX timeout IRQ callback.
// * @param  None
// * @retval None
// */
//static void USART_RxTimeout_IrqCallback(void)
//{
//    if (m_enRxFrameEnd != SET) {
//        m_enRxFrameEnd = SET;
//        m_u16RxLen = APP_FRAME_LEN_MAX - (uint16_t)DMA_GetTransCount(RX_DMA_UNIT, RX_DMA_CH);

//        /* Trigger for re-config USART RX DMA */
//        AOS_SW_Trigger();
//    }

//    TMR0_Stop(TMR0_UNIT, TMR0_CH);

//    USART_ClearStatus(USART_UNIT, USART_FLAG_RX_TIMEOUT);
//}

///**
// * @brief  USART TX complete IRQ callback function.
// * @param  None
// * @retval None
// */
//static void USART_TxComplete_IrqCallback(void)
//{
//    USART_FuncCmd(USART_UNIT, (USART_TX | USART_INT_TX_CPLT), DISABLE);

//    TMR0_Stop(TMR0_UNIT, TMR0_CH);

//    USART_ClearStatus(USART_UNIT, USART_FLAG_RX_TIMEOUT);

//    USART_FuncCmd(USART_UNIT, USART_RX_TIMEOUT, ENABLE);

//    USART_ClearStatus(USART_UNIT, USART_FLAG_TX_CPLT);
//}

///**
// * @brief  USART RX error IRQ callback.
// * @param  None
// * @retval None
// */
//static void USART_RxError_IrqCallback(void)
//{
//    (void)USART_ReadData(USART_UNIT);

//    USART_ClearStatus(USART_UNIT, (USART_FLAG_PARITY_ERR | USART_FLAG_FRAME_ERR | USART_FLAG_OVERRUN));
//}

///**
// * @brief  Main function of UART DMA project
// * @param  None
// * @retval int32_t return value, if needed
// */
//void uart2_init(void)
//{
//    stc_usart_uart_init_t stcUartInit;
//    stc_irq_signin_config_t stcIrqSigninConfig;

//    /* Initialize DMA. */
//    (void)DMA_Config();
//    /* Initialize TMR0. */
//    TMR0_Config(USART_TIMEOUT_BITS);
//    /* Configure USART RX/TX pin. */
//    GPIO_SetFunc(USART_RX_PORT, USART_RX_PIN, USART_RX_GPIO_FUNC);
//    GPIO_SetFunc(USART_TX_PORT, USART_TX_PIN, USART_TX_GPIO_FUNC);
//    /* Enable peripheral clock */
//    USART_FCG_ENABLE();
//    /* Initialize UART. */
//    (void)USART_UART_StructInit(&stcUartInit);
//    stcUartInit.u32ClockDiv = USART_CLK_DIV64;
//    stcUartInit.u32CKOutput = USART_CK_OUTPUT_ENABLE;
//    stcUartInit.u32Baudrate = USART_BAUDRATE;
//    stcUartInit.u32OverSampleBit = USART_OVER_SAMPLE_8BIT;
//    if (LL_OK != USART_UART_Init(USART_UNIT, &stcUartInit, NULL)) {       
//    }

//    /* Register TX complete IRQ handler. */
//    stcIrqSigninConfig.enIRQn = USART_TX_CPLT_IRQn;
//    stcIrqSigninConfig.enIntSrc = USART_TX_CPLT_INT_SRC;
//    stcIrqSigninConfig.pfnCallback = &USART_TxComplete_IrqCallback;
//    (void)INTC_IrqSignIn(&stcIrqSigninConfig);
//    NVIC_ClearPendingIRQ(stcIrqSigninConfig.enIRQn);
//    NVIC_SetPriority(stcIrqSigninConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
//    NVIC_EnableIRQ(stcIrqSigninConfig.enIRQn);

//    /* Register RX error IRQ handler. */
//    stcIrqSigninConfig.enIRQn = USART_RX_ERR_IRQn;
//    stcIrqSigninConfig.enIntSrc = USART_RX_ERR_INT_SRC;
//    stcIrqSigninConfig.pfnCallback = &USART_RxError_IrqCallback;
//    (void)INTC_IrqSignIn(&stcIrqSigninConfig);
//    NVIC_ClearPendingIRQ(stcIrqSigninConfig.enIRQn);
//    NVIC_SetPriority(stcIrqSigninConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
//    NVIC_EnableIRQ(stcIrqSigninConfig.enIRQn);

//    /* Register RX timeout IRQ handler. */
//    stcIrqSigninConfig.enIRQn = USART_RX_TIMEOUT_IRQn;
//    stcIrqSigninConfig.enIntSrc = USART_RX_TIMEOUT_INT_SRC;
//    stcIrqSigninConfig.pfnCallback = &USART_RxTimeout_IrqCallback;
//    (void)INTC_IrqSignIn(&stcIrqSigninConfig);
//    NVIC_ClearPendingIRQ(stcIrqSigninConfig.enIRQn);
//    NVIC_SetPriority(stcIrqSigninConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
//    NVIC_EnableIRQ(stcIrqSigninConfig.enIRQn);

//    /* Enable TX && RX && RX interrupt function */
//    USART_FuncCmd(USART_UNIT, (USART_RX | USART_INT_RX | USART_RX_TIMEOUT | \
//                               USART_INT_RX_TIMEOUT), ENABLE);
//}

//void test_task3(void *pvParameters)
//{
//	while(1)
//	{
//		if (SET == m_enRxFrameEnd) 
//		{			
//				DMA_SetSrcAddr(TX_DMA_UNIT, TX_DMA_CH, (uint32_t)m_au8RxBuf);

//				DMA_SetTransCount(TX_DMA_UNIT, TX_DMA_CH, m_u16RxLen);

//				(void)DMA_ChCmd(TX_DMA_UNIT, TX_DMA_CH, ENABLE);

//				USART_FuncCmd(USART_UNIT, USART_TX, ENABLE);

//				m_enRxFrameEnd = RESET;
//		}
//		vTaskDelay(1);				
//	}
//}



int32_t rs485_send_data(const void *pvBuf,uint32_t u32Len)
{
	return USART_UART_Trans(CM_USART4,pvBuf,u32Len,0xff);
}