HC32F448xC.ld 5.0 KB

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  1. /******************************************************************************
  2. * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
  3. *
  4. * This software component is licensed by XHSC under BSD 3-Clause license
  5. * (the "License"); You may not use this file except in compliance with the
  6. * License. You may obtain a copy of the License at:
  7. * opensource.org/licenses/BSD-3-Clause
  8. *
  9. */
  10. /*****************************************************************************/
  11. /* File HC32F448xC.ld */
  12. /* Abstract Linker script for HC32F448 Device with */
  13. /* 256KByte FLASH, 68KByte RAM */
  14. /* Version V1.0 */
  15. /* Date 2022-12-31 */
  16. /*****************************************************************************/
  17. /* Custom defines, according to section 7.7 of the user manual.
  18. Take OTP sector 16 for example. */
  19. __OTP_DATA_START = 0x03000C00;
  20. __OTP_DATA_SIZE = 1024;
  21. __OTP_LOCK_START = 0x03000A80;
  22. __OTP_LOCK_SIZE = 128;
  23. /* Use contiguous memory regions for simple. */
  24. MEMORY
  25. {
  26. FLASH (rx): ORIGIN = 0x00000000, LENGTH = 256K
  27. OTP_DATA (rx): ORIGIN = __OTP_DATA_START, LENGTH = __OTP_DATA_SIZE
  28. OTP_LOCK (rx): ORIGIN = __OTP_LOCK_START, LENGTH = __OTP_LOCK_SIZE
  29. RAM (rwx): ORIGIN = 0x1FFF8000, LENGTH = 64K
  30. RAMB (rwx): ORIGIN = 0x200F0000, LENGTH = 4K
  31. QSPI_ROM (rx): ORIGIN = 0x98000000, LENGTH = 8M
  32. }
  33. ENTRY(Reset_Handler)
  34. SECTIONS
  35. {
  36. .vectors :
  37. {
  38. . = ALIGN(4);
  39. KEEP(*(.vectors))
  40. . = ALIGN(4);
  41. } >FLASH
  42. .icg_sec 0x00000400 :
  43. {
  44. KEEP(*(.icg_sec))
  45. } >FLASH
  46. .ex_rom :
  47. {
  48. . = ALIGN(4);
  49. KEEP(*(.ex_rom))
  50. . = ALIGN(4);
  51. } >QSPI_ROM
  52. .text :
  53. {
  54. . = ALIGN(4);
  55. *(.text)
  56. *(.text*)
  57. *(.glue_7)
  58. *(.glue_7t)
  59. *(.eh_frame)
  60. KEEP(*(.init))
  61. KEEP(*(.fini))
  62. . = ALIGN(4);
  63. } >FLASH
  64. .rodata :
  65. {
  66. . = ALIGN(4);
  67. *(.rodata)
  68. *(.rodata*)
  69. . = ALIGN(4);
  70. } >FLASH
  71. .ARM.extab :
  72. {
  73. *(.ARM.extab* .gnu.linkonce.armextab.*)
  74. } >FLASH
  75. __exidx_start = .;
  76. .ARM.exidx :
  77. {
  78. *(.ARM.exidx* .gnu.linkonce.armexidx.*)
  79. } >FLASH
  80. __exidx_end = .;
  81. .preinit_array :
  82. {
  83. . = ALIGN(4);
  84. /* preinit data */
  85. PROVIDE_HIDDEN (__preinit_array_start = .);
  86. KEEP(*(.preinit_array))
  87. PROVIDE_HIDDEN (__preinit_array_end = .);
  88. . = ALIGN(4);
  89. } >FLASH
  90. .init_array :
  91. {
  92. . = ALIGN(4);
  93. /* init data */
  94. PROVIDE_HIDDEN (__init_array_start = .);
  95. KEEP(*(SORT(.init_array.*)))
  96. KEEP(*(.init_array))
  97. PROVIDE_HIDDEN (__init_array_end = .);
  98. . = ALIGN(4);
  99. } >FLASH
  100. .fini_array :
  101. {
  102. . = ALIGN(4);
  103. /* finit data */
  104. PROVIDE_HIDDEN (__fini_array_start = .);
  105. KEEP(*(SORT(.fini_array.*)))
  106. KEEP(*(.fini_array))
  107. PROVIDE_HIDDEN (__fini_array_end = .);
  108. . = ALIGN(4);
  109. } >FLASH
  110. __etext = ALIGN(4);
  111. .otp_data_sec :
  112. {
  113. KEEP(*(.otp_data_sec))
  114. } >OTP_DATA
  115. .otp_lock_sec :
  116. {
  117. KEEP(*(.otp_lock_sec))
  118. } >OTP_LOCK
  119. .data : AT (__etext)
  120. {
  121. . = ALIGN(4);
  122. __data_start__ = .;
  123. *(vtable)
  124. *(.data)
  125. *(.data*)
  126. . = ALIGN(4);
  127. *(.ramfunc)
  128. *(.ramfunc*)
  129. . = ALIGN(4);
  130. __data_end__ = .;
  131. } >RAM
  132. __etext_ramb = __etext + ALIGN (SIZEOF(.data), 4);
  133. .ramb_data : AT (__etext_ramb)
  134. {
  135. . = ALIGN(4);
  136. __data_start_ramb__ = .;
  137. *(.ramb_data)
  138. *(.ramb_data*)
  139. . = ALIGN(4);
  140. __data_end_ramb__ = .;
  141. } >RAMB
  142. .bss :
  143. {
  144. . = ALIGN(4);
  145. _sbss = .;
  146. __bss_start__ = _sbss;
  147. *(.bss)
  148. *(.bss*)
  149. *(COMMON)
  150. . = ALIGN(4);
  151. _ebss = .;
  152. __bss_end__ = _ebss;
  153. } >RAM
  154. .ramb_bss :
  155. {
  156. . = ALIGN(4);
  157. __bss_start_ramb__ = .;
  158. *(.ramb_bss)
  159. *(.ramb_bss*)
  160. . = ALIGN(4);
  161. __bss_end_ramb__ = .;
  162. } >RAMB
  163. .heap_stack (COPY) :
  164. {
  165. . = ALIGN(8);
  166. __end__ = .;
  167. PROVIDE(end = .);
  168. PROVIDE(_end = .);
  169. *(.heap*)
  170. . = ALIGN(8);
  171. __HeapLimit = .;
  172. __StackLimit = .;
  173. *(.stack*)
  174. . = ALIGN(8);
  175. __StackTop = .;
  176. } >RAM
  177. /DISCARD/ :
  178. {
  179. libc.a (*)
  180. libm.a (*)
  181. libgcc.a (*)
  182. }
  183. .ARM.attributes 0 : { *(.ARM.attributes) }
  184. PROVIDE(_stack = __StackTop);
  185. PROVIDE(_Min_Heap_Size = __HeapLimit - __HeapBase);
  186. PROVIDE(_Min_Stack_Size = __StackTop - __StackLimit);
  187. __RamEnd = ORIGIN(RAM) + LENGTH(RAM);
  188. ASSERT(__StackTop <= __RamEnd, "region RAM overflowed with stack")
  189. }