system_hc32f448mcti.c 6.2 KB

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  1. /**
  2. *******************************************************************************
  3. * @file system_hc32f448mcti.c
  4. * @brief This file provides two functions and two global variables to be called
  5. * from user application.
  6. @verbatim
  7. Change Logs:
  8. Date Author Notes
  9. 2022-12-31 CDT First version
  10. @endverbatim
  11. *******************************************************************************
  12. * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
  13. *
  14. * This software component is licensed by XHSC under BSD 3-Clause license
  15. * (the "License"); You may not use this file except in compliance with the
  16. * License. You may obtain a copy of the License at:
  17. * opensource.org/licenses/BSD-3-Clause
  18. *
  19. *******************************************************************************
  20. */
  21. /*******************************************************************************
  22. * Include files
  23. ******************************************************************************/
  24. #include "system_hc32f448mcti.h"
  25. #include "hc32f448mcti.h"
  26. #include "hc32f4xx_conf.h"
  27. /**
  28. * @addtogroup CMSIS
  29. * @{
  30. */
  31. /**
  32. * @addtogroup HC32F448_System
  33. * @{
  34. */
  35. /*******************************************************************************
  36. * Global pre-processor symbols/macros ('define')
  37. ******************************************************************************/
  38. /**
  39. * @defgroup HC32F448_System_Local_Macros HC32F448 System Local Macros
  40. * @{
  41. */
  42. #define HRC_16MHz_VALUE (16000000UL) /*!< Internal high speed RC freq. */
  43. #define HRC_20MHz_VALUE (20000000UL) /*!< Internal high speed RC freq. */
  44. /* HRC select */
  45. #define HRC_FREQ_MON() (*((volatile uint32_t *)(0x40010684UL)))
  46. /* Vector Table base offset field */
  47. #ifndef VECT_TAB_OFFSET
  48. #define VECT_TAB_OFFSET (0x8000UL) /*!< This value must be a multiple of 0x400. */
  49. #endif
  50. /* Compiler Macros */
  51. #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
  52. #ifndef __NO_INIT
  53. #define __NO_INIT __attribute__((section(".bss.noinit")))
  54. #endif /* __NO_INIT */
  55. #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /*!< GNU Compiler */
  56. #ifndef __NO_INIT
  57. #define __NO_INIT __attribute__((section(".noinit")))
  58. #endif /* __NO_INIT */
  59. #elif defined (__ICCARM__) /*!< IAR Compiler */
  60. #ifndef __NO_INIT
  61. #define __NO_INIT __no_init
  62. #endif /* __NO_INIT */
  63. #elif defined (__CC_ARM) /*!< ARM Compiler */
  64. #ifndef __NO_INIT
  65. #define __NO_INIT __attribute__((section(".bss.noinit"), zero_init))
  66. #endif /* __NO_INIT */
  67. #endif
  68. /**
  69. * @}
  70. */
  71. /*******************************************************************************
  72. * Global variable definitions (declared in header file with 'extern')
  73. ******************************************************************************/
  74. /**
  75. * @addtogroup HC32F448_System_Global_Variable
  76. * @{
  77. */
  78. /*!< System clock frequency (Core clock) */
  79. __NO_INIT uint32_t SystemCoreClock;
  80. /*!< High speed RC frequency (HCR clock) */
  81. __NO_INIT uint32_t HRC_VALUE;
  82. /**
  83. * @}
  84. */
  85. /*******************************************************************************
  86. * Local variable definitions ('static')
  87. ******************************************************************************/
  88. /*******************************************************************************
  89. * Function implementation - global ('extern') and local ('static')
  90. ******************************************************************************/
  91. /**
  92. * @addtogroup HC32F448_System_Global_Functions
  93. * @{
  94. */
  95. /**
  96. * @brief Setup the microcontroller system. Initialize the System and update
  97. * the SystemCoreClock variable.
  98. * @param None
  99. * @retval None
  100. */
  101. void SystemInit(void)
  102. {
  103. /* FPU settings */
  104. #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
  105. SCB->CPACR |= ((3UL << 20) | (3UL << 22)); /* set CP10 and CP11 Full Access */
  106. #endif
  107. SystemCoreClockUpdate();
  108. /* Configure the Vector Table relocation */
  109. SCB->VTOR = VECT_TAB_OFFSET; /* Vector Table Relocation */
  110. }
  111. /**
  112. * @brief Update SystemCoreClock variable according to Clock Register Values.
  113. * @param None
  114. * @retval None
  115. */
  116. void SystemCoreClockUpdate(void)
  117. {
  118. uint8_t u8SysClkSrc;
  119. uint32_t plln;
  120. uint32_t pllp;
  121. uint32_t pllm;
  122. uint32_t u32PllSrcFreq;
  123. /* Select proper HRC_VALUE according to ICG1.HRCFREQSEL bit */
  124. if (1UL == (HRC_FREQ_MON() & 1UL)) {
  125. HRC_VALUE = HRC_16MHz_VALUE;
  126. } else {
  127. HRC_VALUE = HRC_20MHz_VALUE;
  128. }
  129. u8SysClkSrc = CM_CMU->CKSWR & CMU_CKSWR_CKSW;
  130. switch (u8SysClkSrc) {
  131. case 0x00U: /* use internal high speed RC */
  132. SystemCoreClock = HRC_VALUE;
  133. break;
  134. case 0x01U: /* use internal middle speed RC */
  135. SystemCoreClock = MRC_VALUE;
  136. break;
  137. case 0x02U: /* use internal low speed RC */
  138. SystemCoreClock = LRC_VALUE;
  139. break;
  140. case 0x03U: /* use external high speed OSC */
  141. SystemCoreClock = XTAL_VALUE;
  142. break;
  143. case 0x04U: /* use external low speed OSC */
  144. SystemCoreClock = XTAL32_VALUE;
  145. break;
  146. case 0x05U: /* use PLLH */
  147. /* PLLCLK = ((pllsrc / pllm) * plln) / pllp */
  148. plln = (CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLHN) >> CMU_PLLHCFGR_PLLHN_POS;
  149. pllp = (CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLHP) >> CMU_PLLHCFGR_PLLHP_POS;
  150. pllm = (CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLHM) >> CMU_PLLHCFGR_PLLHM_POS;
  151. if (0UL == (CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLSRC)) { /* use external high speed OSC as PLL source */
  152. u32PllSrcFreq = XTAL_VALUE;
  153. } else { /* use internal high RC as PLL source */
  154. u32PllSrcFreq = HRC_VALUE;
  155. }
  156. SystemCoreClock = u32PllSrcFreq / (pllm + 1UL) * (plln + 1UL) / (pllp + 1UL);
  157. break;
  158. default:
  159. break;
  160. }
  161. }
  162. /**
  163. * @}
  164. */
  165. /**
  166. * @}
  167. */
  168. /**
  169. * @}
  170. */
  171. /*******************************************************************************
  172. * EOF (not truncated)
  173. ******************************************************************************/