portASM.S 8.7 KB

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  1. /*
  2. * FreeRTOS Kernel V10.4.6
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. .eabi_attribute Tag_ABI_align_preserved, 1
  29. .text
  30. .arm
  31. .set SYS_MODE, 0x1f
  32. .set SVC_MODE, 0x13
  33. .set IRQ_MODE, 0x12
  34. /* Hardware registers. */
  35. .extern ulICCIAR
  36. .extern ulICCEOIR
  37. .extern ulICCPMR
  38. /* Variables and functions. */
  39. .extern ulMaxAPIPriorityMask
  40. .extern _freertos_vector_table
  41. .extern pxCurrentTCB
  42. .extern vTaskSwitchContext
  43. .extern vApplicationIRQHandler
  44. .extern ulPortInterruptNesting
  45. .extern ulPortTaskHasFPUContext
  46. .global FreeRTOS_IRQ_Handler
  47. .global FreeRTOS_SWI_Handler
  48. .global vPortRestoreTaskContext
  49. .macro portSAVE_CONTEXT
  50. /* Save the LR and SPSR onto the system mode stack before switching to
  51. system mode to save the remaining system mode registers. */
  52. SRSDB sp!, #SYS_MODE
  53. CPS #SYS_MODE
  54. PUSH {R0-R12, R14}
  55. /* Push the critical nesting count. */
  56. LDR R2, ulCriticalNestingConst
  57. LDR R1, [R2]
  58. PUSH {R1}
  59. /* Does the task have a floating point context that needs saving? If
  60. ulPortTaskHasFPUContext is 0 then no. */
  61. LDR R2, ulPortTaskHasFPUContextConst
  62. LDR R3, [R2]
  63. CMP R3, #0
  64. /* Save the floating point context, if any. */
  65. FMRXNE R1, FPSCR
  66. VPUSHNE {D0-D15}
  67. VPUSHNE {D16-D31}
  68. PUSHNE {R1}
  69. /* Save ulPortTaskHasFPUContext itself. */
  70. PUSH {R3}
  71. /* Save the stack pointer in the TCB. */
  72. LDR R0, pxCurrentTCBConst
  73. LDR R1, [R0]
  74. STR SP, [R1]
  75. .endm
  76. ; /**********************************************************************/
  77. .macro portRESTORE_CONTEXT
  78. /* Set the SP to point to the stack of the task being restored. */
  79. LDR R0, pxCurrentTCBConst
  80. LDR R1, [R0]
  81. LDR SP, [R1]
  82. /* Is there a floating point context to restore? If the restored
  83. ulPortTaskHasFPUContext is zero then no. */
  84. LDR R0, ulPortTaskHasFPUContextConst
  85. POP {R1}
  86. STR R1, [R0]
  87. CMP R1, #0
  88. /* Restore the floating point context, if any. */
  89. POPNE {R0}
  90. VPOPNE {D16-D31}
  91. VPOPNE {D0-D15}
  92. VMSRNE FPSCR, R0
  93. /* Restore the critical section nesting depth. */
  94. LDR R0, ulCriticalNestingConst
  95. POP {R1}
  96. STR R1, [R0]
  97. /* Ensure the priority mask is correct for the critical nesting depth. */
  98. LDR R2, ulICCPMRConst
  99. LDR R2, [R2]
  100. CMP R1, #0
  101. MOVEQ R4, #255
  102. LDRNE R4, ulMaxAPIPriorityMaskConst
  103. LDRNE R4, [R4]
  104. STR R4, [R2]
  105. /* Restore all system mode registers other than the SP (which is already
  106. being used). */
  107. POP {R0-R12, R14}
  108. /* Return to the task code, loading CPSR on the way. */
  109. RFEIA sp!
  110. .endm
  111. /******************************************************************************
  112. * SVC handler is used to start the scheduler.
  113. *****************************************************************************/
  114. .align 4
  115. .type FreeRTOS_SWI_Handler, %function
  116. FreeRTOS_SWI_Handler:
  117. /* Save the context of the current task and select a new task to run. */
  118. portSAVE_CONTEXT
  119. LDR R0, vTaskSwitchContextConst
  120. BLX R0
  121. portRESTORE_CONTEXT
  122. /******************************************************************************
  123. * vPortRestoreTaskContext is used to start the scheduler.
  124. *****************************************************************************/
  125. .type vPortRestoreTaskContext, %function
  126. vPortRestoreTaskContext:
  127. /* Switch to system mode. */
  128. CPS #SYS_MODE
  129. portRESTORE_CONTEXT
  130. .align 4
  131. .type FreeRTOS_IRQ_Handler, %function
  132. FreeRTOS_IRQ_Handler:
  133. /* Return to the interrupted instruction. */
  134. SUB lr, lr, #4
  135. /* Push the return address and SPSR. */
  136. PUSH {lr}
  137. MRS lr, SPSR
  138. PUSH {lr}
  139. /* Change to supervisor mode to allow reentry. */
  140. CPS #SVC_MODE
  141. /* Push used registers. */
  142. PUSH {r0-r4, r12}
  143. /* Increment nesting count. r3 holds the address of ulPortInterruptNesting
  144. for future use. r1 holds the original ulPortInterruptNesting value for
  145. future use. */
  146. LDR r3, ulPortInterruptNestingConst
  147. LDR r1, [r3]
  148. ADD r4, r1, #1
  149. STR r4, [r3]
  150. /* Read value from the interrupt acknowledge register, which is stored in r0
  151. for future parameter and interrupt clearing use. */
  152. LDR r2, ulICCIARConst
  153. LDR r2, [r2]
  154. LDR r0, [r2]
  155. /* Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
  156. future use. _RB_ Does this ever actually need to be done provided the start
  157. of the stack is 8-byte aligned? */
  158. MOV r2, sp
  159. AND r2, r2, #4
  160. SUB sp, sp, r2
  161. /* Call the interrupt handler. r4 pushed to maintain alignment. */
  162. PUSH {r0-r4, lr}
  163. LDR r1, vApplicationIRQHandlerConst
  164. BLX r1
  165. POP {r0-r4, lr}
  166. ADD sp, sp, r2
  167. CPSID i
  168. DSB
  169. ISB
  170. /* Write the value read from ICCIAR to ICCEOIR. */
  171. LDR r4, ulICCEOIRConst
  172. LDR r4, [r4]
  173. STR r0, [r4]
  174. /* Restore the old nesting count. */
  175. STR r1, [r3]
  176. /* A context switch is never performed if the nesting count is not 0. */
  177. CMP r1, #0
  178. BNE exit_without_switch
  179. /* Did the interrupt request a context switch? r1 holds the address of
  180. ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
  181. use. */
  182. LDR r1, =ulPortYieldRequired
  183. LDR r0, [r1]
  184. CMP r0, #0
  185. BNE switch_before_exit
  186. exit_without_switch:
  187. /* No context switch. Restore used registers, LR_irq and SPSR before
  188. returning. */
  189. POP {r0-r4, r12}
  190. CPS #IRQ_MODE
  191. POP {LR}
  192. MSR SPSR_cxsf, LR
  193. POP {LR}
  194. MOVS PC, LR
  195. switch_before_exit:
  196. /* A context swtich is to be performed. Clear the context switch pending
  197. flag. */
  198. MOV r0, #0
  199. STR r0, [r1]
  200. /* Restore used registers, LR-irq and SPSR before saving the context
  201. to the task stack. */
  202. POP {r0-r4, r12}
  203. CPS #IRQ_MODE
  204. POP {LR}
  205. MSR SPSR_cxsf, LR
  206. POP {LR}
  207. portSAVE_CONTEXT
  208. /* Call the function that selects the new task to execute.
  209. vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
  210. instructions, or 8 byte aligned stack allocated data. LR does not need
  211. saving as a new LR will be loaded by portRESTORE_CONTEXT anyway. */
  212. LDR R0, vTaskSwitchContextConst
  213. BLX R0
  214. /* Restore the context of, and branch to, the task selected to execute
  215. next. */
  216. portRESTORE_CONTEXT
  217. /******************************************************************************
  218. * If the application provides an implementation of vApplicationIRQHandler(),
  219. * then it will get called directly without saving the FPU registers on
  220. * interrupt entry, and this weak implementation of
  221. * vApplicationIRQHandler() will not get called.
  222. *
  223. * If the application provides its own implementation of
  224. * vApplicationFPUSafeIRQHandler() then this implementation of
  225. * vApplicationIRQHandler() will be called, save the FPU registers, and then
  226. * call vApplicationFPUSafeIRQHandler().
  227. *
  228. * Therefore, if the application writer wants FPU registers to be saved on
  229. * interrupt entry their IRQ handler must be called
  230. * vApplicationFPUSafeIRQHandler(), and if the application writer does not want
  231. * FPU registers to be saved on interrupt entry their IRQ handler must be
  232. * called vApplicationIRQHandler().
  233. *****************************************************************************/
  234. .align 4
  235. .weak vApplicationIRQHandler
  236. .type vApplicationIRQHandler, %function
  237. vApplicationIRQHandler:
  238. PUSH {LR}
  239. FMRX R1, FPSCR
  240. VPUSH {D0-D15}
  241. VPUSH {D16-D31}
  242. PUSH {R1}
  243. LDR r1, vApplicationFPUSafeIRQHandlerConst
  244. BLX r1
  245. POP {R0}
  246. VPOP {D16-D31}
  247. VPOP {D0-D15}
  248. VMSR FPSCR, R0
  249. POP {PC}
  250. ulICCIARConst: .word ulICCIAR
  251. ulICCEOIRConst: .word ulICCEOIR
  252. ulICCPMRConst: .word ulICCPMR
  253. pxCurrentTCBConst: .word pxCurrentTCB
  254. ulCriticalNestingConst: .word ulCriticalNesting
  255. ulPortTaskHasFPUContextConst: .word ulPortTaskHasFPUContext
  256. ulMaxAPIPriorityMaskConst: .word ulMaxAPIPriorityMask
  257. vTaskSwitchContextConst: .word vTaskSwitchContext
  258. vApplicationIRQHandlerConst: .word vApplicationIRQHandler
  259. ulPortInterruptNestingConst: .word ulPortInterruptNesting
  260. vApplicationFPUSafeIRQHandlerConst: .word vApplicationFPUSafeIRQHandler
  261. .end