portASM.s 5.0 KB

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  1. ;/*
  2. ; * FreeRTOS Kernel V10.4.6
  3. ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. ; *
  5. ; * SPDX-License-Identifier: MIT
  6. ; *
  7. ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. ; * this software and associated documentation files (the "Software"), to deal in
  9. ; * the Software without restriction, including without limitation the rights to
  10. ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. ; * the Software, and to permit persons to whom the Software is furnished to do so,
  12. ; * subject to the following conditions:
  13. ; *
  14. ; * The above copyright notice and this permission notice shall be included in all
  15. ; * copies or substantial portions of the Software.
  16. ; *
  17. ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. ; *
  24. ; * https://www.FreeRTOS.org
  25. ; * https://github.com/FreeRTOS
  26. ; *
  27. ; */
  28. INCLUDE FreeRTOSConfig.h
  29. INCLUDE portmacro.h
  30. EXTERN vApplicationIRQHandler
  31. EXTERN vTaskSwitchContext
  32. EXTERN ulPortYieldRequired
  33. EXTERN ulPortInterruptNesting
  34. PUBLIC FreeRTOS_SWI_Handler
  35. PUBLIC FreeRTOS_IRQ_Handler
  36. PUBLIC vPortRestoreTaskContext
  37. SYS_MODE EQU 0x1f
  38. SVC_MODE EQU 0x13
  39. IRQ_MODE EQU 0x12
  40. SECTION .text:CODE:ROOT(2)
  41. ARM
  42. INCLUDE portASM.h
  43. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  44. ; SVC handler is used to yield a task.
  45. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  46. FreeRTOS_SWI_Handler
  47. PRESERVE8
  48. ; Save the context of the current task and select a new task to run.
  49. portSAVE_CONTEXT
  50. LDR R0, =vTaskSwitchContext
  51. BLX R0
  52. portRESTORE_CONTEXT
  53. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  54. ; vPortRestoreTaskContext is used to start the scheduler.
  55. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  56. vPortRestoreTaskContext
  57. ; Switch to system mode
  58. CPS #SYS_MODE
  59. portRESTORE_CONTEXT
  60. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  61. ; PL390 GIC interrupt handler
  62. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  63. FreeRTOS_IRQ_Handler
  64. ; Return to the interrupted instruction.
  65. SUB lr, lr, #4
  66. ; Push the return address and SPSR
  67. PUSH {lr}
  68. MRS lr, SPSR
  69. PUSH {lr}
  70. ; Change to supervisor mode to allow reentry.
  71. CPS #SVC_MODE
  72. ; Push used registers.
  73. PUSH {r0-r4, r12}
  74. ; Increment nesting count. r3 holds the address of ulPortInterruptNesting
  75. ; for future use. r1 holds the original ulPortInterruptNesting value for
  76. ; future use.
  77. LDR r3, =ulPortInterruptNesting
  78. LDR r1, [r3]
  79. ADD r4, r1, #1
  80. STR r4, [r3]
  81. ; Read value from the interrupt acknowledge register, which is stored in r0
  82. ; for future parameter and interrupt clearing use.
  83. LDR r2, =portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS
  84. LDR r0, [r2]
  85. ; Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
  86. ; future use. _RB_ Is this ever necessary if start of stack is 8-byte aligned?
  87. MOV r2, sp
  88. AND r2, r2, #4
  89. SUB sp, sp, r2
  90. ; Call the interrupt handler. r4 is pushed to maintain alignment.
  91. PUSH {r0-r4, lr}
  92. LDR r1, =vApplicationIRQHandler
  93. BLX r1
  94. POP {r0-r4, lr}
  95. ADD sp, sp, r2
  96. CPSID i
  97. ; Write the value read from ICCIAR to ICCEOIR
  98. LDR r4, =portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS
  99. STR r0, [r4]
  100. ; Restore the old nesting count
  101. STR r1, [r3]
  102. ; A context switch is never performed if the nesting count is not 0
  103. CMP r1, #0
  104. BNE exit_without_switch
  105. ; Did the interrupt request a context switch? r1 holds the address of
  106. ; ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
  107. ; use.
  108. LDR r1, =ulPortYieldRequired
  109. LDR r0, [r1]
  110. CMP r0, #0
  111. BNE switch_before_exit
  112. exit_without_switch
  113. ; No context switch. Restore used registers, LR_irq and SPSR before
  114. ; returning.
  115. POP {r0-r4, r12}
  116. CPS #IRQ_MODE
  117. POP {LR}
  118. MSR SPSR_cxsf, LR
  119. POP {LR}
  120. MOVS PC, LR
  121. switch_before_exit
  122. ; A context switch is to be performed. Clear the context switch pending
  123. ; flag.
  124. MOV r0, #0
  125. STR r0, [r1]
  126. ; Restore used registers, LR-irq and SPSR before saving the context
  127. ; to the task stack.
  128. POP {r0-r4, r12}
  129. CPS #IRQ_MODE
  130. POP {LR}
  131. MSR SPSR_cxsf, LR
  132. POP {LR}
  133. portSAVE_CONTEXT
  134. ; Call the function that selects the new task to execute.
  135. ; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
  136. ; instructions, or 8 byte aligned stack allocated data. LR does not need
  137. ; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
  138. LDR r0, =vTaskSwitchContext
  139. BLX r0
  140. ; Restore the context of, and branch to, the task selected to execute next.
  141. portRESTORE_CONTEXT
  142. END