portasm.s 2.8 KB

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  1. /*
  2. * FreeRTOS Kernel V10.4.6
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. #include <FreeRTOSConfig.h>
  29. RSEG CODE:CODE(2)
  30. thumb
  31. EXTERN pxCurrentTCB
  32. EXTERN vTaskSwitchContext
  33. PUBLIC xPortPendSVHandler
  34. PUBLIC vPortSVCHandler
  35. PUBLIC vPortStartFirstTask
  36. /*-----------------------------------------------------------*/
  37. xPortPendSVHandler:
  38. mrs r0, psp
  39. isb
  40. ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
  41. ldr r2, [r3]
  42. stmdb r0!, {r4-r11} /* Save the remaining registers. */
  43. str r0, [r2] /* Save the new top of stack into the first member of the TCB. */
  44. stmdb sp!, {r3, r14}
  45. mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
  46. msr basepri, r0
  47. dsb
  48. isb
  49. bl vTaskSwitchContext
  50. mov r0, #0
  51. msr basepri, r0
  52. ldmia sp!, {r3, r14}
  53. ldr r1, [r3]
  54. ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
  55. ldmia r0!, {r4-r11} /* Pop the registers. */
  56. msr psp, r0
  57. isb
  58. bx r14
  59. /*-----------------------------------------------------------*/
  60. vPortSVCHandler:
  61. /* Get the location of the current TCB. */
  62. ldr r3, =pxCurrentTCB
  63. ldr r1, [r3]
  64. ldr r0, [r1]
  65. /* Pop the core registers. */
  66. ldmia r0!, {r4-r11}
  67. msr psp, r0
  68. isb
  69. mov r0, #0
  70. msr basepri, r0
  71. orr r14, r14, #13
  72. bx r14
  73. /*-----------------------------------------------------------*/
  74. vPortStartFirstTask
  75. /* Use the NVIC offset register to locate the stack. */
  76. ldr r0, =0xE000ED08
  77. ldr r0, [r0]
  78. ldr r0, [r0]
  79. /* Set the msp back to the start of the stack. */
  80. msr msp, r0
  81. /* Call SVC to start the first task, ensuring interrupts are enabled. */
  82. cpsie i
  83. cpsie f
  84. dsb
  85. isb
  86. svc 0
  87. END