port.c 8.4 KB

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  1. /*
  2. * FreeRTOS Kernel V10.4.6
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. /*-----------------------------------------------------------
  29. * Implementation of functions defined in portable.h for the Atmel ARM7 port.
  30. *----------------------------------------------------------*/
  31. /* Standard includes. */
  32. #include <stdlib.h>
  33. /* Scheduler includes. */
  34. #include "FreeRTOS.h"
  35. #include "task.h"
  36. /* Constants required to setup the initial stack. */
  37. #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
  38. #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
  39. #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
  40. /* Constants required to setup the PIT. */
  41. #define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
  42. #define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_PERIOD_MS )
  43. /* Constants required to handle critical sections. */
  44. #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
  45. #define portINT_LEVEL_SENSITIVE 0
  46. #define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
  47. #define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
  48. /*-----------------------------------------------------------*/
  49. /* Setup the PIT to generate the tick interrupts. */
  50. static void prvSetupTimerInterrupt( void );
  51. /* ulCriticalNesting will get set to zero when the first task starts. It
  52. cannot be initialised to 0 as this will cause interrupts to be enabled
  53. during the kernel initialisation process. */
  54. uint32_t ulCriticalNesting = ( uint32_t ) 9999;
  55. /*-----------------------------------------------------------*/
  56. /*
  57. * Initialise the stack of a task to look exactly as if a call to
  58. * portSAVE_CONTEXT had been called.
  59. *
  60. * See header file for description.
  61. */
  62. StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
  63. {
  64. StackType_t *pxOriginalTOS;
  65. pxOriginalTOS = pxTopOfStack;
  66. /* To ensure asserts in tasks.c don't fail, although in this case the assert
  67. is not really required. */
  68. pxTopOfStack--;
  69. /* Setup the initial stack of the task. The stack is set exactly as
  70. expected by the portRESTORE_CONTEXT() macro. */
  71. /* First on the stack is the return address - which in this case is the
  72. start of the task. The offset is added to make the return address appear
  73. as it would within an IRQ ISR. */
  74. *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
  75. pxTopOfStack--;
  76. *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
  77. pxTopOfStack--;
  78. *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
  79. pxTopOfStack--;
  80. *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
  81. pxTopOfStack--;
  82. *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
  83. pxTopOfStack--;
  84. *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
  85. pxTopOfStack--;
  86. *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
  87. pxTopOfStack--;
  88. *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
  89. pxTopOfStack--;
  90. *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
  91. pxTopOfStack--;
  92. *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
  93. pxTopOfStack--;
  94. *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
  95. pxTopOfStack--;
  96. *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
  97. pxTopOfStack--;
  98. *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
  99. pxTopOfStack--;
  100. *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
  101. pxTopOfStack--;
  102. *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
  103. pxTopOfStack--;
  104. /* When the task starts is will expect to find the function parameter in
  105. R0. */
  106. *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
  107. pxTopOfStack--;
  108. /* The status register is set for system mode, with interrupts enabled. */
  109. *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
  110. if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
  111. {
  112. /* We want the task to start in thumb mode. */
  113. *pxTopOfStack |= portTHUMB_MODE_BIT;
  114. }
  115. pxTopOfStack--;
  116. /* Interrupt flags cannot always be stored on the stack and will
  117. instead be stored in a variable, which is then saved as part of the
  118. tasks context. */
  119. *pxTopOfStack = portNO_CRITICAL_NESTING;
  120. return pxTopOfStack;
  121. }
  122. /*-----------------------------------------------------------*/
  123. BaseType_t xPortStartScheduler( void )
  124. {
  125. extern void vPortStartFirstTask( void );
  126. /* Start the timer that generates the tick ISR. Interrupts are disabled
  127. here already. */
  128. prvSetupTimerInterrupt();
  129. /* Start the first task. */
  130. vPortStartFirstTask();
  131. /* Should not get here! */
  132. return 0;
  133. }
  134. /*-----------------------------------------------------------*/
  135. void vPortEndScheduler( void )
  136. {
  137. /* It is unlikely that the ARM port will require this function as there
  138. is nothing to return to. */
  139. }
  140. /*-----------------------------------------------------------*/
  141. #if configUSE_PREEMPTION == 0
  142. /* The cooperative scheduler requires a normal IRQ service routine to
  143. simply increment the system tick. */
  144. static __arm __irq void vPortNonPreemptiveTick( void );
  145. static __arm __irq void vPortNonPreemptiveTick( void )
  146. {
  147. uint32_t ulDummy;
  148. /* Increment the tick count - which may wake some tasks but as the
  149. preemptive scheduler is not being used any woken task is not given
  150. processor time no matter what its priority. */
  151. xTaskIncrementTick();
  152. /* Clear the PIT interrupt. */
  153. ulDummy = AT91C_BASE_PITC->PITC_PIVR;
  154. /* End the interrupt in the AIC. */
  155. AT91C_BASE_AIC->AIC_EOICR = ulDummy;
  156. }
  157. #else
  158. /* Currently the IAR port requires the preemptive tick function to be
  159. defined in an asm file. */
  160. #endif
  161. /*-----------------------------------------------------------*/
  162. static void prvSetupTimerInterrupt( void )
  163. {
  164. AT91PS_PITC pxPIT = AT91C_BASE_PITC;
  165. /* Setup the AIC for PIT interrupts. The interrupt routine chosen depends
  166. on whether the preemptive or cooperative scheduler is being used. */
  167. #if configUSE_PREEMPTION == 0
  168. AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortNonPreemptiveTick );
  169. #else
  170. extern void ( vPortPreemptiveTick )( void );
  171. AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortPreemptiveTick );
  172. #endif
  173. /* Configure the PIT period. */
  174. pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE;
  175. /* Enable the interrupt. Global interrupts are disables at this point so
  176. this is safe. */
  177. AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_SYS );
  178. }
  179. /*-----------------------------------------------------------*/
  180. void vPortEnterCritical( void )
  181. {
  182. /* Disable interrupts first! */
  183. __disable_interrupt();
  184. /* Now interrupts are disabled ulCriticalNesting can be accessed
  185. directly. Increment ulCriticalNesting to keep a count of how many times
  186. portENTER_CRITICAL() has been called. */
  187. ulCriticalNesting++;
  188. }
  189. /*-----------------------------------------------------------*/
  190. void vPortExitCritical( void )
  191. {
  192. if( ulCriticalNesting > portNO_CRITICAL_NESTING )
  193. {
  194. /* Decrement the nesting count as we are leaving a critical section. */
  195. ulCriticalNesting--;
  196. /* If the nesting level has reached zero then interrupts should be
  197. re-enabled. */
  198. if( ulCriticalNesting == portNO_CRITICAL_NESTING )
  199. {
  200. __enable_interrupt();
  201. }
  202. }
  203. }
  204. /*-----------------------------------------------------------*/