port.c 10 KB

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  1. /*
  2. * FreeRTOS Kernel V10.4.6
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. /*
  29. Changes from V4.2.1
  30. + Introduced the configKERNEL_INTERRUPT_PRIORITY definition.
  31. */
  32. /*-----------------------------------------------------------
  33. * Implementation of functions defined in portable.h for the PIC24 port.
  34. *----------------------------------------------------------*/
  35. /* Scheduler include files. */
  36. #include "FreeRTOS.h"
  37. #include "task.h"
  38. /* Hardware specifics. */
  39. #define portBIT_SET 1
  40. #define portTIMER_PRESCALE 8
  41. #define portINITIAL_SR 0
  42. /* Defined for backward compatability with project created prior to
  43. FreeRTOS.org V4.3.0. */
  44. #ifndef configKERNEL_INTERRUPT_PRIORITY
  45. #define configKERNEL_INTERRUPT_PRIORITY 1
  46. #endif
  47. /* Use _T1Interrupt as the interrupt handler name if the application writer has
  48. not provided their own. */
  49. #ifndef configTICK_INTERRUPT_HANDLER
  50. #define configTICK_INTERRUPT_HANDLER _T1Interrupt
  51. #endif /* configTICK_INTERRUPT_HANDLER */
  52. /* The program counter is only 23 bits. */
  53. #define portUNUSED_PR_BITS 0x7f
  54. /* Records the nesting depth of calls to portENTER_CRITICAL(). */
  55. UBaseType_t uxCriticalNesting = 0xef;
  56. #if configKERNEL_INTERRUPT_PRIORITY != 1
  57. #error If configKERNEL_INTERRUPT_PRIORITY is not 1 then the #32 in the following macros needs changing to equal the portINTERRUPT_BITS value, which is ( configKERNEL_INTERRUPT_PRIORITY << 5 )
  58. #endif
  59. #if defined( __PIC24E__ ) || defined ( __PIC24F__ ) || defined( __PIC24FK__ ) || defined( __PIC24H__ )
  60. #ifdef __HAS_EDS__
  61. #define portRESTORE_CONTEXT() \
  62. asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
  63. "MOV [W0], W15 \n" \
  64. "POP W0 \n" /* Restore the critical nesting counter for the task. */ \
  65. "MOV W0, _uxCriticalNesting \n" \
  66. "POP DSWPAG \n" \
  67. "POP DSRPAG \n" \
  68. "POP CORCON \n" \
  69. "POP TBLPAG \n" \
  70. "POP RCOUNT \n" /* Restore the registers from the stack. */ \
  71. "POP W14 \n" \
  72. "POP.D W12 \n" \
  73. "POP.D W10 \n" \
  74. "POP.D W8 \n" \
  75. "POP.D W6 \n" \
  76. "POP.D W4 \n" \
  77. "POP.D W2 \n" \
  78. "POP.D W0 \n" \
  79. "POP SR " );
  80. #else /* __HAS_EDS__ */
  81. #define portRESTORE_CONTEXT() \
  82. asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
  83. "MOV [W0], W15 \n" \
  84. "POP W0 \n" /* Restore the critical nesting counter for the task. */ \
  85. "MOV W0, _uxCriticalNesting \n" \
  86. "POP PSVPAG \n" \
  87. "POP CORCON \n" \
  88. "POP TBLPAG \n" \
  89. "POP RCOUNT \n" /* Restore the registers from the stack. */ \
  90. "POP W14 \n" \
  91. "POP.D W12 \n" \
  92. "POP.D W10 \n" \
  93. "POP.D W8 \n" \
  94. "POP.D W6 \n" \
  95. "POP.D W4 \n" \
  96. "POP.D W2 \n" \
  97. "POP.D W0 \n" \
  98. "POP SR " );
  99. #endif /* __HAS_EDS__ */
  100. #endif /* MPLAB_PIC24_PORT */
  101. #if defined( __dsPIC30F__ ) || defined( __dsPIC33F__ )
  102. #define portRESTORE_CONTEXT() \
  103. asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
  104. "MOV [W0], W15 \n" \
  105. "POP W0 \n" /* Restore the critical nesting counter for the task. */ \
  106. "MOV W0, _uxCriticalNesting \n" \
  107. "POP PSVPAG \n" \
  108. "POP CORCON \n" \
  109. "POP DOENDH \n" \
  110. "POP DOENDL \n" \
  111. "POP DOSTARTH \n" \
  112. "POP DOSTARTL \n" \
  113. "POP DCOUNT \n" \
  114. "POP ACCBU \n" \
  115. "POP ACCBH \n" \
  116. "POP ACCBL \n" \
  117. "POP ACCAU \n" \
  118. "POP ACCAH \n" \
  119. "POP ACCAL \n" \
  120. "POP TBLPAG \n" \
  121. "POP RCOUNT \n" /* Restore the registers from the stack. */ \
  122. "POP W14 \n" \
  123. "POP.D W12 \n" \
  124. "POP.D W10 \n" \
  125. "POP.D W8 \n" \
  126. "POP.D W6 \n" \
  127. "POP.D W4 \n" \
  128. "POP.D W2 \n" \
  129. "POP.D W0 \n" \
  130. "POP SR " );
  131. #endif /* MPLAB_DSPIC_PORT */
  132. #ifndef portRESTORE_CONTEXT
  133. #error Unrecognised device selected
  134. /* Note: dsPIC parts with EDS are not supported as there is no easy way to
  135. recover the hardware stacked copies for DOCOUNT, DOHIGH, DOLOW. */
  136. #endif
  137. /*
  138. * Setup the timer used to generate the tick interrupt.
  139. */
  140. void vApplicationSetupTickTimerInterrupt( void );
  141. /*
  142. * See header file for description.
  143. */
  144. StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
  145. {
  146. uint16_t usCode;
  147. UBaseType_t i;
  148. const StackType_t xInitialStack[] =
  149. {
  150. 0x1111, /* W1 */
  151. 0x2222, /* W2 */
  152. 0x3333, /* W3 */
  153. 0x4444, /* W4 */
  154. 0x5555, /* W5 */
  155. 0x6666, /* W6 */
  156. 0x7777, /* W7 */
  157. 0x8888, /* W8 */
  158. 0x9999, /* W9 */
  159. 0xaaaa, /* W10 */
  160. 0xbbbb, /* W11 */
  161. 0xcccc, /* W12 */
  162. 0xdddd, /* W13 */
  163. 0xeeee, /* W14 */
  164. 0xcdce, /* RCOUNT */
  165. 0xabac, /* TBLPAG */
  166. /* dsPIC specific registers. */
  167. #ifdef MPLAB_DSPIC_PORT
  168. 0x0202, /* ACCAL */
  169. 0x0303, /* ACCAH */
  170. 0x0404, /* ACCAU */
  171. 0x0505, /* ACCBL */
  172. 0x0606, /* ACCBH */
  173. 0x0707, /* ACCBU */
  174. 0x0808, /* DCOUNT */
  175. 0x090a, /* DOSTARTL */
  176. 0x1010, /* DOSTARTH */
  177. 0x1110, /* DOENDL */
  178. 0x1212, /* DOENDH */
  179. #endif
  180. };
  181. /* Setup the stack as if a yield had occurred.
  182. Save the low bytes of the program counter. */
  183. usCode = ( uint16_t ) pxCode;
  184. *pxTopOfStack = ( StackType_t ) usCode;
  185. pxTopOfStack++;
  186. /* Save the high byte of the program counter. This will always be zero
  187. here as it is passed in a 16bit pointer. If the address is greater than
  188. 16 bits then the pointer will point to a jump table. */
  189. *pxTopOfStack = ( StackType_t ) 0;
  190. pxTopOfStack++;
  191. /* Status register with interrupts enabled. */
  192. *pxTopOfStack = portINITIAL_SR;
  193. pxTopOfStack++;
  194. /* Parameters are passed in W0. */
  195. *pxTopOfStack = ( StackType_t ) pvParameters;
  196. pxTopOfStack++;
  197. for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( StackType_t ) ); i++ )
  198. {
  199. *pxTopOfStack = xInitialStack[ i ];
  200. pxTopOfStack++;
  201. }
  202. *pxTopOfStack = CORCON;
  203. pxTopOfStack++;
  204. #if defined(__HAS_EDS__)
  205. *pxTopOfStack = DSRPAG;
  206. pxTopOfStack++;
  207. *pxTopOfStack = DSWPAG;
  208. pxTopOfStack++;
  209. #else /* __HAS_EDS__ */
  210. *pxTopOfStack = PSVPAG;
  211. pxTopOfStack++;
  212. #endif /* __HAS_EDS__ */
  213. /* Finally the critical nesting depth. */
  214. *pxTopOfStack = 0x00;
  215. pxTopOfStack++;
  216. return pxTopOfStack;
  217. }
  218. /*-----------------------------------------------------------*/
  219. BaseType_t xPortStartScheduler( void )
  220. {
  221. /* Setup a timer for the tick ISR. */
  222. vApplicationSetupTickTimerInterrupt();
  223. /* Restore the context of the first task to run. */
  224. portRESTORE_CONTEXT();
  225. /* Simulate the end of the yield function. */
  226. asm volatile ( "return" );
  227. /* Should not reach here. */
  228. return pdTRUE;
  229. }
  230. /*-----------------------------------------------------------*/
  231. void vPortEndScheduler( void )
  232. {
  233. /* Not implemented in ports where there is nothing to return to.
  234. Artificially force an assert. */
  235. configASSERT( uxCriticalNesting == 1000UL );
  236. }
  237. /*-----------------------------------------------------------*/
  238. /*
  239. * Setup a timer for a regular tick.
  240. */
  241. __attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
  242. {
  243. const uint32_t ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;
  244. /* Prescale of 8. */
  245. T1CON = 0;
  246. TMR1 = 0;
  247. PR1 = ( uint16_t ) ulCompareMatch;
  248. /* Setup timer 1 interrupt priority. */
  249. IPC0bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
  250. /* Clear the interrupt as a starting condition. */
  251. IFS0bits.T1IF = 0;
  252. /* Enable the interrupt. */
  253. IEC0bits.T1IE = 1;
  254. /* Setup the prescale value. */
  255. T1CONbits.TCKPS0 = 1;
  256. T1CONbits.TCKPS1 = 0;
  257. /* Start the timer. */
  258. T1CONbits.TON = 1;
  259. }
  260. /*-----------------------------------------------------------*/
  261. void vPortEnterCritical( void )
  262. {
  263. portDISABLE_INTERRUPTS();
  264. uxCriticalNesting++;
  265. }
  266. /*-----------------------------------------------------------*/
  267. void vPortExitCritical( void )
  268. {
  269. configASSERT( uxCriticalNesting );
  270. uxCriticalNesting--;
  271. if( uxCriticalNesting == 0 )
  272. {
  273. portENABLE_INTERRUPTS();
  274. }
  275. }
  276. /*-----------------------------------------------------------*/
  277. void __attribute__((__interrupt__, auto_psv)) configTICK_INTERRUPT_HANDLER( void )
  278. {
  279. /* Clear the timer interrupt. */
  280. IFS0bits.T1IF = 0;
  281. if( xTaskIncrementTick() != pdFALSE )
  282. {
  283. portYIELD();
  284. }
  285. }