port.c 8.2 KB

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  1. /*
  2. * FreeRTOS Kernel V10.4.6
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. /*-----------------------------------------------------------
  29. * Implementation of functions defined in portable.h for the ST STR71x ARM7
  30. * port.
  31. *----------------------------------------------------------*/
  32. /* Library includes. */
  33. #include "wdg.h"
  34. #include "eic.h"
  35. /* Standard includes. */
  36. #include <stdlib.h>
  37. /* Scheduler includes. */
  38. #include "FreeRTOS.h"
  39. #include "task.h"
  40. /* Constants required to setup the initial stack. */
  41. #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
  42. #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
  43. #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
  44. /* Constants required to handle critical sections. */
  45. #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
  46. #define portMICROS_PER_SECOND 1000000
  47. /*-----------------------------------------------------------*/
  48. /* Setup the watchdog to generate the tick interrupts. */
  49. static void prvSetupTimerInterrupt( void );
  50. /* ulCriticalNesting will get set to zero when the first task starts. It
  51. cannot be initialised to 0 as this will cause interrupts to be enabled
  52. during the kernel initialisation process. */
  53. uint32_t ulCriticalNesting = ( uint32_t ) 9999;
  54. /* Tick interrupt routines for cooperative and preemptive operation
  55. respectively. The preemptive version is not defined as __irq as it is called
  56. from an asm wrapper function. */
  57. __arm __irq void vPortNonPreemptiveTick( void );
  58. void vPortPreemptiveTick( void );
  59. /*-----------------------------------------------------------*/
  60. /*
  61. * Initialise the stack of a task to look exactly as if a call to
  62. * portSAVE_CONTEXT had been called.
  63. *
  64. * See header file for description.
  65. */
  66. StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
  67. {
  68. StackType_t *pxOriginalTOS;
  69. pxOriginalTOS = pxTopOfStack;
  70. /* To ensure asserts in tasks.c don't fail, although in this case the assert
  71. is not really required. */
  72. pxTopOfStack--;
  73. /* Setup the initial stack of the task. The stack is set exactly as
  74. expected by the portRESTORE_CONTEXT() macro. */
  75. /* First on the stack is the return address - which in this case is the
  76. start of the task. The offset is added to make the return address appear
  77. as it would within an IRQ ISR. */
  78. *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
  79. pxTopOfStack--;
  80. *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
  81. pxTopOfStack--;
  82. *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
  83. pxTopOfStack--;
  84. *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
  85. pxTopOfStack--;
  86. *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
  87. pxTopOfStack--;
  88. *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
  89. pxTopOfStack--;
  90. *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
  91. pxTopOfStack--;
  92. *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
  93. pxTopOfStack--;
  94. *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
  95. pxTopOfStack--;
  96. *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
  97. pxTopOfStack--;
  98. *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
  99. pxTopOfStack--;
  100. *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
  101. pxTopOfStack--;
  102. *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
  103. pxTopOfStack--;
  104. *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
  105. pxTopOfStack--;
  106. *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
  107. pxTopOfStack--;
  108. /* When the task starts is will expect to find the function parameter in
  109. R0. */
  110. *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
  111. pxTopOfStack--;
  112. /* The status register is set for system mode, with interrupts enabled. */
  113. *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
  114. if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
  115. {
  116. /* We want the task to start in thumb mode. */
  117. *pxTopOfStack |= portTHUMB_MODE_BIT;
  118. }
  119. pxTopOfStack--;
  120. /* Interrupt flags cannot always be stored on the stack and will
  121. instead be stored in a variable, which is then saved as part of the
  122. tasks context. */
  123. *pxTopOfStack = portNO_CRITICAL_NESTING;
  124. return pxTopOfStack;
  125. }
  126. /*-----------------------------------------------------------*/
  127. BaseType_t xPortStartScheduler( void )
  128. {
  129. extern void vPortStartFirstTask( void );
  130. /* Start the timer that generates the tick ISR. Interrupts are disabled
  131. here already. */
  132. prvSetupTimerInterrupt();
  133. /* Start the first task. */
  134. vPortStartFirstTask();
  135. /* Should not get here! */
  136. return 0;
  137. }
  138. /*-----------------------------------------------------------*/
  139. void vPortEndScheduler( void )
  140. {
  141. /* It is unlikely that the ARM port will require this function as there
  142. is nothing to return to. */
  143. }
  144. /*-----------------------------------------------------------*/
  145. /* The cooperative scheduler requires a normal IRQ service routine to
  146. simply increment the system tick. */
  147. __arm __irq void vPortNonPreemptiveTick( void )
  148. {
  149. /* Increment the tick count - which may wake some tasks but as the
  150. preemptive scheduler is not being used any woken task is not given
  151. processor time no matter what its priority. */
  152. xTaskIncrementTick();
  153. /* Clear the interrupt in the watchdog and EIC. */
  154. WDG->SR = 0x0000;
  155. portCLEAR_EIC();
  156. }
  157. /*-----------------------------------------------------------*/
  158. /* This function is called from an asm wrapper, so does not require the __irq
  159. keyword. */
  160. void vPortPreemptiveTick( void )
  161. {
  162. /* Increment the tick counter. */
  163. if( xTaskIncrementTick() != pdFALSE )
  164. {
  165. /* Select a new task to execute. */
  166. vTaskSwitchContext();
  167. }
  168. /* Clear the interrupt in the watchdog and EIC. */
  169. WDG->SR = 0x0000;
  170. portCLEAR_EIC();
  171. }
  172. /*-----------------------------------------------------------*/
  173. static void prvSetupTimerInterrupt( void )
  174. {
  175. /* Set the watchdog up to generate a periodic tick. */
  176. WDG_ECITConfig( DISABLE );
  177. WDG_CntOnOffConfig( DISABLE );
  178. WDG_PeriodValueConfig( portMICROS_PER_SECOND / configTICK_RATE_HZ );
  179. /* Setup the tick interrupt in the EIC. */
  180. EIC_IRQChannelPriorityConfig( WDG_IRQChannel, 1 );
  181. EIC_IRQChannelConfig( WDG_IRQChannel, ENABLE );
  182. EIC_IRQConfig( ENABLE );
  183. WDG_ECITConfig( ENABLE );
  184. /* Start the timer - interrupts are actually disabled at this point so
  185. it is safe to do this here. */
  186. WDG_CntOnOffConfig( ENABLE );
  187. }
  188. /*-----------------------------------------------------------*/
  189. __arm __interwork void vPortEnterCritical( void )
  190. {
  191. /* Disable interrupts first! */
  192. __disable_interrupt();
  193. /* Now interrupts are disabled ulCriticalNesting can be accessed
  194. directly. Increment ulCriticalNesting to keep a count of how many times
  195. portENTER_CRITICAL() has been called. */
  196. ulCriticalNesting++;
  197. }
  198. /*-----------------------------------------------------------*/
  199. __arm __interwork void vPortExitCritical( void )
  200. {
  201. if( ulCriticalNesting > portNO_CRITICAL_NESTING )
  202. {
  203. /* Decrement the nesting count as we are leaving a critical section. */
  204. ulCriticalNesting--;
  205. /* If the nesting level has reached zero then interrupts should be
  206. re-enabled. */
  207. if( ulCriticalNesting == portNO_CRITICAL_NESTING )
  208. {
  209. __enable_interrupt();
  210. }
  211. }
  212. }
  213. /*-----------------------------------------------------------*/