xtensa_rtos.h 8.9 KB

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  1. /*
  2. * FreeRTOS Kernel V10.4.6
  3. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
  4. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  5. *
  6. * SPDX-License-Identifier: MIT
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  9. * this software and associated documentation files (the "Software"), to deal in
  10. * the Software without restriction, including without limitation the rights to
  11. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  12. * the Software, and to permit persons to whom the Software is furnished to do so,
  13. * subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in all
  16. * copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  20. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  21. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  22. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  23. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. * https://www.FreeRTOS.org
  26. * https://github.com/FreeRTOS
  27. *
  28. */
  29. /*
  30. * RTOS-SPECIFIC INFORMATION FOR XTENSA RTOS ASSEMBLER SOURCES
  31. * (FreeRTOS Port)
  32. *
  33. * This header is the primary glue between generic Xtensa RTOS support
  34. * sources and a specific RTOS port for Xtensa. It contains definitions
  35. * and macros for use primarily by Xtensa assembly coded source files.
  36. *
  37. * Macros in this header map callouts from generic Xtensa files to specific
  38. * RTOS functions. It may also be included in C source files.
  39. *
  40. * Xtensa RTOS ports support all RTOS-compatible configurations of the Xtensa
  41. * architecture, using the Xtensa hardware abstraction layer (HAL) to deal
  42. * with configuration specifics.
  43. *
  44. * Should be included by all Xtensa generic and RTOS port-specific sources.
  45. */
  46. #ifndef XTENSA_RTOS_H
  47. #define XTENSA_RTOS_H
  48. #ifdef __ASSEMBLER__
  49. #include <xtensa/coreasm.h>
  50. #else
  51. #include <xtensa/config/core.h>
  52. #endif
  53. #include <xtensa/corebits.h>
  54. #include <xtensa/config/system.h>
  55. #include <xtensa/simcall.h>
  56. /*
  57. Include any RTOS specific definitions that are needed by this header.
  58. */
  59. #include <FreeRTOSConfig.h>
  60. /*
  61. Convert FreeRTOSConfig definitions to XTENSA definitions.
  62. However these can still be overridden from the command line.
  63. */
  64. #ifndef XT_SIMULATOR
  65. #if configXT_SIMULATOR
  66. #define XT_SIMULATOR 1 /* Simulator mode */
  67. #endif
  68. #endif
  69. #ifndef XT_BOARD
  70. #if configXT_BOARD
  71. #define XT_BOARD 1 /* Board mode */
  72. #endif
  73. #endif
  74. #ifndef XT_TIMER_INDEX
  75. #if defined configXT_TIMER_INDEX
  76. #define XT_TIMER_INDEX configXT_TIMER_INDEX /* Index of hardware timer to be used */
  77. #endif
  78. #endif
  79. #ifndef XT_INTEXC_HOOKS
  80. #if configXT_INTEXC_HOOKS
  81. #define XT_INTEXC_HOOKS 1 /* Enables exception hooks */
  82. #endif
  83. #endif
  84. #if (!XT_SIMULATOR) && (!XT_BOARD)
  85. #error Either XT_SIMULATOR or XT_BOARD must be defined.
  86. #endif
  87. /*
  88. Name of RTOS (for messages).
  89. */
  90. #define XT_RTOS_NAME FreeRTOS
  91. /*
  92. Check some Xtensa configuration requirements and report error if not met.
  93. Error messages can be customize to the RTOS port.
  94. */
  95. #if !XCHAL_HAVE_XEA2
  96. #error "FreeRTOS/Xtensa requires XEA2 (exception architecture 2)."
  97. #endif
  98. /*******************************************************************************
  99. RTOS CALLOUT MACROS MAPPED TO RTOS PORT-SPECIFIC FUNCTIONS.
  100. Define callout macros used in generic Xtensa code to interact with the RTOS.
  101. The macros are simply the function names for use in calls from assembler code.
  102. Some of these functions may call back to generic functions in xtensa_context.h .
  103. *******************************************************************************/
  104. /*
  105. Inform RTOS of entry into an interrupt handler that will affect it.
  106. Allows RTOS to manage switch to any system stack and count nesting level.
  107. Called after minimal context has been saved, with interrupts disabled.
  108. RTOS port can call0 _xt_context_save to save the rest of the context.
  109. May only be called from assembly code by the 'call0' instruction.
  110. */
  111. // void XT_RTOS_INT_ENTER(void)
  112. #define XT_RTOS_INT_ENTER _frxt_int_enter
  113. /*
  114. Inform RTOS of completion of an interrupt handler, and give control to
  115. RTOS to perform thread/task scheduling, switch back from any system stack
  116. and restore the context, and return to the exit dispatcher saved in the
  117. stack frame at XT_STK_EXIT. RTOS port can call0 _xt_context_restore
  118. to save the context saved in XT_RTOS_INT_ENTER via _xt_context_save,
  119. leaving only a minimal part of the context to be restored by the exit
  120. dispatcher. This function does not return to the place it was called from.
  121. May only be called from assembly code by the 'call0' instruction.
  122. */
  123. // void XT_RTOS_INT_EXIT(void)
  124. #define XT_RTOS_INT_EXIT _frxt_int_exit
  125. /*
  126. Inform RTOS of the occurrence of a tick timer interrupt.
  127. If RTOS has no tick timer, leave XT_RTOS_TIMER_INT undefined.
  128. May be coded in or called from C or assembly, per ABI conventions.
  129. RTOS may optionally define XT_TICK_PER_SEC in its own way (eg. macro).
  130. */
  131. // void XT_RTOS_TIMER_INT(void)
  132. #define XT_RTOS_TIMER_INT _frxt_timer_int
  133. #define XT_TICK_PER_SEC configTICK_RATE_HZ
  134. /*
  135. Return in a15 the base address of the co-processor state save area for the
  136. thread that triggered a co-processor exception, or 0 if no thread was running.
  137. The state save area is structured as defined in xtensa_context.h and has size
  138. XT_CP_SIZE. Co-processor instructions should only be used in thread code, never
  139. in interrupt handlers or the RTOS kernel. May only be called from assembly code
  140. and by the 'call0' instruction. A result of 0 indicates an unrecoverable error.
  141. The implementation may use only a2-4, a15 (all other regs must be preserved).
  142. */
  143. // void* XT_RTOS_CP_STATE(void)
  144. #define XT_RTOS_CP_STATE _frxt_task_coproc_state
  145. /*******************************************************************************
  146. HOOKS TO DYNAMICALLY INSTALL INTERRUPT AND EXCEPTION HANDLERS PER LEVEL.
  147. This Xtensa RTOS port provides hooks for dynamically installing exception
  148. and interrupt handlers to facilitate automated testing where each test
  149. case can install its own handler for user exceptions and each interrupt
  150. priority (level). This consists of an array of function pointers indexed
  151. by interrupt priority, with index 0 being the user exception handler hook.
  152. Each entry in the array is initially 0, and may be replaced by a function
  153. pointer of type XT_INTEXC_HOOK. A handler may be uninstalled by installing 0.
  154. The handler for low and medium priority obeys ABI conventions so may be coded
  155. in C. For the exception handler, the cause is the contents of the EXCCAUSE
  156. reg, and the result is -1 if handled, else the cause (still needs handling).
  157. For interrupt handlers, the cause is a mask of pending enabled interrupts at
  158. that level, and the result is the same mask with the bits for the handled
  159. interrupts cleared (those not cleared still need handling). This allows a test
  160. case to either pre-handle or override the default handling for the exception
  161. or interrupt level (see xtensa_vectors.S).
  162. High priority handlers (including NMI) must be coded in assembly, are always
  163. called by 'call0' regardless of ABI, must preserve all registers except a0,
  164. and must not use or modify the interrupted stack. The hook argument 'cause'
  165. is not passed and the result is ignored, so as not to burden the caller with
  166. saving and restoring a2 (it assumes only one interrupt per level - see the
  167. discussion in high priority interrupts in xtensa_vectors.S). The handler
  168. therefore should be coded to prototype 'void h(void)' even though it plugs
  169. into an array of handlers of prototype 'unsigned h(unsigned)'.
  170. To enable interrupt/exception hooks, compile the RTOS with '-DXT_INTEXC_HOOKS'.
  171. *******************************************************************************/
  172. #define XT_INTEXC_HOOK_NUM (1 + XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI)
  173. #ifndef __ASSEMBLER__
  174. typedef unsigned (*XT_INTEXC_HOOK)(unsigned cause);
  175. extern volatile XT_INTEXC_HOOK _xt_intexc_hooks[XT_INTEXC_HOOK_NUM];
  176. #endif
  177. /*******************************************************************************
  178. CONVENIENCE INCLUSIONS.
  179. Ensures RTOS specific files need only include this one Xtensa-generic header.
  180. These headers are included last so they can use the RTOS definitions above.
  181. *******************************************************************************/
  182. #include "xtensa_context.h"
  183. #ifdef XT_RTOS_TIMER_INT
  184. #include "xtensa_timer.h"
  185. #endif
  186. /*******************************************************************************
  187. Xtensa Port Version.
  188. *******************************************************************************/
  189. #define XTENSA_PORT_VERSION 1.7
  190. #define XTENSA_PORT_VERSION_STRING "1.7"
  191. #endif /* XTENSA_RTOS_H */