/* Copyright (C) 2018 RDA Technologies Limited and/or its affiliates("RDA").
 * All rights reserved.
 *
 * This software is supplied "AS IS" without any warranties.
 * RDA assumes no responsibility or liability for the use of the software,
 * conveys no license or title under any patent, copyright, or mask work
 * right to the product. RDA reserves the right to make changes in the
 * software without notification.  RDA also make no representation or
 * warranty that such application will be suitable for the specified use
 * without further testing or modification.
 */

#ifndef _MEASPWR_H_
#define _MEASPWR_H_

// Auto generated by dtools(see dtools.txt for its version).
// Don't edit it manually!

#define REG_MEASPWR_BASE (0x18500000)

typedef volatile struct
{
    uint32_t measpwr_rxdata_ctrl1;       // 0x00000000
    uint32_t measpwr_rxdata_ctrl2;       // 0x00000004
    uint32_t measpwr_rxdata_val_ctrl;    // 0x00000008
    uint32_t measpwr_rxdata_offset3_id1; // 0x0000000c
    uint32_t measpwr_rxdata_offset3_id2; // 0x00000010
    uint32_t measpwr_rxdata_offset3_id3; // 0x00000014
    uint32_t measpwr_rxdata_offset3_id4; // 0x00000018
    uint32_t measpwr_rxdata_offset3_id5; // 0x0000001c
    uint32_t measpwr_rxdata_offset3_id6; // 0x00000020
    uint32_t measpwr_rxdata_offset3_id7; // 0x00000024
    uint32_t measpwr_rxdata_offset3_id8; // 0x00000028
    uint32_t measpwr_nb_offset4;         // 0x0000002c
    uint32_t measpwr_total_subf;         // 0x00000030
    uint32_t measpwr_ifft_para;          // 0x00000034
    uint32_t measpwr_ifft_gate;          // 0x00000038
    uint32_t measpwr_int_en;             // 0x0000003c
    uint32_t measpwr_int_sta;            // 0x00000040
    uint32_t measpwr_id1_id2_func_ctrl;  // 0x00000044
    uint32_t measpwr_id3_id8_func_ctrl;  // 0x00000048
    uint32_t measpwr_agc_compare;        // 0x0000004c
    uint32_t measpwr_nb_para;            // 0x00000050
    uint32_t measpwr_band_para;          // 0x00000054
    uint32_t __88[1];                    // 0x00000058
    uint32_t measpwr_afc_para;           // 0x0000005c
    uint32_t measpwr_afc_soft_reect1;    // 0x00000060
    uint32_t measpwr_sigpwr_para;        // 0x00000064
    uint32_t measpwr_sigma_para;         // 0x00000068
    uint32_t measpwr_doppler_para;       // 0x0000006c
    uint32_t measpwr_trms_para1;         // 0x00000070
    uint32_t measpwr_trms_para2;         // 0x00000074
    uint32_t measpwr_rsrp_para1;         // 0x00000078
    uint32_t measpwr_rsrp_para2;         // 0x0000007c
    uint32_t measpwr_rsrp_para3;         // 0x00000080
    uint32_t measpwr_rsrp_para4;         // 0x00000084
    uint32_t measpwr_irt_para1;          // 0x00000088
    uint32_t measpwr_irt_para2;          // 0x0000008c
    uint32_t measpwr__irt_scale_th1;     // 0x00000090
    uint32_t measpwr__irt_scale_th2;     // 0x00000094
    uint32_t measpwr__irt_scale_th4;     // 0x00000098
    uint32_t measpwr__irt_scale_th8;     // 0x0000009c
    uint32_t measpwr__irt_scale_th16;    // 0x000000a0
    uint32_t measpwr__irt_scale_th32;    // 0x000000a4
    uint32_t measpwr__irt_scale_th64;    // 0x000000a8
    uint32_t measpwr__irt_scale_th128;   // 0x000000ac
    uint32_t measpwr__irt_scale_th256;   // 0x000000b0
    uint32_t measpwr__irt_scale_th512;   // 0x000000b4
    uint32_t measpwr_rssi_para;          // 0x000000b8
    uint32_t measpwr_agc;                // 0x000000bc
    uint32_t measpwr_id1_para1;          // 0x000000c0
    uint32_t measpwr_id1_para2;          // 0x000000c4
    uint32_t measpwr_id2_para1;          // 0x000000c8
    uint32_t measpwr_id2_para2;          // 0x000000cc
    uint32_t measpwr_id3_para1;          // 0x000000d0
    uint32_t measpwr_id4_para1;          // 0x000000d4
    uint32_t measpwr_id5_para1;          // 0x000000d8
    uint32_t measpwr_id6_para1;          // 0x000000dc
    uint32_t measpwr_id7_para1;          // 0x000000e0
    uint32_t measpwr_id8_para1;          // 0x000000e4
    uint32_t measpwr_id_para;            // 0x000000e8
    uint32_t measpwr_id_ctrl;            // 0x000000ec
    uint32_t measpwr_ctrl;               // 0x000000f0
    uint32_t measpwr_afc1_out;           // 0x000000f4
    uint32_t measpwr_afc2_out;           // 0x000000f8
    uint32_t measpwr_afc3_out;           // 0x000000fc
    uint32_t measpwr_afc4_out;           // 0x00000100
    uint32_t measpwr_afc5_out;           // 0x00000104
    uint32_t measpwr_afc1_rsrp;          // 0x00000108
    uint32_t measpwr_afc2_rsrp;          // 0x0000010c
    uint32_t measpwr_afc3_rsrp;          // 0x00000110
    uint32_t measpwr_afc4_rsrp;          // 0x00000114
    uint32_t measpwr_afc5_rsrp;          // 0x00000118
    uint32_t measpwr_sigpwr1_out1;       // 0x0000011c
    uint32_t measpwr_sigpwr1_out2;       // 0x00000120
    uint32_t measpwr_sigpwr1_out3;       // 0x00000124
    uint32_t measpwr_sigpwr1_out4;       // 0x00000128
    uint32_t measpwr_sigpwr1_out5;       // 0x0000012c
    uint32_t measpwr_sigpwr1_out6;       // 0x00000130
    uint32_t measpwr_sigpwr2__out;       // 0x00000134
    uint32_t measpwr_sigpwr3__out;       // 0x00000138
    uint32_t measpwr_sigpwr4_out4;       // 0x0000013c
    uint32_t measpwr_sigpwr5_out5;       // 0x00000140
    uint32_t measpwr_sigma1_out1;        // 0x00000144
    uint32_t measpwr_sigma1_agc_out1;    // 0x00000148
    uint32_t measpwr_sigma1_out2;        // 0x0000014c
    uint32_t measpwr_sigma1_agc_out2;    // 0x00000150
    uint32_t measpwr_sigma1_out3;        // 0x00000154
    uint32_t measpwr_sigma1_agc_out3;    // 0x00000158
    uint32_t measpwr_sigma1_out4;        // 0x0000015c
    uint32_t measpwr_sigma1_agc_out4;    // 0x00000160
    uint32_t measpwr_sigma1_out5;        // 0x00000164
    uint32_t measpwr_sigma1_agc_out5;    // 0x00000168
    uint32_t measpwr_sigma1_out6;        // 0x0000016c
    uint32_t measpwr_sigma1_agc_out6;    // 0x00000170
    uint32_t measpwr_sigma2_out;         // 0x00000174
    uint32_t measpwr_sigma2_agc_out;     // 0x00000178
    uint32_t measpwr_sigma3_out;         // 0x0000017c
    uint32_t measpwr_sigma3_agc_out;     // 0x00000180
    uint32_t measpwr_sigma4_out;         // 0x00000184
    uint32_t measpwr_sigma4_agc_out;     // 0x00000188
    uint32_t measpwr_sigma5_out;         // 0x0000018c
    uint32_t measpwr_sigma5_agc_out;     // 0x00000190
    uint32_t measpwr_sinr1_out1;         // 0x00000194
    uint32_t measpwr_sinr1_out2;         // 0x00000198
    uint32_t measpwr_sinr1_out3;         // 0x0000019c
    uint32_t measpwr_sinr1_out4;         // 0x000001a0
    uint32_t measpwr_sinr1_out5;         // 0x000001a4
    uint32_t measpwr_sinr1_out6;         // 0x000001a8
    uint32_t measpwr_sinr2_out;          // 0x000001ac
    uint32_t measpwr_sinr3_out;          // 0x000001b0
    uint32_t measpwr_sinr4_out;          // 0x000001b4
    uint32_t measpwr_sinr5_out;          // 0x000001b8
    uint32_t measpwr__doppler1_out;      // 0x000001bc
    uint32_t measpwr__doppler2_out;      // 0x000001c0
    uint32_t measpwr_rsrp1_out;          // 0x000001c4
    uint32_t measpwr_rsrp1_db;           // 0x000001c8
    uint32_t measpwr_rsrp1_scale;        // 0x000001cc
    uint32_t measpwr_rsrp1_scale_db;     // 0x000001d0
    uint32_t measpwr_rsrq1_db;           // 0x000001d4
    uint32_t measpwr_rssi1_out;          // 0x000001d8
    uint32_t measpwr_rssi1_db;           // 0x000001dc
    uint32_t measpwr_rsrp2_out;          // 0x000001e0
    uint32_t measpwr_rsrp2_db;           // 0x000001e4
    uint32_t measpwr_rsrp2_scale;        // 0x000001e8
    uint32_t measpwr_rsrp2_scale_db;     // 0x000001ec
    uint32_t measpwr_rsrq2_db;           // 0x000001f0
    uint32_t measpwr_rssi2_out;          // 0x000001f4
    uint32_t measpwr_rssi2_db;           // 0x000001f8
    uint32_t measpwr_rsrp3_out;          // 0x000001fc
    uint32_t measpwr_rsrp3_db;           // 0x00000200
    uint32_t measpwr_rsrp3_scale;        // 0x00000204
    uint32_t measpwr_rsrp3_scale_db;     // 0x00000208
    uint32_t measpwr_rsrq3_db;           // 0x0000020c
    uint32_t measpwr_rssi3_out;          // 0x00000210
    uint32_t measpwr_rssi3_db;           // 0x00000214
    uint32_t measpwr_rsrp4_out;          // 0x00000218
    uint32_t measpwr_rsrp4_db;           // 0x0000021c
    uint32_t measpwr_rsrp4_scale;        // 0x00000220
    uint32_t measpwr_rsrp4_scale_db;     // 0x00000224
    uint32_t measpwr_rsrq4_db;           // 0x00000228
    uint32_t measpwr_rssi4_out;          // 0x0000022c
    uint32_t measpwr_rssi4_db;           // 0x00000230
    uint32_t measpwr_rsrp5_out;          // 0x00000234
    uint32_t measpwr_rsrp5_db;           // 0x00000238
    uint32_t measpwr_rsrp5_scale;        // 0x0000023c
    uint32_t measpwr_rsrp5_scale_db;     // 0x00000240
    uint32_t measpwr_rsrq5_db;           // 0x00000244
    uint32_t measpwr_rssi5_out;          // 0x00000248
    uint32_t measpwr_rssi5_db;           // 0x0000024c
    uint32_t measpwr_rsrp6_out;          // 0x00000250
    uint32_t measpwr_rsrp6_db;           // 0x00000254
    uint32_t measpwr_rsrp6_scale;        // 0x00000258
    uint32_t measpwr_rsrp6_scale_db;     // 0x0000025c
    uint32_t measpwr_rsrq6_db;           // 0x00000260
    uint32_t measpwr_rssi6_out;          // 0x00000264
    uint32_t measpwr_rssi6_db;           // 0x00000268
    uint32_t measpwr_rsrp7_out;          // 0x0000026c
    uint32_t measpwr_rsrp7_db;           // 0x00000270
    uint32_t measpwr_rsrp7_scale;        // 0x00000274
    uint32_t measpwr_rsrp7_scale_db;     // 0x00000278
    uint32_t measpwr_rsrq7_db;           // 0x0000027c
    uint32_t measpwr_rssi7_out;          // 0x00000280
    uint32_t measpwr_rssi7_db;           // 0x00000284
    uint32_t measpwr_rsrp8_out;          // 0x00000288
    uint32_t measpwr_rsrp8_db;           // 0x0000028c
    uint32_t measpwr_rsrp8_scale;        // 0x00000290
    uint32_t measpwr_rsrp8_scale_db;     // 0x00000294
    uint32_t measpwr_rsrq8_db;           // 0x00000298
    uint32_t measpwr_rssi8_out;          // 0x0000029c
    uint32_t measpwr_rssi8_db;           // 0x000002a0
    uint32_t measpwr_irt1_delay;         // 0x000002a4
    uint32_t measpwr__irt1outflag;       // 0x000002a8
    uint32_t measpwr_irt1_scale;         // 0x000002ac
    uint32_t measpwr_irt2_delay;         // 0x000002b0
    uint32_t measpwr__irt2outflag;       // 0x000002b4
    uint32_t measpwr_irt2_scale;         // 0x000002b8
    uint32_t measpwr_irt3_delay;         // 0x000002bc
    uint32_t measpwr__irt3outflag;       // 0x000002c0
    uint32_t measpwr_irt3_scale;         // 0x000002c4
    uint32_t measpwr_irt4_delay;         // 0x000002c8
    uint32_t measpwr__irt4outflag;       // 0x000002cc
    uint32_t measpwr_irt4_scale;         // 0x000002d0
    uint32_t measpwr_irt5_delay;         // 0x000002d4
    uint32_t measpwr__irt5outflag;       // 0x000002d8
    uint32_t measpwr_irt5_scale;         // 0x000002dc
    uint32_t measpwr_irt6_delay;         // 0x000002e0
    uint32_t measpwr__irt6outflag;       // 0x000002e4
    uint32_t measpwr_irt6_scale;         // 0x000002e8
    uint32_t measpwr_irt7_delay;         // 0x000002ec
    uint32_t measpwr__irt7outflag;       // 0x000002f0
    uint32_t measpwr_irt7_scale;         // 0x000002f4
    uint32_t measpwr_irt8_delay;         // 0x000002f8
    uint32_t measpwr__irt8outflag;       // 0x000002fc
    uint32_t measpwr_irt8_scale;         // 0x00000300
    uint32_t measpwr_trms1_out;          // 0x00000304
    uint32_t measpwr_trms2_out;          // 0x00000308
    uint32_t measpwr_id_info;            // 0x0000030c
    uint32_t measpwr_rbis_para;          // 0x00000310
    uint32_t measpwr_rbis_out1;          // 0x00000314
    uint32_t measpwr_rbis_out2;          // 0x00000318
    uint32_t measpwr_rbis_ave;           // 0x0000031c
    uint32_t measpwr_rbis_max;           // 0x00000320
    uint32_t measpwr_rx_irt;             // 0x00000324
    uint32_t measpwr_debug1;             // 0x00000328
    uint32_t measpwr_debug2;             // 0x0000032c
    uint32_t measpwr_debug3;             // 0x00000330
    uint32_t measpwr_sigpwr6_out;        // 0x00000334
    uint32_t measpwr_sigpwr7_out;        // 0x00000338
    uint32_t measpwr_sigpwr8_out;        // 0x0000033c
    uint32_t measpwr_sigma6_out;         // 0x00000340
    uint32_t measpwr_sigma6_agc_out;     // 0x00000344
    uint32_t measpwr_sigma7_out;         // 0x00000348
    uint32_t measpwr_sigma7_agc_out;     // 0x0000034c
    uint32_t measpwr_sigma8_out;         // 0x00000350
    uint32_t measpwr_sigma8_agc_out;     // 0x00000354
    uint32_t measpwr_sinr6_out;          // 0x00000358
    uint32_t measpwr_sinr7_out;          // 0x0000035c
    uint32_t measpwr_sinr8_out;          // 0x00000360
    uint32_t measpwr_afc_soft_reect2;    // 0x00000364
    uint32_t measpwr_afc_soft_reect3;    // 0x00000368
    uint32_t measpwr_afc_soft_reect4;    // 0x0000036c
    uint32_t measpwr_afc_soft_reect5;    // 0x00000370
    uint32_t measpwr_afc_soft_reect6;    // 0x00000374
    uint32_t measpwr_afc_soft_reect7;    // 0x00000378
    uint32_t measpwr_afc_soft_reect8;    // 0x0000037c
    uint32_t measpwr_doppler_para2;      // 0x00000380
    uint32_t measpwr_trmsf_para;         // 0x00000384
    uint32_t measpwr_id3_para2;          // 0x00000388
    uint32_t measpwr_id4_para2;          // 0x0000038c
    uint32_t measpwr_id5_para2;          // 0x00000390
    uint32_t measpwr_id6_para2;          // 0x00000394
    uint32_t measpwr_id7_para2;          // 0x00000398
    uint32_t measpwr_id8_para2;          // 0x0000039c
    uint32_t measpwr_afc1_hst;           // 0x000003a0
    uint32_t measpwr_afc2_hst;           // 0x000003a4
    uint32_t measpwr_afc3_hst;           // 0x000003a8
    uint32_t measpwr_afc4_hst;           // 0x000003ac
    uint32_t measpwr_afc5_hst;           // 0x000003b0
    uint32_t measpwr_afc6_hst;           // 0x000003b4
    uint32_t measpwr_afc7_hst;           // 0x000003b8
    uint32_t measpwr_afc8_hst;           // 0x000003bc
    uint32_t measpwr_sigpwr1_bef;        // 0x000003c0
    uint32_t measpwr_sigpwr2_bef;        // 0x000003c4
    uint32_t measpwr_sigpwr3_bef;        // 0x000003c8
    uint32_t measpwr_sigpwr4_bef;        // 0x000003cc
    uint32_t measpwr_sigpwr5_bef;        // 0x000003d0
    uint32_t measpwr_sigpwr6_bef;        // 0x000003d4
    uint32_t measpwr_sigpwr7_bef;        // 0x000003d8
    uint32_t measpwr_sigpwr8_bef;        // 0x000003dc
    uint32_t measpwr_sigma1_bef;         // 0x000003e0
    uint32_t measpwr_sigma2_bef;         // 0x000003e4
    uint32_t measpwr_sigma3_bef;         // 0x000003e8
    uint32_t measpwr_sigma4_bef;         // 0x000003ec
    uint32_t measpwr_sigma5_bef;         // 0x000003f0
    uint32_t measpwr_sigma6_bef;         // 0x000003f4
    uint32_t measpwr_sigma7_bef;         // 0x000003f8
    uint32_t measpwr_sigma8_bef;         // 0x000003fc
    uint32_t measpwr_doppler3_out;       // 0x00000400
    uint32_t measpwr_doppler4_out;       // 0x00000404
    uint32_t measpwr_doppler5_out;       // 0x00000408
    uint32_t measpwr_doppler6_out;       // 0x0000040c
    uint32_t measpwr_doppler7_out;       // 0x00000410
    uint32_t measpwr_doppler8_out;       // 0x00000414
    uint32_t measpwr_doppler1_bef1;      // 0x00000418
    uint32_t measpwr_doppler1_bef2;      // 0x0000041c
    uint32_t measpwr_doppler2_bef1;      // 0x00000420
    uint32_t measpwr_doppler2_bef2;      // 0x00000424
    uint32_t measpwr_trmsf1_out;         // 0x00000428
    uint32_t measpwr_trmsf2_out;         // 0x0000042c
    uint32_t measpwr_trmsf3_out;         // 0x00000430
    uint32_t measpwr_trmsf4_out;         // 0x00000434
    uint32_t measpwr_trmsf5_out;         // 0x00000438
    uint32_t measpwr_trmsf6_out;         // 0x0000043c
    uint32_t measpwr_trmsf7_out;         // 0x00000440
    uint32_t measpwr_trmsf8_out;         // 0x00000444
    uint32_t __1096[1];                  // 0x00000448
    uint32_t measpwr_trmsf1_bef1;        // 0x0000044c
    uint32_t measpwr_trmsf1_bef2;        // 0x00000450
    uint32_t measpwr_trmsf2_bef1;        // 0x00000454
    uint32_t measpwr_trmsf2_bef2;        // 0x00000458
    uint32_t measpwr_trmsf3_bef1;        // 0x0000045c
    uint32_t measpwr_trmsf3_bef2;        // 0x00000460
    uint32_t measpwr_trmsf4_bef1;        // 0x00000464
    uint32_t measpwr_trmsf4_bef2;        // 0x00000468
    uint32_t measpwr_trmsf5_bef1;        // 0x0000046c
    uint32_t measpwr_trmsf5_bef2;        // 0x00000470
    uint32_t measpwr_trmsf6_bef1;        // 0x00000474
    uint32_t measpwr_trmsf6_bef2;        // 0x00000478
    uint32_t measpwr_trmsf7_bef1;        // 0x0000047c
    uint32_t measpwr_trmsf7_bef2;        // 0x00000480
    uint32_t measpwr_trmsf8_bef1;        // 0x00000484
    uint32_t measpwr_trmsf8_bef2;        // 0x00000488
    uint32_t measpwr_pow1_max;           // 0x0000048c
    uint32_t measpwr_pow2_max;           // 0x00000490
    uint32_t measpwr_pow3_max;           // 0x00000494
    uint32_t measpwr_pow4_max;           // 0x00000498
    uint32_t measpwr_pow5_max;           // 0x0000049c
    uint32_t measpwr_pow6_max;           // 0x000004a0
    uint32_t measpwr_pow7_max;           // 0x000004a4
    uint32_t measpwr_pow8_max;           // 0x000004a8
    uint32_t measpwr_trms3_out;          // 0x000004ac
    uint32_t measpwr_trms4_out;          // 0x000004b0
    uint32_t measpwr_trms5_out;          // 0x000004b4
    uint32_t measpwr_trms6_out;          // 0x000004b8
    uint32_t measpwr_trms7_out;          // 0x000004bc
    uint32_t measpwr_trms8_out;          // 0x000004c0
    uint32_t measpwr_reis_conf;          // 0x000004c4
    uint32_t measpwr_reis_pos0;          // 0x000004c8
    uint32_t measpwr_reis_pos1;          // 0x000004cc
    uint32_t measpwr_reis_pos2;          // 0x000004d0
    uint32_t measpwr_reis_pos3;          // 0x000004d4
    uint32_t measpwr_offline0_sel;       // 0x000004d8
    uint32_t measpwr_offline0_th;        // 0x000004dc
    uint32_t measpwr_offline0_pos;       // 0x000004e0
    uint32_t measpwr_offline0_id;        // 0x000004e4
    uint32_t measpwr_offline1_para;      // 0x000004e8
    uint32_t measpwr_offline1_agc1;      // 0x000004ec
    uint32_t measpwr_offline1_agc2;      // 0x000004f0
    uint32_t measpwr_offline1_agc3;      // 0x000004f4
    uint32_t measpwr_offline1_agc4;      // 0x000004f8
    uint32_t measpwr_offline1_agc5;      // 0x000004fc
    uint32_t measpwr_offline1_agc6;      // 0x00000500
    uint32_t measpwr_crs_rssi1_out1;     // 0x00000504
    uint32_t measpwr_crs_rssi1_out2;     // 0x00000508
    uint32_t measpwr_crs_rssi1_out3;     // 0x0000050c
    uint32_t measpwr_crs_rssi2_out1;     // 0x00000510
    uint32_t measpwr_crs_rssi2_out2;     // 0x00000514
    uint32_t measpwr_crs_rssi2_out3;     // 0x00000518
    uint32_t __1308[1];                  // 0x0000051c
    uint32_t measpwr_crs_rssi3_out;      // 0x00000520
    uint32_t measpwr_crs_rssi4_out;      // 0x00000524
    uint32_t measpwr_crs_rssi5_out;      // 0x00000528
    uint32_t measpwr_crs_rssi6_out;      // 0x0000052c
    uint32_t measpwr_crs_rssi7_out;      // 0x00000530
    uint32_t measpwr_crs_rssi8_out;      // 0x00000534
    uint32_t measpwr_crs_rssi1_agc1;     // 0x00000538
    uint32_t measpwr_crs_rssi1_agc2;     // 0x0000053c
    uint32_t measpwr_crs_rssi1_agc3;     // 0x00000540
    uint32_t measpwr_crs_rssi2_agc1;     // 0x00000544
    uint32_t measpwr_crs_rssi2_agc2;     // 0x00000548
    uint32_t measpwr_crs_rssi2_agc3;     // 0x0000054c
    uint32_t measpwr_crs_rssi3_agc;      // 0x00000550
    uint32_t measpwr_crs_rssi4_agc;      // 0x00000554
    uint32_t measpwr_crs_rssi5_agc;      // 0x00000558
    uint32_t measpwr_crs_rssi6_agc;      // 0x0000055c
    uint32_t measpwr_crs_rssi7_agc;      // 0x00000560
    uint32_t measpwr_crs_rssi8_agc;      // 0x00000564
    uint32_t measpwr_hmmse_win;          // 0x00000568
    uint32_t measpwr_hmmse_bitsel;       // 0x0000056c
    uint32_t measpwr_hmmse_flag;         // 0x00000570
    uint32_t measpwr_id_info2;           // 0x00000574
    uint32_t measpwr_inmem_mode;         // 0x00000578
    uint32_t measpwr_afc1_rsrp_hst;      // 0x0000057c
    uint32_t measpwr_afc2_rsrp_hst;      // 0x00000580
    uint32_t measpwr_afc3_rsrp_hst;      // 0x00000584
    uint32_t measpwr_afc4_rsrp_hst;      // 0x00000588
    uint32_t measpwr_afc5_rsrp_hst;      // 0x0000058c
    uint32_t measpwr_afc6_rsrp_hst;      // 0x00000590
    uint32_t measpwr_afc7_rsrp_hst;      // 0x00000594
    uint32_t measpwr_afc8_rsrp_hst;      // 0x00000598
    uint32_t measpwr_powmax1_scale;      // 0x0000059c
    uint32_t measpwr_powmax2_scale;      // 0x000005a0
    uint32_t measpwr_powmax3_scale;      // 0x000005a4
    uint32_t measpwr_powmax4_scale;      // 0x000005a8
    uint32_t measpwr_powmax5_scale;      // 0x000005ac
    uint32_t measpwr_powmax6_scale;      // 0x000005b0
    uint32_t measpwr_powmax7_scale;      // 0x000005b4
    uint32_t measpwr_powmax8_scale;      // 0x000005b8
    uint32_t measpwr_afc6_out;           // 0x000005bc
    uint32_t measpwr_afc7_out;           // 0x000005c0
    uint32_t measpwr_afc8_out;           // 0x000005c4
    uint32_t measpwr_afc6_rsrp;          // 0x000005c8
    uint32_t measpwr_afc7_rsrp;          // 0x000005cc
    uint32_t measpwr_afc8_rsrp;          // 0x000005d0
    uint32_t measpwr_doppler3_bef1;      // 0x000005d4
    uint32_t measpwr_doppler3_bef2;      // 0x000005d8
    uint32_t measpwr_doppler4_bef1;      // 0x000005dc
    uint32_t measpwr_doppler4_bef2;      // 0x000005e0
    uint32_t measpwr_doppler5_bef1;      // 0x000005e4
    uint32_t measpwr_doppler5_bef2;      // 0x000005e8
    uint32_t measpwr_doppler6_bef1;      // 0x000005ec
    uint32_t measpwr_doppler6_bef2;      // 0x000005f0
    uint32_t measpwr_doppler7_bef1;      // 0x000005f4
    uint32_t measpwr_doppler7_bef2;      // 0x000005f8
    uint32_t measpwr_doppler8_bef1;      // 0x000005fc
    uint32_t measpwr_doppler8_bef2;      // 0x00000600
    uint32_t measpwr_offline1_agc7;      // 0x00000604
    uint32_t measpwr_int_join;           // 0x00000608
    uint32_t measpwr_int_mark;           // 0x0000060c
    uint32_t measpwr_int_flag;           // 0x00000610
    uint32_t measpwr_offline0_decpos1;   // 0x00000614
    uint32_t measpwr_offline0_decpos2;   // 0x00000618
    uint32_t measpwr_offline0_decpos3;   // 0x0000061c
    uint32_t measpwr_offline0_decpos4;   // 0x00000620
    uint32_t measpwr_offline0_decpos5;   // 0x00000624
    uint32_t measpwr_offline0_decpos6;   // 0x00000628
    uint32_t measpwr_offline0_decpos7;   // 0x0000062c
    uint32_t measpwr_offline0_decpos8;   // 0x00000630
    uint32_t measpwr_rbis_para2;         // 0x00000634
    uint32_t measpwr_rbis2_out1;         // 0x00000638
    uint32_t measpwr_rbis2_out2;         // 0x0000063c
    uint32_t measpwr_rbis2_ave;          // 0x00000640
    uint32_t measpwr_rbis2_max;          // 0x00000644
    uint32_t measpwr_rbis3_out1;         // 0x00000648
    uint32_t measpwr_rbis3_out2;         // 0x0000064c
    uint32_t measpwr_rbis3_ave;          // 0x00000650
    uint32_t measpwr_rbis3_max;          // 0x00000654
    uint32_t measpwr__irt_scale2_th1;    // 0x00000658
    uint32_t measpwr__irt_scale2_th2;    // 0x0000065c
    uint32_t measpwr__irt_scale2_th4;    // 0x00000660
    uint32_t measpwr__irt_scale2_th8;    // 0x00000664
    uint32_t measpwr__irt_scale2_th16;   // 0x00000668
    uint32_t measpwr__irt_scale2_th32;   // 0x0000066c
    uint32_t measpwr__irt_scale2_th64;   // 0x00000670
    uint32_t measpwr__irt_scale2_th128;  // 0x00000674
    uint32_t measpwr__irt_scale2_th256;  // 0x00000678
    uint32_t measpwr__irt_scale2_th512;  // 0x0000067c
    uint32_t measpwr_sigpwr_para2;       // 0x00000680
    uint32_t measpwr_irt_para3;          // 0x00000684
    uint32_t measpwr_trms_para3;         // 0x00000688
    uint32_t measpwr_rsrp_para5;         // 0x0000068c
    uint32_t measpwr_rbis_in1;           // 0x00000690
    uint32_t measpwr_rbis_in2;           // 0x00000694
    uint32_t measpwr_rbis2_in1;          // 0x00000698
    uint32_t measpwr_rbis2_in2;          // 0x0000069c
    uint32_t measpwr_rbis3_in1;          // 0x000006a0
    uint32_t measpwr_rbis3_in2;          // 0x000006a4
    uint32_t __1704[32342];              // 0x000006a8
    uint32_t mem_in_1;                   // 0x00020000
    uint32_t __131076[2047];             // 0x00020004
    uint32_t mem_in_2;                   // 0x00022000
    uint32_t __139268[2047];             // 0x00022004
    uint32_t mem_in_3;                   // 0x00024000
    uint32_t __147460[2047];             // 0x00024004
    uint32_t mem_in_4;                   // 0x00026000
    uint32_t __155652[2047];             // 0x00026004
    uint32_t mem_in_5;                   // 0x00028000
    uint32_t __163844[4095];             // 0x00028004
    uint32_t mem_in_6;                   // 0x0002c000
    uint32_t __180228[4095];             // 0x0002c004
    uint32_t mem_in_7;                   // 0x00030000
    uint32_t __196612[8191];             // 0x00030004
    uint32_t mem_in_8;                   // 0x00038000
} HWP_MEASPWR_T;

#define hwp_measpwr ((HWP_MEASPWR_T *)REG_ACCESS_ADDRESS(REG_MEASPWR_BASE))

// measpwr_rxdata_ctrl1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_offset1 : 19; // [18:0]
        uint32_t __30_19 : 12;    // [30:19]
        uint32_t fdd_tdd : 1;     // [31]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_CTRL1_T;

// measpwr_rxdata_ctrl2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_len : 16;  // [15:0]
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_CTRL2_T;

// measpwr_rxdata_val_ctrl
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_offset2 : 18;  // [17:0]
        uint32_t __19_18 : 2;      // [19:18]
        uint32_t invalid_flag : 1; // [20]
        uint32_t __31_21 : 11;     // [31:21]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_VAL_CTRL_T;

// measpwr_rxdata_offset3_id1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_offset3_id1 : 20; // [19:0]
        uint32_t __31_20 : 12;        // [31:20]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID1_T;

// measpwr_rxdata_offset3_id2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_offset3_id2 : 20; // [19:0]
        uint32_t __31_20 : 12;        // [31:20]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID2_T;

// measpwr_rxdata_offset3_id3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_offset3_id3 : 20; // [19:0]
        uint32_t __31_20 : 12;        // [31:20]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID3_T;

// measpwr_rxdata_offset3_id4
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_offset3_id4 : 20; // [19:0]
        uint32_t __31_20 : 12;        // [31:20]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID4_T;

// measpwr_rxdata_offset3_id5
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_offset3_id5 : 20; // [19:0]
        uint32_t __31_20 : 12;        // [31:20]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID5_T;

// measpwr_rxdata_offset3_id6
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_offset3_id6 : 20; // [19:0]
        uint32_t __31_20 : 12;        // [31:20]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID6_T;

// measpwr_rxdata_offset3_id7
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_offset3_id7 : 20; // [19:0]
        uint32_t __31_20 : 12;        // [31:20]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID7_T;

// measpwr_rxdata_offset3_id8
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rx_offset3_id8 : 20; // [19:0]
        uint32_t __31_20 : 12;        // [31:20]
    } b;
} REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID8_T;

// measpwr_nb_offset4
typedef union {
    uint32_t v;
    struct
    {
        uint32_t nb_offet4 : 15; // [14:0]
        uint32_t __31_15 : 17;   // [31:15]
    } b;
} REG_MEASPWR_MEASPWR_NB_OFFSET4_T;

// measpwr_total_subf
typedef union {
    uint32_t v;
    struct
    {
        uint32_t total_subf_num_id1_2 : 9; // [8:0]
        uint32_t __11_9 : 3;               // [11:9]
        uint32_t total_subf_num_id3_8 : 9; // [20:12]
        uint32_t __31_21 : 11;             // [31:21]
    } b;
} REG_MEASPWR_MEASPWR_TOTAL_SUBF_T;

// measpwr_ifft_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t ifft_cut1 : 2; // [1:0]
        uint32_t ifft_cut2 : 2; // [3:2]
        uint32_t ifft_cut3 : 2; // [5:4]
        uint32_t ifft_cut4 : 2; // [7:6]
        uint32_t ifft_cut5 : 2; // [9:8]
        uint32_t ifft_cut6 : 2; // [11:10]
        uint32_t ifft_cut7 : 2; // [13:12]
        uint32_t __31_14 : 18;  // [31:14]
    } b;
} REG_MEASPWR_MEASPWR_IFFT_PARA_T;

// measpwr_ifft_gate
typedef union {
    uint32_t v;
    struct
    {
        uint32_t ifft_gate : 7; // [6:0]
        uint32_t __31_7 : 25;   // [31:7]
    } b;
} REG_MEASPWR_MEASPWR_IFFT_GATE_T;

// measpwr_int_en
typedef union {
    uint32_t v;
    struct
    {
        uint32_t id1_interrupt_enable : 4; // [3:0]
        uint32_t id2_interrupt_enable : 4; // [7:4]
        uint32_t id3_interrupt_enable : 4; // [11:8]
        uint32_t id4_interrupt_enable : 4; // [15:12]
        uint32_t id5_interrupt_enable : 4; // [19:16]
        uint32_t id6_interrupt_enable : 4; // [23:20]
        uint32_t id7_interrupt_enable : 4; // [27:24]
        uint32_t id8_interrupt_enable : 4; // [31:28]
    } b;
} REG_MEASPWR_MEASPWR_INT_EN_T;

// measpwr_int_sta
typedef union {
    uint32_t v;
    struct
    {
        uint32_t id1_interrupt_state : 4; // [3:0], write clear
        uint32_t id2_interrupt_state : 4; // [7:4], write clear
        uint32_t id3_interrupt_state : 4; // [11:8], write clear
        uint32_t id4_interrupt_state : 4; // [15:12], write clear
        uint32_t id5_interrupt_state : 4; // [19:16], write clear
        uint32_t id6_interrupt_state : 4; // [23:20], write clear
        uint32_t id7_interrupt_state : 4; // [27:24], write clear
        uint32_t id8_interrupt_state : 4; // [31:28], write clear
    } b;
} REG_MEASPWR_MEASPWR_INT_STA_T;

// measpwr_id1_id2_func_ctrl
typedef union {
    uint32_t v;
    struct
    {
        uint32_t id1_id2_irt_en : 1;     // [0]
        uint32_t id1_id2_rsrp_en : 1;    // [1]
        uint32_t id1_id2_trms_en : 1;    // [2]
        uint32_t id1_id2_afc_hst_en : 1; // [3]
        uint32_t id1_id2_afc_com_en : 1; // [4]
        uint32_t id1_id2_sinr_en : 1;    // [5]
        uint32_t id1_id2_doppler_en : 1; // [6]
        uint32_t id1_id2_sigma_en : 1;   // [7]
        uint32_t id1_id2_trmsf_en : 1;   // [8]
        uint32_t __31_9 : 23;            // [31:9]
    } b;
} REG_MEASPWR_MEASPWR_ID1_ID2_FUNC_CTRL_T;

// measpwr_id3_id8_func_ctrl
typedef union {
    uint32_t v;
    struct
    {
        uint32_t id3_id8_irt_en : 1;     // [0]
        uint32_t id3_id8_rsrp_en : 1;    // [1]
        uint32_t id3_id8_trms_en : 1;    // [2]
        uint32_t id3_id8_afc_hst_en : 1; // [3]
        uint32_t id3_id8_afc_com_en : 1; // [4]
        uint32_t id3_id8_sinr_en : 1;    // [5]
        uint32_t id3_id8_doppler_en : 1; // [6]
        uint32_t id3_id8_sigma_en : 1;   // [7]
        uint32_t id3_id8_trmsf_en : 1;   // [8]
        uint32_t __31_9 : 23;            // [31:9]
    } b;
} REG_MEASPWR_MEASPWR_ID3_ID8_FUNC_CTRL_T;

// measpwr_agc_compare
typedef union {
    uint32_t v;
    struct
    {
        uint32_t agc_compare : 10; // [9:0]
        uint32_t __31_10 : 22;     // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_AGC_COMPARE_T;

// measpwr_nb_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t id1_nb_ind : 4;  // [3:0]
        uint32_t id2_nb_ind : 4;  // [7:4]
        uint32_t id38_nb_ind : 4; // [11:8]
        uint32_t __31_12 : 20;    // [31:12]
    } b;
} REG_MEASPWR_MEASPWR_NB_PARA_T;

// measpwr_band_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t sys_bw_id12 : 3;  // [2:0]
        uint32_t __3_3 : 1;        // [3]
        uint32_t meas_bw_id12 : 3; // [6:4]
        uint32_t __7_7 : 1;        // [7]
        uint32_t sys_bw_id38 : 3;  // [10:8]
        uint32_t __11_11 : 1;      // [11]
        uint32_t meas_bw_id38 : 3; // [14:12]
        uint32_t __31_15 : 17;     // [31:15]
    } b;
} REG_MEASPWR_MEASPWR_BAND_PARA_T;

// measpwr_afc_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_renum : 3;        // [2:0]
        uint32_t __3_3 : 1;            // [3]
        uint32_t afc_related_flag : 1; // [4]
        uint32_t __7_5 : 3;            // [7:5]
        uint32_t afc_factor : 16;      // [23:8]
        uint32_t __31_24 : 8;          // [31:24]
    } b;
} REG_MEASPWR_MEASPWR_AFC_PARA_T;

// measpwr_afc_soft_reect1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_soft_fa_ctor1 : 16; // [15:0]
        uint32_t __31_16 : 16;           // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC_SOFT_REECT1_T;

// measpwr_sigpwr_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t sigpwr_renum : 8;   // [7:0]
        uint32_t sigpwr_ofdmnum : 2; // [9:8]
        uint32_t __11_10 : 2;        // [11:10]
        uint32_t sigpwr_alpha : 17;  // [28:12]
        uint32_t __31_29 : 3;        // [31:29]
    } b;
} REG_MEASPWR_MEASPWR_SIGPWR_PARA_T;

// measpwr_sigma_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t sigma_win : 7;    // [6:0]
        uint32_t __7_7 : 1;        // [7]
        uint32_t sigma_alpha : 17; // [24:8]
        uint32_t __31_25 : 7;      // [31:25]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA_PARA_T;

// measpwr_doppler_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t doppler_win : 7;     // [6:0]
        uint32_t __7_7 : 1;           // [7]
        uint32_t doppler_scale : 4;   // [11:8]
        uint32_t __12_12 : 1;         // [12]
        uint32_t doppler_alpha1 : 17; // [29:13]
        uint32_t __31_30 : 2;         // [31:30]
    } b;
} REG_MEASPWR_MEASPWR_DOPPLER_PARA_T;

// measpwr_trms_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t dis_limit : 8; // [7:0]
        uint32_t d_flag : 1;    // [8]
        uint32_t d_flag2 : 1;   // [9]
        uint32_t __11_10 : 2;   // [11:10]
        uint32_t noise_sel : 1; // [12]
        uint32_t __15_13 : 3;   // [15:13]
        uint32_t t_th : 8;      // [23:16]
        uint32_t __31_24 : 8;   // [31:24]
    } b;
} REG_MEASPWR_MEASPWR_TRMS_PARA1_T;

// measpwr_trms_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t n_th : 16; // [15:0]
        uint32_t s_th : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_TRMS_PARA2_T;

// measpwr_rsrp_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t dis_limit : 8; // [7:0]
        uint32_t beta : 16;     // [23:8]
        uint32_t d_flag : 1;    // [24]
        uint32_t d_flag2 : 1;   // [25]
        uint32_t __31_26 : 6;   // [31:26]
    } b;
} REG_MEASPWR_MEASPWR_RSRP_PARA1_T;

// measpwr_rsrp_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrp_agcadjust : 8;    // [7:0]
        uint32_t mode1_compensate : 9;  // [16:8]
        uint32_t mode1_compensate2 : 9; // [25:17]
        uint32_t __31_26 : 6;           // [31:26]
    } b;
} REG_MEASPWR_MEASPWR_RSRP_PARA2_T;

// measpwr_rsrp_para3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rssi_q : 7;  // [6:0]
        uint32_t __7_7 : 1;   // [7]
        uint32_t s_th : 16;   // [23:8]
        uint32_t __31_24 : 8; // [31:24]
    } b;
} REG_MEASPWR_MEASPWR_RSRP_PARA3_T;

// measpwr_rsrp_para4
typedef union {
    uint32_t v;
    struct
    {
        uint32_t pow_pa : 8;     // [7:0]
        uint32_t powq_value : 8; // [15:8]
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP_PARA4_T;

// measpwr_irt_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t irt_ofdm_num : 2; // [1:0]
        uint32_t __3_2 : 2;        // [3:2]
        uint32_t dis_limit : 8;    // [11:4]
        uint32_t n_scale : 4;      // [15:12]
        uint32_t pow_max_num : 4;  // [19:16]
        uint32_t val_sel : 1;      // [20]
        uint32_t __31_21 : 11;     // [31:21]
    } b;
} REG_MEASPWR_MEASPWR_IRT_PARA1_T;

// measpwr_irt_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t n_th : 16; // [15:0]
        uint32_t s_th : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_IRT_PARA2_T;

// measpwr_rssi_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rssi_sel : 1;         // [0]
        uint32_t __3_1 : 3;            // [3:1]
        uint32_t rssi_compensate : 8;  // [11:4]
        uint32_t rssi_compensate2 : 8; // [19:12]
        uint32_t __31_20 : 12;         // [31:20]
    } b;
} REG_MEASPWR_MEASPWR_RSSI_PARA_T;

// measpwr_agc
typedef union {
    uint32_t v;
    struct
    {
        uint32_t agc_rx : 10;  // [9:0]
        uint32_t __31_10 : 22; // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_AGC_T;

// measpwr_id1_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t cp_index : 1;         // [0]
        uint32_t tx_num : 1;           // [1]
        uint32_t afc_out_sel : 1;      // [2]
        uint32_t tx_flag : 1;          // [3]
        uint32_t nid : 9;              // [12:4]
        uint32_t firstd_ofdm_flag : 1; // [13]
        uint32_t crs_rssi_sel : 2;     // [15:14]
        uint32_t afc_out_num : 8;      // [23:16]
        uint32_t offline0_time : 4;    // [27:24]
        uint32_t lnum_mod : 4;         // [31:28]
    } b;
} REG_MEASPWR_MEASPWR_ID1_PARA1_T;

// measpwr_id1_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t restart : 1;           // [0]
        uint32_t windows_clr : 1;       // [1]
        uint32_t last_flag : 1;         // [2]
        uint32_t afc_related_en : 1;    // [3]
        uint32_t sinr_map : 3;          // [6:4]
        uint32_t offline0_step : 9;     // [15:7]
        uint32_t frame_map : 10;        // [25:16]
        uint32_t crs_rssi_clr : 1;      // [26]
        uint32_t __27_27 : 1;           // [27]
        uint32_t pow_data_sel : 2;      // [29:28]
        uint32_t irt_scale_disable : 1; // [30]
        uint32_t qf_mem_sel : 1;        // [31]
    } b;
} REG_MEASPWR_MEASPWR_ID1_PARA2_T;

// measpwr_id2_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t cp_index : 1;         // [0]
        uint32_t tx_num : 1;           // [1]
        uint32_t afc_out_sel : 1;      // [2]
        uint32_t tx_flag : 1;          // [3]
        uint32_t nid : 9;              // [12:4]
        uint32_t firstd_ofdm_flag : 1; // [13]
        uint32_t crs_rssi_sel : 2;     // [15:14]
        uint32_t afc_out_num : 8;      // [23:16]
        uint32_t offline0_time : 4;    // [27:24]
        uint32_t lnum_mod : 4;         // [31:28]
    } b;
} REG_MEASPWR_MEASPWR_ID2_PARA1_T;

// measpwr_id2_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t restart : 1;           // [0]
        uint32_t windows_clr : 1;       // [1]
        uint32_t last_flag : 1;         // [2]
        uint32_t afc_related_en : 1;    // [3]
        uint32_t reserve2 : 3;          // [6:4], read only
        uint32_t offline0_step : 9;     // [15:7]
        uint32_t frame_map : 10;        // [25:16]
        uint32_t crs_rssi_clr : 1;      // [26]
        uint32_t __27_27 : 1;           // [27]
        uint32_t pow_data_sel : 2;      // [29:28]
        uint32_t irt_scale_disable : 1; // [30]
        uint32_t qf_mem_sel : 1;        // [31]
    } b;
} REG_MEASPWR_MEASPWR_ID2_PARA2_T;

// measpwr_id3_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t restart : 1;          // [0]
        uint32_t windows_clr : 1;      // [1]
        uint32_t last_flag : 1;        // [2]
        uint32_t crs_rssi_clr : 1;     // [3]
        uint32_t cp_index : 1;         // [4]
        uint32_t tx_num : 1;           // [5]
        uint32_t tx_flag : 1;          // [6]
        uint32_t __7_7 : 1;            // [7]
        uint32_t nid : 9;              // [16:8]
        uint32_t firstd_ofdm_flag : 1; // [17]
        uint32_t __19_18 : 2;          // [19:18]
        uint32_t offline0_time : 4;    // [23:20]
        uint32_t lnum_mod : 4;         // [27:24]
        uint32_t __31_28 : 4;          // [31:28]
    } b;
} REG_MEASPWR_MEASPWR_ID3_PARA1_T;

// measpwr_id4_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t restart : 1;          // [0]
        uint32_t windows_clr : 1;      // [1]
        uint32_t last_flag : 1;        // [2]
        uint32_t crs_rssi_clr : 1;     // [3]
        uint32_t cp_index : 1;         // [4]
        uint32_t tx_num : 1;           // [5]
        uint32_t tx_flag : 1;          // [6]
        uint32_t __7_7 : 1;            // [7]
        uint32_t nid : 9;              // [16:8]
        uint32_t firstd_ofdm_flag : 1; // [17]
        uint32_t __19_18 : 2;          // [19:18]
        uint32_t offline0_time : 4;    // [23:20]
        uint32_t lnum_mod : 4;         // [27:24]
        uint32_t __31_28 : 4;          // [31:28]
    } b;
} REG_MEASPWR_MEASPWR_ID4_PARA1_T;

// measpwr_id5_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t restart : 1;          // [0]
        uint32_t windows_clr : 1;      // [1]
        uint32_t last_flag : 1;        // [2]
        uint32_t crs_rssi_clr : 1;     // [3]
        uint32_t cp_index : 1;         // [4]
        uint32_t tx_num : 1;           // [5]
        uint32_t tx_flag : 1;          // [6]
        uint32_t __7_7 : 1;            // [7]
        uint32_t nid : 9;              // [16:8]
        uint32_t firstd_ofdm_flag : 1; // [17]
        uint32_t __19_18 : 2;          // [19:18]
        uint32_t offline0_time : 4;    // [23:20]
        uint32_t lnum_mod : 4;         // [27:24]
        uint32_t __31_28 : 4;          // [31:28]
    } b;
} REG_MEASPWR_MEASPWR_ID5_PARA1_T;

// measpwr_id6_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t restart : 1;          // [0]
        uint32_t windows_clr : 1;      // [1]
        uint32_t last_flag : 1;        // [2]
        uint32_t crs_rssi_clr : 1;     // [3]
        uint32_t cp_index : 1;         // [4]
        uint32_t tx_num : 1;           // [5]
        uint32_t tx_flag : 1;          // [6]
        uint32_t __7_7 : 1;            // [7]
        uint32_t nid : 9;              // [16:8]
        uint32_t firstd_ofdm_flag : 1; // [17]
        uint32_t __19_18 : 2;          // [19:18]
        uint32_t offline0_time : 4;    // [23:20]
        uint32_t lnum_mod : 4;         // [27:24]
        uint32_t __31_28 : 4;          // [31:28]
    } b;
} REG_MEASPWR_MEASPWR_ID6_PARA1_T;

// measpwr_id7_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t restart : 1;          // [0]
        uint32_t windows_clr : 1;      // [1]
        uint32_t last_flag : 1;        // [2]
        uint32_t crs_rssi_clr : 1;     // [3]
        uint32_t cp_index : 1;         // [4]
        uint32_t tx_num : 1;           // [5]
        uint32_t tx_flag : 1;          // [6]
        uint32_t __7_7 : 1;            // [7]
        uint32_t nid : 9;              // [16:8]
        uint32_t firstd_ofdm_flag : 1; // [17]
        uint32_t __19_18 : 2;          // [19:18]
        uint32_t offline0_time : 4;    // [23:20]
        uint32_t lnum_mod : 4;         // [27:24]
        uint32_t __31_28 : 4;          // [31:28]
    } b;
} REG_MEASPWR_MEASPWR_ID7_PARA1_T;

// measpwr_id8_para1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t restart : 1;          // [0]
        uint32_t windows_clr : 1;      // [1]
        uint32_t last_flag : 1;        // [2]
        uint32_t crs_rssi_clr : 1;     // [3]
        uint32_t cp_index : 1;         // [4]
        uint32_t tx_num : 1;           // [5]
        uint32_t tx_flag : 1;          // [6]
        uint32_t __7_7 : 1;            // [7]
        uint32_t nid : 9;              // [16:8]
        uint32_t firstd_ofdm_flag : 1; // [17]
        uint32_t __19_18 : 2;          // [19:18]
        uint32_t offline0_time : 4;    // [23:20]
        uint32_t lnum_mod : 4;         // [27:24]
        uint32_t __31_28 : 4;          // [31:28]
    } b;
} REG_MEASPWR_MEASPWR_ID8_PARA1_T;

// measpwr_id_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mode_sel : 2;        // [1:0]
        uint32_t afc_soft_en : 1;     // [2]
        uint32_t irt_soft_en : 1;     // [3]
        uint32_t nid12_info : 16;     // [19:4]
        uint32_t __23_20 : 4;         // [23:20]
        uint32_t offlin_data_sel : 1; // [24]
        uint32_t __27_25 : 3;         // [27:25]
        uint32_t offline_mod_sel : 1; // [28]
        uint32_t __31_29 : 3;         // [31:29]
    } b;
} REG_MEASPWR_MEASPWR_ID_PARA_T;

// measpwr_id_ctrl
typedef union {
    uint32_t v;
    struct
    {
        uint32_t nid1 : 1;         // [0], write set
        uint32_t nid2 : 1;         // [1], write set
        uint32_t nid3 : 1;         // [2], write set
        uint32_t nid4 : 1;         // [3], write set
        uint32_t nid5 : 1;         // [4], write set
        uint32_t nid6 : 1;         // [5], write set
        uint32_t nid7 : 1;         // [6], write set
        uint32_t nid8 : 1;         // [7], write set
        uint32_t offline_sel : 1;  // [8], write set
        uint32_t __18_9 : 10;      // [18:9]
        uint32_t nid38_info : 10;  // [28:19], write set
        uint32_t invalid_flag : 1; // [29], write set
        uint32_t __31_30 : 2;      // [31:30]
    } b;
} REG_MEASPWR_MEASPWR_ID_CTRL_T;

// measpwr_ctrl
typedef union {
    uint32_t v;
    struct
    {
        uint32_t nid1_en : 1; // [0], write set
        uint32_t nid2_en : 1; // [1], write set
        uint32_t nid3_en : 1; // [2], write set
        uint32_t nid4_en : 1; // [3], write set
        uint32_t nid5_en : 1; // [4], write set
        uint32_t nid6_en : 1; // [5], write set
        uint32_t nid7_en : 1; // [6], write set
        uint32_t nid8_en : 1; // [7], write set
        uint32_t __31_8 : 24; // [31:8]
    } b;
} REG_MEASPWR_MEASPWR_CTRL_T;

// measpwr_afc1_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_out1 : 16; // [15:0], read only
        uint32_t __31_16 : 16;  // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC1_OUT_T;

// measpwr_afc2_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_out2 : 16; // [15:0], read only
        uint32_t __31_16 : 16;  // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC2_OUT_T;

// measpwr_afc3_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_out3 : 16; // [15:0], read only
        uint32_t __31_16 : 16;  // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC3_OUT_T;

// measpwr_afc4_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_out4 : 16; // [15:0], read only
        uint32_t __31_16 : 16;  // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC4_OUT_T;

// measpwr_afc5_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_out5 : 16; // [15:0], read only
        uint32_t __31_16 : 16;  // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC5_OUT_T;

// measpwr_afc1_rsrp
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp1 : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC1_RSRP_T;

// measpwr_afc2_rsrp
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp2 : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC2_RSRP_T;

// measpwr_afc3_rsrp
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp3 : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC3_RSRP_T;

// measpwr_afc4_rsrp
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp4 : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC4_RSRP_T;

// measpwr_afc5_rsrp
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp5 : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC5_RSRP_T;

// measpwr_sigma1_agc_out1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc1_out1 : 10;  // [9:0], read only
        uint32_t __15_10 : 6;         // [15:10]
        uint32_t sinr1_log_out1 : 11; // [26:16], read only
        uint32_t __31_27 : 5;         // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT1_T;

// measpwr_sigma1_agc_out2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc1_out2 : 10;  // [9:0], read only
        uint32_t __15_10 : 6;         // [15:10]
        uint32_t sinr1_log_out2 : 11; // [26:16], read only
        uint32_t __31_27 : 5;         // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT2_T;

// measpwr_sigma1_agc_out3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc1_out3 : 10;  // [9:0], read only
        uint32_t __15_10 : 6;         // [15:10]
        uint32_t sinr1_log_out3 : 11; // [26:16], read only
        uint32_t __31_27 : 5;         // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT3_T;

// measpwr_sigma1_agc_out4
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc1_out4 : 10;  // [9:0], read only
        uint32_t __15_10 : 6;         // [15:10]
        uint32_t sinr1_log_out4 : 11; // [26:16], read only
        uint32_t __31_27 : 5;         // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT4_T;

// measpwr_sigma1_agc_out5
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc1_out5 : 10;  // [9:0], read only
        uint32_t __15_10 : 6;         // [15:10]
        uint32_t sinr1_log_out5 : 11; // [26:16], read only
        uint32_t __31_27 : 5;         // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT5_T;

// measpwr_sigma1_agc_out6
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc1_out6 : 10;  // [9:0], read only
        uint32_t __15_10 : 6;         // [15:10]
        uint32_t sinr1_log_out6 : 11; // [26:16], read only
        uint32_t __31_27 : 5;         // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT6_T;

// measpwr_sigma2_agc_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc2_out : 10;  // [9:0], read only
        uint32_t __15_10 : 6;        // [15:10]
        uint32_t sinr2_log_out : 11; // [26:16], read only
        uint32_t __31_27 : 5;        // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA2_AGC_OUT_T;

// measpwr_sigma3_agc_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc3_out : 10;  // [9:0], read only
        uint32_t __15_10 : 6;        // [15:10]
        uint32_t sinr3_log_out : 11; // [26:16], read only
        uint32_t __31_27 : 5;        // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA3_AGC_OUT_T;

// measpwr_sigma4_agc_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc4_out : 10;  // [9:0], read only
        uint32_t __15_10 : 6;        // [15:10]
        uint32_t sinr4_log_out : 11; // [26:16], read only
        uint32_t __31_27 : 5;        // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA4_AGC_OUT_T;

// measpwr_sigma5_agc_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc5_out : 10;  // [9:0], read only
        uint32_t __15_10 : 6;        // [15:10]
        uint32_t sinr5_log_out : 11; // [26:16], read only
        uint32_t __31_27 : 5;        // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA5_AGC_OUT_T;

// measpwr__doppler1_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t doppler1_out : 11;  // [10:0], read only
        uint32_t __15_11 : 5;        // [15:11]
        uint32_t hls_agc_base1 : 10; // [25:16], read only
        uint32_t __31_26 : 6;        // [31:26]
    } b;
} REG_MEASPWR_MEASPWR__DOPPLER1_OUT_T;

// measpwr__doppler2_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t doppler2_out : 11;  // [10:0], read only
        uint32_t __15_11 : 5;        // [15:11]
        uint32_t hls_agc_base2 : 10; // [25:16], read only
        uint32_t __31_26 : 6;        // [31:26]
    } b;
} REG_MEASPWR_MEASPWR__DOPPLER2_OUT_T;

// measpwr_rsrp1_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrp_pwr_db : 16; // [15:0], read only
        uint32_t __31_16 : 16;     // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP1_DB_T;

// measpwr_rsrp1_scale_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t scale_rsrp_db : 16; // [15:0]
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP1_SCALE_DB_T;

// measpwr_rsrq1_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrq_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRQ1_DB_T;

// measpwr_rssi1_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rssi_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSSI1_DB_T;

// measpwr_rsrp2_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrp_pwr_db : 16; // [15:0], read only
        uint32_t __31_16 : 16;     // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP2_DB_T;

// measpwr_rsrp2_scale_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t scale_rsrp_db : 16; // [15:0]
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP2_SCALE_DB_T;

// measpwr_rsrq2_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrq_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRQ2_DB_T;

// measpwr_rssi2_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rssi_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSSI2_DB_T;

// measpwr_rsrp3_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrp_pwr_db : 16; // [15:0], read only
        uint32_t __31_16 : 16;     // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP3_DB_T;

// measpwr_rsrp3_scale_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t scale_rsrp_db : 16; // [15:0]
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP3_SCALE_DB_T;

// measpwr_rsrq3_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrq_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRQ3_DB_T;

// measpwr_rssi3_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rssi_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSSI3_DB_T;

// measpwr_rsrp4_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrp_pwr_db : 16; // [15:0], read only
        uint32_t __31_16 : 16;     // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP4_DB_T;

// measpwr_rsrp4_scale_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t scale_rsrp_db : 16; // [15:0]
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP4_SCALE_DB_T;

// measpwr_rsrq4_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrq_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRQ4_DB_T;

// measpwr_rssi4_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rssi_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSSI4_DB_T;

// measpwr_rsrp5_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrp_pwr_db : 16; // [15:0], read only
        uint32_t __31_16 : 16;     // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP5_DB_T;

// measpwr_rsrp5_scale_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t scale_rsrp_db : 16; // [15:0]
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP5_SCALE_DB_T;

// measpwr_rsrq5_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrq_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRQ5_DB_T;

// measpwr_rssi5_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rssi_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSSI5_DB_T;

// measpwr_rsrp6_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrp_pwr_db : 16; // [15:0], read only
        uint32_t __31_16 : 16;     // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP6_DB_T;

// measpwr_rsrp6_scale_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t scale_rsrp_db : 16; // [15:0]
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP6_SCALE_DB_T;

// measpwr_rsrq6_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrq_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRQ6_DB_T;

// measpwr_rssi6_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rssi_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSSI6_DB_T;

// measpwr_rsrp7_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrp_pwr_db : 16; // [15:0], read only
        uint32_t __31_16 : 16;     // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP7_DB_T;

// measpwr_rsrp7_scale_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t scale_rsrp_db : 16; // [15:0]
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP7_SCALE_DB_T;

// measpwr_rsrq7_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrq_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRQ7_DB_T;

// measpwr_rssi7_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rssi_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSSI7_DB_T;

// measpwr_rsrp8_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrp_pwr_db : 16; // [15:0], read only
        uint32_t __31_16 : 16;     // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP8_DB_T;

// measpwr_rsrp8_scale_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t scale_rsrp_db : 16; // [15:0]
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP8_SCALE_DB_T;

// measpwr_rsrq8_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rsrq_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRQ8_DB_T;

// measpwr_rssi8_db
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rssi_db : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSSI8_DB_T;

// measpwr_irt1_delay
typedef union {
    uint32_t v;
    struct
    {
        uint32_t irt_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_IRT1_DELAY_T;

// measpwr__irt1outflag
typedef union {
    uint32_t v;
    struct
    {
        uint32_t subf_num : 9;      // [8:0], read only
        uint32_t __11_9 : 3;        // [11:9]
        uint32_t irt_validflag : 1; // [12], read only
        uint32_t __31_13 : 19;      // [31:13]
    } b;
} REG_MEASPWR_MEASPWR__IRT1OUTFLAG_T;

// measpwr_irt2_delay
typedef union {
    uint32_t v;
    struct
    {
        uint32_t irt_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_IRT2_DELAY_T;

// measpwr__irt2outflag
typedef union {
    uint32_t v;
    struct
    {
        uint32_t subf_num : 9;      // [8:0], read only
        uint32_t __11_9 : 3;        // [11:9]
        uint32_t irt_validflag : 1; // [12], read only
        uint32_t __31_13 : 19;      // [31:13]
    } b;
} REG_MEASPWR_MEASPWR__IRT2OUTFLAG_T;

// measpwr_irt3_delay
typedef union {
    uint32_t v;
    struct
    {
        uint32_t irt_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_IRT3_DELAY_T;

// measpwr__irt3outflag
typedef union {
    uint32_t v;
    struct
    {
        uint32_t subf_num : 9;      // [8:0], read only
        uint32_t __11_9 : 3;        // [11:9]
        uint32_t irt_validflag : 1; // [12], read only
        uint32_t __31_13 : 19;      // [31:13]
    } b;
} REG_MEASPWR_MEASPWR__IRT3OUTFLAG_T;

// measpwr_irt4_delay
typedef union {
    uint32_t v;
    struct
    {
        uint32_t irt_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_IRT4_DELAY_T;

// measpwr__irt4outflag
typedef union {
    uint32_t v;
    struct
    {
        uint32_t subf_num : 9;      // [8:0], read only
        uint32_t __11_9 : 3;        // [11:9]
        uint32_t irt_validflag : 1; // [12], read only
        uint32_t __31_13 : 19;      // [31:13]
    } b;
} REG_MEASPWR_MEASPWR__IRT4OUTFLAG_T;

// measpwr_irt5_delay
typedef union {
    uint32_t v;
    struct
    {
        uint32_t irt_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_IRT5_DELAY_T;

// measpwr__irt5outflag
typedef union {
    uint32_t v;
    struct
    {
        uint32_t subf_num : 9;      // [8:0], read only
        uint32_t __11_9 : 3;        // [11:9]
        uint32_t irt_validflag : 1; // [12], read only
        uint32_t __31_13 : 19;      // [31:13]
    } b;
} REG_MEASPWR_MEASPWR__IRT5OUTFLAG_T;

// measpwr_irt6_delay
typedef union {
    uint32_t v;
    struct
    {
        uint32_t irt_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_IRT6_DELAY_T;

// measpwr__irt6outflag
typedef union {
    uint32_t v;
    struct
    {
        uint32_t subf_num : 9;      // [8:0], read only
        uint32_t __11_9 : 3;        // [11:9]
        uint32_t irt_validflag : 1; // [12], read only
        uint32_t __31_13 : 19;      // [31:13]
    } b;
} REG_MEASPWR_MEASPWR__IRT6OUTFLAG_T;

// measpwr_irt7_delay
typedef union {
    uint32_t v;
    struct
    {
        uint32_t irt_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_IRT7_DELAY_T;

// measpwr__irt7outflag
typedef union {
    uint32_t v;
    struct
    {
        uint32_t subf_num : 9;      // [8:0], read only
        uint32_t __11_9 : 3;        // [11:9]
        uint32_t irt_validflag : 1; // [12], read only
        uint32_t __31_13 : 19;      // [31:13]
    } b;
} REG_MEASPWR_MEASPWR__IRT7OUTFLAG_T;

// measpwr_irt8_delay
typedef union {
    uint32_t v;
    struct
    {
        uint32_t irt_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_IRT8_DELAY_T;

// measpwr__irt8outflag
typedef union {
    uint32_t v;
    struct
    {
        uint32_t subf_num : 9;      // [8:0], read only
        uint32_t __11_9 : 3;        // [11:9]
        uint32_t irt_validflag : 1; // [12], read only
        uint32_t __31_13 : 19;      // [31:13]
    } b;
} REG_MEASPWR_MEASPWR__IRT8OUTFLAG_T;

// measpwr_trms1_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t trms_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;    // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_TRMS1_OUT_T;

// measpwr_trms2_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t trms_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;    // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_TRMS2_OUT_T;

// measpwr_id_info
typedef union {
    uint32_t v;
    struct
    {
        uint32_t id1_info : 16; // [15:0], read only
        uint32_t id2_info : 16; // [31:16], read only
    } b;
} REG_MEASPWR_MEASPWR_ID_INFO_T;

// measpwr_rbis_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_factor : 16; // [15:0]
        uint32_t rbis_dipos : 7;   // [22:16]
        uint32_t rbis_num : 3;     // [25:23]
        uint32_t rbis_posen : 1;   // [26]
        uint32_t rbis_en : 1;      // [27]
        uint32_t rbis_judge : 1;   // [28]
        uint32_t rbis_correct : 1; // [29]
        uint32_t __31_30 : 2;      // [31:30]
    } b;
} REG_MEASPWR_MEASPWR_RBIS_PARA_T;

// measpwr_rbis_out1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_out0 : 7; // [6:0], read only
        uint32_t __7_7 : 1;     // [7]
        uint32_t rbis_out1 : 7; // [14:8], read only
        uint32_t __15_15 : 1;   // [15]
        uint32_t rbis_out2 : 7; // [22:16], read only
        uint32_t __23_23 : 1;   // [23]
        uint32_t rbis_out3 : 7; // [30:24], read only
        uint32_t __31_31 : 1;   // [31]
    } b;
} REG_MEASPWR_MEASPWR_RBIS_OUT1_T;

// measpwr_rbis_out2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_out4 : 7; // [6:0], read only
        uint32_t __7_7 : 1;     // [7]
        uint32_t rbis_num : 3;  // [10:8], read only
        uint32_t __31_11 : 21;  // [31:11]
    } b;
} REG_MEASPWR_MEASPWR_RBIS_OUT2_T;

// measpwr_rbis_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_max : 25; // [24:0], read only
        uint32_t __31_25 : 7;   // [31:25]
    } b;
} REG_MEASPWR_MEASPWR_RBIS_MAX_T;

// measpwr_rx_irt
typedef union {
    uint32_t v;
    struct
    {
        uint32_t id1_rx_irt : 5;   // [4:0], read only
        uint32_t id1_offset4 : 10; // [14:5], read only
        uint32_t __15_15 : 1;      // [15]
        uint32_t id2_rx_irt : 5;   // [20:16], read only
        uint32_t id2_offset4 : 10; // [30:21], read only
        uint32_t __31_31 : 1;      // [31]
    } b;
} REG_MEASPWR_MEASPWR_RX_IRT_T;

// measpwr_debug1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t datain_state : 3;      // [2:0], read only
        uint32_t __3_3 : 1;             // [3]
        uint32_t datagen_state : 11;    // [14:4], read only
        uint32_t __15_15 : 1;           // [15]
        uint32_t din_id_sel : 3;        // [18:16], read only
        uint32_t __19_19 : 1;           // [19]
        uint32_t offset2_update : 1;    // [20], read only
        uint32_t id_update : 1;         // [21], read only
        uint32_t debug_update_flag : 1; // [22], read only
        uint32_t debug_rev_flag : 1;    // [23], read only
        uint32_t __31_24 : 8;           // [31:24]
    } b;
} REG_MEASPWR_MEASPWR_DEBUG1_T;

// measpwr_debug2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t inmem_cont : 16;        // [15:0], read only
        uint32_t invalid_data_cont : 15; // [30:16], read only
        uint32_t inmem_in_act : 1;       // [31], read only
    } b;
} REG_MEASPWR_MEASPWR_DEBUG2_T;

// measpwr_debug3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t func_state : 9;       // [8:0], read only
        uint32_t __11_9 : 3;           // [11:9]
        uint32_t pow_state : 5;        // [16:12], read only
        uint32_t __19_17 : 3;          // [19:17]
        uint32_t func_id_sel : 3;      // [22:20], read only
        uint32_t __23_23 : 1;          // [23]
        uint32_t datain_state_cur : 3; // [26:24], read only
        uint32_t __31_27 : 5;          // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_DEBUG3_T;

// measpwr_sigma6_agc_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc6_out : 10;  // [9:0], read only
        uint32_t __15_10 : 6;        // [15:10]
        uint32_t sinr6_log_out : 11; // [26:16], read only
        uint32_t __31_27 : 5;        // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA6_AGC_OUT_T;

// measpwr_sigma7_agc_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc7_out : 10;  // [9:0], read only
        uint32_t __15_10 : 6;        // [15:10]
        uint32_t sinr7_log_out : 11; // [26:16], read only
        uint32_t __31_27 : 5;        // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA7_AGC_OUT_T;

// measpwr_sigma8_agc_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t baseagc8_out : 10;  // [9:0], read only
        uint32_t __15_10 : 6;        // [15:10]
        uint32_t sinr8_log_out : 11; // [26:16], read only
        uint32_t __31_27 : 5;        // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_SIGMA8_AGC_OUT_T;

// measpwr_afc_soft_reect2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_soft_fa_ctor2 : 16; // [15:0]
        uint32_t __31_16 : 16;           // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC_SOFT_REECT2_T;

// measpwr_afc_soft_reect3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_soft_fa_ctor3 : 16; // [15:0]
        uint32_t __31_16 : 16;           // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC_SOFT_REECT3_T;

// measpwr_afc_soft_reect4
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_soft_fa_ctor4 : 16; // [15:0]
        uint32_t __31_16 : 16;           // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC_SOFT_REECT4_T;

// measpwr_afc_soft_reect5
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_soft_fa_ctor5 : 16; // [15:0]
        uint32_t __31_16 : 16;           // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC_SOFT_REECT5_T;

// measpwr_afc_soft_reect6
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_soft_fa_ctor6 : 16; // [15:0]
        uint32_t __31_16 : 16;           // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC_SOFT_REECT6_T;

// measpwr_afc_soft_reect7
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_soft_fa_ctor7 : 16; // [15:0]
        uint32_t __31_16 : 16;           // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC_SOFT_REECT7_T;

// measpwr_afc_soft_reect8
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_soft_fa_ctor8 : 16; // [15:0]
        uint32_t __31_16 : 16;           // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC_SOFT_REECT8_T;

// measpwr_doppler_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t doppler_alpha2 : 17; // [16:0]
        uint32_t __31_17 : 15;        // [31:17]
    } b;
} REG_MEASPWR_MEASPWR_DOPPLER_PARA2_T;

// measpwr_trmsf_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t trmsf_alpha : 17; // [16:0]
        uint32_t __19_17 : 3;      // [19:17]
        uint32_t trmsf_space : 2;  // [21:20]
        uint32_t __23_22 : 2;      // [23:22]
        uint32_t trmsf_scale : 4;  // [27:24]
        uint32_t __31_28 : 4;      // [31:28]
    } b;
} REG_MEASPWR_MEASPWR_TRMSF_PARA_T;

// measpwr_id3_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t frame_map : 10;        // [9:0]
        uint32_t __11_10 : 2;           // [11:10]
        uint32_t pow_data_sel : 2;      // [13:12]
        uint32_t irt_scale_disable : 1; // [14]
        uint32_t qf_mem_sel : 1;        // [15]
        uint32_t offline0_step : 9;     // [24:16]
        uint32_t __31_25 : 7;           // [31:25]
    } b;
} REG_MEASPWR_MEASPWR_ID3_PARA2_T;

// measpwr_id4_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t frame_map : 10;        // [9:0]
        uint32_t __11_10 : 2;           // [11:10]
        uint32_t pow_data_sel : 2;      // [13:12]
        uint32_t irt_scale_disable : 1; // [14]
        uint32_t qf_mem_sel : 1;        // [15]
        uint32_t offline0_step : 9;     // [24:16]
        uint32_t __31_25 : 7;           // [31:25]
    } b;
} REG_MEASPWR_MEASPWR_ID4_PARA2_T;

// measpwr_id5_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t frame_map : 10;        // [9:0]
        uint32_t __11_10 : 2;           // [11:10]
        uint32_t pow_data_sel : 2;      // [13:12]
        uint32_t irt_scale_disable : 1; // [14]
        uint32_t qf_mem_sel : 1;        // [15]
        uint32_t offline0_step : 9;     // [24:16]
        uint32_t __31_25 : 7;           // [31:25]
    } b;
} REG_MEASPWR_MEASPWR_ID5_PARA2_T;

// measpwr_id6_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t frame_map : 10;        // [9:0]
        uint32_t __11_10 : 2;           // [11:10]
        uint32_t pow_data_sel : 2;      // [13:12]
        uint32_t irt_scale_disable : 1; // [14]
        uint32_t qf_mem_sel : 1;        // [15]
        uint32_t offline0_step : 9;     // [24:16]
        uint32_t __31_25 : 7;           // [31:25]
    } b;
} REG_MEASPWR_MEASPWR_ID6_PARA2_T;

// measpwr_id7_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t frame_map : 10;        // [9:0]
        uint32_t __11_10 : 2;           // [11:10]
        uint32_t pow_data_sel : 2;      // [13:12]
        uint32_t irt_scale_disable : 1; // [14]
        uint32_t qf_mem_sel : 1;        // [15]
        uint32_t offline0_step : 9;     // [24:16]
        uint32_t __31_25 : 7;           // [31:25]
    } b;
} REG_MEASPWR_MEASPWR_ID7_PARA2_T;

// measpwr_id8_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t frame_map : 10;        // [9:0]
        uint32_t __11_10 : 2;           // [11:10]
        uint32_t pow_data_sel : 2;      // [13:12]
        uint32_t irt_scale_disable : 1; // [14]
        uint32_t qf_mem_sel : 1;        // [15]
        uint32_t offline0_step : 9;     // [24:16]
        uint32_t __31_25 : 7;           // [31:25]
    } b;
} REG_MEASPWR_MEASPWR_ID8_PARA2_T;

// measpwr_afc1_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC1_HST_T;

// measpwr_afc2_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC2_HST_T;

// measpwr_afc3_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC3_HST_T;

// measpwr_afc4_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC4_HST_T;

// measpwr_afc5_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC5_HST_T;

// measpwr_afc6_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC6_HST_T;

// measpwr_afc7_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC7_HST_T;

// measpwr_afc8_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC8_HST_T;

// measpwr_doppler3_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t doppler3_out : 11;  // [10:0], read only
        uint32_t __15_11 : 5;        // [15:11]
        uint32_t hls_agc_base3 : 10; // [25:16], read only
        uint32_t __31_26 : 6;        // [31:26]
    } b;
} REG_MEASPWR_MEASPWR_DOPPLER3_OUT_T;

// measpwr_doppler4_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t doppler4_out : 11;  // [10:0], read only
        uint32_t __15_11 : 5;        // [15:11]
        uint32_t hls_agc_base4 : 10; // [25:16], read only
        uint32_t __31_26 : 6;        // [31:26]
    } b;
} REG_MEASPWR_MEASPWR_DOPPLER4_OUT_T;

// measpwr_doppler5_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t doppler5_out : 11;  // [10:0], read only
        uint32_t __15_11 : 5;        // [15:11]
        uint32_t hls_agc_base5 : 10; // [25:16], read only
        uint32_t __31_26 : 6;        // [31:26]
    } b;
} REG_MEASPWR_MEASPWR_DOPPLER5_OUT_T;

// measpwr_doppler6_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t doppler6_out : 11;  // [10:0], read only
        uint32_t __15_11 : 5;        // [15:11]
        uint32_t hls_agc_base6 : 10; // [25:16], read only
        uint32_t __31_26 : 6;        // [31:26]
    } b;
} REG_MEASPWR_MEASPWR_DOPPLER6_OUT_T;

// measpwr_doppler7_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t doppler7_out : 11;  // [10:0], read only
        uint32_t __15_11 : 5;        // [15:11]
        uint32_t hls_agc_base7 : 10; // [25:16], read only
        uint32_t __31_26 : 6;        // [31:26]
    } b;
} REG_MEASPWR_MEASPWR_DOPPLER7_OUT_T;

// measpwr_doppler8_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t doppler8_out : 11;  // [10:0], read only
        uint32_t __15_11 : 5;        // [15:11]
        uint32_t hls_agc_base8 : 10; // [25:16], read only
        uint32_t __31_26 : 6;        // [31:26]
    } b;
} REG_MEASPWR_MEASPWR_DOPPLER8_OUT_T;

// measpwr_pow1_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t pow_max_addr : 7; // [6:0], read only
        uint32_t pow_max : 25;     // [31:7], read only
    } b;
} REG_MEASPWR_MEASPWR_POW1_MAX_T;

// measpwr_pow2_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t pow_max_addr : 7; // [6:0], read only
        uint32_t pow_max : 25;     // [31:7], read only
    } b;
} REG_MEASPWR_MEASPWR_POW2_MAX_T;

// measpwr_pow3_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t pow_max_addr : 7; // [6:0], read only
        uint32_t pow_max : 25;     // [31:7], read only
    } b;
} REG_MEASPWR_MEASPWR_POW3_MAX_T;

// measpwr_pow4_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t pow_max_addr : 7; // [6:0], read only
        uint32_t pow_max : 25;     // [31:7], read only
    } b;
} REG_MEASPWR_MEASPWR_POW4_MAX_T;

// measpwr_pow5_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t pow_max_addr : 7; // [6:0], read only
        uint32_t pow_max : 25;     // [31:7], read only
    } b;
} REG_MEASPWR_MEASPWR_POW5_MAX_T;

// measpwr_pow6_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t pow_max_addr : 7; // [6:0], read only
        uint32_t pow_max : 25;     // [31:7], read only
    } b;
} REG_MEASPWR_MEASPWR_POW6_MAX_T;

// measpwr_pow7_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t pow_max_addr : 7; // [6:0], read only
        uint32_t pow_max : 25;     // [31:7], read only
    } b;
} REG_MEASPWR_MEASPWR_POW7_MAX_T;

// measpwr_pow8_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t pow_max_addr : 7; // [6:0], read only
        uint32_t pow_max : 25;     // [31:7], read only
    } b;
} REG_MEASPWR_MEASPWR_POW8_MAX_T;

// measpwr_trms3_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t trms_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;    // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_TRMS3_OUT_T;

// measpwr_trms4_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t trms_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;    // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_TRMS4_OUT_T;

// measpwr_trms5_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t trms_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;    // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_TRMS5_OUT_T;

// measpwr_trms6_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t trms_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;    // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_TRMS6_OUT_T;

// measpwr_trms7_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t trms_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;    // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_TRMS7_OUT_T;

// measpwr_trms8_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t trms_delay : 16; // [15:0], read only
        uint32_t __31_16 : 16;    // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_TRMS8_OUT_T;

// measpwr_reis_conf
typedef union {
    uint32_t v;
    struct
    {
        uint32_t reis_num : 4;   // [3:0]
        uint32_t reis_en : 1;    // [4]
        uint32_t reis_dc_en : 1; // [5]
        uint32_t __31_6 : 26;    // [31:6]
    } b;
} REG_MEASPWR_MEASPWR_REIS_CONF_T;

// measpwr_reis_pos0
typedef union {
    uint32_t v;
    struct
    {
        uint32_t reis_re0 : 11; // [10:0]
        uint32_t __15_11 : 5;   // [15:11]
        uint32_t reis_re1 : 11; // [26:16]
        uint32_t __31_27 : 5;   // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_REIS_POS0_T;

// measpwr_reis_pos1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t reis_re2 : 11; // [10:0]
        uint32_t __15_11 : 5;   // [15:11]
        uint32_t reis_re3 : 11; // [26:16]
        uint32_t __31_27 : 5;   // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_REIS_POS1_T;

// measpwr_reis_pos2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t reis_re4 : 11; // [10:0]
        uint32_t __15_11 : 5;   // [15:11]
        uint32_t reis_re5 : 11; // [26:16]
        uint32_t __31_27 : 5;   // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_REIS_POS2_T;

// measpwr_reis_pos3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t reis_re6 : 11; // [10:0]
        uint32_t __15_11 : 5;   // [15:11]
        uint32_t reis_re7 : 11; // [26:16]
        uint32_t __31_27 : 5;   // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_REIS_POS3_T;

// measpwr_offline0_sel
typedef union {
    uint32_t v;
    struct
    {
        uint32_t decision_flag : 2; // [1:0]
        uint32_t __3_2 : 2;         // [3:2]
        uint32_t jump_flag : 2;     // [5:4]
        uint32_t __7_6 : 2;         // [7:6]
        uint32_t pos_delay_sel : 1; // [8]
        uint32_t __31_9 : 23;       // [31:9]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_SEL_T;

// measpwr_offline0_pos
typedef union {
    uint32_t v;
    struct
    {
        uint32_t id1_max_position : 4; // [3:0], read only
        uint32_t id2_max_position : 4; // [7:4], read only
        uint32_t id3_max_position : 4; // [11:8], read only
        uint32_t id4_max_position : 4; // [15:12], read only
        uint32_t id5_max_position : 4; // [19:16], read only
        uint32_t id6_max_position : 4; // [23:20], read only
        uint32_t id7_max_position : 4; // [27:24], read only
        uint32_t id8_max_position : 4; // [31:28], read only
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_POS_T;

// measpwr_offline0_id
typedef union {
    uint32_t v;
    struct
    {
        uint32_t offline_jump_id : 4;          // [3:0], read only
        uint32_t tbin_position_valid_flag : 8; // [11:4], read only
        uint32_t __31_12 : 20;                 // [31:12]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_ID_T;

// measpwr_offline1_para
typedef union {
    uint32_t v;
    struct
    {
        uint32_t offline1_time : 5;    // [4:0]
        uint32_t offline1_num : 1;     // [5]
        uint32_t __7_6 : 2;            // [7:6]
        uint32_t offline1_mod_sel : 2; // [9:8]
        uint32_t __11_10 : 2;          // [11:10]
        uint32_t first_ofdm : 1;       // [12]
        uint32_t __31_13 : 19;         // [31:13]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE1_PARA_T;

// measpwr_offline1_agc1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t offline1_agc1 : 10; // [9:0]
        uint32_t offline1_agc2 : 10; // [19:10]
        uint32_t offline1_agc3 : 10; // [29:20]
        uint32_t __31_30 : 2;        // [31:30]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE1_AGC1_T;

// measpwr_offline1_agc2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t offline1_agc4 : 10; // [9:0]
        uint32_t offline1_agc5 : 10; // [19:10]
        uint32_t offline1_agc6 : 10; // [29:20]
        uint32_t __31_30 : 2;        // [31:30]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE1_AGC2_T;

// measpwr_offline1_agc3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t offline1_agc7 : 10; // [9:0]
        uint32_t offline1_agc8 : 10; // [19:10]
        uint32_t offline1_agc9 : 10; // [29:20]
        uint32_t __31_30 : 2;        // [31:30]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE1_AGC3_T;

// measpwr_offline1_agc4
typedef union {
    uint32_t v;
    struct
    {
        uint32_t offline1_agc10 : 10; // [9:0]
        uint32_t offline1_agc11 : 10; // [19:10]
        uint32_t offline1_agc12 : 10; // [29:20]
        uint32_t __31_30 : 2;         // [31:30]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE1_AGC4_T;

// measpwr_offline1_agc5
typedef union {
    uint32_t v;
    struct
    {
        uint32_t offline1_agc13 : 10; // [9:0]
        uint32_t offline1_agc14 : 10; // [19:10]
        uint32_t offline1_agc15 : 10; // [29:20]
        uint32_t __31_30 : 2;         // [31:30]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE1_AGC5_T;

// measpwr_offline1_agc6
typedef union {
    uint32_t v;
    struct
    {
        uint32_t offline1_agc16 : 10; // [9:0]
        uint32_t offline1_agc17 : 10; // [19:10]
        uint32_t offline1_agc18 : 10; // [29:20]
        uint32_t __31_30 : 2;         // [31:30]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE1_AGC6_T;

// measpwr_crs_rssi1_agc1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI1_AGC1_T;

// measpwr_crs_rssi1_agc2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI1_AGC2_T;

// measpwr_crs_rssi1_agc3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI1_AGC3_T;

// measpwr_crs_rssi2_agc1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI2_AGC1_T;

// measpwr_crs_rssi2_agc2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI2_AGC2_T;

// measpwr_crs_rssi2_agc3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI2_AGC3_T;

// measpwr_crs_rssi3_agc
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI3_AGC_T;

// measpwr_crs_rssi4_agc
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI4_AGC_T;

// measpwr_crs_rssi5_agc
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI5_AGC_T;

// measpwr_crs_rssi6_agc
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI6_AGC_T;

// measpwr_crs_rssi7_agc
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI7_AGC_T;

// measpwr_crs_rssi8_agc
typedef union {
    uint32_t v;
    struct
    {
        uint32_t crs_rssi_agc : 10; // [9:0], read only
        uint32_t __31_10 : 22;      // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_CRS_RSSI8_AGC_T;

// measpwr_hmmse_win
typedef union {
    uint32_t v;
    struct
    {
        uint32_t fh_wl_ind : 1; // [0]
        uint32_t __31_1 : 31;   // [31:1]
    } b;
} REG_MEASPWR_MEASPWR_HMMSE_WIN_T;

// measpwr_hmmse_bitsel
typedef union {
    uint32_t v;
    struct
    {
        uint32_t fh_bitsel : 4; // [3:0]
        uint32_t __31_4 : 28;   // [31:4]
    } b;
} REG_MEASPWR_MEASPWR_HMMSE_BITSEL_T;

// measpwr_hmmse_flag
typedef union {
    uint32_t v;
    struct
    {
        uint32_t qf_mem_mark : 2; // [1:0], read only
        uint32_t __3_2 : 2;       // [3:2]
        uint32_t used_wl_ind : 1; // [4], read only
        uint32_t __31_5 : 27;     // [31:5]
    } b;
} REG_MEASPWR_MEASPWR_HMMSE_FLAG_T;

// measpwr_id_info2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t id38_info : 10; // [9:0], read only
        uint32_t __31_10 : 22;   // [31:10]
    } b;
} REG_MEASPWR_MEASPWR_ID_INFO2_T;

// measpwr_inmem_mode
typedef union {
    uint32_t v;
    struct
    {
        uint32_t inmem_mode : 2; // [1:0]
        uint32_t __31_2 : 30;    // [31:2]
    } b;
} REG_MEASPWR_MEASPWR_INMEM_MODE_T;

// measpwr_afc1_rsrp_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp1_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC1_RSRP_HST_T;

// measpwr_afc2_rsrp_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp2_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC2_RSRP_HST_T;

// measpwr_afc3_rsrp_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp3_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC3_RSRP_HST_T;

// measpwr_afc4_rsrp_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp4_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC4_RSRP_HST_T;

// measpwr_afc5_rsrp_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp5_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC5_RSRP_HST_T;

// measpwr_afc6_rsrp_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp6_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC6_RSRP_HST_T;

// measpwr_afc7_rsrp_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp7_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC7_RSRP_HST_T;

// measpwr_afc8_rsrp_hst
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp8_hst : 16; // [15:0], read only
        uint32_t __31_16 : 16;       // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC8_RSRP_HST_T;

// measpwr_afc6_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_out6 : 16; // [15:0], read only
        uint32_t __31_16 : 16;  // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC6_OUT_T;

// measpwr_afc7_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_out7 : 16; // [15:0], read only
        uint32_t __31_16 : 16;  // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC7_OUT_T;

// measpwr_afc8_out
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_out8 : 16; // [15:0], read only
        uint32_t __31_16 : 16;  // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC8_OUT_T;

// measpwr_afc6_rsrp
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp6 : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC6_RSRP_T;

// measpwr_afc7_rsrp
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp7 : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC7_RSRP_T;

// measpwr_afc8_rsrp
typedef union {
    uint32_t v;
    struct
    {
        uint32_t afc_rsrp8 : 16; // [15:0], read only
        uint32_t __31_16 : 16;   // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_AFC8_RSRP_T;

// measpwr_offline1_agc7
typedef union {
    uint32_t v;
    struct
    {
        uint32_t offline1_agc19 : 10; // [9:0]
        uint32_t offline1_agc20 : 10; // [19:10]
        uint32_t __31_20 : 12;        // [31:20]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE1_AGC7_T;

// measpwr_int_join
typedef union {
    uint32_t v;
    struct
    {
        uint32_t interrupt_join_flag : 8; // [7:0]
        uint32_t __31_8 : 24;             // [31:8]
    } b;
} REG_MEASPWR_MEASPWR_INT_JOIN_T;

// measpwr_int_mark
typedef union {
    uint32_t v;
    struct
    {
        uint32_t id1_interrupt_mark : 4; // [3:0], read only
        uint32_t id2_interrupt_mark : 4; // [7:4], read only
        uint32_t id3_interrupt_mark : 4; // [11:8], read only
        uint32_t id4_interrupt_mark : 4; // [15:12], read only
        uint32_t id5_interrupt_mark : 4; // [19:16], read only
        uint32_t id6_interrupt_mark : 4; // [23:20], read only
        uint32_t id7_interrupt_mark : 4; // [27:24], read only
        uint32_t id8_interrupt_mark : 4; // [31:28], read only
    } b;
} REG_MEASPWR_MEASPWR_INT_MARK_T;

// measpwr_int_flag
typedef union {
    uint32_t v;
    struct
    {
        uint32_t interrupt_flag : 8; // [7:0], read only
        uint32_t __31_8 : 24;        // [31:8]
    } b;
} REG_MEASPWR_MEASPWR_INT_FLAG_T;

// measpwr_offline0_decpos1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t decision_position1 : 9; // [8:0]
        uint32_t decision_position2 : 9; // [17:9]
        uint32_t decision_position3 : 9; // [26:18]
        uint32_t __31_27 : 5;            // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS1_T;

// measpwr_offline0_decpos2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t decision_position1 : 9; // [8:0]
        uint32_t decision_position2 : 9; // [17:9]
        uint32_t decision_position3 : 9; // [26:18]
        uint32_t __31_27 : 5;            // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS2_T;

// measpwr_offline0_decpos3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t decision_position1 : 9; // [8:0]
        uint32_t decision_position2 : 9; // [17:9]
        uint32_t decision_position3 : 9; // [26:18]
        uint32_t __31_27 : 5;            // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS3_T;

// measpwr_offline0_decpos4
typedef union {
    uint32_t v;
    struct
    {
        uint32_t decision_position1 : 9; // [8:0]
        uint32_t decision_position2 : 9; // [17:9]
        uint32_t decision_position3 : 9; // [26:18]
        uint32_t __31_27 : 5;            // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS4_T;

// measpwr_offline0_decpos5
typedef union {
    uint32_t v;
    struct
    {
        uint32_t decision_position1 : 9; // [8:0]
        uint32_t decision_position2 : 9; // [17:9]
        uint32_t decision_position3 : 9; // [26:18]
        uint32_t __31_27 : 5;            // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS5_T;

// measpwr_offline0_decpos6
typedef union {
    uint32_t v;
    struct
    {
        uint32_t decision_position1 : 9; // [8:0]
        uint32_t decision_position2 : 9; // [17:9]
        uint32_t decision_position3 : 9; // [26:18]
        uint32_t __31_27 : 5;            // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS6_T;

// measpwr_offline0_decpos7
typedef union {
    uint32_t v;
    struct
    {
        uint32_t decision_position1 : 9; // [8:0]
        uint32_t decision_position2 : 9; // [17:9]
        uint32_t decision_position3 : 9; // [26:18]
        uint32_t __31_27 : 5;            // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS7_T;

// measpwr_offline0_decpos8
typedef union {
    uint32_t v;
    struct
    {
        uint32_t decision_position1 : 9; // [8:0]
        uint32_t decision_position2 : 9; // [17:9]
        uint32_t decision_position3 : 9; // [26:18]
        uint32_t __31_27 : 5;            // [31:27]
    } b;
} REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS8_T;

// measpwr_rbis_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_factor : 16; // [15:0]
        uint32_t rbis_dipos : 7;   // [22:16]
        uint32_t rbis_num : 3;     // [25:23]
        uint32_t rbis_posen : 1;   // [26]
        uint32_t rbis_en : 1;      // [27]
        uint32_t rbis_judge : 1;   // [28]
        uint32_t rbis_correct : 1; // [29]
        uint32_t __31_30 : 2;      // [31:30]
    } b;
} REG_MEASPWR_MEASPWR_RBIS_PARA2_T;

// measpwr_rbis2_out1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_out0 : 7; // [6:0], read only
        uint32_t __7_7 : 1;     // [7]
        uint32_t rbis_out1 : 7; // [14:8], read only
        uint32_t __15_15 : 1;   // [15]
        uint32_t rbis_out2 : 7; // [22:16], read only
        uint32_t __23_23 : 1;   // [23]
        uint32_t rbis_out3 : 7; // [30:24], read only
        uint32_t __31_31 : 1;   // [31]
    } b;
} REG_MEASPWR_MEASPWR_RBIS2_OUT1_T;

// measpwr_rbis2_out2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_out4 : 7; // [6:0], read only
        uint32_t __7_7 : 1;     // [7]
        uint32_t rbis_num : 3;  // [10:8], read only
        uint32_t __31_11 : 21;  // [31:11]
    } b;
} REG_MEASPWR_MEASPWR_RBIS2_OUT2_T;

// measpwr_rbis2_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_max : 25; // [24:0], read only
        uint32_t __31_25 : 7;   // [31:25]
    } b;
} REG_MEASPWR_MEASPWR_RBIS2_MAX_T;

// measpwr_rbis3_out1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_out0 : 7; // [6:0], read only
        uint32_t __7_7 : 1;     // [7]
        uint32_t rbis_out1 : 7; // [14:8], read only
        uint32_t __15_15 : 1;   // [15]
        uint32_t rbis_out2 : 7; // [22:16], read only
        uint32_t __23_23 : 1;   // [23]
        uint32_t rbis_out3 : 7; // [30:24], read only
        uint32_t __31_31 : 1;   // [31]
    } b;
} REG_MEASPWR_MEASPWR_RBIS3_OUT1_T;

// measpwr_rbis3_out2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_out4 : 7; // [6:0], read only
        uint32_t __7_7 : 1;     // [7]
        uint32_t rbis_num : 3;  // [10:8], read only
        uint32_t __31_11 : 21;  // [31:11]
    } b;
} REG_MEASPWR_MEASPWR_RBIS3_OUT2_T;

// measpwr_rbis3_max
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_max : 25; // [24:0], read only
        uint32_t __31_25 : 7;   // [31:25]
    } b;
} REG_MEASPWR_MEASPWR_RBIS3_MAX_T;

// measpwr_sigpwr_para2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t sigpwr_renum : 8; // [7:0]
        uint32_t __31_8 : 24;      // [31:8]
    } b;
} REG_MEASPWR_MEASPWR_SIGPWR_PARA2_T;

// measpwr_irt_para3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t n_th : 16; // [15:0]
        uint32_t s_th : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_IRT_PARA3_T;

// measpwr_trms_para3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t n_th : 16; // [15:0]
        uint32_t s_th : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_TRMS_PARA3_T;

// measpwr_rsrp_para5
typedef union {
    uint32_t v;
    struct
    {
        uint32_t s_th : 16; // [15:0]
        uint32_t beta : 16; // [31:16]
    } b;
} REG_MEASPWR_MEASPWR_RSRP_PARA5_T;

// measpwr_rbis_in1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_in0 : 7;  // [6:0]
        uint32_t __7_7 : 1;     // [7]
        uint32_t rbis_in1 : 7;  // [14:8]
        uint32_t reserced3 : 1; // [15], read only
        uint32_t rbis_in2 : 7;  // [22:16]
        uint32_t __23_23 : 1;   // [23]
        uint32_t rbis_in3 : 7;  // [30:24]
        uint32_t __31_31 : 1;   // [31]
    } b;
} REG_MEASPWR_MEASPWR_RBIS_IN1_T;

// measpwr_rbis_in2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_in4 : 7;    // [6:0]
        uint32_t __7_7 : 1;       // [7]
        uint32_t rbis_in_num : 3; // [10:8]
        uint32_t __31_11 : 21;    // [31:11]
    } b;
} REG_MEASPWR_MEASPWR_RBIS_IN2_T;

// measpwr_rbis2_in1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_in0 : 7;  // [6:0]
        uint32_t __7_7 : 1;     // [7]
        uint32_t rbis_in1 : 7;  // [14:8]
        uint32_t reserced3 : 1; // [15], read only
        uint32_t rbis_in2 : 7;  // [22:16]
        uint32_t __23_23 : 1;   // [23]
        uint32_t rbis_in3 : 7;  // [30:24]
        uint32_t __31_31 : 1;   // [31]
    } b;
} REG_MEASPWR_MEASPWR_RBIS2_IN1_T;

// measpwr_rbis2_in2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_in4 : 7;    // [6:0]
        uint32_t __7_7 : 1;       // [7]
        uint32_t rbis_in_num : 3; // [10:8]
        uint32_t __31_11 : 21;    // [31:11]
    } b;
} REG_MEASPWR_MEASPWR_RBIS2_IN2_T;

// measpwr_rbis3_in1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_in0 : 7;  // [6:0]
        uint32_t __7_7 : 1;     // [7]
        uint32_t rbis_in1 : 7;  // [14:8]
        uint32_t reserced3 : 1; // [15], read only
        uint32_t rbis_in2 : 7;  // [22:16]
        uint32_t __23_23 : 1;   // [23]
        uint32_t rbis_in3 : 7;  // [30:24]
        uint32_t __31_31 : 1;   // [31]
    } b;
} REG_MEASPWR_MEASPWR_RBIS3_IN1_T;

// measpwr_rbis3_in2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t rbis_in4 : 7;    // [6:0]
        uint32_t __7_7 : 1;       // [7]
        uint32_t rbis_in_num : 3; // [10:8]
        uint32_t __31_11 : 21;    // [31:11]
    } b;
} REG_MEASPWR_MEASPWR_RBIS3_IN2_T;

// mem_in_1
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mem_in_1 : 24; // [23:0]
        uint32_t __31_24 : 8;   // [31:24]
    } b;
} REG_MEASPWR_MEM_IN_1_T;

// mem_in_2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mem_in_2 : 24; // [23:0]
        uint32_t __31_24 : 8;   // [31:24]
    } b;
} REG_MEASPWR_MEM_IN_2_T;

// mem_in_3
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mem_in_3 : 24; // [23:0]
        uint32_t __31_24 : 8;   // [31:24]
    } b;
} REG_MEASPWR_MEM_IN_3_T;

// mem_in_4
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mem_in_4 : 24; // [23:0]
        uint32_t __31_24 : 8;   // [31:24]
    } b;
} REG_MEASPWR_MEM_IN_4_T;

// mem_in_5
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mem_in_5 : 24; // [23:0]
        uint32_t __31_24 : 8;   // [31:24]
    } b;
} REG_MEASPWR_MEM_IN_5_T;

// mem_in_6
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mem_in_6 : 24; // [23:0]
        uint32_t __31_24 : 8;   // [31:24]
    } b;
} REG_MEASPWR_MEM_IN_6_T;

// mem_in_7
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mem_in_7 : 24; // [23:0]
        uint32_t __31_24 : 8;   // [31:24]
    } b;
} REG_MEASPWR_MEM_IN_7_T;

// mem_in_8
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mem_in_8 : 24; // [23:0]
        uint32_t __31_24 : 8;   // [31:24]
    } b;
} REG_MEASPWR_MEM_IN_8_T;

// measpwr_rxdata_ctrl1
#define MEASPWR_RX_OFFSET1(n) (((n)&0x7ffff) << 0)
#define MEASPWR_FDD_TDD (1 << 31)

// measpwr_rxdata_ctrl2
#define MEASPWR_RX_LEN(n) (((n)&0xffff) << 0)

// measpwr_rxdata_val_ctrl
#define MEASPWR_RX_OFFSET2(n) (((n)&0x3ffff) << 0)
#define MEASPWR_MEASPWR_RXDATA_VAL_CTRL_INVALID_FLAG (1 << 20)

// measpwr_rxdata_offset3_id1
#define MEASPWR_RX_OFFSET3_ID1(n) (((n)&0xfffff) << 0)

// measpwr_rxdata_offset3_id2
#define MEASPWR_RX_OFFSET3_ID2(n) (((n)&0xfffff) << 0)

// measpwr_rxdata_offset3_id3
#define MEASPWR_RX_OFFSET3_ID3(n) (((n)&0xfffff) << 0)

// measpwr_rxdata_offset3_id4
#define MEASPWR_RX_OFFSET3_ID4(n) (((n)&0xfffff) << 0)

// measpwr_rxdata_offset3_id5
#define MEASPWR_RX_OFFSET3_ID5(n) (((n)&0xfffff) << 0)

// measpwr_rxdata_offset3_id6
#define MEASPWR_RX_OFFSET3_ID6(n) (((n)&0xfffff) << 0)

// measpwr_rxdata_offset3_id7
#define MEASPWR_RX_OFFSET3_ID7(n) (((n)&0xfffff) << 0)

// measpwr_rxdata_offset3_id8
#define MEASPWR_RX_OFFSET3_ID8(n) (((n)&0xfffff) << 0)

// measpwr_nb_offset4
#define MEASPWR_NB_OFFET4(n) (((n)&0x7fff) << 0)

// measpwr_total_subf
#define MEASPWR_TOTAL_SUBF_NUM_ID1_2(n) (((n)&0x1ff) << 0)
#define MEASPWR_TOTAL_SUBF_NUM_ID3_8(n) (((n)&0x1ff) << 12)

// measpwr_ifft_para
#define MEASPWR_IFFT_CUT1(n) (((n)&0x3) << 0)
#define MEASPWR_IFFT_CUT2(n) (((n)&0x3) << 2)
#define MEASPWR_IFFT_CUT3(n) (((n)&0x3) << 4)
#define MEASPWR_IFFT_CUT4(n) (((n)&0x3) << 6)
#define MEASPWR_IFFT_CUT5(n) (((n)&0x3) << 8)
#define MEASPWR_IFFT_CUT6(n) (((n)&0x3) << 10)
#define MEASPWR_IFFT_CUT7(n) (((n)&0x3) << 12)

// measpwr_ifft_gate
#define MEASPWR_IFFT_GATE(n) (((n)&0x7f) << 0)

// measpwr_int_en
#define MEASPWR_ID1_INTERRUPT_ENABLE(n) (((n)&0xf) << 0)
#define MEASPWR_ID2_INTERRUPT_ENABLE(n) (((n)&0xf) << 4)
#define MEASPWR_ID3_INTERRUPT_ENABLE(n) (((n)&0xf) << 8)
#define MEASPWR_ID4_INTERRUPT_ENABLE(n) (((n)&0xf) << 12)
#define MEASPWR_ID5_INTERRUPT_ENABLE(n) (((n)&0xf) << 16)
#define MEASPWR_ID6_INTERRUPT_ENABLE(n) (((n)&0xf) << 20)
#define MEASPWR_ID7_INTERRUPT_ENABLE(n) (((n)&0xf) << 24)
#define MEASPWR_ID8_INTERRUPT_ENABLE(n) (((n)&0xf) << 28)

// measpwr_int_sta
#define MEASPWR_ID1_INTERRUPT_STATE(n) (((n)&0xf) << 0)
#define MEASPWR_ID2_INTERRUPT_STATE(n) (((n)&0xf) << 4)
#define MEASPWR_ID3_INTERRUPT_STATE(n) (((n)&0xf) << 8)
#define MEASPWR_ID4_INTERRUPT_STATE(n) (((n)&0xf) << 12)
#define MEASPWR_ID5_INTERRUPT_STATE(n) (((n)&0xf) << 16)
#define MEASPWR_ID6_INTERRUPT_STATE(n) (((n)&0xf) << 20)
#define MEASPWR_ID7_INTERRUPT_STATE(n) (((n)&0xf) << 24)
#define MEASPWR_ID8_INTERRUPT_STATE(n) (((n)&0xf) << 28)

// measpwr_id1_id2_func_ctrl
#define MEASPWR_ID1_ID2_IRT_EN (1 << 0)
#define MEASPWR_ID1_ID2_RSRP_EN (1 << 1)
#define MEASPWR_ID1_ID2_TRMS_EN (1 << 2)
#define MEASPWR_ID1_ID2_AFC_HST_EN (1 << 3)
#define MEASPWR_ID1_ID2_AFC_COM_EN (1 << 4)
#define MEASPWR_ID1_ID2_SINR_EN (1 << 5)
#define MEASPWR_ID1_ID2_DOPPLER_EN (1 << 6)
#define MEASPWR_ID1_ID2_SIGMA_EN (1 << 7)
#define MEASPWR_ID1_ID2_TRMSF_EN (1 << 8)

// measpwr_id3_id8_func_ctrl
#define MEASPWR_ID3_ID8_IRT_EN (1 << 0)
#define MEASPWR_ID3_ID8_RSRP_EN (1 << 1)
#define MEASPWR_ID3_ID8_TRMS_EN (1 << 2)
#define MEASPWR_ID3_ID8_AFC_HST_EN (1 << 3)
#define MEASPWR_ID3_ID8_AFC_COM_EN (1 << 4)
#define MEASPWR_ID3_ID8_SINR_EN (1 << 5)
#define MEASPWR_ID3_ID8_DOPPLER_EN (1 << 6)
#define MEASPWR_ID3_ID8_SIGMA_EN (1 << 7)
#define MEASPWR_ID3_ID8_TRMSF_EN (1 << 8)

// measpwr_agc_compare
#define MEASPWR_AGC_COMPARE(n) (((n)&0x3ff) << 0)

// measpwr_nb_para
#define MEASPWR_ID1_NB_IND(n) (((n)&0xf) << 0)
#define MEASPWR_ID2_NB_IND(n) (((n)&0xf) << 4)
#define MEASPWR_ID38_NB_IND(n) (((n)&0xf) << 8)

// measpwr_band_para
#define MEASPWR_SYS_BW_ID12(n) (((n)&0x7) << 0)
#define MEASPWR_MEAS_BW_ID12(n) (((n)&0x7) << 4)
#define MEASPWR_SYS_BW_ID38(n) (((n)&0x7) << 8)
#define MEASPWR_MEAS_BW_ID38(n) (((n)&0x7) << 12)

// measpwr_afc_para
#define MEASPWR_AFC_RENUM(n) (((n)&0x7) << 0)
#define MEASPWR_AFC_RELATED_FLAG (1 << 4)
#define MEASPWR_AFC_FACTOR(n) (((n)&0xffff) << 8)

// measpwr_afc_soft_reect1
#define MEASPWR_AFC_SOFT_FA_CTOR1(n) (((n)&0xffff) << 0)

// measpwr_sigpwr_para
#define MEASPWR_SIGPWR_RENUM(n) (((n)&0xff) << 0)
#define MEASPWR_SIGPWR_OFDMNUM(n) (((n)&0x3) << 8)
#define MEASPWR_SIGPWR_ALPHA(n) (((n)&0x1ffff) << 12)

// measpwr_sigma_para
#define MEASPWR_SIGMA_WIN(n) (((n)&0x7f) << 0)
#define MEASPWR_SIGMA_ALPHA(n) (((n)&0x1ffff) << 8)

// measpwr_doppler_para
#define MEASPWR_DOPPLER_WIN(n) (((n)&0x7f) << 0)
#define MEASPWR_DOPPLER_SCALE(n) (((n)&0xf) << 8)
#define MEASPWR_DOPPLER_ALPHA1(n) (((n)&0x1ffff) << 13)

// measpwr_trms_para1
#define MEASPWR_MEASPWR_TRMS_PARA1_DIS_LIMIT(n) (((n)&0xff) << 0)
#define MEASPWR_MEASPWR_TRMS_PARA1_D_FLAG (1 << 8)
#define MEASPWR_MEASPWR_TRMS_PARA1_D_FLAG2 (1 << 9)
#define MEASPWR_NOISE_SEL (1 << 12)
#define MEASPWR_T_TH(n) (((n)&0xff) << 16)

// measpwr_trms_para2
#define MEASPWR_N_TH(n) (((n)&0xffff) << 0)
#define MEASPWR_MEASPWR_TRMS_PARA2_S_TH(n) (((n)&0xffff) << 16)

// measpwr_rsrp_para1
#define MEASPWR_MEASPWR_RSRP_PARA1_DIS_LIMIT(n) (((n)&0xff) << 0)
#define MEASPWR_MEASPWR_RSRP_PARA1_BETA(n) (((n)&0xffff) << 8)
#define MEASPWR_MEASPWR_RSRP_PARA1_D_FLAG (1 << 24)
#define MEASPWR_MEASPWR_RSRP_PARA1_D_FLAG2 (1 << 25)

// measpwr_rsrp_para2
#define MEASPWR_RSRP_AGCADJUST(n) (((n)&0xff) << 0)
#define MEASPWR_MODE1_COMPENSATE(n) (((n)&0x1ff) << 8)
#define MEASPWR_MODE1_COMPENSATE2(n) (((n)&0x1ff) << 17)

// measpwr_rsrp_para3
#define MEASPWR_RSSI_Q(n) (((n)&0x7f) << 0)
#define MEASPWR_MEASPWR_RSRP_PARA3_S_TH(n) (((n)&0xffff) << 8)

// measpwr_rsrp_para4
#define MEASPWR_POW_PA(n) (((n)&0xff) << 0)
#define MEASPWR_POWQ_VALUE(n) (((n)&0xff) << 8)

// measpwr_irt_para1
#define MEASPWR_IRT_OFDM_NUM(n) (((n)&0x3) << 0)
#define MEASPWR_MEASPWR_IRT_PARA1_DIS_LIMIT(n) (((n)&0xff) << 4)
#define MEASPWR_N_SCALE(n) (((n)&0xf) << 12)
#define MEASPWR_POW_MAX_NUM(n) (((n)&0xf) << 16)
#define MEASPWR_VAL_SEL (1 << 20)

// measpwr_irt_para2
#define MEASPWR_N_TH(n) (((n)&0xffff) << 0)
#define MEASPWR_MEASPWR_IRT_PARA2_S_TH(n) (((n)&0xffff) << 16)

// measpwr_rssi_para
#define MEASPWR_RSSI_SEL (1 << 0)
#define MEASPWR_RSSI_COMPENSATE(n) (((n)&0xff) << 4)
#define MEASPWR_RSSI_COMPENSATE2(n) (((n)&0xff) << 12)

// measpwr_agc
#define MEASPWR_AGC_RX(n) (((n)&0x3ff) << 0)

// measpwr_id1_para1
#define MEASPWR_MEASPWR_ID1_PARA1_CP_INDEX (1 << 0)
#define MEASPWR_MEASPWR_ID1_PARA1_TX_NUM (1 << 1)
#define MEASPWR_AFC_OUT_SEL (1 << 2)
#define MEASPWR_MEASPWR_ID1_PARA1_TX_FLAG (1 << 3)
#define MEASPWR_MEASPWR_ID1_PARA1_NID(n) (((n)&0x1ff) << 4)
#define MEASPWR_MEASPWR_ID1_PARA1_FIRSTD_OFDM_FLAG (1 << 13)
#define MEASPWR_CRS_RSSI_SEL(n) (((n)&0x3) << 14)
#define MEASPWR_AFC_OUT_NUM(n) (((n)&0xff) << 16)
#define MEASPWR_MEASPWR_ID1_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 24)
#define MEASPWR_MEASPWR_ID1_PARA1_LNUM_MOD(n) (((n)&0xf) << 28)

// measpwr_id1_para2
#define MEASPWR_RESTART (1 << 0)
#define MEASPWR_WINDOWS_CLR (1 << 1)
#define MEASPWR_LAST_FLAG (1 << 2)
#define MEASPWR_AFC_RELATED_EN (1 << 3)
#define MEASPWR_SINR_MAP(n) (((n)&0x7) << 4)
#define MEASPWR_MEASPWR_ID1_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 7)
#define MEASPWR_MEASPWR_ID1_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 16)
#define MEASPWR_MEASPWR_ID1_PARA2_CRS_RSSI_CLR (1 << 26)
#define MEASPWR_MEASPWR_ID1_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 28)
#define MEASPWR_MEASPWR_ID1_PARA2_IRT_SCALE_DISABLE (1 << 30)
#define MEASPWR_MEASPWR_ID1_PARA2_QF_MEM_SEL (1 << 31)

// measpwr_id2_para1
#define MEASPWR_MEASPWR_ID2_PARA1_CP_INDEX (1 << 0)
#define MEASPWR_MEASPWR_ID2_PARA1_TX_NUM (1 << 1)
#define MEASPWR_AFC_OUT_SEL (1 << 2)
#define MEASPWR_MEASPWR_ID2_PARA1_TX_FLAG (1 << 3)
#define MEASPWR_MEASPWR_ID2_PARA1_NID(n) (((n)&0x1ff) << 4)
#define MEASPWR_MEASPWR_ID2_PARA1_FIRSTD_OFDM_FLAG (1 << 13)
#define MEASPWR_CRS_RSSI_SEL(n) (((n)&0x3) << 14)
#define MEASPWR_AFC_OUT_NUM(n) (((n)&0xff) << 16)
#define MEASPWR_MEASPWR_ID2_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 24)
#define MEASPWR_MEASPWR_ID2_PARA1_LNUM_MOD(n) (((n)&0xf) << 28)

// measpwr_id2_para2
#define MEASPWR_RESTART (1 << 0)
#define MEASPWR_WINDOWS_CLR (1 << 1)
#define MEASPWR_LAST_FLAG (1 << 2)
#define MEASPWR_AFC_RELATED_EN (1 << 3)
#define MEASPWR_RESERVE2(n) (((n)&0x7) << 4)
#define MEASPWR_MEASPWR_ID2_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 7)
#define MEASPWR_MEASPWR_ID2_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 16)
#define MEASPWR_MEASPWR_ID2_PARA2_CRS_RSSI_CLR (1 << 26)
#define MEASPWR_MEASPWR_ID2_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 28)
#define MEASPWR_MEASPWR_ID2_PARA2_IRT_SCALE_DISABLE (1 << 30)
#define MEASPWR_MEASPWR_ID2_PARA2_QF_MEM_SEL (1 << 31)

// measpwr_id3_para1
#define MEASPWR_RESTART (1 << 0)
#define MEASPWR_WINDOWS_CLR (1 << 1)
#define MEASPWR_LAST_FLAG (1 << 2)
#define MEASPWR_MEASPWR_ID3_PARA1_CRS_RSSI_CLR (1 << 3)
#define MEASPWR_MEASPWR_ID3_PARA1_CP_INDEX (1 << 4)
#define MEASPWR_MEASPWR_ID3_PARA1_TX_NUM (1 << 5)
#define MEASPWR_MEASPWR_ID3_PARA1_TX_FLAG (1 << 6)
#define MEASPWR_MEASPWR_ID3_PARA1_NID(n) (((n)&0x1ff) << 8)
#define MEASPWR_MEASPWR_ID3_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
#define MEASPWR_MEASPWR_ID3_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
#define MEASPWR_MEASPWR_ID3_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)

// measpwr_id4_para1
#define MEASPWR_RESTART (1 << 0)
#define MEASPWR_WINDOWS_CLR (1 << 1)
#define MEASPWR_LAST_FLAG (1 << 2)
#define MEASPWR_MEASPWR_ID4_PARA1_CRS_RSSI_CLR (1 << 3)
#define MEASPWR_MEASPWR_ID4_PARA1_CP_INDEX (1 << 4)
#define MEASPWR_MEASPWR_ID4_PARA1_TX_NUM (1 << 5)
#define MEASPWR_MEASPWR_ID4_PARA1_TX_FLAG (1 << 6)
#define MEASPWR_MEASPWR_ID4_PARA1_NID(n) (((n)&0x1ff) << 8)
#define MEASPWR_MEASPWR_ID4_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
#define MEASPWR_MEASPWR_ID4_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
#define MEASPWR_MEASPWR_ID4_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)

// measpwr_id5_para1
#define MEASPWR_RESTART (1 << 0)
#define MEASPWR_WINDOWS_CLR (1 << 1)
#define MEASPWR_LAST_FLAG (1 << 2)
#define MEASPWR_MEASPWR_ID5_PARA1_CRS_RSSI_CLR (1 << 3)
#define MEASPWR_MEASPWR_ID5_PARA1_CP_INDEX (1 << 4)
#define MEASPWR_MEASPWR_ID5_PARA1_TX_NUM (1 << 5)
#define MEASPWR_MEASPWR_ID5_PARA1_TX_FLAG (1 << 6)
#define MEASPWR_MEASPWR_ID5_PARA1_NID(n) (((n)&0x1ff) << 8)
#define MEASPWR_MEASPWR_ID5_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
#define MEASPWR_MEASPWR_ID5_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
#define MEASPWR_MEASPWR_ID5_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)

// measpwr_id6_para1
#define MEASPWR_RESTART (1 << 0)
#define MEASPWR_WINDOWS_CLR (1 << 1)
#define MEASPWR_LAST_FLAG (1 << 2)
#define MEASPWR_MEASPWR_ID6_PARA1_CRS_RSSI_CLR (1 << 3)
#define MEASPWR_MEASPWR_ID6_PARA1_CP_INDEX (1 << 4)
#define MEASPWR_MEASPWR_ID6_PARA1_TX_NUM (1 << 5)
#define MEASPWR_MEASPWR_ID6_PARA1_TX_FLAG (1 << 6)
#define MEASPWR_MEASPWR_ID6_PARA1_NID(n) (((n)&0x1ff) << 8)
#define MEASPWR_MEASPWR_ID6_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
#define MEASPWR_MEASPWR_ID6_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
#define MEASPWR_MEASPWR_ID6_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)

// measpwr_id7_para1
#define MEASPWR_RESTART (1 << 0)
#define MEASPWR_WINDOWS_CLR (1 << 1)
#define MEASPWR_LAST_FLAG (1 << 2)
#define MEASPWR_MEASPWR_ID7_PARA1_CRS_RSSI_CLR (1 << 3)
#define MEASPWR_MEASPWR_ID7_PARA1_CP_INDEX (1 << 4)
#define MEASPWR_MEASPWR_ID7_PARA1_TX_NUM (1 << 5)
#define MEASPWR_MEASPWR_ID7_PARA1_TX_FLAG (1 << 6)
#define MEASPWR_MEASPWR_ID7_PARA1_NID(n) (((n)&0x1ff) << 8)
#define MEASPWR_MEASPWR_ID7_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
#define MEASPWR_MEASPWR_ID7_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
#define MEASPWR_MEASPWR_ID7_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)

// measpwr_id8_para1
#define MEASPWR_RESTART (1 << 0)
#define MEASPWR_WINDOWS_CLR (1 << 1)
#define MEASPWR_LAST_FLAG (1 << 2)
#define MEASPWR_MEASPWR_ID8_PARA1_CRS_RSSI_CLR (1 << 3)
#define MEASPWR_MEASPWR_ID8_PARA1_CP_INDEX (1 << 4)
#define MEASPWR_MEASPWR_ID8_PARA1_TX_NUM (1 << 5)
#define MEASPWR_MEASPWR_ID8_PARA1_TX_FLAG (1 << 6)
#define MEASPWR_MEASPWR_ID8_PARA1_NID(n) (((n)&0x1ff) << 8)
#define MEASPWR_MEASPWR_ID8_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
#define MEASPWR_MEASPWR_ID8_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
#define MEASPWR_MEASPWR_ID8_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)

// measpwr_id_para
#define MEASPWR_MODE_SEL(n) (((n)&0x3) << 0)
#define MEASPWR_AFC_SOFT_EN (1 << 2)
#define MEASPWR_IRT_SOFT_EN (1 << 3)
#define MEASPWR_NID12_INFO(n) (((n)&0xffff) << 4)
#define MEASPWR_OFFLIN_DATA_SEL (1 << 24)
#define MEASPWR_OFFLINE_MOD_SEL (1 << 28)

// measpwr_id_ctrl
#define MEASPWR_NID1 (1 << 0)
#define MEASPWR_NID2 (1 << 1)
#define MEASPWR_NID3 (1 << 2)
#define MEASPWR_NID4 (1 << 3)
#define MEASPWR_NID5 (1 << 4)
#define MEASPWR_NID6 (1 << 5)
#define MEASPWR_NID7 (1 << 6)
#define MEASPWR_NID8 (1 << 7)
#define MEASPWR_OFFLINE_SEL (1 << 8)
#define MEASPWR_NID38_INFO(n) (((n)&0x3ff) << 19)
#define MEASPWR_MEASPWR_ID_CTRL_INVALID_FLAG (1 << 29)

// measpwr_ctrl
#define MEASPWR_NID1_EN (1 << 0)
#define MEASPWR_NID2_EN (1 << 1)
#define MEASPWR_NID3_EN (1 << 2)
#define MEASPWR_NID4_EN (1 << 3)
#define MEASPWR_NID5_EN (1 << 4)
#define MEASPWR_NID6_EN (1 << 5)
#define MEASPWR_NID7_EN (1 << 6)
#define MEASPWR_NID8_EN (1 << 7)

// measpwr_afc1_out
#define MEASPWR_AFC_OUT1(n) (((n)&0xffff) << 0)

// measpwr_afc2_out
#define MEASPWR_AFC_OUT2(n) (((n)&0xffff) << 0)

// measpwr_afc3_out
#define MEASPWR_AFC_OUT3(n) (((n)&0xffff) << 0)

// measpwr_afc4_out
#define MEASPWR_AFC_OUT4(n) (((n)&0xffff) << 0)

// measpwr_afc5_out
#define MEASPWR_AFC_OUT5(n) (((n)&0xffff) << 0)

// measpwr_afc1_rsrp
#define MEASPWR_AFC_RSRP1(n) (((n)&0xffff) << 0)

// measpwr_afc2_rsrp
#define MEASPWR_AFC_RSRP2(n) (((n)&0xffff) << 0)

// measpwr_afc3_rsrp
#define MEASPWR_AFC_RSRP3(n) (((n)&0xffff) << 0)

// measpwr_afc4_rsrp
#define MEASPWR_AFC_RSRP4(n) (((n)&0xffff) << 0)

// measpwr_afc5_rsrp
#define MEASPWR_AFC_RSRP5(n) (((n)&0xffff) << 0)

// measpwr_sigma1_agc_out1
#define MEASPWR_BASEAGC1_OUT1(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR1_LOG_OUT1(n) (((n)&0x7ff) << 16)

// measpwr_sigma1_agc_out2
#define MEASPWR_BASEAGC1_OUT2(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR1_LOG_OUT2(n) (((n)&0x7ff) << 16)

// measpwr_sigma1_agc_out3
#define MEASPWR_BASEAGC1_OUT3(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR1_LOG_OUT3(n) (((n)&0x7ff) << 16)

// measpwr_sigma1_agc_out4
#define MEASPWR_BASEAGC1_OUT4(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR1_LOG_OUT4(n) (((n)&0x7ff) << 16)

// measpwr_sigma1_agc_out5
#define MEASPWR_BASEAGC1_OUT5(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR1_LOG_OUT5(n) (((n)&0x7ff) << 16)

// measpwr_sigma1_agc_out6
#define MEASPWR_BASEAGC1_OUT6(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR1_LOG_OUT6(n) (((n)&0x7ff) << 16)

// measpwr_sigma2_agc_out
#define MEASPWR_BASEAGC2_OUT(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR2_LOG_OUT(n) (((n)&0x7ff) << 16)

// measpwr_sigma3_agc_out
#define MEASPWR_BASEAGC3_OUT(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR3_LOG_OUT(n) (((n)&0x7ff) << 16)

// measpwr_sigma4_agc_out
#define MEASPWR_BASEAGC4_OUT(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR4_LOG_OUT(n) (((n)&0x7ff) << 16)

// measpwr_sigma5_agc_out
#define MEASPWR_BASEAGC5_OUT(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR5_LOG_OUT(n) (((n)&0x7ff) << 16)

// measpwr__doppler1_out
#define MEASPWR_DOPPLER1_OUT(n) (((n)&0x7ff) << 0)
#define MEASPWR_HLS_AGC_BASE1(n) (((n)&0x3ff) << 16)

// measpwr__doppler2_out
#define MEASPWR_DOPPLER2_OUT(n) (((n)&0x7ff) << 0)
#define MEASPWR_HLS_AGC_BASE2(n) (((n)&0x3ff) << 16)

// measpwr_rsrp1_db
#define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp1_scale_db
#define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrq1_db
#define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)

// measpwr_rssi1_db
#define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp2_db
#define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp2_scale_db
#define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrq2_db
#define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)

// measpwr_rssi2_db
#define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp3_db
#define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp3_scale_db
#define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrq3_db
#define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)

// measpwr_rssi3_db
#define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp4_db
#define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp4_scale_db
#define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrq4_db
#define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)

// measpwr_rssi4_db
#define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp5_db
#define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp5_scale_db
#define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrq5_db
#define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)

// measpwr_rssi5_db
#define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp6_db
#define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp6_scale_db
#define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrq6_db
#define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)

// measpwr_rssi6_db
#define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp7_db
#define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp7_scale_db
#define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrq7_db
#define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)

// measpwr_rssi7_db
#define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp8_db
#define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrp8_scale_db
#define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)

// measpwr_rsrq8_db
#define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)

// measpwr_rssi8_db
#define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)

// measpwr_irt1_delay
#define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)

// measpwr__irt1outflag
#define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
#define MEASPWR_IRT_VALIDFLAG (1 << 12)

// measpwr_irt2_delay
#define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)

// measpwr__irt2outflag
#define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
#define MEASPWR_IRT_VALIDFLAG (1 << 12)

// measpwr_irt3_delay
#define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)

// measpwr__irt3outflag
#define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
#define MEASPWR_IRT_VALIDFLAG (1 << 12)

// measpwr_irt4_delay
#define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)

// measpwr__irt4outflag
#define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
#define MEASPWR_IRT_VALIDFLAG (1 << 12)

// measpwr_irt5_delay
#define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)

// measpwr__irt5outflag
#define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
#define MEASPWR_IRT_VALIDFLAG (1 << 12)

// measpwr_irt6_delay
#define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)

// measpwr__irt6outflag
#define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
#define MEASPWR_IRT_VALIDFLAG (1 << 12)

// measpwr_irt7_delay
#define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)

// measpwr__irt7outflag
#define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
#define MEASPWR_IRT_VALIDFLAG (1 << 12)

// measpwr_irt8_delay
#define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)

// measpwr__irt8outflag
#define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
#define MEASPWR_IRT_VALIDFLAG (1 << 12)

// measpwr_trms1_out
#define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)

// measpwr_trms2_out
#define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)

// measpwr_id_info
#define MEASPWR_ID1_INFO(n) (((n)&0xffff) << 0)
#define MEASPWR_ID2_INFO(n) (((n)&0xffff) << 16)

// measpwr_rbis_para
#define MEASPWR_RBIS_FACTOR(n) (((n)&0xffff) << 0)
#define MEASPWR_RBIS_DIPOS(n) (((n)&0x7f) << 16)
#define MEASPWR_MEASPWR_RBIS_PARA_RBIS_NUM(n) (((n)&0x7) << 23)
#define MEASPWR_RBIS_POSEN (1 << 26)
#define MEASPWR_RBIS_EN (1 << 27)
#define MEASPWR_RBIS_JUDGE (1 << 28)
#define MEASPWR_RBIS_CORRECT (1 << 29)

// measpwr_rbis_out1
#define MEASPWR_RBIS_OUT0(n) (((n)&0x7f) << 0)
#define MEASPWR_RBIS_OUT1(n) (((n)&0x7f) << 8)
#define MEASPWR_RBIS_OUT2(n) (((n)&0x7f) << 16)
#define MEASPWR_RBIS_OUT3(n) (((n)&0x7f) << 24)

// measpwr_rbis_out2
#define MEASPWR_RBIS_OUT4(n) (((n)&0x7f) << 0)
#define MEASPWR_MEASPWR_RBIS_OUT2_RBIS_NUM(n) (((n)&0x7) << 8)

// measpwr_rbis_max
#define MEASPWR_RBIS_MAX(n) (((n)&0x1ffffff) << 0)

// measpwr_rx_irt
#define MEASPWR_ID1_RX_IRT(n) (((n)&0x1f) << 0)
#define MEASPWR_ID1_OFFSET4(n) (((n)&0x3ff) << 5)
#define MEASPWR_ID2_RX_IRT(n) (((n)&0x1f) << 16)
#define MEASPWR_ID2_OFFSET4(n) (((n)&0x3ff) << 21)

// measpwr_debug1
#define MEASPWR_DATAIN_STATE(n) (((n)&0x7) << 0)
#define MEASPWR_DATAGEN_STATE(n) (((n)&0x7ff) << 4)
#define MEASPWR_DIN_ID_SEL(n) (((n)&0x7) << 16)
#define MEASPWR_OFFSET2_UPDATE (1 << 20)
#define MEASPWR_ID_UPDATE (1 << 21)
#define MEASPWR_DEBUG_UPDATE_FLAG (1 << 22)
#define MEASPWR_DEBUG_REV_FLAG (1 << 23)

// measpwr_debug2
#define MEASPWR_INMEM_CONT(n) (((n)&0xffff) << 0)
#define MEASPWR_INVALID_DATA_CONT(n) (((n)&0x7fff) << 16)
#define MEASPWR_INMEM_IN_ACT (1 << 31)

// measpwr_debug3
#define MEASPWR_FUNC_STATE(n) (((n)&0x1ff) << 0)
#define MEASPWR_POW_STATE(n) (((n)&0x1f) << 12)
#define MEASPWR_FUNC_ID_SEL(n) (((n)&0x7) << 20)
#define MEASPWR_DATAIN_STATE_CUR(n) (((n)&0x7) << 24)

// measpwr_sigma6_agc_out
#define MEASPWR_BASEAGC6_OUT(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR6_LOG_OUT(n) (((n)&0x7ff) << 16)

// measpwr_sigma7_agc_out
#define MEASPWR_BASEAGC7_OUT(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR7_LOG_OUT(n) (((n)&0x7ff) << 16)

// measpwr_sigma8_agc_out
#define MEASPWR_BASEAGC8_OUT(n) (((n)&0x3ff) << 0)
#define MEASPWR_SINR8_LOG_OUT(n) (((n)&0x7ff) << 16)

// measpwr_afc_soft_reect2
#define MEASPWR_AFC_SOFT_FA_CTOR2(n) (((n)&0xffff) << 0)

// measpwr_afc_soft_reect3
#define MEASPWR_AFC_SOFT_FA_CTOR3(n) (((n)&0xffff) << 0)

// measpwr_afc_soft_reect4
#define MEASPWR_AFC_SOFT_FA_CTOR4(n) (((n)&0xffff) << 0)

// measpwr_afc_soft_reect5
#define MEASPWR_AFC_SOFT_FA_CTOR5(n) (((n)&0xffff) << 0)

// measpwr_afc_soft_reect6
#define MEASPWR_AFC_SOFT_FA_CTOR6(n) (((n)&0xffff) << 0)

// measpwr_afc_soft_reect7
#define MEASPWR_AFC_SOFT_FA_CTOR7(n) (((n)&0xffff) << 0)

// measpwr_afc_soft_reect8
#define MEASPWR_AFC_SOFT_FA_CTOR8(n) (((n)&0xffff) << 0)

// measpwr_doppler_para2
#define MEASPWR_DOPPLER_ALPHA2(n) (((n)&0x1ffff) << 0)

// measpwr_trmsf_para
#define MEASPWR_TRMSF_ALPHA(n) (((n)&0x1ffff) << 0)
#define MEASPWR_TRMSF_SPACE(n) (((n)&0x3) << 20)
#define MEASPWR_TRMSF_SCALE(n) (((n)&0xf) << 24)

// measpwr_id3_para2
#define MEASPWR_MEASPWR_ID3_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
#define MEASPWR_MEASPWR_ID3_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
#define MEASPWR_MEASPWR_ID3_PARA2_IRT_SCALE_DISABLE (1 << 14)
#define MEASPWR_MEASPWR_ID3_PARA2_QF_MEM_SEL (1 << 15)
#define MEASPWR_MEASPWR_ID3_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)

// measpwr_id4_para2
#define MEASPWR_MEASPWR_ID4_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
#define MEASPWR_MEASPWR_ID4_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
#define MEASPWR_MEASPWR_ID4_PARA2_IRT_SCALE_DISABLE (1 << 14)
#define MEASPWR_MEASPWR_ID4_PARA2_QF_MEM_SEL (1 << 15)
#define MEASPWR_MEASPWR_ID4_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)

// measpwr_id5_para2
#define MEASPWR_MEASPWR_ID5_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
#define MEASPWR_MEASPWR_ID5_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
#define MEASPWR_MEASPWR_ID5_PARA2_IRT_SCALE_DISABLE (1 << 14)
#define MEASPWR_MEASPWR_ID5_PARA2_QF_MEM_SEL (1 << 15)
#define MEASPWR_MEASPWR_ID5_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)

// measpwr_id6_para2
#define MEASPWR_MEASPWR_ID6_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
#define MEASPWR_MEASPWR_ID6_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
#define MEASPWR_MEASPWR_ID6_PARA2_IRT_SCALE_DISABLE (1 << 14)
#define MEASPWR_MEASPWR_ID6_PARA2_QF_MEM_SEL (1 << 15)
#define MEASPWR_MEASPWR_ID6_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)

// measpwr_id7_para2
#define MEASPWR_MEASPWR_ID7_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
#define MEASPWR_MEASPWR_ID7_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
#define MEASPWR_MEASPWR_ID7_PARA2_IRT_SCALE_DISABLE (1 << 14)
#define MEASPWR_MEASPWR_ID7_PARA2_QF_MEM_SEL (1 << 15)
#define MEASPWR_MEASPWR_ID7_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)

// measpwr_id8_para2
#define MEASPWR_MEASPWR_ID8_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
#define MEASPWR_MEASPWR_ID8_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
#define MEASPWR_MEASPWR_ID8_PARA2_IRT_SCALE_DISABLE (1 << 14)
#define MEASPWR_MEASPWR_ID8_PARA2_QF_MEM_SEL (1 << 15)
#define MEASPWR_MEASPWR_ID8_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)

// measpwr_afc1_hst
#define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)

// measpwr_afc2_hst
#define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)

// measpwr_afc3_hst
#define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)

// measpwr_afc4_hst
#define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)

// measpwr_afc5_hst
#define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)

// measpwr_afc6_hst
#define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)

// measpwr_afc7_hst
#define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)

// measpwr_afc8_hst
#define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)

// measpwr_doppler3_out
#define MEASPWR_DOPPLER3_OUT(n) (((n)&0x7ff) << 0)
#define MEASPWR_HLS_AGC_BASE3(n) (((n)&0x3ff) << 16)

// measpwr_doppler4_out
#define MEASPWR_DOPPLER4_OUT(n) (((n)&0x7ff) << 0)
#define MEASPWR_HLS_AGC_BASE4(n) (((n)&0x3ff) << 16)

// measpwr_doppler5_out
#define MEASPWR_DOPPLER5_OUT(n) (((n)&0x7ff) << 0)
#define MEASPWR_HLS_AGC_BASE5(n) (((n)&0x3ff) << 16)

// measpwr_doppler6_out
#define MEASPWR_DOPPLER6_OUT(n) (((n)&0x7ff) << 0)
#define MEASPWR_HLS_AGC_BASE6(n) (((n)&0x3ff) << 16)

// measpwr_doppler7_out
#define MEASPWR_DOPPLER7_OUT(n) (((n)&0x7ff) << 0)
#define MEASPWR_HLS_AGC_BASE7(n) (((n)&0x3ff) << 16)

// measpwr_doppler8_out
#define MEASPWR_DOPPLER8_OUT(n) (((n)&0x7ff) << 0)
#define MEASPWR_HLS_AGC_BASE8(n) (((n)&0x3ff) << 16)

// measpwr_pow1_max
#define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
#define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)

// measpwr_pow2_max
#define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
#define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)

// measpwr_pow3_max
#define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
#define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)

// measpwr_pow4_max
#define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
#define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)

// measpwr_pow5_max
#define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
#define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)

// measpwr_pow6_max
#define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
#define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)

// measpwr_pow7_max
#define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
#define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)

// measpwr_pow8_max
#define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
#define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)

// measpwr_trms3_out
#define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)

// measpwr_trms4_out
#define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)

// measpwr_trms5_out
#define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)

// measpwr_trms6_out
#define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)

// measpwr_trms7_out
#define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)

// measpwr_trms8_out
#define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)

// measpwr_reis_conf
#define MEASPWR_REIS_NUM(n) (((n)&0xf) << 0)
#define MEASPWR_REIS_EN (1 << 4)
#define MEASPWR_REIS_DC_EN (1 << 5)

// measpwr_reis_pos0
#define MEASPWR_REIS_RE0(n) (((n)&0x7ff) << 0)
#define MEASPWR_REIS_RE1(n) (((n)&0x7ff) << 16)

// measpwr_reis_pos1
#define MEASPWR_REIS_RE2(n) (((n)&0x7ff) << 0)
#define MEASPWR_REIS_RE3(n) (((n)&0x7ff) << 16)

// measpwr_reis_pos2
#define MEASPWR_REIS_RE4(n) (((n)&0x7ff) << 0)
#define MEASPWR_REIS_RE5(n) (((n)&0x7ff) << 16)

// measpwr_reis_pos3
#define MEASPWR_REIS_RE6(n) (((n)&0x7ff) << 0)
#define MEASPWR_REIS_RE7(n) (((n)&0x7ff) << 16)

// measpwr_offline0_sel
#define MEASPWR_DECISION_FLAG(n) (((n)&0x3) << 0)
#define MEASPWR_JUMP_FLAG(n) (((n)&0x3) << 4)
#define MEASPWR_POS_DELAY_SEL (1 << 8)

// measpwr_offline0_pos
#define MEASPWR_ID1_MAX_POSITION(n) (((n)&0xf) << 0)
#define MEASPWR_ID2_MAX_POSITION(n) (((n)&0xf) << 4)
#define MEASPWR_ID3_MAX_POSITION(n) (((n)&0xf) << 8)
#define MEASPWR_ID4_MAX_POSITION(n) (((n)&0xf) << 12)
#define MEASPWR_ID5_MAX_POSITION(n) (((n)&0xf) << 16)
#define MEASPWR_ID6_MAX_POSITION(n) (((n)&0xf) << 20)
#define MEASPWR_ID7_MAX_POSITION(n) (((n)&0xf) << 24)
#define MEASPWR_ID8_MAX_POSITION(n) (((n)&0xf) << 28)

// measpwr_offline0_id
#define MEASPWR_OFFLINE_JUMP_ID(n) (((n)&0xf) << 0)
#define MEASPWR_TBIN_POSITION_VALID_FLAG(n) (((n)&0xff) << 4)

// measpwr_offline1_para
#define MEASPWR_OFFLINE1_TIME(n) (((n)&0x1f) << 0)
#define MEASPWR_OFFLINE1_NUM (1 << 5)
#define MEASPWR_OFFLINE1_MOD_SEL(n) (((n)&0x3) << 8)
#define MEASPWR_FIRST_OFDM (1 << 12)

// measpwr_offline1_agc1
#define MEASPWR_OFFLINE1_AGC1(n) (((n)&0x3ff) << 0)
#define MEASPWR_OFFLINE1_AGC2(n) (((n)&0x3ff) << 10)
#define MEASPWR_OFFLINE1_AGC3(n) (((n)&0x3ff) << 20)

// measpwr_offline1_agc2
#define MEASPWR_OFFLINE1_AGC4(n) (((n)&0x3ff) << 0)
#define MEASPWR_OFFLINE1_AGC5(n) (((n)&0x3ff) << 10)
#define MEASPWR_OFFLINE1_AGC6(n) (((n)&0x3ff) << 20)

// measpwr_offline1_agc3
#define MEASPWR_OFFLINE1_AGC7(n) (((n)&0x3ff) << 0)
#define MEASPWR_OFFLINE1_AGC8(n) (((n)&0x3ff) << 10)
#define MEASPWR_OFFLINE1_AGC9(n) (((n)&0x3ff) << 20)

// measpwr_offline1_agc4
#define MEASPWR_OFFLINE1_AGC10(n) (((n)&0x3ff) << 0)
#define MEASPWR_OFFLINE1_AGC11(n) (((n)&0x3ff) << 10)
#define MEASPWR_OFFLINE1_AGC12(n) (((n)&0x3ff) << 20)

// measpwr_offline1_agc5
#define MEASPWR_OFFLINE1_AGC13(n) (((n)&0x3ff) << 0)
#define MEASPWR_OFFLINE1_AGC14(n) (((n)&0x3ff) << 10)
#define MEASPWR_OFFLINE1_AGC15(n) (((n)&0x3ff) << 20)

// measpwr_offline1_agc6
#define MEASPWR_OFFLINE1_AGC16(n) (((n)&0x3ff) << 0)
#define MEASPWR_OFFLINE1_AGC17(n) (((n)&0x3ff) << 10)
#define MEASPWR_OFFLINE1_AGC18(n) (((n)&0x3ff) << 20)

// measpwr_crs_rssi1_agc1
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi1_agc2
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi1_agc3
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi2_agc1
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi2_agc2
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi2_agc3
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi3_agc
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi4_agc
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi5_agc
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi6_agc
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi7_agc
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_crs_rssi8_agc
#define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)

// measpwr_hmmse_win
#define MEASPWR_FH_WL_IND (1 << 0)

// measpwr_hmmse_bitsel
#define MEASPWR_FH_BITSEL(n) (((n)&0xf) << 0)

// measpwr_hmmse_flag
#define MEASPWR_QF_MEM_MARK(n) (((n)&0x3) << 0)
#define MEASPWR_USED_WL_IND (1 << 4)

// measpwr_id_info2
#define MEASPWR_ID38_INFO(n) (((n)&0x3ff) << 0)

// measpwr_inmem_mode
#define MEASPWR_INMEM_MODE(n) (((n)&0x3) << 0)

// measpwr_afc1_rsrp_hst
#define MEASPWR_AFC_RSRP1_HST(n) (((n)&0xffff) << 0)

// measpwr_afc2_rsrp_hst
#define MEASPWR_AFC_RSRP2_HST(n) (((n)&0xffff) << 0)

// measpwr_afc3_rsrp_hst
#define MEASPWR_AFC_RSRP3_HST(n) (((n)&0xffff) << 0)

// measpwr_afc4_rsrp_hst
#define MEASPWR_AFC_RSRP4_HST(n) (((n)&0xffff) << 0)

// measpwr_afc5_rsrp_hst
#define MEASPWR_AFC_RSRP5_HST(n) (((n)&0xffff) << 0)

// measpwr_afc6_rsrp_hst
#define MEASPWR_AFC_RSRP6_HST(n) (((n)&0xffff) << 0)

// measpwr_afc7_rsrp_hst
#define MEASPWR_AFC_RSRP7_HST(n) (((n)&0xffff) << 0)

// measpwr_afc8_rsrp_hst
#define MEASPWR_AFC_RSRP8_HST(n) (((n)&0xffff) << 0)

// measpwr_afc6_out
#define MEASPWR_AFC_OUT6(n) (((n)&0xffff) << 0)

// measpwr_afc7_out
#define MEASPWR_AFC_OUT7(n) (((n)&0xffff) << 0)

// measpwr_afc8_out
#define MEASPWR_AFC_OUT8(n) (((n)&0xffff) << 0)

// measpwr_afc6_rsrp
#define MEASPWR_AFC_RSRP6(n) (((n)&0xffff) << 0)

// measpwr_afc7_rsrp
#define MEASPWR_AFC_RSRP7(n) (((n)&0xffff) << 0)

// measpwr_afc8_rsrp
#define MEASPWR_AFC_RSRP8(n) (((n)&0xffff) << 0)

// measpwr_offline1_agc7
#define MEASPWR_OFFLINE1_AGC19(n) (((n)&0x3ff) << 0)
#define MEASPWR_OFFLINE1_AGC20(n) (((n)&0x3ff) << 10)

// measpwr_int_join
#define MEASPWR_INTERRUPT_JOIN_FLAG(n) (((n)&0xff) << 0)

// measpwr_int_mark
#define MEASPWR_ID1_INTERRUPT_MARK(n) (((n)&0xf) << 0)
#define MEASPWR_ID2_INTERRUPT_MARK(n) (((n)&0xf) << 4)
#define MEASPWR_ID3_INTERRUPT_MARK(n) (((n)&0xf) << 8)
#define MEASPWR_ID4_INTERRUPT_MARK(n) (((n)&0xf) << 12)
#define MEASPWR_ID5_INTERRUPT_MARK(n) (((n)&0xf) << 16)
#define MEASPWR_ID6_INTERRUPT_MARK(n) (((n)&0xf) << 20)
#define MEASPWR_ID7_INTERRUPT_MARK(n) (((n)&0xf) << 24)
#define MEASPWR_ID8_INTERRUPT_MARK(n) (((n)&0xf) << 28)

// measpwr_int_flag
#define MEASPWR_INTERRUPT_FLAG(n) (((n)&0xff) << 0)

// measpwr_offline0_decpos1
#define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
#define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
#define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)

// measpwr_offline0_decpos2
#define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
#define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
#define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)

// measpwr_offline0_decpos3
#define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
#define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
#define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)

// measpwr_offline0_decpos4
#define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
#define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
#define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)

// measpwr_offline0_decpos5
#define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
#define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
#define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)

// measpwr_offline0_decpos6
#define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
#define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
#define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)

// measpwr_offline0_decpos7
#define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
#define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
#define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)

// measpwr_offline0_decpos8
#define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
#define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
#define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)

// measpwr_rbis_para2
#define MEASPWR_RBIS_FACTOR(n) (((n)&0xffff) << 0)
#define MEASPWR_RBIS_DIPOS(n) (((n)&0x7f) << 16)
#define MEASPWR_MEASPWR_RBIS_PARA2_RBIS_NUM(n) (((n)&0x7) << 23)
#define MEASPWR_RBIS_POSEN (1 << 26)
#define MEASPWR_RBIS_EN (1 << 27)
#define MEASPWR_RBIS_JUDGE (1 << 28)
#define MEASPWR_RBIS_CORRECT (1 << 29)

// measpwr_rbis2_out1
#define MEASPWR_RBIS_OUT0(n) (((n)&0x7f) << 0)
#define MEASPWR_RBIS_OUT1(n) (((n)&0x7f) << 8)
#define MEASPWR_RBIS_OUT2(n) (((n)&0x7f) << 16)
#define MEASPWR_RBIS_OUT3(n) (((n)&0x7f) << 24)

// measpwr_rbis2_out2
#define MEASPWR_RBIS_OUT4(n) (((n)&0x7f) << 0)
#define MEASPWR_MEASPWR_RBIS2_OUT2_RBIS_NUM(n) (((n)&0x7) << 8)

// measpwr_rbis2_max
#define MEASPWR_RBIS_MAX(n) (((n)&0x1ffffff) << 0)

// measpwr_rbis3_out1
#define MEASPWR_RBIS_OUT0(n) (((n)&0x7f) << 0)
#define MEASPWR_RBIS_OUT1(n) (((n)&0x7f) << 8)
#define MEASPWR_RBIS_OUT2(n) (((n)&0x7f) << 16)
#define MEASPWR_RBIS_OUT3(n) (((n)&0x7f) << 24)

// measpwr_rbis3_out2
#define MEASPWR_RBIS_OUT4(n) (((n)&0x7f) << 0)
#define MEASPWR_MEASPWR_RBIS3_OUT2_RBIS_NUM(n) (((n)&0x7) << 8)

// measpwr_rbis3_max
#define MEASPWR_RBIS_MAX(n) (((n)&0x1ffffff) << 0)

// measpwr_sigpwr_para2
#define MEASPWR_SIGPWR_RENUM(n) (((n)&0xff) << 0)

// measpwr_irt_para3
#define MEASPWR_N_TH(n) (((n)&0xffff) << 0)
#define MEASPWR_MEASPWR_IRT_PARA3_S_TH(n) (((n)&0xffff) << 16)

// measpwr_trms_para3
#define MEASPWR_N_TH(n) (((n)&0xffff) << 0)
#define MEASPWR_MEASPWR_TRMS_PARA3_S_TH(n) (((n)&0xffff) << 16)

// measpwr_rsrp_para5
#define MEASPWR_MEASPWR_RSRP_PARA5_S_TH(n) (((n)&0xffff) << 0)
#define MEASPWR_MEASPWR_RSRP_PARA5_BETA(n) (((n)&0xffff) << 16)

// measpwr_rbis_in1
#define MEASPWR_RBIS_IN0(n) (((n)&0x7f) << 0)
#define MEASPWR_RBIS_IN1(n) (((n)&0x7f) << 8)
#define MEASPWR_RESERCED3 (1 << 15)
#define MEASPWR_RBIS_IN2(n) (((n)&0x7f) << 16)
#define MEASPWR_RBIS_IN3(n) (((n)&0x7f) << 24)

// measpwr_rbis_in2
#define MEASPWR_RBIS_IN4(n) (((n)&0x7f) << 0)
#define MEASPWR_RBIS_IN_NUM(n) (((n)&0x7) << 8)

// measpwr_rbis2_in1
#define MEASPWR_RBIS_IN0(n) (((n)&0x7f) << 0)
#define MEASPWR_RBIS_IN1(n) (((n)&0x7f) << 8)
#define MEASPWR_RESERCED3 (1 << 15)
#define MEASPWR_RBIS_IN2(n) (((n)&0x7f) << 16)
#define MEASPWR_RBIS_IN3(n) (((n)&0x7f) << 24)

// measpwr_rbis2_in2
#define MEASPWR_RBIS_IN4(n) (((n)&0x7f) << 0)
#define MEASPWR_RBIS_IN_NUM(n) (((n)&0x7) << 8)

// measpwr_rbis3_in1
#define MEASPWR_RBIS_IN0(n) (((n)&0x7f) << 0)
#define MEASPWR_RBIS_IN1(n) (((n)&0x7f) << 8)
#define MEASPWR_RESERCED3 (1 << 15)
#define MEASPWR_RBIS_IN2(n) (((n)&0x7f) << 16)
#define MEASPWR_RBIS_IN3(n) (((n)&0x7f) << 24)

// measpwr_rbis3_in2
#define MEASPWR_RBIS_IN4(n) (((n)&0x7f) << 0)
#define MEASPWR_RBIS_IN_NUM(n) (((n)&0x7) << 8)

// mem_in_1
#define MEASPWR_MEM_IN_1(n) (((n)&0xffffff) << 0)

// mem_in_2
#define MEASPWR_MEM_IN_2(n) (((n)&0xffffff) << 0)

// mem_in_3
#define MEASPWR_MEM_IN_3(n) (((n)&0xffffff) << 0)

// mem_in_4
#define MEASPWR_MEM_IN_4(n) (((n)&0xffffff) << 0)

// mem_in_5
#define MEASPWR_MEM_IN_5(n) (((n)&0xffffff) << 0)

// mem_in_6
#define MEASPWR_MEM_IN_6(n) (((n)&0xffffff) << 0)

// mem_in_7
#define MEASPWR_MEM_IN_7(n) (((n)&0xffffff) << 0)

// mem_in_8
#define MEASPWR_MEM_IN_8(n) (((n)&0xffffff) << 0)

#endif // _MEASPWR_H_
