/* Copyright (C) 2018 RDA Technologies Limited and/or its affiliates("RDA").
 * All rights reserved.
 *
 * This software is supplied "AS IS" without any warranties.
 * RDA assumes no responsibility or liability for the use of the software,
 * conveys no license or title under any patent, copyright, or mask work
 * right to the product. RDA reserves the right to make changes in the
 * software without notification.  RDA also make no representation or
 * warranty that such application will be suitable for the specified use
 * without further testing or modification.
 */

#ifndef _MST_CTRL_AP_H_
#define _MST_CTRL_AP_H_

// Auto generated by dtools(see dtools.txt for its version).
// Don't edit it manually!

#define REG_MST_CTRL_AP_BASE (0x51320000)

typedef volatile struct
{
    uint32_t rd_sec_0; // 0x00000000
    uint32_t wr_sec_0; // 0x00000004
} HWP_MST_CTRL_AP_T;

#define hwp_mstCtrlAp ((HWP_MST_CTRL_AP_T *)REG_ACCESS_ADDRESS(REG_MST_CTRL_AP_BASE))

// rd_sec_0
typedef union {
    uint32_t v;
    struct
    {
        uint32_t usb_rd_sec : 1;   // [0]
        uint32_t gouda_rd_sec : 1; // [1]
        uint32_t lzma_rd_sec : 1;  // [2]
        uint32_t emmc_rd_sec : 2;  // [4:3]
        uint32_t __31_5 : 27;      // [31:5]
    } b;
} REG_MST_CTRL_AP_RD_SEC_0_T;

// wr_sec_0
typedef union {
    uint32_t v;
    struct
    {
        uint32_t usb_wr_sec : 1;   // [0]
        uint32_t gouda_wr_sec : 1; // [1]
        uint32_t lzma_wr_sec : 1;  // [2]
        uint32_t emmc_wr_sec : 2;  // [4:3]
        uint32_t __31_5 : 27;      // [31:5]
    } b;
} REG_MST_CTRL_AP_WR_SEC_0_T;

// rd_sec_0
#define MST_CTRL_AP_USB_RD_SEC (1 << 0)
#define MST_CTRL_AP_GOUDA_RD_SEC (1 << 1)
#define MST_CTRL_AP_LZMA_RD_SEC (1 << 2)
#define MST_CTRL_AP_EMMC_RD_SEC(n) (((n)&0x3) << 3)

// wr_sec_0
#define MST_CTRL_AP_USB_WR_SEC (1 << 0)
#define MST_CTRL_AP_GOUDA_WR_SEC (1 << 1)
#define MST_CTRL_AP_LZMA_WR_SEC (1 << 2)
#define MST_CTRL_AP_EMMC_WR_SEC(n) (((n)&0x3) << 3)

#endif // _MST_CTRL_AP_H_
