/* Copyright (C) 2018 RDA Technologies Limited and/or its affiliates("RDA"). * All rights reserved. * * This software is supplied "AS IS" without any warranties. * RDA assumes no responsibility or liability for the use of the software, * conveys no license or title under any patent, copyright, or mask work * right to the product. RDA reserves the right to make changes in the * software without notification. RDA also make no representation or * warranty that such application will be suitable for the specified use * without further testing or modification. */ #ifndef _HAL_CONFIG_H_ #define _HAL_CONFIG_H_ #include "hal_chip_config.h" //quectel update #include "quec_proj_config.h" // @AUTO_GENERATION_NOTICE@ /** * SOC name */ #cmakedefine CONFIG_SOC "@CONFIG_SOC@" /** * build target */ #cmakedefine CONFIG_BUILD_TARGET "@CONFIG_BUILD_TARGET@" /** * whether it is 8910 series */ #cmakedefine CONFIG_SOC_8910 /** * whether it is 8811 series */ #cmakedefine CONFIG_SOC_8811 /** * whether it is 8811 series */ #cmakedefine CONFIG_SOC_8850 /** * whether it is FPGA, not real chip * * This will be defined when developing in FPGA. For SOC independent codes, * and it is needed to distinguish FPGA and real chip, this macro can be * used. */ #cmakedefine CONFIG_RUN_ON_FPGA /** * whether it is ARM CPUs */ #cmakedefine CONFIG_CPU_ARM /** * whether it is ARMv7-A CPUs */ #cmakedefine CONFIG_CPU_ARMV7A /** * whether it is ARM Cortex A5 */ #cmakedefine CONFIG_CPU_ARM_CA5 /** * whether it is ARMv7-M CPUs */ #cmakedefine CONFIG_CPU_ARMV7M /** * whether it is ARM Cortex M4F */ #cmakedefine CONFIG_CPU_ARM_CM4F /** * whether it is ARMv8-M CPUs */ #cmakedefine CONFIG_CPU_ARMV8M /** * whether it is ARM Cortex M33F */ #cmakedefine CONFIG_CPU_ARM_CM33F /** * I-cache and D-cache line size * * It is assumed that I-cache line size is the same with D-cache line size. */ #cmakedefine CONFIG_CACHE_LINE_SIZE @CONFIG_CACHE_LINE_SIZE@ /** * whether there is MMU */ #cmakedefine CONFIG_HAVE_MMU /** * SOC have hardware LZMA */ #cmakedefine CONFIG_HAVE_LZMA /** * SOC have hardware spinlock */ #cmakedefine CONFIG_HAVE_SPINLOCK /** * whether there is PSRAM */ #cmakedefine CONFIG_USE_PSRAM /** * whether it is QPI 4bits PSRAM (8811) */ #cmakedefine CONFIG_QPI_PSRAM /** * whether it is OPI 8bits PSRAM (8811) */ #cmakedefine CONFIG_OPI_PSRAM /** * whether there is DDR */ #cmakedefine CONFIG_USE_DDR /** * whether there is PSRAM or DDR */ #cmakedefine CONFIG_HAVE_EXT_RAM /** * PSRAM or DDR size, shall match CONFIG_RAM_xx */ #cmakedefine CONFIG_RAM_SIZE @CONFIG_RAM_SIZE@ /** * whether NOR flash is used */ #cmakedefine CONFIG_NOR_FLASH /** * NOR flash size, shall match CONFIG_FLASH_xx */ #cmakedefine CONFIG_FLASH_SIZE @CONFIG_FLASH_SIZE@ /** * SRAM size * * - 8955/8909: system SRAM size * - 8811: total SRAM size * - 8910: total SRAM size */ #cmakedefine CONFIG_SRAM_SIZE @CONFIG_SRAM_SIZE@ /** * aon SRAM size (8850) */ #cmakedefine CONFIG_AON_SRAM_SIZE @CONFIG_AON_SRAM_SIZE@ /** * cp SRAM size (8850) */ #cmakedefine CONFIG_CP_SRAM_SIZE @CONFIG_CP_SRAM_SIZE@ /** * simage header size (used in 8811) */ #cmakedefine CONFIG_SIMAGE_HEADER_SIZE @CONFIG_SIMAGE_HEADER_SIZE@ /** * uimage header size (used in 8910) */ #cmakedefine CONFIG_UIMAGE_HEADER_SIZE @CONFIG_UIMAGE_HEADER_SIZE@ /** * system ROM physical address * * It may be undefined when system ROM won't be accessed */ #cmakedefine CONFIG_ROM_PHY_ADDRESS @CONFIG_ROM_PHY_ADDRESS@ /** * NBROM physical address */ #cmakedefine CONFIG_NBROM_PHY_ADDRESS @CONFIG_NBROM_PHY_ADDRESS@ /** * system SRAM physical address */ #cmakedefine CONFIG_SRAM_PHY_ADDRESS @CONFIG_SRAM_PHY_ADDRESS@ /** * aon SRAM physical address (8850) */ #cmakedefine CONFIG_AON_SRAM_PHY_ADDRESS @CONFIG_AON_SRAM_PHY_ADDRESS@ /** * cp SRAM physical address (8850) */ #cmakedefine CONFIG_CP_SRAM_PHY_ADDRESS @CONFIG_CP_SRAM_PHY_ADDRESS@ /** * NOR flash physical address */ #cmakedefine CONFIG_NOR_PHY_ADDRESS @CONFIG_NOR_PHY_ADDRESS@ /** * external NOR flash physical address */ #cmakedefine CONFIG_NOR_EXT_PHY_ADDRESS @CONFIG_NOR_EXT_PHY_ADDRESS@ /** * PSRAM or DDR physical address */ #cmakedefine CONFIG_RAM_PHY_ADDRESS @CONFIG_RAM_PHY_ADDRESS@ #cmakedefine CONFIG_RAM_HEADER_SIZE @CONFIG_RAM_HEADER_SIZE@ /** * GIC base address */ #cmakedefine CONFIG_GIC_BASE_ADDRESS @CONFIG_GIC_BASE_ADDRESS@ /** * GIC CPU interface offset */ #cmakedefine CONFIG_GIC_CPU_INTERFACE_OFFSET @CONFIG_GIC_CPU_INTERFACE_OFFSET@ /** * GIC priority bits, unique level is (1<