/* Copyright (C) 2018 RDA Technologies Limited and/or its affiliates("RDA").
 * All rights reserved.
 *
 * This software is supplied "AS IS" without any warranties.
 * RDA assumes no responsibility or liability for the use of the software,
 * conveys no license or title under any patent, copyright, or mask work
 * right to the product. RDA reserves the right to make changes in the
 * software without notification.  RDA also make no representation or
 * warranty that such application will be suitable for the specified use
 * without further testing or modification.
 */

#ifndef _MST_FLT_AON_CP_H_
#define _MST_FLT_AON_CP_H_

// Auto generated by dtools(see dtools.txt for its version).
// Don't edit it manually!

#define REG_MST_FLT_AON_CP_BASE (0x51303000)

typedef volatile struct
{
    uint32_t mst_filter_id0;         // 0x00000000
    uint32_t mst_filter_id1;         // 0x00000004
    uint32_t mst_filter_id2;         // 0x00000008
    uint32_t mst_filter_id3;         // 0x0000000c
    uint32_t mst_filter_id4;         // 0x00000010
    uint32_t mst_filter_id5;         // 0x00000014
    uint32_t mst_filter_id6;         // 0x00000018
    uint32_t mst_filter_id7;         // 0x0000001c
    uint32_t mst_filter_int_en;      // 0x00000020
    uint32_t mst_filter_int_raw0;    // 0x00000024
    uint32_t mst_filter_int_status0; // 0x00000028
    uint32_t mst_filter_int_clr;     // 0x0000002c
    uint32_t mst_filter_debug_reg0;  // 0x00000030
    uint32_t mst_filter_debug_reg2;  // 0x00000034
    uint32_t mst_filter_resp;        // 0x00000038
} HWP_MST_FLT_AON_CP_T;

#define hwp_mstFltAonCp ((HWP_MST_FLT_AON_CP_T *)REG_ACCESS_ADDRESS(REG_MST_FLT_AON_CP_BASE))

// mst_filter_int_en
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mst_filter_int_en : 1; // [0]
        uint32_t __31_1 : 31;           // [31:1]
    } b;
} REG_MST_FLT_AON_CP_MST_FILTER_INT_EN_T;

// mst_filter_int_raw0
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mst_filter_int_raw0 : 1; // [0], read only
        uint32_t __31_1 : 31;             // [31:1]
    } b;
} REG_MST_FLT_AON_CP_MST_FILTER_INT_RAW0_T;

// mst_filter_int_status0
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mst_filter_int_status0 : 1; // [0], read only
        uint32_t __31_1 : 31;                // [31:1]
    } b;
} REG_MST_FLT_AON_CP_MST_FILTER_INT_STATUS0_T;

// mst_filter_int_clr
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mst_filter_int_clr : 1; // [0], write clear
        uint32_t __31_1 : 31;            // [31:1]
    } b;
} REG_MST_FLT_AON_CP_MST_FILTER_INT_CLR_T;

// mst_filter_debug_reg2
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mst_filter_debug_hauser : 8; // [7:0], read only
        uint32_t mst_filter_debug_hwrite : 1; // [8], read only
        uint32_t __31_9 : 23;                 // [31:9]
    } b;
} REG_MST_FLT_AON_CP_MST_FILTER_DEBUG_REG2_T;

// mst_filter_resp
typedef union {
    uint32_t v;
    struct
    {
        uint32_t mst_filter_resp_en : 1; // [0]
        uint32_t __31_1 : 31;            // [31:1]
    } b;
} REG_MST_FLT_AON_CP_MST_FILTER_RESP_T;

// mst_filter_int_en
#define MST_FLT_AON_CP_MST_FILTER_INT_EN (1 << 0)

// mst_filter_int_raw0
#define MST_FLT_AON_CP_MST_FILTER_INT_RAW0 (1 << 0)

// mst_filter_int_status0
#define MST_FLT_AON_CP_MST_FILTER_INT_STATUS0 (1 << 0)

// mst_filter_int_clr
#define MST_FLT_AON_CP_MST_FILTER_INT_CLR (1 << 0)

// mst_filter_debug_reg2
#define MST_FLT_AON_CP_MST_FILTER_DEBUG_HAUSER(n) (((n)&0xff) << 0)
#define MST_FLT_AON_CP_MST_FILTER_DEBUG_HWRITE (1 << 8)

// mst_filter_resp
#define MST_FLT_AON_CP_MST_FILTER_RESP_EN (1 << 0)

#endif // _MST_FLT_AON_CP_H_