/* Copyright (C) 2018 RDA Technologies Limited and/or its affiliates("RDA"). * All rights reserved. * * This software is supplied "AS IS" without any warranties. * RDA assumes no responsibility or liability for the use of the software, * conveys no license or title under any patent, copyright, or mask work * right to the product. RDA reserves the right to make changes in the * software without notification. RDA also make no representation or * warranty that such application will be suitable for the specified use * without further testing or modification. */ #ifndef _PMIC_EFUSE_H_ #define _PMIC_EFUSE_H_ // Auto generated by dtools(see dtools.txt for its version). // Don't edit it manually! #define REG_PMIC_EFUSE_BASE (0x51108200) typedef volatile struct { uint32_t efuse_glb_ctrl; // 0x00000000 uint32_t efuse_data_rd; // 0x00000004 uint32_t efuse_data_wr; // 0x00000008 uint32_t efuse_addr_index; // 0x0000000c uint32_t efuse_mode_ctrl; // 0x00000010 uint32_t efuse_status; // 0x00000014 uint32_t efuse_magic_number; // 0x00000018 uint32_t efuse_margin_magic_number; // 0x0000001c uint32_t efuse_wr_timing_ctrl; // 0x00000020 uint32_t efuse_rd_timing_ctrl; // 0x00000024 uint32_t efuse_version; // 0x00000028 uint32_t __44[5]; // 0x0000002c uint32_t efuse_por_blk00; // 0x00000040 uint32_t efuse_por_blk01; // 0x00000044 uint32_t efuse_por_blk02; // 0x00000048 uint32_t efuse_por_blk03; // 0x0000004c uint32_t efuse_por_blk04; // 0x00000050 uint32_t efuse_por_blk05; // 0x00000054 uint32_t efuse_por_blk06; // 0x00000058 uint32_t efuse_por_blk07; // 0x0000005c uint32_t efuse_por_blk08; // 0x00000060 uint32_t efuse_por_blk09; // 0x00000064 uint32_t efuse_por_blk10; // 0x00000068 uint32_t efuse_por_blk11; // 0x0000006c uint32_t efuse_por_blk12; // 0x00000070 uint32_t efuse_por_blk13; // 0x00000074 uint32_t efuse_por_blk14; // 0x00000078 uint32_t efuse_por_blk15; // 0x0000007c uint32_t efuse_por_blk16; // 0x00000080 uint32_t efuse_por_blk17; // 0x00000084 uint32_t efuse_por_blk18; // 0x00000088 uint32_t efuse_por_blk19; // 0x0000008c uint32_t efuse_por_blk20; // 0x00000090 uint32_t efuse_por_blk21; // 0x00000094 uint32_t efuse_por_blk22; // 0x00000098 uint32_t efuse_por_blk23; // 0x0000009c uint32_t efuse_por_blk24; // 0x000000a0 uint32_t efuse_por_blk25; // 0x000000a4 uint32_t efuse_por_blk26; // 0x000000a8 uint32_t efuse_por_blk27; // 0x000000ac uint32_t efuse_por_blk28; // 0x000000b0 uint32_t efuse_por_blk29; // 0x000000b4 uint32_t efuse_por_blk30; // 0x000000b8 uint32_t efuse_por_blk31; // 0x000000bc uint32_t efuse_por_blk32; // 0x000000c0 uint32_t efuse_por_blk33; // 0x000000c4 uint32_t efuse_por_blk34; // 0x000000c8 uint32_t efuse_por_blk35; // 0x000000cc uint32_t efuse_por_blk36; // 0x000000d0 uint32_t efuse_por_blk37; // 0x000000d4 uint32_t efuse_por_blk38; // 0x000000d8 uint32_t efuse_por_blk39; // 0x000000dc uint32_t efuse_por_blk40; // 0x000000e0 uint32_t efuse_por_blk41; // 0x000000e4 uint32_t efuse_por_blk42; // 0x000000e8 uint32_t efuse_por_blk43; // 0x000000ec uint32_t efuse_por_blk44; // 0x000000f0 uint32_t efuse_por_blk45; // 0x000000f4 uint32_t efuse_por_blk46; // 0x000000f8 uint32_t efuse_por_blk47; // 0x000000fc uint32_t efuse_por_blk48; // 0x00000100 uint32_t efuse_por_blk49; // 0x00000104 uint32_t efuse_por_blk50; // 0x00000108 uint32_t efuse_por_blk51; // 0x0000010c uint32_t efuse_por_blk52; // 0x00000110 uint32_t efuse_por_blk53; // 0x00000114 uint32_t efuse_por_blk54; // 0x00000118 uint32_t efuse_por_blk55; // 0x0000011c uint32_t efuse_por_blk56; // 0x00000120 uint32_t efuse_por_blk57; // 0x00000124 uint32_t efuse_por_blk58; // 0x00000128 uint32_t efuse_por_blk59; // 0x0000012c uint32_t efuse_por_blk60; // 0x00000130 uint32_t efuse_por_blk61; // 0x00000134 uint32_t efuse_por_blk62; // 0x00000138 uint32_t efuse_por_blk63; // 0x0000013c } HWP_PMIC_EFUSE_T; #define hwp_pmicEfuse ((HWP_PMIC_EFUSE_T *)REG_ACCESS_ADDRESS(REG_PMIC_EFUSE_BASE)) // efuse_glb_ctrl typedef union { uint32_t v; struct { uint32_t efuse_pgm_en : 1; // [0] uint32_t efuse_type : 2; // [2:1] uint32_t efuse_clk_gate : 1; // [3] uint32_t __31_4 : 28; // [31:4] } b; } REG_PMIC_EFUSE_EFUSE_GLB_CTRL_T; // efuse_data_rd typedef union { uint32_t v; struct { uint32_t efuse_data_rd : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_DATA_RD_T; // efuse_data_wr typedef union { uint32_t v; struct { uint32_t efuse_data_wr : 16; // [15:0] uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_DATA_WR_T; // efuse_addr_index typedef union { uint32_t v; struct { uint32_t read_write_index : 6; // [5:0] uint32_t __31_6 : 26; // [31:6] } b; } REG_PMIC_EFUSE_EFUSE_ADDR_INDEX_T; // efuse_mode_ctrl typedef union { uint32_t v; struct { uint32_t efuse_pg_start : 1; // [0] uint32_t efuse_rd_start : 1; // [1] uint32_t efuse_normal_rd_flag_clr : 1; // [2] uint32_t __31_3 : 29; // [31:3] } b; } REG_PMIC_EFUSE_EFUSE_MODE_CTRL_T; // efuse_status typedef union { uint32_t v; struct { uint32_t pgm_busy : 1; // [0], read only uint32_t read_busy : 1; // [1], read only uint32_t standby_busy : 1; // [2], read only uint32_t efuse_global_prot : 1; // [3], read only uint32_t efuse_normal_rd_done : 1; // [4], read only uint32_t __31_5 : 27; // [31:5] } b; } REG_PMIC_EFUSE_EFUSE_STATUS_T; // efuse_magic_number typedef union { uint32_t v; struct { uint32_t efuse_magic_number : 16; // [15:0] uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_MAGIC_NUMBER_T; // efuse_margin_magic_number typedef union { uint32_t v; struct { uint32_t efuse_margin_magic_number : 16; // [15:0] uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_MARGIN_MAGIC_NUMBER_T; // efuse_wr_timing_ctrl typedef union { uint32_t v; struct { uint32_t efuse_wr_timing_ctrl : 16; // [15:0] uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_WR_TIMING_CTRL_T; // efuse_rd_timing_ctrl typedef union { uint32_t v; struct { uint32_t efuse_rd_timing_ctrl : 16; // [15:0] uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_RD_TIMING_CTRL_T; // efuse_version typedef union { uint32_t v; struct { uint32_t efuse_version : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_VERSION_T; // efuse_por_blk00 typedef union { uint32_t v; struct { uint32_t efuse_por_blk00 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK00_T; // efuse_por_blk01 typedef union { uint32_t v; struct { uint32_t efuse_por_blk01 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK01_T; // efuse_por_blk02 typedef union { uint32_t v; struct { uint32_t efuse_por_blk02 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK02_T; // efuse_por_blk03 typedef union { uint32_t v; struct { uint32_t efuse_por_blk03 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK03_T; // efuse_por_blk04 typedef union { uint32_t v; struct { uint32_t efuse_por_blk04 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK04_T; // efuse_por_blk05 typedef union { uint32_t v; struct { uint32_t efuse_por_blk05 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK05_T; // efuse_por_blk06 typedef union { uint32_t v; struct { uint32_t efuse_por_blk06 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK06_T; // efuse_por_blk07 typedef union { uint32_t v; struct { uint32_t efuse_por_blk07 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK07_T; // efuse_por_blk08 typedef union { uint32_t v; struct { uint32_t efuse_por_blk08 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK08_T; // efuse_por_blk09 typedef union { uint32_t v; struct { uint32_t efuse_por_blk09 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK09_T; // efuse_por_blk10 typedef union { uint32_t v; struct { uint32_t efuse_por_blk10 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK10_T; // efuse_por_blk11 typedef union { uint32_t v; struct { uint32_t efuse_por_blk11 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK11_T; // efuse_por_blk12 typedef union { uint32_t v; struct { uint32_t efuse_por_blk12 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK12_T; // efuse_por_blk13 typedef union { uint32_t v; struct { uint32_t efuse_por_blk13 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK13_T; // efuse_por_blk14 typedef union { uint32_t v; struct { uint32_t efuse_por_blk14 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK14_T; // efuse_por_blk15 typedef union { uint32_t v; struct { uint32_t efuse_por_blk15 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK15_T; // efuse_por_blk16 typedef union { uint32_t v; struct { uint32_t efuse_por_blk16 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK16_T; // efuse_por_blk17 typedef union { uint32_t v; struct { uint32_t efuse_por_blk17 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK17_T; // efuse_por_blk18 typedef union { uint32_t v; struct { uint32_t efuse_por_blk18 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK18_T; // efuse_por_blk19 typedef union { uint32_t v; struct { uint32_t efuse_por_blk19 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK19_T; // efuse_por_blk20 typedef union { uint32_t v; struct { uint32_t efuse_por_blk20 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK20_T; // efuse_por_blk21 typedef union { uint32_t v; struct { uint32_t efuse_por_blk21 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK21_T; // efuse_por_blk22 typedef union { uint32_t v; struct { uint32_t efuse_por_blk22 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK22_T; // efuse_por_blk23 typedef union { uint32_t v; struct { uint32_t efuse_por_blk23 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK23_T; // efuse_por_blk24 typedef union { uint32_t v; struct { uint32_t efuse_por_blk24 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK24_T; // efuse_por_blk25 typedef union { uint32_t v; struct { uint32_t efuse_por_blk25 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK25_T; // efuse_por_blk26 typedef union { uint32_t v; struct { uint32_t efuse_por_blk26 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK26_T; // efuse_por_blk27 typedef union { uint32_t v; struct { uint32_t efuse_por_blk27 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK27_T; // efuse_por_blk28 typedef union { uint32_t v; struct { uint32_t efuse_por_blk28 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK28_T; // efuse_por_blk29 typedef union { uint32_t v; struct { uint32_t efuse_por_blk29 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK29_T; // efuse_por_blk30 typedef union { uint32_t v; struct { uint32_t efuse_por_blk30 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK30_T; // efuse_por_blk31 typedef union { uint32_t v; struct { uint32_t efuse_por_blk31 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK31_T; // efuse_por_blk32 typedef union { uint32_t v; struct { uint32_t efuse_por_blk32 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK32_T; // efuse_por_blk33 typedef union { uint32_t v; struct { uint32_t efuse_por_blk33 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK33_T; // efuse_por_blk34 typedef union { uint32_t v; struct { uint32_t efuse_por_blk34 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK34_T; // efuse_por_blk35 typedef union { uint32_t v; struct { uint32_t efuse_por_blk35 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK35_T; // efuse_por_blk36 typedef union { uint32_t v; struct { uint32_t efuse_por_blk36 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK36_T; // efuse_por_blk37 typedef union { uint32_t v; struct { uint32_t efuse_por_blk37 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK37_T; // efuse_por_blk38 typedef union { uint32_t v; struct { uint32_t efuse_por_blk38 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK38_T; // efuse_por_blk39 typedef union { uint32_t v; struct { uint32_t efuse_por_blk39 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK39_T; // efuse_por_blk40 typedef union { uint32_t v; struct { uint32_t efuse_por_blk40 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK40_T; // efuse_por_blk41 typedef union { uint32_t v; struct { uint32_t efuse_por_blk41 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK41_T; // efuse_por_blk42 typedef union { uint32_t v; struct { uint32_t efuse_por_blk42 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK42_T; // efuse_por_blk43 typedef union { uint32_t v; struct { uint32_t efuse_por_blk43 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK43_T; // efuse_por_blk44 typedef union { uint32_t v; struct { uint32_t efuse_por_blk44 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK44_T; // efuse_por_blk45 typedef union { uint32_t v; struct { uint32_t efuse_por_blk45 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK45_T; // efuse_por_blk46 typedef union { uint32_t v; struct { uint32_t efuse_por_blk46 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK46_T; // efuse_por_blk47 typedef union { uint32_t v; struct { uint32_t efuse_por_blk47 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK47_T; // efuse_por_blk48 typedef union { uint32_t v; struct { uint32_t efuse_por_blk48 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK48_T; // efuse_por_blk49 typedef union { uint32_t v; struct { uint32_t efuse_por_blk49 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK49_T; // efuse_por_blk50 typedef union { uint32_t v; struct { uint32_t efuse_por_blk50 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK50_T; // efuse_por_blk51 typedef union { uint32_t v; struct { uint32_t efuse_por_blk51 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK51_T; // efuse_por_blk52 typedef union { uint32_t v; struct { uint32_t efuse_por_blk52 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK52_T; // efuse_por_blk53 typedef union { uint32_t v; struct { uint32_t efuse_por_blk53 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK53_T; // efuse_por_blk54 typedef union { uint32_t v; struct { uint32_t efuse_por_blk54 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK54_T; // efuse_por_blk55 typedef union { uint32_t v; struct { uint32_t efuse_por_blk55 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK55_T; // efuse_por_blk56 typedef union { uint32_t v; struct { uint32_t efuse_por_blk56 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK56_T; // efuse_por_blk57 typedef union { uint32_t v; struct { uint32_t efuse_por_blk57 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK57_T; // efuse_por_blk58 typedef union { uint32_t v; struct { uint32_t efuse_por_blk58 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK58_T; // efuse_por_blk59 typedef union { uint32_t v; struct { uint32_t efuse_por_blk59 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK59_T; // efuse_por_blk60 typedef union { uint32_t v; struct { uint32_t efuse_por_blk60 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK60_T; // efuse_por_blk61 typedef union { uint32_t v; struct { uint32_t efuse_por_blk61 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK61_T; // efuse_por_blk62 typedef union { uint32_t v; struct { uint32_t efuse_por_blk62 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK62_T; // efuse_por_blk63 typedef union { uint32_t v; struct { uint32_t efuse_por_blk63 : 16; // [15:0], read only uint32_t __31_16 : 16; // [31:16] } b; } REG_PMIC_EFUSE_EFUSE_POR_BLK63_T; // efuse_glb_ctrl #define PMIC_EFUSE_EFUSE_PGM_EN (1 << 0) #define PMIC_EFUSE_EFUSE_TYPE(n) (((n)&0x3) << 1) #define PMIC_EFUSE_EFUSE_CLK_GATE (1 << 3) // efuse_data_rd #define PMIC_EFUSE_EFUSE_DATA_RD(n) (((n)&0xffff) << 0) // efuse_data_wr #define PMIC_EFUSE_EFUSE_DATA_WR(n) (((n)&0xffff) << 0) // efuse_addr_index #define PMIC_EFUSE_READ_WRITE_INDEX(n) (((n)&0x3f) << 0) // efuse_mode_ctrl #define PMIC_EFUSE_EFUSE_PG_START (1 << 0) #define PMIC_EFUSE_EFUSE_RD_START (1 << 1) #define PMIC_EFUSE_EFUSE_NORMAL_RD_FLAG_CLR (1 << 2) // efuse_status #define PMIC_EFUSE_PGM_BUSY (1 << 0) #define PMIC_EFUSE_READ_BUSY (1 << 1) #define PMIC_EFUSE_STANDBY_BUSY (1 << 2) #define PMIC_EFUSE_EFUSE_GLOBAL_PROT (1 << 3) #define PMIC_EFUSE_EFUSE_NORMAL_RD_DONE (1 << 4) // efuse_magic_number #define PMIC_EFUSE_EFUSE_MAGIC_NUMBER(n) (((n)&0xffff) << 0) // efuse_margin_magic_number #define PMIC_EFUSE_EFUSE_MARGIN_MAGIC_NUMBER(n) (((n)&0xffff) << 0) // efuse_wr_timing_ctrl #define PMIC_EFUSE_EFUSE_WR_TIMING_CTRL(n) (((n)&0xffff) << 0) // efuse_rd_timing_ctrl #define PMIC_EFUSE_EFUSE_RD_TIMING_CTRL(n) (((n)&0xffff) << 0) // efuse_version #define PMIC_EFUSE_EFUSE_VERSION(n) (((n)&0xffff) << 0) // efuse_por_blk00 #define PMIC_EFUSE_EFUSE_POR_BLK00(n) (((n)&0xffff) << 0) // efuse_por_blk01 #define PMIC_EFUSE_EFUSE_POR_BLK01(n) (((n)&0xffff) << 0) // efuse_por_blk02 #define PMIC_EFUSE_EFUSE_POR_BLK02(n) (((n)&0xffff) << 0) // efuse_por_blk03 #define PMIC_EFUSE_EFUSE_POR_BLK03(n) (((n)&0xffff) << 0) // efuse_por_blk04 #define PMIC_EFUSE_EFUSE_POR_BLK04(n) (((n)&0xffff) << 0) // efuse_por_blk05 #define PMIC_EFUSE_EFUSE_POR_BLK05(n) (((n)&0xffff) << 0) // efuse_por_blk06 #define PMIC_EFUSE_EFUSE_POR_BLK06(n) (((n)&0xffff) << 0) // efuse_por_blk07 #define PMIC_EFUSE_EFUSE_POR_BLK07(n) (((n)&0xffff) << 0) // efuse_por_blk08 #define PMIC_EFUSE_EFUSE_POR_BLK08(n) (((n)&0xffff) << 0) // efuse_por_blk09 #define PMIC_EFUSE_EFUSE_POR_BLK09(n) (((n)&0xffff) << 0) // efuse_por_blk10 #define PMIC_EFUSE_EFUSE_POR_BLK10(n) (((n)&0xffff) << 0) // efuse_por_blk11 #define PMIC_EFUSE_EFUSE_POR_BLK11(n) (((n)&0xffff) << 0) // efuse_por_blk12 #define PMIC_EFUSE_EFUSE_POR_BLK12(n) (((n)&0xffff) << 0) // efuse_por_blk13 #define PMIC_EFUSE_EFUSE_POR_BLK13(n) (((n)&0xffff) << 0) // efuse_por_blk14 #define PMIC_EFUSE_EFUSE_POR_BLK14(n) (((n)&0xffff) << 0) // efuse_por_blk15 #define PMIC_EFUSE_EFUSE_POR_BLK15(n) (((n)&0xffff) << 0) // efuse_por_blk16 #define PMIC_EFUSE_EFUSE_POR_BLK16(n) (((n)&0xffff) << 0) // efuse_por_blk17 #define PMIC_EFUSE_EFUSE_POR_BLK17(n) (((n)&0xffff) << 0) // efuse_por_blk18 #define PMIC_EFUSE_EFUSE_POR_BLK18(n) (((n)&0xffff) << 0) // efuse_por_blk19 #define PMIC_EFUSE_EFUSE_POR_BLK19(n) (((n)&0xffff) << 0) // efuse_por_blk20 #define PMIC_EFUSE_EFUSE_POR_BLK20(n) (((n)&0xffff) << 0) // efuse_por_blk21 #define PMIC_EFUSE_EFUSE_POR_BLK21(n) (((n)&0xffff) << 0) // efuse_por_blk22 #define PMIC_EFUSE_EFUSE_POR_BLK22(n) (((n)&0xffff) << 0) // efuse_por_blk23 #define PMIC_EFUSE_EFUSE_POR_BLK23(n) (((n)&0xffff) << 0) // efuse_por_blk24 #define PMIC_EFUSE_EFUSE_POR_BLK24(n) (((n)&0xffff) << 0) // efuse_por_blk25 #define PMIC_EFUSE_EFUSE_POR_BLK25(n) (((n)&0xffff) << 0) // efuse_por_blk26 #define PMIC_EFUSE_EFUSE_POR_BLK26(n) (((n)&0xffff) << 0) // efuse_por_blk27 #define PMIC_EFUSE_EFUSE_POR_BLK27(n) (((n)&0xffff) << 0) // efuse_por_blk28 #define PMIC_EFUSE_EFUSE_POR_BLK28(n) (((n)&0xffff) << 0) // efuse_por_blk29 #define PMIC_EFUSE_EFUSE_POR_BLK29(n) (((n)&0xffff) << 0) // efuse_por_blk30 #define PMIC_EFUSE_EFUSE_POR_BLK30(n) (((n)&0xffff) << 0) // efuse_por_blk31 #define PMIC_EFUSE_EFUSE_POR_BLK31(n) (((n)&0xffff) << 0) // efuse_por_blk32 #define PMIC_EFUSE_EFUSE_POR_BLK32(n) (((n)&0xffff) << 0) // efuse_por_blk33 #define PMIC_EFUSE_EFUSE_POR_BLK33(n) (((n)&0xffff) << 0) // efuse_por_blk34 #define PMIC_EFUSE_EFUSE_POR_BLK34(n) (((n)&0xffff) << 0) // efuse_por_blk35 #define PMIC_EFUSE_EFUSE_POR_BLK35(n) (((n)&0xffff) << 0) // efuse_por_blk36 #define PMIC_EFUSE_EFUSE_POR_BLK36(n) (((n)&0xffff) << 0) // efuse_por_blk37 #define PMIC_EFUSE_EFUSE_POR_BLK37(n) (((n)&0xffff) << 0) // efuse_por_blk38 #define PMIC_EFUSE_EFUSE_POR_BLK38(n) (((n)&0xffff) << 0) // efuse_por_blk39 #define PMIC_EFUSE_EFUSE_POR_BLK39(n) (((n)&0xffff) << 0) // efuse_por_blk40 #define PMIC_EFUSE_EFUSE_POR_BLK40(n) (((n)&0xffff) << 0) // efuse_por_blk41 #define PMIC_EFUSE_EFUSE_POR_BLK41(n) (((n)&0xffff) << 0) // efuse_por_blk42 #define PMIC_EFUSE_EFUSE_POR_BLK42(n) (((n)&0xffff) << 0) // efuse_por_blk43 #define PMIC_EFUSE_EFUSE_POR_BLK43(n) (((n)&0xffff) << 0) // efuse_por_blk44 #define PMIC_EFUSE_EFUSE_POR_BLK44(n) (((n)&0xffff) << 0) // efuse_por_blk45 #define PMIC_EFUSE_EFUSE_POR_BLK45(n) (((n)&0xffff) << 0) // efuse_por_blk46 #define PMIC_EFUSE_EFUSE_POR_BLK46(n) (((n)&0xffff) << 0) // efuse_por_blk47 #define PMIC_EFUSE_EFUSE_POR_BLK47(n) (((n)&0xffff) << 0) // efuse_por_blk48 #define PMIC_EFUSE_EFUSE_POR_BLK48(n) (((n)&0xffff) << 0) // efuse_por_blk49 #define PMIC_EFUSE_EFUSE_POR_BLK49(n) (((n)&0xffff) << 0) // efuse_por_blk50 #define PMIC_EFUSE_EFUSE_POR_BLK50(n) (((n)&0xffff) << 0) // efuse_por_blk51 #define PMIC_EFUSE_EFUSE_POR_BLK51(n) (((n)&0xffff) << 0) // efuse_por_blk52 #define PMIC_EFUSE_EFUSE_POR_BLK52(n) (((n)&0xffff) << 0) // efuse_por_blk53 #define PMIC_EFUSE_EFUSE_POR_BLK53(n) (((n)&0xffff) << 0) // efuse_por_blk54 #define PMIC_EFUSE_EFUSE_POR_BLK54(n) (((n)&0xffff) << 0) // efuse_por_blk55 #define PMIC_EFUSE_EFUSE_POR_BLK55(n) (((n)&0xffff) << 0) // efuse_por_blk56 #define PMIC_EFUSE_EFUSE_POR_BLK56(n) (((n)&0xffff) << 0) // efuse_por_blk57 #define PMIC_EFUSE_EFUSE_POR_BLK57(n) (((n)&0xffff) << 0) // efuse_por_blk58 #define PMIC_EFUSE_EFUSE_POR_BLK58(n) (((n)&0xffff) << 0) // efuse_por_blk59 #define PMIC_EFUSE_EFUSE_POR_BLK59(n) (((n)&0xffff) << 0) // efuse_por_blk60 #define PMIC_EFUSE_EFUSE_POR_BLK60(n) (((n)&0xffff) << 0) // efuse_por_blk61 #define PMIC_EFUSE_EFUSE_POR_BLK61(n) (((n)&0xffff) << 0) // efuse_por_blk62 #define PMIC_EFUSE_EFUSE_POR_BLK62(n) (((n)&0xffff) << 0) // efuse_por_blk63 #define PMIC_EFUSE_EFUSE_POR_BLK63(n) (((n)&0xffff) << 0) #endif // _PMIC_EFUSE_H_