measpwr.h 138 KB

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  1. /* Copyright (C) 2018 RDA Technologies Limited and/or its affiliates("RDA").
  2. * All rights reserved.
  3. *
  4. * This software is supplied "AS IS" without any warranties.
  5. * RDA assumes no responsibility or liability for the use of the software,
  6. * conveys no license or title under any patent, copyright, or mask work
  7. * right to the product. RDA reserves the right to make changes in the
  8. * software without notification. RDA also make no representation or
  9. * warranty that such application will be suitable for the specified use
  10. * without further testing or modification.
  11. */
  12. #ifndef _MEASPWR_H_
  13. #define _MEASPWR_H_
  14. // Auto generated by dtools(see dtools.txt for its version).
  15. // Don't edit it manually!
  16. #define REG_MEASPWR_BASE (0x18500000)
  17. typedef volatile struct
  18. {
  19. uint32_t measpwr_rxdata_ctrl1; // 0x00000000
  20. uint32_t measpwr_rxdata_ctrl2; // 0x00000004
  21. uint32_t measpwr_rxdata_val_ctrl; // 0x00000008
  22. uint32_t measpwr_rxdata_offset3_id1; // 0x0000000c
  23. uint32_t measpwr_rxdata_offset3_id2; // 0x00000010
  24. uint32_t measpwr_rxdata_offset3_id3; // 0x00000014
  25. uint32_t measpwr_rxdata_offset3_id4; // 0x00000018
  26. uint32_t measpwr_rxdata_offset3_id5; // 0x0000001c
  27. uint32_t measpwr_rxdata_offset3_id6; // 0x00000020
  28. uint32_t measpwr_rxdata_offset3_id7; // 0x00000024
  29. uint32_t measpwr_rxdata_offset3_id8; // 0x00000028
  30. uint32_t measpwr_nb_offset4; // 0x0000002c
  31. uint32_t measpwr_total_subf; // 0x00000030
  32. uint32_t measpwr_ifft_para; // 0x00000034
  33. uint32_t measpwr_ifft_gate; // 0x00000038
  34. uint32_t measpwr_int_en; // 0x0000003c
  35. uint32_t measpwr_int_sta; // 0x00000040
  36. uint32_t measpwr_id1_id2_func_ctrl; // 0x00000044
  37. uint32_t measpwr_id3_id8_func_ctrl; // 0x00000048
  38. uint32_t measpwr_agc_compare; // 0x0000004c
  39. uint32_t measpwr_nb_para; // 0x00000050
  40. uint32_t measpwr_band_para; // 0x00000054
  41. uint32_t __88[1]; // 0x00000058
  42. uint32_t measpwr_afc_para; // 0x0000005c
  43. uint32_t measpwr_afc_soft_reect1; // 0x00000060
  44. uint32_t measpwr_sigpwr_para; // 0x00000064
  45. uint32_t measpwr_sigma_para; // 0x00000068
  46. uint32_t measpwr_doppler_para; // 0x0000006c
  47. uint32_t measpwr_trms_para1; // 0x00000070
  48. uint32_t measpwr_trms_para2; // 0x00000074
  49. uint32_t measpwr_rsrp_para1; // 0x00000078
  50. uint32_t measpwr_rsrp_para2; // 0x0000007c
  51. uint32_t measpwr_rsrp_para3; // 0x00000080
  52. uint32_t measpwr_rsrp_para4; // 0x00000084
  53. uint32_t measpwr_irt_para1; // 0x00000088
  54. uint32_t measpwr_irt_para2; // 0x0000008c
  55. uint32_t measpwr__irt_scale_th1; // 0x00000090
  56. uint32_t measpwr__irt_scale_th2; // 0x00000094
  57. uint32_t measpwr__irt_scale_th4; // 0x00000098
  58. uint32_t measpwr__irt_scale_th8; // 0x0000009c
  59. uint32_t measpwr__irt_scale_th16; // 0x000000a0
  60. uint32_t measpwr__irt_scale_th32; // 0x000000a4
  61. uint32_t measpwr__irt_scale_th64; // 0x000000a8
  62. uint32_t measpwr__irt_scale_th128; // 0x000000ac
  63. uint32_t measpwr__irt_scale_th256; // 0x000000b0
  64. uint32_t measpwr__irt_scale_th512; // 0x000000b4
  65. uint32_t measpwr_rssi_para; // 0x000000b8
  66. uint32_t measpwr_agc; // 0x000000bc
  67. uint32_t measpwr_id1_para1; // 0x000000c0
  68. uint32_t measpwr_id1_para2; // 0x000000c4
  69. uint32_t measpwr_id2_para1; // 0x000000c8
  70. uint32_t measpwr_id2_para2; // 0x000000cc
  71. uint32_t measpwr_id3_para1; // 0x000000d0
  72. uint32_t measpwr_id4_para1; // 0x000000d4
  73. uint32_t measpwr_id5_para1; // 0x000000d8
  74. uint32_t measpwr_id6_para1; // 0x000000dc
  75. uint32_t measpwr_id7_para1; // 0x000000e0
  76. uint32_t measpwr_id8_para1; // 0x000000e4
  77. uint32_t measpwr_id_para; // 0x000000e8
  78. uint32_t measpwr_id_ctrl; // 0x000000ec
  79. uint32_t measpwr_ctrl; // 0x000000f0
  80. uint32_t measpwr_afc1_out; // 0x000000f4
  81. uint32_t measpwr_afc2_out; // 0x000000f8
  82. uint32_t measpwr_afc3_out; // 0x000000fc
  83. uint32_t measpwr_afc4_out; // 0x00000100
  84. uint32_t measpwr_afc5_out; // 0x00000104
  85. uint32_t measpwr_afc1_rsrp; // 0x00000108
  86. uint32_t measpwr_afc2_rsrp; // 0x0000010c
  87. uint32_t measpwr_afc3_rsrp; // 0x00000110
  88. uint32_t measpwr_afc4_rsrp; // 0x00000114
  89. uint32_t measpwr_afc5_rsrp; // 0x00000118
  90. uint32_t measpwr_sigpwr1_out1; // 0x0000011c
  91. uint32_t measpwr_sigpwr1_out2; // 0x00000120
  92. uint32_t measpwr_sigpwr1_out3; // 0x00000124
  93. uint32_t measpwr_sigpwr1_out4; // 0x00000128
  94. uint32_t measpwr_sigpwr1_out5; // 0x0000012c
  95. uint32_t measpwr_sigpwr1_out6; // 0x00000130
  96. uint32_t measpwr_sigpwr2__out; // 0x00000134
  97. uint32_t measpwr_sigpwr3__out; // 0x00000138
  98. uint32_t measpwr_sigpwr4_out4; // 0x0000013c
  99. uint32_t measpwr_sigpwr5_out5; // 0x00000140
  100. uint32_t measpwr_sigma1_out1; // 0x00000144
  101. uint32_t measpwr_sigma1_agc_out1; // 0x00000148
  102. uint32_t measpwr_sigma1_out2; // 0x0000014c
  103. uint32_t measpwr_sigma1_agc_out2; // 0x00000150
  104. uint32_t measpwr_sigma1_out3; // 0x00000154
  105. uint32_t measpwr_sigma1_agc_out3; // 0x00000158
  106. uint32_t measpwr_sigma1_out4; // 0x0000015c
  107. uint32_t measpwr_sigma1_agc_out4; // 0x00000160
  108. uint32_t measpwr_sigma1_out5; // 0x00000164
  109. uint32_t measpwr_sigma1_agc_out5; // 0x00000168
  110. uint32_t measpwr_sigma1_out6; // 0x0000016c
  111. uint32_t measpwr_sigma1_agc_out6; // 0x00000170
  112. uint32_t measpwr_sigma2_out; // 0x00000174
  113. uint32_t measpwr_sigma2_agc_out; // 0x00000178
  114. uint32_t measpwr_sigma3_out; // 0x0000017c
  115. uint32_t measpwr_sigma3_agc_out; // 0x00000180
  116. uint32_t measpwr_sigma4_out; // 0x00000184
  117. uint32_t measpwr_sigma4_agc_out; // 0x00000188
  118. uint32_t measpwr_sigma5_out; // 0x0000018c
  119. uint32_t measpwr_sigma5_agc_out; // 0x00000190
  120. uint32_t measpwr_sinr1_out1; // 0x00000194
  121. uint32_t measpwr_sinr1_out2; // 0x00000198
  122. uint32_t measpwr_sinr1_out3; // 0x0000019c
  123. uint32_t measpwr_sinr1_out4; // 0x000001a0
  124. uint32_t measpwr_sinr1_out5; // 0x000001a4
  125. uint32_t measpwr_sinr1_out6; // 0x000001a8
  126. uint32_t measpwr_sinr2_out; // 0x000001ac
  127. uint32_t measpwr_sinr3_out; // 0x000001b0
  128. uint32_t measpwr_sinr4_out; // 0x000001b4
  129. uint32_t measpwr_sinr5_out; // 0x000001b8
  130. uint32_t measpwr__doppler1_out; // 0x000001bc
  131. uint32_t measpwr__doppler2_out; // 0x000001c0
  132. uint32_t measpwr_rsrp1_out; // 0x000001c4
  133. uint32_t measpwr_rsrp1_db; // 0x000001c8
  134. uint32_t measpwr_rsrp1_scale; // 0x000001cc
  135. uint32_t measpwr_rsrp1_scale_db; // 0x000001d0
  136. uint32_t measpwr_rsrq1_db; // 0x000001d4
  137. uint32_t measpwr_rssi1_out; // 0x000001d8
  138. uint32_t measpwr_rssi1_db; // 0x000001dc
  139. uint32_t measpwr_rsrp2_out; // 0x000001e0
  140. uint32_t measpwr_rsrp2_db; // 0x000001e4
  141. uint32_t measpwr_rsrp2_scale; // 0x000001e8
  142. uint32_t measpwr_rsrp2_scale_db; // 0x000001ec
  143. uint32_t measpwr_rsrq2_db; // 0x000001f0
  144. uint32_t measpwr_rssi2_out; // 0x000001f4
  145. uint32_t measpwr_rssi2_db; // 0x000001f8
  146. uint32_t measpwr_rsrp3_out; // 0x000001fc
  147. uint32_t measpwr_rsrp3_db; // 0x00000200
  148. uint32_t measpwr_rsrp3_scale; // 0x00000204
  149. uint32_t measpwr_rsrp3_scale_db; // 0x00000208
  150. uint32_t measpwr_rsrq3_db; // 0x0000020c
  151. uint32_t measpwr_rssi3_out; // 0x00000210
  152. uint32_t measpwr_rssi3_db; // 0x00000214
  153. uint32_t measpwr_rsrp4_out; // 0x00000218
  154. uint32_t measpwr_rsrp4_db; // 0x0000021c
  155. uint32_t measpwr_rsrp4_scale; // 0x00000220
  156. uint32_t measpwr_rsrp4_scale_db; // 0x00000224
  157. uint32_t measpwr_rsrq4_db; // 0x00000228
  158. uint32_t measpwr_rssi4_out; // 0x0000022c
  159. uint32_t measpwr_rssi4_db; // 0x00000230
  160. uint32_t measpwr_rsrp5_out; // 0x00000234
  161. uint32_t measpwr_rsrp5_db; // 0x00000238
  162. uint32_t measpwr_rsrp5_scale; // 0x0000023c
  163. uint32_t measpwr_rsrp5_scale_db; // 0x00000240
  164. uint32_t measpwr_rsrq5_db; // 0x00000244
  165. uint32_t measpwr_rssi5_out; // 0x00000248
  166. uint32_t measpwr_rssi5_db; // 0x0000024c
  167. uint32_t measpwr_rsrp6_out; // 0x00000250
  168. uint32_t measpwr_rsrp6_db; // 0x00000254
  169. uint32_t measpwr_rsrp6_scale; // 0x00000258
  170. uint32_t measpwr_rsrp6_scale_db; // 0x0000025c
  171. uint32_t measpwr_rsrq6_db; // 0x00000260
  172. uint32_t measpwr_rssi6_out; // 0x00000264
  173. uint32_t measpwr_rssi6_db; // 0x00000268
  174. uint32_t measpwr_rsrp7_out; // 0x0000026c
  175. uint32_t measpwr_rsrp7_db; // 0x00000270
  176. uint32_t measpwr_rsrp7_scale; // 0x00000274
  177. uint32_t measpwr_rsrp7_scale_db; // 0x00000278
  178. uint32_t measpwr_rsrq7_db; // 0x0000027c
  179. uint32_t measpwr_rssi7_out; // 0x00000280
  180. uint32_t measpwr_rssi7_db; // 0x00000284
  181. uint32_t measpwr_rsrp8_out; // 0x00000288
  182. uint32_t measpwr_rsrp8_db; // 0x0000028c
  183. uint32_t measpwr_rsrp8_scale; // 0x00000290
  184. uint32_t measpwr_rsrp8_scale_db; // 0x00000294
  185. uint32_t measpwr_rsrq8_db; // 0x00000298
  186. uint32_t measpwr_rssi8_out; // 0x0000029c
  187. uint32_t measpwr_rssi8_db; // 0x000002a0
  188. uint32_t measpwr_irt1_delay; // 0x000002a4
  189. uint32_t measpwr__irt1outflag; // 0x000002a8
  190. uint32_t measpwr_irt1_scale; // 0x000002ac
  191. uint32_t measpwr_irt2_delay; // 0x000002b0
  192. uint32_t measpwr__irt2outflag; // 0x000002b4
  193. uint32_t measpwr_irt2_scale; // 0x000002b8
  194. uint32_t measpwr_irt3_delay; // 0x000002bc
  195. uint32_t measpwr__irt3outflag; // 0x000002c0
  196. uint32_t measpwr_irt3_scale; // 0x000002c4
  197. uint32_t measpwr_irt4_delay; // 0x000002c8
  198. uint32_t measpwr__irt4outflag; // 0x000002cc
  199. uint32_t measpwr_irt4_scale; // 0x000002d0
  200. uint32_t measpwr_irt5_delay; // 0x000002d4
  201. uint32_t measpwr__irt5outflag; // 0x000002d8
  202. uint32_t measpwr_irt5_scale; // 0x000002dc
  203. uint32_t measpwr_irt6_delay; // 0x000002e0
  204. uint32_t measpwr__irt6outflag; // 0x000002e4
  205. uint32_t measpwr_irt6_scale; // 0x000002e8
  206. uint32_t measpwr_irt7_delay; // 0x000002ec
  207. uint32_t measpwr__irt7outflag; // 0x000002f0
  208. uint32_t measpwr_irt7_scale; // 0x000002f4
  209. uint32_t measpwr_irt8_delay; // 0x000002f8
  210. uint32_t measpwr__irt8outflag; // 0x000002fc
  211. uint32_t measpwr_irt8_scale; // 0x00000300
  212. uint32_t measpwr_trms1_out; // 0x00000304
  213. uint32_t measpwr_trms2_out; // 0x00000308
  214. uint32_t measpwr_id_info; // 0x0000030c
  215. uint32_t measpwr_rbis_para; // 0x00000310
  216. uint32_t measpwr_rbis_out1; // 0x00000314
  217. uint32_t measpwr_rbis_out2; // 0x00000318
  218. uint32_t measpwr_rbis_ave; // 0x0000031c
  219. uint32_t measpwr_rbis_max; // 0x00000320
  220. uint32_t measpwr_rx_irt; // 0x00000324
  221. uint32_t measpwr_debug1; // 0x00000328
  222. uint32_t measpwr_debug2; // 0x0000032c
  223. uint32_t measpwr_debug3; // 0x00000330
  224. uint32_t measpwr_sigpwr6_out; // 0x00000334
  225. uint32_t measpwr_sigpwr7_out; // 0x00000338
  226. uint32_t measpwr_sigpwr8_out; // 0x0000033c
  227. uint32_t measpwr_sigma6_out; // 0x00000340
  228. uint32_t measpwr_sigma6_agc_out; // 0x00000344
  229. uint32_t measpwr_sigma7_out; // 0x00000348
  230. uint32_t measpwr_sigma7_agc_out; // 0x0000034c
  231. uint32_t measpwr_sigma8_out; // 0x00000350
  232. uint32_t measpwr_sigma8_agc_out; // 0x00000354
  233. uint32_t measpwr_sinr6_out; // 0x00000358
  234. uint32_t measpwr_sinr7_out; // 0x0000035c
  235. uint32_t measpwr_sinr8_out; // 0x00000360
  236. uint32_t measpwr_afc_soft_reect2; // 0x00000364
  237. uint32_t measpwr_afc_soft_reect3; // 0x00000368
  238. uint32_t measpwr_afc_soft_reect4; // 0x0000036c
  239. uint32_t measpwr_afc_soft_reect5; // 0x00000370
  240. uint32_t measpwr_afc_soft_reect6; // 0x00000374
  241. uint32_t measpwr_afc_soft_reect7; // 0x00000378
  242. uint32_t measpwr_afc_soft_reect8; // 0x0000037c
  243. uint32_t measpwr_doppler_para2; // 0x00000380
  244. uint32_t measpwr_trmsf_para; // 0x00000384
  245. uint32_t measpwr_id3_para2; // 0x00000388
  246. uint32_t measpwr_id4_para2; // 0x0000038c
  247. uint32_t measpwr_id5_para2; // 0x00000390
  248. uint32_t measpwr_id6_para2; // 0x00000394
  249. uint32_t measpwr_id7_para2; // 0x00000398
  250. uint32_t measpwr_id8_para2; // 0x0000039c
  251. uint32_t measpwr_afc1_hst; // 0x000003a0
  252. uint32_t measpwr_afc2_hst; // 0x000003a4
  253. uint32_t measpwr_afc3_hst; // 0x000003a8
  254. uint32_t measpwr_afc4_hst; // 0x000003ac
  255. uint32_t measpwr_afc5_hst; // 0x000003b0
  256. uint32_t measpwr_afc6_hst; // 0x000003b4
  257. uint32_t measpwr_afc7_hst; // 0x000003b8
  258. uint32_t measpwr_afc8_hst; // 0x000003bc
  259. uint32_t measpwr_sigpwr1_bef; // 0x000003c0
  260. uint32_t measpwr_sigpwr2_bef; // 0x000003c4
  261. uint32_t measpwr_sigpwr3_bef; // 0x000003c8
  262. uint32_t measpwr_sigpwr4_bef; // 0x000003cc
  263. uint32_t measpwr_sigpwr5_bef; // 0x000003d0
  264. uint32_t measpwr_sigpwr6_bef; // 0x000003d4
  265. uint32_t measpwr_sigpwr7_bef; // 0x000003d8
  266. uint32_t measpwr_sigpwr8_bef; // 0x000003dc
  267. uint32_t measpwr_sigma1_bef; // 0x000003e0
  268. uint32_t measpwr_sigma2_bef; // 0x000003e4
  269. uint32_t measpwr_sigma3_bef; // 0x000003e8
  270. uint32_t measpwr_sigma4_bef; // 0x000003ec
  271. uint32_t measpwr_sigma5_bef; // 0x000003f0
  272. uint32_t measpwr_sigma6_bef; // 0x000003f4
  273. uint32_t measpwr_sigma7_bef; // 0x000003f8
  274. uint32_t measpwr_sigma8_bef; // 0x000003fc
  275. uint32_t measpwr_doppler3_out; // 0x00000400
  276. uint32_t measpwr_doppler4_out; // 0x00000404
  277. uint32_t measpwr_doppler5_out; // 0x00000408
  278. uint32_t measpwr_doppler6_out; // 0x0000040c
  279. uint32_t measpwr_doppler7_out; // 0x00000410
  280. uint32_t measpwr_doppler8_out; // 0x00000414
  281. uint32_t measpwr_doppler1_bef1; // 0x00000418
  282. uint32_t measpwr_doppler1_bef2; // 0x0000041c
  283. uint32_t measpwr_doppler2_bef1; // 0x00000420
  284. uint32_t measpwr_doppler2_bef2; // 0x00000424
  285. uint32_t measpwr_trmsf1_out; // 0x00000428
  286. uint32_t measpwr_trmsf2_out; // 0x0000042c
  287. uint32_t measpwr_trmsf3_out; // 0x00000430
  288. uint32_t measpwr_trmsf4_out; // 0x00000434
  289. uint32_t measpwr_trmsf5_out; // 0x00000438
  290. uint32_t measpwr_trmsf6_out; // 0x0000043c
  291. uint32_t measpwr_trmsf7_out; // 0x00000440
  292. uint32_t measpwr_trmsf8_out; // 0x00000444
  293. uint32_t __1096[1]; // 0x00000448
  294. uint32_t measpwr_trmsf1_bef1; // 0x0000044c
  295. uint32_t measpwr_trmsf1_bef2; // 0x00000450
  296. uint32_t measpwr_trmsf2_bef1; // 0x00000454
  297. uint32_t measpwr_trmsf2_bef2; // 0x00000458
  298. uint32_t measpwr_trmsf3_bef1; // 0x0000045c
  299. uint32_t measpwr_trmsf3_bef2; // 0x00000460
  300. uint32_t measpwr_trmsf4_bef1; // 0x00000464
  301. uint32_t measpwr_trmsf4_bef2; // 0x00000468
  302. uint32_t measpwr_trmsf5_bef1; // 0x0000046c
  303. uint32_t measpwr_trmsf5_bef2; // 0x00000470
  304. uint32_t measpwr_trmsf6_bef1; // 0x00000474
  305. uint32_t measpwr_trmsf6_bef2; // 0x00000478
  306. uint32_t measpwr_trmsf7_bef1; // 0x0000047c
  307. uint32_t measpwr_trmsf7_bef2; // 0x00000480
  308. uint32_t measpwr_trmsf8_bef1; // 0x00000484
  309. uint32_t measpwr_trmsf8_bef2; // 0x00000488
  310. uint32_t measpwr_pow1_max; // 0x0000048c
  311. uint32_t measpwr_pow2_max; // 0x00000490
  312. uint32_t measpwr_pow3_max; // 0x00000494
  313. uint32_t measpwr_pow4_max; // 0x00000498
  314. uint32_t measpwr_pow5_max; // 0x0000049c
  315. uint32_t measpwr_pow6_max; // 0x000004a0
  316. uint32_t measpwr_pow7_max; // 0x000004a4
  317. uint32_t measpwr_pow8_max; // 0x000004a8
  318. uint32_t measpwr_trms3_out; // 0x000004ac
  319. uint32_t measpwr_trms4_out; // 0x000004b0
  320. uint32_t measpwr_trms5_out; // 0x000004b4
  321. uint32_t measpwr_trms6_out; // 0x000004b8
  322. uint32_t measpwr_trms7_out; // 0x000004bc
  323. uint32_t measpwr_trms8_out; // 0x000004c0
  324. uint32_t measpwr_reis_conf; // 0x000004c4
  325. uint32_t measpwr_reis_pos0; // 0x000004c8
  326. uint32_t measpwr_reis_pos1; // 0x000004cc
  327. uint32_t measpwr_reis_pos2; // 0x000004d0
  328. uint32_t measpwr_reis_pos3; // 0x000004d4
  329. uint32_t measpwr_offline0_sel; // 0x000004d8
  330. uint32_t measpwr_offline0_th; // 0x000004dc
  331. uint32_t measpwr_offline0_pos; // 0x000004e0
  332. uint32_t measpwr_offline0_id; // 0x000004e4
  333. uint32_t measpwr_offline1_para; // 0x000004e8
  334. uint32_t measpwr_offline1_agc1; // 0x000004ec
  335. uint32_t measpwr_offline1_agc2; // 0x000004f0
  336. uint32_t measpwr_offline1_agc3; // 0x000004f4
  337. uint32_t measpwr_offline1_agc4; // 0x000004f8
  338. uint32_t measpwr_offline1_agc5; // 0x000004fc
  339. uint32_t measpwr_offline1_agc6; // 0x00000500
  340. uint32_t measpwr_crs_rssi1_out1; // 0x00000504
  341. uint32_t measpwr_crs_rssi1_out2; // 0x00000508
  342. uint32_t measpwr_crs_rssi1_out3; // 0x0000050c
  343. uint32_t measpwr_crs_rssi2_out1; // 0x00000510
  344. uint32_t measpwr_crs_rssi2_out2; // 0x00000514
  345. uint32_t measpwr_crs_rssi2_out3; // 0x00000518
  346. uint32_t __1308[1]; // 0x0000051c
  347. uint32_t measpwr_crs_rssi3_out; // 0x00000520
  348. uint32_t measpwr_crs_rssi4_out; // 0x00000524
  349. uint32_t measpwr_crs_rssi5_out; // 0x00000528
  350. uint32_t measpwr_crs_rssi6_out; // 0x0000052c
  351. uint32_t measpwr_crs_rssi7_out; // 0x00000530
  352. uint32_t measpwr_crs_rssi8_out; // 0x00000534
  353. uint32_t measpwr_crs_rssi1_agc1; // 0x00000538
  354. uint32_t measpwr_crs_rssi1_agc2; // 0x0000053c
  355. uint32_t measpwr_crs_rssi1_agc3; // 0x00000540
  356. uint32_t measpwr_crs_rssi2_agc1; // 0x00000544
  357. uint32_t measpwr_crs_rssi2_agc2; // 0x00000548
  358. uint32_t measpwr_crs_rssi2_agc3; // 0x0000054c
  359. uint32_t measpwr_crs_rssi3_agc; // 0x00000550
  360. uint32_t measpwr_crs_rssi4_agc; // 0x00000554
  361. uint32_t measpwr_crs_rssi5_agc; // 0x00000558
  362. uint32_t measpwr_crs_rssi6_agc; // 0x0000055c
  363. uint32_t measpwr_crs_rssi7_agc; // 0x00000560
  364. uint32_t measpwr_crs_rssi8_agc; // 0x00000564
  365. uint32_t measpwr_hmmse_win; // 0x00000568
  366. uint32_t measpwr_hmmse_bitsel; // 0x0000056c
  367. uint32_t measpwr_hmmse_flag; // 0x00000570
  368. uint32_t measpwr_id_info2; // 0x00000574
  369. uint32_t measpwr_inmem_mode; // 0x00000578
  370. uint32_t measpwr_afc1_rsrp_hst; // 0x0000057c
  371. uint32_t measpwr_afc2_rsrp_hst; // 0x00000580
  372. uint32_t measpwr_afc3_rsrp_hst; // 0x00000584
  373. uint32_t measpwr_afc4_rsrp_hst; // 0x00000588
  374. uint32_t measpwr_afc5_rsrp_hst; // 0x0000058c
  375. uint32_t measpwr_afc6_rsrp_hst; // 0x00000590
  376. uint32_t measpwr_afc7_rsrp_hst; // 0x00000594
  377. uint32_t measpwr_afc8_rsrp_hst; // 0x00000598
  378. uint32_t measpwr_powmax1_scale; // 0x0000059c
  379. uint32_t measpwr_powmax2_scale; // 0x000005a0
  380. uint32_t measpwr_powmax3_scale; // 0x000005a4
  381. uint32_t measpwr_powmax4_scale; // 0x000005a8
  382. uint32_t measpwr_powmax5_scale; // 0x000005ac
  383. uint32_t measpwr_powmax6_scale; // 0x000005b0
  384. uint32_t measpwr_powmax7_scale; // 0x000005b4
  385. uint32_t measpwr_powmax8_scale; // 0x000005b8
  386. uint32_t measpwr_afc6_out; // 0x000005bc
  387. uint32_t measpwr_afc7_out; // 0x000005c0
  388. uint32_t measpwr_afc8_out; // 0x000005c4
  389. uint32_t measpwr_afc6_rsrp; // 0x000005c8
  390. uint32_t measpwr_afc7_rsrp; // 0x000005cc
  391. uint32_t measpwr_afc8_rsrp; // 0x000005d0
  392. uint32_t measpwr_doppler3_bef1; // 0x000005d4
  393. uint32_t measpwr_doppler3_bef2; // 0x000005d8
  394. uint32_t measpwr_doppler4_bef1; // 0x000005dc
  395. uint32_t measpwr_doppler4_bef2; // 0x000005e0
  396. uint32_t measpwr_doppler5_bef1; // 0x000005e4
  397. uint32_t measpwr_doppler5_bef2; // 0x000005e8
  398. uint32_t measpwr_doppler6_bef1; // 0x000005ec
  399. uint32_t measpwr_doppler6_bef2; // 0x000005f0
  400. uint32_t measpwr_doppler7_bef1; // 0x000005f4
  401. uint32_t measpwr_doppler7_bef2; // 0x000005f8
  402. uint32_t measpwr_doppler8_bef1; // 0x000005fc
  403. uint32_t measpwr_doppler8_bef2; // 0x00000600
  404. uint32_t measpwr_offline1_agc7; // 0x00000604
  405. uint32_t measpwr_int_join; // 0x00000608
  406. uint32_t measpwr_int_mark; // 0x0000060c
  407. uint32_t measpwr_int_flag; // 0x00000610
  408. uint32_t measpwr_offline0_decpos1; // 0x00000614
  409. uint32_t measpwr_offline0_decpos2; // 0x00000618
  410. uint32_t measpwr_offline0_decpos3; // 0x0000061c
  411. uint32_t measpwr_offline0_decpos4; // 0x00000620
  412. uint32_t measpwr_offline0_decpos5; // 0x00000624
  413. uint32_t measpwr_offline0_decpos6; // 0x00000628
  414. uint32_t measpwr_offline0_decpos7; // 0x0000062c
  415. uint32_t measpwr_offline0_decpos8; // 0x00000630
  416. uint32_t measpwr_rbis_para2; // 0x00000634
  417. uint32_t measpwr_rbis2_out1; // 0x00000638
  418. uint32_t measpwr_rbis2_out2; // 0x0000063c
  419. uint32_t measpwr_rbis2_ave; // 0x00000640
  420. uint32_t measpwr_rbis2_max; // 0x00000644
  421. uint32_t measpwr_rbis3_out1; // 0x00000648
  422. uint32_t measpwr_rbis3_out2; // 0x0000064c
  423. uint32_t measpwr_rbis3_ave; // 0x00000650
  424. uint32_t measpwr_rbis3_max; // 0x00000654
  425. uint32_t measpwr__irt_scale2_th1; // 0x00000658
  426. uint32_t measpwr__irt_scale2_th2; // 0x0000065c
  427. uint32_t measpwr__irt_scale2_th4; // 0x00000660
  428. uint32_t measpwr__irt_scale2_th8; // 0x00000664
  429. uint32_t measpwr__irt_scale2_th16; // 0x00000668
  430. uint32_t measpwr__irt_scale2_th32; // 0x0000066c
  431. uint32_t measpwr__irt_scale2_th64; // 0x00000670
  432. uint32_t measpwr__irt_scale2_th128; // 0x00000674
  433. uint32_t measpwr__irt_scale2_th256; // 0x00000678
  434. uint32_t measpwr__irt_scale2_th512; // 0x0000067c
  435. uint32_t measpwr_sigpwr_para2; // 0x00000680
  436. uint32_t measpwr_irt_para3; // 0x00000684
  437. uint32_t measpwr_trms_para3; // 0x00000688
  438. uint32_t measpwr_rsrp_para5; // 0x0000068c
  439. uint32_t measpwr_rbis_in1; // 0x00000690
  440. uint32_t measpwr_rbis_in2; // 0x00000694
  441. uint32_t measpwr_rbis2_in1; // 0x00000698
  442. uint32_t measpwr_rbis2_in2; // 0x0000069c
  443. uint32_t measpwr_rbis3_in1; // 0x000006a0
  444. uint32_t measpwr_rbis3_in2; // 0x000006a4
  445. uint32_t __1704[32342]; // 0x000006a8
  446. uint32_t mem_in_1; // 0x00020000
  447. uint32_t __131076[2047]; // 0x00020004
  448. uint32_t mem_in_2; // 0x00022000
  449. uint32_t __139268[2047]; // 0x00022004
  450. uint32_t mem_in_3; // 0x00024000
  451. uint32_t __147460[2047]; // 0x00024004
  452. uint32_t mem_in_4; // 0x00026000
  453. uint32_t __155652[2047]; // 0x00026004
  454. uint32_t mem_in_5; // 0x00028000
  455. uint32_t __163844[4095]; // 0x00028004
  456. uint32_t mem_in_6; // 0x0002c000
  457. uint32_t __180228[4095]; // 0x0002c004
  458. uint32_t mem_in_7; // 0x00030000
  459. uint32_t __196612[8191]; // 0x00030004
  460. uint32_t mem_in_8; // 0x00038000
  461. } HWP_MEASPWR_T;
  462. #define hwp_measpwr ((HWP_MEASPWR_T *)REG_ACCESS_ADDRESS(REG_MEASPWR_BASE))
  463. // measpwr_rxdata_ctrl1
  464. typedef union {
  465. uint32_t v;
  466. struct
  467. {
  468. uint32_t rx_offset1 : 19; // [18:0]
  469. uint32_t __30_19 : 12; // [30:19]
  470. uint32_t fdd_tdd : 1; // [31]
  471. } b;
  472. } REG_MEASPWR_MEASPWR_RXDATA_CTRL1_T;
  473. // measpwr_rxdata_ctrl2
  474. typedef union {
  475. uint32_t v;
  476. struct
  477. {
  478. uint32_t rx_len : 16; // [15:0]
  479. uint32_t __31_16 : 16; // [31:16]
  480. } b;
  481. } REG_MEASPWR_MEASPWR_RXDATA_CTRL2_T;
  482. // measpwr_rxdata_val_ctrl
  483. typedef union {
  484. uint32_t v;
  485. struct
  486. {
  487. uint32_t rx_offset2 : 18; // [17:0]
  488. uint32_t __19_18 : 2; // [19:18]
  489. uint32_t invalid_flag : 1; // [20]
  490. uint32_t __31_21 : 11; // [31:21]
  491. } b;
  492. } REG_MEASPWR_MEASPWR_RXDATA_VAL_CTRL_T;
  493. // measpwr_rxdata_offset3_id1
  494. typedef union {
  495. uint32_t v;
  496. struct
  497. {
  498. uint32_t rx_offset3_id1 : 20; // [19:0]
  499. uint32_t __31_20 : 12; // [31:20]
  500. } b;
  501. } REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID1_T;
  502. // measpwr_rxdata_offset3_id2
  503. typedef union {
  504. uint32_t v;
  505. struct
  506. {
  507. uint32_t rx_offset3_id2 : 20; // [19:0]
  508. uint32_t __31_20 : 12; // [31:20]
  509. } b;
  510. } REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID2_T;
  511. // measpwr_rxdata_offset3_id3
  512. typedef union {
  513. uint32_t v;
  514. struct
  515. {
  516. uint32_t rx_offset3_id3 : 20; // [19:0]
  517. uint32_t __31_20 : 12; // [31:20]
  518. } b;
  519. } REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID3_T;
  520. // measpwr_rxdata_offset3_id4
  521. typedef union {
  522. uint32_t v;
  523. struct
  524. {
  525. uint32_t rx_offset3_id4 : 20; // [19:0]
  526. uint32_t __31_20 : 12; // [31:20]
  527. } b;
  528. } REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID4_T;
  529. // measpwr_rxdata_offset3_id5
  530. typedef union {
  531. uint32_t v;
  532. struct
  533. {
  534. uint32_t rx_offset3_id5 : 20; // [19:0]
  535. uint32_t __31_20 : 12; // [31:20]
  536. } b;
  537. } REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID5_T;
  538. // measpwr_rxdata_offset3_id6
  539. typedef union {
  540. uint32_t v;
  541. struct
  542. {
  543. uint32_t rx_offset3_id6 : 20; // [19:0]
  544. uint32_t __31_20 : 12; // [31:20]
  545. } b;
  546. } REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID6_T;
  547. // measpwr_rxdata_offset3_id7
  548. typedef union {
  549. uint32_t v;
  550. struct
  551. {
  552. uint32_t rx_offset3_id7 : 20; // [19:0]
  553. uint32_t __31_20 : 12; // [31:20]
  554. } b;
  555. } REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID7_T;
  556. // measpwr_rxdata_offset3_id8
  557. typedef union {
  558. uint32_t v;
  559. struct
  560. {
  561. uint32_t rx_offset3_id8 : 20; // [19:0]
  562. uint32_t __31_20 : 12; // [31:20]
  563. } b;
  564. } REG_MEASPWR_MEASPWR_RXDATA_OFFSET3_ID8_T;
  565. // measpwr_nb_offset4
  566. typedef union {
  567. uint32_t v;
  568. struct
  569. {
  570. uint32_t nb_offet4 : 15; // [14:0]
  571. uint32_t __31_15 : 17; // [31:15]
  572. } b;
  573. } REG_MEASPWR_MEASPWR_NB_OFFSET4_T;
  574. // measpwr_total_subf
  575. typedef union {
  576. uint32_t v;
  577. struct
  578. {
  579. uint32_t total_subf_num_id1_2 : 9; // [8:0]
  580. uint32_t __11_9 : 3; // [11:9]
  581. uint32_t total_subf_num_id3_8 : 9; // [20:12]
  582. uint32_t __31_21 : 11; // [31:21]
  583. } b;
  584. } REG_MEASPWR_MEASPWR_TOTAL_SUBF_T;
  585. // measpwr_ifft_para
  586. typedef union {
  587. uint32_t v;
  588. struct
  589. {
  590. uint32_t ifft_cut1 : 2; // [1:0]
  591. uint32_t ifft_cut2 : 2; // [3:2]
  592. uint32_t ifft_cut3 : 2; // [5:4]
  593. uint32_t ifft_cut4 : 2; // [7:6]
  594. uint32_t ifft_cut5 : 2; // [9:8]
  595. uint32_t ifft_cut6 : 2; // [11:10]
  596. uint32_t ifft_cut7 : 2; // [13:12]
  597. uint32_t __31_14 : 18; // [31:14]
  598. } b;
  599. } REG_MEASPWR_MEASPWR_IFFT_PARA_T;
  600. // measpwr_ifft_gate
  601. typedef union {
  602. uint32_t v;
  603. struct
  604. {
  605. uint32_t ifft_gate : 7; // [6:0]
  606. uint32_t __31_7 : 25; // [31:7]
  607. } b;
  608. } REG_MEASPWR_MEASPWR_IFFT_GATE_T;
  609. // measpwr_int_en
  610. typedef union {
  611. uint32_t v;
  612. struct
  613. {
  614. uint32_t id1_interrupt_enable : 4; // [3:0]
  615. uint32_t id2_interrupt_enable : 4; // [7:4]
  616. uint32_t id3_interrupt_enable : 4; // [11:8]
  617. uint32_t id4_interrupt_enable : 4; // [15:12]
  618. uint32_t id5_interrupt_enable : 4; // [19:16]
  619. uint32_t id6_interrupt_enable : 4; // [23:20]
  620. uint32_t id7_interrupt_enable : 4; // [27:24]
  621. uint32_t id8_interrupt_enable : 4; // [31:28]
  622. } b;
  623. } REG_MEASPWR_MEASPWR_INT_EN_T;
  624. // measpwr_int_sta
  625. typedef union {
  626. uint32_t v;
  627. struct
  628. {
  629. uint32_t id1_interrupt_state : 4; // [3:0], write clear
  630. uint32_t id2_interrupt_state : 4; // [7:4], write clear
  631. uint32_t id3_interrupt_state : 4; // [11:8], write clear
  632. uint32_t id4_interrupt_state : 4; // [15:12], write clear
  633. uint32_t id5_interrupt_state : 4; // [19:16], write clear
  634. uint32_t id6_interrupt_state : 4; // [23:20], write clear
  635. uint32_t id7_interrupt_state : 4; // [27:24], write clear
  636. uint32_t id8_interrupt_state : 4; // [31:28], write clear
  637. } b;
  638. } REG_MEASPWR_MEASPWR_INT_STA_T;
  639. // measpwr_id1_id2_func_ctrl
  640. typedef union {
  641. uint32_t v;
  642. struct
  643. {
  644. uint32_t id1_id2_irt_en : 1; // [0]
  645. uint32_t id1_id2_rsrp_en : 1; // [1]
  646. uint32_t id1_id2_trms_en : 1; // [2]
  647. uint32_t id1_id2_afc_hst_en : 1; // [3]
  648. uint32_t id1_id2_afc_com_en : 1; // [4]
  649. uint32_t id1_id2_sinr_en : 1; // [5]
  650. uint32_t id1_id2_doppler_en : 1; // [6]
  651. uint32_t id1_id2_sigma_en : 1; // [7]
  652. uint32_t id1_id2_trmsf_en : 1; // [8]
  653. uint32_t __31_9 : 23; // [31:9]
  654. } b;
  655. } REG_MEASPWR_MEASPWR_ID1_ID2_FUNC_CTRL_T;
  656. // measpwr_id3_id8_func_ctrl
  657. typedef union {
  658. uint32_t v;
  659. struct
  660. {
  661. uint32_t id3_id8_irt_en : 1; // [0]
  662. uint32_t id3_id8_rsrp_en : 1; // [1]
  663. uint32_t id3_id8_trms_en : 1; // [2]
  664. uint32_t id3_id8_afc_hst_en : 1; // [3]
  665. uint32_t id3_id8_afc_com_en : 1; // [4]
  666. uint32_t id3_id8_sinr_en : 1; // [5]
  667. uint32_t id3_id8_doppler_en : 1; // [6]
  668. uint32_t id3_id8_sigma_en : 1; // [7]
  669. uint32_t id3_id8_trmsf_en : 1; // [8]
  670. uint32_t __31_9 : 23; // [31:9]
  671. } b;
  672. } REG_MEASPWR_MEASPWR_ID3_ID8_FUNC_CTRL_T;
  673. // measpwr_agc_compare
  674. typedef union {
  675. uint32_t v;
  676. struct
  677. {
  678. uint32_t agc_compare : 10; // [9:0]
  679. uint32_t __31_10 : 22; // [31:10]
  680. } b;
  681. } REG_MEASPWR_MEASPWR_AGC_COMPARE_T;
  682. // measpwr_nb_para
  683. typedef union {
  684. uint32_t v;
  685. struct
  686. {
  687. uint32_t id1_nb_ind : 4; // [3:0]
  688. uint32_t id2_nb_ind : 4; // [7:4]
  689. uint32_t id38_nb_ind : 4; // [11:8]
  690. uint32_t __31_12 : 20; // [31:12]
  691. } b;
  692. } REG_MEASPWR_MEASPWR_NB_PARA_T;
  693. // measpwr_band_para
  694. typedef union {
  695. uint32_t v;
  696. struct
  697. {
  698. uint32_t sys_bw_id12 : 3; // [2:0]
  699. uint32_t __3_3 : 1; // [3]
  700. uint32_t meas_bw_id12 : 3; // [6:4]
  701. uint32_t __7_7 : 1; // [7]
  702. uint32_t sys_bw_id38 : 3; // [10:8]
  703. uint32_t __11_11 : 1; // [11]
  704. uint32_t meas_bw_id38 : 3; // [14:12]
  705. uint32_t __31_15 : 17; // [31:15]
  706. } b;
  707. } REG_MEASPWR_MEASPWR_BAND_PARA_T;
  708. // measpwr_afc_para
  709. typedef union {
  710. uint32_t v;
  711. struct
  712. {
  713. uint32_t afc_renum : 3; // [2:0]
  714. uint32_t __3_3 : 1; // [3]
  715. uint32_t afc_related_flag : 1; // [4]
  716. uint32_t __7_5 : 3; // [7:5]
  717. uint32_t afc_factor : 16; // [23:8]
  718. uint32_t __31_24 : 8; // [31:24]
  719. } b;
  720. } REG_MEASPWR_MEASPWR_AFC_PARA_T;
  721. // measpwr_afc_soft_reect1
  722. typedef union {
  723. uint32_t v;
  724. struct
  725. {
  726. uint32_t afc_soft_fa_ctor1 : 16; // [15:0]
  727. uint32_t __31_16 : 16; // [31:16]
  728. } b;
  729. } REG_MEASPWR_MEASPWR_AFC_SOFT_REECT1_T;
  730. // measpwr_sigpwr_para
  731. typedef union {
  732. uint32_t v;
  733. struct
  734. {
  735. uint32_t sigpwr_renum : 8; // [7:0]
  736. uint32_t sigpwr_ofdmnum : 2; // [9:8]
  737. uint32_t __11_10 : 2; // [11:10]
  738. uint32_t sigpwr_alpha : 17; // [28:12]
  739. uint32_t __31_29 : 3; // [31:29]
  740. } b;
  741. } REG_MEASPWR_MEASPWR_SIGPWR_PARA_T;
  742. // measpwr_sigma_para
  743. typedef union {
  744. uint32_t v;
  745. struct
  746. {
  747. uint32_t sigma_win : 7; // [6:0]
  748. uint32_t __7_7 : 1; // [7]
  749. uint32_t sigma_alpha : 17; // [24:8]
  750. uint32_t __31_25 : 7; // [31:25]
  751. } b;
  752. } REG_MEASPWR_MEASPWR_SIGMA_PARA_T;
  753. // measpwr_doppler_para
  754. typedef union {
  755. uint32_t v;
  756. struct
  757. {
  758. uint32_t doppler_win : 7; // [6:0]
  759. uint32_t __7_7 : 1; // [7]
  760. uint32_t doppler_scale : 4; // [11:8]
  761. uint32_t __12_12 : 1; // [12]
  762. uint32_t doppler_alpha1 : 17; // [29:13]
  763. uint32_t __31_30 : 2; // [31:30]
  764. } b;
  765. } REG_MEASPWR_MEASPWR_DOPPLER_PARA_T;
  766. // measpwr_trms_para1
  767. typedef union {
  768. uint32_t v;
  769. struct
  770. {
  771. uint32_t dis_limit : 8; // [7:0]
  772. uint32_t d_flag : 1; // [8]
  773. uint32_t d_flag2 : 1; // [9]
  774. uint32_t __11_10 : 2; // [11:10]
  775. uint32_t noise_sel : 1; // [12]
  776. uint32_t __15_13 : 3; // [15:13]
  777. uint32_t t_th : 8; // [23:16]
  778. uint32_t __31_24 : 8; // [31:24]
  779. } b;
  780. } REG_MEASPWR_MEASPWR_TRMS_PARA1_T;
  781. // measpwr_trms_para2
  782. typedef union {
  783. uint32_t v;
  784. struct
  785. {
  786. uint32_t n_th : 16; // [15:0]
  787. uint32_t s_th : 16; // [31:16]
  788. } b;
  789. } REG_MEASPWR_MEASPWR_TRMS_PARA2_T;
  790. // measpwr_rsrp_para1
  791. typedef union {
  792. uint32_t v;
  793. struct
  794. {
  795. uint32_t dis_limit : 8; // [7:0]
  796. uint32_t beta : 16; // [23:8]
  797. uint32_t d_flag : 1; // [24]
  798. uint32_t d_flag2 : 1; // [25]
  799. uint32_t __31_26 : 6; // [31:26]
  800. } b;
  801. } REG_MEASPWR_MEASPWR_RSRP_PARA1_T;
  802. // measpwr_rsrp_para2
  803. typedef union {
  804. uint32_t v;
  805. struct
  806. {
  807. uint32_t rsrp_agcadjust : 8; // [7:0]
  808. uint32_t mode1_compensate : 9; // [16:8]
  809. uint32_t mode1_compensate2 : 9; // [25:17]
  810. uint32_t __31_26 : 6; // [31:26]
  811. } b;
  812. } REG_MEASPWR_MEASPWR_RSRP_PARA2_T;
  813. // measpwr_rsrp_para3
  814. typedef union {
  815. uint32_t v;
  816. struct
  817. {
  818. uint32_t rssi_q : 7; // [6:0]
  819. uint32_t __7_7 : 1; // [7]
  820. uint32_t s_th : 16; // [23:8]
  821. uint32_t __31_24 : 8; // [31:24]
  822. } b;
  823. } REG_MEASPWR_MEASPWR_RSRP_PARA3_T;
  824. // measpwr_rsrp_para4
  825. typedef union {
  826. uint32_t v;
  827. struct
  828. {
  829. uint32_t pow_pa : 8; // [7:0]
  830. uint32_t powq_value : 8; // [15:8]
  831. uint32_t __31_16 : 16; // [31:16]
  832. } b;
  833. } REG_MEASPWR_MEASPWR_RSRP_PARA4_T;
  834. // measpwr_irt_para1
  835. typedef union {
  836. uint32_t v;
  837. struct
  838. {
  839. uint32_t irt_ofdm_num : 2; // [1:0]
  840. uint32_t __3_2 : 2; // [3:2]
  841. uint32_t dis_limit : 8; // [11:4]
  842. uint32_t n_scale : 4; // [15:12]
  843. uint32_t pow_max_num : 4; // [19:16]
  844. uint32_t val_sel : 1; // [20]
  845. uint32_t __31_21 : 11; // [31:21]
  846. } b;
  847. } REG_MEASPWR_MEASPWR_IRT_PARA1_T;
  848. // measpwr_irt_para2
  849. typedef union {
  850. uint32_t v;
  851. struct
  852. {
  853. uint32_t n_th : 16; // [15:0]
  854. uint32_t s_th : 16; // [31:16]
  855. } b;
  856. } REG_MEASPWR_MEASPWR_IRT_PARA2_T;
  857. // measpwr_rssi_para
  858. typedef union {
  859. uint32_t v;
  860. struct
  861. {
  862. uint32_t rssi_sel : 1; // [0]
  863. uint32_t __3_1 : 3; // [3:1]
  864. uint32_t rssi_compensate : 8; // [11:4]
  865. uint32_t rssi_compensate2 : 8; // [19:12]
  866. uint32_t __31_20 : 12; // [31:20]
  867. } b;
  868. } REG_MEASPWR_MEASPWR_RSSI_PARA_T;
  869. // measpwr_agc
  870. typedef union {
  871. uint32_t v;
  872. struct
  873. {
  874. uint32_t agc_rx : 10; // [9:0]
  875. uint32_t __31_10 : 22; // [31:10]
  876. } b;
  877. } REG_MEASPWR_MEASPWR_AGC_T;
  878. // measpwr_id1_para1
  879. typedef union {
  880. uint32_t v;
  881. struct
  882. {
  883. uint32_t cp_index : 1; // [0]
  884. uint32_t tx_num : 1; // [1]
  885. uint32_t afc_out_sel : 1; // [2]
  886. uint32_t tx_flag : 1; // [3]
  887. uint32_t nid : 9; // [12:4]
  888. uint32_t firstd_ofdm_flag : 1; // [13]
  889. uint32_t crs_rssi_sel : 2; // [15:14]
  890. uint32_t afc_out_num : 8; // [23:16]
  891. uint32_t offline0_time : 4; // [27:24]
  892. uint32_t lnum_mod : 4; // [31:28]
  893. } b;
  894. } REG_MEASPWR_MEASPWR_ID1_PARA1_T;
  895. // measpwr_id1_para2
  896. typedef union {
  897. uint32_t v;
  898. struct
  899. {
  900. uint32_t restart : 1; // [0]
  901. uint32_t windows_clr : 1; // [1]
  902. uint32_t last_flag : 1; // [2]
  903. uint32_t afc_related_en : 1; // [3]
  904. uint32_t sinr_map : 3; // [6:4]
  905. uint32_t offline0_step : 9; // [15:7]
  906. uint32_t frame_map : 10; // [25:16]
  907. uint32_t crs_rssi_clr : 1; // [26]
  908. uint32_t __27_27 : 1; // [27]
  909. uint32_t pow_data_sel : 2; // [29:28]
  910. uint32_t irt_scale_disable : 1; // [30]
  911. uint32_t qf_mem_sel : 1; // [31]
  912. } b;
  913. } REG_MEASPWR_MEASPWR_ID1_PARA2_T;
  914. // measpwr_id2_para1
  915. typedef union {
  916. uint32_t v;
  917. struct
  918. {
  919. uint32_t cp_index : 1; // [0]
  920. uint32_t tx_num : 1; // [1]
  921. uint32_t afc_out_sel : 1; // [2]
  922. uint32_t tx_flag : 1; // [3]
  923. uint32_t nid : 9; // [12:4]
  924. uint32_t firstd_ofdm_flag : 1; // [13]
  925. uint32_t crs_rssi_sel : 2; // [15:14]
  926. uint32_t afc_out_num : 8; // [23:16]
  927. uint32_t offline0_time : 4; // [27:24]
  928. uint32_t lnum_mod : 4; // [31:28]
  929. } b;
  930. } REG_MEASPWR_MEASPWR_ID2_PARA1_T;
  931. // measpwr_id2_para2
  932. typedef union {
  933. uint32_t v;
  934. struct
  935. {
  936. uint32_t restart : 1; // [0]
  937. uint32_t windows_clr : 1; // [1]
  938. uint32_t last_flag : 1; // [2]
  939. uint32_t afc_related_en : 1; // [3]
  940. uint32_t reserve2 : 3; // [6:4], read only
  941. uint32_t offline0_step : 9; // [15:7]
  942. uint32_t frame_map : 10; // [25:16]
  943. uint32_t crs_rssi_clr : 1; // [26]
  944. uint32_t __27_27 : 1; // [27]
  945. uint32_t pow_data_sel : 2; // [29:28]
  946. uint32_t irt_scale_disable : 1; // [30]
  947. uint32_t qf_mem_sel : 1; // [31]
  948. } b;
  949. } REG_MEASPWR_MEASPWR_ID2_PARA2_T;
  950. // measpwr_id3_para1
  951. typedef union {
  952. uint32_t v;
  953. struct
  954. {
  955. uint32_t restart : 1; // [0]
  956. uint32_t windows_clr : 1; // [1]
  957. uint32_t last_flag : 1; // [2]
  958. uint32_t crs_rssi_clr : 1; // [3]
  959. uint32_t cp_index : 1; // [4]
  960. uint32_t tx_num : 1; // [5]
  961. uint32_t tx_flag : 1; // [6]
  962. uint32_t __7_7 : 1; // [7]
  963. uint32_t nid : 9; // [16:8]
  964. uint32_t firstd_ofdm_flag : 1; // [17]
  965. uint32_t __19_18 : 2; // [19:18]
  966. uint32_t offline0_time : 4; // [23:20]
  967. uint32_t lnum_mod : 4; // [27:24]
  968. uint32_t __31_28 : 4; // [31:28]
  969. } b;
  970. } REG_MEASPWR_MEASPWR_ID3_PARA1_T;
  971. // measpwr_id4_para1
  972. typedef union {
  973. uint32_t v;
  974. struct
  975. {
  976. uint32_t restart : 1; // [0]
  977. uint32_t windows_clr : 1; // [1]
  978. uint32_t last_flag : 1; // [2]
  979. uint32_t crs_rssi_clr : 1; // [3]
  980. uint32_t cp_index : 1; // [4]
  981. uint32_t tx_num : 1; // [5]
  982. uint32_t tx_flag : 1; // [6]
  983. uint32_t __7_7 : 1; // [7]
  984. uint32_t nid : 9; // [16:8]
  985. uint32_t firstd_ofdm_flag : 1; // [17]
  986. uint32_t __19_18 : 2; // [19:18]
  987. uint32_t offline0_time : 4; // [23:20]
  988. uint32_t lnum_mod : 4; // [27:24]
  989. uint32_t __31_28 : 4; // [31:28]
  990. } b;
  991. } REG_MEASPWR_MEASPWR_ID4_PARA1_T;
  992. // measpwr_id5_para1
  993. typedef union {
  994. uint32_t v;
  995. struct
  996. {
  997. uint32_t restart : 1; // [0]
  998. uint32_t windows_clr : 1; // [1]
  999. uint32_t last_flag : 1; // [2]
  1000. uint32_t crs_rssi_clr : 1; // [3]
  1001. uint32_t cp_index : 1; // [4]
  1002. uint32_t tx_num : 1; // [5]
  1003. uint32_t tx_flag : 1; // [6]
  1004. uint32_t __7_7 : 1; // [7]
  1005. uint32_t nid : 9; // [16:8]
  1006. uint32_t firstd_ofdm_flag : 1; // [17]
  1007. uint32_t __19_18 : 2; // [19:18]
  1008. uint32_t offline0_time : 4; // [23:20]
  1009. uint32_t lnum_mod : 4; // [27:24]
  1010. uint32_t __31_28 : 4; // [31:28]
  1011. } b;
  1012. } REG_MEASPWR_MEASPWR_ID5_PARA1_T;
  1013. // measpwr_id6_para1
  1014. typedef union {
  1015. uint32_t v;
  1016. struct
  1017. {
  1018. uint32_t restart : 1; // [0]
  1019. uint32_t windows_clr : 1; // [1]
  1020. uint32_t last_flag : 1; // [2]
  1021. uint32_t crs_rssi_clr : 1; // [3]
  1022. uint32_t cp_index : 1; // [4]
  1023. uint32_t tx_num : 1; // [5]
  1024. uint32_t tx_flag : 1; // [6]
  1025. uint32_t __7_7 : 1; // [7]
  1026. uint32_t nid : 9; // [16:8]
  1027. uint32_t firstd_ofdm_flag : 1; // [17]
  1028. uint32_t __19_18 : 2; // [19:18]
  1029. uint32_t offline0_time : 4; // [23:20]
  1030. uint32_t lnum_mod : 4; // [27:24]
  1031. uint32_t __31_28 : 4; // [31:28]
  1032. } b;
  1033. } REG_MEASPWR_MEASPWR_ID6_PARA1_T;
  1034. // measpwr_id7_para1
  1035. typedef union {
  1036. uint32_t v;
  1037. struct
  1038. {
  1039. uint32_t restart : 1; // [0]
  1040. uint32_t windows_clr : 1; // [1]
  1041. uint32_t last_flag : 1; // [2]
  1042. uint32_t crs_rssi_clr : 1; // [3]
  1043. uint32_t cp_index : 1; // [4]
  1044. uint32_t tx_num : 1; // [5]
  1045. uint32_t tx_flag : 1; // [6]
  1046. uint32_t __7_7 : 1; // [7]
  1047. uint32_t nid : 9; // [16:8]
  1048. uint32_t firstd_ofdm_flag : 1; // [17]
  1049. uint32_t __19_18 : 2; // [19:18]
  1050. uint32_t offline0_time : 4; // [23:20]
  1051. uint32_t lnum_mod : 4; // [27:24]
  1052. uint32_t __31_28 : 4; // [31:28]
  1053. } b;
  1054. } REG_MEASPWR_MEASPWR_ID7_PARA1_T;
  1055. // measpwr_id8_para1
  1056. typedef union {
  1057. uint32_t v;
  1058. struct
  1059. {
  1060. uint32_t restart : 1; // [0]
  1061. uint32_t windows_clr : 1; // [1]
  1062. uint32_t last_flag : 1; // [2]
  1063. uint32_t crs_rssi_clr : 1; // [3]
  1064. uint32_t cp_index : 1; // [4]
  1065. uint32_t tx_num : 1; // [5]
  1066. uint32_t tx_flag : 1; // [6]
  1067. uint32_t __7_7 : 1; // [7]
  1068. uint32_t nid : 9; // [16:8]
  1069. uint32_t firstd_ofdm_flag : 1; // [17]
  1070. uint32_t __19_18 : 2; // [19:18]
  1071. uint32_t offline0_time : 4; // [23:20]
  1072. uint32_t lnum_mod : 4; // [27:24]
  1073. uint32_t __31_28 : 4; // [31:28]
  1074. } b;
  1075. } REG_MEASPWR_MEASPWR_ID8_PARA1_T;
  1076. // measpwr_id_para
  1077. typedef union {
  1078. uint32_t v;
  1079. struct
  1080. {
  1081. uint32_t mode_sel : 2; // [1:0]
  1082. uint32_t afc_soft_en : 1; // [2]
  1083. uint32_t irt_soft_en : 1; // [3]
  1084. uint32_t nid12_info : 16; // [19:4]
  1085. uint32_t __23_20 : 4; // [23:20]
  1086. uint32_t offlin_data_sel : 1; // [24]
  1087. uint32_t __27_25 : 3; // [27:25]
  1088. uint32_t offline_mod_sel : 1; // [28]
  1089. uint32_t __31_29 : 3; // [31:29]
  1090. } b;
  1091. } REG_MEASPWR_MEASPWR_ID_PARA_T;
  1092. // measpwr_id_ctrl
  1093. typedef union {
  1094. uint32_t v;
  1095. struct
  1096. {
  1097. uint32_t nid1 : 1; // [0], write set
  1098. uint32_t nid2 : 1; // [1], write set
  1099. uint32_t nid3 : 1; // [2], write set
  1100. uint32_t nid4 : 1; // [3], write set
  1101. uint32_t nid5 : 1; // [4], write set
  1102. uint32_t nid6 : 1; // [5], write set
  1103. uint32_t nid7 : 1; // [6], write set
  1104. uint32_t nid8 : 1; // [7], write set
  1105. uint32_t offline_sel : 1; // [8], write set
  1106. uint32_t __18_9 : 10; // [18:9]
  1107. uint32_t nid38_info : 10; // [28:19], write set
  1108. uint32_t invalid_flag : 1; // [29], write set
  1109. uint32_t __31_30 : 2; // [31:30]
  1110. } b;
  1111. } REG_MEASPWR_MEASPWR_ID_CTRL_T;
  1112. // measpwr_ctrl
  1113. typedef union {
  1114. uint32_t v;
  1115. struct
  1116. {
  1117. uint32_t nid1_en : 1; // [0], write set
  1118. uint32_t nid2_en : 1; // [1], write set
  1119. uint32_t nid3_en : 1; // [2], write set
  1120. uint32_t nid4_en : 1; // [3], write set
  1121. uint32_t nid5_en : 1; // [4], write set
  1122. uint32_t nid6_en : 1; // [5], write set
  1123. uint32_t nid7_en : 1; // [6], write set
  1124. uint32_t nid8_en : 1; // [7], write set
  1125. uint32_t __31_8 : 24; // [31:8]
  1126. } b;
  1127. } REG_MEASPWR_MEASPWR_CTRL_T;
  1128. // measpwr_afc1_out
  1129. typedef union {
  1130. uint32_t v;
  1131. struct
  1132. {
  1133. uint32_t afc_out1 : 16; // [15:0], read only
  1134. uint32_t __31_16 : 16; // [31:16]
  1135. } b;
  1136. } REG_MEASPWR_MEASPWR_AFC1_OUT_T;
  1137. // measpwr_afc2_out
  1138. typedef union {
  1139. uint32_t v;
  1140. struct
  1141. {
  1142. uint32_t afc_out2 : 16; // [15:0], read only
  1143. uint32_t __31_16 : 16; // [31:16]
  1144. } b;
  1145. } REG_MEASPWR_MEASPWR_AFC2_OUT_T;
  1146. // measpwr_afc3_out
  1147. typedef union {
  1148. uint32_t v;
  1149. struct
  1150. {
  1151. uint32_t afc_out3 : 16; // [15:0], read only
  1152. uint32_t __31_16 : 16; // [31:16]
  1153. } b;
  1154. } REG_MEASPWR_MEASPWR_AFC3_OUT_T;
  1155. // measpwr_afc4_out
  1156. typedef union {
  1157. uint32_t v;
  1158. struct
  1159. {
  1160. uint32_t afc_out4 : 16; // [15:0], read only
  1161. uint32_t __31_16 : 16; // [31:16]
  1162. } b;
  1163. } REG_MEASPWR_MEASPWR_AFC4_OUT_T;
  1164. // measpwr_afc5_out
  1165. typedef union {
  1166. uint32_t v;
  1167. struct
  1168. {
  1169. uint32_t afc_out5 : 16; // [15:0], read only
  1170. uint32_t __31_16 : 16; // [31:16]
  1171. } b;
  1172. } REG_MEASPWR_MEASPWR_AFC5_OUT_T;
  1173. // measpwr_afc1_rsrp
  1174. typedef union {
  1175. uint32_t v;
  1176. struct
  1177. {
  1178. uint32_t afc_rsrp1 : 16; // [15:0], read only
  1179. uint32_t __31_16 : 16; // [31:16]
  1180. } b;
  1181. } REG_MEASPWR_MEASPWR_AFC1_RSRP_T;
  1182. // measpwr_afc2_rsrp
  1183. typedef union {
  1184. uint32_t v;
  1185. struct
  1186. {
  1187. uint32_t afc_rsrp2 : 16; // [15:0], read only
  1188. uint32_t __31_16 : 16; // [31:16]
  1189. } b;
  1190. } REG_MEASPWR_MEASPWR_AFC2_RSRP_T;
  1191. // measpwr_afc3_rsrp
  1192. typedef union {
  1193. uint32_t v;
  1194. struct
  1195. {
  1196. uint32_t afc_rsrp3 : 16; // [15:0], read only
  1197. uint32_t __31_16 : 16; // [31:16]
  1198. } b;
  1199. } REG_MEASPWR_MEASPWR_AFC3_RSRP_T;
  1200. // measpwr_afc4_rsrp
  1201. typedef union {
  1202. uint32_t v;
  1203. struct
  1204. {
  1205. uint32_t afc_rsrp4 : 16; // [15:0], read only
  1206. uint32_t __31_16 : 16; // [31:16]
  1207. } b;
  1208. } REG_MEASPWR_MEASPWR_AFC4_RSRP_T;
  1209. // measpwr_afc5_rsrp
  1210. typedef union {
  1211. uint32_t v;
  1212. struct
  1213. {
  1214. uint32_t afc_rsrp5 : 16; // [15:0], read only
  1215. uint32_t __31_16 : 16; // [31:16]
  1216. } b;
  1217. } REG_MEASPWR_MEASPWR_AFC5_RSRP_T;
  1218. // measpwr_sigma1_agc_out1
  1219. typedef union {
  1220. uint32_t v;
  1221. struct
  1222. {
  1223. uint32_t baseagc1_out1 : 10; // [9:0], read only
  1224. uint32_t __15_10 : 6; // [15:10]
  1225. uint32_t sinr1_log_out1 : 11; // [26:16], read only
  1226. uint32_t __31_27 : 5; // [31:27]
  1227. } b;
  1228. } REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT1_T;
  1229. // measpwr_sigma1_agc_out2
  1230. typedef union {
  1231. uint32_t v;
  1232. struct
  1233. {
  1234. uint32_t baseagc1_out2 : 10; // [9:0], read only
  1235. uint32_t __15_10 : 6; // [15:10]
  1236. uint32_t sinr1_log_out2 : 11; // [26:16], read only
  1237. uint32_t __31_27 : 5; // [31:27]
  1238. } b;
  1239. } REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT2_T;
  1240. // measpwr_sigma1_agc_out3
  1241. typedef union {
  1242. uint32_t v;
  1243. struct
  1244. {
  1245. uint32_t baseagc1_out3 : 10; // [9:0], read only
  1246. uint32_t __15_10 : 6; // [15:10]
  1247. uint32_t sinr1_log_out3 : 11; // [26:16], read only
  1248. uint32_t __31_27 : 5; // [31:27]
  1249. } b;
  1250. } REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT3_T;
  1251. // measpwr_sigma1_agc_out4
  1252. typedef union {
  1253. uint32_t v;
  1254. struct
  1255. {
  1256. uint32_t baseagc1_out4 : 10; // [9:0], read only
  1257. uint32_t __15_10 : 6; // [15:10]
  1258. uint32_t sinr1_log_out4 : 11; // [26:16], read only
  1259. uint32_t __31_27 : 5; // [31:27]
  1260. } b;
  1261. } REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT4_T;
  1262. // measpwr_sigma1_agc_out5
  1263. typedef union {
  1264. uint32_t v;
  1265. struct
  1266. {
  1267. uint32_t baseagc1_out5 : 10; // [9:0], read only
  1268. uint32_t __15_10 : 6; // [15:10]
  1269. uint32_t sinr1_log_out5 : 11; // [26:16], read only
  1270. uint32_t __31_27 : 5; // [31:27]
  1271. } b;
  1272. } REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT5_T;
  1273. // measpwr_sigma1_agc_out6
  1274. typedef union {
  1275. uint32_t v;
  1276. struct
  1277. {
  1278. uint32_t baseagc1_out6 : 10; // [9:0], read only
  1279. uint32_t __15_10 : 6; // [15:10]
  1280. uint32_t sinr1_log_out6 : 11; // [26:16], read only
  1281. uint32_t __31_27 : 5; // [31:27]
  1282. } b;
  1283. } REG_MEASPWR_MEASPWR_SIGMA1_AGC_OUT6_T;
  1284. // measpwr_sigma2_agc_out
  1285. typedef union {
  1286. uint32_t v;
  1287. struct
  1288. {
  1289. uint32_t baseagc2_out : 10; // [9:0], read only
  1290. uint32_t __15_10 : 6; // [15:10]
  1291. uint32_t sinr2_log_out : 11; // [26:16], read only
  1292. uint32_t __31_27 : 5; // [31:27]
  1293. } b;
  1294. } REG_MEASPWR_MEASPWR_SIGMA2_AGC_OUT_T;
  1295. // measpwr_sigma3_agc_out
  1296. typedef union {
  1297. uint32_t v;
  1298. struct
  1299. {
  1300. uint32_t baseagc3_out : 10; // [9:0], read only
  1301. uint32_t __15_10 : 6; // [15:10]
  1302. uint32_t sinr3_log_out : 11; // [26:16], read only
  1303. uint32_t __31_27 : 5; // [31:27]
  1304. } b;
  1305. } REG_MEASPWR_MEASPWR_SIGMA3_AGC_OUT_T;
  1306. // measpwr_sigma4_agc_out
  1307. typedef union {
  1308. uint32_t v;
  1309. struct
  1310. {
  1311. uint32_t baseagc4_out : 10; // [9:0], read only
  1312. uint32_t __15_10 : 6; // [15:10]
  1313. uint32_t sinr4_log_out : 11; // [26:16], read only
  1314. uint32_t __31_27 : 5; // [31:27]
  1315. } b;
  1316. } REG_MEASPWR_MEASPWR_SIGMA4_AGC_OUT_T;
  1317. // measpwr_sigma5_agc_out
  1318. typedef union {
  1319. uint32_t v;
  1320. struct
  1321. {
  1322. uint32_t baseagc5_out : 10; // [9:0], read only
  1323. uint32_t __15_10 : 6; // [15:10]
  1324. uint32_t sinr5_log_out : 11; // [26:16], read only
  1325. uint32_t __31_27 : 5; // [31:27]
  1326. } b;
  1327. } REG_MEASPWR_MEASPWR_SIGMA5_AGC_OUT_T;
  1328. // measpwr__doppler1_out
  1329. typedef union {
  1330. uint32_t v;
  1331. struct
  1332. {
  1333. uint32_t doppler1_out : 11; // [10:0], read only
  1334. uint32_t __15_11 : 5; // [15:11]
  1335. uint32_t hls_agc_base1 : 10; // [25:16], read only
  1336. uint32_t __31_26 : 6; // [31:26]
  1337. } b;
  1338. } REG_MEASPWR_MEASPWR__DOPPLER1_OUT_T;
  1339. // measpwr__doppler2_out
  1340. typedef union {
  1341. uint32_t v;
  1342. struct
  1343. {
  1344. uint32_t doppler2_out : 11; // [10:0], read only
  1345. uint32_t __15_11 : 5; // [15:11]
  1346. uint32_t hls_agc_base2 : 10; // [25:16], read only
  1347. uint32_t __31_26 : 6; // [31:26]
  1348. } b;
  1349. } REG_MEASPWR_MEASPWR__DOPPLER2_OUT_T;
  1350. // measpwr_rsrp1_db
  1351. typedef union {
  1352. uint32_t v;
  1353. struct
  1354. {
  1355. uint32_t rsrp_pwr_db : 16; // [15:0], read only
  1356. uint32_t __31_16 : 16; // [31:16]
  1357. } b;
  1358. } REG_MEASPWR_MEASPWR_RSRP1_DB_T;
  1359. // measpwr_rsrp1_scale_db
  1360. typedef union {
  1361. uint32_t v;
  1362. struct
  1363. {
  1364. uint32_t scale_rsrp_db : 16; // [15:0]
  1365. uint32_t __31_16 : 16; // [31:16]
  1366. } b;
  1367. } REG_MEASPWR_MEASPWR_RSRP1_SCALE_DB_T;
  1368. // measpwr_rsrq1_db
  1369. typedef union {
  1370. uint32_t v;
  1371. struct
  1372. {
  1373. uint32_t rsrq_db : 16; // [15:0], read only
  1374. uint32_t __31_16 : 16; // [31:16]
  1375. } b;
  1376. } REG_MEASPWR_MEASPWR_RSRQ1_DB_T;
  1377. // measpwr_rssi1_db
  1378. typedef union {
  1379. uint32_t v;
  1380. struct
  1381. {
  1382. uint32_t rssi_db : 16; // [15:0], read only
  1383. uint32_t __31_16 : 16; // [31:16]
  1384. } b;
  1385. } REG_MEASPWR_MEASPWR_RSSI1_DB_T;
  1386. // measpwr_rsrp2_db
  1387. typedef union {
  1388. uint32_t v;
  1389. struct
  1390. {
  1391. uint32_t rsrp_pwr_db : 16; // [15:0], read only
  1392. uint32_t __31_16 : 16; // [31:16]
  1393. } b;
  1394. } REG_MEASPWR_MEASPWR_RSRP2_DB_T;
  1395. // measpwr_rsrp2_scale_db
  1396. typedef union {
  1397. uint32_t v;
  1398. struct
  1399. {
  1400. uint32_t scale_rsrp_db : 16; // [15:0]
  1401. uint32_t __31_16 : 16; // [31:16]
  1402. } b;
  1403. } REG_MEASPWR_MEASPWR_RSRP2_SCALE_DB_T;
  1404. // measpwr_rsrq2_db
  1405. typedef union {
  1406. uint32_t v;
  1407. struct
  1408. {
  1409. uint32_t rsrq_db : 16; // [15:0], read only
  1410. uint32_t __31_16 : 16; // [31:16]
  1411. } b;
  1412. } REG_MEASPWR_MEASPWR_RSRQ2_DB_T;
  1413. // measpwr_rssi2_db
  1414. typedef union {
  1415. uint32_t v;
  1416. struct
  1417. {
  1418. uint32_t rssi_db : 16; // [15:0], read only
  1419. uint32_t __31_16 : 16; // [31:16]
  1420. } b;
  1421. } REG_MEASPWR_MEASPWR_RSSI2_DB_T;
  1422. // measpwr_rsrp3_db
  1423. typedef union {
  1424. uint32_t v;
  1425. struct
  1426. {
  1427. uint32_t rsrp_pwr_db : 16; // [15:0], read only
  1428. uint32_t __31_16 : 16; // [31:16]
  1429. } b;
  1430. } REG_MEASPWR_MEASPWR_RSRP3_DB_T;
  1431. // measpwr_rsrp3_scale_db
  1432. typedef union {
  1433. uint32_t v;
  1434. struct
  1435. {
  1436. uint32_t scale_rsrp_db : 16; // [15:0]
  1437. uint32_t __31_16 : 16; // [31:16]
  1438. } b;
  1439. } REG_MEASPWR_MEASPWR_RSRP3_SCALE_DB_T;
  1440. // measpwr_rsrq3_db
  1441. typedef union {
  1442. uint32_t v;
  1443. struct
  1444. {
  1445. uint32_t rsrq_db : 16; // [15:0], read only
  1446. uint32_t __31_16 : 16; // [31:16]
  1447. } b;
  1448. } REG_MEASPWR_MEASPWR_RSRQ3_DB_T;
  1449. // measpwr_rssi3_db
  1450. typedef union {
  1451. uint32_t v;
  1452. struct
  1453. {
  1454. uint32_t rssi_db : 16; // [15:0], read only
  1455. uint32_t __31_16 : 16; // [31:16]
  1456. } b;
  1457. } REG_MEASPWR_MEASPWR_RSSI3_DB_T;
  1458. // measpwr_rsrp4_db
  1459. typedef union {
  1460. uint32_t v;
  1461. struct
  1462. {
  1463. uint32_t rsrp_pwr_db : 16; // [15:0], read only
  1464. uint32_t __31_16 : 16; // [31:16]
  1465. } b;
  1466. } REG_MEASPWR_MEASPWR_RSRP4_DB_T;
  1467. // measpwr_rsrp4_scale_db
  1468. typedef union {
  1469. uint32_t v;
  1470. struct
  1471. {
  1472. uint32_t scale_rsrp_db : 16; // [15:0]
  1473. uint32_t __31_16 : 16; // [31:16]
  1474. } b;
  1475. } REG_MEASPWR_MEASPWR_RSRP4_SCALE_DB_T;
  1476. // measpwr_rsrq4_db
  1477. typedef union {
  1478. uint32_t v;
  1479. struct
  1480. {
  1481. uint32_t rsrq_db : 16; // [15:0], read only
  1482. uint32_t __31_16 : 16; // [31:16]
  1483. } b;
  1484. } REG_MEASPWR_MEASPWR_RSRQ4_DB_T;
  1485. // measpwr_rssi4_db
  1486. typedef union {
  1487. uint32_t v;
  1488. struct
  1489. {
  1490. uint32_t rssi_db : 16; // [15:0], read only
  1491. uint32_t __31_16 : 16; // [31:16]
  1492. } b;
  1493. } REG_MEASPWR_MEASPWR_RSSI4_DB_T;
  1494. // measpwr_rsrp5_db
  1495. typedef union {
  1496. uint32_t v;
  1497. struct
  1498. {
  1499. uint32_t rsrp_pwr_db : 16; // [15:0], read only
  1500. uint32_t __31_16 : 16; // [31:16]
  1501. } b;
  1502. } REG_MEASPWR_MEASPWR_RSRP5_DB_T;
  1503. // measpwr_rsrp5_scale_db
  1504. typedef union {
  1505. uint32_t v;
  1506. struct
  1507. {
  1508. uint32_t scale_rsrp_db : 16; // [15:0]
  1509. uint32_t __31_16 : 16; // [31:16]
  1510. } b;
  1511. } REG_MEASPWR_MEASPWR_RSRP5_SCALE_DB_T;
  1512. // measpwr_rsrq5_db
  1513. typedef union {
  1514. uint32_t v;
  1515. struct
  1516. {
  1517. uint32_t rsrq_db : 16; // [15:0], read only
  1518. uint32_t __31_16 : 16; // [31:16]
  1519. } b;
  1520. } REG_MEASPWR_MEASPWR_RSRQ5_DB_T;
  1521. // measpwr_rssi5_db
  1522. typedef union {
  1523. uint32_t v;
  1524. struct
  1525. {
  1526. uint32_t rssi_db : 16; // [15:0], read only
  1527. uint32_t __31_16 : 16; // [31:16]
  1528. } b;
  1529. } REG_MEASPWR_MEASPWR_RSSI5_DB_T;
  1530. // measpwr_rsrp6_db
  1531. typedef union {
  1532. uint32_t v;
  1533. struct
  1534. {
  1535. uint32_t rsrp_pwr_db : 16; // [15:0], read only
  1536. uint32_t __31_16 : 16; // [31:16]
  1537. } b;
  1538. } REG_MEASPWR_MEASPWR_RSRP6_DB_T;
  1539. // measpwr_rsrp6_scale_db
  1540. typedef union {
  1541. uint32_t v;
  1542. struct
  1543. {
  1544. uint32_t scale_rsrp_db : 16; // [15:0]
  1545. uint32_t __31_16 : 16; // [31:16]
  1546. } b;
  1547. } REG_MEASPWR_MEASPWR_RSRP6_SCALE_DB_T;
  1548. // measpwr_rsrq6_db
  1549. typedef union {
  1550. uint32_t v;
  1551. struct
  1552. {
  1553. uint32_t rsrq_db : 16; // [15:0], read only
  1554. uint32_t __31_16 : 16; // [31:16]
  1555. } b;
  1556. } REG_MEASPWR_MEASPWR_RSRQ6_DB_T;
  1557. // measpwr_rssi6_db
  1558. typedef union {
  1559. uint32_t v;
  1560. struct
  1561. {
  1562. uint32_t rssi_db : 16; // [15:0], read only
  1563. uint32_t __31_16 : 16; // [31:16]
  1564. } b;
  1565. } REG_MEASPWR_MEASPWR_RSSI6_DB_T;
  1566. // measpwr_rsrp7_db
  1567. typedef union {
  1568. uint32_t v;
  1569. struct
  1570. {
  1571. uint32_t rsrp_pwr_db : 16; // [15:0], read only
  1572. uint32_t __31_16 : 16; // [31:16]
  1573. } b;
  1574. } REG_MEASPWR_MEASPWR_RSRP7_DB_T;
  1575. // measpwr_rsrp7_scale_db
  1576. typedef union {
  1577. uint32_t v;
  1578. struct
  1579. {
  1580. uint32_t scale_rsrp_db : 16; // [15:0]
  1581. uint32_t __31_16 : 16; // [31:16]
  1582. } b;
  1583. } REG_MEASPWR_MEASPWR_RSRP7_SCALE_DB_T;
  1584. // measpwr_rsrq7_db
  1585. typedef union {
  1586. uint32_t v;
  1587. struct
  1588. {
  1589. uint32_t rsrq_db : 16; // [15:0], read only
  1590. uint32_t __31_16 : 16; // [31:16]
  1591. } b;
  1592. } REG_MEASPWR_MEASPWR_RSRQ7_DB_T;
  1593. // measpwr_rssi7_db
  1594. typedef union {
  1595. uint32_t v;
  1596. struct
  1597. {
  1598. uint32_t rssi_db : 16; // [15:0], read only
  1599. uint32_t __31_16 : 16; // [31:16]
  1600. } b;
  1601. } REG_MEASPWR_MEASPWR_RSSI7_DB_T;
  1602. // measpwr_rsrp8_db
  1603. typedef union {
  1604. uint32_t v;
  1605. struct
  1606. {
  1607. uint32_t rsrp_pwr_db : 16; // [15:0], read only
  1608. uint32_t __31_16 : 16; // [31:16]
  1609. } b;
  1610. } REG_MEASPWR_MEASPWR_RSRP8_DB_T;
  1611. // measpwr_rsrp8_scale_db
  1612. typedef union {
  1613. uint32_t v;
  1614. struct
  1615. {
  1616. uint32_t scale_rsrp_db : 16; // [15:0]
  1617. uint32_t __31_16 : 16; // [31:16]
  1618. } b;
  1619. } REG_MEASPWR_MEASPWR_RSRP8_SCALE_DB_T;
  1620. // measpwr_rsrq8_db
  1621. typedef union {
  1622. uint32_t v;
  1623. struct
  1624. {
  1625. uint32_t rsrq_db : 16; // [15:0], read only
  1626. uint32_t __31_16 : 16; // [31:16]
  1627. } b;
  1628. } REG_MEASPWR_MEASPWR_RSRQ8_DB_T;
  1629. // measpwr_rssi8_db
  1630. typedef union {
  1631. uint32_t v;
  1632. struct
  1633. {
  1634. uint32_t rssi_db : 16; // [15:0], read only
  1635. uint32_t __31_16 : 16; // [31:16]
  1636. } b;
  1637. } REG_MEASPWR_MEASPWR_RSSI8_DB_T;
  1638. // measpwr_irt1_delay
  1639. typedef union {
  1640. uint32_t v;
  1641. struct
  1642. {
  1643. uint32_t irt_delay : 16; // [15:0], read only
  1644. uint32_t __31_16 : 16; // [31:16]
  1645. } b;
  1646. } REG_MEASPWR_MEASPWR_IRT1_DELAY_T;
  1647. // measpwr__irt1outflag
  1648. typedef union {
  1649. uint32_t v;
  1650. struct
  1651. {
  1652. uint32_t subf_num : 9; // [8:0], read only
  1653. uint32_t __11_9 : 3; // [11:9]
  1654. uint32_t irt_validflag : 1; // [12], read only
  1655. uint32_t __31_13 : 19; // [31:13]
  1656. } b;
  1657. } REG_MEASPWR_MEASPWR__IRT1OUTFLAG_T;
  1658. // measpwr_irt2_delay
  1659. typedef union {
  1660. uint32_t v;
  1661. struct
  1662. {
  1663. uint32_t irt_delay : 16; // [15:0], read only
  1664. uint32_t __31_16 : 16; // [31:16]
  1665. } b;
  1666. } REG_MEASPWR_MEASPWR_IRT2_DELAY_T;
  1667. // measpwr__irt2outflag
  1668. typedef union {
  1669. uint32_t v;
  1670. struct
  1671. {
  1672. uint32_t subf_num : 9; // [8:0], read only
  1673. uint32_t __11_9 : 3; // [11:9]
  1674. uint32_t irt_validflag : 1; // [12], read only
  1675. uint32_t __31_13 : 19; // [31:13]
  1676. } b;
  1677. } REG_MEASPWR_MEASPWR__IRT2OUTFLAG_T;
  1678. // measpwr_irt3_delay
  1679. typedef union {
  1680. uint32_t v;
  1681. struct
  1682. {
  1683. uint32_t irt_delay : 16; // [15:0], read only
  1684. uint32_t __31_16 : 16; // [31:16]
  1685. } b;
  1686. } REG_MEASPWR_MEASPWR_IRT3_DELAY_T;
  1687. // measpwr__irt3outflag
  1688. typedef union {
  1689. uint32_t v;
  1690. struct
  1691. {
  1692. uint32_t subf_num : 9; // [8:0], read only
  1693. uint32_t __11_9 : 3; // [11:9]
  1694. uint32_t irt_validflag : 1; // [12], read only
  1695. uint32_t __31_13 : 19; // [31:13]
  1696. } b;
  1697. } REG_MEASPWR_MEASPWR__IRT3OUTFLAG_T;
  1698. // measpwr_irt4_delay
  1699. typedef union {
  1700. uint32_t v;
  1701. struct
  1702. {
  1703. uint32_t irt_delay : 16; // [15:0], read only
  1704. uint32_t __31_16 : 16; // [31:16]
  1705. } b;
  1706. } REG_MEASPWR_MEASPWR_IRT4_DELAY_T;
  1707. // measpwr__irt4outflag
  1708. typedef union {
  1709. uint32_t v;
  1710. struct
  1711. {
  1712. uint32_t subf_num : 9; // [8:0], read only
  1713. uint32_t __11_9 : 3; // [11:9]
  1714. uint32_t irt_validflag : 1; // [12], read only
  1715. uint32_t __31_13 : 19; // [31:13]
  1716. } b;
  1717. } REG_MEASPWR_MEASPWR__IRT4OUTFLAG_T;
  1718. // measpwr_irt5_delay
  1719. typedef union {
  1720. uint32_t v;
  1721. struct
  1722. {
  1723. uint32_t irt_delay : 16; // [15:0], read only
  1724. uint32_t __31_16 : 16; // [31:16]
  1725. } b;
  1726. } REG_MEASPWR_MEASPWR_IRT5_DELAY_T;
  1727. // measpwr__irt5outflag
  1728. typedef union {
  1729. uint32_t v;
  1730. struct
  1731. {
  1732. uint32_t subf_num : 9; // [8:0], read only
  1733. uint32_t __11_9 : 3; // [11:9]
  1734. uint32_t irt_validflag : 1; // [12], read only
  1735. uint32_t __31_13 : 19; // [31:13]
  1736. } b;
  1737. } REG_MEASPWR_MEASPWR__IRT5OUTFLAG_T;
  1738. // measpwr_irt6_delay
  1739. typedef union {
  1740. uint32_t v;
  1741. struct
  1742. {
  1743. uint32_t irt_delay : 16; // [15:0], read only
  1744. uint32_t __31_16 : 16; // [31:16]
  1745. } b;
  1746. } REG_MEASPWR_MEASPWR_IRT6_DELAY_T;
  1747. // measpwr__irt6outflag
  1748. typedef union {
  1749. uint32_t v;
  1750. struct
  1751. {
  1752. uint32_t subf_num : 9; // [8:0], read only
  1753. uint32_t __11_9 : 3; // [11:9]
  1754. uint32_t irt_validflag : 1; // [12], read only
  1755. uint32_t __31_13 : 19; // [31:13]
  1756. } b;
  1757. } REG_MEASPWR_MEASPWR__IRT6OUTFLAG_T;
  1758. // measpwr_irt7_delay
  1759. typedef union {
  1760. uint32_t v;
  1761. struct
  1762. {
  1763. uint32_t irt_delay : 16; // [15:0], read only
  1764. uint32_t __31_16 : 16; // [31:16]
  1765. } b;
  1766. } REG_MEASPWR_MEASPWR_IRT7_DELAY_T;
  1767. // measpwr__irt7outflag
  1768. typedef union {
  1769. uint32_t v;
  1770. struct
  1771. {
  1772. uint32_t subf_num : 9; // [8:0], read only
  1773. uint32_t __11_9 : 3; // [11:9]
  1774. uint32_t irt_validflag : 1; // [12], read only
  1775. uint32_t __31_13 : 19; // [31:13]
  1776. } b;
  1777. } REG_MEASPWR_MEASPWR__IRT7OUTFLAG_T;
  1778. // measpwr_irt8_delay
  1779. typedef union {
  1780. uint32_t v;
  1781. struct
  1782. {
  1783. uint32_t irt_delay : 16; // [15:0], read only
  1784. uint32_t __31_16 : 16; // [31:16]
  1785. } b;
  1786. } REG_MEASPWR_MEASPWR_IRT8_DELAY_T;
  1787. // measpwr__irt8outflag
  1788. typedef union {
  1789. uint32_t v;
  1790. struct
  1791. {
  1792. uint32_t subf_num : 9; // [8:0], read only
  1793. uint32_t __11_9 : 3; // [11:9]
  1794. uint32_t irt_validflag : 1; // [12], read only
  1795. uint32_t __31_13 : 19; // [31:13]
  1796. } b;
  1797. } REG_MEASPWR_MEASPWR__IRT8OUTFLAG_T;
  1798. // measpwr_trms1_out
  1799. typedef union {
  1800. uint32_t v;
  1801. struct
  1802. {
  1803. uint32_t trms_delay : 16; // [15:0], read only
  1804. uint32_t __31_16 : 16; // [31:16]
  1805. } b;
  1806. } REG_MEASPWR_MEASPWR_TRMS1_OUT_T;
  1807. // measpwr_trms2_out
  1808. typedef union {
  1809. uint32_t v;
  1810. struct
  1811. {
  1812. uint32_t trms_delay : 16; // [15:0], read only
  1813. uint32_t __31_16 : 16; // [31:16]
  1814. } b;
  1815. } REG_MEASPWR_MEASPWR_TRMS2_OUT_T;
  1816. // measpwr_id_info
  1817. typedef union {
  1818. uint32_t v;
  1819. struct
  1820. {
  1821. uint32_t id1_info : 16; // [15:0], read only
  1822. uint32_t id2_info : 16; // [31:16], read only
  1823. } b;
  1824. } REG_MEASPWR_MEASPWR_ID_INFO_T;
  1825. // measpwr_rbis_para
  1826. typedef union {
  1827. uint32_t v;
  1828. struct
  1829. {
  1830. uint32_t rbis_factor : 16; // [15:0]
  1831. uint32_t rbis_dipos : 7; // [22:16]
  1832. uint32_t rbis_num : 3; // [25:23]
  1833. uint32_t rbis_posen : 1; // [26]
  1834. uint32_t rbis_en : 1; // [27]
  1835. uint32_t rbis_judge : 1; // [28]
  1836. uint32_t rbis_correct : 1; // [29]
  1837. uint32_t __31_30 : 2; // [31:30]
  1838. } b;
  1839. } REG_MEASPWR_MEASPWR_RBIS_PARA_T;
  1840. // measpwr_rbis_out1
  1841. typedef union {
  1842. uint32_t v;
  1843. struct
  1844. {
  1845. uint32_t rbis_out0 : 7; // [6:0], read only
  1846. uint32_t __7_7 : 1; // [7]
  1847. uint32_t rbis_out1 : 7; // [14:8], read only
  1848. uint32_t __15_15 : 1; // [15]
  1849. uint32_t rbis_out2 : 7; // [22:16], read only
  1850. uint32_t __23_23 : 1; // [23]
  1851. uint32_t rbis_out3 : 7; // [30:24], read only
  1852. uint32_t __31_31 : 1; // [31]
  1853. } b;
  1854. } REG_MEASPWR_MEASPWR_RBIS_OUT1_T;
  1855. // measpwr_rbis_out2
  1856. typedef union {
  1857. uint32_t v;
  1858. struct
  1859. {
  1860. uint32_t rbis_out4 : 7; // [6:0], read only
  1861. uint32_t __7_7 : 1; // [7]
  1862. uint32_t rbis_num : 3; // [10:8], read only
  1863. uint32_t __31_11 : 21; // [31:11]
  1864. } b;
  1865. } REG_MEASPWR_MEASPWR_RBIS_OUT2_T;
  1866. // measpwr_rbis_max
  1867. typedef union {
  1868. uint32_t v;
  1869. struct
  1870. {
  1871. uint32_t rbis_max : 25; // [24:0], read only
  1872. uint32_t __31_25 : 7; // [31:25]
  1873. } b;
  1874. } REG_MEASPWR_MEASPWR_RBIS_MAX_T;
  1875. // measpwr_rx_irt
  1876. typedef union {
  1877. uint32_t v;
  1878. struct
  1879. {
  1880. uint32_t id1_rx_irt : 5; // [4:0], read only
  1881. uint32_t id1_offset4 : 10; // [14:5], read only
  1882. uint32_t __15_15 : 1; // [15]
  1883. uint32_t id2_rx_irt : 5; // [20:16], read only
  1884. uint32_t id2_offset4 : 10; // [30:21], read only
  1885. uint32_t __31_31 : 1; // [31]
  1886. } b;
  1887. } REG_MEASPWR_MEASPWR_RX_IRT_T;
  1888. // measpwr_debug1
  1889. typedef union {
  1890. uint32_t v;
  1891. struct
  1892. {
  1893. uint32_t datain_state : 3; // [2:0], read only
  1894. uint32_t __3_3 : 1; // [3]
  1895. uint32_t datagen_state : 11; // [14:4], read only
  1896. uint32_t __15_15 : 1; // [15]
  1897. uint32_t din_id_sel : 3; // [18:16], read only
  1898. uint32_t __19_19 : 1; // [19]
  1899. uint32_t offset2_update : 1; // [20], read only
  1900. uint32_t id_update : 1; // [21], read only
  1901. uint32_t debug_update_flag : 1; // [22], read only
  1902. uint32_t debug_rev_flag : 1; // [23], read only
  1903. uint32_t __31_24 : 8; // [31:24]
  1904. } b;
  1905. } REG_MEASPWR_MEASPWR_DEBUG1_T;
  1906. // measpwr_debug2
  1907. typedef union {
  1908. uint32_t v;
  1909. struct
  1910. {
  1911. uint32_t inmem_cont : 16; // [15:0], read only
  1912. uint32_t invalid_data_cont : 15; // [30:16], read only
  1913. uint32_t inmem_in_act : 1; // [31], read only
  1914. } b;
  1915. } REG_MEASPWR_MEASPWR_DEBUG2_T;
  1916. // measpwr_debug3
  1917. typedef union {
  1918. uint32_t v;
  1919. struct
  1920. {
  1921. uint32_t func_state : 9; // [8:0], read only
  1922. uint32_t __11_9 : 3; // [11:9]
  1923. uint32_t pow_state : 5; // [16:12], read only
  1924. uint32_t __19_17 : 3; // [19:17]
  1925. uint32_t func_id_sel : 3; // [22:20], read only
  1926. uint32_t __23_23 : 1; // [23]
  1927. uint32_t datain_state_cur : 3; // [26:24], read only
  1928. uint32_t __31_27 : 5; // [31:27]
  1929. } b;
  1930. } REG_MEASPWR_MEASPWR_DEBUG3_T;
  1931. // measpwr_sigma6_agc_out
  1932. typedef union {
  1933. uint32_t v;
  1934. struct
  1935. {
  1936. uint32_t baseagc6_out : 10; // [9:0], read only
  1937. uint32_t __15_10 : 6; // [15:10]
  1938. uint32_t sinr6_log_out : 11; // [26:16], read only
  1939. uint32_t __31_27 : 5; // [31:27]
  1940. } b;
  1941. } REG_MEASPWR_MEASPWR_SIGMA6_AGC_OUT_T;
  1942. // measpwr_sigma7_agc_out
  1943. typedef union {
  1944. uint32_t v;
  1945. struct
  1946. {
  1947. uint32_t baseagc7_out : 10; // [9:0], read only
  1948. uint32_t __15_10 : 6; // [15:10]
  1949. uint32_t sinr7_log_out : 11; // [26:16], read only
  1950. uint32_t __31_27 : 5; // [31:27]
  1951. } b;
  1952. } REG_MEASPWR_MEASPWR_SIGMA7_AGC_OUT_T;
  1953. // measpwr_sigma8_agc_out
  1954. typedef union {
  1955. uint32_t v;
  1956. struct
  1957. {
  1958. uint32_t baseagc8_out : 10; // [9:0], read only
  1959. uint32_t __15_10 : 6; // [15:10]
  1960. uint32_t sinr8_log_out : 11; // [26:16], read only
  1961. uint32_t __31_27 : 5; // [31:27]
  1962. } b;
  1963. } REG_MEASPWR_MEASPWR_SIGMA8_AGC_OUT_T;
  1964. // measpwr_afc_soft_reect2
  1965. typedef union {
  1966. uint32_t v;
  1967. struct
  1968. {
  1969. uint32_t afc_soft_fa_ctor2 : 16; // [15:0]
  1970. uint32_t __31_16 : 16; // [31:16]
  1971. } b;
  1972. } REG_MEASPWR_MEASPWR_AFC_SOFT_REECT2_T;
  1973. // measpwr_afc_soft_reect3
  1974. typedef union {
  1975. uint32_t v;
  1976. struct
  1977. {
  1978. uint32_t afc_soft_fa_ctor3 : 16; // [15:0]
  1979. uint32_t __31_16 : 16; // [31:16]
  1980. } b;
  1981. } REG_MEASPWR_MEASPWR_AFC_SOFT_REECT3_T;
  1982. // measpwr_afc_soft_reect4
  1983. typedef union {
  1984. uint32_t v;
  1985. struct
  1986. {
  1987. uint32_t afc_soft_fa_ctor4 : 16; // [15:0]
  1988. uint32_t __31_16 : 16; // [31:16]
  1989. } b;
  1990. } REG_MEASPWR_MEASPWR_AFC_SOFT_REECT4_T;
  1991. // measpwr_afc_soft_reect5
  1992. typedef union {
  1993. uint32_t v;
  1994. struct
  1995. {
  1996. uint32_t afc_soft_fa_ctor5 : 16; // [15:0]
  1997. uint32_t __31_16 : 16; // [31:16]
  1998. } b;
  1999. } REG_MEASPWR_MEASPWR_AFC_SOFT_REECT5_T;
  2000. // measpwr_afc_soft_reect6
  2001. typedef union {
  2002. uint32_t v;
  2003. struct
  2004. {
  2005. uint32_t afc_soft_fa_ctor6 : 16; // [15:0]
  2006. uint32_t __31_16 : 16; // [31:16]
  2007. } b;
  2008. } REG_MEASPWR_MEASPWR_AFC_SOFT_REECT6_T;
  2009. // measpwr_afc_soft_reect7
  2010. typedef union {
  2011. uint32_t v;
  2012. struct
  2013. {
  2014. uint32_t afc_soft_fa_ctor7 : 16; // [15:0]
  2015. uint32_t __31_16 : 16; // [31:16]
  2016. } b;
  2017. } REG_MEASPWR_MEASPWR_AFC_SOFT_REECT7_T;
  2018. // measpwr_afc_soft_reect8
  2019. typedef union {
  2020. uint32_t v;
  2021. struct
  2022. {
  2023. uint32_t afc_soft_fa_ctor8 : 16; // [15:0]
  2024. uint32_t __31_16 : 16; // [31:16]
  2025. } b;
  2026. } REG_MEASPWR_MEASPWR_AFC_SOFT_REECT8_T;
  2027. // measpwr_doppler_para2
  2028. typedef union {
  2029. uint32_t v;
  2030. struct
  2031. {
  2032. uint32_t doppler_alpha2 : 17; // [16:0]
  2033. uint32_t __31_17 : 15; // [31:17]
  2034. } b;
  2035. } REG_MEASPWR_MEASPWR_DOPPLER_PARA2_T;
  2036. // measpwr_trmsf_para
  2037. typedef union {
  2038. uint32_t v;
  2039. struct
  2040. {
  2041. uint32_t trmsf_alpha : 17; // [16:0]
  2042. uint32_t __19_17 : 3; // [19:17]
  2043. uint32_t trmsf_space : 2; // [21:20]
  2044. uint32_t __23_22 : 2; // [23:22]
  2045. uint32_t trmsf_scale : 4; // [27:24]
  2046. uint32_t __31_28 : 4; // [31:28]
  2047. } b;
  2048. } REG_MEASPWR_MEASPWR_TRMSF_PARA_T;
  2049. // measpwr_id3_para2
  2050. typedef union {
  2051. uint32_t v;
  2052. struct
  2053. {
  2054. uint32_t frame_map : 10; // [9:0]
  2055. uint32_t __11_10 : 2; // [11:10]
  2056. uint32_t pow_data_sel : 2; // [13:12]
  2057. uint32_t irt_scale_disable : 1; // [14]
  2058. uint32_t qf_mem_sel : 1; // [15]
  2059. uint32_t offline0_step : 9; // [24:16]
  2060. uint32_t __31_25 : 7; // [31:25]
  2061. } b;
  2062. } REG_MEASPWR_MEASPWR_ID3_PARA2_T;
  2063. // measpwr_id4_para2
  2064. typedef union {
  2065. uint32_t v;
  2066. struct
  2067. {
  2068. uint32_t frame_map : 10; // [9:0]
  2069. uint32_t __11_10 : 2; // [11:10]
  2070. uint32_t pow_data_sel : 2; // [13:12]
  2071. uint32_t irt_scale_disable : 1; // [14]
  2072. uint32_t qf_mem_sel : 1; // [15]
  2073. uint32_t offline0_step : 9; // [24:16]
  2074. uint32_t __31_25 : 7; // [31:25]
  2075. } b;
  2076. } REG_MEASPWR_MEASPWR_ID4_PARA2_T;
  2077. // measpwr_id5_para2
  2078. typedef union {
  2079. uint32_t v;
  2080. struct
  2081. {
  2082. uint32_t frame_map : 10; // [9:0]
  2083. uint32_t __11_10 : 2; // [11:10]
  2084. uint32_t pow_data_sel : 2; // [13:12]
  2085. uint32_t irt_scale_disable : 1; // [14]
  2086. uint32_t qf_mem_sel : 1; // [15]
  2087. uint32_t offline0_step : 9; // [24:16]
  2088. uint32_t __31_25 : 7; // [31:25]
  2089. } b;
  2090. } REG_MEASPWR_MEASPWR_ID5_PARA2_T;
  2091. // measpwr_id6_para2
  2092. typedef union {
  2093. uint32_t v;
  2094. struct
  2095. {
  2096. uint32_t frame_map : 10; // [9:0]
  2097. uint32_t __11_10 : 2; // [11:10]
  2098. uint32_t pow_data_sel : 2; // [13:12]
  2099. uint32_t irt_scale_disable : 1; // [14]
  2100. uint32_t qf_mem_sel : 1; // [15]
  2101. uint32_t offline0_step : 9; // [24:16]
  2102. uint32_t __31_25 : 7; // [31:25]
  2103. } b;
  2104. } REG_MEASPWR_MEASPWR_ID6_PARA2_T;
  2105. // measpwr_id7_para2
  2106. typedef union {
  2107. uint32_t v;
  2108. struct
  2109. {
  2110. uint32_t frame_map : 10; // [9:0]
  2111. uint32_t __11_10 : 2; // [11:10]
  2112. uint32_t pow_data_sel : 2; // [13:12]
  2113. uint32_t irt_scale_disable : 1; // [14]
  2114. uint32_t qf_mem_sel : 1; // [15]
  2115. uint32_t offline0_step : 9; // [24:16]
  2116. uint32_t __31_25 : 7; // [31:25]
  2117. } b;
  2118. } REG_MEASPWR_MEASPWR_ID7_PARA2_T;
  2119. // measpwr_id8_para2
  2120. typedef union {
  2121. uint32_t v;
  2122. struct
  2123. {
  2124. uint32_t frame_map : 10; // [9:0]
  2125. uint32_t __11_10 : 2; // [11:10]
  2126. uint32_t pow_data_sel : 2; // [13:12]
  2127. uint32_t irt_scale_disable : 1; // [14]
  2128. uint32_t qf_mem_sel : 1; // [15]
  2129. uint32_t offline0_step : 9; // [24:16]
  2130. uint32_t __31_25 : 7; // [31:25]
  2131. } b;
  2132. } REG_MEASPWR_MEASPWR_ID8_PARA2_T;
  2133. // measpwr_afc1_hst
  2134. typedef union {
  2135. uint32_t v;
  2136. struct
  2137. {
  2138. uint32_t afc_hst : 16; // [15:0], read only
  2139. uint32_t __31_16 : 16; // [31:16]
  2140. } b;
  2141. } REG_MEASPWR_MEASPWR_AFC1_HST_T;
  2142. // measpwr_afc2_hst
  2143. typedef union {
  2144. uint32_t v;
  2145. struct
  2146. {
  2147. uint32_t afc_hst : 16; // [15:0], read only
  2148. uint32_t __31_16 : 16; // [31:16]
  2149. } b;
  2150. } REG_MEASPWR_MEASPWR_AFC2_HST_T;
  2151. // measpwr_afc3_hst
  2152. typedef union {
  2153. uint32_t v;
  2154. struct
  2155. {
  2156. uint32_t afc_hst : 16; // [15:0], read only
  2157. uint32_t __31_16 : 16; // [31:16]
  2158. } b;
  2159. } REG_MEASPWR_MEASPWR_AFC3_HST_T;
  2160. // measpwr_afc4_hst
  2161. typedef union {
  2162. uint32_t v;
  2163. struct
  2164. {
  2165. uint32_t afc_hst : 16; // [15:0], read only
  2166. uint32_t __31_16 : 16; // [31:16]
  2167. } b;
  2168. } REG_MEASPWR_MEASPWR_AFC4_HST_T;
  2169. // measpwr_afc5_hst
  2170. typedef union {
  2171. uint32_t v;
  2172. struct
  2173. {
  2174. uint32_t afc_hst : 16; // [15:0], read only
  2175. uint32_t __31_16 : 16; // [31:16]
  2176. } b;
  2177. } REG_MEASPWR_MEASPWR_AFC5_HST_T;
  2178. // measpwr_afc6_hst
  2179. typedef union {
  2180. uint32_t v;
  2181. struct
  2182. {
  2183. uint32_t afc_hst : 16; // [15:0], read only
  2184. uint32_t __31_16 : 16; // [31:16]
  2185. } b;
  2186. } REG_MEASPWR_MEASPWR_AFC6_HST_T;
  2187. // measpwr_afc7_hst
  2188. typedef union {
  2189. uint32_t v;
  2190. struct
  2191. {
  2192. uint32_t afc_hst : 16; // [15:0], read only
  2193. uint32_t __31_16 : 16; // [31:16]
  2194. } b;
  2195. } REG_MEASPWR_MEASPWR_AFC7_HST_T;
  2196. // measpwr_afc8_hst
  2197. typedef union {
  2198. uint32_t v;
  2199. struct
  2200. {
  2201. uint32_t afc_hst : 16; // [15:0], read only
  2202. uint32_t __31_16 : 16; // [31:16]
  2203. } b;
  2204. } REG_MEASPWR_MEASPWR_AFC8_HST_T;
  2205. // measpwr_doppler3_out
  2206. typedef union {
  2207. uint32_t v;
  2208. struct
  2209. {
  2210. uint32_t doppler3_out : 11; // [10:0], read only
  2211. uint32_t __15_11 : 5; // [15:11]
  2212. uint32_t hls_agc_base3 : 10; // [25:16], read only
  2213. uint32_t __31_26 : 6; // [31:26]
  2214. } b;
  2215. } REG_MEASPWR_MEASPWR_DOPPLER3_OUT_T;
  2216. // measpwr_doppler4_out
  2217. typedef union {
  2218. uint32_t v;
  2219. struct
  2220. {
  2221. uint32_t doppler4_out : 11; // [10:0], read only
  2222. uint32_t __15_11 : 5; // [15:11]
  2223. uint32_t hls_agc_base4 : 10; // [25:16], read only
  2224. uint32_t __31_26 : 6; // [31:26]
  2225. } b;
  2226. } REG_MEASPWR_MEASPWR_DOPPLER4_OUT_T;
  2227. // measpwr_doppler5_out
  2228. typedef union {
  2229. uint32_t v;
  2230. struct
  2231. {
  2232. uint32_t doppler5_out : 11; // [10:0], read only
  2233. uint32_t __15_11 : 5; // [15:11]
  2234. uint32_t hls_agc_base5 : 10; // [25:16], read only
  2235. uint32_t __31_26 : 6; // [31:26]
  2236. } b;
  2237. } REG_MEASPWR_MEASPWR_DOPPLER5_OUT_T;
  2238. // measpwr_doppler6_out
  2239. typedef union {
  2240. uint32_t v;
  2241. struct
  2242. {
  2243. uint32_t doppler6_out : 11; // [10:0], read only
  2244. uint32_t __15_11 : 5; // [15:11]
  2245. uint32_t hls_agc_base6 : 10; // [25:16], read only
  2246. uint32_t __31_26 : 6; // [31:26]
  2247. } b;
  2248. } REG_MEASPWR_MEASPWR_DOPPLER6_OUT_T;
  2249. // measpwr_doppler7_out
  2250. typedef union {
  2251. uint32_t v;
  2252. struct
  2253. {
  2254. uint32_t doppler7_out : 11; // [10:0], read only
  2255. uint32_t __15_11 : 5; // [15:11]
  2256. uint32_t hls_agc_base7 : 10; // [25:16], read only
  2257. uint32_t __31_26 : 6; // [31:26]
  2258. } b;
  2259. } REG_MEASPWR_MEASPWR_DOPPLER7_OUT_T;
  2260. // measpwr_doppler8_out
  2261. typedef union {
  2262. uint32_t v;
  2263. struct
  2264. {
  2265. uint32_t doppler8_out : 11; // [10:0], read only
  2266. uint32_t __15_11 : 5; // [15:11]
  2267. uint32_t hls_agc_base8 : 10; // [25:16], read only
  2268. uint32_t __31_26 : 6; // [31:26]
  2269. } b;
  2270. } REG_MEASPWR_MEASPWR_DOPPLER8_OUT_T;
  2271. // measpwr_pow1_max
  2272. typedef union {
  2273. uint32_t v;
  2274. struct
  2275. {
  2276. uint32_t pow_max_addr : 7; // [6:0], read only
  2277. uint32_t pow_max : 25; // [31:7], read only
  2278. } b;
  2279. } REG_MEASPWR_MEASPWR_POW1_MAX_T;
  2280. // measpwr_pow2_max
  2281. typedef union {
  2282. uint32_t v;
  2283. struct
  2284. {
  2285. uint32_t pow_max_addr : 7; // [6:0], read only
  2286. uint32_t pow_max : 25; // [31:7], read only
  2287. } b;
  2288. } REG_MEASPWR_MEASPWR_POW2_MAX_T;
  2289. // measpwr_pow3_max
  2290. typedef union {
  2291. uint32_t v;
  2292. struct
  2293. {
  2294. uint32_t pow_max_addr : 7; // [6:0], read only
  2295. uint32_t pow_max : 25; // [31:7], read only
  2296. } b;
  2297. } REG_MEASPWR_MEASPWR_POW3_MAX_T;
  2298. // measpwr_pow4_max
  2299. typedef union {
  2300. uint32_t v;
  2301. struct
  2302. {
  2303. uint32_t pow_max_addr : 7; // [6:0], read only
  2304. uint32_t pow_max : 25; // [31:7], read only
  2305. } b;
  2306. } REG_MEASPWR_MEASPWR_POW4_MAX_T;
  2307. // measpwr_pow5_max
  2308. typedef union {
  2309. uint32_t v;
  2310. struct
  2311. {
  2312. uint32_t pow_max_addr : 7; // [6:0], read only
  2313. uint32_t pow_max : 25; // [31:7], read only
  2314. } b;
  2315. } REG_MEASPWR_MEASPWR_POW5_MAX_T;
  2316. // measpwr_pow6_max
  2317. typedef union {
  2318. uint32_t v;
  2319. struct
  2320. {
  2321. uint32_t pow_max_addr : 7; // [6:0], read only
  2322. uint32_t pow_max : 25; // [31:7], read only
  2323. } b;
  2324. } REG_MEASPWR_MEASPWR_POW6_MAX_T;
  2325. // measpwr_pow7_max
  2326. typedef union {
  2327. uint32_t v;
  2328. struct
  2329. {
  2330. uint32_t pow_max_addr : 7; // [6:0], read only
  2331. uint32_t pow_max : 25; // [31:7], read only
  2332. } b;
  2333. } REG_MEASPWR_MEASPWR_POW7_MAX_T;
  2334. // measpwr_pow8_max
  2335. typedef union {
  2336. uint32_t v;
  2337. struct
  2338. {
  2339. uint32_t pow_max_addr : 7; // [6:0], read only
  2340. uint32_t pow_max : 25; // [31:7], read only
  2341. } b;
  2342. } REG_MEASPWR_MEASPWR_POW8_MAX_T;
  2343. // measpwr_trms3_out
  2344. typedef union {
  2345. uint32_t v;
  2346. struct
  2347. {
  2348. uint32_t trms_delay : 16; // [15:0], read only
  2349. uint32_t __31_16 : 16; // [31:16]
  2350. } b;
  2351. } REG_MEASPWR_MEASPWR_TRMS3_OUT_T;
  2352. // measpwr_trms4_out
  2353. typedef union {
  2354. uint32_t v;
  2355. struct
  2356. {
  2357. uint32_t trms_delay : 16; // [15:0], read only
  2358. uint32_t __31_16 : 16; // [31:16]
  2359. } b;
  2360. } REG_MEASPWR_MEASPWR_TRMS4_OUT_T;
  2361. // measpwr_trms5_out
  2362. typedef union {
  2363. uint32_t v;
  2364. struct
  2365. {
  2366. uint32_t trms_delay : 16; // [15:0], read only
  2367. uint32_t __31_16 : 16; // [31:16]
  2368. } b;
  2369. } REG_MEASPWR_MEASPWR_TRMS5_OUT_T;
  2370. // measpwr_trms6_out
  2371. typedef union {
  2372. uint32_t v;
  2373. struct
  2374. {
  2375. uint32_t trms_delay : 16; // [15:0], read only
  2376. uint32_t __31_16 : 16; // [31:16]
  2377. } b;
  2378. } REG_MEASPWR_MEASPWR_TRMS6_OUT_T;
  2379. // measpwr_trms7_out
  2380. typedef union {
  2381. uint32_t v;
  2382. struct
  2383. {
  2384. uint32_t trms_delay : 16; // [15:0], read only
  2385. uint32_t __31_16 : 16; // [31:16]
  2386. } b;
  2387. } REG_MEASPWR_MEASPWR_TRMS7_OUT_T;
  2388. // measpwr_trms8_out
  2389. typedef union {
  2390. uint32_t v;
  2391. struct
  2392. {
  2393. uint32_t trms_delay : 16; // [15:0], read only
  2394. uint32_t __31_16 : 16; // [31:16]
  2395. } b;
  2396. } REG_MEASPWR_MEASPWR_TRMS8_OUT_T;
  2397. // measpwr_reis_conf
  2398. typedef union {
  2399. uint32_t v;
  2400. struct
  2401. {
  2402. uint32_t reis_num : 4; // [3:0]
  2403. uint32_t reis_en : 1; // [4]
  2404. uint32_t reis_dc_en : 1; // [5]
  2405. uint32_t __31_6 : 26; // [31:6]
  2406. } b;
  2407. } REG_MEASPWR_MEASPWR_REIS_CONF_T;
  2408. // measpwr_reis_pos0
  2409. typedef union {
  2410. uint32_t v;
  2411. struct
  2412. {
  2413. uint32_t reis_re0 : 11; // [10:0]
  2414. uint32_t __15_11 : 5; // [15:11]
  2415. uint32_t reis_re1 : 11; // [26:16]
  2416. uint32_t __31_27 : 5; // [31:27]
  2417. } b;
  2418. } REG_MEASPWR_MEASPWR_REIS_POS0_T;
  2419. // measpwr_reis_pos1
  2420. typedef union {
  2421. uint32_t v;
  2422. struct
  2423. {
  2424. uint32_t reis_re2 : 11; // [10:0]
  2425. uint32_t __15_11 : 5; // [15:11]
  2426. uint32_t reis_re3 : 11; // [26:16]
  2427. uint32_t __31_27 : 5; // [31:27]
  2428. } b;
  2429. } REG_MEASPWR_MEASPWR_REIS_POS1_T;
  2430. // measpwr_reis_pos2
  2431. typedef union {
  2432. uint32_t v;
  2433. struct
  2434. {
  2435. uint32_t reis_re4 : 11; // [10:0]
  2436. uint32_t __15_11 : 5; // [15:11]
  2437. uint32_t reis_re5 : 11; // [26:16]
  2438. uint32_t __31_27 : 5; // [31:27]
  2439. } b;
  2440. } REG_MEASPWR_MEASPWR_REIS_POS2_T;
  2441. // measpwr_reis_pos3
  2442. typedef union {
  2443. uint32_t v;
  2444. struct
  2445. {
  2446. uint32_t reis_re6 : 11; // [10:0]
  2447. uint32_t __15_11 : 5; // [15:11]
  2448. uint32_t reis_re7 : 11; // [26:16]
  2449. uint32_t __31_27 : 5; // [31:27]
  2450. } b;
  2451. } REG_MEASPWR_MEASPWR_REIS_POS3_T;
  2452. // measpwr_offline0_sel
  2453. typedef union {
  2454. uint32_t v;
  2455. struct
  2456. {
  2457. uint32_t decision_flag : 2; // [1:0]
  2458. uint32_t __3_2 : 2; // [3:2]
  2459. uint32_t jump_flag : 2; // [5:4]
  2460. uint32_t __7_6 : 2; // [7:6]
  2461. uint32_t pos_delay_sel : 1; // [8]
  2462. uint32_t __31_9 : 23; // [31:9]
  2463. } b;
  2464. } REG_MEASPWR_MEASPWR_OFFLINE0_SEL_T;
  2465. // measpwr_offline0_pos
  2466. typedef union {
  2467. uint32_t v;
  2468. struct
  2469. {
  2470. uint32_t id1_max_position : 4; // [3:0], read only
  2471. uint32_t id2_max_position : 4; // [7:4], read only
  2472. uint32_t id3_max_position : 4; // [11:8], read only
  2473. uint32_t id4_max_position : 4; // [15:12], read only
  2474. uint32_t id5_max_position : 4; // [19:16], read only
  2475. uint32_t id6_max_position : 4; // [23:20], read only
  2476. uint32_t id7_max_position : 4; // [27:24], read only
  2477. uint32_t id8_max_position : 4; // [31:28], read only
  2478. } b;
  2479. } REG_MEASPWR_MEASPWR_OFFLINE0_POS_T;
  2480. // measpwr_offline0_id
  2481. typedef union {
  2482. uint32_t v;
  2483. struct
  2484. {
  2485. uint32_t offline_jump_id : 4; // [3:0], read only
  2486. uint32_t tbin_position_valid_flag : 8; // [11:4], read only
  2487. uint32_t __31_12 : 20; // [31:12]
  2488. } b;
  2489. } REG_MEASPWR_MEASPWR_OFFLINE0_ID_T;
  2490. // measpwr_offline1_para
  2491. typedef union {
  2492. uint32_t v;
  2493. struct
  2494. {
  2495. uint32_t offline1_time : 5; // [4:0]
  2496. uint32_t offline1_num : 1; // [5]
  2497. uint32_t __7_6 : 2; // [7:6]
  2498. uint32_t offline1_mod_sel : 2; // [9:8]
  2499. uint32_t __11_10 : 2; // [11:10]
  2500. uint32_t first_ofdm : 1; // [12]
  2501. uint32_t __31_13 : 19; // [31:13]
  2502. } b;
  2503. } REG_MEASPWR_MEASPWR_OFFLINE1_PARA_T;
  2504. // measpwr_offline1_agc1
  2505. typedef union {
  2506. uint32_t v;
  2507. struct
  2508. {
  2509. uint32_t offline1_agc1 : 10; // [9:0]
  2510. uint32_t offline1_agc2 : 10; // [19:10]
  2511. uint32_t offline1_agc3 : 10; // [29:20]
  2512. uint32_t __31_30 : 2; // [31:30]
  2513. } b;
  2514. } REG_MEASPWR_MEASPWR_OFFLINE1_AGC1_T;
  2515. // measpwr_offline1_agc2
  2516. typedef union {
  2517. uint32_t v;
  2518. struct
  2519. {
  2520. uint32_t offline1_agc4 : 10; // [9:0]
  2521. uint32_t offline1_agc5 : 10; // [19:10]
  2522. uint32_t offline1_agc6 : 10; // [29:20]
  2523. uint32_t __31_30 : 2; // [31:30]
  2524. } b;
  2525. } REG_MEASPWR_MEASPWR_OFFLINE1_AGC2_T;
  2526. // measpwr_offline1_agc3
  2527. typedef union {
  2528. uint32_t v;
  2529. struct
  2530. {
  2531. uint32_t offline1_agc7 : 10; // [9:0]
  2532. uint32_t offline1_agc8 : 10; // [19:10]
  2533. uint32_t offline1_agc9 : 10; // [29:20]
  2534. uint32_t __31_30 : 2; // [31:30]
  2535. } b;
  2536. } REG_MEASPWR_MEASPWR_OFFLINE1_AGC3_T;
  2537. // measpwr_offline1_agc4
  2538. typedef union {
  2539. uint32_t v;
  2540. struct
  2541. {
  2542. uint32_t offline1_agc10 : 10; // [9:0]
  2543. uint32_t offline1_agc11 : 10; // [19:10]
  2544. uint32_t offline1_agc12 : 10; // [29:20]
  2545. uint32_t __31_30 : 2; // [31:30]
  2546. } b;
  2547. } REG_MEASPWR_MEASPWR_OFFLINE1_AGC4_T;
  2548. // measpwr_offline1_agc5
  2549. typedef union {
  2550. uint32_t v;
  2551. struct
  2552. {
  2553. uint32_t offline1_agc13 : 10; // [9:0]
  2554. uint32_t offline1_agc14 : 10; // [19:10]
  2555. uint32_t offline1_agc15 : 10; // [29:20]
  2556. uint32_t __31_30 : 2; // [31:30]
  2557. } b;
  2558. } REG_MEASPWR_MEASPWR_OFFLINE1_AGC5_T;
  2559. // measpwr_offline1_agc6
  2560. typedef union {
  2561. uint32_t v;
  2562. struct
  2563. {
  2564. uint32_t offline1_agc16 : 10; // [9:0]
  2565. uint32_t offline1_agc17 : 10; // [19:10]
  2566. uint32_t offline1_agc18 : 10; // [29:20]
  2567. uint32_t __31_30 : 2; // [31:30]
  2568. } b;
  2569. } REG_MEASPWR_MEASPWR_OFFLINE1_AGC6_T;
  2570. // measpwr_crs_rssi1_agc1
  2571. typedef union {
  2572. uint32_t v;
  2573. struct
  2574. {
  2575. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2576. uint32_t __31_10 : 22; // [31:10]
  2577. } b;
  2578. } REG_MEASPWR_MEASPWR_CRS_RSSI1_AGC1_T;
  2579. // measpwr_crs_rssi1_agc2
  2580. typedef union {
  2581. uint32_t v;
  2582. struct
  2583. {
  2584. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2585. uint32_t __31_10 : 22; // [31:10]
  2586. } b;
  2587. } REG_MEASPWR_MEASPWR_CRS_RSSI1_AGC2_T;
  2588. // measpwr_crs_rssi1_agc3
  2589. typedef union {
  2590. uint32_t v;
  2591. struct
  2592. {
  2593. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2594. uint32_t __31_10 : 22; // [31:10]
  2595. } b;
  2596. } REG_MEASPWR_MEASPWR_CRS_RSSI1_AGC3_T;
  2597. // measpwr_crs_rssi2_agc1
  2598. typedef union {
  2599. uint32_t v;
  2600. struct
  2601. {
  2602. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2603. uint32_t __31_10 : 22; // [31:10]
  2604. } b;
  2605. } REG_MEASPWR_MEASPWR_CRS_RSSI2_AGC1_T;
  2606. // measpwr_crs_rssi2_agc2
  2607. typedef union {
  2608. uint32_t v;
  2609. struct
  2610. {
  2611. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2612. uint32_t __31_10 : 22; // [31:10]
  2613. } b;
  2614. } REG_MEASPWR_MEASPWR_CRS_RSSI2_AGC2_T;
  2615. // measpwr_crs_rssi2_agc3
  2616. typedef union {
  2617. uint32_t v;
  2618. struct
  2619. {
  2620. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2621. uint32_t __31_10 : 22; // [31:10]
  2622. } b;
  2623. } REG_MEASPWR_MEASPWR_CRS_RSSI2_AGC3_T;
  2624. // measpwr_crs_rssi3_agc
  2625. typedef union {
  2626. uint32_t v;
  2627. struct
  2628. {
  2629. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2630. uint32_t __31_10 : 22; // [31:10]
  2631. } b;
  2632. } REG_MEASPWR_MEASPWR_CRS_RSSI3_AGC_T;
  2633. // measpwr_crs_rssi4_agc
  2634. typedef union {
  2635. uint32_t v;
  2636. struct
  2637. {
  2638. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2639. uint32_t __31_10 : 22; // [31:10]
  2640. } b;
  2641. } REG_MEASPWR_MEASPWR_CRS_RSSI4_AGC_T;
  2642. // measpwr_crs_rssi5_agc
  2643. typedef union {
  2644. uint32_t v;
  2645. struct
  2646. {
  2647. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2648. uint32_t __31_10 : 22; // [31:10]
  2649. } b;
  2650. } REG_MEASPWR_MEASPWR_CRS_RSSI5_AGC_T;
  2651. // measpwr_crs_rssi6_agc
  2652. typedef union {
  2653. uint32_t v;
  2654. struct
  2655. {
  2656. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2657. uint32_t __31_10 : 22; // [31:10]
  2658. } b;
  2659. } REG_MEASPWR_MEASPWR_CRS_RSSI6_AGC_T;
  2660. // measpwr_crs_rssi7_agc
  2661. typedef union {
  2662. uint32_t v;
  2663. struct
  2664. {
  2665. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2666. uint32_t __31_10 : 22; // [31:10]
  2667. } b;
  2668. } REG_MEASPWR_MEASPWR_CRS_RSSI7_AGC_T;
  2669. // measpwr_crs_rssi8_agc
  2670. typedef union {
  2671. uint32_t v;
  2672. struct
  2673. {
  2674. uint32_t crs_rssi_agc : 10; // [9:0], read only
  2675. uint32_t __31_10 : 22; // [31:10]
  2676. } b;
  2677. } REG_MEASPWR_MEASPWR_CRS_RSSI8_AGC_T;
  2678. // measpwr_hmmse_win
  2679. typedef union {
  2680. uint32_t v;
  2681. struct
  2682. {
  2683. uint32_t fh_wl_ind : 1; // [0]
  2684. uint32_t __31_1 : 31; // [31:1]
  2685. } b;
  2686. } REG_MEASPWR_MEASPWR_HMMSE_WIN_T;
  2687. // measpwr_hmmse_bitsel
  2688. typedef union {
  2689. uint32_t v;
  2690. struct
  2691. {
  2692. uint32_t fh_bitsel : 4; // [3:0]
  2693. uint32_t __31_4 : 28; // [31:4]
  2694. } b;
  2695. } REG_MEASPWR_MEASPWR_HMMSE_BITSEL_T;
  2696. // measpwr_hmmse_flag
  2697. typedef union {
  2698. uint32_t v;
  2699. struct
  2700. {
  2701. uint32_t qf_mem_mark : 2; // [1:0], read only
  2702. uint32_t __3_2 : 2; // [3:2]
  2703. uint32_t used_wl_ind : 1; // [4], read only
  2704. uint32_t __31_5 : 27; // [31:5]
  2705. } b;
  2706. } REG_MEASPWR_MEASPWR_HMMSE_FLAG_T;
  2707. // measpwr_id_info2
  2708. typedef union {
  2709. uint32_t v;
  2710. struct
  2711. {
  2712. uint32_t id38_info : 10; // [9:0], read only
  2713. uint32_t __31_10 : 22; // [31:10]
  2714. } b;
  2715. } REG_MEASPWR_MEASPWR_ID_INFO2_T;
  2716. // measpwr_inmem_mode
  2717. typedef union {
  2718. uint32_t v;
  2719. struct
  2720. {
  2721. uint32_t inmem_mode : 2; // [1:0]
  2722. uint32_t __31_2 : 30; // [31:2]
  2723. } b;
  2724. } REG_MEASPWR_MEASPWR_INMEM_MODE_T;
  2725. // measpwr_afc1_rsrp_hst
  2726. typedef union {
  2727. uint32_t v;
  2728. struct
  2729. {
  2730. uint32_t afc_rsrp1_hst : 16; // [15:0], read only
  2731. uint32_t __31_16 : 16; // [31:16]
  2732. } b;
  2733. } REG_MEASPWR_MEASPWR_AFC1_RSRP_HST_T;
  2734. // measpwr_afc2_rsrp_hst
  2735. typedef union {
  2736. uint32_t v;
  2737. struct
  2738. {
  2739. uint32_t afc_rsrp2_hst : 16; // [15:0], read only
  2740. uint32_t __31_16 : 16; // [31:16]
  2741. } b;
  2742. } REG_MEASPWR_MEASPWR_AFC2_RSRP_HST_T;
  2743. // measpwr_afc3_rsrp_hst
  2744. typedef union {
  2745. uint32_t v;
  2746. struct
  2747. {
  2748. uint32_t afc_rsrp3_hst : 16; // [15:0], read only
  2749. uint32_t __31_16 : 16; // [31:16]
  2750. } b;
  2751. } REG_MEASPWR_MEASPWR_AFC3_RSRP_HST_T;
  2752. // measpwr_afc4_rsrp_hst
  2753. typedef union {
  2754. uint32_t v;
  2755. struct
  2756. {
  2757. uint32_t afc_rsrp4_hst : 16; // [15:0], read only
  2758. uint32_t __31_16 : 16; // [31:16]
  2759. } b;
  2760. } REG_MEASPWR_MEASPWR_AFC4_RSRP_HST_T;
  2761. // measpwr_afc5_rsrp_hst
  2762. typedef union {
  2763. uint32_t v;
  2764. struct
  2765. {
  2766. uint32_t afc_rsrp5_hst : 16; // [15:0], read only
  2767. uint32_t __31_16 : 16; // [31:16]
  2768. } b;
  2769. } REG_MEASPWR_MEASPWR_AFC5_RSRP_HST_T;
  2770. // measpwr_afc6_rsrp_hst
  2771. typedef union {
  2772. uint32_t v;
  2773. struct
  2774. {
  2775. uint32_t afc_rsrp6_hst : 16; // [15:0], read only
  2776. uint32_t __31_16 : 16; // [31:16]
  2777. } b;
  2778. } REG_MEASPWR_MEASPWR_AFC6_RSRP_HST_T;
  2779. // measpwr_afc7_rsrp_hst
  2780. typedef union {
  2781. uint32_t v;
  2782. struct
  2783. {
  2784. uint32_t afc_rsrp7_hst : 16; // [15:0], read only
  2785. uint32_t __31_16 : 16; // [31:16]
  2786. } b;
  2787. } REG_MEASPWR_MEASPWR_AFC7_RSRP_HST_T;
  2788. // measpwr_afc8_rsrp_hst
  2789. typedef union {
  2790. uint32_t v;
  2791. struct
  2792. {
  2793. uint32_t afc_rsrp8_hst : 16; // [15:0], read only
  2794. uint32_t __31_16 : 16; // [31:16]
  2795. } b;
  2796. } REG_MEASPWR_MEASPWR_AFC8_RSRP_HST_T;
  2797. // measpwr_afc6_out
  2798. typedef union {
  2799. uint32_t v;
  2800. struct
  2801. {
  2802. uint32_t afc_out6 : 16; // [15:0], read only
  2803. uint32_t __31_16 : 16; // [31:16]
  2804. } b;
  2805. } REG_MEASPWR_MEASPWR_AFC6_OUT_T;
  2806. // measpwr_afc7_out
  2807. typedef union {
  2808. uint32_t v;
  2809. struct
  2810. {
  2811. uint32_t afc_out7 : 16; // [15:0], read only
  2812. uint32_t __31_16 : 16; // [31:16]
  2813. } b;
  2814. } REG_MEASPWR_MEASPWR_AFC7_OUT_T;
  2815. // measpwr_afc8_out
  2816. typedef union {
  2817. uint32_t v;
  2818. struct
  2819. {
  2820. uint32_t afc_out8 : 16; // [15:0], read only
  2821. uint32_t __31_16 : 16; // [31:16]
  2822. } b;
  2823. } REG_MEASPWR_MEASPWR_AFC8_OUT_T;
  2824. // measpwr_afc6_rsrp
  2825. typedef union {
  2826. uint32_t v;
  2827. struct
  2828. {
  2829. uint32_t afc_rsrp6 : 16; // [15:0], read only
  2830. uint32_t __31_16 : 16; // [31:16]
  2831. } b;
  2832. } REG_MEASPWR_MEASPWR_AFC6_RSRP_T;
  2833. // measpwr_afc7_rsrp
  2834. typedef union {
  2835. uint32_t v;
  2836. struct
  2837. {
  2838. uint32_t afc_rsrp7 : 16; // [15:0], read only
  2839. uint32_t __31_16 : 16; // [31:16]
  2840. } b;
  2841. } REG_MEASPWR_MEASPWR_AFC7_RSRP_T;
  2842. // measpwr_afc8_rsrp
  2843. typedef union {
  2844. uint32_t v;
  2845. struct
  2846. {
  2847. uint32_t afc_rsrp8 : 16; // [15:0], read only
  2848. uint32_t __31_16 : 16; // [31:16]
  2849. } b;
  2850. } REG_MEASPWR_MEASPWR_AFC8_RSRP_T;
  2851. // measpwr_offline1_agc7
  2852. typedef union {
  2853. uint32_t v;
  2854. struct
  2855. {
  2856. uint32_t offline1_agc19 : 10; // [9:0]
  2857. uint32_t offline1_agc20 : 10; // [19:10]
  2858. uint32_t __31_20 : 12; // [31:20]
  2859. } b;
  2860. } REG_MEASPWR_MEASPWR_OFFLINE1_AGC7_T;
  2861. // measpwr_int_join
  2862. typedef union {
  2863. uint32_t v;
  2864. struct
  2865. {
  2866. uint32_t interrupt_join_flag : 8; // [7:0]
  2867. uint32_t __31_8 : 24; // [31:8]
  2868. } b;
  2869. } REG_MEASPWR_MEASPWR_INT_JOIN_T;
  2870. // measpwr_int_mark
  2871. typedef union {
  2872. uint32_t v;
  2873. struct
  2874. {
  2875. uint32_t id1_interrupt_mark : 4; // [3:0], read only
  2876. uint32_t id2_interrupt_mark : 4; // [7:4], read only
  2877. uint32_t id3_interrupt_mark : 4; // [11:8], read only
  2878. uint32_t id4_interrupt_mark : 4; // [15:12], read only
  2879. uint32_t id5_interrupt_mark : 4; // [19:16], read only
  2880. uint32_t id6_interrupt_mark : 4; // [23:20], read only
  2881. uint32_t id7_interrupt_mark : 4; // [27:24], read only
  2882. uint32_t id8_interrupt_mark : 4; // [31:28], read only
  2883. } b;
  2884. } REG_MEASPWR_MEASPWR_INT_MARK_T;
  2885. // measpwr_int_flag
  2886. typedef union {
  2887. uint32_t v;
  2888. struct
  2889. {
  2890. uint32_t interrupt_flag : 8; // [7:0], read only
  2891. uint32_t __31_8 : 24; // [31:8]
  2892. } b;
  2893. } REG_MEASPWR_MEASPWR_INT_FLAG_T;
  2894. // measpwr_offline0_decpos1
  2895. typedef union {
  2896. uint32_t v;
  2897. struct
  2898. {
  2899. uint32_t decision_position1 : 9; // [8:0]
  2900. uint32_t decision_position2 : 9; // [17:9]
  2901. uint32_t decision_position3 : 9; // [26:18]
  2902. uint32_t __31_27 : 5; // [31:27]
  2903. } b;
  2904. } REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS1_T;
  2905. // measpwr_offline0_decpos2
  2906. typedef union {
  2907. uint32_t v;
  2908. struct
  2909. {
  2910. uint32_t decision_position1 : 9; // [8:0]
  2911. uint32_t decision_position2 : 9; // [17:9]
  2912. uint32_t decision_position3 : 9; // [26:18]
  2913. uint32_t __31_27 : 5; // [31:27]
  2914. } b;
  2915. } REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS2_T;
  2916. // measpwr_offline0_decpos3
  2917. typedef union {
  2918. uint32_t v;
  2919. struct
  2920. {
  2921. uint32_t decision_position1 : 9; // [8:0]
  2922. uint32_t decision_position2 : 9; // [17:9]
  2923. uint32_t decision_position3 : 9; // [26:18]
  2924. uint32_t __31_27 : 5; // [31:27]
  2925. } b;
  2926. } REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS3_T;
  2927. // measpwr_offline0_decpos4
  2928. typedef union {
  2929. uint32_t v;
  2930. struct
  2931. {
  2932. uint32_t decision_position1 : 9; // [8:0]
  2933. uint32_t decision_position2 : 9; // [17:9]
  2934. uint32_t decision_position3 : 9; // [26:18]
  2935. uint32_t __31_27 : 5; // [31:27]
  2936. } b;
  2937. } REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS4_T;
  2938. // measpwr_offline0_decpos5
  2939. typedef union {
  2940. uint32_t v;
  2941. struct
  2942. {
  2943. uint32_t decision_position1 : 9; // [8:0]
  2944. uint32_t decision_position2 : 9; // [17:9]
  2945. uint32_t decision_position3 : 9; // [26:18]
  2946. uint32_t __31_27 : 5; // [31:27]
  2947. } b;
  2948. } REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS5_T;
  2949. // measpwr_offline0_decpos6
  2950. typedef union {
  2951. uint32_t v;
  2952. struct
  2953. {
  2954. uint32_t decision_position1 : 9; // [8:0]
  2955. uint32_t decision_position2 : 9; // [17:9]
  2956. uint32_t decision_position3 : 9; // [26:18]
  2957. uint32_t __31_27 : 5; // [31:27]
  2958. } b;
  2959. } REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS6_T;
  2960. // measpwr_offline0_decpos7
  2961. typedef union {
  2962. uint32_t v;
  2963. struct
  2964. {
  2965. uint32_t decision_position1 : 9; // [8:0]
  2966. uint32_t decision_position2 : 9; // [17:9]
  2967. uint32_t decision_position3 : 9; // [26:18]
  2968. uint32_t __31_27 : 5; // [31:27]
  2969. } b;
  2970. } REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS7_T;
  2971. // measpwr_offline0_decpos8
  2972. typedef union {
  2973. uint32_t v;
  2974. struct
  2975. {
  2976. uint32_t decision_position1 : 9; // [8:0]
  2977. uint32_t decision_position2 : 9; // [17:9]
  2978. uint32_t decision_position3 : 9; // [26:18]
  2979. uint32_t __31_27 : 5; // [31:27]
  2980. } b;
  2981. } REG_MEASPWR_MEASPWR_OFFLINE0_DECPOS8_T;
  2982. // measpwr_rbis_para2
  2983. typedef union {
  2984. uint32_t v;
  2985. struct
  2986. {
  2987. uint32_t rbis_factor : 16; // [15:0]
  2988. uint32_t rbis_dipos : 7; // [22:16]
  2989. uint32_t rbis_num : 3; // [25:23]
  2990. uint32_t rbis_posen : 1; // [26]
  2991. uint32_t rbis_en : 1; // [27]
  2992. uint32_t rbis_judge : 1; // [28]
  2993. uint32_t rbis_correct : 1; // [29]
  2994. uint32_t __31_30 : 2; // [31:30]
  2995. } b;
  2996. } REG_MEASPWR_MEASPWR_RBIS_PARA2_T;
  2997. // measpwr_rbis2_out1
  2998. typedef union {
  2999. uint32_t v;
  3000. struct
  3001. {
  3002. uint32_t rbis_out0 : 7; // [6:0], read only
  3003. uint32_t __7_7 : 1; // [7]
  3004. uint32_t rbis_out1 : 7; // [14:8], read only
  3005. uint32_t __15_15 : 1; // [15]
  3006. uint32_t rbis_out2 : 7; // [22:16], read only
  3007. uint32_t __23_23 : 1; // [23]
  3008. uint32_t rbis_out3 : 7; // [30:24], read only
  3009. uint32_t __31_31 : 1; // [31]
  3010. } b;
  3011. } REG_MEASPWR_MEASPWR_RBIS2_OUT1_T;
  3012. // measpwr_rbis2_out2
  3013. typedef union {
  3014. uint32_t v;
  3015. struct
  3016. {
  3017. uint32_t rbis_out4 : 7; // [6:0], read only
  3018. uint32_t __7_7 : 1; // [7]
  3019. uint32_t rbis_num : 3; // [10:8], read only
  3020. uint32_t __31_11 : 21; // [31:11]
  3021. } b;
  3022. } REG_MEASPWR_MEASPWR_RBIS2_OUT2_T;
  3023. // measpwr_rbis2_max
  3024. typedef union {
  3025. uint32_t v;
  3026. struct
  3027. {
  3028. uint32_t rbis_max : 25; // [24:0], read only
  3029. uint32_t __31_25 : 7; // [31:25]
  3030. } b;
  3031. } REG_MEASPWR_MEASPWR_RBIS2_MAX_T;
  3032. // measpwr_rbis3_out1
  3033. typedef union {
  3034. uint32_t v;
  3035. struct
  3036. {
  3037. uint32_t rbis_out0 : 7; // [6:0], read only
  3038. uint32_t __7_7 : 1; // [7]
  3039. uint32_t rbis_out1 : 7; // [14:8], read only
  3040. uint32_t __15_15 : 1; // [15]
  3041. uint32_t rbis_out2 : 7; // [22:16], read only
  3042. uint32_t __23_23 : 1; // [23]
  3043. uint32_t rbis_out3 : 7; // [30:24], read only
  3044. uint32_t __31_31 : 1; // [31]
  3045. } b;
  3046. } REG_MEASPWR_MEASPWR_RBIS3_OUT1_T;
  3047. // measpwr_rbis3_out2
  3048. typedef union {
  3049. uint32_t v;
  3050. struct
  3051. {
  3052. uint32_t rbis_out4 : 7; // [6:0], read only
  3053. uint32_t __7_7 : 1; // [7]
  3054. uint32_t rbis_num : 3; // [10:8], read only
  3055. uint32_t __31_11 : 21; // [31:11]
  3056. } b;
  3057. } REG_MEASPWR_MEASPWR_RBIS3_OUT2_T;
  3058. // measpwr_rbis3_max
  3059. typedef union {
  3060. uint32_t v;
  3061. struct
  3062. {
  3063. uint32_t rbis_max : 25; // [24:0], read only
  3064. uint32_t __31_25 : 7; // [31:25]
  3065. } b;
  3066. } REG_MEASPWR_MEASPWR_RBIS3_MAX_T;
  3067. // measpwr_sigpwr_para2
  3068. typedef union {
  3069. uint32_t v;
  3070. struct
  3071. {
  3072. uint32_t sigpwr_renum : 8; // [7:0]
  3073. uint32_t __31_8 : 24; // [31:8]
  3074. } b;
  3075. } REG_MEASPWR_MEASPWR_SIGPWR_PARA2_T;
  3076. // measpwr_irt_para3
  3077. typedef union {
  3078. uint32_t v;
  3079. struct
  3080. {
  3081. uint32_t n_th : 16; // [15:0]
  3082. uint32_t s_th : 16; // [31:16]
  3083. } b;
  3084. } REG_MEASPWR_MEASPWR_IRT_PARA3_T;
  3085. // measpwr_trms_para3
  3086. typedef union {
  3087. uint32_t v;
  3088. struct
  3089. {
  3090. uint32_t n_th : 16; // [15:0]
  3091. uint32_t s_th : 16; // [31:16]
  3092. } b;
  3093. } REG_MEASPWR_MEASPWR_TRMS_PARA3_T;
  3094. // measpwr_rsrp_para5
  3095. typedef union {
  3096. uint32_t v;
  3097. struct
  3098. {
  3099. uint32_t s_th : 16; // [15:0]
  3100. uint32_t beta : 16; // [31:16]
  3101. } b;
  3102. } REG_MEASPWR_MEASPWR_RSRP_PARA5_T;
  3103. // measpwr_rbis_in1
  3104. typedef union {
  3105. uint32_t v;
  3106. struct
  3107. {
  3108. uint32_t rbis_in0 : 7; // [6:0]
  3109. uint32_t __7_7 : 1; // [7]
  3110. uint32_t rbis_in1 : 7; // [14:8]
  3111. uint32_t reserced3 : 1; // [15], read only
  3112. uint32_t rbis_in2 : 7; // [22:16]
  3113. uint32_t __23_23 : 1; // [23]
  3114. uint32_t rbis_in3 : 7; // [30:24]
  3115. uint32_t __31_31 : 1; // [31]
  3116. } b;
  3117. } REG_MEASPWR_MEASPWR_RBIS_IN1_T;
  3118. // measpwr_rbis_in2
  3119. typedef union {
  3120. uint32_t v;
  3121. struct
  3122. {
  3123. uint32_t rbis_in4 : 7; // [6:0]
  3124. uint32_t __7_7 : 1; // [7]
  3125. uint32_t rbis_in_num : 3; // [10:8]
  3126. uint32_t __31_11 : 21; // [31:11]
  3127. } b;
  3128. } REG_MEASPWR_MEASPWR_RBIS_IN2_T;
  3129. // measpwr_rbis2_in1
  3130. typedef union {
  3131. uint32_t v;
  3132. struct
  3133. {
  3134. uint32_t rbis_in0 : 7; // [6:0]
  3135. uint32_t __7_7 : 1; // [7]
  3136. uint32_t rbis_in1 : 7; // [14:8]
  3137. uint32_t reserced3 : 1; // [15], read only
  3138. uint32_t rbis_in2 : 7; // [22:16]
  3139. uint32_t __23_23 : 1; // [23]
  3140. uint32_t rbis_in3 : 7; // [30:24]
  3141. uint32_t __31_31 : 1; // [31]
  3142. } b;
  3143. } REG_MEASPWR_MEASPWR_RBIS2_IN1_T;
  3144. // measpwr_rbis2_in2
  3145. typedef union {
  3146. uint32_t v;
  3147. struct
  3148. {
  3149. uint32_t rbis_in4 : 7; // [6:0]
  3150. uint32_t __7_7 : 1; // [7]
  3151. uint32_t rbis_in_num : 3; // [10:8]
  3152. uint32_t __31_11 : 21; // [31:11]
  3153. } b;
  3154. } REG_MEASPWR_MEASPWR_RBIS2_IN2_T;
  3155. // measpwr_rbis3_in1
  3156. typedef union {
  3157. uint32_t v;
  3158. struct
  3159. {
  3160. uint32_t rbis_in0 : 7; // [6:0]
  3161. uint32_t __7_7 : 1; // [7]
  3162. uint32_t rbis_in1 : 7; // [14:8]
  3163. uint32_t reserced3 : 1; // [15], read only
  3164. uint32_t rbis_in2 : 7; // [22:16]
  3165. uint32_t __23_23 : 1; // [23]
  3166. uint32_t rbis_in3 : 7; // [30:24]
  3167. uint32_t __31_31 : 1; // [31]
  3168. } b;
  3169. } REG_MEASPWR_MEASPWR_RBIS3_IN1_T;
  3170. // measpwr_rbis3_in2
  3171. typedef union {
  3172. uint32_t v;
  3173. struct
  3174. {
  3175. uint32_t rbis_in4 : 7; // [6:0]
  3176. uint32_t __7_7 : 1; // [7]
  3177. uint32_t rbis_in_num : 3; // [10:8]
  3178. uint32_t __31_11 : 21; // [31:11]
  3179. } b;
  3180. } REG_MEASPWR_MEASPWR_RBIS3_IN2_T;
  3181. // mem_in_1
  3182. typedef union {
  3183. uint32_t v;
  3184. struct
  3185. {
  3186. uint32_t mem_in_1 : 24; // [23:0]
  3187. uint32_t __31_24 : 8; // [31:24]
  3188. } b;
  3189. } REG_MEASPWR_MEM_IN_1_T;
  3190. // mem_in_2
  3191. typedef union {
  3192. uint32_t v;
  3193. struct
  3194. {
  3195. uint32_t mem_in_2 : 24; // [23:0]
  3196. uint32_t __31_24 : 8; // [31:24]
  3197. } b;
  3198. } REG_MEASPWR_MEM_IN_2_T;
  3199. // mem_in_3
  3200. typedef union {
  3201. uint32_t v;
  3202. struct
  3203. {
  3204. uint32_t mem_in_3 : 24; // [23:0]
  3205. uint32_t __31_24 : 8; // [31:24]
  3206. } b;
  3207. } REG_MEASPWR_MEM_IN_3_T;
  3208. // mem_in_4
  3209. typedef union {
  3210. uint32_t v;
  3211. struct
  3212. {
  3213. uint32_t mem_in_4 : 24; // [23:0]
  3214. uint32_t __31_24 : 8; // [31:24]
  3215. } b;
  3216. } REG_MEASPWR_MEM_IN_4_T;
  3217. // mem_in_5
  3218. typedef union {
  3219. uint32_t v;
  3220. struct
  3221. {
  3222. uint32_t mem_in_5 : 24; // [23:0]
  3223. uint32_t __31_24 : 8; // [31:24]
  3224. } b;
  3225. } REG_MEASPWR_MEM_IN_5_T;
  3226. // mem_in_6
  3227. typedef union {
  3228. uint32_t v;
  3229. struct
  3230. {
  3231. uint32_t mem_in_6 : 24; // [23:0]
  3232. uint32_t __31_24 : 8; // [31:24]
  3233. } b;
  3234. } REG_MEASPWR_MEM_IN_6_T;
  3235. // mem_in_7
  3236. typedef union {
  3237. uint32_t v;
  3238. struct
  3239. {
  3240. uint32_t mem_in_7 : 24; // [23:0]
  3241. uint32_t __31_24 : 8; // [31:24]
  3242. } b;
  3243. } REG_MEASPWR_MEM_IN_7_T;
  3244. // mem_in_8
  3245. typedef union {
  3246. uint32_t v;
  3247. struct
  3248. {
  3249. uint32_t mem_in_8 : 24; // [23:0]
  3250. uint32_t __31_24 : 8; // [31:24]
  3251. } b;
  3252. } REG_MEASPWR_MEM_IN_8_T;
  3253. // measpwr_rxdata_ctrl1
  3254. #define MEASPWR_RX_OFFSET1(n) (((n)&0x7ffff) << 0)
  3255. #define MEASPWR_FDD_TDD (1 << 31)
  3256. // measpwr_rxdata_ctrl2
  3257. #define MEASPWR_RX_LEN(n) (((n)&0xffff) << 0)
  3258. // measpwr_rxdata_val_ctrl
  3259. #define MEASPWR_RX_OFFSET2(n) (((n)&0x3ffff) << 0)
  3260. #define MEASPWR_MEASPWR_RXDATA_VAL_CTRL_INVALID_FLAG (1 << 20)
  3261. // measpwr_rxdata_offset3_id1
  3262. #define MEASPWR_RX_OFFSET3_ID1(n) (((n)&0xfffff) << 0)
  3263. // measpwr_rxdata_offset3_id2
  3264. #define MEASPWR_RX_OFFSET3_ID2(n) (((n)&0xfffff) << 0)
  3265. // measpwr_rxdata_offset3_id3
  3266. #define MEASPWR_RX_OFFSET3_ID3(n) (((n)&0xfffff) << 0)
  3267. // measpwr_rxdata_offset3_id4
  3268. #define MEASPWR_RX_OFFSET3_ID4(n) (((n)&0xfffff) << 0)
  3269. // measpwr_rxdata_offset3_id5
  3270. #define MEASPWR_RX_OFFSET3_ID5(n) (((n)&0xfffff) << 0)
  3271. // measpwr_rxdata_offset3_id6
  3272. #define MEASPWR_RX_OFFSET3_ID6(n) (((n)&0xfffff) << 0)
  3273. // measpwr_rxdata_offset3_id7
  3274. #define MEASPWR_RX_OFFSET3_ID7(n) (((n)&0xfffff) << 0)
  3275. // measpwr_rxdata_offset3_id8
  3276. #define MEASPWR_RX_OFFSET3_ID8(n) (((n)&0xfffff) << 0)
  3277. // measpwr_nb_offset4
  3278. #define MEASPWR_NB_OFFET4(n) (((n)&0x7fff) << 0)
  3279. // measpwr_total_subf
  3280. #define MEASPWR_TOTAL_SUBF_NUM_ID1_2(n) (((n)&0x1ff) << 0)
  3281. #define MEASPWR_TOTAL_SUBF_NUM_ID3_8(n) (((n)&0x1ff) << 12)
  3282. // measpwr_ifft_para
  3283. #define MEASPWR_IFFT_CUT1(n) (((n)&0x3) << 0)
  3284. #define MEASPWR_IFFT_CUT2(n) (((n)&0x3) << 2)
  3285. #define MEASPWR_IFFT_CUT3(n) (((n)&0x3) << 4)
  3286. #define MEASPWR_IFFT_CUT4(n) (((n)&0x3) << 6)
  3287. #define MEASPWR_IFFT_CUT5(n) (((n)&0x3) << 8)
  3288. #define MEASPWR_IFFT_CUT6(n) (((n)&0x3) << 10)
  3289. #define MEASPWR_IFFT_CUT7(n) (((n)&0x3) << 12)
  3290. // measpwr_ifft_gate
  3291. #define MEASPWR_IFFT_GATE(n) (((n)&0x7f) << 0)
  3292. // measpwr_int_en
  3293. #define MEASPWR_ID1_INTERRUPT_ENABLE(n) (((n)&0xf) << 0)
  3294. #define MEASPWR_ID2_INTERRUPT_ENABLE(n) (((n)&0xf) << 4)
  3295. #define MEASPWR_ID3_INTERRUPT_ENABLE(n) (((n)&0xf) << 8)
  3296. #define MEASPWR_ID4_INTERRUPT_ENABLE(n) (((n)&0xf) << 12)
  3297. #define MEASPWR_ID5_INTERRUPT_ENABLE(n) (((n)&0xf) << 16)
  3298. #define MEASPWR_ID6_INTERRUPT_ENABLE(n) (((n)&0xf) << 20)
  3299. #define MEASPWR_ID7_INTERRUPT_ENABLE(n) (((n)&0xf) << 24)
  3300. #define MEASPWR_ID8_INTERRUPT_ENABLE(n) (((n)&0xf) << 28)
  3301. // measpwr_int_sta
  3302. #define MEASPWR_ID1_INTERRUPT_STATE(n) (((n)&0xf) << 0)
  3303. #define MEASPWR_ID2_INTERRUPT_STATE(n) (((n)&0xf) << 4)
  3304. #define MEASPWR_ID3_INTERRUPT_STATE(n) (((n)&0xf) << 8)
  3305. #define MEASPWR_ID4_INTERRUPT_STATE(n) (((n)&0xf) << 12)
  3306. #define MEASPWR_ID5_INTERRUPT_STATE(n) (((n)&0xf) << 16)
  3307. #define MEASPWR_ID6_INTERRUPT_STATE(n) (((n)&0xf) << 20)
  3308. #define MEASPWR_ID7_INTERRUPT_STATE(n) (((n)&0xf) << 24)
  3309. #define MEASPWR_ID8_INTERRUPT_STATE(n) (((n)&0xf) << 28)
  3310. // measpwr_id1_id2_func_ctrl
  3311. #define MEASPWR_ID1_ID2_IRT_EN (1 << 0)
  3312. #define MEASPWR_ID1_ID2_RSRP_EN (1 << 1)
  3313. #define MEASPWR_ID1_ID2_TRMS_EN (1 << 2)
  3314. #define MEASPWR_ID1_ID2_AFC_HST_EN (1 << 3)
  3315. #define MEASPWR_ID1_ID2_AFC_COM_EN (1 << 4)
  3316. #define MEASPWR_ID1_ID2_SINR_EN (1 << 5)
  3317. #define MEASPWR_ID1_ID2_DOPPLER_EN (1 << 6)
  3318. #define MEASPWR_ID1_ID2_SIGMA_EN (1 << 7)
  3319. #define MEASPWR_ID1_ID2_TRMSF_EN (1 << 8)
  3320. // measpwr_id3_id8_func_ctrl
  3321. #define MEASPWR_ID3_ID8_IRT_EN (1 << 0)
  3322. #define MEASPWR_ID3_ID8_RSRP_EN (1 << 1)
  3323. #define MEASPWR_ID3_ID8_TRMS_EN (1 << 2)
  3324. #define MEASPWR_ID3_ID8_AFC_HST_EN (1 << 3)
  3325. #define MEASPWR_ID3_ID8_AFC_COM_EN (1 << 4)
  3326. #define MEASPWR_ID3_ID8_SINR_EN (1 << 5)
  3327. #define MEASPWR_ID3_ID8_DOPPLER_EN (1 << 6)
  3328. #define MEASPWR_ID3_ID8_SIGMA_EN (1 << 7)
  3329. #define MEASPWR_ID3_ID8_TRMSF_EN (1 << 8)
  3330. // measpwr_agc_compare
  3331. #define MEASPWR_AGC_COMPARE(n) (((n)&0x3ff) << 0)
  3332. // measpwr_nb_para
  3333. #define MEASPWR_ID1_NB_IND(n) (((n)&0xf) << 0)
  3334. #define MEASPWR_ID2_NB_IND(n) (((n)&0xf) << 4)
  3335. #define MEASPWR_ID38_NB_IND(n) (((n)&0xf) << 8)
  3336. // measpwr_band_para
  3337. #define MEASPWR_SYS_BW_ID12(n) (((n)&0x7) << 0)
  3338. #define MEASPWR_MEAS_BW_ID12(n) (((n)&0x7) << 4)
  3339. #define MEASPWR_SYS_BW_ID38(n) (((n)&0x7) << 8)
  3340. #define MEASPWR_MEAS_BW_ID38(n) (((n)&0x7) << 12)
  3341. // measpwr_afc_para
  3342. #define MEASPWR_AFC_RENUM(n) (((n)&0x7) << 0)
  3343. #define MEASPWR_AFC_RELATED_FLAG (1 << 4)
  3344. #define MEASPWR_AFC_FACTOR(n) (((n)&0xffff) << 8)
  3345. // measpwr_afc_soft_reect1
  3346. #define MEASPWR_AFC_SOFT_FA_CTOR1(n) (((n)&0xffff) << 0)
  3347. // measpwr_sigpwr_para
  3348. #define MEASPWR_SIGPWR_RENUM(n) (((n)&0xff) << 0)
  3349. #define MEASPWR_SIGPWR_OFDMNUM(n) (((n)&0x3) << 8)
  3350. #define MEASPWR_SIGPWR_ALPHA(n) (((n)&0x1ffff) << 12)
  3351. // measpwr_sigma_para
  3352. #define MEASPWR_SIGMA_WIN(n) (((n)&0x7f) << 0)
  3353. #define MEASPWR_SIGMA_ALPHA(n) (((n)&0x1ffff) << 8)
  3354. // measpwr_doppler_para
  3355. #define MEASPWR_DOPPLER_WIN(n) (((n)&0x7f) << 0)
  3356. #define MEASPWR_DOPPLER_SCALE(n) (((n)&0xf) << 8)
  3357. #define MEASPWR_DOPPLER_ALPHA1(n) (((n)&0x1ffff) << 13)
  3358. // measpwr_trms_para1
  3359. #define MEASPWR_MEASPWR_TRMS_PARA1_DIS_LIMIT(n) (((n)&0xff) << 0)
  3360. #define MEASPWR_MEASPWR_TRMS_PARA1_D_FLAG (1 << 8)
  3361. #define MEASPWR_MEASPWR_TRMS_PARA1_D_FLAG2 (1 << 9)
  3362. #define MEASPWR_NOISE_SEL (1 << 12)
  3363. #define MEASPWR_T_TH(n) (((n)&0xff) << 16)
  3364. // measpwr_trms_para2
  3365. #define MEASPWR_N_TH(n) (((n)&0xffff) << 0)
  3366. #define MEASPWR_MEASPWR_TRMS_PARA2_S_TH(n) (((n)&0xffff) << 16)
  3367. // measpwr_rsrp_para1
  3368. #define MEASPWR_MEASPWR_RSRP_PARA1_DIS_LIMIT(n) (((n)&0xff) << 0)
  3369. #define MEASPWR_MEASPWR_RSRP_PARA1_BETA(n) (((n)&0xffff) << 8)
  3370. #define MEASPWR_MEASPWR_RSRP_PARA1_D_FLAG (1 << 24)
  3371. #define MEASPWR_MEASPWR_RSRP_PARA1_D_FLAG2 (1 << 25)
  3372. // measpwr_rsrp_para2
  3373. #define MEASPWR_RSRP_AGCADJUST(n) (((n)&0xff) << 0)
  3374. #define MEASPWR_MODE1_COMPENSATE(n) (((n)&0x1ff) << 8)
  3375. #define MEASPWR_MODE1_COMPENSATE2(n) (((n)&0x1ff) << 17)
  3376. // measpwr_rsrp_para3
  3377. #define MEASPWR_RSSI_Q(n) (((n)&0x7f) << 0)
  3378. #define MEASPWR_MEASPWR_RSRP_PARA3_S_TH(n) (((n)&0xffff) << 8)
  3379. // measpwr_rsrp_para4
  3380. #define MEASPWR_POW_PA(n) (((n)&0xff) << 0)
  3381. #define MEASPWR_POWQ_VALUE(n) (((n)&0xff) << 8)
  3382. // measpwr_irt_para1
  3383. #define MEASPWR_IRT_OFDM_NUM(n) (((n)&0x3) << 0)
  3384. #define MEASPWR_MEASPWR_IRT_PARA1_DIS_LIMIT(n) (((n)&0xff) << 4)
  3385. #define MEASPWR_N_SCALE(n) (((n)&0xf) << 12)
  3386. #define MEASPWR_POW_MAX_NUM(n) (((n)&0xf) << 16)
  3387. #define MEASPWR_VAL_SEL (1 << 20)
  3388. // measpwr_irt_para2
  3389. #define MEASPWR_N_TH(n) (((n)&0xffff) << 0)
  3390. #define MEASPWR_MEASPWR_IRT_PARA2_S_TH(n) (((n)&0xffff) << 16)
  3391. // measpwr_rssi_para
  3392. #define MEASPWR_RSSI_SEL (1 << 0)
  3393. #define MEASPWR_RSSI_COMPENSATE(n) (((n)&0xff) << 4)
  3394. #define MEASPWR_RSSI_COMPENSATE2(n) (((n)&0xff) << 12)
  3395. // measpwr_agc
  3396. #define MEASPWR_AGC_RX(n) (((n)&0x3ff) << 0)
  3397. // measpwr_id1_para1
  3398. #define MEASPWR_MEASPWR_ID1_PARA1_CP_INDEX (1 << 0)
  3399. #define MEASPWR_MEASPWR_ID1_PARA1_TX_NUM (1 << 1)
  3400. #define MEASPWR_AFC_OUT_SEL (1 << 2)
  3401. #define MEASPWR_MEASPWR_ID1_PARA1_TX_FLAG (1 << 3)
  3402. #define MEASPWR_MEASPWR_ID1_PARA1_NID(n) (((n)&0x1ff) << 4)
  3403. #define MEASPWR_MEASPWR_ID1_PARA1_FIRSTD_OFDM_FLAG (1 << 13)
  3404. #define MEASPWR_CRS_RSSI_SEL(n) (((n)&0x3) << 14)
  3405. #define MEASPWR_AFC_OUT_NUM(n) (((n)&0xff) << 16)
  3406. #define MEASPWR_MEASPWR_ID1_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 24)
  3407. #define MEASPWR_MEASPWR_ID1_PARA1_LNUM_MOD(n) (((n)&0xf) << 28)
  3408. // measpwr_id1_para2
  3409. #define MEASPWR_RESTART (1 << 0)
  3410. #define MEASPWR_WINDOWS_CLR (1 << 1)
  3411. #define MEASPWR_LAST_FLAG (1 << 2)
  3412. #define MEASPWR_AFC_RELATED_EN (1 << 3)
  3413. #define MEASPWR_SINR_MAP(n) (((n)&0x7) << 4)
  3414. #define MEASPWR_MEASPWR_ID1_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 7)
  3415. #define MEASPWR_MEASPWR_ID1_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 16)
  3416. #define MEASPWR_MEASPWR_ID1_PARA2_CRS_RSSI_CLR (1 << 26)
  3417. #define MEASPWR_MEASPWR_ID1_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 28)
  3418. #define MEASPWR_MEASPWR_ID1_PARA2_IRT_SCALE_DISABLE (1 << 30)
  3419. #define MEASPWR_MEASPWR_ID1_PARA2_QF_MEM_SEL (1 << 31)
  3420. // measpwr_id2_para1
  3421. #define MEASPWR_MEASPWR_ID2_PARA1_CP_INDEX (1 << 0)
  3422. #define MEASPWR_MEASPWR_ID2_PARA1_TX_NUM (1 << 1)
  3423. #define MEASPWR_AFC_OUT_SEL (1 << 2)
  3424. #define MEASPWR_MEASPWR_ID2_PARA1_TX_FLAG (1 << 3)
  3425. #define MEASPWR_MEASPWR_ID2_PARA1_NID(n) (((n)&0x1ff) << 4)
  3426. #define MEASPWR_MEASPWR_ID2_PARA1_FIRSTD_OFDM_FLAG (1 << 13)
  3427. #define MEASPWR_CRS_RSSI_SEL(n) (((n)&0x3) << 14)
  3428. #define MEASPWR_AFC_OUT_NUM(n) (((n)&0xff) << 16)
  3429. #define MEASPWR_MEASPWR_ID2_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 24)
  3430. #define MEASPWR_MEASPWR_ID2_PARA1_LNUM_MOD(n) (((n)&0xf) << 28)
  3431. // measpwr_id2_para2
  3432. #define MEASPWR_RESTART (1 << 0)
  3433. #define MEASPWR_WINDOWS_CLR (1 << 1)
  3434. #define MEASPWR_LAST_FLAG (1 << 2)
  3435. #define MEASPWR_AFC_RELATED_EN (1 << 3)
  3436. #define MEASPWR_RESERVE2(n) (((n)&0x7) << 4)
  3437. #define MEASPWR_MEASPWR_ID2_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 7)
  3438. #define MEASPWR_MEASPWR_ID2_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 16)
  3439. #define MEASPWR_MEASPWR_ID2_PARA2_CRS_RSSI_CLR (1 << 26)
  3440. #define MEASPWR_MEASPWR_ID2_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 28)
  3441. #define MEASPWR_MEASPWR_ID2_PARA2_IRT_SCALE_DISABLE (1 << 30)
  3442. #define MEASPWR_MEASPWR_ID2_PARA2_QF_MEM_SEL (1 << 31)
  3443. // measpwr_id3_para1
  3444. #define MEASPWR_RESTART (1 << 0)
  3445. #define MEASPWR_WINDOWS_CLR (1 << 1)
  3446. #define MEASPWR_LAST_FLAG (1 << 2)
  3447. #define MEASPWR_MEASPWR_ID3_PARA1_CRS_RSSI_CLR (1 << 3)
  3448. #define MEASPWR_MEASPWR_ID3_PARA1_CP_INDEX (1 << 4)
  3449. #define MEASPWR_MEASPWR_ID3_PARA1_TX_NUM (1 << 5)
  3450. #define MEASPWR_MEASPWR_ID3_PARA1_TX_FLAG (1 << 6)
  3451. #define MEASPWR_MEASPWR_ID3_PARA1_NID(n) (((n)&0x1ff) << 8)
  3452. #define MEASPWR_MEASPWR_ID3_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
  3453. #define MEASPWR_MEASPWR_ID3_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
  3454. #define MEASPWR_MEASPWR_ID3_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)
  3455. // measpwr_id4_para1
  3456. #define MEASPWR_RESTART (1 << 0)
  3457. #define MEASPWR_WINDOWS_CLR (1 << 1)
  3458. #define MEASPWR_LAST_FLAG (1 << 2)
  3459. #define MEASPWR_MEASPWR_ID4_PARA1_CRS_RSSI_CLR (1 << 3)
  3460. #define MEASPWR_MEASPWR_ID4_PARA1_CP_INDEX (1 << 4)
  3461. #define MEASPWR_MEASPWR_ID4_PARA1_TX_NUM (1 << 5)
  3462. #define MEASPWR_MEASPWR_ID4_PARA1_TX_FLAG (1 << 6)
  3463. #define MEASPWR_MEASPWR_ID4_PARA1_NID(n) (((n)&0x1ff) << 8)
  3464. #define MEASPWR_MEASPWR_ID4_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
  3465. #define MEASPWR_MEASPWR_ID4_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
  3466. #define MEASPWR_MEASPWR_ID4_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)
  3467. // measpwr_id5_para1
  3468. #define MEASPWR_RESTART (1 << 0)
  3469. #define MEASPWR_WINDOWS_CLR (1 << 1)
  3470. #define MEASPWR_LAST_FLAG (1 << 2)
  3471. #define MEASPWR_MEASPWR_ID5_PARA1_CRS_RSSI_CLR (1 << 3)
  3472. #define MEASPWR_MEASPWR_ID5_PARA1_CP_INDEX (1 << 4)
  3473. #define MEASPWR_MEASPWR_ID5_PARA1_TX_NUM (1 << 5)
  3474. #define MEASPWR_MEASPWR_ID5_PARA1_TX_FLAG (1 << 6)
  3475. #define MEASPWR_MEASPWR_ID5_PARA1_NID(n) (((n)&0x1ff) << 8)
  3476. #define MEASPWR_MEASPWR_ID5_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
  3477. #define MEASPWR_MEASPWR_ID5_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
  3478. #define MEASPWR_MEASPWR_ID5_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)
  3479. // measpwr_id6_para1
  3480. #define MEASPWR_RESTART (1 << 0)
  3481. #define MEASPWR_WINDOWS_CLR (1 << 1)
  3482. #define MEASPWR_LAST_FLAG (1 << 2)
  3483. #define MEASPWR_MEASPWR_ID6_PARA1_CRS_RSSI_CLR (1 << 3)
  3484. #define MEASPWR_MEASPWR_ID6_PARA1_CP_INDEX (1 << 4)
  3485. #define MEASPWR_MEASPWR_ID6_PARA1_TX_NUM (1 << 5)
  3486. #define MEASPWR_MEASPWR_ID6_PARA1_TX_FLAG (1 << 6)
  3487. #define MEASPWR_MEASPWR_ID6_PARA1_NID(n) (((n)&0x1ff) << 8)
  3488. #define MEASPWR_MEASPWR_ID6_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
  3489. #define MEASPWR_MEASPWR_ID6_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
  3490. #define MEASPWR_MEASPWR_ID6_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)
  3491. // measpwr_id7_para1
  3492. #define MEASPWR_RESTART (1 << 0)
  3493. #define MEASPWR_WINDOWS_CLR (1 << 1)
  3494. #define MEASPWR_LAST_FLAG (1 << 2)
  3495. #define MEASPWR_MEASPWR_ID7_PARA1_CRS_RSSI_CLR (1 << 3)
  3496. #define MEASPWR_MEASPWR_ID7_PARA1_CP_INDEX (1 << 4)
  3497. #define MEASPWR_MEASPWR_ID7_PARA1_TX_NUM (1 << 5)
  3498. #define MEASPWR_MEASPWR_ID7_PARA1_TX_FLAG (1 << 6)
  3499. #define MEASPWR_MEASPWR_ID7_PARA1_NID(n) (((n)&0x1ff) << 8)
  3500. #define MEASPWR_MEASPWR_ID7_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
  3501. #define MEASPWR_MEASPWR_ID7_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
  3502. #define MEASPWR_MEASPWR_ID7_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)
  3503. // measpwr_id8_para1
  3504. #define MEASPWR_RESTART (1 << 0)
  3505. #define MEASPWR_WINDOWS_CLR (1 << 1)
  3506. #define MEASPWR_LAST_FLAG (1 << 2)
  3507. #define MEASPWR_MEASPWR_ID8_PARA1_CRS_RSSI_CLR (1 << 3)
  3508. #define MEASPWR_MEASPWR_ID8_PARA1_CP_INDEX (1 << 4)
  3509. #define MEASPWR_MEASPWR_ID8_PARA1_TX_NUM (1 << 5)
  3510. #define MEASPWR_MEASPWR_ID8_PARA1_TX_FLAG (1 << 6)
  3511. #define MEASPWR_MEASPWR_ID8_PARA1_NID(n) (((n)&0x1ff) << 8)
  3512. #define MEASPWR_MEASPWR_ID8_PARA1_FIRSTD_OFDM_FLAG (1 << 17)
  3513. #define MEASPWR_MEASPWR_ID8_PARA1_OFFLINE0_TIME(n) (((n)&0xf) << 20)
  3514. #define MEASPWR_MEASPWR_ID8_PARA1_LNUM_MOD(n) (((n)&0xf) << 24)
  3515. // measpwr_id_para
  3516. #define MEASPWR_MODE_SEL(n) (((n)&0x3) << 0)
  3517. #define MEASPWR_AFC_SOFT_EN (1 << 2)
  3518. #define MEASPWR_IRT_SOFT_EN (1 << 3)
  3519. #define MEASPWR_NID12_INFO(n) (((n)&0xffff) << 4)
  3520. #define MEASPWR_OFFLIN_DATA_SEL (1 << 24)
  3521. #define MEASPWR_OFFLINE_MOD_SEL (1 << 28)
  3522. // measpwr_id_ctrl
  3523. #define MEASPWR_NID1 (1 << 0)
  3524. #define MEASPWR_NID2 (1 << 1)
  3525. #define MEASPWR_NID3 (1 << 2)
  3526. #define MEASPWR_NID4 (1 << 3)
  3527. #define MEASPWR_NID5 (1 << 4)
  3528. #define MEASPWR_NID6 (1 << 5)
  3529. #define MEASPWR_NID7 (1 << 6)
  3530. #define MEASPWR_NID8 (1 << 7)
  3531. #define MEASPWR_OFFLINE_SEL (1 << 8)
  3532. #define MEASPWR_NID38_INFO(n) (((n)&0x3ff) << 19)
  3533. #define MEASPWR_MEASPWR_ID_CTRL_INVALID_FLAG (1 << 29)
  3534. // measpwr_ctrl
  3535. #define MEASPWR_NID1_EN (1 << 0)
  3536. #define MEASPWR_NID2_EN (1 << 1)
  3537. #define MEASPWR_NID3_EN (1 << 2)
  3538. #define MEASPWR_NID4_EN (1 << 3)
  3539. #define MEASPWR_NID5_EN (1 << 4)
  3540. #define MEASPWR_NID6_EN (1 << 5)
  3541. #define MEASPWR_NID7_EN (1 << 6)
  3542. #define MEASPWR_NID8_EN (1 << 7)
  3543. // measpwr_afc1_out
  3544. #define MEASPWR_AFC_OUT1(n) (((n)&0xffff) << 0)
  3545. // measpwr_afc2_out
  3546. #define MEASPWR_AFC_OUT2(n) (((n)&0xffff) << 0)
  3547. // measpwr_afc3_out
  3548. #define MEASPWR_AFC_OUT3(n) (((n)&0xffff) << 0)
  3549. // measpwr_afc4_out
  3550. #define MEASPWR_AFC_OUT4(n) (((n)&0xffff) << 0)
  3551. // measpwr_afc5_out
  3552. #define MEASPWR_AFC_OUT5(n) (((n)&0xffff) << 0)
  3553. // measpwr_afc1_rsrp
  3554. #define MEASPWR_AFC_RSRP1(n) (((n)&0xffff) << 0)
  3555. // measpwr_afc2_rsrp
  3556. #define MEASPWR_AFC_RSRP2(n) (((n)&0xffff) << 0)
  3557. // measpwr_afc3_rsrp
  3558. #define MEASPWR_AFC_RSRP3(n) (((n)&0xffff) << 0)
  3559. // measpwr_afc4_rsrp
  3560. #define MEASPWR_AFC_RSRP4(n) (((n)&0xffff) << 0)
  3561. // measpwr_afc5_rsrp
  3562. #define MEASPWR_AFC_RSRP5(n) (((n)&0xffff) << 0)
  3563. // measpwr_sigma1_agc_out1
  3564. #define MEASPWR_BASEAGC1_OUT1(n) (((n)&0x3ff) << 0)
  3565. #define MEASPWR_SINR1_LOG_OUT1(n) (((n)&0x7ff) << 16)
  3566. // measpwr_sigma1_agc_out2
  3567. #define MEASPWR_BASEAGC1_OUT2(n) (((n)&0x3ff) << 0)
  3568. #define MEASPWR_SINR1_LOG_OUT2(n) (((n)&0x7ff) << 16)
  3569. // measpwr_sigma1_agc_out3
  3570. #define MEASPWR_BASEAGC1_OUT3(n) (((n)&0x3ff) << 0)
  3571. #define MEASPWR_SINR1_LOG_OUT3(n) (((n)&0x7ff) << 16)
  3572. // measpwr_sigma1_agc_out4
  3573. #define MEASPWR_BASEAGC1_OUT4(n) (((n)&0x3ff) << 0)
  3574. #define MEASPWR_SINR1_LOG_OUT4(n) (((n)&0x7ff) << 16)
  3575. // measpwr_sigma1_agc_out5
  3576. #define MEASPWR_BASEAGC1_OUT5(n) (((n)&0x3ff) << 0)
  3577. #define MEASPWR_SINR1_LOG_OUT5(n) (((n)&0x7ff) << 16)
  3578. // measpwr_sigma1_agc_out6
  3579. #define MEASPWR_BASEAGC1_OUT6(n) (((n)&0x3ff) << 0)
  3580. #define MEASPWR_SINR1_LOG_OUT6(n) (((n)&0x7ff) << 16)
  3581. // measpwr_sigma2_agc_out
  3582. #define MEASPWR_BASEAGC2_OUT(n) (((n)&0x3ff) << 0)
  3583. #define MEASPWR_SINR2_LOG_OUT(n) (((n)&0x7ff) << 16)
  3584. // measpwr_sigma3_agc_out
  3585. #define MEASPWR_BASEAGC3_OUT(n) (((n)&0x3ff) << 0)
  3586. #define MEASPWR_SINR3_LOG_OUT(n) (((n)&0x7ff) << 16)
  3587. // measpwr_sigma4_agc_out
  3588. #define MEASPWR_BASEAGC4_OUT(n) (((n)&0x3ff) << 0)
  3589. #define MEASPWR_SINR4_LOG_OUT(n) (((n)&0x7ff) << 16)
  3590. // measpwr_sigma5_agc_out
  3591. #define MEASPWR_BASEAGC5_OUT(n) (((n)&0x3ff) << 0)
  3592. #define MEASPWR_SINR5_LOG_OUT(n) (((n)&0x7ff) << 16)
  3593. // measpwr__doppler1_out
  3594. #define MEASPWR_DOPPLER1_OUT(n) (((n)&0x7ff) << 0)
  3595. #define MEASPWR_HLS_AGC_BASE1(n) (((n)&0x3ff) << 16)
  3596. // measpwr__doppler2_out
  3597. #define MEASPWR_DOPPLER2_OUT(n) (((n)&0x7ff) << 0)
  3598. #define MEASPWR_HLS_AGC_BASE2(n) (((n)&0x3ff) << 16)
  3599. // measpwr_rsrp1_db
  3600. #define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)
  3601. // measpwr_rsrp1_scale_db
  3602. #define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)
  3603. // measpwr_rsrq1_db
  3604. #define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)
  3605. // measpwr_rssi1_db
  3606. #define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)
  3607. // measpwr_rsrp2_db
  3608. #define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)
  3609. // measpwr_rsrp2_scale_db
  3610. #define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)
  3611. // measpwr_rsrq2_db
  3612. #define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)
  3613. // measpwr_rssi2_db
  3614. #define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)
  3615. // measpwr_rsrp3_db
  3616. #define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)
  3617. // measpwr_rsrp3_scale_db
  3618. #define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)
  3619. // measpwr_rsrq3_db
  3620. #define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)
  3621. // measpwr_rssi3_db
  3622. #define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)
  3623. // measpwr_rsrp4_db
  3624. #define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)
  3625. // measpwr_rsrp4_scale_db
  3626. #define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)
  3627. // measpwr_rsrq4_db
  3628. #define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)
  3629. // measpwr_rssi4_db
  3630. #define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)
  3631. // measpwr_rsrp5_db
  3632. #define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)
  3633. // measpwr_rsrp5_scale_db
  3634. #define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)
  3635. // measpwr_rsrq5_db
  3636. #define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)
  3637. // measpwr_rssi5_db
  3638. #define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)
  3639. // measpwr_rsrp6_db
  3640. #define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)
  3641. // measpwr_rsrp6_scale_db
  3642. #define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)
  3643. // measpwr_rsrq6_db
  3644. #define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)
  3645. // measpwr_rssi6_db
  3646. #define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)
  3647. // measpwr_rsrp7_db
  3648. #define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)
  3649. // measpwr_rsrp7_scale_db
  3650. #define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)
  3651. // measpwr_rsrq7_db
  3652. #define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)
  3653. // measpwr_rssi7_db
  3654. #define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)
  3655. // measpwr_rsrp8_db
  3656. #define MEASPWR_RSRP_PWR_DB(n) (((n)&0xffff) << 0)
  3657. // measpwr_rsrp8_scale_db
  3658. #define MEASPWR_SCALE_RSRP_DB(n) (((n)&0xffff) << 0)
  3659. // measpwr_rsrq8_db
  3660. #define MEASPWR_RSRQ_DB(n) (((n)&0xffff) << 0)
  3661. // measpwr_rssi8_db
  3662. #define MEASPWR_RSSI_DB(n) (((n)&0xffff) << 0)
  3663. // measpwr_irt1_delay
  3664. #define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)
  3665. // measpwr__irt1outflag
  3666. #define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
  3667. #define MEASPWR_IRT_VALIDFLAG (1 << 12)
  3668. // measpwr_irt2_delay
  3669. #define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)
  3670. // measpwr__irt2outflag
  3671. #define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
  3672. #define MEASPWR_IRT_VALIDFLAG (1 << 12)
  3673. // measpwr_irt3_delay
  3674. #define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)
  3675. // measpwr__irt3outflag
  3676. #define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
  3677. #define MEASPWR_IRT_VALIDFLAG (1 << 12)
  3678. // measpwr_irt4_delay
  3679. #define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)
  3680. // measpwr__irt4outflag
  3681. #define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
  3682. #define MEASPWR_IRT_VALIDFLAG (1 << 12)
  3683. // measpwr_irt5_delay
  3684. #define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)
  3685. // measpwr__irt5outflag
  3686. #define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
  3687. #define MEASPWR_IRT_VALIDFLAG (1 << 12)
  3688. // measpwr_irt6_delay
  3689. #define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)
  3690. // measpwr__irt6outflag
  3691. #define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
  3692. #define MEASPWR_IRT_VALIDFLAG (1 << 12)
  3693. // measpwr_irt7_delay
  3694. #define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)
  3695. // measpwr__irt7outflag
  3696. #define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
  3697. #define MEASPWR_IRT_VALIDFLAG (1 << 12)
  3698. // measpwr_irt8_delay
  3699. #define MEASPWR_IRT_DELAY(n) (((n)&0xffff) << 0)
  3700. // measpwr__irt8outflag
  3701. #define MEASPWR_SUBF_NUM(n) (((n)&0x1ff) << 0)
  3702. #define MEASPWR_IRT_VALIDFLAG (1 << 12)
  3703. // measpwr_trms1_out
  3704. #define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)
  3705. // measpwr_trms2_out
  3706. #define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)
  3707. // measpwr_id_info
  3708. #define MEASPWR_ID1_INFO(n) (((n)&0xffff) << 0)
  3709. #define MEASPWR_ID2_INFO(n) (((n)&0xffff) << 16)
  3710. // measpwr_rbis_para
  3711. #define MEASPWR_RBIS_FACTOR(n) (((n)&0xffff) << 0)
  3712. #define MEASPWR_RBIS_DIPOS(n) (((n)&0x7f) << 16)
  3713. #define MEASPWR_MEASPWR_RBIS_PARA_RBIS_NUM(n) (((n)&0x7) << 23)
  3714. #define MEASPWR_RBIS_POSEN (1 << 26)
  3715. #define MEASPWR_RBIS_EN (1 << 27)
  3716. #define MEASPWR_RBIS_JUDGE (1 << 28)
  3717. #define MEASPWR_RBIS_CORRECT (1 << 29)
  3718. // measpwr_rbis_out1
  3719. #define MEASPWR_RBIS_OUT0(n) (((n)&0x7f) << 0)
  3720. #define MEASPWR_RBIS_OUT1(n) (((n)&0x7f) << 8)
  3721. #define MEASPWR_RBIS_OUT2(n) (((n)&0x7f) << 16)
  3722. #define MEASPWR_RBIS_OUT3(n) (((n)&0x7f) << 24)
  3723. // measpwr_rbis_out2
  3724. #define MEASPWR_RBIS_OUT4(n) (((n)&0x7f) << 0)
  3725. #define MEASPWR_MEASPWR_RBIS_OUT2_RBIS_NUM(n) (((n)&0x7) << 8)
  3726. // measpwr_rbis_max
  3727. #define MEASPWR_RBIS_MAX(n) (((n)&0x1ffffff) << 0)
  3728. // measpwr_rx_irt
  3729. #define MEASPWR_ID1_RX_IRT(n) (((n)&0x1f) << 0)
  3730. #define MEASPWR_ID1_OFFSET4(n) (((n)&0x3ff) << 5)
  3731. #define MEASPWR_ID2_RX_IRT(n) (((n)&0x1f) << 16)
  3732. #define MEASPWR_ID2_OFFSET4(n) (((n)&0x3ff) << 21)
  3733. // measpwr_debug1
  3734. #define MEASPWR_DATAIN_STATE(n) (((n)&0x7) << 0)
  3735. #define MEASPWR_DATAGEN_STATE(n) (((n)&0x7ff) << 4)
  3736. #define MEASPWR_DIN_ID_SEL(n) (((n)&0x7) << 16)
  3737. #define MEASPWR_OFFSET2_UPDATE (1 << 20)
  3738. #define MEASPWR_ID_UPDATE (1 << 21)
  3739. #define MEASPWR_DEBUG_UPDATE_FLAG (1 << 22)
  3740. #define MEASPWR_DEBUG_REV_FLAG (1 << 23)
  3741. // measpwr_debug2
  3742. #define MEASPWR_INMEM_CONT(n) (((n)&0xffff) << 0)
  3743. #define MEASPWR_INVALID_DATA_CONT(n) (((n)&0x7fff) << 16)
  3744. #define MEASPWR_INMEM_IN_ACT (1 << 31)
  3745. // measpwr_debug3
  3746. #define MEASPWR_FUNC_STATE(n) (((n)&0x1ff) << 0)
  3747. #define MEASPWR_POW_STATE(n) (((n)&0x1f) << 12)
  3748. #define MEASPWR_FUNC_ID_SEL(n) (((n)&0x7) << 20)
  3749. #define MEASPWR_DATAIN_STATE_CUR(n) (((n)&0x7) << 24)
  3750. // measpwr_sigma6_agc_out
  3751. #define MEASPWR_BASEAGC6_OUT(n) (((n)&0x3ff) << 0)
  3752. #define MEASPWR_SINR6_LOG_OUT(n) (((n)&0x7ff) << 16)
  3753. // measpwr_sigma7_agc_out
  3754. #define MEASPWR_BASEAGC7_OUT(n) (((n)&0x3ff) << 0)
  3755. #define MEASPWR_SINR7_LOG_OUT(n) (((n)&0x7ff) << 16)
  3756. // measpwr_sigma8_agc_out
  3757. #define MEASPWR_BASEAGC8_OUT(n) (((n)&0x3ff) << 0)
  3758. #define MEASPWR_SINR8_LOG_OUT(n) (((n)&0x7ff) << 16)
  3759. // measpwr_afc_soft_reect2
  3760. #define MEASPWR_AFC_SOFT_FA_CTOR2(n) (((n)&0xffff) << 0)
  3761. // measpwr_afc_soft_reect3
  3762. #define MEASPWR_AFC_SOFT_FA_CTOR3(n) (((n)&0xffff) << 0)
  3763. // measpwr_afc_soft_reect4
  3764. #define MEASPWR_AFC_SOFT_FA_CTOR4(n) (((n)&0xffff) << 0)
  3765. // measpwr_afc_soft_reect5
  3766. #define MEASPWR_AFC_SOFT_FA_CTOR5(n) (((n)&0xffff) << 0)
  3767. // measpwr_afc_soft_reect6
  3768. #define MEASPWR_AFC_SOFT_FA_CTOR6(n) (((n)&0xffff) << 0)
  3769. // measpwr_afc_soft_reect7
  3770. #define MEASPWR_AFC_SOFT_FA_CTOR7(n) (((n)&0xffff) << 0)
  3771. // measpwr_afc_soft_reect8
  3772. #define MEASPWR_AFC_SOFT_FA_CTOR8(n) (((n)&0xffff) << 0)
  3773. // measpwr_doppler_para2
  3774. #define MEASPWR_DOPPLER_ALPHA2(n) (((n)&0x1ffff) << 0)
  3775. // measpwr_trmsf_para
  3776. #define MEASPWR_TRMSF_ALPHA(n) (((n)&0x1ffff) << 0)
  3777. #define MEASPWR_TRMSF_SPACE(n) (((n)&0x3) << 20)
  3778. #define MEASPWR_TRMSF_SCALE(n) (((n)&0xf) << 24)
  3779. // measpwr_id3_para2
  3780. #define MEASPWR_MEASPWR_ID3_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
  3781. #define MEASPWR_MEASPWR_ID3_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
  3782. #define MEASPWR_MEASPWR_ID3_PARA2_IRT_SCALE_DISABLE (1 << 14)
  3783. #define MEASPWR_MEASPWR_ID3_PARA2_QF_MEM_SEL (1 << 15)
  3784. #define MEASPWR_MEASPWR_ID3_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)
  3785. // measpwr_id4_para2
  3786. #define MEASPWR_MEASPWR_ID4_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
  3787. #define MEASPWR_MEASPWR_ID4_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
  3788. #define MEASPWR_MEASPWR_ID4_PARA2_IRT_SCALE_DISABLE (1 << 14)
  3789. #define MEASPWR_MEASPWR_ID4_PARA2_QF_MEM_SEL (1 << 15)
  3790. #define MEASPWR_MEASPWR_ID4_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)
  3791. // measpwr_id5_para2
  3792. #define MEASPWR_MEASPWR_ID5_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
  3793. #define MEASPWR_MEASPWR_ID5_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
  3794. #define MEASPWR_MEASPWR_ID5_PARA2_IRT_SCALE_DISABLE (1 << 14)
  3795. #define MEASPWR_MEASPWR_ID5_PARA2_QF_MEM_SEL (1 << 15)
  3796. #define MEASPWR_MEASPWR_ID5_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)
  3797. // measpwr_id6_para2
  3798. #define MEASPWR_MEASPWR_ID6_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
  3799. #define MEASPWR_MEASPWR_ID6_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
  3800. #define MEASPWR_MEASPWR_ID6_PARA2_IRT_SCALE_DISABLE (1 << 14)
  3801. #define MEASPWR_MEASPWR_ID6_PARA2_QF_MEM_SEL (1 << 15)
  3802. #define MEASPWR_MEASPWR_ID6_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)
  3803. // measpwr_id7_para2
  3804. #define MEASPWR_MEASPWR_ID7_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
  3805. #define MEASPWR_MEASPWR_ID7_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
  3806. #define MEASPWR_MEASPWR_ID7_PARA2_IRT_SCALE_DISABLE (1 << 14)
  3807. #define MEASPWR_MEASPWR_ID7_PARA2_QF_MEM_SEL (1 << 15)
  3808. #define MEASPWR_MEASPWR_ID7_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)
  3809. // measpwr_id8_para2
  3810. #define MEASPWR_MEASPWR_ID8_PARA2_FRAME_MAP(n) (((n)&0x3ff) << 0)
  3811. #define MEASPWR_MEASPWR_ID8_PARA2_POW_DATA_SEL(n) (((n)&0x3) << 12)
  3812. #define MEASPWR_MEASPWR_ID8_PARA2_IRT_SCALE_DISABLE (1 << 14)
  3813. #define MEASPWR_MEASPWR_ID8_PARA2_QF_MEM_SEL (1 << 15)
  3814. #define MEASPWR_MEASPWR_ID8_PARA2_OFFLINE0_STEP(n) (((n)&0x1ff) << 16)
  3815. // measpwr_afc1_hst
  3816. #define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)
  3817. // measpwr_afc2_hst
  3818. #define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)
  3819. // measpwr_afc3_hst
  3820. #define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)
  3821. // measpwr_afc4_hst
  3822. #define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)
  3823. // measpwr_afc5_hst
  3824. #define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)
  3825. // measpwr_afc6_hst
  3826. #define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)
  3827. // measpwr_afc7_hst
  3828. #define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)
  3829. // measpwr_afc8_hst
  3830. #define MEASPWR_AFC_HST(n) (((n)&0xffff) << 0)
  3831. // measpwr_doppler3_out
  3832. #define MEASPWR_DOPPLER3_OUT(n) (((n)&0x7ff) << 0)
  3833. #define MEASPWR_HLS_AGC_BASE3(n) (((n)&0x3ff) << 16)
  3834. // measpwr_doppler4_out
  3835. #define MEASPWR_DOPPLER4_OUT(n) (((n)&0x7ff) << 0)
  3836. #define MEASPWR_HLS_AGC_BASE4(n) (((n)&0x3ff) << 16)
  3837. // measpwr_doppler5_out
  3838. #define MEASPWR_DOPPLER5_OUT(n) (((n)&0x7ff) << 0)
  3839. #define MEASPWR_HLS_AGC_BASE5(n) (((n)&0x3ff) << 16)
  3840. // measpwr_doppler6_out
  3841. #define MEASPWR_DOPPLER6_OUT(n) (((n)&0x7ff) << 0)
  3842. #define MEASPWR_HLS_AGC_BASE6(n) (((n)&0x3ff) << 16)
  3843. // measpwr_doppler7_out
  3844. #define MEASPWR_DOPPLER7_OUT(n) (((n)&0x7ff) << 0)
  3845. #define MEASPWR_HLS_AGC_BASE7(n) (((n)&0x3ff) << 16)
  3846. // measpwr_doppler8_out
  3847. #define MEASPWR_DOPPLER8_OUT(n) (((n)&0x7ff) << 0)
  3848. #define MEASPWR_HLS_AGC_BASE8(n) (((n)&0x3ff) << 16)
  3849. // measpwr_pow1_max
  3850. #define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
  3851. #define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)
  3852. // measpwr_pow2_max
  3853. #define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
  3854. #define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)
  3855. // measpwr_pow3_max
  3856. #define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
  3857. #define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)
  3858. // measpwr_pow4_max
  3859. #define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
  3860. #define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)
  3861. // measpwr_pow5_max
  3862. #define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
  3863. #define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)
  3864. // measpwr_pow6_max
  3865. #define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
  3866. #define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)
  3867. // measpwr_pow7_max
  3868. #define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
  3869. #define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)
  3870. // measpwr_pow8_max
  3871. #define MEASPWR_POW_MAX_ADDR(n) (((n)&0x7f) << 0)
  3872. #define MEASPWR_POW_MAX(n) (((n)&0x1ffffff) << 7)
  3873. // measpwr_trms3_out
  3874. #define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)
  3875. // measpwr_trms4_out
  3876. #define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)
  3877. // measpwr_trms5_out
  3878. #define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)
  3879. // measpwr_trms6_out
  3880. #define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)
  3881. // measpwr_trms7_out
  3882. #define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)
  3883. // measpwr_trms8_out
  3884. #define MEASPWR_TRMS_DELAY(n) (((n)&0xffff) << 0)
  3885. // measpwr_reis_conf
  3886. #define MEASPWR_REIS_NUM(n) (((n)&0xf) << 0)
  3887. #define MEASPWR_REIS_EN (1 << 4)
  3888. #define MEASPWR_REIS_DC_EN (1 << 5)
  3889. // measpwr_reis_pos0
  3890. #define MEASPWR_REIS_RE0(n) (((n)&0x7ff) << 0)
  3891. #define MEASPWR_REIS_RE1(n) (((n)&0x7ff) << 16)
  3892. // measpwr_reis_pos1
  3893. #define MEASPWR_REIS_RE2(n) (((n)&0x7ff) << 0)
  3894. #define MEASPWR_REIS_RE3(n) (((n)&0x7ff) << 16)
  3895. // measpwr_reis_pos2
  3896. #define MEASPWR_REIS_RE4(n) (((n)&0x7ff) << 0)
  3897. #define MEASPWR_REIS_RE5(n) (((n)&0x7ff) << 16)
  3898. // measpwr_reis_pos3
  3899. #define MEASPWR_REIS_RE6(n) (((n)&0x7ff) << 0)
  3900. #define MEASPWR_REIS_RE7(n) (((n)&0x7ff) << 16)
  3901. // measpwr_offline0_sel
  3902. #define MEASPWR_DECISION_FLAG(n) (((n)&0x3) << 0)
  3903. #define MEASPWR_JUMP_FLAG(n) (((n)&0x3) << 4)
  3904. #define MEASPWR_POS_DELAY_SEL (1 << 8)
  3905. // measpwr_offline0_pos
  3906. #define MEASPWR_ID1_MAX_POSITION(n) (((n)&0xf) << 0)
  3907. #define MEASPWR_ID2_MAX_POSITION(n) (((n)&0xf) << 4)
  3908. #define MEASPWR_ID3_MAX_POSITION(n) (((n)&0xf) << 8)
  3909. #define MEASPWR_ID4_MAX_POSITION(n) (((n)&0xf) << 12)
  3910. #define MEASPWR_ID5_MAX_POSITION(n) (((n)&0xf) << 16)
  3911. #define MEASPWR_ID6_MAX_POSITION(n) (((n)&0xf) << 20)
  3912. #define MEASPWR_ID7_MAX_POSITION(n) (((n)&0xf) << 24)
  3913. #define MEASPWR_ID8_MAX_POSITION(n) (((n)&0xf) << 28)
  3914. // measpwr_offline0_id
  3915. #define MEASPWR_OFFLINE_JUMP_ID(n) (((n)&0xf) << 0)
  3916. #define MEASPWR_TBIN_POSITION_VALID_FLAG(n) (((n)&0xff) << 4)
  3917. // measpwr_offline1_para
  3918. #define MEASPWR_OFFLINE1_TIME(n) (((n)&0x1f) << 0)
  3919. #define MEASPWR_OFFLINE1_NUM (1 << 5)
  3920. #define MEASPWR_OFFLINE1_MOD_SEL(n) (((n)&0x3) << 8)
  3921. #define MEASPWR_FIRST_OFDM (1 << 12)
  3922. // measpwr_offline1_agc1
  3923. #define MEASPWR_OFFLINE1_AGC1(n) (((n)&0x3ff) << 0)
  3924. #define MEASPWR_OFFLINE1_AGC2(n) (((n)&0x3ff) << 10)
  3925. #define MEASPWR_OFFLINE1_AGC3(n) (((n)&0x3ff) << 20)
  3926. // measpwr_offline1_agc2
  3927. #define MEASPWR_OFFLINE1_AGC4(n) (((n)&0x3ff) << 0)
  3928. #define MEASPWR_OFFLINE1_AGC5(n) (((n)&0x3ff) << 10)
  3929. #define MEASPWR_OFFLINE1_AGC6(n) (((n)&0x3ff) << 20)
  3930. // measpwr_offline1_agc3
  3931. #define MEASPWR_OFFLINE1_AGC7(n) (((n)&0x3ff) << 0)
  3932. #define MEASPWR_OFFLINE1_AGC8(n) (((n)&0x3ff) << 10)
  3933. #define MEASPWR_OFFLINE1_AGC9(n) (((n)&0x3ff) << 20)
  3934. // measpwr_offline1_agc4
  3935. #define MEASPWR_OFFLINE1_AGC10(n) (((n)&0x3ff) << 0)
  3936. #define MEASPWR_OFFLINE1_AGC11(n) (((n)&0x3ff) << 10)
  3937. #define MEASPWR_OFFLINE1_AGC12(n) (((n)&0x3ff) << 20)
  3938. // measpwr_offline1_agc5
  3939. #define MEASPWR_OFFLINE1_AGC13(n) (((n)&0x3ff) << 0)
  3940. #define MEASPWR_OFFLINE1_AGC14(n) (((n)&0x3ff) << 10)
  3941. #define MEASPWR_OFFLINE1_AGC15(n) (((n)&0x3ff) << 20)
  3942. // measpwr_offline1_agc6
  3943. #define MEASPWR_OFFLINE1_AGC16(n) (((n)&0x3ff) << 0)
  3944. #define MEASPWR_OFFLINE1_AGC17(n) (((n)&0x3ff) << 10)
  3945. #define MEASPWR_OFFLINE1_AGC18(n) (((n)&0x3ff) << 20)
  3946. // measpwr_crs_rssi1_agc1
  3947. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3948. // measpwr_crs_rssi1_agc2
  3949. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3950. // measpwr_crs_rssi1_agc3
  3951. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3952. // measpwr_crs_rssi2_agc1
  3953. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3954. // measpwr_crs_rssi2_agc2
  3955. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3956. // measpwr_crs_rssi2_agc3
  3957. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3958. // measpwr_crs_rssi3_agc
  3959. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3960. // measpwr_crs_rssi4_agc
  3961. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3962. // measpwr_crs_rssi5_agc
  3963. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3964. // measpwr_crs_rssi6_agc
  3965. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3966. // measpwr_crs_rssi7_agc
  3967. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3968. // measpwr_crs_rssi8_agc
  3969. #define MEASPWR_CRS_RSSI_AGC(n) (((n)&0x3ff) << 0)
  3970. // measpwr_hmmse_win
  3971. #define MEASPWR_FH_WL_IND (1 << 0)
  3972. // measpwr_hmmse_bitsel
  3973. #define MEASPWR_FH_BITSEL(n) (((n)&0xf) << 0)
  3974. // measpwr_hmmse_flag
  3975. #define MEASPWR_QF_MEM_MARK(n) (((n)&0x3) << 0)
  3976. #define MEASPWR_USED_WL_IND (1 << 4)
  3977. // measpwr_id_info2
  3978. #define MEASPWR_ID38_INFO(n) (((n)&0x3ff) << 0)
  3979. // measpwr_inmem_mode
  3980. #define MEASPWR_INMEM_MODE(n) (((n)&0x3) << 0)
  3981. // measpwr_afc1_rsrp_hst
  3982. #define MEASPWR_AFC_RSRP1_HST(n) (((n)&0xffff) << 0)
  3983. // measpwr_afc2_rsrp_hst
  3984. #define MEASPWR_AFC_RSRP2_HST(n) (((n)&0xffff) << 0)
  3985. // measpwr_afc3_rsrp_hst
  3986. #define MEASPWR_AFC_RSRP3_HST(n) (((n)&0xffff) << 0)
  3987. // measpwr_afc4_rsrp_hst
  3988. #define MEASPWR_AFC_RSRP4_HST(n) (((n)&0xffff) << 0)
  3989. // measpwr_afc5_rsrp_hst
  3990. #define MEASPWR_AFC_RSRP5_HST(n) (((n)&0xffff) << 0)
  3991. // measpwr_afc6_rsrp_hst
  3992. #define MEASPWR_AFC_RSRP6_HST(n) (((n)&0xffff) << 0)
  3993. // measpwr_afc7_rsrp_hst
  3994. #define MEASPWR_AFC_RSRP7_HST(n) (((n)&0xffff) << 0)
  3995. // measpwr_afc8_rsrp_hst
  3996. #define MEASPWR_AFC_RSRP8_HST(n) (((n)&0xffff) << 0)
  3997. // measpwr_afc6_out
  3998. #define MEASPWR_AFC_OUT6(n) (((n)&0xffff) << 0)
  3999. // measpwr_afc7_out
  4000. #define MEASPWR_AFC_OUT7(n) (((n)&0xffff) << 0)
  4001. // measpwr_afc8_out
  4002. #define MEASPWR_AFC_OUT8(n) (((n)&0xffff) << 0)
  4003. // measpwr_afc6_rsrp
  4004. #define MEASPWR_AFC_RSRP6(n) (((n)&0xffff) << 0)
  4005. // measpwr_afc7_rsrp
  4006. #define MEASPWR_AFC_RSRP7(n) (((n)&0xffff) << 0)
  4007. // measpwr_afc8_rsrp
  4008. #define MEASPWR_AFC_RSRP8(n) (((n)&0xffff) << 0)
  4009. // measpwr_offline1_agc7
  4010. #define MEASPWR_OFFLINE1_AGC19(n) (((n)&0x3ff) << 0)
  4011. #define MEASPWR_OFFLINE1_AGC20(n) (((n)&0x3ff) << 10)
  4012. // measpwr_int_join
  4013. #define MEASPWR_INTERRUPT_JOIN_FLAG(n) (((n)&0xff) << 0)
  4014. // measpwr_int_mark
  4015. #define MEASPWR_ID1_INTERRUPT_MARK(n) (((n)&0xf) << 0)
  4016. #define MEASPWR_ID2_INTERRUPT_MARK(n) (((n)&0xf) << 4)
  4017. #define MEASPWR_ID3_INTERRUPT_MARK(n) (((n)&0xf) << 8)
  4018. #define MEASPWR_ID4_INTERRUPT_MARK(n) (((n)&0xf) << 12)
  4019. #define MEASPWR_ID5_INTERRUPT_MARK(n) (((n)&0xf) << 16)
  4020. #define MEASPWR_ID6_INTERRUPT_MARK(n) (((n)&0xf) << 20)
  4021. #define MEASPWR_ID7_INTERRUPT_MARK(n) (((n)&0xf) << 24)
  4022. #define MEASPWR_ID8_INTERRUPT_MARK(n) (((n)&0xf) << 28)
  4023. // measpwr_int_flag
  4024. #define MEASPWR_INTERRUPT_FLAG(n) (((n)&0xff) << 0)
  4025. // measpwr_offline0_decpos1
  4026. #define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
  4027. #define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
  4028. #define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)
  4029. // measpwr_offline0_decpos2
  4030. #define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
  4031. #define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
  4032. #define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)
  4033. // measpwr_offline0_decpos3
  4034. #define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
  4035. #define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
  4036. #define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)
  4037. // measpwr_offline0_decpos4
  4038. #define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
  4039. #define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
  4040. #define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)
  4041. // measpwr_offline0_decpos5
  4042. #define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
  4043. #define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
  4044. #define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)
  4045. // measpwr_offline0_decpos6
  4046. #define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
  4047. #define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
  4048. #define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)
  4049. // measpwr_offline0_decpos7
  4050. #define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
  4051. #define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
  4052. #define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)
  4053. // measpwr_offline0_decpos8
  4054. #define MEASPWR_DECISION_POSITION1(n) (((n)&0x1ff) << 0)
  4055. #define MEASPWR_DECISION_POSITION2(n) (((n)&0x1ff) << 9)
  4056. #define MEASPWR_DECISION_POSITION3(n) (((n)&0x1ff) << 18)
  4057. // measpwr_rbis_para2
  4058. #define MEASPWR_RBIS_FACTOR(n) (((n)&0xffff) << 0)
  4059. #define MEASPWR_RBIS_DIPOS(n) (((n)&0x7f) << 16)
  4060. #define MEASPWR_MEASPWR_RBIS_PARA2_RBIS_NUM(n) (((n)&0x7) << 23)
  4061. #define MEASPWR_RBIS_POSEN (1 << 26)
  4062. #define MEASPWR_RBIS_EN (1 << 27)
  4063. #define MEASPWR_RBIS_JUDGE (1 << 28)
  4064. #define MEASPWR_RBIS_CORRECT (1 << 29)
  4065. // measpwr_rbis2_out1
  4066. #define MEASPWR_RBIS_OUT0(n) (((n)&0x7f) << 0)
  4067. #define MEASPWR_RBIS_OUT1(n) (((n)&0x7f) << 8)
  4068. #define MEASPWR_RBIS_OUT2(n) (((n)&0x7f) << 16)
  4069. #define MEASPWR_RBIS_OUT3(n) (((n)&0x7f) << 24)
  4070. // measpwr_rbis2_out2
  4071. #define MEASPWR_RBIS_OUT4(n) (((n)&0x7f) << 0)
  4072. #define MEASPWR_MEASPWR_RBIS2_OUT2_RBIS_NUM(n) (((n)&0x7) << 8)
  4073. // measpwr_rbis2_max
  4074. #define MEASPWR_RBIS_MAX(n) (((n)&0x1ffffff) << 0)
  4075. // measpwr_rbis3_out1
  4076. #define MEASPWR_RBIS_OUT0(n) (((n)&0x7f) << 0)
  4077. #define MEASPWR_RBIS_OUT1(n) (((n)&0x7f) << 8)
  4078. #define MEASPWR_RBIS_OUT2(n) (((n)&0x7f) << 16)
  4079. #define MEASPWR_RBIS_OUT3(n) (((n)&0x7f) << 24)
  4080. // measpwr_rbis3_out2
  4081. #define MEASPWR_RBIS_OUT4(n) (((n)&0x7f) << 0)
  4082. #define MEASPWR_MEASPWR_RBIS3_OUT2_RBIS_NUM(n) (((n)&0x7) << 8)
  4083. // measpwr_rbis3_max
  4084. #define MEASPWR_RBIS_MAX(n) (((n)&0x1ffffff) << 0)
  4085. // measpwr_sigpwr_para2
  4086. #define MEASPWR_SIGPWR_RENUM(n) (((n)&0xff) << 0)
  4087. // measpwr_irt_para3
  4088. #define MEASPWR_N_TH(n) (((n)&0xffff) << 0)
  4089. #define MEASPWR_MEASPWR_IRT_PARA3_S_TH(n) (((n)&0xffff) << 16)
  4090. // measpwr_trms_para3
  4091. #define MEASPWR_N_TH(n) (((n)&0xffff) << 0)
  4092. #define MEASPWR_MEASPWR_TRMS_PARA3_S_TH(n) (((n)&0xffff) << 16)
  4093. // measpwr_rsrp_para5
  4094. #define MEASPWR_MEASPWR_RSRP_PARA5_S_TH(n) (((n)&0xffff) << 0)
  4095. #define MEASPWR_MEASPWR_RSRP_PARA5_BETA(n) (((n)&0xffff) << 16)
  4096. // measpwr_rbis_in1
  4097. #define MEASPWR_RBIS_IN0(n) (((n)&0x7f) << 0)
  4098. #define MEASPWR_RBIS_IN1(n) (((n)&0x7f) << 8)
  4099. #define MEASPWR_RESERCED3 (1 << 15)
  4100. #define MEASPWR_RBIS_IN2(n) (((n)&0x7f) << 16)
  4101. #define MEASPWR_RBIS_IN3(n) (((n)&0x7f) << 24)
  4102. // measpwr_rbis_in2
  4103. #define MEASPWR_RBIS_IN4(n) (((n)&0x7f) << 0)
  4104. #define MEASPWR_RBIS_IN_NUM(n) (((n)&0x7) << 8)
  4105. // measpwr_rbis2_in1
  4106. #define MEASPWR_RBIS_IN0(n) (((n)&0x7f) << 0)
  4107. #define MEASPWR_RBIS_IN1(n) (((n)&0x7f) << 8)
  4108. #define MEASPWR_RESERCED3 (1 << 15)
  4109. #define MEASPWR_RBIS_IN2(n) (((n)&0x7f) << 16)
  4110. #define MEASPWR_RBIS_IN3(n) (((n)&0x7f) << 24)
  4111. // measpwr_rbis2_in2
  4112. #define MEASPWR_RBIS_IN4(n) (((n)&0x7f) << 0)
  4113. #define MEASPWR_RBIS_IN_NUM(n) (((n)&0x7) << 8)
  4114. // measpwr_rbis3_in1
  4115. #define MEASPWR_RBIS_IN0(n) (((n)&0x7f) << 0)
  4116. #define MEASPWR_RBIS_IN1(n) (((n)&0x7f) << 8)
  4117. #define MEASPWR_RESERCED3 (1 << 15)
  4118. #define MEASPWR_RBIS_IN2(n) (((n)&0x7f) << 16)
  4119. #define MEASPWR_RBIS_IN3(n) (((n)&0x7f) << 24)
  4120. // measpwr_rbis3_in2
  4121. #define MEASPWR_RBIS_IN4(n) (((n)&0x7f) << 0)
  4122. #define MEASPWR_RBIS_IN_NUM(n) (((n)&0x7) << 8)
  4123. // mem_in_1
  4124. #define MEASPWR_MEM_IN_1(n) (((n)&0xffffff) << 0)
  4125. // mem_in_2
  4126. #define MEASPWR_MEM_IN_2(n) (((n)&0xffffff) << 0)
  4127. // mem_in_3
  4128. #define MEASPWR_MEM_IN_3(n) (((n)&0xffffff) << 0)
  4129. // mem_in_4
  4130. #define MEASPWR_MEM_IN_4(n) (((n)&0xffffff) << 0)
  4131. // mem_in_5
  4132. #define MEASPWR_MEM_IN_5(n) (((n)&0xffffff) << 0)
  4133. // mem_in_6
  4134. #define MEASPWR_MEM_IN_6(n) (((n)&0xffffff) << 0)
  4135. // mem_in_7
  4136. #define MEASPWR_MEM_IN_7(n) (((n)&0xffffff) << 0)
  4137. // mem_in_8
  4138. #define MEASPWR_MEM_IN_8(n) (((n)&0xffffff) << 0)
  4139. #endif // _MEASPWR_H_