8811_psram.ld 4.1 KB

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  1. /* Copyright (C) 2018 RDA Technologies Limited and/or its affiliates("RDA").
  2. * All rights reserved.
  3. *
  4. * This software is supplied "AS IS" without any warranties.
  5. * RDA assumes no responsibility or liability for the use of the software,
  6. * conveys no license or title under any patent, copyright, or mask work
  7. * right to the product. RDA reserves the right to make changes in the
  8. * software without notification. RDA also make no representation or
  9. * warranty that such application will be suitable for the specified use
  10. * without further testing or modification.
  11. */
  12. // NOTE: THIS IS JUST AN EXAMPLE, NOT RECOMMENDED PSRAM USAGE AND LAYOUT!
  13. #include "link_defs.ld"
  14. OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
  15. OUTPUT_ARCH(arm)
  16. ENTRY(Reset_Handler)
  17. EXTERN(Reset_Handler)
  18. EXTERN(gRomFunctionTable)
  19. #define LIBC_RAMTEXT SORT(*)(.text.memcpy) \
  20. SORT(*)(.text.memcmp) \
  21. SORT(*)(.text.memset) \
  22. SORT(*)(.text.strlen) \
  23. SORT(*)(.text.strnlen) \
  24. SORT(*)(.text.srand) \
  25. SORT(*)(.text.rand)
  26. #define LIBGCC_RAMTEXT *libgcc.a:*divmod*.*(DEF_RO) \
  27. *libgcc.a:*dvmod*.*(DEF_RO)
  28. #define NB_RAMTEXT SORT(*)(.text.log.*) \
  29. SORT(*)(.text.kernel.*) \
  30. SORT(*)(.text.nl1c.*) \
  31. SORT(*)(.text.rfd.*) \
  32. SORT(*)(.text.errc.*) \
  33. SORT(*)(.text.emac.*) \
  34. SORT(*)(.text.dba.*) \
  35. SORT(libnbcpu.a:*)(DEF_RO) \
  36. SORT(*)(.syssram_L1_text .nbsram_patch_text)
  37. #define entry_contents *(RESET)
  38. #define sramboottext_contents KEEP(*(VECTORS)) SORT(*)(.sramboottext .sramboottext.*)
  39. #define sramtext_contents NB_RAMTEXT SORT(*)(.sramtext .sramtext.*)
  40. #define ramtext_contents SORT(*)(.ramtext .ramtext.*)
  41. #define text_contents SORT(*)(DEF_RO) KEEP(*(.rokeep))
  42. #define sramdata_contents SORT(*)(.sramdata .sramdata.* .bootsramdata .sramucdata)
  43. #define data_contents SORT(*)(DEF_RW) KEEP(*(.rwkeep))
  44. #define srambss_contents *(.srambss .srambss.* .sramuninit .sramucbss)
  45. #define bss_contents *(DEF_ZI .ucdata .ucbackup)
  46. #define init_array_contents KEEP(*(.init_array*))
  47. #define nbrom_funclist_contents KEEP(*(.rom_funclist))
  48. #define trace_sn_contents KEEP(*(.trace_sn))
  49. #ifndef CONFIG_BSCORE_ENABLE
  50. #undef CONFIG_BSCORE_SIZE
  51. #define CONFIG_BSCORE_SIZE 0
  52. #endif
  53. #define SRAM_HEAP_END (ORIGIN(sram) + LENGTH(sram) - CONFIG_IRQ_STACK_SIZE - CONFIG_BLUE_SCREEN_SIZE - CONFIG_BSCORE_SIZE - CONFIG_TRACE_SN_SIZE)
  54. MEMORY {
  55. flash(rx): ORIGIN = CONFIG_APP_FLASH_ADDRESS, LENGTH = CONFIG_APP_FLASH_SIZE
  56. sram(rwx): ORIGIN = CONFIG_APP_SRAM_ADDRESS, LENGTH = CONFIG_APP_SRAM_SIZE
  57. nbsram(rw): ORIGIN = CONFIG_NBROM_SRAM_START, LENGTH = CONFIG_NBROM_SRAM_SIZE
  58. psram(rwx): ORIGIN = CONFIG_RAM_PHY_ADDRESS + CONFIG_RAM_HEADER_SIZE, LENGTH = CONFIG_RAM_SIZE - CONFIG_RAM_HEADER_SIZE
  59. }
  60. SECTIONS {
  61. #include "nbrom_for_link.ld"
  62. NOLOAD_SIZE_SECT(simage, CONFIG_SIMAGE_HEADER_SIZE) >flash
  63. ANCHOR_SECT(flash_start) >flash
  64. NOAT_SECT(entry) >flash
  65. LOAD_SECT(sramboottext) >sram AT>flash
  66. LOAD_SECT(sramtext) >sram AT>flash
  67. LOAD_SECT(ramtext) >sram AT>flash
  68. NOAT_SECT(init_array) >flash
  69. NOAT_SECT(text) >flash
  70. LOAD_SECT(sramdata) >sram AT>flash
  71. LOAD_SECT(data) >psram AT>flash
  72. NOLOAD_SECT(srambss) >sram
  73. NOLOAD_SECT(bss) >psram
  74. NOLOAD_END_SECT(sram_heap, SRAM_HEAP_END) >sram
  75. NOLOAD_SIZE_SECT(blue_screen, CONFIG_BLUE_SCREEN_SIZE) >sram
  76. NOLOAD_SIZE_SECT(irq_stack, CONFIG_IRQ_STACK_SIZE) >sram
  77. NOLOAD_SIZE_SECT(bscore, CONFIG_BSCORE_SIZE) >sram
  78. NOLOAD_SECT(trace_sn) >sram
  79. LOAD_SECT(nbrom_funclist) > nbsram AT>flash
  80. NOLOAD_END_SECT(heap, ORIGIN(psram) + LENGTH(psram)) > psram
  81. ANCHOR_SECT(flash_end) >flash
  82. IGNORE_DISCARD_SECTS
  83. }