hal_iomux_pin.h 45 KB

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  1. /* Copyright (C) 2018 RDA Technologies Limited and/or its affiliates("RDA").
  2. * All rights reserved.
  3. *
  4. * This software is supplied "AS IS" without any warranties.
  5. * RDA assumes no responsibility or liability for the use of the software,
  6. * conveys no license or title under any patent, copyright, or mask work
  7. * right to the product. RDA reserves the right to make changes in the
  8. * software without notification. RDA also make no representation or
  9. * warranty that such application will be suitable for the specified use
  10. * without further testing or modification.
  11. */
  12. #ifndef _HAL_IOMUX_PIN_H_
  13. #define _HAL_IOMUX_PIN_H_
  14. // Auto generated. Don't edit it manually!
  15. // all functions
  16. #define HAL_IOMUX_FUN_ADI_SCL 1 // 0x1
  17. #define HAL_IOMUX_FUN_ADI_SDA 2 // 0x2
  18. #define HAL_IOMUX_FUN_AP_JTAG_TCK 3 // 0x3
  19. #define HAL_IOMUX_FUN_AP_JTAG_TDI 4 // 0x4
  20. #define HAL_IOMUX_FUN_AP_JTAG_TDO 5 // 0x5
  21. #define HAL_IOMUX_FUN_AP_JTAG_TMS 6 // 0x6
  22. #define HAL_IOMUX_FUN_AP_JTAG_TRST 7 // 0x7
  23. #define HAL_IOMUX_FUN_AUD_AD_D0 8 // 0x8
  24. #define HAL_IOMUX_FUN_AUD_AD_SYNC 9 // 0x9
  25. #define HAL_IOMUX_FUN_AUD_DA_D0 10 // 0xa
  26. #define HAL_IOMUX_FUN_AUD_DA_D1 11 // 0xb
  27. #define HAL_IOMUX_FUN_AUD_DA_SYNC 12 // 0xc
  28. #define HAL_IOMUX_FUN_AUD_SCLK 13 // 0xd
  29. #define HAL_IOMUX_FUN_CAMERA_PWDN 14 // 0xe
  30. #define HAL_IOMUX_FUN_CAMERA_REF_CLK 15 // 0xf
  31. #define HAL_IOMUX_FUN_CAMERA_RST_L 16 // 0x10
  32. #define HAL_IOMUX_FUN_CHIP_PD 17 // 0x11
  33. #define HAL_IOMUX_FUN_CLK26M_PMIC 18 // 0x12
  34. #define HAL_IOMUX_FUN_CTS 19 // 0x13
  35. #define HAL_IOMUX_FUN_DBGIO_CLK 20 // 0x14
  36. #define HAL_IOMUX_FUN_DBGIO_CMD 21 // 0x15
  37. #define HAL_IOMUX_FUN_DBGIO_DATA0 22 // 0x16
  38. #define HAL_IOMUX_FUN_DBGIO_DATA1 23 // 0x17
  39. #define HAL_IOMUX_FUN_DBGIO_DATA2 24 // 0x18
  40. #define HAL_IOMUX_FUN_DBGIO_DATA3 25 // 0x19
  41. #define HAL_IOMUX_FUN_DBGIO_DATA4 26 // 0x1a
  42. #define HAL_IOMUX_FUN_DBGIO_DATA5 27 // 0x1b
  43. #define HAL_IOMUX_FUN_DBGIO_DATA6 28 // 0x1c
  44. #define HAL_IOMUX_FUN_DBGIO_DATA7 29 // 0x1d
  45. #define HAL_IOMUX_FUN_DBG_CLK 30 // 0x1e
  46. #define HAL_IOMUX_FUN_DBG_DO_3 31 // 0x1f
  47. #define HAL_IOMUX_FUN_DBG_DO_4 32 // 0x20
  48. #define HAL_IOMUX_FUN_DBG_DO_5 33 // 0x21
  49. #define HAL_IOMUX_FUN_DBG_DO_6 34 // 0x22
  50. #define HAL_IOMUX_FUN_DBG_DO_7 35 // 0x23
  51. #define HAL_IOMUX_FUN_DBG_DO_8 36 // 0x24
  52. #define HAL_IOMUX_FUN_DBG_DO_9 37 // 0x25
  53. #define HAL_IOMUX_FUN_DBG_DO_10 38 // 0x26
  54. #define HAL_IOMUX_FUN_DBG_DO_11 39 // 0x27
  55. #define HAL_IOMUX_FUN_DBG_DO_12 40 // 0x28
  56. #define HAL_IOMUX_FUN_DBG_DO_13 41 // 0x29
  57. #define HAL_IOMUX_FUN_DBG_DO_14 42 // 0x2a
  58. #define HAL_IOMUX_FUN_DBG_DO_15 43 // 0x2b
  59. #define HAL_IOMUX_FUN_DBG_TRIG 44 // 0x2c
  60. #define HAL_IOMUX_FUN_DEBUG_BUS_0 45 // 0x2d
  61. #define HAL_IOMUX_FUN_DEBUG_BUS_1 46 // 0x2e
  62. #define HAL_IOMUX_FUN_DEBUG_BUS_2 47 // 0x2f
  63. #define HAL_IOMUX_FUN_DEBUG_BUS_3 48 // 0x30
  64. #define HAL_IOMUX_FUN_DEBUG_BUS_4 49 // 0x31
  65. #define HAL_IOMUX_FUN_DEBUG_BUS_5 50 // 0x32
  66. #define HAL_IOMUX_FUN_DEBUG_BUS_6 51 // 0x33
  67. #define HAL_IOMUX_FUN_DEBUG_BUS_7 52 // 0x34
  68. #define HAL_IOMUX_FUN_DEBUG_BUS_8 53 // 0x35
  69. #define HAL_IOMUX_FUN_DEBUG_BUS_9 54 // 0x36
  70. #define HAL_IOMUX_FUN_DEBUG_BUS_10 55 // 0x37
  71. #define HAL_IOMUX_FUN_DEBUG_BUS_11 56 // 0x38
  72. #define HAL_IOMUX_FUN_DEBUG_BUS_12 57 // 0x39
  73. #define HAL_IOMUX_FUN_DEBUG_BUS_13 58 // 0x3a
  74. #define HAL_IOMUX_FUN_DEBUG_BUS_14 59 // 0x3b
  75. #define HAL_IOMUX_FUN_DEBUG_BUS_15 60 // 0x3c
  76. #define HAL_IOMUX_FUN_DEBUG_CLK 61 // 0x3d
  77. #define HAL_IOMUX_FUN_DEBUG_HOST_CLK 62 // 0x3e
  78. #define HAL_IOMUX_FUN_DEBUG_HOST_RX 63 // 0x3f
  79. #define HAL_IOMUX_FUN_DEBUG_HOST_TX 64 // 0x40
  80. #define HAL_IOMUX_FUN_DIGRF_STROBE_S_O 65 // 0x41
  81. #define HAL_IOMUX_FUN_GPADC_IN1 66 // 0x42
  82. #define HAL_IOMUX_FUN_GPADC_IN2 67 // 0x43
  83. #define HAL_IOMUX_FUN_GPADC_IN3 68 // 0x44
  84. #define HAL_IOMUX_FUN_GPIO_0 69 // 0x45
  85. #define HAL_IOMUX_FUN_GPIO_1 70 // 0x46
  86. #define HAL_IOMUX_FUN_GPIO_2 71 // 0x47
  87. #define HAL_IOMUX_FUN_GPIO_3 72 // 0x48
  88. #define HAL_IOMUX_FUN_GPIO_4 73 // 0x49
  89. #define HAL_IOMUX_FUN_GPIO_5 74 // 0x4a
  90. #define HAL_IOMUX_FUN_GPIO_6 75 // 0x4b
  91. #define HAL_IOMUX_FUN_GPIO_7 76 // 0x4c
  92. #define HAL_IOMUX_FUN_GPIO_8 77 // 0x4d
  93. #define HAL_IOMUX_FUN_GPIO_9 78 // 0x4e
  94. #define HAL_IOMUX_FUN_GPIO_10 79 // 0x4f
  95. #define HAL_IOMUX_FUN_GPIO_11 80 // 0x50
  96. #define HAL_IOMUX_FUN_GPIO_12 81 // 0x51
  97. #define HAL_IOMUX_FUN_GPIO_13 82 // 0x52
  98. #define HAL_IOMUX_FUN_GPIO_14 83 // 0x53
  99. #define HAL_IOMUX_FUN_GPIO_15 84 // 0x54
  100. #define HAL_IOMUX_FUN_GPIO_16 85 // 0x55
  101. #define HAL_IOMUX_FUN_GPIO_17 86 // 0x56
  102. #define HAL_IOMUX_FUN_GPIO_18 87 // 0x57
  103. #define HAL_IOMUX_FUN_GPIO_19 88 // 0x58
  104. #define HAL_IOMUX_FUN_GPIO_20 89 // 0x59
  105. #define HAL_IOMUX_FUN_GPIO_21 90 // 0x5a
  106. #define HAL_IOMUX_FUN_GPIO_22 91 // 0x5b
  107. #define HAL_IOMUX_FUN_GPIO_23 92 // 0x5c
  108. #define HAL_IOMUX_FUN_GPIO_24 93 // 0x5d
  109. #define HAL_IOMUX_FUN_GPIO_25 94 // 0x5e
  110. #define HAL_IOMUX_FUN_GPIO_26 95 // 0x5f
  111. #define HAL_IOMUX_FUN_GPIO_27 96 // 0x60
  112. #define HAL_IOMUX_FUN_GPIO_28 97 // 0x61
  113. #define HAL_IOMUX_FUN_GPIO_29 98 // 0x62
  114. #define HAL_IOMUX_FUN_GPIO_30 99 // 0x63
  115. #define HAL_IOMUX_FUN_GPIO_31 100 // 0x64
  116. #define HAL_IOMUX_FUN_GPIO_32 101 // 0x65
  117. #define HAL_IOMUX_FUN_GPIO_33 102 // 0x66
  118. #define HAL_IOMUX_FUN_GPIO_34 103 // 0x67
  119. #define HAL_IOMUX_FUN_GPIO_35 104 // 0x68
  120. #define HAL_IOMUX_FUN_GPIO_36 105 // 0x69
  121. #define HAL_IOMUX_FUN_GPIO_37 106 // 0x6a
  122. #define HAL_IOMUX_FUN_GPIO_38 107 // 0x6b
  123. #define HAL_IOMUX_FUN_GPIO_39 108 // 0x6c
  124. #define HAL_IOMUX_FUN_GPIO_40 109 // 0x6d
  125. #define HAL_IOMUX_FUN_GPIO_41 110 // 0x6e
  126. #define HAL_IOMUX_FUN_GPIO_42 111 // 0x6f
  127. #define HAL_IOMUX_FUN_GPIO_43 112 // 0x70
  128. #define HAL_IOMUX_FUN_GPIO_44 113 // 0x71
  129. #define HAL_IOMUX_FUN_GPIO_45 114 // 0x72
  130. #define HAL_IOMUX_FUN_GPIO_46 115 // 0x73
  131. #define HAL_IOMUX_FUN_GPIO_47 116 // 0x74
  132. #define HAL_IOMUX_FUN_I2C_M1_SCL 117 // 0x75
  133. #define HAL_IOMUX_FUN_I2C_M1_SDA 118 // 0x76
  134. #define HAL_IOMUX_FUN_I2C_M2_SCL 119 // 0x77
  135. #define HAL_IOMUX_FUN_I2C_M2_SDA 120 // 0x78
  136. #define HAL_IOMUX_FUN_I2C_M3_SCL 121 // 0x79
  137. #define HAL_IOMUX_FUN_I2C_M3_SDA 122 // 0x7a
  138. #define HAL_IOMUX_FUN_I2S1_BCK 123 // 0x7b
  139. #define HAL_IOMUX_FUN_I2S1_LRCK 124 // 0x7c
  140. #define HAL_IOMUX_FUN_I2S1_MCLK 125 // 0x7d
  141. #define HAL_IOMUX_FUN_I2S1_SDAT_I 126 // 0x7e
  142. #define HAL_IOMUX_FUN_I2S1_SDAT_O 127 // 0x7f
  143. #define HAL_IOMUX_FUN_KEYIN_0 128 // 0x80
  144. #define HAL_IOMUX_FUN_KEYIN_1 129 // 0x81
  145. #define HAL_IOMUX_FUN_KEYIN_2 130 // 0x82
  146. #define HAL_IOMUX_FUN_KEYIN_3 131 // 0x83
  147. #define HAL_IOMUX_FUN_KEYIN_4 132 // 0x84
  148. #define HAL_IOMUX_FUN_KEYIN_5 133 // 0x85
  149. #define HAL_IOMUX_FUN_KEYOUT_0 134 // 0x86
  150. #define HAL_IOMUX_FUN_KEYOUT_1 135 // 0x87
  151. #define HAL_IOMUX_FUN_KEYOUT_2 136 // 0x88
  152. #define HAL_IOMUX_FUN_KEYOUT_3 137 // 0x89
  153. #define HAL_IOMUX_FUN_KEYOUT_4 138 // 0x8a
  154. #define HAL_IOMUX_FUN_KEYOUT_5 139 // 0x8b
  155. #define HAL_IOMUX_FUN_LCD_FMARK 140 // 0x8c
  156. #define HAL_IOMUX_FUN_LCD_RSTB 141 // 0x8d
  157. #define HAL_IOMUX_FUN_LNA_EN 142 // 0x8e
  158. #define HAL_IOMUX_FUN_LTE_GPO_0 143 // 0x8f
  159. #define HAL_IOMUX_FUN_LTE_GPO_1 144 // 0x90
  160. #define HAL_IOMUX_FUN_LTE_GPO_2 145 // 0x91
  161. #define HAL_IOMUX_FUN_LTE_GPO_3 146 // 0x92
  162. #define HAL_IOMUX_FUN_LTE_GPO_4 147 // 0x93
  163. #define HAL_IOMUX_FUN_LTE_GPO_5 148 // 0x94
  164. #define HAL_IOMUX_FUN_LTE_GPO_7 149 // 0x95
  165. #define HAL_IOMUX_FUN_LTE_GPO_8 150 // 0x96
  166. #define HAL_IOMUX_FUN_M_SPI_CLK 151 // 0x97
  167. #define HAL_IOMUX_FUN_M_SPI_CS 152 // 0x98
  168. #define HAL_IOMUX_FUN_M_SPI_D_0 153 // 0x99
  169. #define HAL_IOMUX_FUN_M_SPI_D_1 154 // 0x9a
  170. #define HAL_IOMUX_FUN_M_SPI_D_2 155 // 0x9b
  171. #define HAL_IOMUX_FUN_M_SPI_D_3 156 // 0x9c
  172. #define HAL_IOMUX_FUN_NAND_SEL 157 // 0x9d
  173. #define HAL_IOMUX_FUN_OSC_32K 158 // 0x9e
  174. #define HAL_IOMUX_FUN_OSC_ADC_CLK 159 // 0x9f
  175. #define HAL_IOMUX_FUN_OSC_ADC_DATA 160 // 0xa0
  176. #define HAL_IOMUX_FUN_PMIC_EXT_INT 161 // 0xa1
  177. #define HAL_IOMUX_FUN_PPS_OUT 162 // 0xa2
  178. #define HAL_IOMUX_FUN_PWM_0 163 // 0xa3
  179. #define HAL_IOMUX_FUN_PWM_1 164 // 0xa4
  180. #define HAL_IOMUX_FUN_PWM_2 165 // 0xa5
  181. #define HAL_IOMUX_FUN_PWM_3 166 // 0xa6
  182. #define HAL_IOMUX_FUN_PWM_4 167 // 0xa7
  183. #define HAL_IOMUX_FUN_PWM_5 168 // 0xa8
  184. #define HAL_IOMUX_FUN_PWM_6 169 // 0xa9
  185. #define HAL_IOMUX_FUN_PWM_7 170 // 0xaa
  186. #define HAL_IOMUX_FUN_PWM_8 171 // 0xab
  187. #define HAL_IOMUX_FUN_PWM_9 172 // 0xac
  188. #define HAL_IOMUX_FUN_PWM_10 173 // 0xad
  189. #define HAL_IOMUX_FUN_PWM_11 174 // 0xae
  190. #define HAL_IOMUX_FUN_PWM_12 175 // 0xaf
  191. #define HAL_IOMUX_FUN_PWM_13 176 // 0xb0
  192. #define HAL_IOMUX_FUN_PWM_14 177 // 0xb1
  193. #define HAL_IOMUX_FUN_PWM_15 178 // 0xb2
  194. #define HAL_IOMUX_FUN_RESETB 179 // 0xb3
  195. #define HAL_IOMUX_FUN_RFFE_SCK 180 // 0xb4
  196. #define HAL_IOMUX_FUN_RFFE_SDA 181 // 0xb5
  197. #define HAL_IOMUX_FUN_RF_GPIO0 182 // 0xb6
  198. #define HAL_IOMUX_FUN_RF_GPIO1 183 // 0xb7
  199. #define HAL_IOMUX_FUN_RF_GPIO2 184 // 0xb8
  200. #define HAL_IOMUX_FUN_RF_GPIO3 185 // 0xb9
  201. #define HAL_IOMUX_FUN_RF_GPIO4 186 // 0xba
  202. #define HAL_IOMUX_FUN_RF_GPIO5 187 // 0xbb
  203. #define HAL_IOMUX_FUN_RF_GPIO6 188 // 0xbc
  204. #define HAL_IOMUX_FUN_RF_GPIO7 189 // 0xbd
  205. #define HAL_IOMUX_FUN_RF_GPIO8 190 // 0xbe
  206. #define HAL_IOMUX_FUN_RF_GPIO9 191 // 0xbf
  207. #define HAL_IOMUX_FUN_SDMMC1_CLK 192 // 0xc0
  208. #define HAL_IOMUX_FUN_SDMMC1_CMD 193 // 0xc1
  209. #define HAL_IOMUX_FUN_SDMMC1_DATA_0 194 // 0xc2
  210. #define HAL_IOMUX_FUN_SDMMC1_DATA_1 195 // 0xc3
  211. #define HAL_IOMUX_FUN_SDMMC1_DATA_2 196 // 0xc4
  212. #define HAL_IOMUX_FUN_SDMMC1_DATA_3 197 // 0xc5
  213. #define HAL_IOMUX_FUN_SDMMC1_DATA_4 198 // 0xc6
  214. #define HAL_IOMUX_FUN_SDMMC1_DATA_5 199 // 0xc7
  215. #define HAL_IOMUX_FUN_SDMMC1_DATA_6 200 // 0xc8
  216. #define HAL_IOMUX_FUN_SDMMC1_DATA_7 201 // 0xc9
  217. #define HAL_IOMUX_FUN_SDMMC1_RST 202 // 0xca
  218. #define HAL_IOMUX_FUN_SDMMC2_CLK 203 // 0xcb
  219. #define HAL_IOMUX_FUN_SDMMC2_CMD 204 // 0xcc
  220. #define HAL_IOMUX_FUN_SDMMC2_DATA_0 205 // 0xcd
  221. #define HAL_IOMUX_FUN_SDMMC2_DATA_1 206 // 0xce
  222. #define HAL_IOMUX_FUN_SDMMC2_DATA_2 207 // 0xcf
  223. #define HAL_IOMUX_FUN_SDMMC2_DATA_3 208 // 0xd0
  224. #define HAL_IOMUX_FUN_SIM_0_CLK 209 // 0xd1
  225. #define HAL_IOMUX_FUN_SIM_0_DIO 210 // 0xd2
  226. #define HAL_IOMUX_FUN_SIM_0_RST 211 // 0xd3
  227. #define HAL_IOMUX_FUN_SIM_1_CLK 212 // 0xd4
  228. #define HAL_IOMUX_FUN_SIM_1_DIO 213 // 0xd5
  229. #define HAL_IOMUX_FUN_SIM_1_RST 214 // 0xd6
  230. #define HAL_IOMUX_FUN_SPI_1_CLK 215 // 0xd7
  231. #define HAL_IOMUX_FUN_SPI_1_CS_0 216 // 0xd8
  232. #define HAL_IOMUX_FUN_SPI_1_CS_1 217 // 0xd9
  233. #define HAL_IOMUX_FUN_SPI_1_DIO_0 218 // 0xda
  234. #define HAL_IOMUX_FUN_SPI_1_DI_1 219 // 0xdb
  235. #define HAL_IOMUX_FUN_SPI_2_CLK 220 // 0xdc
  236. #define HAL_IOMUX_FUN_SPI_2_CS_0 221 // 0xdd
  237. #define HAL_IOMUX_FUN_SPI_2_CS_1 222 // 0xde
  238. #define HAL_IOMUX_FUN_SPI_2_DIO_0 223 // 0xdf
  239. #define HAL_IOMUX_FUN_SPI_2_DI_1 224 // 0xe0
  240. #define HAL_IOMUX_FUN_SPI_CAMERA_SCK 225 // 0xe1
  241. #define HAL_IOMUX_FUN_SPI_CAMERA_SI_0 226 // 0xe2
  242. #define HAL_IOMUX_FUN_SPI_CAMERA_SI_1 227 // 0xe3
  243. #define HAL_IOMUX_FUN_SPI_CAMERA_SSN 228 // 0xe4
  244. #define HAL_IOMUX_FUN_SPI_FLASH1_CLK 229 // 0xe5
  245. #define HAL_IOMUX_FUN_SPI_FLASH1_CS 230 // 0xe6
  246. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_0 231 // 0xe7
  247. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_1 232 // 0xe8
  248. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_2 233 // 0xe9
  249. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_3 234 // 0xea
  250. #define HAL_IOMUX_FUN_SPI_LCD_CLK 235 // 0xeb
  251. #define HAL_IOMUX_FUN_SPI_LCD_CS 236 // 0xec
  252. #define HAL_IOMUX_FUN_SPI_LCD_SDC 237 // 0xed
  253. #define HAL_IOMUX_FUN_SPI_LCD_SELECT 238 // 0xee
  254. #define HAL_IOMUX_FUN_SPI_LCD_SIO 239 // 0xef
  255. #define HAL_IOMUX_FUN_TEST_CLKOUT 240 // 0xf0
  256. #define HAL_IOMUX_FUN_TIMESTAMP_IN 241 // 0xf1
  257. #define HAL_IOMUX_FUN_TIMESTAMP_OUT 242 // 0xf2
  258. #define HAL_IOMUX_FUN_TSX_ADC_CH_DATA 243 // 0xf3
  259. #define HAL_IOMUX_FUN_TSX_ADC_CH_SEL 244 // 0xf4
  260. #define HAL_IOMUX_FUN_TSX_ADC_CLK 245 // 0xf5
  261. #define HAL_IOMUX_FUN_UART_1_CTS 246 // 0xf6
  262. #define HAL_IOMUX_FUN_UART_1_RTS 247 // 0xf7
  263. #define HAL_IOMUX_FUN_UART_1_RXD 248 // 0xf8
  264. #define HAL_IOMUX_FUN_UART_1_TXD 249 // 0xf9
  265. #define HAL_IOMUX_FUN_UART_2_CTS 250 // 0xfa
  266. #define HAL_IOMUX_FUN_UART_2_RTS 251 // 0xfb
  267. #define HAL_IOMUX_FUN_UART_2_RXD 252 // 0xfc
  268. #define HAL_IOMUX_FUN_UART_2_TXD 253 // 0xfd
  269. #define HAL_IOMUX_FUN_UART_3_CTS 254 // 0xfe
  270. #define HAL_IOMUX_FUN_UART_3_RTS 255 // 0xff
  271. #define HAL_IOMUX_FUN_UART_3_RXD 256 // 0x100
  272. #define HAL_IOMUX_FUN_UART_3_TXD 257 // 0x101
  273. #define HAL_IOMUX_FUN_UART_4_CTS 258 // 0x102
  274. #define HAL_IOMUX_FUN_UART_4_RTS 259 // 0x103
  275. #define HAL_IOMUX_FUN_UART_4_RXD 260 // 0x104
  276. #define HAL_IOMUX_FUN_UART_4_TXD 261 // 0x105
  277. #define HAL_IOMUX_FUN_UART_5_CTS 262 // 0x106
  278. #define HAL_IOMUX_FUN_UART_5_RTS 263 // 0x107
  279. #define HAL_IOMUX_FUN_UART_5_RXD 264 // 0x108
  280. #define HAL_IOMUX_FUN_UART_5_TXD 265 // 0x109
  281. #define HAL_IOMUX_FUN_UART_6_CTS 266 // 0x10a
  282. #define HAL_IOMUX_FUN_UART_6_RTS 267 // 0x10b
  283. #define HAL_IOMUX_FUN_UART_6_RXD 268 // 0x10c
  284. #define HAL_IOMUX_FUN_UART_6_TXD 269 // 0x10d
  285. #define HAL_IOMUX_FUN_COUNT 269
  286. // all pads
  287. #define HAL_IOMUX_PAD_ADI_SCL (1 << 12) // 0x1
  288. #define HAL_IOMUX_PAD_ADI_SDA (2 << 12) // 0x2
  289. #define HAL_IOMUX_PAD_CAMERA_PWDN (3 << 12) // 0x3
  290. #define HAL_IOMUX_PAD_CAMERA_REF_CLK (4 << 12) // 0x4
  291. #define HAL_IOMUX_PAD_CAMERA_RST_L (5 << 12) // 0x5
  292. #define HAL_IOMUX_PAD_CHIP_PD (6 << 12) // 0x6
  293. #define HAL_IOMUX_PAD_CLK26M_PMIC (7 << 12) // 0x7
  294. #define HAL_IOMUX_PAD_DEBUG_HOST_CLK (8 << 12) // 0x8
  295. #define HAL_IOMUX_PAD_DEBUG_HOST_RX (9 << 12) // 0x9
  296. #define HAL_IOMUX_PAD_DEBUG_HOST_TX (10 << 12) // 0xa
  297. #define HAL_IOMUX_PAD_GPIO_0 (11 << 12) // 0xb
  298. #define HAL_IOMUX_PAD_GPIO_1 (12 << 12) // 0xc
  299. #define HAL_IOMUX_PAD_GPIO_2 (13 << 12) // 0xd
  300. #define HAL_IOMUX_PAD_GPIO_3 (14 << 12) // 0xe
  301. #define HAL_IOMUX_PAD_GPIO_4 (15 << 12) // 0xf
  302. #define HAL_IOMUX_PAD_GPIO_5 (16 << 12) // 0x10
  303. #define HAL_IOMUX_PAD_GPIO_6 (17 << 12) // 0x11
  304. #define HAL_IOMUX_PAD_GPIO_7 (18 << 12) // 0x12
  305. #define HAL_IOMUX_PAD_GPIO_16 (19 << 12) // 0x13
  306. #define HAL_IOMUX_PAD_GPIO_17 (20 << 12) // 0x14
  307. #define HAL_IOMUX_PAD_GPIO_18 (21 << 12) // 0x15
  308. #define HAL_IOMUX_PAD_GPIO_19 (22 << 12) // 0x16
  309. #define HAL_IOMUX_PAD_GPIO_20 (23 << 12) // 0x17
  310. #define HAL_IOMUX_PAD_GPIO_21 (24 << 12) // 0x18
  311. #define HAL_IOMUX_PAD_GPIO_22 (25 << 12) // 0x19
  312. #define HAL_IOMUX_PAD_GPIO_23 (26 << 12) // 0x1a
  313. #define HAL_IOMUX_PAD_I2C_M1_SCL (27 << 12) // 0x1b
  314. #define HAL_IOMUX_PAD_I2C_M1_SDA (28 << 12) // 0x1c
  315. #define HAL_IOMUX_PAD_I2C_M2_SCL (29 << 12) // 0x1d
  316. #define HAL_IOMUX_PAD_I2C_M2_SDA (30 << 12) // 0x1e
  317. #define HAL_IOMUX_PAD_I2S1_BCK (31 << 12) // 0x1f
  318. #define HAL_IOMUX_PAD_I2S1_LRCK (32 << 12) // 0x20
  319. #define HAL_IOMUX_PAD_I2S1_MCLK (33 << 12) // 0x21
  320. #define HAL_IOMUX_PAD_I2S1_SDAT_O (34 << 12) // 0x22
  321. #define HAL_IOMUX_PAD_I2S_SDAT_I (35 << 12) // 0x23
  322. #define HAL_IOMUX_PAD_KEYIN_0 (36 << 12) // 0x24
  323. #define HAL_IOMUX_PAD_KEYIN_1 (37 << 12) // 0x25
  324. #define HAL_IOMUX_PAD_KEYIN_2 (38 << 12) // 0x26
  325. #define HAL_IOMUX_PAD_KEYIN_3 (39 << 12) // 0x27
  326. #define HAL_IOMUX_PAD_KEYIN_4 (40 << 12) // 0x28
  327. #define HAL_IOMUX_PAD_KEYIN_5 (41 << 12) // 0x29
  328. #define HAL_IOMUX_PAD_KEYOUT_0 (42 << 12) // 0x2a
  329. #define HAL_IOMUX_PAD_KEYOUT_1 (43 << 12) // 0x2b
  330. #define HAL_IOMUX_PAD_KEYOUT_2 (44 << 12) // 0x2c
  331. #define HAL_IOMUX_PAD_KEYOUT_3 (45 << 12) // 0x2d
  332. #define HAL_IOMUX_PAD_KEYOUT_4 (46 << 12) // 0x2e
  333. #define HAL_IOMUX_PAD_KEYOUT_5 (47 << 12) // 0x2f
  334. #define HAL_IOMUX_PAD_LCD_FMARK (48 << 12) // 0x30
  335. #define HAL_IOMUX_PAD_LCD_RSTB (49 << 12) // 0x31
  336. #define HAL_IOMUX_PAD_M_SPI_CLK (50 << 12) // 0x32
  337. #define HAL_IOMUX_PAD_M_SPI_CS (51 << 12) // 0x33
  338. #define HAL_IOMUX_PAD_M_SPI_D_0 (52 << 12) // 0x34
  339. #define HAL_IOMUX_PAD_M_SPI_D_1 (53 << 12) // 0x35
  340. #define HAL_IOMUX_PAD_M_SPI_D_2 (54 << 12) // 0x36
  341. #define HAL_IOMUX_PAD_M_SPI_D_3 (55 << 12) // 0x37
  342. #define HAL_IOMUX_PAD_NAND_SEL (56 << 12) // 0x38
  343. #define HAL_IOMUX_PAD_OSC_32K (57 << 12) // 0x39
  344. #define HAL_IOMUX_PAD_PMIC_EXT_INT (58 << 12) // 0x3a
  345. #define HAL_IOMUX_PAD_RESETB (59 << 12) // 0x3b
  346. #define HAL_IOMUX_PAD_RFDIG_GPIO_0 (60 << 12) // 0x3c
  347. #define HAL_IOMUX_PAD_RFDIG_GPIO_1 (61 << 12) // 0x3d
  348. #define HAL_IOMUX_PAD_RFDIG_GPIO_2 (62 << 12) // 0x3e
  349. #define HAL_IOMUX_PAD_RFDIG_GPIO_3 (63 << 12) // 0x3f
  350. #define HAL_IOMUX_PAD_RFDIG_GPIO_4 (64 << 12) // 0x40
  351. #define HAL_IOMUX_PAD_RFDIG_GPIO_5 (65 << 12) // 0x41
  352. #define HAL_IOMUX_PAD_RFDIG_GPIO_6 (66 << 12) // 0x42
  353. #define HAL_IOMUX_PAD_RFDIG_GPIO_7 (67 << 12) // 0x43
  354. #define HAL_IOMUX_PAD_SDMMC1_CLK (68 << 12) // 0x44
  355. #define HAL_IOMUX_PAD_SDMMC1_CMD (69 << 12) // 0x45
  356. #define HAL_IOMUX_PAD_SDMMC1_DATA_0 (70 << 12) // 0x46
  357. #define HAL_IOMUX_PAD_SDMMC1_DATA_1 (71 << 12) // 0x47
  358. #define HAL_IOMUX_PAD_SDMMC1_DATA_2 (72 << 12) // 0x48
  359. #define HAL_IOMUX_PAD_SDMMC1_DATA_3 (73 << 12) // 0x49
  360. #define HAL_IOMUX_PAD_SDMMC1_DATA_4 (74 << 12) // 0x4a
  361. #define HAL_IOMUX_PAD_SDMMC1_DATA_5 (75 << 12) // 0x4b
  362. #define HAL_IOMUX_PAD_SDMMC1_DATA_6 (76 << 12) // 0x4c
  363. #define HAL_IOMUX_PAD_SDMMC1_DATA_7 (77 << 12) // 0x4d
  364. #define HAL_IOMUX_PAD_SDMMC1_RST (78 << 12) // 0x4e
  365. #define HAL_IOMUX_PAD_SIM_0_CLK (79 << 12) // 0x4f
  366. #define HAL_IOMUX_PAD_SIM_0_DIO (80 << 12) // 0x50
  367. #define HAL_IOMUX_PAD_SIM_0_RST (81 << 12) // 0x51
  368. #define HAL_IOMUX_PAD_SIM_1_CLK (82 << 12) // 0x52
  369. #define HAL_IOMUX_PAD_SIM_1_DIO (83 << 12) // 0x53
  370. #define HAL_IOMUX_PAD_SIM_1_RST (84 << 12) // 0x54
  371. #define HAL_IOMUX_PAD_SPI_CAMERA_SCK (85 << 12) // 0x55
  372. #define HAL_IOMUX_PAD_SPI_CAMERA_SI_0 (86 << 12) // 0x56
  373. #define HAL_IOMUX_PAD_SPI_CAMERA_SI_1 (87 << 12) // 0x57
  374. #define HAL_IOMUX_PAD_SPI_LCD_CLK (88 << 12) // 0x58
  375. #define HAL_IOMUX_PAD_SPI_LCD_CS (89 << 12) // 0x59
  376. #define HAL_IOMUX_PAD_SPI_LCD_SDC (90 << 12) // 0x5a
  377. #define HAL_IOMUX_PAD_SPI_LCD_SELECT (91 << 12) // 0x5b
  378. #define HAL_IOMUX_PAD_SPI_LCD_SIO (92 << 12) // 0x5c
  379. #define HAL_IOMUX_PAD_SW_CLK (93 << 12) // 0x5d
  380. #define HAL_IOMUX_PAD_SW_DIO (94 << 12) // 0x5e
  381. #define HAL_IOMUX_PAD_UART_1_CTS (95 << 12) // 0x5f
  382. #define HAL_IOMUX_PAD_UART_1_RTS (96 << 12) // 0x60
  383. #define HAL_IOMUX_PAD_UART_1_RXD (97 << 12) // 0x61
  384. #define HAL_IOMUX_PAD_UART_1_TXD (98 << 12) // 0x62
  385. #define HAL_IOMUX_PAD_UART_2_CTS (99 << 12) // 0x63
  386. #define HAL_IOMUX_PAD_UART_2_RTS (100 << 12) // 0x64
  387. #define HAL_IOMUX_PAD_UART_2_RXD (101 << 12) // 0x65
  388. #define HAL_IOMUX_PAD_UART_2_TXD (102 << 12) // 0x66
  389. #define HAL_IOMUX_PAD_COUNT 102
  390. // function with specified pad
  391. #define HAL_IOMUX_FUN_ADI_SCL_PAD_ADI_SCL 0x1001
  392. #define HAL_IOMUX_FUN_ADI_SDA_PAD_ADI_SDA 0x2002
  393. #define HAL_IOMUX_FUN_AP_JTAG_TCK_PAD_SW_CLK 0x5d003
  394. #define HAL_IOMUX_FUN_AP_JTAG_TDI_PAD_DEBUG_HOST_RX 0x9004
  395. #define HAL_IOMUX_FUN_AP_JTAG_TDO_PAD_DEBUG_HOST_TX 0xa005
  396. #define HAL_IOMUX_FUN_AP_JTAG_TMS_PAD_SW_DIO 0x5e006
  397. #define HAL_IOMUX_FUN_AP_JTAG_TRST_PAD_DEBUG_HOST_CLK 0x8007
  398. #define HAL_IOMUX_FUN_AUD_AD_D0_PAD_I2S_SDAT_I 0x3023008
  399. #define HAL_IOMUX_FUN_AUD_AD_SYNC_PAD_I2S1_LRCK 0x3020009
  400. #define HAL_IOMUX_FUN_AUD_DA_D0_PAD_I2S1_BCK 0x301f00a
  401. #define HAL_IOMUX_FUN_AUD_DA_D1_PAD_I2C_M2_SDA 0x301e00b
  402. #define HAL_IOMUX_FUN_AUD_DA_D1_PAD_SPI_CAMERA_SCK 0x305500b
  403. #define HAL_IOMUX_FUN_AUD_DA_SYNC_PAD_I2C_M2_SCL 0x301d00c
  404. #define HAL_IOMUX_FUN_AUD_SCLK_PAD_I2S1_SDAT_O 0x302200d
  405. #define HAL_IOMUX_FUN_CAMERA_PWDN_PAD_CAMERA_PWDN 0x300e
  406. #define HAL_IOMUX_FUN_CAMERA_PWDN_PAD_SDMMC1_CMD 0x204500e
  407. #define HAL_IOMUX_FUN_CAMERA_REF_CLK_PAD_CAMERA_REF_CLK 0x400f
  408. #define HAL_IOMUX_FUN_CAMERA_REF_CLK_PAD_SDMMC1_DATA_0 0x204600f
  409. #define HAL_IOMUX_FUN_CAMERA_RST_L_PAD_CAMERA_RST_L 0x5010
  410. #define HAL_IOMUX_FUN_CAMERA_RST_L_PAD_SDMMC1_CLK 0x2044010
  411. #define HAL_IOMUX_FUN_CHIP_PD_PAD_CHIP_PD 0x6011
  412. #define HAL_IOMUX_FUN_CLK26M_PMIC_PAD_CLK26M_PMIC 0x7012
  413. #define HAL_IOMUX_FUN_CTS_PAD_SPI_CAMERA_SI_0 0x6056013
  414. #define HAL_IOMUX_FUN_DBGIO_CLK_PAD_SDMMC1_CLK 0x8044014
  415. #define HAL_IOMUX_FUN_DBGIO_CMD_PAD_SDMMC1_CMD 0x8045015
  416. #define HAL_IOMUX_FUN_DBGIO_DATA0_PAD_SDMMC1_DATA_0 0x8046016
  417. #define HAL_IOMUX_FUN_DBGIO_DATA1_PAD_SDMMC1_DATA_1 0x8047017
  418. #define HAL_IOMUX_FUN_DBGIO_DATA2_PAD_SDMMC1_DATA_2 0x8048018
  419. #define HAL_IOMUX_FUN_DBGIO_DATA3_PAD_SDMMC1_DATA_3 0x8049019
  420. #define HAL_IOMUX_FUN_DBGIO_DATA4_PAD_SDMMC1_DATA_4 0x804a01a
  421. #define HAL_IOMUX_FUN_DBGIO_DATA5_PAD_SDMMC1_DATA_5 0x804b01b
  422. #define HAL_IOMUX_FUN_DBGIO_DATA6_PAD_SDMMC1_DATA_6 0x804c01c
  423. #define HAL_IOMUX_FUN_DBGIO_DATA7_PAD_SDMMC1_DATA_7 0x804d01d
  424. #define HAL_IOMUX_FUN_DBG_CLK_PAD_SPI_CAMERA_SI_0 0x805601e
  425. #define HAL_IOMUX_FUN_DBG_DO_3_PAD_SPI_LCD_SIO 0x805c01f
  426. #define HAL_IOMUX_FUN_DBG_DO_4_PAD_SPI_LCD_SDC 0x805a020
  427. #define HAL_IOMUX_FUN_DBG_DO_5_PAD_SPI_LCD_CLK 0x8058021
  428. #define HAL_IOMUX_FUN_DBG_DO_6_PAD_SPI_LCD_CS 0x8059022
  429. #define HAL_IOMUX_FUN_DBG_DO_7_PAD_SPI_LCD_SELECT 0x805b023
  430. #define HAL_IOMUX_FUN_DBG_DO_8_PAD_LCD_FMARK 0x8030024
  431. #define HAL_IOMUX_FUN_DBG_DO_9_PAD_I2C_M2_SCL 0x801d025
  432. #define HAL_IOMUX_FUN_DBG_DO_10_PAD_I2C_M2_SDA 0x801e026
  433. #define HAL_IOMUX_FUN_DBG_DO_11_PAD_CAMERA_RST_L 0x8005027
  434. #define HAL_IOMUX_FUN_DBG_DO_12_PAD_CAMERA_PWDN 0x8003028
  435. #define HAL_IOMUX_FUN_DBG_DO_13_PAD_I2S1_BCK 0x801f029
  436. #define HAL_IOMUX_FUN_DBG_DO_14_PAD_I2S1_LRCK 0x802002a
  437. #define HAL_IOMUX_FUN_DBG_DO_15_PAD_I2S_SDAT_I 0x802302b
  438. #define HAL_IOMUX_FUN_DBG_TRIG_PAD_CAMERA_REF_CLK 0x800402c
  439. #define HAL_IOMUX_FUN_DEBUG_BUS_0_PAD_GPIO_1 0x600c02d
  440. #define HAL_IOMUX_FUN_DEBUG_BUS_0_PAD_I2C_M2_SCL 0x601d02d
  441. #define HAL_IOMUX_FUN_DEBUG_BUS_1_PAD_GPIO_2 0x600d02e
  442. #define HAL_IOMUX_FUN_DEBUG_BUS_1_PAD_I2C_M2_SDA 0x601e02e
  443. #define HAL_IOMUX_FUN_DEBUG_BUS_2_PAD_CAMERA_RST_L 0x600502f
  444. #define HAL_IOMUX_FUN_DEBUG_BUS_2_PAD_GPIO_3 0x600e02f
  445. #define HAL_IOMUX_FUN_DEBUG_BUS_3_PAD_CAMERA_PWDN 0x6003030
  446. #define HAL_IOMUX_FUN_DEBUG_BUS_3_PAD_GPIO_4 0x600f030
  447. #define HAL_IOMUX_FUN_DEBUG_BUS_4_PAD_CAMERA_REF_CLK 0x6004031
  448. #define HAL_IOMUX_FUN_DEBUG_BUS_4_PAD_GPIO_5 0x6010031
  449. #define HAL_IOMUX_FUN_DEBUG_BUS_5_PAD_SPI_LCD_SIO 0x605c032
  450. #define HAL_IOMUX_FUN_DEBUG_BUS_6_PAD_SPI_CAMERA_SI_1 0x6057033
  451. #define HAL_IOMUX_FUN_DEBUG_BUS_6_PAD_SPI_LCD_SDC 0x605a033
  452. #define HAL_IOMUX_FUN_DEBUG_BUS_7_PAD_SPI_CAMERA_SCK 0x6055034
  453. #define HAL_IOMUX_FUN_DEBUG_BUS_7_PAD_SPI_LCD_CLK 0x6058034
  454. #define HAL_IOMUX_FUN_DEBUG_BUS_8_PAD_KEYIN_0 0x6024035
  455. #define HAL_IOMUX_FUN_DEBUG_BUS_8_PAD_SPI_LCD_CS 0x6059035
  456. #define HAL_IOMUX_FUN_DEBUG_BUS_9_PAD_KEYIN_1 0x6025036
  457. #define HAL_IOMUX_FUN_DEBUG_BUS_9_PAD_SPI_LCD_SELECT 0x605b036
  458. #define HAL_IOMUX_FUN_DEBUG_BUS_10_PAD_KEYIN_2 0x6026037
  459. #define HAL_IOMUX_FUN_DEBUG_BUS_10_PAD_LCD_FMARK 0x6030037
  460. #define HAL_IOMUX_FUN_DEBUG_BUS_11_PAD_KEYIN_3 0x6027038
  461. #define HAL_IOMUX_FUN_DEBUG_BUS_11_PAD_LCD_RSTB 0x6031038
  462. #define HAL_IOMUX_FUN_DEBUG_BUS_12_PAD_KEYIN_4 0x6028039
  463. #define HAL_IOMUX_FUN_DEBUG_BUS_13_PAD_KEYOUT_0 0x602a03a
  464. #define HAL_IOMUX_FUN_DEBUG_BUS_14_PAD_KEYOUT_1 0x602b03b
  465. #define HAL_IOMUX_FUN_DEBUG_BUS_15_PAD_KEYOUT_2 0x602c03c
  466. #define HAL_IOMUX_FUN_DEBUG_CLK_PAD_GPIO_0 0x600b03d
  467. #define HAL_IOMUX_FUN_DEBUG_CLK_PAD_KEYOUT_3 0x602d03d
  468. #define HAL_IOMUX_FUN_DEBUG_HOST_CLK_PAD_DEBUG_HOST_CLK 0x200803e
  469. #define HAL_IOMUX_FUN_DEBUG_HOST_RX_PAD_DEBUG_HOST_RX 0x200903f
  470. #define HAL_IOMUX_FUN_DEBUG_HOST_TX_PAD_DEBUG_HOST_TX 0x200a040
  471. #define HAL_IOMUX_FUN_DIGRF_STROBE_S_O_PAD_GPIO_18 0x6015041
  472. #define HAL_IOMUX_FUN_GPADC_IN1_PAD_SPI_LCD_SDC 0x705a042
  473. #define HAL_IOMUX_FUN_GPADC_IN2_PAD_LCD_FMARK 0x7030043
  474. #define HAL_IOMUX_FUN_GPADC_IN3_PAD_CAMERA_PWDN 0x7003044
  475. #define HAL_IOMUX_FUN_GPIO_0_PAD_GPIO_0 0xb045
  476. #define HAL_IOMUX_FUN_GPIO_1_PAD_GPIO_1 0xc046
  477. #define HAL_IOMUX_FUN_GPIO_2_PAD_GPIO_2 0xd047
  478. #define HAL_IOMUX_FUN_GPIO_3_PAD_GPIO_3 0xe048
  479. #define HAL_IOMUX_FUN_GPIO_4_PAD_GPIO_4 0xf049
  480. #define HAL_IOMUX_FUN_GPIO_5_PAD_GPIO_5 0x1004a
  481. #define HAL_IOMUX_FUN_GPIO_6_PAD_GPIO_6 0x1104b
  482. #define HAL_IOMUX_FUN_GPIO_7_PAD_GPIO_7 0x1204c
  483. #define HAL_IOMUX_FUN_GPIO_8_PAD_KEYIN_4 0x102804d
  484. #define HAL_IOMUX_FUN_GPIO_9_PAD_KEYIN_5 0x102904e
  485. #define HAL_IOMUX_FUN_GPIO_10_PAD_KEYOUT_4 0x102e04f
  486. #define HAL_IOMUX_FUN_GPIO_11_PAD_KEYOUT_5 0x102f050
  487. #define HAL_IOMUX_FUN_GPIO_12_PAD_UART_1_RXD 0x1061051
  488. #define HAL_IOMUX_FUN_GPIO_13_PAD_UART_1_TXD 0x1062052
  489. #define HAL_IOMUX_FUN_GPIO_14_PAD_UART_1_CTS 0x105f053
  490. #define HAL_IOMUX_FUN_GPIO_15_PAD_UART_1_RTS 0x4060054
  491. #define HAL_IOMUX_FUN_GPIO_16_PAD_GPIO_16 0x13055
  492. #define HAL_IOMUX_FUN_GPIO_16_PAD_SDMMC1_CLK 0x1044055
  493. #define HAL_IOMUX_FUN_GPIO_17_PAD_GPIO_17 0x14056
  494. #define HAL_IOMUX_FUN_GPIO_17_PAD_SDMMC1_CMD 0x1045056
  495. #define HAL_IOMUX_FUN_GPIO_18_PAD_GPIO_18 0x15057
  496. #define HAL_IOMUX_FUN_GPIO_18_PAD_SDMMC1_DATA_0 0x1046057
  497. #define HAL_IOMUX_FUN_GPIO_18_PAD_SPI_CAMERA_SCK 0x2055057
  498. #define HAL_IOMUX_FUN_GPIO_19_PAD_GPIO_19 0x16058
  499. #define HAL_IOMUX_FUN_GPIO_19_PAD_I2S1_BCK 0x201f058
  500. #define HAL_IOMUX_FUN_GPIO_19_PAD_SDMMC1_DATA_1 0x1047058
  501. #define HAL_IOMUX_FUN_GPIO_20_PAD_GPIO_20 0x17059
  502. #define HAL_IOMUX_FUN_GPIO_20_PAD_I2S1_LRCK 0x2020059
  503. #define HAL_IOMUX_FUN_GPIO_20_PAD_SDMMC1_DATA_2 0x1048059
  504. #define HAL_IOMUX_FUN_GPIO_21_PAD_GPIO_21 0x1805a
  505. #define HAL_IOMUX_FUN_GPIO_21_PAD_I2S_SDAT_I 0x202305a
  506. #define HAL_IOMUX_FUN_GPIO_21_PAD_SDMMC1_DATA_3 0x104905a
  507. #define HAL_IOMUX_FUN_GPIO_22_PAD_GPIO_22 0x1905b
  508. #define HAL_IOMUX_FUN_GPIO_22_PAD_I2S1_SDAT_O 0x202205b
  509. #define HAL_IOMUX_FUN_GPIO_23_PAD_GPIO_23 0x1a05c
  510. #define HAL_IOMUX_FUN_GPIO_24_PAD_SDMMC1_DATA_4 0x104a05d
  511. #define HAL_IOMUX_FUN_GPIO_24_PAD_SW_CLK 0x105d05d
  512. #define HAL_IOMUX_FUN_GPIO_25_PAD_SDMMC1_DATA_5 0x104b05e
  513. #define HAL_IOMUX_FUN_GPIO_25_PAD_SW_DIO 0x105e05e
  514. #define HAL_IOMUX_FUN_GPIO_26_PAD_DEBUG_HOST_RX 0x100905f
  515. #define HAL_IOMUX_FUN_GPIO_26_PAD_SDMMC1_DATA_6 0x104c05f
  516. #define HAL_IOMUX_FUN_GPIO_27_PAD_DEBUG_HOST_TX 0x100a060
  517. #define HAL_IOMUX_FUN_GPIO_27_PAD_SDMMC1_DATA_7 0x104d060
  518. #define HAL_IOMUX_FUN_GPIO_28_PAD_DEBUG_HOST_CLK 0x1008061
  519. #define HAL_IOMUX_FUN_GPIO_28_PAD_KEYIN_0 0x1024061
  520. #define HAL_IOMUX_FUN_GPIO_29_PAD_I2C_M1_SCL 0x101b062
  521. #define HAL_IOMUX_FUN_GPIO_29_PAD_KEYIN_1 0x1025062
  522. #define HAL_IOMUX_FUN_GPIO_30_PAD_I2C_M1_SDA 0x101c063
  523. #define HAL_IOMUX_FUN_GPIO_30_PAD_KEYIN_2 0x1026063
  524. #define HAL_IOMUX_FUN_GPIO_30_PAD_SIM_1_CLK 0x1052063
  525. #define HAL_IOMUX_FUN_GPIO_31_PAD_KEYIN_3 0x1027064
  526. #define HAL_IOMUX_FUN_GPIO_31_PAD_SIM_1_DIO 0x1053064
  527. #define HAL_IOMUX_FUN_GPIO_31_PAD_UART_2_RXD 0x3065064
  528. #define HAL_IOMUX_FUN_GPIO_32_PAD_KEYOUT_0 0x102a065
  529. #define HAL_IOMUX_FUN_GPIO_32_PAD_SIM_1_RST 0x1054065
  530. #define HAL_IOMUX_FUN_GPIO_32_PAD_UART_2_TXD 0x3066065
  531. #define HAL_IOMUX_FUN_GPIO_33_PAD_KEYOUT_1 0x102b066
  532. #define HAL_IOMUX_FUN_GPIO_33_PAD_UART_2_CTS 0x1063066
  533. #define HAL_IOMUX_FUN_GPIO_34_PAD_KEYOUT_2 0x102c067
  534. #define HAL_IOMUX_FUN_GPIO_34_PAD_UART_2_RTS 0x1064067
  535. #define HAL_IOMUX_FUN_GPIO_35_PAD_KEYOUT_3 0x102d068
  536. #define HAL_IOMUX_FUN_GPIO_35_PAD_SPI_LCD_SIO 0x205c068
  537. #define HAL_IOMUX_FUN_GPIO_36_PAD_SDMMC1_RST 0x104e069
  538. #define HAL_IOMUX_FUN_GPIO_36_PAD_SPI_LCD_SDC 0x205a069
  539. #define HAL_IOMUX_FUN_GPIO_37_PAD_SPI_LCD_CLK 0x205806a
  540. #define HAL_IOMUX_FUN_GPIO_38_PAD_SPI_LCD_CS 0x205906b
  541. #define HAL_IOMUX_FUN_GPIO_39_PAD_SPI_LCD_SELECT 0x205b06c
  542. #define HAL_IOMUX_FUN_GPIO_40_PAD_LCD_FMARK 0x203006d
  543. #define HAL_IOMUX_FUN_GPIO_41_PAD_LCD_RSTB 0x203106e
  544. #define HAL_IOMUX_FUN_GPIO_42_PAD_I2C_M2_SCL 0x201d06f
  545. #define HAL_IOMUX_FUN_GPIO_43_PAD_I2C_M2_SDA 0x201e070
  546. #define HAL_IOMUX_FUN_GPIO_44_PAD_CAMERA_RST_L 0x3005071
  547. #define HAL_IOMUX_FUN_GPIO_45_PAD_CAMERA_PWDN 0x3003072
  548. #define HAL_IOMUX_FUN_GPIO_46_PAD_CAMERA_REF_CLK 0x2004073
  549. #define HAL_IOMUX_FUN_GPIO_46_PAD_I2S1_MCLK 0x1021073
  550. #define HAL_IOMUX_FUN_GPIO_47_PAD_SPI_CAMERA_SI_0 0x3056074
  551. #define HAL_IOMUX_FUN_I2C_M1_SCL_PAD_I2C_M1_SCL 0x1b075
  552. #define HAL_IOMUX_FUN_I2C_M1_SCL_PAD_KEYOUT_2 0x302c075
  553. #define HAL_IOMUX_FUN_I2C_M1_SCL_PAD_SDMMC1_CMD 0x3045075
  554. #define HAL_IOMUX_FUN_I2C_M1_SCL_PAD_SDMMC1_DATA_4 0x204a075
  555. #define HAL_IOMUX_FUN_I2C_M1_SCL_PAD_UART_2_RXD 0x1065075
  556. #define HAL_IOMUX_FUN_I2C_M1_SDA_PAD_I2C_M1_SDA 0x1c076
  557. #define HAL_IOMUX_FUN_I2C_M1_SDA_PAD_KEYOUT_3 0x302d076
  558. #define HAL_IOMUX_FUN_I2C_M1_SDA_PAD_SDMMC1_DATA_0 0x3046076
  559. #define HAL_IOMUX_FUN_I2C_M1_SDA_PAD_SDMMC1_DATA_5 0x204b076
  560. #define HAL_IOMUX_FUN_I2C_M1_SDA_PAD_UART_2_TXD 0x1066076
  561. #define HAL_IOMUX_FUN_I2C_M2_SCL_PAD_GPIO_6 0x2011077
  562. #define HAL_IOMUX_FUN_I2C_M2_SCL_PAD_I2C_M2_SCL 0x1d077
  563. #define HAL_IOMUX_FUN_I2C_M2_SCL_PAD_KEYIN_4 0x4028077
  564. #define HAL_IOMUX_FUN_I2C_M2_SCL_PAD_SDMMC1_DATA_6 0x304c077
  565. #define HAL_IOMUX_FUN_I2C_M2_SCL_PAD_SPI_CAMERA_SI_0 0x1056077
  566. #define HAL_IOMUX_FUN_I2C_M2_SDA_PAD_GPIO_7 0x2012078
  567. #define HAL_IOMUX_FUN_I2C_M2_SDA_PAD_I2C_M2_SDA 0x1e078
  568. #define HAL_IOMUX_FUN_I2C_M2_SDA_PAD_KEYIN_5 0x4029078
  569. #define HAL_IOMUX_FUN_I2C_M2_SDA_PAD_SDMMC1_DATA_7 0x304d078
  570. #define HAL_IOMUX_FUN_I2C_M2_SDA_PAD_SPI_CAMERA_SI_1 0x1057078
  571. #define HAL_IOMUX_FUN_I2C_M3_SCL_PAD_CAMERA_RST_L 0x2005079
  572. #define HAL_IOMUX_FUN_I2C_M3_SCL_PAD_GPIO_16 0x3013079
  573. #define HAL_IOMUX_FUN_I2C_M3_SCL_PAD_I2S1_BCK 0x101f079
  574. #define HAL_IOMUX_FUN_I2C_M3_SCL_PAD_I2S_SDAT_I 0x4023079
  575. #define HAL_IOMUX_FUN_I2C_M3_SCL_PAD_UART_2_CTS 0x3063079
  576. #define HAL_IOMUX_FUN_I2C_M3_SDA_PAD_CAMERA_PWDN 0x200307a
  577. #define HAL_IOMUX_FUN_I2C_M3_SDA_PAD_GPIO_17 0x301407a
  578. #define HAL_IOMUX_FUN_I2C_M3_SDA_PAD_I2S1_LRCK 0x102007a
  579. #define HAL_IOMUX_FUN_I2C_M3_SDA_PAD_I2S1_SDAT_O 0x402207a
  580. #define HAL_IOMUX_FUN_I2C_M3_SDA_PAD_UART_2_RTS 0x306407a
  581. #define HAL_IOMUX_FUN_I2S1_BCK_PAD_GPIO_19 0x701607b
  582. #define HAL_IOMUX_FUN_I2S1_BCK_PAD_I2S1_BCK 0x1f07b
  583. #define HAL_IOMUX_FUN_I2S1_LRCK_PAD_GPIO_20 0x701707c
  584. #define HAL_IOMUX_FUN_I2S1_LRCK_PAD_I2S1_LRCK 0x2007c
  585. #define HAL_IOMUX_FUN_I2S1_MCLK_PAD_GPIO_18 0x701507d
  586. #define HAL_IOMUX_FUN_I2S1_MCLK_PAD_I2S1_MCLK 0x2107d
  587. #define HAL_IOMUX_FUN_I2S1_SDAT_I_PAD_GPIO_16 0x701307e
  588. #define HAL_IOMUX_FUN_I2S1_SDAT_I_PAD_I2S_SDAT_I 0x2307e
  589. #define HAL_IOMUX_FUN_I2S1_SDAT_O_PAD_GPIO_17 0x701407f
  590. #define HAL_IOMUX_FUN_I2S1_SDAT_O_PAD_I2S1_SDAT_O 0x2207f
  591. #define HAL_IOMUX_FUN_KEYIN_0_PAD_KEYIN_0 0x24080
  592. #define HAL_IOMUX_FUN_KEYIN_1_PAD_KEYIN_1 0x25081
  593. #define HAL_IOMUX_FUN_KEYIN_2_PAD_KEYIN_2 0x26082
  594. #define HAL_IOMUX_FUN_KEYIN_3_PAD_KEYIN_3 0x27083
  595. #define HAL_IOMUX_FUN_KEYIN_4_PAD_KEYIN_4 0x28084
  596. #define HAL_IOMUX_FUN_KEYIN_5_PAD_KEYIN_5 0x29085
  597. #define HAL_IOMUX_FUN_KEYOUT_0_PAD_KEYOUT_0 0x2a086
  598. #define HAL_IOMUX_FUN_KEYOUT_1_PAD_KEYOUT_1 0x2b087
  599. #define HAL_IOMUX_FUN_KEYOUT_2_PAD_KEYOUT_2 0x2c088
  600. #define HAL_IOMUX_FUN_KEYOUT_3_PAD_KEYOUT_3 0x2d089
  601. #define HAL_IOMUX_FUN_KEYOUT_4_PAD_KEYOUT_4 0x2e08a
  602. #define HAL_IOMUX_FUN_KEYOUT_5_PAD_KEYOUT_5 0x2f08b
  603. #define HAL_IOMUX_FUN_LCD_FMARK_PAD_LCD_FMARK 0x3008c
  604. #define HAL_IOMUX_FUN_LCD_RSTB_PAD_LCD_RSTB 0x3108d
  605. #define HAL_IOMUX_FUN_LNA_EN_PAD_GPIO_16 0x501308e
  606. #define HAL_IOMUX_FUN_LNA_EN_PAD_SDMMC1_DATA_4 0x704a08e
  607. #define HAL_IOMUX_FUN_LTE_GPO_0_PAD_RFDIG_GPIO_0 0x303c08f
  608. #define HAL_IOMUX_FUN_LTE_GPO_1_PAD_RFDIG_GPIO_1 0x303d090
  609. #define HAL_IOMUX_FUN_LTE_GPO_2_PAD_RFDIG_GPIO_2 0x303e091
  610. #define HAL_IOMUX_FUN_LTE_GPO_3_PAD_RFDIG_GPIO_3 0x303f092
  611. #define HAL_IOMUX_FUN_LTE_GPO_4_PAD_RFDIG_GPIO_4 0x3040093
  612. #define HAL_IOMUX_FUN_LTE_GPO_5_PAD_RFDIG_GPIO_5 0x3041094
  613. #define HAL_IOMUX_FUN_LTE_GPO_7_PAD_RFDIG_GPIO_6 0x3042095
  614. #define HAL_IOMUX_FUN_LTE_GPO_8_PAD_RFDIG_GPIO_7 0x3043096
  615. #define HAL_IOMUX_FUN_M_SPI_CLK_PAD_M_SPI_CLK 0x32097
  616. #define HAL_IOMUX_FUN_M_SPI_CS_PAD_M_SPI_CS 0x33098
  617. #define HAL_IOMUX_FUN_M_SPI_D_0_PAD_M_SPI_D_0 0x34099
  618. #define HAL_IOMUX_FUN_M_SPI_D_1_PAD_M_SPI_D_1 0x3509a
  619. #define HAL_IOMUX_FUN_M_SPI_D_2_PAD_M_SPI_D_2 0x3609b
  620. #define HAL_IOMUX_FUN_M_SPI_D_3_PAD_M_SPI_D_3 0x3709c
  621. #define HAL_IOMUX_FUN_NAND_SEL_PAD_NAND_SEL 0x3809d
  622. #define HAL_IOMUX_FUN_OSC_32K_PAD_OSC_32K 0x3909e
  623. #define HAL_IOMUX_FUN_OSC_ADC_CLK_PAD_DEBUG_HOST_TX 0x600a09f
  624. #define HAL_IOMUX_FUN_OSC_ADC_CLK_PAD_GPIO_21 0x501809f
  625. #define HAL_IOMUX_FUN_OSC_ADC_DATA_PAD_DEBUG_HOST_CLK 0x60080a0
  626. #define HAL_IOMUX_FUN_OSC_ADC_DATA_PAD_GPIO_22 0x50190a0
  627. #define HAL_IOMUX_FUN_PMIC_EXT_INT_PAD_PMIC_EXT_INT 0x3a0a1
  628. #define HAL_IOMUX_FUN_PPS_OUT_PAD_GPIO_17 0x50140a2
  629. #define HAL_IOMUX_FUN_PPS_OUT_PAD_SDMMC1_DATA_5 0x704b0a2
  630. #define HAL_IOMUX_FUN_PWM_0_PAD_GPIO_5 0x10100a3
  631. #define HAL_IOMUX_FUN_PWM_0_PAD_KEYIN_4 0x20280a3
  632. #define HAL_IOMUX_FUN_PWM_1_PAD_GPIO_6 0x10110a4
  633. #define HAL_IOMUX_FUN_PWM_1_PAD_KEYIN_5 0x20290a4
  634. #define HAL_IOMUX_FUN_PWM_2_PAD_GPIO_7 0x10120a5
  635. #define HAL_IOMUX_FUN_PWM_2_PAD_KEYOUT_4 0x202e0a5
  636. #define HAL_IOMUX_FUN_PWM_3_PAD_KEYOUT_5 0x202f0a6
  637. #define HAL_IOMUX_FUN_PWM_3_PAD_UART_1_RTS 0x10600a6
  638. #define HAL_IOMUX_FUN_PWM_4_PAD_I2C_M2_SCL 0x101d0a7
  639. #define HAL_IOMUX_FUN_PWM_4_PAD_KEYIN_4 0x30280a7
  640. #define HAL_IOMUX_FUN_PWM_4_PAD_SIM_1_CLK 0x20520a7
  641. #define HAL_IOMUX_FUN_PWM_5_PAD_I2C_M2_SDA 0x101e0a8
  642. #define HAL_IOMUX_FUN_PWM_5_PAD_KEYIN_5 0x30290a8
  643. #define HAL_IOMUX_FUN_PWM_5_PAD_SIM_1_DIO 0x20530a8
  644. #define HAL_IOMUX_FUN_PWM_6_PAD_CAMERA_RST_L 0x10050a9
  645. #define HAL_IOMUX_FUN_PWM_6_PAD_KEYOUT_0 0x302a0a9
  646. #define HAL_IOMUX_FUN_PWM_6_PAD_SIM_1_RST 0x20540a9
  647. #define HAL_IOMUX_FUN_PWM_7_PAD_CAMERA_PWDN 0x10030aa
  648. #define HAL_IOMUX_FUN_PWM_7_PAD_GPIO_16 0x20130aa
  649. #define HAL_IOMUX_FUN_PWM_7_PAD_KEYOUT_1 0x302b0aa
  650. #define HAL_IOMUX_FUN_PWM_8_PAD_CAMERA_REF_CLK 0x10040ab
  651. #define HAL_IOMUX_FUN_PWM_8_PAD_GPIO_0 0x500b0ab
  652. #define HAL_IOMUX_FUN_PWM_8_PAD_GPIO_17 0x20140ab
  653. #define HAL_IOMUX_FUN_PWM_9_PAD_GPIO_1 0x500c0ac
  654. #define HAL_IOMUX_FUN_PWM_9_PAD_GPIO_23 0x201a0ac
  655. #define HAL_IOMUX_FUN_PWM_9_PAD_SPI_CAMERA_SCK 0x10550ac
  656. #define HAL_IOMUX_FUN_PWM_10_PAD_GPIO_2 0x500d0ad
  657. #define HAL_IOMUX_FUN_PWM_10_PAD_I2S_SDAT_I 0x10230ad
  658. #define HAL_IOMUX_FUN_PWM_10_PAD_UART_1_CTS 0x205f0ad
  659. #define HAL_IOMUX_FUN_PWM_11_PAD_GPIO_3 0x500e0ae
  660. #define HAL_IOMUX_FUN_PWM_11_PAD_I2S1_SDAT_O 0x10220ae
  661. #define HAL_IOMUX_FUN_PWM_11_PAD_UART_1_RTS 0x20600ae
  662. #define HAL_IOMUX_FUN_PWM_12_PAD_GPIO_4 0x500f0af
  663. #define HAL_IOMUX_FUN_PWM_12_PAD_SDMMC1_DATA_6 0x204c0af
  664. #define HAL_IOMUX_FUN_PWM_12_PAD_UART_2_RXD 0x20650af
  665. #define HAL_IOMUX_FUN_PWM_13_PAD_GPIO_18 0x40150b0
  666. #define HAL_IOMUX_FUN_PWM_13_PAD_SDMMC1_DATA_7 0x204d0b0
  667. #define HAL_IOMUX_FUN_PWM_13_PAD_UART_2_TXD 0x20660b0
  668. #define HAL_IOMUX_FUN_PWM_14_PAD_GPIO_19 0x40160b1
  669. #define HAL_IOMUX_FUN_PWM_14_PAD_KEYIN_0 0x20240b1
  670. #define HAL_IOMUX_FUN_PWM_14_PAD_SDMMC1_CLK 0x30440b1
  671. #define HAL_IOMUX_FUN_PWM_15_PAD_GPIO_20 0x40170b2
  672. #define HAL_IOMUX_FUN_PWM_15_PAD_KEYIN_1 0x20250b2
  673. #define HAL_IOMUX_FUN_PWM_15_PAD_SDMMC1_DATA_3 0x30490b2
  674. #define HAL_IOMUX_FUN_RESETB_PAD_RESETB 0x3b0b3
  675. #define HAL_IOMUX_FUN_RFFE_SCK_PAD_RFDIG_GPIO_0 0x3c0b4
  676. #define HAL_IOMUX_FUN_RFFE_SDA_PAD_RFDIG_GPIO_1 0x3d0b5
  677. #define HAL_IOMUX_FUN_RF_GPIO0_PAD_RFDIG_GPIO_0 0x103c0b6
  678. #define HAL_IOMUX_FUN_RF_GPIO1_PAD_RFDIG_GPIO_1 0x103d0b7
  679. #define HAL_IOMUX_FUN_RF_GPIO2_PAD_RFDIG_GPIO_2 0x3e0b8
  680. #define HAL_IOMUX_FUN_RF_GPIO3_PAD_RFDIG_GPIO_3 0x3f0b9
  681. #define HAL_IOMUX_FUN_RF_GPIO4_PAD_RFDIG_GPIO_4 0x400ba
  682. #define HAL_IOMUX_FUN_RF_GPIO5_PAD_RFDIG_GPIO_5 0x410bb
  683. #define HAL_IOMUX_FUN_RF_GPIO6_PAD_RFDIG_GPIO_6 0x420bc
  684. #define HAL_IOMUX_FUN_RF_GPIO7_PAD_RFDIG_GPIO_7 0x430bd
  685. #define HAL_IOMUX_FUN_RF_GPIO8_PAD_GPIO_23 0x401a0be
  686. #define HAL_IOMUX_FUN_RF_GPIO8_PAD_I2C_M1_SDA 0x401c0be
  687. #define HAL_IOMUX_FUN_RF_GPIO9_PAD_GPIO_22 0x40190bf
  688. #define HAL_IOMUX_FUN_RF_GPIO9_PAD_I2C_M1_SCL 0x401b0bf
  689. #define HAL_IOMUX_FUN_SDMMC1_CLK_PAD_SDMMC1_CLK 0x440c0
  690. #define HAL_IOMUX_FUN_SDMMC1_CMD_PAD_SDMMC1_CMD 0x450c1
  691. #define HAL_IOMUX_FUN_SDMMC1_DATA_0_PAD_SDMMC1_DATA_0 0x460c2
  692. #define HAL_IOMUX_FUN_SDMMC1_DATA_1_PAD_SDMMC1_DATA_1 0x470c3
  693. #define HAL_IOMUX_FUN_SDMMC1_DATA_2_PAD_SDMMC1_DATA_2 0x480c4
  694. #define HAL_IOMUX_FUN_SDMMC1_DATA_3_PAD_SDMMC1_DATA_3 0x490c5
  695. #define HAL_IOMUX_FUN_SDMMC1_DATA_4_PAD_SDMMC1_DATA_4 0x4a0c6
  696. #define HAL_IOMUX_FUN_SDMMC1_DATA_5_PAD_SDMMC1_DATA_5 0x4b0c7
  697. #define HAL_IOMUX_FUN_SDMMC1_DATA_6_PAD_SDMMC1_DATA_6 0x4c0c8
  698. #define HAL_IOMUX_FUN_SDMMC1_DATA_7_PAD_SDMMC1_DATA_7 0x4d0c9
  699. #define HAL_IOMUX_FUN_SDMMC1_RST_PAD_SDMMC1_RST 0x4e0ca
  700. #define HAL_IOMUX_FUN_SDMMC2_CLK_PAD_GPIO_18 0x30150cb
  701. #define HAL_IOMUX_FUN_SDMMC2_CLK_PAD_SW_CLK 0x405d0cb
  702. #define HAL_IOMUX_FUN_SDMMC2_CMD_PAD_GPIO_19 0x30160cc
  703. #define HAL_IOMUX_FUN_SDMMC2_CMD_PAD_SW_DIO 0x405e0cc
  704. #define HAL_IOMUX_FUN_SDMMC2_DATA_0_PAD_DEBUG_HOST_RX 0x40090cd
  705. #define HAL_IOMUX_FUN_SDMMC2_DATA_0_PAD_GPIO_20 0x30170cd
  706. #define HAL_IOMUX_FUN_SDMMC2_DATA_1_PAD_DEBUG_HOST_TX 0x400a0ce
  707. #define HAL_IOMUX_FUN_SDMMC2_DATA_1_PAD_GPIO_21 0x30180ce
  708. #define HAL_IOMUX_FUN_SDMMC2_DATA_2_PAD_DEBUG_HOST_CLK 0x40080cf
  709. #define HAL_IOMUX_FUN_SDMMC2_DATA_2_PAD_GPIO_22 0x30190cf
  710. #define HAL_IOMUX_FUN_SDMMC2_DATA_3_PAD_GPIO_16 0x40130d0
  711. #define HAL_IOMUX_FUN_SDMMC2_DATA_3_PAD_GPIO_23 0x301a0d0
  712. #define HAL_IOMUX_FUN_SDMMC2_DATA_3_PAD_I2S1_MCLK 0x70210d0
  713. #define HAL_IOMUX_FUN_SIM_0_CLK_PAD_SIM_0_CLK 0x4f0d1
  714. #define HAL_IOMUX_FUN_SIM_0_DIO_PAD_SIM_0_DIO 0x500d2
  715. #define HAL_IOMUX_FUN_SIM_0_RST_PAD_SIM_0_RST 0x510d3
  716. #define HAL_IOMUX_FUN_SIM_1_CLK_PAD_SIM_1_CLK 0x520d4
  717. #define HAL_IOMUX_FUN_SIM_1_DIO_PAD_SIM_1_DIO 0x530d5
  718. #define HAL_IOMUX_FUN_SIM_1_RST_PAD_SIM_1_RST 0x540d6
  719. #define HAL_IOMUX_FUN_SPI_1_CLK_PAD_SDMMC1_DATA_3 0x40490d7
  720. #define HAL_IOMUX_FUN_SPI_1_CLK_PAD_SW_CLK 0x305d0d7
  721. #define HAL_IOMUX_FUN_SPI_1_CS_0_PAD_SDMMC1_DATA_4 0x404a0d8
  722. #define HAL_IOMUX_FUN_SPI_1_CS_0_PAD_SW_DIO 0x305e0d8
  723. #define HAL_IOMUX_FUN_SPI_1_CS_1_PAD_DEBUG_HOST_CLK 0x30080d9
  724. #define HAL_IOMUX_FUN_SPI_1_CS_1_PAD_SDMMC1_DATA_7 0x404d0d9
  725. #define HAL_IOMUX_FUN_SPI_1_DIO_0_PAD_DEBUG_HOST_RX 0x30090da
  726. #define HAL_IOMUX_FUN_SPI_1_DIO_0_PAD_SDMMC1_DATA_5 0x404b0da
  727. #define HAL_IOMUX_FUN_SPI_1_DI_1_PAD_DEBUG_HOST_TX 0x300a0db
  728. #define HAL_IOMUX_FUN_SPI_1_DI_1_PAD_SDMMC1_DATA_6 0x404c0db
  729. #define HAL_IOMUX_FUN_SPI_2_CLK_PAD_GPIO_0 0x100b0dc
  730. #define HAL_IOMUX_FUN_SPI_2_CLK_PAD_GPIO_18 0x20150dc
  731. #define HAL_IOMUX_FUN_SPI_2_CLK_PAD_SDMMC1_CLK 0x40440dc
  732. #define HAL_IOMUX_FUN_SPI_2_CS_0_PAD_GPIO_1 0x100c0dd
  733. #define HAL_IOMUX_FUN_SPI_2_CS_0_PAD_GPIO_19 0x20160dd
  734. #define HAL_IOMUX_FUN_SPI_2_CS_0_PAD_SDMMC1_CMD 0x40450dd
  735. #define HAL_IOMUX_FUN_SPI_2_CS_1_PAD_GPIO_4 0x100f0de
  736. #define HAL_IOMUX_FUN_SPI_2_CS_1_PAD_GPIO_22 0x20190de
  737. #define HAL_IOMUX_FUN_SPI_2_CS_1_PAD_SDMMC1_DATA_2 0x40480de
  738. #define HAL_IOMUX_FUN_SPI_2_DIO_0_PAD_GPIO_2 0x100d0df
  739. #define HAL_IOMUX_FUN_SPI_2_DIO_0_PAD_GPIO_20 0x20170df
  740. #define HAL_IOMUX_FUN_SPI_2_DIO_0_PAD_SDMMC1_DATA_0 0x40460df
  741. #define HAL_IOMUX_FUN_SPI_2_DI_1_PAD_GPIO_3 0x100e0e0
  742. #define HAL_IOMUX_FUN_SPI_2_DI_1_PAD_GPIO_21 0x20180e0
  743. #define HAL_IOMUX_FUN_SPI_2_DI_1_PAD_SDMMC1_DATA_1 0x40470e0
  744. #define HAL_IOMUX_FUN_SPI_CAMERA_SCK_PAD_SDMMC1_DATA_3 0x20490e1
  745. #define HAL_IOMUX_FUN_SPI_CAMERA_SCK_PAD_SPI_CAMERA_SCK 0x550e1
  746. #define HAL_IOMUX_FUN_SPI_CAMERA_SI_0_PAD_SDMMC1_DATA_1 0x20470e2
  747. #define HAL_IOMUX_FUN_SPI_CAMERA_SI_0_PAD_SDMMC1_DATA_2 0x30480e2
  748. #define HAL_IOMUX_FUN_SPI_CAMERA_SI_0_PAD_SPI_CAMERA_SI_0 0x560e2
  749. #define HAL_IOMUX_FUN_SPI_CAMERA_SI_0_PAD_SPI_CAMERA_SI_1 0x20570e2
  750. #define HAL_IOMUX_FUN_SPI_CAMERA_SI_1_PAD_SDMMC1_DATA_1 0x30470e3
  751. #define HAL_IOMUX_FUN_SPI_CAMERA_SI_1_PAD_SDMMC1_DATA_2 0x20480e3
  752. #define HAL_IOMUX_FUN_SPI_CAMERA_SI_1_PAD_SPI_CAMERA_SI_0 0x20560e3
  753. #define HAL_IOMUX_FUN_SPI_CAMERA_SI_1_PAD_SPI_CAMERA_SI_1 0x570e3
  754. #define HAL_IOMUX_FUN_SPI_CAMERA_SSN_PAD_SPI_CAMERA_SI_1 0x30570e4
  755. #define HAL_IOMUX_FUN_SPI_FLASH1_CLK_PAD_GPIO_18 0x10150e5
  756. #define HAL_IOMUX_FUN_SPI_FLASH1_CLK_PAD_SDMMC1_DATA_2 0x60480e5
  757. #define HAL_IOMUX_FUN_SPI_FLASH1_CLK_PAD_SPI_LCD_SIO 0x105c0e5
  758. #define HAL_IOMUX_FUN_SPI_FLASH1_CS_PAD_GPIO_19 0x10160e6
  759. #define HAL_IOMUX_FUN_SPI_FLASH1_CS_PAD_SDMMC1_DATA_3 0x60490e6
  760. #define HAL_IOMUX_FUN_SPI_FLASH1_CS_PAD_SPI_LCD_SDC 0x105a0e6
  761. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_0_PAD_GPIO_20 0x10170e7
  762. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_0_PAD_SDMMC1_DATA_4 0x604a0e7
  763. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_0_PAD_SPI_LCD_CLK 0x10580e7
  764. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_1_PAD_GPIO_21 0x10180e8
  765. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_1_PAD_SDMMC1_DATA_5 0x604b0e8
  766. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_1_PAD_SPI_LCD_CS 0x10590e8
  767. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_2_PAD_GPIO_22 0x10190e9
  768. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_2_PAD_SDMMC1_DATA_6 0x604c0e9
  769. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_2_PAD_SPI_LCD_SELECT 0x105b0e9
  770. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_3_PAD_GPIO_23 0x101a0ea
  771. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_3_PAD_LCD_FMARK 0x10300ea
  772. #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_3_PAD_SDMMC1_DATA_7 0x604d0ea
  773. #define HAL_IOMUX_FUN_SPI_LCD_CLK_PAD_SPI_LCD_CLK 0x580eb
  774. #define HAL_IOMUX_FUN_SPI_LCD_CS_PAD_SPI_LCD_CS 0x590ec
  775. #define HAL_IOMUX_FUN_SPI_LCD_SDC_PAD_SPI_LCD_SDC 0x5a0ed
  776. #define HAL_IOMUX_FUN_SPI_LCD_SELECT_PAD_SPI_LCD_SELECT 0x5b0ee
  777. #define HAL_IOMUX_FUN_SPI_LCD_SIO_PAD_SPI_LCD_SIO 0x5c0ef
  778. #define HAL_IOMUX_FUN_TEST_CLKOUT_PAD_GPIO_5 0x50100f0
  779. #define HAL_IOMUX_FUN_TIMESTAMP_IN_PAD_SDMMC1_DATA_4 0x304a0f1
  780. #define HAL_IOMUX_FUN_TIMESTAMP_IN_PAD_SDMMC1_DATA_6 0x704c0f1
  781. #define HAL_IOMUX_FUN_TIMESTAMP_OUT_PAD_SDMMC1_DATA_5 0x304b0f2
  782. #define HAL_IOMUX_FUN_TIMESTAMP_OUT_PAD_SDMMC1_DATA_7 0x704d0f2
  783. #define HAL_IOMUX_FUN_TSX_ADC_CH_DATA_PAD_DEBUG_HOST_RX 0x60090f3
  784. #define HAL_IOMUX_FUN_TSX_ADC_CH_DATA_PAD_GPIO_20 0x50170f3
  785. #define HAL_IOMUX_FUN_TSX_ADC_CH_SEL_PAD_GPIO_18 0x50150f4
  786. #define HAL_IOMUX_FUN_TSX_ADC_CH_SEL_PAD_SW_CLK 0x605d0f4
  787. #define HAL_IOMUX_FUN_TSX_ADC_CLK_PAD_GPIO_19 0x50160f5
  788. #define HAL_IOMUX_FUN_TSX_ADC_CLK_PAD_SW_DIO 0x605e0f5
  789. #define HAL_IOMUX_FUN_UART_1_CTS_PAD_GPIO_2 0x300d0f6
  790. #define HAL_IOMUX_FUN_UART_1_CTS_PAD_UART_1_CTS 0x5f0f6
  791. #define HAL_IOMUX_FUN_UART_1_RTS_PAD_GPIO_3 0x300e0f7
  792. #define HAL_IOMUX_FUN_UART_1_RTS_PAD_UART_1_RTS 0x600f7
  793. #define HAL_IOMUX_FUN_UART_1_RXD_PAD_GPIO_0 0x300b0f8
  794. #define HAL_IOMUX_FUN_UART_1_RXD_PAD_UART_1_RXD 0x610f8
  795. #define HAL_IOMUX_FUN_UART_1_TXD_PAD_GPIO_1 0x300c0f9
  796. #define HAL_IOMUX_FUN_UART_1_TXD_PAD_UART_1_TXD 0x620f9
  797. #define HAL_IOMUX_FUN_UART_2_CTS_PAD_GPIO_2 0x700d0fa
  798. #define HAL_IOMUX_FUN_UART_2_CTS_PAD_GPIO_16 0x60130fa
  799. #define HAL_IOMUX_FUN_UART_2_CTS_PAD_UART_2_CTS 0x630fa
  800. #define HAL_IOMUX_FUN_UART_2_RTS_PAD_GPIO_3 0x700e0fb
  801. #define HAL_IOMUX_FUN_UART_2_RTS_PAD_GPIO_17 0x60140fb
  802. #define HAL_IOMUX_FUN_UART_2_RTS_PAD_UART_2_RTS 0x640fb
  803. #define HAL_IOMUX_FUN_UART_2_RXD_PAD_GPIO_0 0x700b0fc
  804. #define HAL_IOMUX_FUN_UART_2_RXD_PAD_SDMMC1_CLK 0x50440fc
  805. #define HAL_IOMUX_FUN_UART_2_RXD_PAD_UART_1_RTS 0x30600fc
  806. #define HAL_IOMUX_FUN_UART_2_RXD_PAD_UART_2_RTS 0x20640fc
  807. #define HAL_IOMUX_FUN_UART_2_RXD_PAD_UART_2_RXD 0x650fc
  808. #define HAL_IOMUX_FUN_UART_2_TXD_PAD_GPIO_1 0x700c0fd
  809. #define HAL_IOMUX_FUN_UART_2_TXD_PAD_SDMMC1_CMD 0x50450fd
  810. #define HAL_IOMUX_FUN_UART_2_TXD_PAD_UART_1_CTS 0x305f0fd
  811. #define HAL_IOMUX_FUN_UART_2_TXD_PAD_UART_2_CTS 0x20630fd
  812. #define HAL_IOMUX_FUN_UART_2_TXD_PAD_UART_2_TXD 0x660fd
  813. #define HAL_IOMUX_FUN_UART_3_CTS_PAD_GPIO_4 0x400f0fe
  814. #define HAL_IOMUX_FUN_UART_3_RTS_PAD_GPIO_5 0x40100ff
  815. #define HAL_IOMUX_FUN_UART_3_RXD_PAD_GPIO_0 0x400b100
  816. #define HAL_IOMUX_FUN_UART_3_RXD_PAD_GPIO_6 0x4011100
  817. #define HAL_IOMUX_FUN_UART_3_RXD_PAD_GPIO_17 0x1014100
  818. #define HAL_IOMUX_FUN_UART_3_RXD_PAD_SDMMC1_DATA_2 0x5048100
  819. #define HAL_IOMUX_FUN_UART_3_RXD_PAD_UART_2_RXD 0x4065100
  820. #define HAL_IOMUX_FUN_UART_3_TXD_PAD_GPIO_1 0x400c101
  821. #define HAL_IOMUX_FUN_UART_3_TXD_PAD_GPIO_7 0x4012101
  822. #define HAL_IOMUX_FUN_UART_3_TXD_PAD_GPIO_16 0x1013101
  823. #define HAL_IOMUX_FUN_UART_3_TXD_PAD_SDMMC1_DATA_3 0x5049101
  824. #define HAL_IOMUX_FUN_UART_3_TXD_PAD_UART_2_TXD 0x4066101
  825. #define HAL_IOMUX_FUN_UART_4_CTS_PAD_SDMMC1_DATA_4 0x504a102
  826. #define HAL_IOMUX_FUN_UART_4_RTS_PAD_SDMMC1_DATA_5 0x504b103
  827. #define HAL_IOMUX_FUN_UART_4_RXD_PAD_GPIO_2 0x400d104
  828. #define HAL_IOMUX_FUN_UART_4_RXD_PAD_I2C_M1_SCL 0x201b104
  829. #define HAL_IOMUX_FUN_UART_4_RXD_PAD_KEYIN_2 0x2026104
  830. #define HAL_IOMUX_FUN_UART_4_RXD_PAD_KEYOUT_4 0x302e104
  831. #define HAL_IOMUX_FUN_UART_4_RXD_PAD_SDMMC1_DATA_6 0x504c104
  832. #define HAL_IOMUX_FUN_UART_4_RXD_PAD_UART_2_CTS 0x4063104
  833. #define HAL_IOMUX_FUN_UART_4_TXD_PAD_GPIO_3 0x400e105
  834. #define HAL_IOMUX_FUN_UART_4_TXD_PAD_I2C_M1_SDA 0x201c105
  835. #define HAL_IOMUX_FUN_UART_4_TXD_PAD_KEYIN_3 0x2027105
  836. #define HAL_IOMUX_FUN_UART_4_TXD_PAD_KEYOUT_5 0x302f105
  837. #define HAL_IOMUX_FUN_UART_4_TXD_PAD_SDMMC1_DATA_7 0x504d105
  838. #define HAL_IOMUX_FUN_UART_4_TXD_PAD_UART_2_RTS 0x4064105
  839. #define HAL_IOMUX_FUN_UART_5_CTS_PAD_KEYOUT_4 0x702e106
  840. #define HAL_IOMUX_FUN_UART_5_RTS_PAD_KEYOUT_5 0x702f107
  841. #define HAL_IOMUX_FUN_UART_5_RXD_PAD_GPIO_4 0x300f108
  842. #define HAL_IOMUX_FUN_UART_5_RXD_PAD_KEYIN_4 0x7028108
  843. #define HAL_IOMUX_FUN_UART_5_RXD_PAD_SDMMC1_DATA_0 0x5046108
  844. #define HAL_IOMUX_FUN_UART_5_TXD_PAD_GPIO_5 0x3010109
  845. #define HAL_IOMUX_FUN_UART_5_TXD_PAD_KEYIN_5 0x7029109
  846. #define HAL_IOMUX_FUN_UART_5_TXD_PAD_SDMMC1_DATA_1 0x5047109
  847. #define HAL_IOMUX_FUN_UART_6_CTS_PAD_SDMMC1_DATA_0 0x604610a
  848. #define HAL_IOMUX_FUN_UART_6_RTS_PAD_SDMMC1_DATA_1 0x604710b
  849. #define HAL_IOMUX_FUN_UART_6_RXD_PAD_GPIO_6 0x301110c
  850. #define HAL_IOMUX_FUN_UART_6_RXD_PAD_KEYOUT_0 0x202a10c
  851. #define HAL_IOMUX_FUN_UART_6_RXD_PAD_SDMMC1_CLK 0x604410c
  852. #define HAL_IOMUX_FUN_UART_6_TXD_PAD_GPIO_7 0x301210d
  853. #define HAL_IOMUX_FUN_UART_6_TXD_PAD_KEYOUT_1 0x202b10d
  854. #define HAL_IOMUX_FUN_UART_6_TXD_PAD_SDMMC1_CMD 0x604510d
  855. #endif