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- /* Copyright (C) 2018 RDA Technologies Limited and/or its affiliates("RDA").
- * All rights reserved.
- *
- * This software is supplied "AS IS" without any warranties.
- * RDA assumes no responsibility or liability for the use of the software,
- * conveys no license or title under any patent, copyright, or mask work
- * right to the product. RDA reserves the right to make changes in the
- * software without notification. RDA also make no representation or
- * warranty that such application will be suitable for the specified use
- * without further testing or modification.
- */
- #ifndef _HAL_IOMUX_PIN_H_
- #define _HAL_IOMUX_PIN_H_
- // Auto generated. Don't edit it manually!
- // all functions
- #define HAL_IOMUX_FUN_ADI_SCL 1 // 0x1
- #define HAL_IOMUX_FUN_ADI_SDA 2 // 0x2
- #define HAL_IOMUX_FUN_AP_JTAG_TCK 3 // 0x3
- #define HAL_IOMUX_FUN_AP_JTAG_TDI 4 // 0x4
- #define HAL_IOMUX_FUN_AP_JTAG_TDO 5 // 0x5
- #define HAL_IOMUX_FUN_AP_JTAG_TMS 6 // 0x6
- #define HAL_IOMUX_FUN_AP_JTAG_TRST 7 // 0x7
- #define HAL_IOMUX_FUN_AUD_AD_D0 8 // 0x8
- #define HAL_IOMUX_FUN_AUD_AD_SYNC 9 // 0x9
- #define HAL_IOMUX_FUN_AUD_DA_D0 10 // 0xa
- #define HAL_IOMUX_FUN_AUD_DA_D1 11 // 0xb
- #define HAL_IOMUX_FUN_AUD_DA_SYNC 12 // 0xc
- #define HAL_IOMUX_FUN_AUD_SCLK 13 // 0xd
- #define HAL_IOMUX_FUN_CAMERA_PWDN 14 // 0xe
- #define HAL_IOMUX_FUN_CAMERA_REF_CLK 15 // 0xf
- #define HAL_IOMUX_FUN_CAMERA_RST_L 16 // 0x10
- #define HAL_IOMUX_FUN_CHIP_PD 17 // 0x11
- #define HAL_IOMUX_FUN_CLK26M_PMIC 18 // 0x12
- #define HAL_IOMUX_FUN_CTS 19 // 0x13
- #define HAL_IOMUX_FUN_DBGIO_CLK 20 // 0x14
- #define HAL_IOMUX_FUN_DBGIO_CMD 21 // 0x15
- #define HAL_IOMUX_FUN_DBGIO_DATA0 22 // 0x16
- #define HAL_IOMUX_FUN_DBGIO_DATA1 23 // 0x17
- #define HAL_IOMUX_FUN_DBGIO_DATA2 24 // 0x18
- #define HAL_IOMUX_FUN_DBGIO_DATA3 25 // 0x19
- #define HAL_IOMUX_FUN_DBGIO_DATA4 26 // 0x1a
- #define HAL_IOMUX_FUN_DBGIO_DATA5 27 // 0x1b
- #define HAL_IOMUX_FUN_DBGIO_DATA6 28 // 0x1c
- #define HAL_IOMUX_FUN_DBGIO_DATA7 29 // 0x1d
- #define HAL_IOMUX_FUN_DBG_CLK 30 // 0x1e
- #define HAL_IOMUX_FUN_DBG_DO_3 31 // 0x1f
- #define HAL_IOMUX_FUN_DBG_DO_4 32 // 0x20
- #define HAL_IOMUX_FUN_DBG_DO_5 33 // 0x21
- #define HAL_IOMUX_FUN_DBG_DO_6 34 // 0x22
- #define HAL_IOMUX_FUN_DBG_DO_7 35 // 0x23
- #define HAL_IOMUX_FUN_DBG_DO_8 36 // 0x24
- #define HAL_IOMUX_FUN_DBG_DO_9 37 // 0x25
- #define HAL_IOMUX_FUN_DBG_DO_10 38 // 0x26
- #define HAL_IOMUX_FUN_DBG_DO_11 39 // 0x27
- #define HAL_IOMUX_FUN_DBG_DO_12 40 // 0x28
- #define HAL_IOMUX_FUN_DBG_DO_13 41 // 0x29
- #define HAL_IOMUX_FUN_DBG_DO_14 42 // 0x2a
- #define HAL_IOMUX_FUN_DBG_DO_15 43 // 0x2b
- #define HAL_IOMUX_FUN_DBG_TRIG 44 // 0x2c
- #define HAL_IOMUX_FUN_DEBUG_BUS_0 45 // 0x2d
- #define HAL_IOMUX_FUN_DEBUG_BUS_1 46 // 0x2e
- #define HAL_IOMUX_FUN_DEBUG_BUS_2 47 // 0x2f
- #define HAL_IOMUX_FUN_DEBUG_BUS_3 48 // 0x30
- #define HAL_IOMUX_FUN_DEBUG_BUS_4 49 // 0x31
- #define HAL_IOMUX_FUN_DEBUG_BUS_5 50 // 0x32
- #define HAL_IOMUX_FUN_DEBUG_BUS_6 51 // 0x33
- #define HAL_IOMUX_FUN_DEBUG_BUS_7 52 // 0x34
- #define HAL_IOMUX_FUN_DEBUG_BUS_8 53 // 0x35
- #define HAL_IOMUX_FUN_DEBUG_BUS_9 54 // 0x36
- #define HAL_IOMUX_FUN_DEBUG_BUS_10 55 // 0x37
- #define HAL_IOMUX_FUN_DEBUG_BUS_11 56 // 0x38
- #define HAL_IOMUX_FUN_DEBUG_BUS_12 57 // 0x39
- #define HAL_IOMUX_FUN_DEBUG_BUS_13 58 // 0x3a
- #define HAL_IOMUX_FUN_DEBUG_BUS_14 59 // 0x3b
- #define HAL_IOMUX_FUN_DEBUG_BUS_15 60 // 0x3c
- #define HAL_IOMUX_FUN_DEBUG_CLK 61 // 0x3d
- #define HAL_IOMUX_FUN_DEBUG_HOST_CLK 62 // 0x3e
- #define HAL_IOMUX_FUN_DEBUG_HOST_RX 63 // 0x3f
- #define HAL_IOMUX_FUN_DEBUG_HOST_TX 64 // 0x40
- #define HAL_IOMUX_FUN_DIGRF_STROBE_S_O 65 // 0x41
- #define HAL_IOMUX_FUN_GPADC_IN1 66 // 0x42
- #define HAL_IOMUX_FUN_GPADC_IN2 67 // 0x43
- #define HAL_IOMUX_FUN_GPADC_IN3 68 // 0x44
- #define HAL_IOMUX_FUN_GPIO_0 69 // 0x45
- #define HAL_IOMUX_FUN_GPIO_1 70 // 0x46
- #define HAL_IOMUX_FUN_GPIO_2 71 // 0x47
- #define HAL_IOMUX_FUN_GPIO_3 72 // 0x48
- #define HAL_IOMUX_FUN_GPIO_4 73 // 0x49
- #define HAL_IOMUX_FUN_GPIO_5 74 // 0x4a
- #define HAL_IOMUX_FUN_GPIO_6 75 // 0x4b
- #define HAL_IOMUX_FUN_GPIO_7 76 // 0x4c
- #define HAL_IOMUX_FUN_GPIO_8 77 // 0x4d
- #define HAL_IOMUX_FUN_GPIO_9 78 // 0x4e
- #define HAL_IOMUX_FUN_GPIO_10 79 // 0x4f
- #define HAL_IOMUX_FUN_GPIO_11 80 // 0x50
- #define HAL_IOMUX_FUN_GPIO_12 81 // 0x51
- #define HAL_IOMUX_FUN_GPIO_13 82 // 0x52
- #define HAL_IOMUX_FUN_GPIO_14 83 // 0x53
- #define HAL_IOMUX_FUN_GPIO_15 84 // 0x54
- #define HAL_IOMUX_FUN_GPIO_16 85 // 0x55
- #define HAL_IOMUX_FUN_GPIO_17 86 // 0x56
- #define HAL_IOMUX_FUN_GPIO_18 87 // 0x57
- #define HAL_IOMUX_FUN_GPIO_19 88 // 0x58
- #define HAL_IOMUX_FUN_GPIO_20 89 // 0x59
- #define HAL_IOMUX_FUN_GPIO_21 90 // 0x5a
- #define HAL_IOMUX_FUN_GPIO_22 91 // 0x5b
- #define HAL_IOMUX_FUN_GPIO_23 92 // 0x5c
- #define HAL_IOMUX_FUN_GPIO_24 93 // 0x5d
- #define HAL_IOMUX_FUN_GPIO_25 94 // 0x5e
- #define HAL_IOMUX_FUN_GPIO_26 95 // 0x5f
- #define HAL_IOMUX_FUN_GPIO_27 96 // 0x60
- #define HAL_IOMUX_FUN_GPIO_28 97 // 0x61
- #define HAL_IOMUX_FUN_GPIO_29 98 // 0x62
- #define HAL_IOMUX_FUN_GPIO_30 99 // 0x63
- #define HAL_IOMUX_FUN_GPIO_31 100 // 0x64
- #define HAL_IOMUX_FUN_GPIO_32 101 // 0x65
- #define HAL_IOMUX_FUN_GPIO_33 102 // 0x66
- #define HAL_IOMUX_FUN_GPIO_34 103 // 0x67
- #define HAL_IOMUX_FUN_GPIO_35 104 // 0x68
- #define HAL_IOMUX_FUN_GPIO_36 105 // 0x69
- #define HAL_IOMUX_FUN_GPIO_37 106 // 0x6a
- #define HAL_IOMUX_FUN_GPIO_38 107 // 0x6b
- #define HAL_IOMUX_FUN_GPIO_39 108 // 0x6c
- #define HAL_IOMUX_FUN_GPIO_40 109 // 0x6d
- #define HAL_IOMUX_FUN_GPIO_41 110 // 0x6e
- #define HAL_IOMUX_FUN_GPIO_42 111 // 0x6f
- #define HAL_IOMUX_FUN_GPIO_43 112 // 0x70
- #define HAL_IOMUX_FUN_GPIO_44 113 // 0x71
- #define HAL_IOMUX_FUN_GPIO_45 114 // 0x72
- #define HAL_IOMUX_FUN_GPIO_46 115 // 0x73
- #define HAL_IOMUX_FUN_GPIO_47 116 // 0x74
- #define HAL_IOMUX_FUN_I2C_M1_SCL 117 // 0x75
- #define HAL_IOMUX_FUN_I2C_M1_SDA 118 // 0x76
- #define HAL_IOMUX_FUN_I2C_M2_SCL 119 // 0x77
- #define HAL_IOMUX_FUN_I2C_M2_SDA 120 // 0x78
- #define HAL_IOMUX_FUN_I2C_M3_SCL 121 // 0x79
- #define HAL_IOMUX_FUN_I2C_M3_SDA 122 // 0x7a
- #define HAL_IOMUX_FUN_I2S1_BCK 123 // 0x7b
- #define HAL_IOMUX_FUN_I2S1_LRCK 124 // 0x7c
- #define HAL_IOMUX_FUN_I2S1_MCLK 125 // 0x7d
- #define HAL_IOMUX_FUN_I2S1_SDAT_I 126 // 0x7e
- #define HAL_IOMUX_FUN_I2S1_SDAT_O 127 // 0x7f
- #define HAL_IOMUX_FUN_KEYIN_0 128 // 0x80
- #define HAL_IOMUX_FUN_KEYIN_1 129 // 0x81
- #define HAL_IOMUX_FUN_KEYIN_2 130 // 0x82
- #define HAL_IOMUX_FUN_KEYIN_3 131 // 0x83
- #define HAL_IOMUX_FUN_KEYIN_4 132 // 0x84
- #define HAL_IOMUX_FUN_KEYIN_5 133 // 0x85
- #define HAL_IOMUX_FUN_KEYOUT_0 134 // 0x86
- #define HAL_IOMUX_FUN_KEYOUT_1 135 // 0x87
- #define HAL_IOMUX_FUN_KEYOUT_2 136 // 0x88
- #define HAL_IOMUX_FUN_KEYOUT_3 137 // 0x89
- #define HAL_IOMUX_FUN_KEYOUT_4 138 // 0x8a
- #define HAL_IOMUX_FUN_KEYOUT_5 139 // 0x8b
- #define HAL_IOMUX_FUN_LCD_FMARK 140 // 0x8c
- #define HAL_IOMUX_FUN_LCD_RSTB 141 // 0x8d
- #define HAL_IOMUX_FUN_LNA_EN 142 // 0x8e
- #define HAL_IOMUX_FUN_LTE_GPO_0 143 // 0x8f
- #define HAL_IOMUX_FUN_LTE_GPO_1 144 // 0x90
- #define HAL_IOMUX_FUN_LTE_GPO_2 145 // 0x91
- #define HAL_IOMUX_FUN_LTE_GPO_3 146 // 0x92
- #define HAL_IOMUX_FUN_LTE_GPO_4 147 // 0x93
- #define HAL_IOMUX_FUN_LTE_GPO_5 148 // 0x94
- #define HAL_IOMUX_FUN_LTE_GPO_7 149 // 0x95
- #define HAL_IOMUX_FUN_LTE_GPO_8 150 // 0x96
- #define HAL_IOMUX_FUN_M_SPI_CLK 151 // 0x97
- #define HAL_IOMUX_FUN_M_SPI_CS 152 // 0x98
- #define HAL_IOMUX_FUN_M_SPI_D_0 153 // 0x99
- #define HAL_IOMUX_FUN_M_SPI_D_1 154 // 0x9a
- #define HAL_IOMUX_FUN_M_SPI_D_2 155 // 0x9b
- #define HAL_IOMUX_FUN_M_SPI_D_3 156 // 0x9c
- #define HAL_IOMUX_FUN_NAND_SEL 157 // 0x9d
- #define HAL_IOMUX_FUN_OSC_32K 158 // 0x9e
- #define HAL_IOMUX_FUN_OSC_ADC_CLK 159 // 0x9f
- #define HAL_IOMUX_FUN_OSC_ADC_DATA 160 // 0xa0
- #define HAL_IOMUX_FUN_PMIC_EXT_INT 161 // 0xa1
- #define HAL_IOMUX_FUN_PPS_OUT 162 // 0xa2
- #define HAL_IOMUX_FUN_PWM_0 163 // 0xa3
- #define HAL_IOMUX_FUN_PWM_1 164 // 0xa4
- #define HAL_IOMUX_FUN_PWM_2 165 // 0xa5
- #define HAL_IOMUX_FUN_PWM_3 166 // 0xa6
- #define HAL_IOMUX_FUN_PWM_4 167 // 0xa7
- #define HAL_IOMUX_FUN_PWM_5 168 // 0xa8
- #define HAL_IOMUX_FUN_PWM_6 169 // 0xa9
- #define HAL_IOMUX_FUN_PWM_7 170 // 0xaa
- #define HAL_IOMUX_FUN_PWM_8 171 // 0xab
- #define HAL_IOMUX_FUN_PWM_9 172 // 0xac
- #define HAL_IOMUX_FUN_PWM_10 173 // 0xad
- #define HAL_IOMUX_FUN_PWM_11 174 // 0xae
- #define HAL_IOMUX_FUN_PWM_12 175 // 0xaf
- #define HAL_IOMUX_FUN_PWM_13 176 // 0xb0
- #define HAL_IOMUX_FUN_PWM_14 177 // 0xb1
- #define HAL_IOMUX_FUN_PWM_15 178 // 0xb2
- #define HAL_IOMUX_FUN_RESETB 179 // 0xb3
- #define HAL_IOMUX_FUN_RFFE_SCK 180 // 0xb4
- #define HAL_IOMUX_FUN_RFFE_SDA 181 // 0xb5
- #define HAL_IOMUX_FUN_RF_GPIO0 182 // 0xb6
- #define HAL_IOMUX_FUN_RF_GPIO1 183 // 0xb7
- #define HAL_IOMUX_FUN_RF_GPIO2 184 // 0xb8
- #define HAL_IOMUX_FUN_RF_GPIO3 185 // 0xb9
- #define HAL_IOMUX_FUN_RF_GPIO4 186 // 0xba
- #define HAL_IOMUX_FUN_RF_GPIO5 187 // 0xbb
- #define HAL_IOMUX_FUN_RF_GPIO6 188 // 0xbc
- #define HAL_IOMUX_FUN_RF_GPIO7 189 // 0xbd
- #define HAL_IOMUX_FUN_RF_GPIO8 190 // 0xbe
- #define HAL_IOMUX_FUN_RF_GPIO9 191 // 0xbf
- #define HAL_IOMUX_FUN_SDMMC1_CLK 192 // 0xc0
- #define HAL_IOMUX_FUN_SDMMC1_CMD 193 // 0xc1
- #define HAL_IOMUX_FUN_SDMMC1_DATA_0 194 // 0xc2
- #define HAL_IOMUX_FUN_SDMMC1_DATA_1 195 // 0xc3
- #define HAL_IOMUX_FUN_SDMMC1_DATA_2 196 // 0xc4
- #define HAL_IOMUX_FUN_SDMMC1_DATA_3 197 // 0xc5
- #define HAL_IOMUX_FUN_SDMMC1_DATA_4 198 // 0xc6
- #define HAL_IOMUX_FUN_SDMMC1_DATA_5 199 // 0xc7
- #define HAL_IOMUX_FUN_SDMMC1_DATA_6 200 // 0xc8
- #define HAL_IOMUX_FUN_SDMMC1_DATA_7 201 // 0xc9
- #define HAL_IOMUX_FUN_SDMMC1_RST 202 // 0xca
- #define HAL_IOMUX_FUN_SDMMC2_CLK 203 // 0xcb
- #define HAL_IOMUX_FUN_SDMMC2_CMD 204 // 0xcc
- #define HAL_IOMUX_FUN_SDMMC2_DATA_0 205 // 0xcd
- #define HAL_IOMUX_FUN_SDMMC2_DATA_1 206 // 0xce
- #define HAL_IOMUX_FUN_SDMMC2_DATA_2 207 // 0xcf
- #define HAL_IOMUX_FUN_SDMMC2_DATA_3 208 // 0xd0
- #define HAL_IOMUX_FUN_SIM_0_CLK 209 // 0xd1
- #define HAL_IOMUX_FUN_SIM_0_DIO 210 // 0xd2
- #define HAL_IOMUX_FUN_SIM_0_RST 211 // 0xd3
- #define HAL_IOMUX_FUN_SIM_1_CLK 212 // 0xd4
- #define HAL_IOMUX_FUN_SIM_1_DIO 213 // 0xd5
- #define HAL_IOMUX_FUN_SIM_1_RST 214 // 0xd6
- #define HAL_IOMUX_FUN_SPI_1_CLK 215 // 0xd7
- #define HAL_IOMUX_FUN_SPI_1_CS_0 216 // 0xd8
- #define HAL_IOMUX_FUN_SPI_1_CS_1 217 // 0xd9
- #define HAL_IOMUX_FUN_SPI_1_DIO_0 218 // 0xda
- #define HAL_IOMUX_FUN_SPI_1_DI_1 219 // 0xdb
- #define HAL_IOMUX_FUN_SPI_2_CLK 220 // 0xdc
- #define HAL_IOMUX_FUN_SPI_2_CS_0 221 // 0xdd
- #define HAL_IOMUX_FUN_SPI_2_CS_1 222 // 0xde
- #define HAL_IOMUX_FUN_SPI_2_DIO_0 223 // 0xdf
- #define HAL_IOMUX_FUN_SPI_2_DI_1 224 // 0xe0
- #define HAL_IOMUX_FUN_SPI_CAMERA_SCK 225 // 0xe1
- #define HAL_IOMUX_FUN_SPI_CAMERA_SI_0 226 // 0xe2
- #define HAL_IOMUX_FUN_SPI_CAMERA_SI_1 227 // 0xe3
- #define HAL_IOMUX_FUN_SPI_CAMERA_SSN 228 // 0xe4
- #define HAL_IOMUX_FUN_SPI_FLASH1_CLK 229 // 0xe5
- #define HAL_IOMUX_FUN_SPI_FLASH1_CS 230 // 0xe6
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_0 231 // 0xe7
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_1 232 // 0xe8
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_2 233 // 0xe9
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_3 234 // 0xea
- #define HAL_IOMUX_FUN_SPI_LCD_CLK 235 // 0xeb
- #define HAL_IOMUX_FUN_SPI_LCD_CS 236 // 0xec
- #define HAL_IOMUX_FUN_SPI_LCD_SDC 237 // 0xed
- #define HAL_IOMUX_FUN_SPI_LCD_SELECT 238 // 0xee
- #define HAL_IOMUX_FUN_SPI_LCD_SIO 239 // 0xef
- #define HAL_IOMUX_FUN_TEST_CLKOUT 240 // 0xf0
- #define HAL_IOMUX_FUN_TIMESTAMP_IN 241 // 0xf1
- #define HAL_IOMUX_FUN_TIMESTAMP_OUT 242 // 0xf2
- #define HAL_IOMUX_FUN_TSX_ADC_CH_DATA 243 // 0xf3
- #define HAL_IOMUX_FUN_TSX_ADC_CH_SEL 244 // 0xf4
- #define HAL_IOMUX_FUN_TSX_ADC_CLK 245 // 0xf5
- #define HAL_IOMUX_FUN_UART_1_CTS 246 // 0xf6
- #define HAL_IOMUX_FUN_UART_1_RTS 247 // 0xf7
- #define HAL_IOMUX_FUN_UART_1_RXD 248 // 0xf8
- #define HAL_IOMUX_FUN_UART_1_TXD 249 // 0xf9
- #define HAL_IOMUX_FUN_UART_2_CTS 250 // 0xfa
- #define HAL_IOMUX_FUN_UART_2_RTS 251 // 0xfb
- #define HAL_IOMUX_FUN_UART_2_RXD 252 // 0xfc
- #define HAL_IOMUX_FUN_UART_2_TXD 253 // 0xfd
- #define HAL_IOMUX_FUN_UART_3_CTS 254 // 0xfe
- #define HAL_IOMUX_FUN_UART_3_RTS 255 // 0xff
- #define HAL_IOMUX_FUN_UART_3_RXD 256 // 0x100
- #define HAL_IOMUX_FUN_UART_3_TXD 257 // 0x101
- #define HAL_IOMUX_FUN_UART_4_CTS 258 // 0x102
- #define HAL_IOMUX_FUN_UART_4_RTS 259 // 0x103
- #define HAL_IOMUX_FUN_UART_4_RXD 260 // 0x104
- #define HAL_IOMUX_FUN_UART_4_TXD 261 // 0x105
- #define HAL_IOMUX_FUN_UART_5_CTS 262 // 0x106
- #define HAL_IOMUX_FUN_UART_5_RTS 263 // 0x107
- #define HAL_IOMUX_FUN_UART_5_RXD 264 // 0x108
- #define HAL_IOMUX_FUN_UART_5_TXD 265 // 0x109
- #define HAL_IOMUX_FUN_UART_6_CTS 266 // 0x10a
- #define HAL_IOMUX_FUN_UART_6_RTS 267 // 0x10b
- #define HAL_IOMUX_FUN_UART_6_RXD 268 // 0x10c
- #define HAL_IOMUX_FUN_UART_6_TXD 269 // 0x10d
- #define HAL_IOMUX_FUN_COUNT 269
- // all pads
- #define HAL_IOMUX_PAD_ADI_SCL (1 << 12) // 0x1
- #define HAL_IOMUX_PAD_ADI_SDA (2 << 12) // 0x2
- #define HAL_IOMUX_PAD_CAMERA_PWDN (3 << 12) // 0x3
- #define HAL_IOMUX_PAD_CAMERA_REF_CLK (4 << 12) // 0x4
- #define HAL_IOMUX_PAD_CAMERA_RST_L (5 << 12) // 0x5
- #define HAL_IOMUX_PAD_CHIP_PD (6 << 12) // 0x6
- #define HAL_IOMUX_PAD_CLK26M_PMIC (7 << 12) // 0x7
- #define HAL_IOMUX_PAD_DEBUG_HOST_CLK (8 << 12) // 0x8
- #define HAL_IOMUX_PAD_DEBUG_HOST_RX (9 << 12) // 0x9
- #define HAL_IOMUX_PAD_DEBUG_HOST_TX (10 << 12) // 0xa
- #define HAL_IOMUX_PAD_GPIO_0 (11 << 12) // 0xb
- #define HAL_IOMUX_PAD_GPIO_1 (12 << 12) // 0xc
- #define HAL_IOMUX_PAD_GPIO_2 (13 << 12) // 0xd
- #define HAL_IOMUX_PAD_GPIO_3 (14 << 12) // 0xe
- #define HAL_IOMUX_PAD_GPIO_4 (15 << 12) // 0xf
- #define HAL_IOMUX_PAD_GPIO_5 (16 << 12) // 0x10
- #define HAL_IOMUX_PAD_GPIO_6 (17 << 12) // 0x11
- #define HAL_IOMUX_PAD_GPIO_7 (18 << 12) // 0x12
- #define HAL_IOMUX_PAD_GPIO_16 (19 << 12) // 0x13
- #define HAL_IOMUX_PAD_GPIO_17 (20 << 12) // 0x14
- #define HAL_IOMUX_PAD_GPIO_18 (21 << 12) // 0x15
- #define HAL_IOMUX_PAD_GPIO_19 (22 << 12) // 0x16
- #define HAL_IOMUX_PAD_GPIO_20 (23 << 12) // 0x17
- #define HAL_IOMUX_PAD_GPIO_21 (24 << 12) // 0x18
- #define HAL_IOMUX_PAD_GPIO_22 (25 << 12) // 0x19
- #define HAL_IOMUX_PAD_GPIO_23 (26 << 12) // 0x1a
- #define HAL_IOMUX_PAD_I2C_M1_SCL (27 << 12) // 0x1b
- #define HAL_IOMUX_PAD_I2C_M1_SDA (28 << 12) // 0x1c
- #define HAL_IOMUX_PAD_I2C_M2_SCL (29 << 12) // 0x1d
- #define HAL_IOMUX_PAD_I2C_M2_SDA (30 << 12) // 0x1e
- #define HAL_IOMUX_PAD_I2S1_BCK (31 << 12) // 0x1f
- #define HAL_IOMUX_PAD_I2S1_LRCK (32 << 12) // 0x20
- #define HAL_IOMUX_PAD_I2S1_MCLK (33 << 12) // 0x21
- #define HAL_IOMUX_PAD_I2S1_SDAT_O (34 << 12) // 0x22
- #define HAL_IOMUX_PAD_I2S_SDAT_I (35 << 12) // 0x23
- #define HAL_IOMUX_PAD_KEYIN_0 (36 << 12) // 0x24
- #define HAL_IOMUX_PAD_KEYIN_1 (37 << 12) // 0x25
- #define HAL_IOMUX_PAD_KEYIN_2 (38 << 12) // 0x26
- #define HAL_IOMUX_PAD_KEYIN_3 (39 << 12) // 0x27
- #define HAL_IOMUX_PAD_KEYIN_4 (40 << 12) // 0x28
- #define HAL_IOMUX_PAD_KEYIN_5 (41 << 12) // 0x29
- #define HAL_IOMUX_PAD_KEYOUT_0 (42 << 12) // 0x2a
- #define HAL_IOMUX_PAD_KEYOUT_1 (43 << 12) // 0x2b
- #define HAL_IOMUX_PAD_KEYOUT_2 (44 << 12) // 0x2c
- #define HAL_IOMUX_PAD_KEYOUT_3 (45 << 12) // 0x2d
- #define HAL_IOMUX_PAD_KEYOUT_4 (46 << 12) // 0x2e
- #define HAL_IOMUX_PAD_KEYOUT_5 (47 << 12) // 0x2f
- #define HAL_IOMUX_PAD_LCD_FMARK (48 << 12) // 0x30
- #define HAL_IOMUX_PAD_LCD_RSTB (49 << 12) // 0x31
- #define HAL_IOMUX_PAD_M_SPI_CLK (50 << 12) // 0x32
- #define HAL_IOMUX_PAD_M_SPI_CS (51 << 12) // 0x33
- #define HAL_IOMUX_PAD_M_SPI_D_0 (52 << 12) // 0x34
- #define HAL_IOMUX_PAD_M_SPI_D_1 (53 << 12) // 0x35
- #define HAL_IOMUX_PAD_M_SPI_D_2 (54 << 12) // 0x36
- #define HAL_IOMUX_PAD_M_SPI_D_3 (55 << 12) // 0x37
- #define HAL_IOMUX_PAD_NAND_SEL (56 << 12) // 0x38
- #define HAL_IOMUX_PAD_OSC_32K (57 << 12) // 0x39
- #define HAL_IOMUX_PAD_PMIC_EXT_INT (58 << 12) // 0x3a
- #define HAL_IOMUX_PAD_RESETB (59 << 12) // 0x3b
- #define HAL_IOMUX_PAD_RFDIG_GPIO_0 (60 << 12) // 0x3c
- #define HAL_IOMUX_PAD_RFDIG_GPIO_1 (61 << 12) // 0x3d
- #define HAL_IOMUX_PAD_RFDIG_GPIO_2 (62 << 12) // 0x3e
- #define HAL_IOMUX_PAD_RFDIG_GPIO_3 (63 << 12) // 0x3f
- #define HAL_IOMUX_PAD_RFDIG_GPIO_4 (64 << 12) // 0x40
- #define HAL_IOMUX_PAD_RFDIG_GPIO_5 (65 << 12) // 0x41
- #define HAL_IOMUX_PAD_RFDIG_GPIO_6 (66 << 12) // 0x42
- #define HAL_IOMUX_PAD_RFDIG_GPIO_7 (67 << 12) // 0x43
- #define HAL_IOMUX_PAD_SDMMC1_CLK (68 << 12) // 0x44
- #define HAL_IOMUX_PAD_SDMMC1_CMD (69 << 12) // 0x45
- #define HAL_IOMUX_PAD_SDMMC1_DATA_0 (70 << 12) // 0x46
- #define HAL_IOMUX_PAD_SDMMC1_DATA_1 (71 << 12) // 0x47
- #define HAL_IOMUX_PAD_SDMMC1_DATA_2 (72 << 12) // 0x48
- #define HAL_IOMUX_PAD_SDMMC1_DATA_3 (73 << 12) // 0x49
- #define HAL_IOMUX_PAD_SDMMC1_DATA_4 (74 << 12) // 0x4a
- #define HAL_IOMUX_PAD_SDMMC1_DATA_5 (75 << 12) // 0x4b
- #define HAL_IOMUX_PAD_SDMMC1_DATA_6 (76 << 12) // 0x4c
- #define HAL_IOMUX_PAD_SDMMC1_DATA_7 (77 << 12) // 0x4d
- #define HAL_IOMUX_PAD_SDMMC1_RST (78 << 12) // 0x4e
- #define HAL_IOMUX_PAD_SIM_0_CLK (79 << 12) // 0x4f
- #define HAL_IOMUX_PAD_SIM_0_DIO (80 << 12) // 0x50
- #define HAL_IOMUX_PAD_SIM_0_RST (81 << 12) // 0x51
- #define HAL_IOMUX_PAD_SIM_1_CLK (82 << 12) // 0x52
- #define HAL_IOMUX_PAD_SIM_1_DIO (83 << 12) // 0x53
- #define HAL_IOMUX_PAD_SIM_1_RST (84 << 12) // 0x54
- #define HAL_IOMUX_PAD_SPI_CAMERA_SCK (85 << 12) // 0x55
- #define HAL_IOMUX_PAD_SPI_CAMERA_SI_0 (86 << 12) // 0x56
- #define HAL_IOMUX_PAD_SPI_CAMERA_SI_1 (87 << 12) // 0x57
- #define HAL_IOMUX_PAD_SPI_LCD_CLK (88 << 12) // 0x58
- #define HAL_IOMUX_PAD_SPI_LCD_CS (89 << 12) // 0x59
- #define HAL_IOMUX_PAD_SPI_LCD_SDC (90 << 12) // 0x5a
- #define HAL_IOMUX_PAD_SPI_LCD_SELECT (91 << 12) // 0x5b
- #define HAL_IOMUX_PAD_SPI_LCD_SIO (92 << 12) // 0x5c
- #define HAL_IOMUX_PAD_SW_CLK (93 << 12) // 0x5d
- #define HAL_IOMUX_PAD_SW_DIO (94 << 12) // 0x5e
- #define HAL_IOMUX_PAD_UART_1_CTS (95 << 12) // 0x5f
- #define HAL_IOMUX_PAD_UART_1_RTS (96 << 12) // 0x60
- #define HAL_IOMUX_PAD_UART_1_RXD (97 << 12) // 0x61
- #define HAL_IOMUX_PAD_UART_1_TXD (98 << 12) // 0x62
- #define HAL_IOMUX_PAD_UART_2_CTS (99 << 12) // 0x63
- #define HAL_IOMUX_PAD_UART_2_RTS (100 << 12) // 0x64
- #define HAL_IOMUX_PAD_UART_2_RXD (101 << 12) // 0x65
- #define HAL_IOMUX_PAD_UART_2_TXD (102 << 12) // 0x66
- #define HAL_IOMUX_PAD_COUNT 102
- // function with specified pad
- #define HAL_IOMUX_FUN_ADI_SCL_PAD_ADI_SCL 0x1001
- #define HAL_IOMUX_FUN_ADI_SDA_PAD_ADI_SDA 0x2002
- #define HAL_IOMUX_FUN_AP_JTAG_TCK_PAD_SW_CLK 0x5d003
- #define HAL_IOMUX_FUN_AP_JTAG_TDI_PAD_DEBUG_HOST_RX 0x9004
- #define HAL_IOMUX_FUN_AP_JTAG_TDO_PAD_DEBUG_HOST_TX 0xa005
- #define HAL_IOMUX_FUN_AP_JTAG_TMS_PAD_SW_DIO 0x5e006
- #define HAL_IOMUX_FUN_AP_JTAG_TRST_PAD_DEBUG_HOST_CLK 0x8007
- #define HAL_IOMUX_FUN_AUD_AD_D0_PAD_I2S_SDAT_I 0x3023008
- #define HAL_IOMUX_FUN_AUD_AD_SYNC_PAD_I2S1_LRCK 0x3020009
- #define HAL_IOMUX_FUN_AUD_DA_D0_PAD_I2S1_BCK 0x301f00a
- #define HAL_IOMUX_FUN_AUD_DA_D1_PAD_I2C_M2_SDA 0x301e00b
- #define HAL_IOMUX_FUN_AUD_DA_D1_PAD_SPI_CAMERA_SCK 0x305500b
- #define HAL_IOMUX_FUN_AUD_DA_SYNC_PAD_I2C_M2_SCL 0x301d00c
- #define HAL_IOMUX_FUN_AUD_SCLK_PAD_I2S1_SDAT_O 0x302200d
- #define HAL_IOMUX_FUN_CAMERA_PWDN_PAD_CAMERA_PWDN 0x300e
- #define HAL_IOMUX_FUN_CAMERA_PWDN_PAD_SDMMC1_CMD 0x204500e
- #define HAL_IOMUX_FUN_CAMERA_REF_CLK_PAD_CAMERA_REF_CLK 0x400f
- #define HAL_IOMUX_FUN_CAMERA_REF_CLK_PAD_SDMMC1_DATA_0 0x204600f
- #define HAL_IOMUX_FUN_CAMERA_RST_L_PAD_CAMERA_RST_L 0x5010
- #define HAL_IOMUX_FUN_CAMERA_RST_L_PAD_SDMMC1_CLK 0x2044010
- #define HAL_IOMUX_FUN_CHIP_PD_PAD_CHIP_PD 0x6011
- #define HAL_IOMUX_FUN_CLK26M_PMIC_PAD_CLK26M_PMIC 0x7012
- #define HAL_IOMUX_FUN_CTS_PAD_SPI_CAMERA_SI_0 0x6056013
- #define HAL_IOMUX_FUN_DBGIO_CLK_PAD_SDMMC1_CLK 0x8044014
- #define HAL_IOMUX_FUN_DBGIO_CMD_PAD_SDMMC1_CMD 0x8045015
- #define HAL_IOMUX_FUN_DBGIO_DATA0_PAD_SDMMC1_DATA_0 0x8046016
- #define HAL_IOMUX_FUN_DBGIO_DATA1_PAD_SDMMC1_DATA_1 0x8047017
- #define HAL_IOMUX_FUN_DBGIO_DATA2_PAD_SDMMC1_DATA_2 0x8048018
- #define HAL_IOMUX_FUN_DBGIO_DATA3_PAD_SDMMC1_DATA_3 0x8049019
- #define HAL_IOMUX_FUN_DBGIO_DATA4_PAD_SDMMC1_DATA_4 0x804a01a
- #define HAL_IOMUX_FUN_DBGIO_DATA5_PAD_SDMMC1_DATA_5 0x804b01b
- #define HAL_IOMUX_FUN_DBGIO_DATA6_PAD_SDMMC1_DATA_6 0x804c01c
- #define HAL_IOMUX_FUN_DBGIO_DATA7_PAD_SDMMC1_DATA_7 0x804d01d
- #define HAL_IOMUX_FUN_DBG_CLK_PAD_SPI_CAMERA_SI_0 0x805601e
- #define HAL_IOMUX_FUN_DBG_DO_3_PAD_SPI_LCD_SIO 0x805c01f
- #define HAL_IOMUX_FUN_DBG_DO_4_PAD_SPI_LCD_SDC 0x805a020
- #define HAL_IOMUX_FUN_DBG_DO_5_PAD_SPI_LCD_CLK 0x8058021
- #define HAL_IOMUX_FUN_DBG_DO_6_PAD_SPI_LCD_CS 0x8059022
- #define HAL_IOMUX_FUN_DBG_DO_7_PAD_SPI_LCD_SELECT 0x805b023
- #define HAL_IOMUX_FUN_DBG_DO_8_PAD_LCD_FMARK 0x8030024
- #define HAL_IOMUX_FUN_DBG_DO_9_PAD_I2C_M2_SCL 0x801d025
- #define HAL_IOMUX_FUN_DBG_DO_10_PAD_I2C_M2_SDA 0x801e026
- #define HAL_IOMUX_FUN_DBG_DO_11_PAD_CAMERA_RST_L 0x8005027
- #define HAL_IOMUX_FUN_DBG_DO_12_PAD_CAMERA_PWDN 0x8003028
- #define HAL_IOMUX_FUN_DBG_DO_13_PAD_I2S1_BCK 0x801f029
- #define HAL_IOMUX_FUN_DBG_DO_14_PAD_I2S1_LRCK 0x802002a
- #define HAL_IOMUX_FUN_DBG_DO_15_PAD_I2S_SDAT_I 0x802302b
- #define HAL_IOMUX_FUN_DBG_TRIG_PAD_CAMERA_REF_CLK 0x800402c
- #define HAL_IOMUX_FUN_DEBUG_BUS_0_PAD_GPIO_1 0x600c02d
- #define HAL_IOMUX_FUN_DEBUG_BUS_0_PAD_I2C_M2_SCL 0x601d02d
- #define HAL_IOMUX_FUN_DEBUG_BUS_1_PAD_GPIO_2 0x600d02e
- #define HAL_IOMUX_FUN_DEBUG_BUS_1_PAD_I2C_M2_SDA 0x601e02e
- #define HAL_IOMUX_FUN_DEBUG_BUS_2_PAD_CAMERA_RST_L 0x600502f
- #define HAL_IOMUX_FUN_DEBUG_BUS_2_PAD_GPIO_3 0x600e02f
- #define HAL_IOMUX_FUN_DEBUG_BUS_3_PAD_CAMERA_PWDN 0x6003030
- #define HAL_IOMUX_FUN_DEBUG_BUS_3_PAD_GPIO_4 0x600f030
- #define HAL_IOMUX_FUN_DEBUG_BUS_4_PAD_CAMERA_REF_CLK 0x6004031
- #define HAL_IOMUX_FUN_DEBUG_BUS_4_PAD_GPIO_5 0x6010031
- #define HAL_IOMUX_FUN_DEBUG_BUS_5_PAD_SPI_LCD_SIO 0x605c032
- #define HAL_IOMUX_FUN_DEBUG_BUS_6_PAD_SPI_CAMERA_SI_1 0x6057033
- #define HAL_IOMUX_FUN_DEBUG_BUS_6_PAD_SPI_LCD_SDC 0x605a033
- #define HAL_IOMUX_FUN_DEBUG_BUS_7_PAD_SPI_CAMERA_SCK 0x6055034
- #define HAL_IOMUX_FUN_DEBUG_BUS_7_PAD_SPI_LCD_CLK 0x6058034
- #define HAL_IOMUX_FUN_DEBUG_BUS_8_PAD_KEYIN_0 0x6024035
- #define HAL_IOMUX_FUN_DEBUG_BUS_8_PAD_SPI_LCD_CS 0x6059035
- #define HAL_IOMUX_FUN_DEBUG_BUS_9_PAD_KEYIN_1 0x6025036
- #define HAL_IOMUX_FUN_DEBUG_BUS_9_PAD_SPI_LCD_SELECT 0x605b036
- #define HAL_IOMUX_FUN_DEBUG_BUS_10_PAD_KEYIN_2 0x6026037
- #define HAL_IOMUX_FUN_DEBUG_BUS_10_PAD_LCD_FMARK 0x6030037
- #define HAL_IOMUX_FUN_DEBUG_BUS_11_PAD_KEYIN_3 0x6027038
- #define HAL_IOMUX_FUN_DEBUG_BUS_11_PAD_LCD_RSTB 0x6031038
- #define HAL_IOMUX_FUN_DEBUG_BUS_12_PAD_KEYIN_4 0x6028039
- #define HAL_IOMUX_FUN_DEBUG_BUS_13_PAD_KEYOUT_0 0x602a03a
- #define HAL_IOMUX_FUN_DEBUG_BUS_14_PAD_KEYOUT_1 0x602b03b
- #define HAL_IOMUX_FUN_DEBUG_BUS_15_PAD_KEYOUT_2 0x602c03c
- #define HAL_IOMUX_FUN_DEBUG_CLK_PAD_GPIO_0 0x600b03d
- #define HAL_IOMUX_FUN_DEBUG_CLK_PAD_KEYOUT_3 0x602d03d
- #define HAL_IOMUX_FUN_DEBUG_HOST_CLK_PAD_DEBUG_HOST_CLK 0x200803e
- #define HAL_IOMUX_FUN_DEBUG_HOST_RX_PAD_DEBUG_HOST_RX 0x200903f
- #define HAL_IOMUX_FUN_DEBUG_HOST_TX_PAD_DEBUG_HOST_TX 0x200a040
- #define HAL_IOMUX_FUN_DIGRF_STROBE_S_O_PAD_GPIO_18 0x6015041
- #define HAL_IOMUX_FUN_GPADC_IN1_PAD_SPI_LCD_SDC 0x705a042
- #define HAL_IOMUX_FUN_GPADC_IN2_PAD_LCD_FMARK 0x7030043
- #define HAL_IOMUX_FUN_GPADC_IN3_PAD_CAMERA_PWDN 0x7003044
- #define HAL_IOMUX_FUN_GPIO_0_PAD_GPIO_0 0xb045
- #define HAL_IOMUX_FUN_GPIO_1_PAD_GPIO_1 0xc046
- #define HAL_IOMUX_FUN_GPIO_2_PAD_GPIO_2 0xd047
- #define HAL_IOMUX_FUN_GPIO_3_PAD_GPIO_3 0xe048
- #define HAL_IOMUX_FUN_GPIO_4_PAD_GPIO_4 0xf049
- #define HAL_IOMUX_FUN_GPIO_5_PAD_GPIO_5 0x1004a
- #define HAL_IOMUX_FUN_GPIO_6_PAD_GPIO_6 0x1104b
- #define HAL_IOMUX_FUN_GPIO_7_PAD_GPIO_7 0x1204c
- #define HAL_IOMUX_FUN_GPIO_8_PAD_KEYIN_4 0x102804d
- #define HAL_IOMUX_FUN_GPIO_9_PAD_KEYIN_5 0x102904e
- #define HAL_IOMUX_FUN_GPIO_10_PAD_KEYOUT_4 0x102e04f
- #define HAL_IOMUX_FUN_GPIO_11_PAD_KEYOUT_5 0x102f050
- #define HAL_IOMUX_FUN_GPIO_12_PAD_UART_1_RXD 0x1061051
- #define HAL_IOMUX_FUN_GPIO_13_PAD_UART_1_TXD 0x1062052
- #define HAL_IOMUX_FUN_GPIO_14_PAD_UART_1_CTS 0x105f053
- #define HAL_IOMUX_FUN_GPIO_15_PAD_UART_1_RTS 0x4060054
- #define HAL_IOMUX_FUN_GPIO_16_PAD_GPIO_16 0x13055
- #define HAL_IOMUX_FUN_GPIO_16_PAD_SDMMC1_CLK 0x1044055
- #define HAL_IOMUX_FUN_GPIO_17_PAD_GPIO_17 0x14056
- #define HAL_IOMUX_FUN_GPIO_17_PAD_SDMMC1_CMD 0x1045056
- #define HAL_IOMUX_FUN_GPIO_18_PAD_GPIO_18 0x15057
- #define HAL_IOMUX_FUN_GPIO_18_PAD_SDMMC1_DATA_0 0x1046057
- #define HAL_IOMUX_FUN_GPIO_18_PAD_SPI_CAMERA_SCK 0x2055057
- #define HAL_IOMUX_FUN_GPIO_19_PAD_GPIO_19 0x16058
- #define HAL_IOMUX_FUN_GPIO_19_PAD_I2S1_BCK 0x201f058
- #define HAL_IOMUX_FUN_GPIO_19_PAD_SDMMC1_DATA_1 0x1047058
- #define HAL_IOMUX_FUN_GPIO_20_PAD_GPIO_20 0x17059
- #define HAL_IOMUX_FUN_GPIO_20_PAD_I2S1_LRCK 0x2020059
- #define HAL_IOMUX_FUN_GPIO_20_PAD_SDMMC1_DATA_2 0x1048059
- #define HAL_IOMUX_FUN_GPIO_21_PAD_GPIO_21 0x1805a
- #define HAL_IOMUX_FUN_GPIO_21_PAD_I2S_SDAT_I 0x202305a
- #define HAL_IOMUX_FUN_GPIO_21_PAD_SDMMC1_DATA_3 0x104905a
- #define HAL_IOMUX_FUN_GPIO_22_PAD_GPIO_22 0x1905b
- #define HAL_IOMUX_FUN_GPIO_22_PAD_I2S1_SDAT_O 0x202205b
- #define HAL_IOMUX_FUN_GPIO_23_PAD_GPIO_23 0x1a05c
- #define HAL_IOMUX_FUN_GPIO_24_PAD_SDMMC1_DATA_4 0x104a05d
- #define HAL_IOMUX_FUN_GPIO_24_PAD_SW_CLK 0x105d05d
- #define HAL_IOMUX_FUN_GPIO_25_PAD_SDMMC1_DATA_5 0x104b05e
- #define HAL_IOMUX_FUN_GPIO_25_PAD_SW_DIO 0x105e05e
- #define HAL_IOMUX_FUN_GPIO_26_PAD_DEBUG_HOST_RX 0x100905f
- #define HAL_IOMUX_FUN_GPIO_26_PAD_SDMMC1_DATA_6 0x104c05f
- #define HAL_IOMUX_FUN_GPIO_27_PAD_DEBUG_HOST_TX 0x100a060
- #define HAL_IOMUX_FUN_GPIO_27_PAD_SDMMC1_DATA_7 0x104d060
- #define HAL_IOMUX_FUN_GPIO_28_PAD_DEBUG_HOST_CLK 0x1008061
- #define HAL_IOMUX_FUN_GPIO_28_PAD_KEYIN_0 0x1024061
- #define HAL_IOMUX_FUN_GPIO_29_PAD_I2C_M1_SCL 0x101b062
- #define HAL_IOMUX_FUN_GPIO_29_PAD_KEYIN_1 0x1025062
- #define HAL_IOMUX_FUN_GPIO_30_PAD_I2C_M1_SDA 0x101c063
- #define HAL_IOMUX_FUN_GPIO_30_PAD_KEYIN_2 0x1026063
- #define HAL_IOMUX_FUN_GPIO_30_PAD_SIM_1_CLK 0x1052063
- #define HAL_IOMUX_FUN_GPIO_31_PAD_KEYIN_3 0x1027064
- #define HAL_IOMUX_FUN_GPIO_31_PAD_SIM_1_DIO 0x1053064
- #define HAL_IOMUX_FUN_GPIO_31_PAD_UART_2_RXD 0x3065064
- #define HAL_IOMUX_FUN_GPIO_32_PAD_KEYOUT_0 0x102a065
- #define HAL_IOMUX_FUN_GPIO_32_PAD_SIM_1_RST 0x1054065
- #define HAL_IOMUX_FUN_GPIO_32_PAD_UART_2_TXD 0x3066065
- #define HAL_IOMUX_FUN_GPIO_33_PAD_KEYOUT_1 0x102b066
- #define HAL_IOMUX_FUN_GPIO_33_PAD_UART_2_CTS 0x1063066
- #define HAL_IOMUX_FUN_GPIO_34_PAD_KEYOUT_2 0x102c067
- #define HAL_IOMUX_FUN_GPIO_34_PAD_UART_2_RTS 0x1064067
- #define HAL_IOMUX_FUN_GPIO_35_PAD_KEYOUT_3 0x102d068
- #define HAL_IOMUX_FUN_GPIO_35_PAD_SPI_LCD_SIO 0x205c068
- #define HAL_IOMUX_FUN_GPIO_36_PAD_SDMMC1_RST 0x104e069
- #define HAL_IOMUX_FUN_GPIO_36_PAD_SPI_LCD_SDC 0x205a069
- #define HAL_IOMUX_FUN_GPIO_37_PAD_SPI_LCD_CLK 0x205806a
- #define HAL_IOMUX_FUN_GPIO_38_PAD_SPI_LCD_CS 0x205906b
- #define HAL_IOMUX_FUN_GPIO_39_PAD_SPI_LCD_SELECT 0x205b06c
- #define HAL_IOMUX_FUN_GPIO_40_PAD_LCD_FMARK 0x203006d
- #define HAL_IOMUX_FUN_GPIO_41_PAD_LCD_RSTB 0x203106e
- #define HAL_IOMUX_FUN_GPIO_42_PAD_I2C_M2_SCL 0x201d06f
- #define HAL_IOMUX_FUN_GPIO_43_PAD_I2C_M2_SDA 0x201e070
- #define HAL_IOMUX_FUN_GPIO_44_PAD_CAMERA_RST_L 0x3005071
- #define HAL_IOMUX_FUN_GPIO_45_PAD_CAMERA_PWDN 0x3003072
- #define HAL_IOMUX_FUN_GPIO_46_PAD_CAMERA_REF_CLK 0x2004073
- #define HAL_IOMUX_FUN_GPIO_46_PAD_I2S1_MCLK 0x1021073
- #define HAL_IOMUX_FUN_GPIO_47_PAD_SPI_CAMERA_SI_0 0x3056074
- #define HAL_IOMUX_FUN_I2C_M1_SCL_PAD_I2C_M1_SCL 0x1b075
- #define HAL_IOMUX_FUN_I2C_M1_SCL_PAD_KEYOUT_2 0x302c075
- #define HAL_IOMUX_FUN_I2C_M1_SCL_PAD_SDMMC1_CMD 0x3045075
- #define HAL_IOMUX_FUN_I2C_M1_SCL_PAD_SDMMC1_DATA_4 0x204a075
- #define HAL_IOMUX_FUN_I2C_M1_SCL_PAD_UART_2_RXD 0x1065075
- #define HAL_IOMUX_FUN_I2C_M1_SDA_PAD_I2C_M1_SDA 0x1c076
- #define HAL_IOMUX_FUN_I2C_M1_SDA_PAD_KEYOUT_3 0x302d076
- #define HAL_IOMUX_FUN_I2C_M1_SDA_PAD_SDMMC1_DATA_0 0x3046076
- #define HAL_IOMUX_FUN_I2C_M1_SDA_PAD_SDMMC1_DATA_5 0x204b076
- #define HAL_IOMUX_FUN_I2C_M1_SDA_PAD_UART_2_TXD 0x1066076
- #define HAL_IOMUX_FUN_I2C_M2_SCL_PAD_GPIO_6 0x2011077
- #define HAL_IOMUX_FUN_I2C_M2_SCL_PAD_I2C_M2_SCL 0x1d077
- #define HAL_IOMUX_FUN_I2C_M2_SCL_PAD_KEYIN_4 0x4028077
- #define HAL_IOMUX_FUN_I2C_M2_SCL_PAD_SDMMC1_DATA_6 0x304c077
- #define HAL_IOMUX_FUN_I2C_M2_SCL_PAD_SPI_CAMERA_SI_0 0x1056077
- #define HAL_IOMUX_FUN_I2C_M2_SDA_PAD_GPIO_7 0x2012078
- #define HAL_IOMUX_FUN_I2C_M2_SDA_PAD_I2C_M2_SDA 0x1e078
- #define HAL_IOMUX_FUN_I2C_M2_SDA_PAD_KEYIN_5 0x4029078
- #define HAL_IOMUX_FUN_I2C_M2_SDA_PAD_SDMMC1_DATA_7 0x304d078
- #define HAL_IOMUX_FUN_I2C_M2_SDA_PAD_SPI_CAMERA_SI_1 0x1057078
- #define HAL_IOMUX_FUN_I2C_M3_SCL_PAD_CAMERA_RST_L 0x2005079
- #define HAL_IOMUX_FUN_I2C_M3_SCL_PAD_GPIO_16 0x3013079
- #define HAL_IOMUX_FUN_I2C_M3_SCL_PAD_I2S1_BCK 0x101f079
- #define HAL_IOMUX_FUN_I2C_M3_SCL_PAD_I2S_SDAT_I 0x4023079
- #define HAL_IOMUX_FUN_I2C_M3_SCL_PAD_UART_2_CTS 0x3063079
- #define HAL_IOMUX_FUN_I2C_M3_SDA_PAD_CAMERA_PWDN 0x200307a
- #define HAL_IOMUX_FUN_I2C_M3_SDA_PAD_GPIO_17 0x301407a
- #define HAL_IOMUX_FUN_I2C_M3_SDA_PAD_I2S1_LRCK 0x102007a
- #define HAL_IOMUX_FUN_I2C_M3_SDA_PAD_I2S1_SDAT_O 0x402207a
- #define HAL_IOMUX_FUN_I2C_M3_SDA_PAD_UART_2_RTS 0x306407a
- #define HAL_IOMUX_FUN_I2S1_BCK_PAD_GPIO_19 0x701607b
- #define HAL_IOMUX_FUN_I2S1_BCK_PAD_I2S1_BCK 0x1f07b
- #define HAL_IOMUX_FUN_I2S1_LRCK_PAD_GPIO_20 0x701707c
- #define HAL_IOMUX_FUN_I2S1_LRCK_PAD_I2S1_LRCK 0x2007c
- #define HAL_IOMUX_FUN_I2S1_MCLK_PAD_GPIO_18 0x701507d
- #define HAL_IOMUX_FUN_I2S1_MCLK_PAD_I2S1_MCLK 0x2107d
- #define HAL_IOMUX_FUN_I2S1_SDAT_I_PAD_GPIO_16 0x701307e
- #define HAL_IOMUX_FUN_I2S1_SDAT_I_PAD_I2S_SDAT_I 0x2307e
- #define HAL_IOMUX_FUN_I2S1_SDAT_O_PAD_GPIO_17 0x701407f
- #define HAL_IOMUX_FUN_I2S1_SDAT_O_PAD_I2S1_SDAT_O 0x2207f
- #define HAL_IOMUX_FUN_KEYIN_0_PAD_KEYIN_0 0x24080
- #define HAL_IOMUX_FUN_KEYIN_1_PAD_KEYIN_1 0x25081
- #define HAL_IOMUX_FUN_KEYIN_2_PAD_KEYIN_2 0x26082
- #define HAL_IOMUX_FUN_KEYIN_3_PAD_KEYIN_3 0x27083
- #define HAL_IOMUX_FUN_KEYIN_4_PAD_KEYIN_4 0x28084
- #define HAL_IOMUX_FUN_KEYIN_5_PAD_KEYIN_5 0x29085
- #define HAL_IOMUX_FUN_KEYOUT_0_PAD_KEYOUT_0 0x2a086
- #define HAL_IOMUX_FUN_KEYOUT_1_PAD_KEYOUT_1 0x2b087
- #define HAL_IOMUX_FUN_KEYOUT_2_PAD_KEYOUT_2 0x2c088
- #define HAL_IOMUX_FUN_KEYOUT_3_PAD_KEYOUT_3 0x2d089
- #define HAL_IOMUX_FUN_KEYOUT_4_PAD_KEYOUT_4 0x2e08a
- #define HAL_IOMUX_FUN_KEYOUT_5_PAD_KEYOUT_5 0x2f08b
- #define HAL_IOMUX_FUN_LCD_FMARK_PAD_LCD_FMARK 0x3008c
- #define HAL_IOMUX_FUN_LCD_RSTB_PAD_LCD_RSTB 0x3108d
- #define HAL_IOMUX_FUN_LNA_EN_PAD_GPIO_16 0x501308e
- #define HAL_IOMUX_FUN_LNA_EN_PAD_SDMMC1_DATA_4 0x704a08e
- #define HAL_IOMUX_FUN_LTE_GPO_0_PAD_RFDIG_GPIO_0 0x303c08f
- #define HAL_IOMUX_FUN_LTE_GPO_1_PAD_RFDIG_GPIO_1 0x303d090
- #define HAL_IOMUX_FUN_LTE_GPO_2_PAD_RFDIG_GPIO_2 0x303e091
- #define HAL_IOMUX_FUN_LTE_GPO_3_PAD_RFDIG_GPIO_3 0x303f092
- #define HAL_IOMUX_FUN_LTE_GPO_4_PAD_RFDIG_GPIO_4 0x3040093
- #define HAL_IOMUX_FUN_LTE_GPO_5_PAD_RFDIG_GPIO_5 0x3041094
- #define HAL_IOMUX_FUN_LTE_GPO_7_PAD_RFDIG_GPIO_6 0x3042095
- #define HAL_IOMUX_FUN_LTE_GPO_8_PAD_RFDIG_GPIO_7 0x3043096
- #define HAL_IOMUX_FUN_M_SPI_CLK_PAD_M_SPI_CLK 0x32097
- #define HAL_IOMUX_FUN_M_SPI_CS_PAD_M_SPI_CS 0x33098
- #define HAL_IOMUX_FUN_M_SPI_D_0_PAD_M_SPI_D_0 0x34099
- #define HAL_IOMUX_FUN_M_SPI_D_1_PAD_M_SPI_D_1 0x3509a
- #define HAL_IOMUX_FUN_M_SPI_D_2_PAD_M_SPI_D_2 0x3609b
- #define HAL_IOMUX_FUN_M_SPI_D_3_PAD_M_SPI_D_3 0x3709c
- #define HAL_IOMUX_FUN_NAND_SEL_PAD_NAND_SEL 0x3809d
- #define HAL_IOMUX_FUN_OSC_32K_PAD_OSC_32K 0x3909e
- #define HAL_IOMUX_FUN_OSC_ADC_CLK_PAD_DEBUG_HOST_TX 0x600a09f
- #define HAL_IOMUX_FUN_OSC_ADC_CLK_PAD_GPIO_21 0x501809f
- #define HAL_IOMUX_FUN_OSC_ADC_DATA_PAD_DEBUG_HOST_CLK 0x60080a0
- #define HAL_IOMUX_FUN_OSC_ADC_DATA_PAD_GPIO_22 0x50190a0
- #define HAL_IOMUX_FUN_PMIC_EXT_INT_PAD_PMIC_EXT_INT 0x3a0a1
- #define HAL_IOMUX_FUN_PPS_OUT_PAD_GPIO_17 0x50140a2
- #define HAL_IOMUX_FUN_PPS_OUT_PAD_SDMMC1_DATA_5 0x704b0a2
- #define HAL_IOMUX_FUN_PWM_0_PAD_GPIO_5 0x10100a3
- #define HAL_IOMUX_FUN_PWM_0_PAD_KEYIN_4 0x20280a3
- #define HAL_IOMUX_FUN_PWM_1_PAD_GPIO_6 0x10110a4
- #define HAL_IOMUX_FUN_PWM_1_PAD_KEYIN_5 0x20290a4
- #define HAL_IOMUX_FUN_PWM_2_PAD_GPIO_7 0x10120a5
- #define HAL_IOMUX_FUN_PWM_2_PAD_KEYOUT_4 0x202e0a5
- #define HAL_IOMUX_FUN_PWM_3_PAD_KEYOUT_5 0x202f0a6
- #define HAL_IOMUX_FUN_PWM_3_PAD_UART_1_RTS 0x10600a6
- #define HAL_IOMUX_FUN_PWM_4_PAD_I2C_M2_SCL 0x101d0a7
- #define HAL_IOMUX_FUN_PWM_4_PAD_KEYIN_4 0x30280a7
- #define HAL_IOMUX_FUN_PWM_4_PAD_SIM_1_CLK 0x20520a7
- #define HAL_IOMUX_FUN_PWM_5_PAD_I2C_M2_SDA 0x101e0a8
- #define HAL_IOMUX_FUN_PWM_5_PAD_KEYIN_5 0x30290a8
- #define HAL_IOMUX_FUN_PWM_5_PAD_SIM_1_DIO 0x20530a8
- #define HAL_IOMUX_FUN_PWM_6_PAD_CAMERA_RST_L 0x10050a9
- #define HAL_IOMUX_FUN_PWM_6_PAD_KEYOUT_0 0x302a0a9
- #define HAL_IOMUX_FUN_PWM_6_PAD_SIM_1_RST 0x20540a9
- #define HAL_IOMUX_FUN_PWM_7_PAD_CAMERA_PWDN 0x10030aa
- #define HAL_IOMUX_FUN_PWM_7_PAD_GPIO_16 0x20130aa
- #define HAL_IOMUX_FUN_PWM_7_PAD_KEYOUT_1 0x302b0aa
- #define HAL_IOMUX_FUN_PWM_8_PAD_CAMERA_REF_CLK 0x10040ab
- #define HAL_IOMUX_FUN_PWM_8_PAD_GPIO_0 0x500b0ab
- #define HAL_IOMUX_FUN_PWM_8_PAD_GPIO_17 0x20140ab
- #define HAL_IOMUX_FUN_PWM_9_PAD_GPIO_1 0x500c0ac
- #define HAL_IOMUX_FUN_PWM_9_PAD_GPIO_23 0x201a0ac
- #define HAL_IOMUX_FUN_PWM_9_PAD_SPI_CAMERA_SCK 0x10550ac
- #define HAL_IOMUX_FUN_PWM_10_PAD_GPIO_2 0x500d0ad
- #define HAL_IOMUX_FUN_PWM_10_PAD_I2S_SDAT_I 0x10230ad
- #define HAL_IOMUX_FUN_PWM_10_PAD_UART_1_CTS 0x205f0ad
- #define HAL_IOMUX_FUN_PWM_11_PAD_GPIO_3 0x500e0ae
- #define HAL_IOMUX_FUN_PWM_11_PAD_I2S1_SDAT_O 0x10220ae
- #define HAL_IOMUX_FUN_PWM_11_PAD_UART_1_RTS 0x20600ae
- #define HAL_IOMUX_FUN_PWM_12_PAD_GPIO_4 0x500f0af
- #define HAL_IOMUX_FUN_PWM_12_PAD_SDMMC1_DATA_6 0x204c0af
- #define HAL_IOMUX_FUN_PWM_12_PAD_UART_2_RXD 0x20650af
- #define HAL_IOMUX_FUN_PWM_13_PAD_GPIO_18 0x40150b0
- #define HAL_IOMUX_FUN_PWM_13_PAD_SDMMC1_DATA_7 0x204d0b0
- #define HAL_IOMUX_FUN_PWM_13_PAD_UART_2_TXD 0x20660b0
- #define HAL_IOMUX_FUN_PWM_14_PAD_GPIO_19 0x40160b1
- #define HAL_IOMUX_FUN_PWM_14_PAD_KEYIN_0 0x20240b1
- #define HAL_IOMUX_FUN_PWM_14_PAD_SDMMC1_CLK 0x30440b1
- #define HAL_IOMUX_FUN_PWM_15_PAD_GPIO_20 0x40170b2
- #define HAL_IOMUX_FUN_PWM_15_PAD_KEYIN_1 0x20250b2
- #define HAL_IOMUX_FUN_PWM_15_PAD_SDMMC1_DATA_3 0x30490b2
- #define HAL_IOMUX_FUN_RESETB_PAD_RESETB 0x3b0b3
- #define HAL_IOMUX_FUN_RFFE_SCK_PAD_RFDIG_GPIO_0 0x3c0b4
- #define HAL_IOMUX_FUN_RFFE_SDA_PAD_RFDIG_GPIO_1 0x3d0b5
- #define HAL_IOMUX_FUN_RF_GPIO0_PAD_RFDIG_GPIO_0 0x103c0b6
- #define HAL_IOMUX_FUN_RF_GPIO1_PAD_RFDIG_GPIO_1 0x103d0b7
- #define HAL_IOMUX_FUN_RF_GPIO2_PAD_RFDIG_GPIO_2 0x3e0b8
- #define HAL_IOMUX_FUN_RF_GPIO3_PAD_RFDIG_GPIO_3 0x3f0b9
- #define HAL_IOMUX_FUN_RF_GPIO4_PAD_RFDIG_GPIO_4 0x400ba
- #define HAL_IOMUX_FUN_RF_GPIO5_PAD_RFDIG_GPIO_5 0x410bb
- #define HAL_IOMUX_FUN_RF_GPIO6_PAD_RFDIG_GPIO_6 0x420bc
- #define HAL_IOMUX_FUN_RF_GPIO7_PAD_RFDIG_GPIO_7 0x430bd
- #define HAL_IOMUX_FUN_RF_GPIO8_PAD_GPIO_23 0x401a0be
- #define HAL_IOMUX_FUN_RF_GPIO8_PAD_I2C_M1_SDA 0x401c0be
- #define HAL_IOMUX_FUN_RF_GPIO9_PAD_GPIO_22 0x40190bf
- #define HAL_IOMUX_FUN_RF_GPIO9_PAD_I2C_M1_SCL 0x401b0bf
- #define HAL_IOMUX_FUN_SDMMC1_CLK_PAD_SDMMC1_CLK 0x440c0
- #define HAL_IOMUX_FUN_SDMMC1_CMD_PAD_SDMMC1_CMD 0x450c1
- #define HAL_IOMUX_FUN_SDMMC1_DATA_0_PAD_SDMMC1_DATA_0 0x460c2
- #define HAL_IOMUX_FUN_SDMMC1_DATA_1_PAD_SDMMC1_DATA_1 0x470c3
- #define HAL_IOMUX_FUN_SDMMC1_DATA_2_PAD_SDMMC1_DATA_2 0x480c4
- #define HAL_IOMUX_FUN_SDMMC1_DATA_3_PAD_SDMMC1_DATA_3 0x490c5
- #define HAL_IOMUX_FUN_SDMMC1_DATA_4_PAD_SDMMC1_DATA_4 0x4a0c6
- #define HAL_IOMUX_FUN_SDMMC1_DATA_5_PAD_SDMMC1_DATA_5 0x4b0c7
- #define HAL_IOMUX_FUN_SDMMC1_DATA_6_PAD_SDMMC1_DATA_6 0x4c0c8
- #define HAL_IOMUX_FUN_SDMMC1_DATA_7_PAD_SDMMC1_DATA_7 0x4d0c9
- #define HAL_IOMUX_FUN_SDMMC1_RST_PAD_SDMMC1_RST 0x4e0ca
- #define HAL_IOMUX_FUN_SDMMC2_CLK_PAD_GPIO_18 0x30150cb
- #define HAL_IOMUX_FUN_SDMMC2_CLK_PAD_SW_CLK 0x405d0cb
- #define HAL_IOMUX_FUN_SDMMC2_CMD_PAD_GPIO_19 0x30160cc
- #define HAL_IOMUX_FUN_SDMMC2_CMD_PAD_SW_DIO 0x405e0cc
- #define HAL_IOMUX_FUN_SDMMC2_DATA_0_PAD_DEBUG_HOST_RX 0x40090cd
- #define HAL_IOMUX_FUN_SDMMC2_DATA_0_PAD_GPIO_20 0x30170cd
- #define HAL_IOMUX_FUN_SDMMC2_DATA_1_PAD_DEBUG_HOST_TX 0x400a0ce
- #define HAL_IOMUX_FUN_SDMMC2_DATA_1_PAD_GPIO_21 0x30180ce
- #define HAL_IOMUX_FUN_SDMMC2_DATA_2_PAD_DEBUG_HOST_CLK 0x40080cf
- #define HAL_IOMUX_FUN_SDMMC2_DATA_2_PAD_GPIO_22 0x30190cf
- #define HAL_IOMUX_FUN_SDMMC2_DATA_3_PAD_GPIO_16 0x40130d0
- #define HAL_IOMUX_FUN_SDMMC2_DATA_3_PAD_GPIO_23 0x301a0d0
- #define HAL_IOMUX_FUN_SDMMC2_DATA_3_PAD_I2S1_MCLK 0x70210d0
- #define HAL_IOMUX_FUN_SIM_0_CLK_PAD_SIM_0_CLK 0x4f0d1
- #define HAL_IOMUX_FUN_SIM_0_DIO_PAD_SIM_0_DIO 0x500d2
- #define HAL_IOMUX_FUN_SIM_0_RST_PAD_SIM_0_RST 0x510d3
- #define HAL_IOMUX_FUN_SIM_1_CLK_PAD_SIM_1_CLK 0x520d4
- #define HAL_IOMUX_FUN_SIM_1_DIO_PAD_SIM_1_DIO 0x530d5
- #define HAL_IOMUX_FUN_SIM_1_RST_PAD_SIM_1_RST 0x540d6
- #define HAL_IOMUX_FUN_SPI_1_CLK_PAD_SDMMC1_DATA_3 0x40490d7
- #define HAL_IOMUX_FUN_SPI_1_CLK_PAD_SW_CLK 0x305d0d7
- #define HAL_IOMUX_FUN_SPI_1_CS_0_PAD_SDMMC1_DATA_4 0x404a0d8
- #define HAL_IOMUX_FUN_SPI_1_CS_0_PAD_SW_DIO 0x305e0d8
- #define HAL_IOMUX_FUN_SPI_1_CS_1_PAD_DEBUG_HOST_CLK 0x30080d9
- #define HAL_IOMUX_FUN_SPI_1_CS_1_PAD_SDMMC1_DATA_7 0x404d0d9
- #define HAL_IOMUX_FUN_SPI_1_DIO_0_PAD_DEBUG_HOST_RX 0x30090da
- #define HAL_IOMUX_FUN_SPI_1_DIO_0_PAD_SDMMC1_DATA_5 0x404b0da
- #define HAL_IOMUX_FUN_SPI_1_DI_1_PAD_DEBUG_HOST_TX 0x300a0db
- #define HAL_IOMUX_FUN_SPI_1_DI_1_PAD_SDMMC1_DATA_6 0x404c0db
- #define HAL_IOMUX_FUN_SPI_2_CLK_PAD_GPIO_0 0x100b0dc
- #define HAL_IOMUX_FUN_SPI_2_CLK_PAD_GPIO_18 0x20150dc
- #define HAL_IOMUX_FUN_SPI_2_CLK_PAD_SDMMC1_CLK 0x40440dc
- #define HAL_IOMUX_FUN_SPI_2_CS_0_PAD_GPIO_1 0x100c0dd
- #define HAL_IOMUX_FUN_SPI_2_CS_0_PAD_GPIO_19 0x20160dd
- #define HAL_IOMUX_FUN_SPI_2_CS_0_PAD_SDMMC1_CMD 0x40450dd
- #define HAL_IOMUX_FUN_SPI_2_CS_1_PAD_GPIO_4 0x100f0de
- #define HAL_IOMUX_FUN_SPI_2_CS_1_PAD_GPIO_22 0x20190de
- #define HAL_IOMUX_FUN_SPI_2_CS_1_PAD_SDMMC1_DATA_2 0x40480de
- #define HAL_IOMUX_FUN_SPI_2_DIO_0_PAD_GPIO_2 0x100d0df
- #define HAL_IOMUX_FUN_SPI_2_DIO_0_PAD_GPIO_20 0x20170df
- #define HAL_IOMUX_FUN_SPI_2_DIO_0_PAD_SDMMC1_DATA_0 0x40460df
- #define HAL_IOMUX_FUN_SPI_2_DI_1_PAD_GPIO_3 0x100e0e0
- #define HAL_IOMUX_FUN_SPI_2_DI_1_PAD_GPIO_21 0x20180e0
- #define HAL_IOMUX_FUN_SPI_2_DI_1_PAD_SDMMC1_DATA_1 0x40470e0
- #define HAL_IOMUX_FUN_SPI_CAMERA_SCK_PAD_SDMMC1_DATA_3 0x20490e1
- #define HAL_IOMUX_FUN_SPI_CAMERA_SCK_PAD_SPI_CAMERA_SCK 0x550e1
- #define HAL_IOMUX_FUN_SPI_CAMERA_SI_0_PAD_SDMMC1_DATA_1 0x20470e2
- #define HAL_IOMUX_FUN_SPI_CAMERA_SI_0_PAD_SDMMC1_DATA_2 0x30480e2
- #define HAL_IOMUX_FUN_SPI_CAMERA_SI_0_PAD_SPI_CAMERA_SI_0 0x560e2
- #define HAL_IOMUX_FUN_SPI_CAMERA_SI_0_PAD_SPI_CAMERA_SI_1 0x20570e2
- #define HAL_IOMUX_FUN_SPI_CAMERA_SI_1_PAD_SDMMC1_DATA_1 0x30470e3
- #define HAL_IOMUX_FUN_SPI_CAMERA_SI_1_PAD_SDMMC1_DATA_2 0x20480e3
- #define HAL_IOMUX_FUN_SPI_CAMERA_SI_1_PAD_SPI_CAMERA_SI_0 0x20560e3
- #define HAL_IOMUX_FUN_SPI_CAMERA_SI_1_PAD_SPI_CAMERA_SI_1 0x570e3
- #define HAL_IOMUX_FUN_SPI_CAMERA_SSN_PAD_SPI_CAMERA_SI_1 0x30570e4
- #define HAL_IOMUX_FUN_SPI_FLASH1_CLK_PAD_GPIO_18 0x10150e5
- #define HAL_IOMUX_FUN_SPI_FLASH1_CLK_PAD_SDMMC1_DATA_2 0x60480e5
- #define HAL_IOMUX_FUN_SPI_FLASH1_CLK_PAD_SPI_LCD_SIO 0x105c0e5
- #define HAL_IOMUX_FUN_SPI_FLASH1_CS_PAD_GPIO_19 0x10160e6
- #define HAL_IOMUX_FUN_SPI_FLASH1_CS_PAD_SDMMC1_DATA_3 0x60490e6
- #define HAL_IOMUX_FUN_SPI_FLASH1_CS_PAD_SPI_LCD_SDC 0x105a0e6
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_0_PAD_GPIO_20 0x10170e7
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_0_PAD_SDMMC1_DATA_4 0x604a0e7
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_0_PAD_SPI_LCD_CLK 0x10580e7
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_1_PAD_GPIO_21 0x10180e8
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_1_PAD_SDMMC1_DATA_5 0x604b0e8
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_1_PAD_SPI_LCD_CS 0x10590e8
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_2_PAD_GPIO_22 0x10190e9
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_2_PAD_SDMMC1_DATA_6 0x604c0e9
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_2_PAD_SPI_LCD_SELECT 0x105b0e9
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_3_PAD_GPIO_23 0x101a0ea
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_3_PAD_LCD_FMARK 0x10300ea
- #define HAL_IOMUX_FUN_SPI_FLASH1_SIO_3_PAD_SDMMC1_DATA_7 0x604d0ea
- #define HAL_IOMUX_FUN_SPI_LCD_CLK_PAD_SPI_LCD_CLK 0x580eb
- #define HAL_IOMUX_FUN_SPI_LCD_CS_PAD_SPI_LCD_CS 0x590ec
- #define HAL_IOMUX_FUN_SPI_LCD_SDC_PAD_SPI_LCD_SDC 0x5a0ed
- #define HAL_IOMUX_FUN_SPI_LCD_SELECT_PAD_SPI_LCD_SELECT 0x5b0ee
- #define HAL_IOMUX_FUN_SPI_LCD_SIO_PAD_SPI_LCD_SIO 0x5c0ef
- #define HAL_IOMUX_FUN_TEST_CLKOUT_PAD_GPIO_5 0x50100f0
- #define HAL_IOMUX_FUN_TIMESTAMP_IN_PAD_SDMMC1_DATA_4 0x304a0f1
- #define HAL_IOMUX_FUN_TIMESTAMP_IN_PAD_SDMMC1_DATA_6 0x704c0f1
- #define HAL_IOMUX_FUN_TIMESTAMP_OUT_PAD_SDMMC1_DATA_5 0x304b0f2
- #define HAL_IOMUX_FUN_TIMESTAMP_OUT_PAD_SDMMC1_DATA_7 0x704d0f2
- #define HAL_IOMUX_FUN_TSX_ADC_CH_DATA_PAD_DEBUG_HOST_RX 0x60090f3
- #define HAL_IOMUX_FUN_TSX_ADC_CH_DATA_PAD_GPIO_20 0x50170f3
- #define HAL_IOMUX_FUN_TSX_ADC_CH_SEL_PAD_GPIO_18 0x50150f4
- #define HAL_IOMUX_FUN_TSX_ADC_CH_SEL_PAD_SW_CLK 0x605d0f4
- #define HAL_IOMUX_FUN_TSX_ADC_CLK_PAD_GPIO_19 0x50160f5
- #define HAL_IOMUX_FUN_TSX_ADC_CLK_PAD_SW_DIO 0x605e0f5
- #define HAL_IOMUX_FUN_UART_1_CTS_PAD_GPIO_2 0x300d0f6
- #define HAL_IOMUX_FUN_UART_1_CTS_PAD_UART_1_CTS 0x5f0f6
- #define HAL_IOMUX_FUN_UART_1_RTS_PAD_GPIO_3 0x300e0f7
- #define HAL_IOMUX_FUN_UART_1_RTS_PAD_UART_1_RTS 0x600f7
- #define HAL_IOMUX_FUN_UART_1_RXD_PAD_GPIO_0 0x300b0f8
- #define HAL_IOMUX_FUN_UART_1_RXD_PAD_UART_1_RXD 0x610f8
- #define HAL_IOMUX_FUN_UART_1_TXD_PAD_GPIO_1 0x300c0f9
- #define HAL_IOMUX_FUN_UART_1_TXD_PAD_UART_1_TXD 0x620f9
- #define HAL_IOMUX_FUN_UART_2_CTS_PAD_GPIO_2 0x700d0fa
- #define HAL_IOMUX_FUN_UART_2_CTS_PAD_GPIO_16 0x60130fa
- #define HAL_IOMUX_FUN_UART_2_CTS_PAD_UART_2_CTS 0x630fa
- #define HAL_IOMUX_FUN_UART_2_RTS_PAD_GPIO_3 0x700e0fb
- #define HAL_IOMUX_FUN_UART_2_RTS_PAD_GPIO_17 0x60140fb
- #define HAL_IOMUX_FUN_UART_2_RTS_PAD_UART_2_RTS 0x640fb
- #define HAL_IOMUX_FUN_UART_2_RXD_PAD_GPIO_0 0x700b0fc
- #define HAL_IOMUX_FUN_UART_2_RXD_PAD_SDMMC1_CLK 0x50440fc
- #define HAL_IOMUX_FUN_UART_2_RXD_PAD_UART_1_RTS 0x30600fc
- #define HAL_IOMUX_FUN_UART_2_RXD_PAD_UART_2_RTS 0x20640fc
- #define HAL_IOMUX_FUN_UART_2_RXD_PAD_UART_2_RXD 0x650fc
- #define HAL_IOMUX_FUN_UART_2_TXD_PAD_GPIO_1 0x700c0fd
- #define HAL_IOMUX_FUN_UART_2_TXD_PAD_SDMMC1_CMD 0x50450fd
- #define HAL_IOMUX_FUN_UART_2_TXD_PAD_UART_1_CTS 0x305f0fd
- #define HAL_IOMUX_FUN_UART_2_TXD_PAD_UART_2_CTS 0x20630fd
- #define HAL_IOMUX_FUN_UART_2_TXD_PAD_UART_2_TXD 0x660fd
- #define HAL_IOMUX_FUN_UART_3_CTS_PAD_GPIO_4 0x400f0fe
- #define HAL_IOMUX_FUN_UART_3_RTS_PAD_GPIO_5 0x40100ff
- #define HAL_IOMUX_FUN_UART_3_RXD_PAD_GPIO_0 0x400b100
- #define HAL_IOMUX_FUN_UART_3_RXD_PAD_GPIO_6 0x4011100
- #define HAL_IOMUX_FUN_UART_3_RXD_PAD_GPIO_17 0x1014100
- #define HAL_IOMUX_FUN_UART_3_RXD_PAD_SDMMC1_DATA_2 0x5048100
- #define HAL_IOMUX_FUN_UART_3_RXD_PAD_UART_2_RXD 0x4065100
- #define HAL_IOMUX_FUN_UART_3_TXD_PAD_GPIO_1 0x400c101
- #define HAL_IOMUX_FUN_UART_3_TXD_PAD_GPIO_7 0x4012101
- #define HAL_IOMUX_FUN_UART_3_TXD_PAD_GPIO_16 0x1013101
- #define HAL_IOMUX_FUN_UART_3_TXD_PAD_SDMMC1_DATA_3 0x5049101
- #define HAL_IOMUX_FUN_UART_3_TXD_PAD_UART_2_TXD 0x4066101
- #define HAL_IOMUX_FUN_UART_4_CTS_PAD_SDMMC1_DATA_4 0x504a102
- #define HAL_IOMUX_FUN_UART_4_RTS_PAD_SDMMC1_DATA_5 0x504b103
- #define HAL_IOMUX_FUN_UART_4_RXD_PAD_GPIO_2 0x400d104
- #define HAL_IOMUX_FUN_UART_4_RXD_PAD_I2C_M1_SCL 0x201b104
- #define HAL_IOMUX_FUN_UART_4_RXD_PAD_KEYIN_2 0x2026104
- #define HAL_IOMUX_FUN_UART_4_RXD_PAD_KEYOUT_4 0x302e104
- #define HAL_IOMUX_FUN_UART_4_RXD_PAD_SDMMC1_DATA_6 0x504c104
- #define HAL_IOMUX_FUN_UART_4_RXD_PAD_UART_2_CTS 0x4063104
- #define HAL_IOMUX_FUN_UART_4_TXD_PAD_GPIO_3 0x400e105
- #define HAL_IOMUX_FUN_UART_4_TXD_PAD_I2C_M1_SDA 0x201c105
- #define HAL_IOMUX_FUN_UART_4_TXD_PAD_KEYIN_3 0x2027105
- #define HAL_IOMUX_FUN_UART_4_TXD_PAD_KEYOUT_5 0x302f105
- #define HAL_IOMUX_FUN_UART_4_TXD_PAD_SDMMC1_DATA_7 0x504d105
- #define HAL_IOMUX_FUN_UART_4_TXD_PAD_UART_2_RTS 0x4064105
- #define HAL_IOMUX_FUN_UART_5_CTS_PAD_KEYOUT_4 0x702e106
- #define HAL_IOMUX_FUN_UART_5_RTS_PAD_KEYOUT_5 0x702f107
- #define HAL_IOMUX_FUN_UART_5_RXD_PAD_GPIO_4 0x300f108
- #define HAL_IOMUX_FUN_UART_5_RXD_PAD_KEYIN_4 0x7028108
- #define HAL_IOMUX_FUN_UART_5_RXD_PAD_SDMMC1_DATA_0 0x5046108
- #define HAL_IOMUX_FUN_UART_5_TXD_PAD_GPIO_5 0x3010109
- #define HAL_IOMUX_FUN_UART_5_TXD_PAD_KEYIN_5 0x7029109
- #define HAL_IOMUX_FUN_UART_5_TXD_PAD_SDMMC1_DATA_1 0x5047109
- #define HAL_IOMUX_FUN_UART_6_CTS_PAD_SDMMC1_DATA_0 0x604610a
- #define HAL_IOMUX_FUN_UART_6_RTS_PAD_SDMMC1_DATA_1 0x604710b
- #define HAL_IOMUX_FUN_UART_6_RXD_PAD_GPIO_6 0x301110c
- #define HAL_IOMUX_FUN_UART_6_RXD_PAD_KEYOUT_0 0x202a10c
- #define HAL_IOMUX_FUN_UART_6_RXD_PAD_SDMMC1_CLK 0x604410c
- #define HAL_IOMUX_FUN_UART_6_TXD_PAD_GPIO_7 0x301210d
- #define HAL_IOMUX_FUN_UART_6_TXD_PAD_KEYOUT_1 0x202b10d
- #define HAL_IOMUX_FUN_UART_6_TXD_PAD_SDMMC1_CMD 0x604510d
- #endif
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